* [PATCH 53/73] arm64: tegra: Remove simple regulators bus
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The standard way to do this is to list out the regulators at the top-
level. Adopt the standard way to fix validation.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
.../arm64/boot/dts/nvidia/tegra132-norrin.dts | 247 ++++++------
.../boot/dts/nvidia/tegra186-p2771-0000.dts | 81 ++--
.../arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 60 ++-
.../arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 96 ++---
.../arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 23 +-
.../arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 274 +++++++------
.../arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 361 ++++++++----------
.../boot/dts/nvidia/tegra210-p3450-0000.dts | 177 ++++-----
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 137 +++----
9 files changed, 671 insertions(+), 785 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
index 278bef2d8810..607d28a6772e 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
@@ -1055,142 +1055,139 @@ panel: panel {
ddc-i2c-bus = <&dpaux>;
};
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
+ vdd_mux: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "+VDD_MUX";
+ regulator-min-microvolt = <19000000>;
+ regulator-max-microvolt = <19000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
- vdd_mux: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "+VDD_MUX";
- regulator-min-microvolt = <19000000>;
- regulator-max-microvolt = <19000000>;
- regulator-always-on;
- regulator-boot-on;
- };
+ vdd_5v0_sys: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "+5V_SYS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vdd_mux>;
+ };
- vdd_5v0_sys: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "+5V_SYS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vdd_mux>;
- };
+ vdd_3v3_sys: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "+3.3V_SYS";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ vin-supply = <&vdd_mux>;
+ };
- vdd_3v3_sys: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "+3.3V_SYS";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- vin-supply = <&vdd_mux>;
- };
+ vdd_3v3_run: regulator@3 {
+ compatible = "regulator-fixed";
+ regulator-name = "+3.3V_RUN";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_3v3_sys>;
+ };
- vdd_3v3_run: regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
- regulator-name = "+3.3V_RUN";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&as3722 1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_3v3_sys>;
- };
+ vdd_3v3_hdmi: regulator@4 {
+ compatible = "regulator-fixed";
+ regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vdd_3v3_run>;
+ };
- vdd_3v3_hdmi: regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
- regulator-name = "+3.3V_AVDD_HDMI_AP_GATED";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vdd_3v3_run>;
- };
+ vdd_led: regulator@5 {
+ compatible = "regulator-fixed";
+ regulator-name = "+VDD_LED";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_mux>;
+ };
- vdd_led: regulator@5 {
- compatible = "regulator-fixed";
- reg = <5>;
- regulator-name = "+VDD_LED";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_mux>;
- };
+ vdd_usb1_vbus: regulator@6 {
+ compatible = "regulator-fixed";
+ regulator-name = "+5V_USB_HS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ gpio-open-drain;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- vdd_usb1_vbus: regulator@6 {
- compatible = "regulator-fixed";
- reg = <6>;
- regulator-name = "+5V_USB_HS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- gpio-open-drain;
- vin-supply = <&vdd_5v0_sys>;
- };
+ vdd_usb3_vbus: regulator@7 {
+ compatible = "regulator-fixed";
+ regulator-name = "+5V_USB_SS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ gpio-open-drain;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- vdd_usb3_vbus: regulator@7 {
- compatible = "regulator-fixed";
- reg = <7>;
- regulator-name = "+5V_USB_SS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- gpio-open-drain;
- vin-supply = <&vdd_5v0_sys>;
- };
+ vdd_3v3_panel: regulator@8 {
+ compatible = "regulator-fixed";
+ regulator-name = "+3.3V_PANEL";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_3v3_sys>;
+ };
- vdd_3v3_panel: regulator@8 {
- compatible = "regulator-fixed";
- reg = <8>;
- regulator-name = "+3.3V_PANEL";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&as3722 4 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_3v3_sys>;
- };
+ vdd_hdmi_pll: regulator@9 {
+ compatible = "regulator-fixed";
+ regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+ gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
+ vin-supply = <&vdd_1v05_run>;
+ };
- vdd_hdmi_pll: regulator@9 {
- compatible = "regulator-fixed";
- reg = <9>;
- regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL_AP_GATE";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
- gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>;
- vin-supply = <&vdd_1v05_run>;
- };
+ vdd_5v0_hdmi: regulator@10 {
+ compatible = "regulator-fixed";
+ regulator-name = "+5V_HDMI_CON";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- vdd_5v0_hdmi: regulator@10 {
- compatible = "regulator-fixed";
- reg = <10>;
- regulator-name = "+5V_HDMI_CON";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_5v0_sys>;
- };
+ vdd_5v0_ts: regulator@11 {
+ compatible = "regulator-fixed";
+ regulator-name = "+5V_VDD_TS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- vdd_5v0_ts: regulator@11 {
- compatible = "regulator-fixed";
- reg = <11>;
- regulator-name = "+5V_VDD_TS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ vdd_3v3_lp0: regulator@12 {
+ compatible = "regulator-fixed";
+ regulator-name = "+3.3V_LP0";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ /*
+ * TODO: find a way to wire this up with the USB EHCI
+ * controllers so that it can be enabled on demand.
+ */
+ regulator-always-on;
+ gpio = <&as3722 2 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_3v3_sys>;
};
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
index 37ec15a14c77..43b8d643e7a1 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
@@ -333,62 +333,51 @@ volume-down {
};
};
- regulators {
- vdd_sd: regulator@100 {
- compatible = "regulator-fixed";
- reg = <100>;
+ vdd_sd: regulator@100 {
+ compatible = "regulator-fixed";
+ regulator-name = "SD_CARD_SW_PWR";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
- regulator-name = "SD_CARD_SW_PWR";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ gpio = <&gpio TEGRA186_MAIN_GPIO(P, 6) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
- gpio = <&gpio TEGRA186_MAIN_GPIO(P, 6)
- GPIO_ACTIVE_HIGH>;
- enable-active-high;
-
- vin-supply = <&vdd_3v3_sys>;
- };
-
- vdd_hdmi: regulator@101 {
- compatible = "regulator-fixed";
- reg = <101>;
-
- regulator-name = "VDD_HDMI_5V0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
+ vin-supply = <&vdd_3v3_sys>;
+ };
- gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
- enable-active-high;
+ vdd_hdmi: regulator@101 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_HDMI_5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
- vin-supply = <&vdd_5v0_sys>;
- };
+ gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
- vdd_usb0: regulator@102 {
- compatible = "regulator-fixed";
- reg = <102>;
-
- regulator-name = "VDD_USB0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- gpio = <&gpio TEGRA186_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
- enable-active-high;
+ vdd_usb0: regulator@102 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_USB0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
- vin-supply = <&vdd_5v0_sys>;
- };
+ gpio = <&gpio TEGRA186_MAIN_GPIO(L, 4) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
- vdd_usb1: regulator@103 {
- compatible = "regulator-fixed";
- reg = <103>;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- regulator-name = "VDD_USB1";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
+ vdd_usb1: regulator@103 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_USB1";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA186_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
- enable-active-high;
+ gpio = <&gpio TEGRA186_MAIN_GPIO(L, 5) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
- vin-supply = <&vdd_5v0_sys>;
- };
+ vin-supply = <&vdd_5v0_sys>;
};
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
index d1ed7eee949a..b5568b9ff181 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
@@ -392,45 +392,33 @@ psci {
method = "smc";
};
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- gnd: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
-
- regulator-name = "GND";
- regulator-min-microvolt = <0>;
- regulator-max-microvolt = <0>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vdd_5v0_sys: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
-
- regulator-name = "VDD_5V0_SYS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- };
+ gnd: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "GND";
+ regulator-min-microvolt = <0>;
+ regulator-max-microvolt = <0>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
- vdd_1v8_ap: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
+ vdd_5v0_sys: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_5V0_SYS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
- regulator-name = "VDD_1V8_AP";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ vdd_1v8_ap: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_1V8_AP";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
- gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
+ gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
- vin-supply = <&vdd_1v8>;
- };
+ vin-supply = <&vdd_1v8>;
};
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
index 442e333ac13f..6f2c0754c870 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
@@ -293,65 +293,49 @@ temperature-sensor@4c {
};
};
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- vdd_5v0_sys: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
-
- regulator-name = "VIN_SYS_5V0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vdd_hdmi: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
-
- regulator-name = "VDD_5V0_HDMI_CON";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA194_MAIN_GPIO(A, 3) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
-
- vdd_3v3_pcie: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
-
- regulator-name = "PEX_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
- regulator-boot-on;
- enable-active-high;
- };
+ vdd_5v0_sys: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "VIN_SYS_5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
- vdd_12v_pcie: regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
+ vdd_hdmi: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_5V0_HDMI_CON";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA194_MAIN_GPIO(A, 3) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- regulator-name = "VDD_12V";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- gpio = <&gpio TEGRA194_MAIN_GPIO(A, 1) GPIO_ACTIVE_HIGH>;
- regulator-boot-on;
- };
+ vdd_3v3_pcie: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "PEX_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
+ regulator-boot-on;
+ enable-active-high;
+ };
- vdd_5v_sata: regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
+ vdd_12v_pcie: regulator@3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_12V";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ gpio = <&gpio TEGRA194_MAIN_GPIO(A, 1) GPIO_ACTIVE_HIGH>;
+ regulator-boot-on;
+ };
- regulator-name = "VDD_5V_SATA";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ vdd_5v_sata: regulator@4 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_5V_SATA";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
};
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
index 8a4ba371ff92..d818fac3070c 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
@@ -335,18 +335,15 @@ psci {
method = "smc";
};
- regulators {
- vdd_gpu: regulator@100 {
- compatible = "pwm-regulator";
- reg = <100>;
- pwms = <&pwm 1 4880>;
- regulator-name = "VDD_GPU";
- regulator-min-microvolt = <710000>;
- regulator-max-microvolt = <1320000>;
- enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
- regulator-ramp-delay = <80>;
- regulator-enable-ramp-delay = <2000>;
- regulator-settling-time-us = <160>;
- };
+ vdd_gpu: regulator@100 {
+ compatible = "pwm-regulator";
+ pwms = <&pwm 1 4880>;
+ regulator-name = "VDD_GPU";
+ regulator-min-microvolt = <710000>;
+ regulator-max-microvolt = <1320000>;
+ enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
+ regulator-ramp-delay = <80>;
+ regulator-enable-ramp-delay = <2000>;
+ regulator-settling-time-us = <160>;
};
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
index fb0db05647c4..4771c1668825 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
@@ -1518,152 +1518,6 @@ usb@700d0000 {
hvdd-usb-supply = <&vdd_1v8>;
};
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- vdd_sys_mux: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "VDD_SYS_MUX";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vdd_5v0_sys: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "VDD_5V0_SYS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_sys_mux>;
- };
-
- vdd_3v3_sys: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "VDD_3V3_SYS";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
- gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_sys_mux>;
-
- regulator-enable-ramp-delay = <160>;
- regulator-disable-ramp-delay = <10000>;
- };
-
- vdd_5v0_io: regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
- regulator-name = "VDD_5V0_IO_SYS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- };
-
- vdd_3v3_sd: regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
- regulator-name = "VDD_3V3_SD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_3v3_sys>;
-
- regulator-enable-ramp-delay = <472>;
- regulator-disable-ramp-delay = <4880>;
- };
-
- vdd_dsi_csi: regulator@5 {
- compatible = "regulator-fixed";
- reg = <5>;
- regulator-name = "AVDD_DSI_CSI_1V2";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- vin-supply = <&vdd_sys_1v2>;
- };
-
- vdd_3v3_dis: regulator@6 {
- compatible = "regulator-fixed";
- reg = <6>;
- regulator-name = "VDD_DIS_3V3_LCD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_3v3_sys>;
- };
-
- vdd_1v8_dis: regulator@7 {
- compatible = "regulator-fixed";
- reg = <7>;
- regulator-name = "VDD_LCD_1V8_DIS";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-always-on;
- gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_1v8>;
- };
-
- vdd_5v0_rtl: regulator@8 {
- compatible = "regulator-fixed";
- reg = <8>;
- regulator-name = "RTL_5V";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_5v0_sys>;
- };
-
- vdd_usb_vbus: regulator@9 {
- compatible = "regulator-fixed";
- reg = <9>;
- regulator-name = "USB_VBUS_EN1";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_5v0_sys>;
- };
-
- vdd_usb_vbus_otg: regulator@11 {
- compatible = "regulator-fixed";
- reg = <9>;
- regulator-name = "USB_VBUS_EN0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_5v0_sys>;
- };
-
- vdd_hdmi: regulator@10 {
- compatible = "regulator-fixed";
- reg = <10>;
- regulator-name = "VDD_HDMI_5V0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- gpio = <&exp1 12 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- vin-supply = <&vdd_5v0_sys>;
- };
- };
-
gpio-keys {
compatible = "gpio-keys";
label = "gpio-keys";
@@ -1687,4 +1541,132 @@ volume_up {
linux,code = <KEY_VOLUMEUP>;
};
};
+
+ vdd_sys_mux: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_SYS_MUX";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_5v0_sys: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_5V0_SYS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_sys_mux>;
+ };
+
+ vdd_3v3_sys: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_3V3_SYS";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_sys_mux>;
+
+ regulator-enable-ramp-delay = <160>;
+ regulator-disable-ramp-delay = <10000>;
+ };
+
+ vdd_5v0_io: regulator@3 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_5V0_IO_SYS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ vdd_3v3_sd: regulator@4 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_3V3_SD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_3v3_sys>;
+
+ regulator-enable-ramp-delay = <472>;
+ regulator-disable-ramp-delay = <4880>;
+ };
+
+ vdd_dsi_csi: regulator@5 {
+ compatible = "regulator-fixed";
+ regulator-name = "AVDD_DSI_CSI_1V2";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ vin-supply = <&vdd_sys_1v2>;
+ };
+
+ vdd_3v3_dis: regulator@6 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_DIS_3V3_LCD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ gpio = <&exp1 3 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_3v3_sys>;
+ };
+
+ vdd_1v8_dis: regulator@7 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_LCD_1V8_DIS";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+ gpio = <&exp1 14 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_1v8>;
+ };
+
+ vdd_5v0_rtl: regulator@8 {
+ compatible = "regulator-fixed";
+ regulator-name = "RTL_5V";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_5v0_sys>;
+ };
+
+ vdd_usb_vbus: regulator@9 {
+ compatible = "regulator-fixed";
+ regulator-name = "USB_VBUS_EN1";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_5v0_sys>;
+ };
+
+ vdd_usb_vbus_otg: regulator@11 {
+ compatible = "regulator-fixed";
+ regulator-name = "USB_VBUS_EN0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_5v0_sys>;
+ };
+
+ vdd_hdmi: regulator@10 {
+ compatible = "regulator-fixed";
+ regulator-name = "VDD_HDMI_5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&exp1 12 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ vin-supply = <&vdd_5v0_sys>;
+ };
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index 9f81cabdcbb6..a348789bc5e1 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -1635,223 +1635,198 @@ psci {
method = "smc";
};
- regulators {
- compatible = "simple-bus";
- device_type = "fixed-regulators";
- #address-cells = <1>;
- #size-cells = <0>;
-
- battery_reg: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "vdd-ac-bat";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
+ battery_reg: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-ac-bat";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
- vdd_3v3: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "vdd-3v3";
- regulator-enable-ramp-delay = <160>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
-
- gpio = <&max77620 3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ vdd_3v3: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-3v3";
+ regulator-enable-ramp-delay = <160>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
- max77620_gpio7: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "max77620-gpio7";
- regulator-enable-ramp-delay = <240>;
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- vin-supply = <&max77620_ldo0>;
- regulator-always-on;
- regulator-boot-on;
-
- gpio = <&max77620 7 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- lcd_bl_en: regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
- regulator-name = "lcd-bl-en";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- regulator-boot-on;
+ max77620_gpio7: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "max77620-gpio7";
+ regulator-enable-ramp-delay = <240>;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ vin-supply = <&max77620_ldo0>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ lcd_bl_en: regulator@3 {
+ compatible = "regulator-fixed";
+ regulator-name = "lcd-bl-en";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-boot-on;
- en_vdd_sd: regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
- regulator-name = "en-vdd-sd";
- regulator-enable-ramp-delay = <472>;
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- vin-supply = <&vdd_3v3>;
-
- gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ gpio = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- en_vdd_cam: regulator@5 {
- compatible = "regulator-fixed";
- reg = <5>;
- regulator-name = "en-vdd-cam";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
+ en_vdd_sd: regulator@4 {
+ compatible = "regulator-fixed";
+ regulator-name = "en-vdd-sd";
+ regulator-enable-ramp-delay = <472>;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ vin-supply = <&vdd_3v3>;
- gpio = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ gpio = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- vdd_sys_boost: regulator@6 {
- compatible = "regulator-fixed";
- reg = <6>;
- regulator-name = "vdd-sys-boost";
- regulator-enable-ramp-delay = <3090>;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
-
- gpio = <&max77620 1 GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ en_vdd_cam: regulator@5 {
+ compatible = "regulator-fixed";
+ regulator-name = "en-vdd-cam";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
- vdd_hdmi: regulator@7 {
- compatible = "regulator-fixed";
- reg = <7>;
- regulator-name = "vdd-hdmi";
- regulator-enable-ramp-delay = <468>;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vdd_sys_boost>;
- regulator-boot-on;
-
- gpio = <&gpio TEGRA_GPIO(CC, 7) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ gpio = <&gpio TEGRA_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- en_vdd_cpu_fixed: regulator@8 {
- compatible = "regulator-fixed";
- reg = <8>;
- regulator-name = "vdd-cpu-fixed";
- regulator-min-microvolt = <1000000>;
- regulator-max-microvolt = <1000000>;
- };
+ vdd_sys_boost: regulator@6 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-sys-boost";
+ regulator-enable-ramp-delay = <3090>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
- vdd_aux_3v3: regulator@9 {
- compatible = "regulator-fixed";
- reg = <9>;
- regulator-name = "aux-3v3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- };
+ gpio = <&pmic 1 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- vdd_snsr_pm: regulator@10 {
- compatible = "regulator-fixed";
- reg = <10>;
- regulator-name = "snsr_pm";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ vdd_hdmi: regulator@7 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-hdmi";
+ regulator-enable-ramp-delay = <468>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vdd_sys_boost>;
+ regulator-boot-on;
+
+ gpio = <&gpio TEGRA_GPIO(CC, 7) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- enable-active-high;
- };
+ en_vdd_cpu_fixed: regulator@8 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-cpu-fixed";
+ regulator-min-microvolt = <1000000>;
+ regulator-max-microvolt = <1000000>;
+ };
- vdd_usb_5v0: regulator@11 {
- compatible = "regulator-fixed";
- reg = <11>;
- status = "disabled";
- regulator-name = "vdd-usb-5v0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- vin-supply = <&vdd_3v3>;
+ vdd_aux_3v3: regulator@9 {
+ compatible = "regulator-fixed";
+ regulator-name = "aux-3v3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
- enable-active-high;
- };
+ vdd_snsr_pm: regulator@10 {
+ compatible = "regulator-fixed";
+ regulator-name = "snsr_pm";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
- vdd_cdc_1v2_aud: regulator@101 {
- compatible = "regulator-fixed";
- reg = <101>;
- status = "disabled";
- regulator-name = "vdd_cdc_1v2_aud";
- regulator-min-microvolt = <1200000>;
- regulator-max-microvolt = <1200000>;
- startup-delay-us = <250000>;
+ enable-active-high;
+ };
- enable-active-high;
- };
+ vdd_usb_5v0: regulator@11 {
+ compatible = "regulator-fixed";
+ status = "disabled";
+ regulator-name = "vdd-usb-5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vdd_3v3>;
- vdd_disp_3v0: regulator@12 {
- compatible = "regulator-fixed";
- reg = <12>;
- regulator-name = "vdd-disp-3v0";
- regulator-enable-ramp-delay = <232>;
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
-
- gpio = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ enable-active-high;
+ };
- vdd_fan: regulator@13 {
- compatible = "regulator-fixed";
- reg = <13>;
- regulator-name = "vdd-fan";
- regulator-enable-ramp-delay = <284>;
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
+ vdd_cdc_1v2_aud: regulator@101 {
+ compatible = "regulator-fixed";
+ status = "disabled";
+ regulator-name = "vdd_cdc_1v2_aud";
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+ startup-delay-us = <250000>;
- gpio = <&gpio TEGRA_GPIO(E, 4) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- };
+ enable-active-high;
+ };
- usb_vbus1: regulator@14 {
- compatible = "regulator-fixed";
- reg = <14>;
- regulator-name = "usb-vbus1";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
+ vdd_disp_3v0: regulator@12 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-disp-3v0";
+ regulator-enable-ramp-delay = <232>;
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
- gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- gpio-open-drain;
- };
+ gpio = <&gpio TEGRA_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- usb_vbus2: regulator@15 {
- compatible = "regulator-fixed";
- reg = <15>;
- regulator-name = "usb-vbus2";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
+ vdd_fan: regulator@13 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-fan";
+ regulator-enable-ramp-delay = <284>;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- gpio-open-drain;
- };
+ gpio = <&gpio TEGRA_GPIO(E, 4) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
- vdd_3v3_eth: regulator@16 {
- compatible = "regulator-fixed";
- reg = <16>;
- regulator-name = "vdd-3v3-eth-a02";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-always-on;
- regulator-boot-on;
-
- gpio = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
- enable-active-high;
- gpio-open-drain;
- };
+ usb_vbus1: regulator@14 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb-vbus1";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&gpio TEGRA_GPIO(CC, 5) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ gpio-open-drain;
+ };
+
+ usb_vbus2: regulator@15 {
+ compatible = "regulator-fixed";
+ regulator-name = "usb-vbus2";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+
+ gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ gpio-open-drain;
+ };
+
+ vdd_3v3_eth: regulator@16 {
+ compatible = "regulator-fixed";
+ regulator-name = "vdd-3v3-eth-a02";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+
+ gpio = <&gpio TEGRA_GPIO(D, 4) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ gpio-open-drain;
};
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index b888efcea86f..d7a4eced0149 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -683,120 +683,109 @@ psci {
method = "smc";
};
- regulators {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- vdd_5v0_sys: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
-
- regulator-name = "VDD_5V0_SYS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
- };
+ vdd_5v0_sys: regulator@0 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VDD_5V0_SYS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
- vdd_3v3_sys: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "VDD_3V3_SYS";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-enable-ramp-delay = <240>;
- regulator-disable-ramp-delay = <11340>;
- regulator-always-on;
- regulator-boot-on;
-
- gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
- enable-active-high;
-
- vin-supply = <&vdd_5v0_sys>;
- };
+ vdd_3v3_sys: regulator@1 {
+ compatible = "regulator-fixed";
- vdd_3v3_sd: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
+ regulator-name = "VDD_3V3_SYS";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-enable-ramp-delay = <240>;
+ regulator-disable-ramp-delay = <11340>;
+ regulator-always-on;
+ regulator-boot-on;
- regulator-name = "VDD_3V3_SD";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ gpio = <&pmic 3 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
- gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
- enable-active-high;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- vin-supply = <&vdd_3v3_sys>;
- };
+ vdd_3v3_sd: regulator@2 {
+ compatible = "regulator-fixed";
- vdd_hdmi: regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
+ regulator-name = "VDD_3V3_SD";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
- regulator-name = "VDD_HDMI_5V0";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
+ gpio = <&gpio TEGRA_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
- vin-supply = <&vdd_5v0_sys>;
- };
+ vin-supply = <&vdd_3v3_sys>;
+ };
- vdd_hub_3v3: regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
+ vdd_hdmi: regulator@3 {
+ compatible = "regulator-fixed";
- regulator-name = "VDD_HUB_3V3";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
+ regulator-name = "VDD_HDMI_5V0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
- gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
- enable-active-high;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- vin-supply = <&vdd_5v0_sys>;
- };
+ vdd_hub_3v3: regulator@4 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "VDD_HUB_3V3";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
- vdd_cpu: regulator@5 {
- compatible = "regulator-fixed";
- reg = <5>;
+ gpio = <&gpio TEGRA_GPIO(A, 6) GPIO_ACTIVE_HIGH>;
+ enable-active-high;
- regulator-name = "VDD_CPU";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- regulator-boot-on;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- gpio = <&pmic 5 GPIO_ACTIVE_HIGH>;
- enable-active-high;
+ vdd_cpu: regulator@5 {
+ compatible = "regulator-fixed";
- vin-supply = <&vdd_5v0_sys>;
- };
+ regulator-name = "VDD_CPU";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ regulator-boot-on;
- vdd_gpu: regulator@6 {
- compatible = "pwm-regulator";
- reg = <6>;
- pwms = <&pwm 1 4880>;
- regulator-name = "VDD_GPU";
- regulator-min-microvolt = <710000>;
- regulator-max-microvolt = <1320000>;
- regulator-ramp-delay = <80>;
- regulator-enable-ramp-delay = <2000>;
- regulator-settling-time-us = <160>;
- enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
- vin-supply = <&vdd_5v0_sys>;
- };
+ gpio = <&pmic 5 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
- avdd_io_edp_1v05: regulator@7 {
- compatible = "regulator-fixed";
- reg = <7>;
+ vin-supply = <&vdd_5v0_sys>;
+ };
- regulator-name = "AVDD_IO_EDP_1V05";
- regulator-min-microvolt = <1050000>;
- regulator-max-microvolt = <1050000>;
+ vdd_gpu: regulator@6 {
+ compatible = "pwm-regulator";
+ pwms = <&pwm 1 4880>;
- gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
- enable-active-high;
+ regulator-name = "VDD_GPU";
+ regulator-min-microvolt = <710000>;
+ regulator-max-microvolt = <1320000>;
+ regulator-ramp-delay = <80>;
+ regulator-enable-ramp-delay = <2000>;
+ regulator-settling-time-us = <160>;
- vin-supply = <&avdd_1v05_pll>;
- };
+ enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&vdd_5v0_sys>;
+ };
+
+ avdd_io_edp_1v05: regulator@7 {
+ compatible = "regulator-fixed";
+
+ regulator-name = "AVDD_IO_EDP_1V05";
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1050000>;
+
+ gpio = <&pmic 7 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+
+ vin-supply = <&avdd_1v05_pll>;
};
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
index a28ca6620b86..cc0d7b4a5834 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -1803,88 +1803,73 @@ psci {
method = "smc";
};
- regulators {
- compatible = "simple-bus";
- device_type = "fixed-regulators";
- #address-cells = <1>;
- #size-cells = <0>;
-
- ppvar_sys: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "PPVAR_SYS";
- regulator-min-microvolt = <4400000>;
- regulator-max-microvolt = <4400000>;
- regulator-always-on;
- };
+ ppvar_sys: regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "PPVAR_SYS";
+ regulator-min-microvolt = <4400000>;
+ regulator-max-microvolt = <4400000>;
+ regulator-always-on;
+ };
- pplcd_vdd: regulator@1 {
- compatible = "regulator-fixed";
- reg = <1>;
- regulator-name = "PPLCD_VDD";
- regulator-min-microvolt = <4400000>;
- regulator-max-microvolt = <4400000>;
- gpio = <&gpio TEGRA_GPIO(V, 4) 0>;
- enable-active-high;
- regulator-boot-on;
- };
+ pplcd_vdd: regulator@1 {
+ compatible = "regulator-fixed";
+ regulator-name = "PPLCD_VDD";
+ regulator-min-microvolt = <4400000>;
+ regulator-max-microvolt = <4400000>;
+ gpio = <&gpio TEGRA_GPIO(V, 4) 0>;
+ enable-active-high;
+ regulator-boot-on;
+ };
- pp3000_always: regulator@2 {
- compatible = "regulator-fixed";
- reg = <2>;
- regulator-name = "PP3000_ALWAYS";
- regulator-min-microvolt = <3000000>;
- regulator-max-microvolt = <3000000>;
- regulator-always-on;
- };
+ pp3000_always: regulator@2 {
+ compatible = "regulator-fixed";
+ regulator-name = "PP3000_ALWAYS";
+ regulator-min-microvolt = <3000000>;
+ regulator-max-microvolt = <3000000>;
+ regulator-always-on;
+ };
- pp3300: regulator@3 {
- compatible = "regulator-fixed";
- reg = <3>;
- regulator-name = "PP3300";
- regulator-min-microvolt = <3300000>;
- regulator-max-microvolt = <3300000>;
- regulator-boot-on;
- regulator-always-on;
- enable-active-high;
- };
+ pp3300: regulator@3 {
+ compatible = "regulator-fixed";
+ regulator-name = "PP3300";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-boot-on;
+ regulator-always-on;
+ enable-active-high;
+ };
- pp5000: regulator@4 {
- compatible = "regulator-fixed";
- reg = <4>;
- regulator-name = "PP5000";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- regulator-always-on;
- };
+ pp5000: regulator@4 {
+ compatible = "regulator-fixed";
+ regulator-name = "PP5000";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-always-on;
+ };
- pp1800_lcdio: regulator@5 {
- compatible = "regulator-fixed";
- reg = <5>;
- regulator-name = "PP1800_LCDIO";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- gpio = <&gpio TEGRA_GPIO(V, 3) 0>;
- enable-active-high;
- regulator-boot-on;
- };
+ pp1800_lcdio: regulator@5 {
+ compatible = "regulator-fixed";
+ regulator-name = "PP1800_LCDIO";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ gpio = <&gpio TEGRA_GPIO(V, 3) 0>;
+ enable-active-high;
+ regulator-boot-on;
+ };
- pp1800_cam: regulator@6 {
- compatible = "regulator-fixed";
- reg= <6>;
- regulator-name = "PP1800_CAM";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <1800000>;
- gpio = <&gpio TEGRA_GPIO(K, 3) 0>;
- enable-active-high;
- };
+ pp1800_cam: regulator@6 {
+ compatible = "regulator-fixed";
+ regulator-name = "PP1800_CAM";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ gpio = <&gpio TEGRA_GPIO(K, 3) 0>;
+ enable-active-high;
+ };
- usbc_vbus: regulator@7 {
- compatible = "regulator-fixed";
- reg = <7>;
- regulator-name = "USBC_VBUS";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- };
+ usbc_vbus: regulator@7 {
+ compatible = "regulator-fixed";
+ regulator-name = "USBC_VBUS";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
};
};
--
2.24.1
^ permalink raw reply related
* [PATCH 52/73] arm64: tegra: Remove simple clocks bus
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The standard way to do this is to list out the clocks at the top-level.
Adopt the standard way to fix validation.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 15 ++++-----------
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 15 ++++-----------
arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi | 15 ++++-----------
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 15 ++++-----------
.../arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 15 ++++-----------
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 15 ++++-----------
6 files changed, 24 insertions(+), 66 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
index bb45ca6a5cf2..278bef2d8810 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
@@ -1022,17 +1022,10 @@ backlight: backlight {
backlight-boot-off;
};
- clocks {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- clk32k_in: clock@0 {
- compatible = "fixed-clock";
- reg=<0>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
+ clk32k_in: clock@0 {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ #clock-cells = <0>;
};
gpio-keys {
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
index 251c6099482a..8a4ba371ff92 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
@@ -300,17 +300,10 @@ mmc@700b0600 {
vqmmc-supply = <&vdd_1v8>;
};
- clocks {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- clk32k_in: clock@0 {
- compatible = "fixed-clock";
- reg = <0>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
+ clk32k_in: clock@0 {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ #clock-cells = <0>;
};
cpus {
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
index f9158dc943f9..58aa0518965e 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
@@ -40,17 +40,10 @@ mmc@700b0600 {
non-removable;
};
- clocks {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- clk32k_in: clock@0 {
- compatible = "fixed-clock";
- reg = <0>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
+ clk32k_in: clock@0 {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ #clock-cells = <0>;
};
cpus {
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index 579d5b8a757d..9f81cabdcbb6 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -1586,17 +1586,10 @@ mmc@700b0600 {
status = "okay";
};
- clocks {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- clk32k_in: clock@0 {
- compatible = "fixed-clock";
- reg = <0>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
+ clk32k_in: clock@0 {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ #clock-cells = <0>;
};
gpio-keys {
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index 4a354f5293fc..b888efcea86f 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -566,17 +566,10 @@ mmc@700b0400 {
wakeup-source;
};
- clocks {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- clk32k_in: clock@0 {
- compatible = "fixed-clock";
- reg = <0>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
+ clk32k_in: clock@0 {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ #clock-cells = <0>;
};
cpus {
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
index 9f630ecc06bc..a28ca6620b86 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -1722,17 +1722,10 @@ agic@702f9000 {
};
};
- clocks {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <0>;
-
- clk32k_in: clock@0 {
- compatible = "fixed-clock";
- reg = <0>;
- #clock-cells = <0>;
- clock-frequency = <32768>;
- };
+ clk32k_in: clock@0 {
+ compatible = "fixed-clock";
+ clock-frequency = <32768>;
+ #clock-cells = <0>;
};
cpus {
--
2.24.1
^ permalink raw reply related
* [PATCH 51/73] arm64: tegra: Remove undocumented battery-name property
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
battery-name is not a documented property, so drop it to avoid
validation failures.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 1 -
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 1 -
2 files changed, 2 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
index bba8a4b82b0b..bb45ca6a5cf2 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
@@ -781,7 +781,6 @@ TEGRA_GPIO(J, 0)
battery: smart-battery {
compatible = "sbs,sbs-battery";
reg = <0xb>;
- battery-name = "battery";
sbs,i2c-retry-count = <2>;
sbs,poll-retry-count = <10>;
/* power-supplies = <&charger>; */
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
index d32053934f3c..9f630ecc06bc 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -1330,7 +1330,6 @@ ec_i2c_0: i2c-tunnel {
battery: bq27742@55 {
compatible = "ti,bq27742";
reg = <0x55>;
- battery-name = "battery";
};
};
};
--
2.24.1
^ permalink raw reply related
* [PATCH 50/73] arm64: tegra: Enable XUSB on Norrin
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Use the XUSB controller instead of the legacy EHCI controller to enable
USB 3.0 support.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
.../arm64/boot/dts/nvidia/tegra132-norrin.dts | 124 +++++++++++----
arch/arm64/boot/dts/nvidia/tegra132.dtsi | 148 ++++++++++++++++--
2 files changed, 230 insertions(+), 42 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
index e6fe62e5c234..bba8a4b82b0b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
@@ -671,7 +671,7 @@ vdd_gpu: sd6 {
regulator-boot-on;
};
- ldo0 {
+ avdd_1v05_run: ldo0 {
regulator-name = "+1.05_RUN_AVDD";
regulator-min-microvolt = <1050000>;
regulator-max-microvolt = <1050000>;
@@ -893,6 +893,101 @@ pmc@7000e400 {
nvidia,reset-gpio = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
};
+ usb@70090000 {
+ phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */
+ <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */
+ <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */
+ <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */
+ <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */
+ phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1";
+
+ avddio-pex-supply = <&vdd_1v05_run>;
+ dvddio-pex-supply = <&vdd_1v05_run>;
+ avdd-usb-supply = <&vdd_3v3_lp0>;
+ hvdd-usb-ss-supply = <&vdd_3v3_lp0>;
+
+ status = "okay";
+ };
+
+ padctl@7009f000 {
+ avdd-pll-utmip-supply = <&vddio_1v8>;
+ avdd-pll-erefe-supply = <&avdd_1v05_run>;
+ avdd-pex-pll-supply = <&vdd_1v05_run>;
+ hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
+
+ pads {
+ usb2 {
+ status = "okay";
+
+ lanes {
+ usb2-0 {
+ nvidia,function = "xusb";
+ status = "okay";
+ };
+
+ usb2-1 {
+ nvidia,function = "xusb";
+ status = "okay";
+ };
+
+ usb2-2 {
+ nvidia,function = "xusb";
+ status = "okay";
+ };
+ };
+ };
+
+ pcie {
+ status = "okay";
+
+ lanes {
+ pcie-0 {
+ nvidia,function = "usb3-ss";
+ status = "okay";
+ };
+
+ pcie-1 {
+ nvidia,function = "usb3-ss";
+ status = "okay";
+ };
+ };
+ };
+ };
+
+ ports {
+ usb2-0 {
+ status = "okay";
+ mode = "otg";
+
+ vbus-supply = <&vdd_usb1_vbus>;
+ };
+
+ usb2-1 {
+ status = "okay";
+ mode = "host";
+
+ vbus-supply = <&vdd_run_cam>;
+ };
+
+ usb2-2 {
+ status = "okay";
+ mode = "host";
+
+ vbus-supply = <&vdd_usb3_vbus>;
+ };
+
+ usb3-0 {
+ nvidia,usb2-companion = <0>;
+ status = "okay";
+ };
+
+ usb3-1 {
+ nvidia,usb2-companion = <2>;
+ status = "okay";
+ };
+ };
+ };
+
/* WIFI/BT module */
mmc@700b0000 {
status = "disabled";
@@ -915,33 +1010,6 @@ mmc@700b0600 {
non-removable;
};
- usb@7d000000 {
- status = "okay";
- };
-
- usb-phy@7d000000 {
- status = "okay";
- vbus-supply = <&vdd_usb1_vbus>;
- };
-
- usb@7d004000 {
- status = "okay";
- };
-
- usb-phy@7d004000 {
- status = "okay";
- vbus-supply = <&vdd_run_cam>;
- };
-
- usb@7d008000 {
- status = "okay";
- };
-
- usb-phy@7d008000 {
- status = "okay";
- vbus-supply = <&vdd_usb3_vbus>;
- };
-
backlight: backlight {
compatible = "pwm-backlight";
diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
index 8558ad38b69c..0cc6b4e9f954 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
@@ -50,9 +50,6 @@ pcie@1003000 {
reset-names = "pex", "afi", "pcie_x";
status = "disabled";
- phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>;
- phy-names = "pcie";
-
pci@1,0 {
device_type = "pci";
assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>;
@@ -630,8 +627,6 @@ sata@70020000 {
<&tegra_car 123>,
<&tegra_car 129>;
reset-names = "sata", "sata-oob", "sata-cold";
- phys = <&padctl TEGRA_XUSB_PADCTL_SATA>;
- phy-names = "sata-phy";
status = "disabled";
};
@@ -651,6 +646,41 @@ hda@70030000 {
status = "disabled";
};
+ usb@70090000 {
+ compatible = "nvidia,tegra132-xusb", "nvidia,tegra124-xusb";
+ reg = <0x0 0x70090000 0x0 0x8000>,
+ <0x0 0x70098000 0x0 0x1000>,
+ <0x0 0x70099000 0x0 0x1000>;
+ reg-names = "hcd", "fpci", "ipfs";
+
+ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
+
+ clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>,
+ <&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>,
+ <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>,
+ <&tegra_car TEGRA124_CLK_XUSB_SS>,
+ <&tegra_car TEGRA124_CLK_XUSB_SS_SRC>,
+ <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>,
+ <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>,
+ <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>,
+ <&tegra_car TEGRA124_CLK_PLL_U_480M>,
+ <&tegra_car TEGRA124_CLK_CLK_M>,
+ <&tegra_car TEGRA124_CLK_PLL_E>;
+ clock-names = "xusb_host", "xusb_host_src",
+ "xusb_falcon_src", "xusb_ss",
+ "xusb_ss_src", "xusb_ss_div2",
+ "xusb_hs_src", "xusb_fs_src",
+ "pll_u_480m", "clk_m", "pll_e";
+ resets = <&tegra_car 89>, <&tegra_car 156>,
+ <&tegra_car 143>;
+ reset-names = "xusb_host", "xusb_ss", "xusb_src";
+
+ nvidia,xusb-padctl = <&padctl>;
+
+ status = "disabled";
+ };
+
padctl: padctl@7009f000 {
compatible = "nvidia,tegra132-xusb-padctl",
"nvidia,tegra124-xusb-padctl";
@@ -658,34 +688,124 @@ padctl: padctl@7009f000 {
resets = <&tegra_car 142>;
reset-names = "padctl";
- #phy-cells = <1>;
+ pads {
+ usb2 {
+ status = "disabled";
- phys {
- pcie-0 {
+ lanes {
+ usb2-0 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb2-1 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ usb2-2 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+ };
+ };
+
+ ulpi {
status = "disabled";
+
+ lanes {
+ ulpi-0 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+ };
};
- sata-0 {
+ hsic {
status = "disabled";
+
+ lanes {
+ hsic-0 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ hsic-1 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+ };
};
- usb3-0 {
+ pcie {
status = "disabled";
+
+ lanes {
+ pcie-0 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ pcie-1 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ pcie-2 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ pcie-3 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+
+ pcie-4 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+ };
};
- usb3-1 {
+ sata {
+ status = "disabled";
+
+ lanes {
+ sata-0 {
+ status = "disabled";
+ #phy-cells = <0>;
+ };
+ };
+ };
+ };
+
+ ports {
+ usb2-0 {
+ status = "disabled";
+ };
+
+ usb2-1 {
status = "disabled";
};
- utmi-0 {
+ usb2-2 {
status = "disabled";
};
- utmi-1 {
+ hsic-0 {
status = "disabled";
};
- utmi-2 {
+ hsic-1 {
+ status = "disabled";
+ };
+
+ usb3-0 {
+ status = "disabled";
+ };
+
+ usb3-1 {
status = "disabled";
};
};
--
2.24.1
^ permalink raw reply related
* [PATCH 49/73] arm64: tegra: Rename sdhci nodes to mmc
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 6 +++---
arch/arm64/boot/dts/nvidia/tegra132.dtsi | 8 ++++----
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 10 +++++-----
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 8 ++++----
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 8 ++++----
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 6 +++---
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 4 ++--
arch/arm64/boot/dts/nvidia/tegra210-smaug.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 ++++----
15 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
index d0d03cc30197..e6fe62e5c234 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
@@ -894,12 +894,12 @@ pmc@7000e400 {
};
/* WIFI/BT module */
- sdhci@700b0000 {
+ mmc@700b0000 {
status = "disabled";
};
/* external SD/MMC */
- sdhci@700b0400 {
+ mmc@700b0400 {
cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>;
wp-gpios = <&gpio TEGRA_GPIO(Q, 4) GPIO_ACTIVE_HIGH>;
@@ -909,7 +909,7 @@ sdhci@700b0400 {
};
/* EMMC 4.51 */
- sdhci@700b0600 {
+ mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
index 4fc34c5ec2dc..8558ad38b69c 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
@@ -691,7 +691,7 @@ utmi-2 {
};
};
- sdhci@700b0000 {
+ mmc@700b0000 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@@ -702,7 +702,7 @@ sdhci@700b0000 {
status = "disabled";
};
- sdhci@700b0200 {
+ mmc@700b0200 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -713,7 +713,7 @@ sdhci@700b0200 {
status = "disabled";
};
- sdhci@700b0400 {
+ mmc@700b0400 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -724,7 +724,7 @@ sdhci@700b0400 {
status = "disabled";
};
- sdhci@700b0600 {
+ mmc@700b0600 {
compatible = "nvidia,tegra124-sdhci";
reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
index f35b0ba29cb5..37ec15a14c77 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
@@ -103,7 +103,7 @@ exp2: gpio@77 {
};
/* SDMMC1 (SD/MMC) */
- sdhci@3400000 {
+ mmc@3400000 {
status = "okay";
vmmc-supply = <&vdd_sd>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
index 7b5b9bb332cf..d1ed7eee949a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
@@ -9,8 +9,8 @@ / {
aliases {
ethernet0 = "/ethernet@2490000";
- sdhci0 = "/sdhci@3460000";
- sdhci1 = "/sdhci@3400000";
+ mmc0 = "/mmc@3460000";
+ mmc1 = "/mmc@3400000";
serial0 = &uarta;
i2c0 = "/bpmp/i2c";
i2c1 = "/i2c@3160000";
@@ -135,7 +135,7 @@ i2c@31e0000 {
};
/* SDMMC1 (SD/MMC) */
- sdhci@3400000 {
+ mmc@3400000 {
cd-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 5) GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio TEGRA186_MAIN_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
@@ -143,12 +143,12 @@ sdhci@3400000 {
};
/* SDMMC3 (SDIO) */
- sdhci@3440000 {
+ mmc@3440000 {
status = "okay";
};
/* SDMMC4 (eMMC) */
- sdhci@3460000 {
+ mmc@3460000 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index e86b682f8645..927c646620cb 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -333,7 +333,7 @@ gen9_i2c: i2c@31e0000 {
status = "disabled";
};
- sdmmc1: sdhci@3400000 {
+ sdmmc1: mmc@3400000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03400000 0x0 0x10000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
@@ -362,7 +362,7 @@ sdmmc1: sdhci@3400000 {
status = "disabled";
};
- sdmmc2: sdhci@3420000 {
+ sdmmc2: mmc@3420000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03420000 0x0 0x10000>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
@@ -386,7 +386,7 @@ sdmmc2: sdhci@3420000 {
status = "disabled";
};
- sdmmc3: sdhci@3440000 {
+ sdmmc3: mmc@3440000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03440000 0x0 0x10000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
@@ -412,7 +412,7 @@ sdmmc3: sdhci@3440000 {
status = "disabled";
};
- sdmmc4: sdhci@3460000 {
+ sdmmc4: mmc@3460000 {
compatible = "nvidia,tegra186-sdhci";
reg = <0x0 0x03460000 0x0 0x10000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
index f3781e86f321..442e333ac13f 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
@@ -9,8 +9,8 @@ / {
aliases {
ethernet0 = "/cbb@0/ethernet@2490000";
- sdhci0 = "/cbb@0/sdhci@3460000";
- sdhci1 = "/cbb@0/sdhci@3400000";
+ mmc0 = "/cbb@0/mmc@3460000";
+ mmc1 = "/cbb@0/mmc@3400000";
serial0 = &tcu;
i2c0 = "/bpmp/i2c";
i2c1 = "/cbb@0/i2c@3160000";
@@ -58,12 +58,12 @@ serial@3110000 {
};
/* SDMMC1 (SD/MMC) */
- sdhci@3400000 {
+ mmc@3400000 {
cd-gpios = <&gpio TEGRA194_MAIN_GPIO(A, 0) GPIO_ACTIVE_LOW>;
};
/* SDMMC4 (eMMC) */
- sdhci@3460000 {
+ mmc@3460000 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
index 9a7d136b467f..0f9868b6fd6b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
@@ -28,7 +28,7 @@ ddc: i2c@31c0000 {
};
/* SDMMC1 (SD/MMC) */
- sdhci@3400000 {
+ mmc@3400000 {
status = "okay";
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index f056158a2634..d5246c75b782 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -456,7 +456,7 @@ pwm8: pwm@32f0000 {
#pwm-cells = <2>;
};
- sdmmc1: sdhci@3400000 {
+ sdmmc1: mmc@3400000 {
compatible = "nvidia,tegra194-sdhci";
reg = <0x03400000 0x10000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
@@ -481,7 +481,7 @@ sdmmc1: sdhci@3400000 {
status = "disabled";
};
- sdmmc3: sdhci@3440000 {
+ sdmmc3: mmc@3440000 {
compatible = "nvidia,tegra194-sdhci";
reg = <0x03440000 0x10000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
@@ -507,7 +507,7 @@ sdmmc3: sdhci@3440000 {
status = "disabled";
};
- sdmmc4: sdhci@3460000 {
+ sdmmc4: mmc@3460000 {
compatible = "nvidia,tegra194-sdhci";
reg = <0x03460000 0x10000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
index 751775357d51..251c6099482a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
@@ -293,7 +293,7 @@ pmc@7000e400 {
};
/* eMMC */
- sdhci@700b0600 {
+ mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
index 9ace2d9ea085..f9158dc943f9 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
@@ -34,7 +34,7 @@ pmc@7000e400 {
};
/* eMMC */
- sdhci@700b0600 {
+ mmc@700b0600 {
status = "okay";
bus-width = <8>;
non-removable;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
index f72afdf547ee..fb0db05647c4 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
@@ -1500,7 +1500,7 @@ usb3-1 {
};
/* MMC/SD */
- sdhci@700b0000 {
+ mmc@700b0000 {
status = "okay";
bus-width = <4>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index 615a8f5a6cf2..579d5b8a757d 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -1580,7 +1580,7 @@ pmc@7000e400 {
status = "okay";
};
- sdhci@700b0600 {
+ mmc@700b0600 {
bus-width = <8>;
non-removable;
status = "okay";
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index e6f4a36efa73..4a354f5293fc 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -535,7 +535,7 @@ usb3-0 {
};
};
- sdhci@700b0000 {
+ mmc@700b0000 {
status = "okay";
bus-width = <4>;
@@ -553,7 +553,7 @@ usb@700d0000 {
hvdd-usb-supply = <&vdd_1v8>;
};
- sdhci@700b0400 {
+ mmc@700b0400 {
status = "okay";
bus-width = <4>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
index 0b5b6ffbff43..d32053934f3c 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -1693,7 +1693,7 @@ usb3-0 {
};
};
- sdhci@700b0600 {
+ mmc@700b0600 {
bus-width = <8>;
non-removable;
status = "okay";
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 41ffa0531cd8..1f7dc518b394 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1175,7 +1175,7 @@ usb3-3 {
};
};
- sdhci@700b0000 {
+ mmc@700b0000 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
@@ -1203,7 +1203,7 @@ sdhci@700b0000 {
status = "disabled";
};
- sdhci@700b0200 {
+ mmc@700b0200 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
@@ -1220,7 +1220,7 @@ sdhci@700b0200 {
status = "disabled";
};
- sdhci@700b0400 {
+ mmc@700b0400 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
@@ -1243,7 +1243,7 @@ sdhci@700b0400 {
status = "disabled";
};
- sdhci@700b0600 {
+ mmc@700b0600 {
compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
--
2.24.1
^ permalink raw reply related
* [PATCH 48/73] arm64: tegra: Add unit-address to memory node
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The memory node requires a unit-address. For some boards the bootloader,
which is usually locked down, uses a hard-coded name for the memory node
without a unit-address, so we can't fix it on those boards.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts | 2 +-
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi | 2 +-
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 2 +-
6 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
index 9f3206c63900..d0d03cc30197 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
@@ -18,7 +18,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0x80000000>;
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
index de049d8d458a..7b5b9bb332cf 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
@@ -27,7 +27,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x2 0x00000000>;
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
index cc6ed45a2b48..751775357d51 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
@@ -17,7 +17,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x0>;
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
index d0dc03923723..9ace2d9ea085 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2530.dtsi
@@ -14,7 +14,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
index 88a4b9333d84..615a8f5a6cf2 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2894.dtsi
@@ -16,7 +16,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x0 0xc0000000>;
};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index e7ebf1afeb7a..e6f4a36efa73 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -22,7 +22,7 @@ chosen {
stdout-path = "serial0:115200n8";
};
- memory {
+ memory@80000000 {
device_type = "memory";
reg = <0x0 0x80000000 0x1 0x0>;
};
--
2.24.1
^ permalink raw reply related
* [PATCH 47/73] arm64: tegra: Fixup I/O and PLL supply names for HDMI/DP
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The I/O and PLL supplies used for HDMI/DP have alternative names. Use
the names that are given in the hardware documentation for consistency.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts | 4 ++--
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts | 4 ++--
arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 4 ++--
arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts | 4 ++--
4 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
index 1af7f9ffb7b6..f35b0ba29cb5 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p2771-0000.dts
@@ -286,8 +286,8 @@ sor@15540000 {
sor@15580000 {
status = "okay";
- avdd-io-supply = <&vdd_hdmi_1v05>;
- vdd-pll-supply = <&vdd_1v8_ap>;
+ avdd-io-hdmi-dp-supply = <&vdd_hdmi_1v05>;
+ vdd-hdmi-dp-pll-supply = <&vdd_1v8_ap>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&ddc>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
index e15d1eac05f5..9a7d136b467f 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts
@@ -145,8 +145,8 @@ sor@15b40000 {
sor@15b80000 {
status = "okay";
- avdd-io-supply = <&vdd_1v0>;
- vdd-pll-supply = <&vdd_1v8hs>;
+ avdd-io-hdmi-dp-supply = <&vdd_1v0>;
+ vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&ddc>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
index 5c3771e8d683..f72afdf547ee 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2597.dtsi
@@ -27,8 +27,8 @@ csi@838 {
sor@54580000 {
status = "okay";
- avdd-io-supply = <&avdd_1v05>;
- vdd-pll-supply = <&vdd_1v8>;
+ avdd-io-hdmi-dp-supply = <&avdd_1v05>;
+ vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
index ced01d15e457..e7ebf1afeb7a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p3450-0000.dts
@@ -74,8 +74,8 @@ sor@54540000 {
sor@54580000 {
status = "okay";
- avdd-io-supply = <&avdd_1v05>;
- vdd-pll-supply = <&vdd_1v8>;
+ avdd-io-hdmi-dp-supply = <&avdd_1v05>;
+ vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
hdmi-supply = <&vdd_hdmi>;
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
--
2.24.1
^ permalink raw reply related
* [PATCH 46/73] arm64: tegra: Remove parent clock from display controllers
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The display controller's parent clock depends on the output that's
consuming data from the display controller, so it needs to be specified
as the parent of the corresponding output. The device tree bindings do
specify this, so just correct the existing device trees that get this
wrong.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra132.dtsi | 10 ++++------
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 10 ++++------
2 files changed, 8 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
index 76e1a6451e83..4fc34c5ec2dc 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
@@ -104,9 +104,8 @@ dc@54200000 {
compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54200000 0x0 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_DISP1>,
- <&tegra_car TEGRA124_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA124_CLK_DISP1>;
+ clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
@@ -119,9 +118,8 @@ dc@54240000 {
compatible = "nvidia,tegra124-dc";
reg = <0x0 0x54240000 0x0 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA124_CLK_DISP2>,
- <&tegra_car TEGRA124_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA124_CLK_DISP2>;
+ clock-names = "dc";
resets = <&tegra_car 26>;
reset-names = "dc";
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 0586722df64b..41ffa0531cd8 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -187,9 +187,8 @@ dc@54200000 {
compatible = "nvidia,tegra210-dc";
reg = <0x0 0x54200000 0x0 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA210_CLK_DISP1>,
- <&tegra_car TEGRA210_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA210_CLK_DISP1>;
+ clock-names = "dc";
resets = <&tegra_car 27>;
reset-names = "dc";
@@ -202,9 +201,8 @@ dc@54240000 {
compatible = "nvidia,tegra210-dc";
reg = <0x0 0x54240000 0x0 0x00040000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&tegra_car TEGRA210_CLK_DISP2>,
- <&tegra_car TEGRA210_CLK_PLL_P>;
- clock-names = "dc", "parent";
+ clocks = <&tegra_car TEGRA210_CLK_DISP2>;
+ clock-names = "dc";
resets = <&tegra_car 26>;
reset-names = "dc";
--
2.24.1
^ permalink raw reply related
* [PATCH 45/73] arm64: tegra: Add interrupt-names for host1x
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Interrupt names are used to distinguish between the syncpoint and
general host1x interrupts. Make sure they are available in the DT so
that drivers can use them if necessary.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra132.dtsi | 1 +
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 1 +
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 1 +
4 files changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
index 6ebfe503489f..76e1a6451e83 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
@@ -89,6 +89,7 @@ host1x@50000000 {
reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+ interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA124_CLK_HOST1X>;
clock-names = "host1x";
resets = <&tegra_car 28>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index decf8de3bbe5..e86b682f8645 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -940,6 +940,7 @@ host1x@13e00000 {
reg-names = "hypervisor", "vm";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "syncpt", "host1x";
clocks = <&bpmp TEGRA186_CLK_HOST1X>;
clock-names = "host1x";
resets = <&bpmp TEGRA186_RESET_HOST1X>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 73aba724bf67..f056158a2634 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -1042,6 +1042,7 @@ host1x@13e00000 {
reg-names = "hypervisor", "vm";
interrupts = <GIC_SPI 265 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "syncpt", "host1x";
clocks = <&bpmp TEGRA194_CLK_HOST1X>;
clock-names = "host1x";
resets = <&bpmp TEGRA194_RESET_HOST1X>;
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index cbf0d30a2f8b..0586722df64b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -90,6 +90,7 @@ host1x@50000000 {
reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
+ interrupt-names = "syncpt", "host1x";
clocks = <&tegra_car TEGRA210_CLK_HOST1X>;
clock-names = "host1x";
resets = <&tegra_car 28>;
--
2.24.1
^ permalink raw reply related
* [PATCH 44/73] arm64: tegra: Add Tegra132 compatible string for host1x
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
While the host1x controller found on Tegra132 is the same as on Tegra124
it is good practice to also list a SoC-specific compatible string so any
SoC-specific quirks can be implemented in drivers if necessary.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra132.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra132.dtsi b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
index 11a1bb428595..6ebfe503489f 100644
--- a/arch/arm64/boot/dts/nvidia/tegra132.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra132.dtsi
@@ -83,7 +83,9 @@ pci@2,0 {
};
host1x@50000000 {
- compatible = "nvidia,tegra124-host1x", "simple-bus";
+ compatible = "nvidia,tegra132-host1x",
+ "nvidia,tegra124-host1x",
+ "simple-bus";
reg = <0x0 0x50000000 0x0 0x00034000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */
<GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */
--
2.24.1
^ permalink raw reply related
* [PATCH 43/73] arm64: tegra: Add interrupt for Tegra194 memory controller
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
This interrupt can be used for the operating system to be interrupted
when certain events occur.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index a50504a317d7..73aba724bf67 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -179,6 +179,7 @@ mc: memory-controller@2c00000 {
reg = <0x02c00000 0x100000>,
<0x02b80000 0x040000>,
<0x01700000 0x100000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
#interconnect-cells = <1>;
status = "disabled";
--
2.24.1
^ permalink raw reply related
* [PATCH 42/73] arm64: tegra: Describe interconnect paths on Tegra194
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
On Tegra194, all clients of the memory subsystem can generally address
40 bits of system memory. However, bit 39 has special meaning and will
cause the memory controller to reorder sectors for block-linear buffer
formats. This is primarily useful for graphics-related devices.
Use of bit 39 must be controlled on a case-by-case basis. Buffers that
are used with bit 39 set by one device may be used with bit 39 cleared
by other devices.
Care must be taken to allocate buffers at addresses that do not require
bit 39 to be set. This is normally not an issue for system memory since
there are no Tegra-based systems with enough RAM to exhaust the 39-bit
physical address space. However, when a device is behind an IOMMU, such
as the ARM SMMU on Tegra194, the IOMMUs input address space can cause
IOVA allocations to happen in this region. This is for example the case
when an operating system implements a top-down allocation policy for IO
virtual addresses.
To account for this, describe the path that memory accesses take through
the system. Memory clients will send requests to the memory controller,
which forwards bits [38:0] of the address either to the external memory
controller or the SMMU, depending on the stream ID of the access. A good
way to describe this is using the interconnects bindings, see:
Documentation/devicetree/bindings/interconnect/interconnect.txt
The standard "dma-mem" path is used to describe the path towards system
memory via the memory controller. A dma-ranges property in the memory
controller's device tree node limits the range of DMA addresses that the
memory clients can use to bits [38:0], ensuring that bit 39 is not used.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
Changes in v4:
- add additional entries for interconnect-names to match interconnects
- add EMC as destination for interconnect paths
Changes in v3:
- add missing interconnect properties for VIC
Changes in v2:
- use memory client IDs instead of stream IDs (Mikko Perttunen)
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 70 ++++++++++++++++++++++++
1 file changed, 70 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index ae438b2c4dd9..a50504a317d7 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -59,6 +59,9 @@ ethernet@2490000 {
clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
resets = <&bpmp TEGRA194_RESET_EQOS>;
reset-names = "eqos";
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_EQOSR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_EQOSW &emc>;
+ interconnect-names = "dma-mem", "write";
status = "disabled";
snps,write-requests = <1>;
@@ -176,6 +179,7 @@ mc: memory-controller@2c00000 {
reg = <0x02c00000 0x100000>,
<0x02b80000 0x040000>,
<0x01700000 0x100000>;
+ #interconnect-cells = <1>;
status = "disabled";
#address-cells = <2>;
@@ -209,6 +213,8 @@ emc: external-memory-controller@2c60000 {
clocks = <&bpmp TEGRA194_CLK_EMC>;
clock-names = "emc";
+ #interconnect-cells = <0>;
+
nvidia,bpmp = <&bpmp>;
};
};
@@ -457,6 +463,9 @@ sdmmc1: sdhci@3400000 {
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC1>;
reset-names = "sdhci";
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRA &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_SDMMCWA &emc>;
+ interconnect-names = "dma-mem", "write";
nvidia,pad-autocal-pull-up-offset-3v3-timeout =
<0x07>;
nvidia,pad-autocal-pull-down-offset-3v3-timeout =
@@ -479,6 +488,9 @@ sdmmc3: sdhci@3440000 {
clock-names = "sdhci";
resets = <&bpmp TEGRA194_RESET_SDMMC3>;
reset-names = "sdhci";
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_SDMMCW &emc>;
+ interconnect-names = "dma-mem", "write";
nvidia,pad-autocal-pull-up-offset-1v8 = <0x00>;
nvidia,pad-autocal-pull-down-offset-1v8 = <0x7a>;
nvidia,pad-autocal-pull-up-offset-3v3-timeout = <0x07>;
@@ -506,6 +518,9 @@ sdmmc4: sdhci@3460000 {
<&bpmp TEGRA194_CLK_PLLC4>;
resets = <&bpmp TEGRA194_RESET_SDMMC4>;
reset-names = "sdhci";
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_SDMMCRAB &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_SDMMCWAB &emc>;
+ interconnect-names = "dma-mem", "write";
nvidia,pad-autocal-pull-up-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-down-offset-hs400 = <0x00>;
nvidia,pad-autocal-pull-up-offset-1v8-timeout = <0x0a>;
@@ -534,6 +549,9 @@ hda@3510000 {
<&bpmp TEGRA194_RESET_HDA2HDMICODEC>;
reset-names = "hda", "hda2codec_2x", "hda2hdmi";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_HDAR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_HDAW &emc>;
+ interconnect-names = "dma-mem", "write";
status = "disabled";
};
@@ -1032,6 +1050,8 @@ host1x@13e00000 {
#size-cells = <1>;
ranges = <0x15000000 0x15000000 0x01000000>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_HOST1XDMAR &emc>;
+ interconnect-names = "dma-mem";
display-hub@15200000 {
compatible = "nvidia,tegra194-display", "simple-bus";
@@ -1067,6 +1087,9 @@ display@15200000 {
reset-names = "dc";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
+ interconnect-names = "dma-mem", "read-1";
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <0>;
@@ -1082,6 +1105,9 @@ display@15210000 {
reset-names = "dc";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISPB>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
+ interconnect-names = "dma-mem", "read-1";
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <1>;
@@ -1097,6 +1123,9 @@ display@15220000 {
reset-names = "dc";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISPC>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
+ interconnect-names = "dma-mem", "read-1";
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <2>;
@@ -1112,6 +1141,9 @@ display@15230000 {
reset-names = "dc";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISPC>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
+ interconnect-names = "dma-mem", "read-1";
nvidia,outputs = <&sor0 &sor1 &sor2 &sor3>;
nvidia,head = <3>;
@@ -1128,6 +1160,9 @@ vic@15340000 {
reset-names = "vic";
power-domains = <&bpmp TEGRA194_POWER_DOMAIN_VIC>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_VICSRD &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_VICSWR &emc>;
+ interconnect-names = "dma-mem", "write";
};
dpaux0: dpaux@155c0000 {
@@ -1404,9 +1439,14 @@ pcie@14100000 {
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
+
ranges = <0x81000000 0x0 0x30100000 0x0 0x30100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x12 0x00000000 0x12 0x00000000 0x0 0x30000000 /* prefetchable memory (768MB) */
0x82000000 0x0 0x40000000 0x12 0x30000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
+
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE1R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_PCIE1W &emc>;
+ interconnect-names = "read", "write";
};
pcie@14120000 {
@@ -1449,9 +1489,14 @@ pcie@14120000 {
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
+
ranges = <0x81000000 0x0 0x32100000 0x0 0x32100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x12 0x40000000 0x12 0x40000000 0x0 0x30000000 /* prefetchable memory (768MB) */
0x82000000 0x0 0x40000000 0x12 0x70000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
+
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE2AR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_PCIE2AW &emc>;
+ interconnect-names = "read", "write";
};
pcie@14140000 {
@@ -1494,9 +1539,14 @@ pcie@14140000 {
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
+
ranges = <0x81000000 0x0 0x34100000 0x0 0x34100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x12 0x80000000 0x12 0x80000000 0x0 0x30000000 /* prefetchable memory (768MB) */
0x82000000 0x0 0x40000000 0x12 0xb0000000 0x0 0x10000000>; /* non-prefetchable memory (256MB) */
+
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE3R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_PCIE3W &emc>;
+ interconnect-names = "read", "write";
};
pcie@14160000 {
@@ -1539,9 +1589,14 @@ pcie@14160000 {
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
+
ranges = <0x81000000 0x0 0x36100000 0x0 0x36100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x14 0x00000000 0x14 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
0x82000000 0x0 0x40000000 0x17 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
+
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>;
+ interconnect-names = "read", "write";
};
pcie@14180000 {
@@ -1584,9 +1639,14 @@ pcie@14180000 {
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
+
ranges = <0x81000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x18 0x00000000 0x18 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
0x82000000 0x0 0x40000000 0x1b 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
+
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>;
+ interconnect-names = "read", "write";
};
pcie@141a0000 {
@@ -1633,9 +1693,14 @@ pcie@141a0000 {
nvidia,aspm-l0s-entrance-latency-us = <3>;
bus-range = <0x0 0xff>;
+
ranges = <0x81000000 0x0 0x3a100000 0x0 0x3a100000 0x0 0x00100000 /* downstream I/O (1MB) */
0xc3000000 0x1c 0x00000000 0x1c 0x00000000 0x3 0x40000000 /* prefetchable memory (13GB) */
0x82000000 0x0 0x40000000 0x1f 0x40000000 0x0 0xc0000000>; /* non-prefetchable memory (3GB) */
+
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>;
+ interconnect-names = "read", "write";
};
pcie_ep@14160000 {
@@ -1767,6 +1832,11 @@ bpmp: bpmp {
#clock-cells = <1>;
#reset-cells = <1>;
#power-domain-cells = <1>;
+ interconnects = <&mc TEGRA194_MEMORY_CLIENT_BPMPR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_BPMPW &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_BPMPDMAR &emc>,
+ <&mc TEGRA194_MEMORY_CLIENT_BPMPDMAW &emc>;
+ interconnect-names = "read", "write", "dma-mem", "dma-write";
bpmp_i2c: i2c {
compatible = "nvidia,tegra186-bpmp-i2c";
--
2.24.1
^ permalink raw reply related
* [PATCH 41/73] arm64: tegra: Describe interconnect paths on Tegra186
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The interface used by clients of the memory controller can be configured
in a number of different ways. Describe this path using the interconnect
bindings to enable the configuration of these parameters.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 54 ++++++++++++++++++++++++
1 file changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 50b56168fc97..decf8de3bbe5 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -60,6 +60,9 @@ ethernet@2490000 {
clock-names = "master_bus", "slave_bus", "rx", "tx", "ptp_ref";
resets = <&bpmp TEGRA186_RESET_EQOS>;
reset-names = "eqos";
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_EQOSR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_EQOSW &emc>;
+ interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_EQOS>;
status = "disabled";
@@ -145,6 +148,7 @@ memory-controller@2c00000 {
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
+ #interconnect-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
@@ -163,6 +167,8 @@ emc: external-memory-controller@2c60000 {
clocks = <&bpmp TEGRA186_CLK_EMC>;
clock-names = "emc";
+ #interconnect-cells = <0>;
+
nvidia,bpmp = <&bpmp>;
};
};
@@ -335,6 +341,9 @@ sdmmc1: sdhci@3400000 {
clock-names = "sdhci";
resets = <&bpmp TEGRA186_RESET_SDMMC1>;
reset-names = "sdhci";
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRA &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_SDMMCWA &emc>;
+ interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SDMMC1>;
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
pinctrl-0 = <&sdmmc1_3v3>;
@@ -361,6 +370,9 @@ sdmmc2: sdhci@3420000 {
clock-names = "sdhci";
resets = <&bpmp TEGRA186_RESET_SDMMC2>;
reset-names = "sdhci";
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAA &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_SDMMCWAA &emc>;
+ interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SDMMC2>;
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
pinctrl-0 = <&sdmmc2_3v3>;
@@ -382,6 +394,9 @@ sdmmc3: sdhci@3440000 {
clock-names = "sdhci";
resets = <&bpmp TEGRA186_RESET_SDMMC3>;
reset-names = "sdhci";
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_SDMMCW &emc>;
+ interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SDMMC3>;
pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
pinctrl-0 = <&sdmmc3_3v3>;
@@ -408,6 +423,9 @@ sdmmc4: sdhci@3460000 {
assigned-clock-parents = <&bpmp TEGRA186_CLK_PLLC4_VCO>;
resets = <&bpmp TEGRA186_RESET_SDMMC4>;
reset-names = "sdhci";
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_SDMMCRAB &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_SDMMCWAB &emc>;
+ interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_SDMMC4>;
nvidia,pad-autocal-pull-up-offset-hs400 = <0x05>;
nvidia,pad-autocal-pull-down-offset-hs400 = <0x05>;
@@ -436,6 +454,9 @@ hda@3510000 {
<&bpmp TEGRA186_RESET_HDA2CODEC_2X>;
reset-names = "hda", "hda2hdmi", "hda2codec_2x";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_HDAR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_HDAW &emc>;
+ interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_HDA>;
status = "disabled";
};
@@ -564,6 +585,9 @@ usb@3530000 {
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_XUSBC>,
<&bpmp TEGRA186_POWER_DOMAIN_XUSBA>;
power-domain-names = "xusb_host", "xusb_ss";
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_XUSB_HOSTW &emc>;
+ interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_XUSB_HOST>;
#address-cells = <1>;
#size-cells = <0>;
@@ -786,6 +810,10 @@ pcie@10003000 {
<&bpmp TEGRA186_RESET_PCIEXCLK>;
reset-names = "afi", "pex", "pcie_x";
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_AFIR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_AFIW &emc>;
+ interconnect-names = "dma-mem", "write";
+
iommus = <&smmu TEGRA186_SID_AFI>;
iommu-map = <0x0 &smmu TEGRA186_SID_AFI 0x1000>;
iommu-map-mask = <0x0>;
@@ -921,6 +949,10 @@ host1x@13e00000 {
#size-cells = <1>;
ranges = <0x15000000 0x0 0x15000000 0x01000000>;
+
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_HOST1XDMAR &emc>;
+ interconnect-names = "dma-mem";
+
iommus = <&smmu TEGRA186_SID_HOST1X>;
dpaux1: dpaux@15040000 {
@@ -992,6 +1024,9 @@ display@15200000 {
reset-names = "dc";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
+ interconnect-names = "dma-mem", "read-1";
iommus = <&smmu TEGRA186_SID_NVDISPLAY>;
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
@@ -1008,6 +1043,9 @@ display@15210000 {
reset-names = "dc";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISPB>;
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
+ interconnect-names = "dma-mem", "read-1";
iommus = <&smmu TEGRA186_SID_NVDISPLAY>;
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
@@ -1024,6 +1062,9 @@ display@15220000 {
reset-names = "dc";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISPC>;
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_NVDISPLAYR1 &emc>;
+ interconnect-names = "dma-mem", "read-1";
iommus = <&smmu TEGRA186_SID_NVDISPLAY>;
nvidia,outputs = <&sor0 &sor1>;
@@ -1056,6 +1097,9 @@ vic@15340000 {
reset-names = "vic";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_VIC>;
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_VICSRD &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_VICSWR &emc>;
+ interconnect-names = "dma-mem", "write";
iommus = <&smmu TEGRA186_SID_VIC>;
};
@@ -1211,6 +1255,11 @@ gpu@17000000 {
status = "disabled";
power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>;
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_GPUSRD &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_GPUSWR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_GPUSRD2 &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_GPUSWR2 &emc>;
+ interconnect-names = "dma-mem", "write-0", "read-1", "write-1";
};
sysram@30000000 {
@@ -1237,6 +1286,11 @@ cpu_bpmp_rx: shmem@4f000 {
bpmp: bpmp {
compatible = "nvidia,tegra186-bpmp";
+ interconnects = <&mc TEGRA186_MEMORY_CLIENT_BPMPR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_BPMPW &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_BPMPDMAR &emc>,
+ <&mc TEGRA186_MEMORY_CLIENT_BPMPDMAW &emc>;
+ interconnect-names = "read", "write", "dma-mem", "dma-write";
iommus = <&smmu TEGRA186_SID_BPMP>;
mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB
TEGRA_HSP_DB_MASTER_BPMP>;
--
2.24.1
^ permalink raw reply related
* [PATCH 40/73] arm64: tegra: Remove extra compatible for Tegra210 SDHCI
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The SDHCI on Tegra210 is in fact not compatible with the one found on
Tegra124. Remove the extra compatible string to reflect that.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra210.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
index 08655081f72d..cbf0d30a2f8b 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi
@@ -1177,7 +1177,7 @@ usb3-3 {
};
sdhci@700b0000 {
- compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+ compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0000 0x0 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
@@ -1205,7 +1205,7 @@ sdhci@700b0000 {
};
sdhci@700b0200 {
- compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+ compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0200 0x0 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SDMMC2>;
@@ -1222,7 +1222,7 @@ sdhci@700b0200 {
};
sdhci@700b0400 {
- compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+ compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0400 0x0 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SDMMC3>;
@@ -1245,7 +1245,7 @@ sdhci@700b0400 {
};
sdhci@700b0600 {
- compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
+ compatible = "nvidia,tegra210-sdhci";
reg = <0x0 0x700b0600 0x0 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA210_CLK_SDMMC4>;
--
2.24.1
^ permalink raw reply related
* [PATCH 39/73] arm64: tegra: Remove extra compatible for Tegra194 SDHCI
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The SDHCI on Tegra194 is in fact not compatible with the one found on
Tegra186. Remove the extra compatible string to reflect that.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra194.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
index 4bc187a4eacd..ae438b2c4dd9 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi
@@ -450,7 +450,7 @@ pwm8: pwm@32f0000 {
};
sdmmc1: sdhci@3400000 {
- compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
+ compatible = "nvidia,tegra194-sdhci";
reg = <0x03400000 0x10000>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_SDMMC1>;
@@ -472,7 +472,7 @@ sdmmc1: sdhci@3400000 {
};
sdmmc3: sdhci@3440000 {
- compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
+ compatible = "nvidia,tegra194-sdhci";
reg = <0x03440000 0x10000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_SDMMC3>;
@@ -495,7 +495,7 @@ sdmmc3: sdhci@3440000 {
};
sdmmc4: sdhci@3460000 {
- compatible = "nvidia,tegra194-sdhci", "nvidia,tegra186-sdhci";
+ compatible = "nvidia,tegra194-sdhci";
reg = <0x03460000 0x10000>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&bpmp TEGRA194_CLK_SDMMC4>;
--
2.24.1
^ permalink raw reply related
* [PATCH 38/73] arm64: tegra: Use standard notation for interrupts
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
It is customary to use angle brackets around each tuple in the
interrupts property.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 373f575b8678..50b56168fc97 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -1199,8 +1199,8 @@ gpu@17000000 {
compatible = "nvidia,gp10b";
reg = <0x0 0x17000000 0x0 0x1000000>,
<0x0 0x18000000 0x0 0x1000000>;
- interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH
- GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "stall", "nonstall";
clocks = <&bpmp TEGRA186_CLK_GPCCLK>,
--
2.24.1
^ permalink raw reply related
* [PATCH 37/73] arm64: tegra: Fix #address-cells/#size-cells for SRAM on Tegra186
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The standard mmio-sram bindings require the #address- and #size-cells
properties to be 1.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 10 +++++-----
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 58100fb9cd8b..373f575b8678 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -1216,20 +1216,20 @@ gpu@17000000 {
sysram@30000000 {
compatible = "nvidia,tegra186-sysram", "mmio-sram";
reg = <0x0 0x30000000 0x0 0x50000>;
- #address-cells = <2>;
- #size-cells = <2>;
- ranges = <0 0x0 0x0 0x30000000 0x0 0x50000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x0 0x30000000 0x50000>;
cpu_bpmp_tx: shmem@4e000 {
compatible = "nvidia,tegra186-bpmp-shmem";
- reg = <0x0 0x4e000 0x0 0x1000>;
+ reg = <0x4e000 0x1000>;
label = "cpu-bpmp-tx";
pool;
};
cpu_bpmp_rx: shmem@4f000 {
compatible = "nvidia,tegra186-bpmp-shmem";
- reg = <0x0 0x4f000 0x0 0x1000>;
+ reg = <0x4f000 0x1000>;
label = "cpu-bpmp-rx";
pool;
};
--
2.24.1
^ permalink raw reply related
* [PATCH 36/73] arm64: tegra: Add missing #phy-cells property on Jetson AGX Xavier
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
PHYs need to have a #phy-cells property that defines how many cells are
required in their specifier. The standard Ethernet PHY doesn't require a
specifier, so set its #phy-cells to 0.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
index b96eb4e14556..f3781e86f321 100644
--- a/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
@@ -44,6 +44,7 @@ phy: phy@0 {
reg = <0x0>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA194_MAIN_GPIO(G, 4) IRQ_TYPE_LEVEL_LOW>;
+ #phy-cells = <0>;
};
};
};
--
2.24.1
^ permalink raw reply related
* [PATCH 35/73] arm64: tegra: Add missing #phy-cells property on Jetson TX2
From: Thierry Reding @ 2020-06-16 13:52 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
PHYs need to have a #phy-cells property that defines how many cells are
required in their specifier. The standard Ethernet PHY doesn't require
a specifier, so set its #phy-cells to 0.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
index 2fcaa2e64370..de049d8d458a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186-p3310.dtsi
@@ -50,6 +50,8 @@ phy: phy@0 {
interrupt-parent = <&gpio>;
interrupts = <TEGRA186_MAIN_GPIO(M, 5)
IRQ_TYPE_LEVEL_LOW>;
+
+ #phy-cells = <0>;
};
};
};
--
2.24.1
^ permalink raw reply related
* [PATCH 34/73] ARM: tegra: The Tegra30 SDHCI is not backwards-compatible
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The SDHCI on Tegra30 is in fact not backwards-compatible with the
instantiation found on earlier SoCs. Drop the misleading compatible
string.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra30.dtsi | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index bedab43016c7..3c7ee0b871c0 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -854,7 +854,7 @@ tegra_i2s4: i2s@70080700 {
};
mmc@78000000 {
- compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+ compatible = "nvidia,tegra30-sdhci";
reg = <0x78000000 0x200>;
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC1>;
@@ -865,7 +865,7 @@ mmc@78000000 {
};
mmc@78000200 {
- compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+ compatible = "nvidia,tegra30-sdhci";
reg = <0x78000200 0x200>;
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC2>;
@@ -876,7 +876,7 @@ mmc@78000200 {
};
mmc@78000400 {
- compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+ compatible = "nvidia,tegra30-sdhci";
reg = <0x78000400 0x200>;
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC3>;
@@ -887,7 +887,7 @@ mmc@78000400 {
};
mmc@78000600 {
- compatible = "nvidia,tegra30-sdhci", "nvidia,tegra20-sdhci";
+ compatible = "nvidia,tegra30-sdhci";
reg = <0x78000600 0x200>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_SDMMC4>;
--
2.24.1
^ permalink raw reply related
* [PATCH 33/73] ARM: tegra: The Tegra30 DC is not backwards-compatible
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The display controller on Tegra30 is in fact not backwards-compatible
with the instantiation found on earlier SoCs. Drop the misleading
compatible string.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra30.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index d80f9d3d2d18..bedab43016c7 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -197,7 +197,7 @@ gr3d@54180000 {
};
dc@54200000 {
- compatible = "nvidia,tegra30-dc", "nvidia,tegra20-dc";
+ compatible = "nvidia,tegra30-dc";
reg = <0x54200000 0x00040000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&tegra_car TEGRA30_CLK_DISP1>;
--
2.24.1
^ permalink raw reply related
* [PATCH 32/73] ARM: tegra: Remove spurious comma from node name
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
Marcel Ziswiler, Philippe Schenker
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
This was probably left there by mistake or perhaps was a typo in the
first place. Remove it.
Cc: Marcel Ziswiler <marcel.ziswiler-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Cc: Philippe Schenker <philippe.schenker-2KBjVHiyJgBBDgjK7y7TUQ@public.gmane.org>
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra30-colibri.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/tegra30-colibri.dtsi b/arch/arm/boot/dts/tegra30-colibri.dtsi
index c209020e13fd..811c06599bfa 100644
--- a/arch/arm/boot/dts/tegra30-colibri.dtsi
+++ b/arch/arm/boot/dts/tegra30-colibri.dtsi
@@ -527,7 +527,7 @@ spi2-cs1-n-pw2 {
};
/* Colibri USBH_OC */
- spi2-cs2-n-pw3, {
+ spi2-cs2-n-pw3 {
nvidia,pins = "spi2_cs2_n_pw3";
nvidia,function = "spi2_alt";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
--
2.24.1
^ permalink raw reply related
* [PATCH 31/73] ARM: tegra: Add parent clock to DSI output
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
The DSI output needs to specify a parent clock that will be used to
drive both the output and the display controller.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra20.dtsi | 4 +++-
arch/arm/boot/dts/tegra30.dtsi | 4 +++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index 2568236284ad..19d5d4b8692b 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -154,7 +154,9 @@ tvo@542c0000 {
dsi@54300000 {
compatible = "nvidia,tegra20-dsi";
reg = <0x54300000 0x00040000>;
- clocks = <&tegra_car TEGRA20_CLK_DSI>;
+ clocks = <&tegra_car TEGRA20_CLK_DSI>,
+ <&tegra_car TEGRA20_CLK_PLL_D_OUT0>;
+ clock-names = "dsi", "parent";
resets = <&tegra_car 48>;
reset-names = "dsi";
status = "disabled";
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 690e1628860f..d80f9d3d2d18 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -255,7 +255,9 @@ tvo@542c0000 {
dsi@54300000 {
compatible = "nvidia,tegra30-dsi";
reg = <0x54300000 0x00040000>;
- clocks = <&tegra_car TEGRA30_CLK_DSIA>;
+ clocks = <&tegra_car TEGRA30_CLK_DSIA>,
+ <&tegra_car TEGRA30_CLK_PLL_D_OUT0>;
+ clock-names = "dsi", "parent";
resets = <&tegra_car 48>;
reset-names = "dsi";
status = "disabled";
--
2.24.1
^ permalink raw reply related
* [PATCH 30/73] ARM: tegra: Use standard names for SRAM nodes
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
SRAM nodes should be named sram@<unit-address> to match the bindings.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra20.dtsi | 4 ++--
arch/arm/boot/dts/tegra30.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index ccd2995aef83..2568236284ad 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -17,14 +17,14 @@ memory@0 {
reg = <0 0>;
};
- iram@40000000 {
+ sram@40000000 {
compatible = "mmio-sram";
reg = <0x40000000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x40000000 0x40000>;
- vde_pool: vde@400 {
+ vde_pool: sram@400 {
reg = <0x400 0x3fc00>;
pool;
};
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index f838e4775cf6..690e1628860f 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -97,14 +97,14 @@ pci@3,0 {
};
};
- iram@40000000 {
+ sram@40000000 {
compatible = "mmio-sram";
reg = <0x40000000 0x40000>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x40000000 0x40000>;
- vde_pool: vde@400 {
+ vde_pool: sram@400 {
reg = <0x400 0x3fc00>;
pool;
};
--
2.24.1
^ permalink raw reply related
* [PATCH 29/73] ARM: tegra: seaboard: Use standard battery bindings
From: Thierry Reding @ 2020-06-16 13:51 UTC (permalink / raw)
To: Thierry Reding
Cc: Jon Hunter, linux-tegra-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r
In-Reply-To: <20200616135238.3001888-1-thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
From: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
Seaboard uses a non-existing, possibly obsoleted, binding for the
battery. Move to the standard binding which seems to be a super-
set of the odl binding.
Signed-off-by: Thierry Reding <treding-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org>
---
arch/arm/boot/dts/tegra20-seaboard.dts | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts
index f1baf16c5010..c24d4a37613e 100644
--- a/arch/arm/boot/dts/tegra20-seaboard.dts
+++ b/arch/arm/boot/dts/tegra20-seaboard.dts
@@ -394,10 +394,10 @@ lvds_ddc: i2c@1 {
#size-cells = <0>;
smart-battery@b {
- compatible = "ti,bq20z75", "smart-battery-1.1";
+ compatible = "ti,bq20z75", "sbs,sbs-battery";
reg = <0xb>;
- ti,i2c-retry-count = <2>;
- ti,poll-retry-count = <10>;
+ sbs,i2c-retry-count = <2>;
+ sbs,poll-retry-count = <10>;
};
};
};
--
2.24.1
^ permalink raw reply related
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