* [PATCH v4 0/2] Add support for new IMX8MP based board
@ 2024-09-24 10:39 Michal Vokáč
2024-09-24 10:39 ` [PATCH v4 1/2] dt-bindings: arm: Add i.MX8MP IOTA2 Lumpy board Michal Vokáč
` (2 more replies)
0 siblings, 3 replies; 10+ messages in thread
From: Michal Vokáč @ 2024-09-24 10:39 UTC (permalink / raw)
To: Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Greg Kroah-Hartman, Shawn Guo, Petr Benes
Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Herburger,
Hiago De Franco, Hugo Villeneuve, Joao Paulo Goncalves,
Michael Walle, Alexander Stein, Mathieu Othacehe, devicetree,
linux-kernel, linux-usb, imx, linux-arm-kernel,
Michal Vokáč
Hi,
this series adds support for a new member in our IOTA platform.
The board is based on the i.MX8MP SoC. It adds support for most
of the board functionality except USB Type-C port and some other
minor things.
This series originally included the dt-binding for that Type-C
port controller but I finally removed it based on a good comment
from Krzysztof. I will post the Type-C binding including the driver
in a followup series.
Michal
Michal Vokáč (2):
dt-bindings: arm: Add i.MX8MP IOTA2 Lumpy board
arm64: dts: imx: Add imx8mp-iota2-lumpy board
.../devicetree/bindings/arm/fsl.yaml | 1 +
arch/arm64/boot/dts/freescale/Makefile | 1 +
.../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++
3 files changed, 425 insertions(+)
create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts
--
2.43.0
^ permalink raw reply [flat|nested] 10+ messages in thread* [PATCH v4 1/2] dt-bindings: arm: Add i.MX8MP IOTA2 Lumpy board 2024-09-24 10:39 [PATCH v4 0/2] Add support for new IMX8MP based board Michal Vokáč @ 2024-09-24 10:39 ` Michal Vokáč 2024-09-24 10:39 ` [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board Michal Vokáč 2024-09-25 1:56 ` [PATCH v4 0/2] Add support for new IMX8MP based board Rob Herring (Arm) 2 siblings, 0 replies; 10+ messages in thread From: Michal Vokáč @ 2024-09-24 10:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Greg Kroah-Hartman, Shawn Guo, Petr Benes Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Herburger, Hiago De Franco, Hugo Villeneuve, Joao Paulo Goncalves, Michael Walle, Alexander Stein, Mathieu Othacehe, devicetree, linux-kernel, linux-usb, imx, linux-arm-kernel, Michal Vokáč, Krzysztof Kozlowski Add new board from the Y Soft IOTA family. This one is based on the i.MX8MP SoC. It is basically a stripped-down clone of the EVK board with some minor additions. Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> --- v4: - none v3: - none v2: - Added tag from Krzysztof. Documentation/devicetree/bindings/arm/fsl.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index b39a7e031177..a3389f2d06e6 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -1088,6 +1088,7 @@ properties: - toradex,verdin-imx8mp # Verdin iMX8M Plus Modules - toradex,verdin-imx8mp-nonwifi # Verdin iMX8M Plus Modules without Wi-Fi / BT - toradex,verdin-imx8mp-wifi # Verdin iMX8M Plus Wi-Fi / BT Modules + - ysoft,imx8mp-iota2-lumpy # Y Soft i.MX8MP IOTA2 Lumpy Board - const: fsl,imx8mp - description: Avnet (MSC Branded) Boards with SM2S i.MX8M Plus Modules -- 2.43.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board 2024-09-24 10:39 [PATCH v4 0/2] Add support for new IMX8MP based board Michal Vokáč 2024-09-24 10:39 ` [PATCH v4 1/2] dt-bindings: arm: Add i.MX8MP IOTA2 Lumpy board Michal Vokáč @ 2024-09-24 10:39 ` Michal Vokáč 2024-09-24 11:10 ` Marco Felsch 2024-09-24 15:15 ` Frank Li 2024-09-25 1:56 ` [PATCH v4 0/2] Add support for new IMX8MP based board Rob Herring (Arm) 2 siblings, 2 replies; 10+ messages in thread From: Michal Vokáč @ 2024-09-24 10:39 UTC (permalink / raw) To: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Greg Kroah-Hartman, Shawn Guo, Petr Benes Cc: Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Herburger, Hiago De Franco, Hugo Villeneuve, Joao Paulo Goncalves, Michael Walle, Alexander Stein, Mathieu Othacehe, devicetree, linux-kernel, linux-usb, imx, linux-arm-kernel, Michal Vokáč The IOTA2 Lumpy board is based on the i.MX8MPlus EVK. Basic features are: - 4GB LPDDR4 - 64GB eMMC - 2x 1GB Ethernet - USB 3.0 Type-C dual role port, without power delivery - USB 3.0 Type-A host port - RGB LED - PWM driven - speaker - PWM driven - RTC with super capacitor backup Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> --- v4: - Moved the iomuxc node to the end of the file. - Moved the bus-width and non-removeable properties below the pinctrl-* properties in &usdhc3 node. - Moved the fsl,ext-reset-output below the pinctrl-* properties in &wdog1 node. v3: - Dropped pinctrl-names property from &usb_dwc3_1 node. v2: - Dropped unused property from pwm4 node. - Sorted all nodes and properties using dt-format tool from Frank. arch/arm64/boot/dts/freescale/Makefile | 1 + .../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++ 2 files changed, 424 insertions(+) create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile index 9d3df8b218a2..aa26a50b7bb4 100644 --- a/arch/arm64/boot/dts/freescale/Makefile +++ b/arch/arm64/boot/dts/freescale/Makefile @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb +dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb diff --git a/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts new file mode 100644 index 000000000000..9eb58e818dc7 --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts @@ -0,0 +1,423 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright 2023 Y Soft + */ + +/dts-v1/; + +#include "imx8mp.dtsi" + +/ { + compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp"; + model = "Y Soft i.MX8MPlus IOTA2 Lumpy board"; + + beeper { + compatible = "pwm-beeper"; + pwms = <&pwm4 0 500000 0>; + }; + + chosen { + stdout-path = &uart2; + }; + + gpio_keys: gpio-keys { + compatible = "gpio-keys"; + pinctrl-0 = <&pinctrl_gpio_keys>; + pinctrl-names = "default"; + + button-reset { + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; + label = "Factory RESET"; + linux,code = <BTN_0>; + }; + }; + + reg_usb_host: regulator-usb-host { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; + pinctrl-0 = <&pinctrl_usb_host_vbus>; + pinctrl-names = "default"; + regulator-max-microvolt = <5000000>; + regulator-min-microvolt = <5000000>; + regulator-name = "usb-host"; + }; + + memory@40000000 { + reg = <0x0 0x40000000 0 0x80000000>, + <0x1 0x00000000 0 0x80000000>; + device_type = "memory"; + }; +}; + +&A53_0 { + cpu-supply = <®_arm>; +}; + +&A53_1 { + cpu-supply = <®_arm>; +}; + +&A53_2 { + cpu-supply = <®_arm>; +}; + +&A53_3 { + cpu-supply = <®_arm>; +}; + +&eqos { + phy-handle = <ðphy0>; + phy-mode = "rgmii-id"; + pinctrl-0 = <&pinctrl_eqos>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + ethphy0: ethernet-phy@0 { + reg = <0>; + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio3>; + micrel,led-mode = <0>; + pinctrl-0 = <&pinctrl_ethphy0>; + pinctrl-names = "default"; + reset-assert-us = <1000>; + reset-deassert-us = <1000>; + reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&fec { + fsl,magic-packet; + phy-handle = <ðphy1>; + phy-mode = "rgmii-id"; + pinctrl-0 = <&pinctrl_fec>; + pinctrl-names = "default"; + status = "okay"; + + mdio { + #address-cells = <1>; + #size-cells = <0>; + + ethphy1: ethernet-phy@0 { + reg = <0>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio3>; + micrel,led-mode = <0>; + pinctrl-0 = <&pinctrl_ethphy1>; + pinctrl-names = "default"; + reset-assert-us = <1000>; + reset-deassert-us = <1000>; + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&i2c1 { + clock-frequency = <400000>; + pinctrl-0 = <&pinctrl_i2c1>; + pinctrl-names = "default"; + status = "okay"; + + pmic@25 { + compatible = "nxp,pca9450c"; + reg = <0x25>; + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; + interrupt-parent = <&gpio1>; + pinctrl-0 = <&pinctrl_pmic>; + pinctrl-names = "default"; + + regulators { + BUCK1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1000000>; + regulator-min-microvolt = <720000>; + regulator-name = "BUCK1"; + regulator-ramp-delay = <3125>; + }; + + reg_arm: BUCK2 { + nxp,dvs-run-voltage = <950000>; + nxp,dvs-standby-voltage = <850000>; + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1025000>; + regulator-min-microvolt = <720000>; + regulator-name = "BUCK2"; + regulator-ramp-delay = <3125>; + }; + + BUCK4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3600000>; + regulator-min-microvolt = <3000000>; + regulator-name = "BUCK4"; + }; + + BUCK5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1950000>; + regulator-min-microvolt = <1650000>; + regulator-name = "BUCK5"; + }; + + BUCK6 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1155000>; + regulator-min-microvolt = <1045000>; + regulator-name = "BUCK6"; + }; + + LDO1 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1950000>; + regulator-min-microvolt = <1650000>; + regulator-name = "LDO1"; + }; + + LDO3 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <1890000>; + regulator-min-microvolt = <1710000>; + regulator-name = "LDO3"; + }; + + LDO4 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <950000>; + regulator-min-microvolt = <850000>; + regulator-name = "LDO4"; + }; + + LDO5 { + regulator-always-on; + regulator-boot-on; + regulator-max-microvolt = <3300000>; + regulator-min-microvolt = <1800000>; + regulator-name = "LDO5"; + }; + }; + }; +}; + +&i2c2 { + clock-frequency = <400000>; + pinctrl-0 = <&pinctrl_i2c2>; + pinctrl-names = "default"; + status = "okay"; + + rtc: rtc@68 { + compatible = "dallas,ds1341"; + reg = <0x68>; + }; +}; + +&pwm4 { + pinctrl-0 = <&pinctrl_pwm4>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&pinctrl_uart2>; + pinctrl-names = "default"; + status = "okay"; +}; + +&usb3_1 { + status = "okay"; +}; + +&usb3_phy1 { + vbus-supply = <®_usb_host>; + status = "okay"; +}; + +&usb_dwc3_1 { + dr_mode = "host"; + status = "okay"; +}; + +&usdhc3 { + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; + assigned-clock-rates = <400000000>; + pinctrl-0 = <&pinctrl_usdhc3>; + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; + bus-width = <8>; + non-removable; + status = "okay"; +}; + +&wdog1 { + pinctrl-0 = <&pinctrl_wdog>; + pinctrl-names = "default"; + fsl,ext-reset-output; + status = "okay"; +}; + +&iomuxc { + pinctrl_eqos: eqosgrp { + fsl,pins = < + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2 + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2 + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 + >; + }; + + pinctrl_ethphy0: ethphy0grp { + fsl,pins = < + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x10 + MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22 0x10 + >; + }; + + pinctrl_ethphy1: ethphy1grp { + fsl,pins = < + MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x10 + MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x10 + >; + }; + + pinctrl_fec: fecgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 + >; + }; + + pinctrl_gpio_keys: gpiokeysgrp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x80 + >; + }; + + pinctrl_i2c1: i2c1grp { + fsl,pins = < + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2 + >; + }; + + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 + >; + }; + + pinctrl_pmic: pmicgrp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0 + >; + }; + + pinctrl_pwm4: pwm4grp { + fsl,pins = < + MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x102 + >; + }; + + pinctrl_uart2: uart2grp { + fsl,pins = < + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x0 + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x0 + >; + }; + + pinctrl_usb_host_vbus: usb1grp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR 0x0 + >; + }; + + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { + fsl,pins = < + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 + >; + }; + + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { + fsl,pins = < + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6 + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6 + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6 + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6 + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 + >; + }; + + pinctrl_usdhc3: usdhc3grp { + fsl,pins = < + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 + >; + }; + + pinctrl_wdog: wdoggrp { + fsl,pins = < + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166 + >; + }; +}; -- 2.43.0 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board 2024-09-24 10:39 ` [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board Michal Vokáč @ 2024-09-24 11:10 ` Marco Felsch 2024-09-24 15:15 ` Frank Li 1 sibling, 0 replies; 10+ messages in thread From: Marco Felsch @ 2024-09-24 11:10 UTC (permalink / raw) To: Michal Vokáč Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Greg Kroah-Hartman, Shawn Guo, Petr Benes, devicetree, linux-usb, Michael Walle, imx, Alexander Stein, Sascha Hauer, Mathieu Othacehe, Hugo Villeneuve, linux-kernel, Hiago De Franco, Herburger, Pengutronix Kernel Team, Joao Paulo Goncalves, Fabio Estevam, linux-arm-kernel On 24-09-24, Michal Vokáč wrote: > The IOTA2 Lumpy board is based on the i.MX8MPlus EVK. > > Basic features are: > - 4GB LPDDR4 > - 64GB eMMC > - 2x 1GB Ethernet > - USB 3.0 Type-C dual role port, without power delivery > - USB 3.0 Type-A host port > - RGB LED - PWM driven > - speaker - PWM driven > - RTC with super capacitor backup > > Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> LGTM, feel free to add my: Reviewed-by: Marco Felsch <m.felsch@pengutronix.de> > --- > v4: > - Moved the iomuxc node to the end of the file. > - Moved the bus-width and non-removeable properties below > the pinctrl-* properties in &usdhc3 node. > - Moved the fsl,ext-reset-output below the pinctrl-* properties > in &wdog1 node. > v3: > - Dropped pinctrl-names property from &usb_dwc3_1 node. > v2: > - Dropped unused property from pwm4 node. > - Sorted all nodes and properties using dt-format tool from Frank. > > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++ > 2 files changed, 424 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 9d3df8b218a2..aa26a50b7bb4 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > new file mode 100644 > index 000000000000..9eb58e818dc7 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > @@ -0,0 +1,423 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright 2023 Y Soft > + */ > + > +/dts-v1/; > + > +#include "imx8mp.dtsi" > + > +/ { > + compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp"; > + model = "Y Soft i.MX8MPlus IOTA2 Lumpy board"; > + > + beeper { > + compatible = "pwm-beeper"; > + pwms = <&pwm4 0 500000 0>; > + }; > + > + chosen { > + stdout-path = &uart2; > + }; > + > + gpio_keys: gpio-keys { > + compatible = "gpio-keys"; > + pinctrl-0 = <&pinctrl_gpio_keys>; > + pinctrl-names = "default"; > + > + button-reset { > + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; > + label = "Factory RESET"; > + linux,code = <BTN_0>; > + }; > + }; > + > + reg_usb_host: regulator-usb-host { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; > + pinctrl-0 = <&pinctrl_usb_host_vbus>; > + pinctrl-names = "default"; > + regulator-max-microvolt = <5000000>; > + regulator-min-microvolt = <5000000>; > + regulator-name = "usb-host"; > + }; > + > + memory@40000000 { > + reg = <0x0 0x40000000 0 0x80000000>, > + <0x1 0x00000000 0 0x80000000>; > + device_type = "memory"; > + }; > +}; > + > +&A53_0 { > + cpu-supply = <®_arm>; > +}; > + > +&A53_1 { > + cpu-supply = <®_arm>; > +}; > + > +&A53_2 { > + cpu-supply = <®_arm>; > +}; > + > +&A53_3 { > + cpu-supply = <®_arm>; > +}; > + > +&eqos { > + phy-handle = <ðphy0>; > + phy-mode = "rgmii-id"; > + pinctrl-0 = <&pinctrl_eqos>; > + pinctrl-names = "default"; > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy0: ethernet-phy@0 { > + reg = <0>; > + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; > + interrupt-parent = <&gpio3>; > + micrel,led-mode = <0>; > + pinctrl-0 = <&pinctrl_ethphy0>; > + pinctrl-names = "default"; > + reset-assert-us = <1000>; > + reset-deassert-us = <1000>; > + reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; > + }; > + }; > +}; > + > +&fec { > + fsl,magic-packet; > + phy-handle = <ðphy1>; > + phy-mode = "rgmii-id"; > + pinctrl-0 = <&pinctrl_fec>; > + pinctrl-names = "default"; > + status = "okay"; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy1: ethernet-phy@0 { > + reg = <0>; > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; > + interrupt-parent = <&gpio3>; > + micrel,led-mode = <0>; > + pinctrl-0 = <&pinctrl_ethphy1>; > + pinctrl-names = "default"; > + reset-assert-us = <1000>; > + reset-deassert-us = <1000>; > + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; > + }; > + }; > +}; > + > +&i2c1 { > + clock-frequency = <400000>; > + pinctrl-0 = <&pinctrl_i2c1>; > + pinctrl-names = "default"; > + status = "okay"; > + > + pmic@25 { > + compatible = "nxp,pca9450c"; > + reg = <0x25>; > + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; > + interrupt-parent = <&gpio1>; > + pinctrl-0 = <&pinctrl_pmic>; > + pinctrl-names = "default"; > + > + regulators { > + BUCK1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1000000>; > + regulator-min-microvolt = <720000>; > + regulator-name = "BUCK1"; > + regulator-ramp-delay = <3125>; > + }; > + > + reg_arm: BUCK2 { > + nxp,dvs-run-voltage = <950000>; > + nxp,dvs-standby-voltage = <850000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1025000>; > + regulator-min-microvolt = <720000>; > + regulator-name = "BUCK2"; > + regulator-ramp-delay = <3125>; > + }; > + > + BUCK4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <3600000>; > + regulator-min-microvolt = <3000000>; > + regulator-name = "BUCK4"; > + }; > + > + BUCK5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1950000>; > + regulator-min-microvolt = <1650000>; > + regulator-name = "BUCK5"; > + }; > + > + BUCK6 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1155000>; > + regulator-min-microvolt = <1045000>; > + regulator-name = "BUCK6"; > + }; > + > + LDO1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1950000>; > + regulator-min-microvolt = <1650000>; > + regulator-name = "LDO1"; > + }; > + > + LDO3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1890000>; > + regulator-min-microvolt = <1710000>; > + regulator-name = "LDO3"; > + }; > + > + LDO4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <950000>; > + regulator-min-microvolt = <850000>; > + regulator-name = "LDO4"; > + }; > + > + LDO5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <3300000>; > + regulator-min-microvolt = <1800000>; > + regulator-name = "LDO5"; > + }; > + }; > + }; > +}; > + > +&i2c2 { > + clock-frequency = <400000>; > + pinctrl-0 = <&pinctrl_i2c2>; > + pinctrl-names = "default"; > + status = "okay"; > + > + rtc: rtc@68 { > + compatible = "dallas,ds1341"; > + reg = <0x68>; > + }; > +}; > + > +&pwm4 { > + pinctrl-0 = <&pinctrl_pwm4>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&uart2 { > + pinctrl-0 = <&pinctrl_uart2>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&usb3_1 { > + status = "okay"; > +}; > + > +&usb3_phy1 { > + vbus-supply = <®_usb_host>; > + status = "okay"; > +}; > + > +&usb_dwc3_1 { > + dr_mode = "host"; > + status = "okay"; > +}; > + > +&usdhc3 { > + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; > + assigned-clock-rates = <400000000>; > + pinctrl-0 = <&pinctrl_usdhc3>; > + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; > + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + bus-width = <8>; > + non-removable; > + status = "okay"; > +}; > + > +&wdog1 { > + pinctrl-0 = <&pinctrl_wdog>; > + pinctrl-names = "default"; > + fsl,ext-reset-output; > + status = "okay"; > +}; > + > +&iomuxc { > + pinctrl_eqos: eqosgrp { > + fsl,pins = < > + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2 > + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2 > + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 > + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 > + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 > + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 > + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 > + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 > + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 > + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 > + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 > + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 > + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 > + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 > + >; > + }; > + > + pinctrl_ethphy0: ethphy0grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x10 > + MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22 0x10 > + >; > + }; > + > + pinctrl_ethphy1: ethphy1grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x10 > + MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x10 > + >; > + }; > + > + pinctrl_fec: fecgrp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 > + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 > + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 > + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 > + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 > + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 > + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 > + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 > + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 > + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 > + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 > + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 > + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 > + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 > + >; > + }; > + > + pinctrl_gpio_keys: gpiokeysgrp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x80 > + >; > + }; > + > + pinctrl_i2c1: i2c1grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 > + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2 > + >; > + }; > + > + pinctrl_i2c2: i2c2grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 > + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 > + >; > + }; > + > + pinctrl_pmic: pmicgrp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0 > + >; > + }; > + > + pinctrl_pwm4: pwm4grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x102 > + >; > + }; > + > + pinctrl_uart2: uart2grp { > + fsl,pins = < > + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x0 > + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x0 > + >; > + }; > + > + pinctrl_usb_host_vbus: usb1grp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR 0x0 > + >; > + }; > + > + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { > + fsl,pins = < > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 > + >; > + }; > + > + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { > + fsl,pins = < > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6 > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6 > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6 > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6 > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6 > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6 > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6 > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6 > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 > + >; > + }; > + > + pinctrl_usdhc3: usdhc3grp { > + fsl,pins = < > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 > + >; > + }; > + > + pinctrl_wdog: wdoggrp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166 > + >; > + }; > +}; > -- > 2.43.0 > > > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board 2024-09-24 10:39 ` [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board Michal Vokáč 2024-09-24 11:10 ` Marco Felsch @ 2024-09-24 15:15 ` Frank Li 2024-09-24 17:37 ` Marco Felsch 1 sibling, 1 reply; 10+ messages in thread From: Frank Li @ 2024-09-24 15:15 UTC (permalink / raw) To: Michal Vokáč Cc: Rob Herring, Krzysztof Kozlowski, Conor Dooley, Greg Kroah-Hartman, Shawn Guo, Petr Benes, Sascha Hauer, Pengutronix Kernel Team, Fabio Estevam, Herburger, Hiago De Franco, Hugo Villeneuve, Joao Paulo Goncalves, Michael Walle, Alexander Stein, Mathieu Othacehe, devicetree, linux-kernel, linux-usb, imx, linux-arm-kernel On Tue, Sep 24, 2024 at 12:39:41PM +0200, Michal Vokáč wrote: > The IOTA2 Lumpy board is based on the i.MX8MPlus EVK. > > Basic features are: > - 4GB LPDDR4 > - 64GB eMMC > - 2x 1GB Ethernet > - USB 3.0 Type-C dual role port, without power delivery > - USB 3.0 Type-A host port > - RGB LED - PWM driven > - speaker - PWM driven > - RTC with super capacitor backup > > Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> > --- > v4: > - Moved the iomuxc node to the end of the file. > - Moved the bus-width and non-removeable properties below > the pinctrl-* properties in &usdhc3 node. > - Moved the fsl,ext-reset-output below the pinctrl-* properties > in &wdog1 node. > v3: > - Dropped pinctrl-names property from &usb_dwc3_1 node. > v2: > - Dropped unused property from pwm4 node. > - Sorted all nodes and properties using dt-format tool from Frank. > > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++ Suggest use https://github.com/lznuaa/dt-format sort node. any issue, let me know. Frank > 2 files changed, 424 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > index 9d3df8b218a2..aa26a50b7bb4 100644 > --- a/arch/arm64/boot/dts/freescale/Makefile > +++ b/arch/arm64/boot/dts/freescale/Makefile > @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb > dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > new file mode 100644 > index 000000000000..9eb58e818dc7 > --- /dev/null > +++ b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > @@ -0,0 +1,423 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Copyright 2023 Y Soft > + */ > + > +/dts-v1/; > + > +#include "imx8mp.dtsi" > + > +/ { > + compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp"; > + model = "Y Soft i.MX8MPlus IOTA2 Lumpy board"; > + > + beeper { > + compatible = "pwm-beeper"; > + pwms = <&pwm4 0 500000 0>; > + }; > + > + chosen { > + stdout-path = &uart2; > + }; > + > + gpio_keys: gpio-keys { > + compatible = "gpio-keys"; > + pinctrl-0 = <&pinctrl_gpio_keys>; > + pinctrl-names = "default"; > + > + button-reset { > + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; > + label = "Factory RESET"; > + linux,code = <BTN_0>; > + }; > + }; > + > + reg_usb_host: regulator-usb-host { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; > + pinctrl-0 = <&pinctrl_usb_host_vbus>; > + pinctrl-names = "default"; > + regulator-max-microvolt = <5000000>; > + regulator-min-microvolt = <5000000>; > + regulator-name = "usb-host"; > + }; > + > + memory@40000000 { > + reg = <0x0 0x40000000 0 0x80000000>, > + <0x1 0x00000000 0 0x80000000>; > + device_type = "memory"; > + }; > +}; > + > +&A53_0 { > + cpu-supply = <®_arm>; > +}; > + > +&A53_1 { > + cpu-supply = <®_arm>; > +}; > + > +&A53_2 { > + cpu-supply = <®_arm>; > +}; > + > +&A53_3 { > + cpu-supply = <®_arm>; > +}; > + > +&eqos { > + phy-handle = <ðphy0>; > + phy-mode = "rgmii-id"; > + pinctrl-0 = <&pinctrl_eqos>; > + pinctrl-names = "default"; > + status = "okay"; > + > + mdio { > + compatible = "snps,dwmac-mdio"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy0: ethernet-phy@0 { > + reg = <0>; > + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; > + interrupt-parent = <&gpio3>; > + micrel,led-mode = <0>; > + pinctrl-0 = <&pinctrl_ethphy0>; > + pinctrl-names = "default"; > + reset-assert-us = <1000>; > + reset-deassert-us = <1000>; > + reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; > + }; > + }; > +}; > + > +&fec { > + fsl,magic-packet; > + phy-handle = <ðphy1>; > + phy-mode = "rgmii-id"; > + pinctrl-0 = <&pinctrl_fec>; > + pinctrl-names = "default"; > + status = "okay"; > + > + mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + > + ethphy1: ethernet-phy@0 { > + reg = <0>; > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; > + interrupt-parent = <&gpio3>; > + micrel,led-mode = <0>; > + pinctrl-0 = <&pinctrl_ethphy1>; > + pinctrl-names = "default"; > + reset-assert-us = <1000>; > + reset-deassert-us = <1000>; > + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; > + }; > + }; > +}; > + > +&i2c1 { > + clock-frequency = <400000>; > + pinctrl-0 = <&pinctrl_i2c1>; > + pinctrl-names = "default"; > + status = "okay"; > + > + pmic@25 { > + compatible = "nxp,pca9450c"; > + reg = <0x25>; > + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; > + interrupt-parent = <&gpio1>; > + pinctrl-0 = <&pinctrl_pmic>; > + pinctrl-names = "default"; > + > + regulators { > + BUCK1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1000000>; > + regulator-min-microvolt = <720000>; > + regulator-name = "BUCK1"; > + regulator-ramp-delay = <3125>; > + }; > + > + reg_arm: BUCK2 { > + nxp,dvs-run-voltage = <950000>; > + nxp,dvs-standby-voltage = <850000>; > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1025000>; > + regulator-min-microvolt = <720000>; > + regulator-name = "BUCK2"; > + regulator-ramp-delay = <3125>; > + }; > + > + BUCK4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <3600000>; > + regulator-min-microvolt = <3000000>; > + regulator-name = "BUCK4"; > + }; > + > + BUCK5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1950000>; > + regulator-min-microvolt = <1650000>; > + regulator-name = "BUCK5"; > + }; > + > + BUCK6 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1155000>; > + regulator-min-microvolt = <1045000>; > + regulator-name = "BUCK6"; > + }; > + > + LDO1 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1950000>; > + regulator-min-microvolt = <1650000>; > + regulator-name = "LDO1"; > + }; > + > + LDO3 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <1890000>; > + regulator-min-microvolt = <1710000>; > + regulator-name = "LDO3"; > + }; > + > + LDO4 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <950000>; > + regulator-min-microvolt = <850000>; > + regulator-name = "LDO4"; > + }; > + > + LDO5 { > + regulator-always-on; > + regulator-boot-on; > + regulator-max-microvolt = <3300000>; > + regulator-min-microvolt = <1800000>; > + regulator-name = "LDO5"; > + }; > + }; > + }; > +}; > + > +&i2c2 { > + clock-frequency = <400000>; > + pinctrl-0 = <&pinctrl_i2c2>; > + pinctrl-names = "default"; > + status = "okay"; > + > + rtc: rtc@68 { > + compatible = "dallas,ds1341"; > + reg = <0x68>; > + }; > +}; > + > +&pwm4 { > + pinctrl-0 = <&pinctrl_pwm4>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&uart2 { > + pinctrl-0 = <&pinctrl_uart2>; > + pinctrl-names = "default"; > + status = "okay"; > +}; > + > +&usb3_1 { > + status = "okay"; > +}; > + > +&usb3_phy1 { > + vbus-supply = <®_usb_host>; > + status = "okay"; > +}; > + > +&usb_dwc3_1 { > + dr_mode = "host"; > + status = "okay"; > +}; > + > +&usdhc3 { > + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; > + assigned-clock-rates = <400000000>; > + pinctrl-0 = <&pinctrl_usdhc3>; > + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; > + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > + bus-width = <8>; > + non-removable; > + status = "okay"; > +}; > + > +&wdog1 { > + pinctrl-0 = <&pinctrl_wdog>; > + pinctrl-names = "default"; > + fsl,ext-reset-output; > + status = "okay"; > +}; > + > +&iomuxc { > + pinctrl_eqos: eqosgrp { > + fsl,pins = < > + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2 > + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2 > + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 > + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 > + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 > + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 > + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 > + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 > + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 > + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 > + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 > + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 > + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 > + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 > + >; > + }; > + > + pinctrl_ethphy0: ethphy0grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x10 > + MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22 0x10 > + >; > + }; > + > + pinctrl_ethphy1: ethphy1grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x10 > + MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x10 > + >; > + }; > + > + pinctrl_fec: fecgrp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 > + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 > + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 > + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 > + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 > + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 > + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 > + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 > + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 > + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 > + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 > + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 > + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 > + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 > + >; > + }; > + > + pinctrl_gpio_keys: gpiokeysgrp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x80 > + >; > + }; > + > + pinctrl_i2c1: i2c1grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 > + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2 > + >; > + }; > + > + pinctrl_i2c2: i2c2grp { > + fsl,pins = < > + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 > + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 > + >; > + }; > + > + pinctrl_pmic: pmicgrp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0 > + >; > + }; > + > + pinctrl_pwm4: pwm4grp { > + fsl,pins = < > + MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x102 > + >; > + }; > + > + pinctrl_uart2: uart2grp { > + fsl,pins = < > + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x0 > + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x0 > + >; > + }; > + > + pinctrl_usb_host_vbus: usb1grp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR 0x0 > + >; > + }; > + > + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { > + fsl,pins = < > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 > + >; > + }; > + > + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { > + fsl,pins = < > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6 > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6 > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6 > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6 > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6 > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6 > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6 > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6 > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 > + >; > + }; > + > + pinctrl_usdhc3: usdhc3grp { > + fsl,pins = < > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 > + >; > + }; > + > + pinctrl_wdog: wdoggrp { > + fsl,pins = < > + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166 > + >; > + }; > +}; > -- > 2.43.0 > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board 2024-09-24 15:15 ` Frank Li @ 2024-09-24 17:37 ` Marco Felsch 2024-09-25 11:30 ` Michal Vokáč 0 siblings, 1 reply; 10+ messages in thread From: Marco Felsch @ 2024-09-24 17:37 UTC (permalink / raw) To: Frank Li Cc: Michal Vokáč, Rob Herring, Conor Dooley, Fabio Estevam, Michael Walle, devicetree, Alexander Stein, Greg Kroah-Hartman, Sascha Hauer, Mathieu Othacehe, Hugo Villeneuve, linux-kernel, Hiago De Franco, Herburger, Petr Benes, linux-usb, Pengutronix Kernel Team, Joao Paulo Goncalves, Krzysztof Kozlowski, imx, Shawn Guo, linux-arm-kernel Hi Frank, On 24-09-24, Frank Li wrote: > On Tue, Sep 24, 2024 at 12:39:41PM +0200, Michal Vokáč wrote: > > The IOTA2 Lumpy board is based on the i.MX8MPlus EVK. > > > > Basic features are: > > - 4GB LPDDR4 > > - 64GB eMMC > > - 2x 1GB Ethernet > > - USB 3.0 Type-C dual role port, without power delivery > > - USB 3.0 Type-A host port > > - RGB LED - PWM driven > > - speaker - PWM driven > > - RTC with super capacitor backup > > > > Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> > > --- > > v4: > > - Moved the iomuxc node to the end of the file. > > - Moved the bus-width and non-removeable properties below > > the pinctrl-* properties in &usdhc3 node. > > - Moved the fsl,ext-reset-output below the pinctrl-* properties > > in &wdog1 node. > > v3: > > - Dropped pinctrl-names property from &usb_dwc3_1 node. > > v2: > > - Dropped unused property from pwm4 node. > > - Sorted all nodes and properties using dt-format tool from Frank. > > > > arch/arm64/boot/dts/freescale/Makefile | 1 + > > .../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++ > > Suggest use https://github.com/lznuaa/dt-format > sort node. any issue, let me know. Thanks for the link :) would be nice to have this script to be part of the kernel. The script follows the rules in [1] I'm just used to have common properties like pinctrl-* in front of the device specific properties e.g. "enable-active-high". But this rule is not part of [1] so I can't blame the script. Regards, Marco [1] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node > > Frank > > > 2 files changed, 424 insertions(+) > > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > > index 9d3df8b218a2..aa26a50b7bb4 100644 > > --- a/arch/arm64/boot/dts/freescale/Makefile > > +++ b/arch/arm64/boot/dts/freescale/Makefile > > @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb > > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > new file mode 100644 > > index 000000000000..9eb58e818dc7 > > --- /dev/null > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > @@ -0,0 +1,423 @@ > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > +/* > > + * Copyright 2023 Y Soft > > + */ > > + > > +/dts-v1/; > > + > > +#include "imx8mp.dtsi" > > + > > +/ { > > + compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp"; > > + model = "Y Soft i.MX8MPlus IOTA2 Lumpy board"; > > + > > + beeper { > > + compatible = "pwm-beeper"; > > + pwms = <&pwm4 0 500000 0>; > > + }; > > + > > + chosen { > > + stdout-path = &uart2; > > + }; > > + > > + gpio_keys: gpio-keys { > > + compatible = "gpio-keys"; > > + pinctrl-0 = <&pinctrl_gpio_keys>; > > + pinctrl-names = "default"; > > + > > + button-reset { > > + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; > > + label = "Factory RESET"; > > + linux,code = <BTN_0>; > > + }; > > + }; > > + > > + reg_usb_host: regulator-usb-host { > > + compatible = "regulator-fixed"; > > + enable-active-high; > > + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; > > + pinctrl-0 = <&pinctrl_usb_host_vbus>; > > + pinctrl-names = "default"; > > + regulator-max-microvolt = <5000000>; > > + regulator-min-microvolt = <5000000>; > > + regulator-name = "usb-host"; > > + }; > > + > > + memory@40000000 { > > + reg = <0x0 0x40000000 0 0x80000000>, > > + <0x1 0x00000000 0 0x80000000>; > > + device_type = "memory"; > > + }; > > +}; > > + > > +&A53_0 { > > + cpu-supply = <®_arm>; > > +}; > > + > > +&A53_1 { > > + cpu-supply = <®_arm>; > > +}; > > + > > +&A53_2 { > > + cpu-supply = <®_arm>; > > +}; > > + > > +&A53_3 { > > + cpu-supply = <®_arm>; > > +}; > > + > > +&eqos { > > + phy-handle = <ðphy0>; > > + phy-mode = "rgmii-id"; > > + pinctrl-0 = <&pinctrl_eqos>; > > + pinctrl-names = "default"; > > + status = "okay"; > > + > > + mdio { > > + compatible = "snps,dwmac-mdio"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + ethphy0: ethernet-phy@0 { > > + reg = <0>; > > + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; > > + interrupt-parent = <&gpio3>; > > + micrel,led-mode = <0>; > > + pinctrl-0 = <&pinctrl_ethphy0>; > > + pinctrl-names = "default"; > > + reset-assert-us = <1000>; > > + reset-deassert-us = <1000>; > > + reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; > > + }; > > + }; > > +}; > > + > > +&fec { > > + fsl,magic-packet; > > + phy-handle = <ðphy1>; > > + phy-mode = "rgmii-id"; > > + pinctrl-0 = <&pinctrl_fec>; > > + pinctrl-names = "default"; > > + status = "okay"; > > + > > + mdio { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + ethphy1: ethernet-phy@0 { > > + reg = <0>; > > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; > > + interrupt-parent = <&gpio3>; > > + micrel,led-mode = <0>; > > + pinctrl-0 = <&pinctrl_ethphy1>; > > + pinctrl-names = "default"; > > + reset-assert-us = <1000>; > > + reset-deassert-us = <1000>; > > + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; > > + }; > > + }; > > +}; > > + > > +&i2c1 { > > + clock-frequency = <400000>; > > + pinctrl-0 = <&pinctrl_i2c1>; > > + pinctrl-names = "default"; > > + status = "okay"; > > + > > + pmic@25 { > > + compatible = "nxp,pca9450c"; > > + reg = <0x25>; > > + interrupts = <3 IRQ_TYPE_LEVEL_LOW>; > > + interrupt-parent = <&gpio1>; > > + pinctrl-0 = <&pinctrl_pmic>; > > + pinctrl-names = "default"; > > + > > + regulators { > > + BUCK1 { > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-max-microvolt = <1000000>; > > + regulator-min-microvolt = <720000>; > > + regulator-name = "BUCK1"; > > + regulator-ramp-delay = <3125>; > > + }; > > + > > + reg_arm: BUCK2 { > > + nxp,dvs-run-voltage = <950000>; > > + nxp,dvs-standby-voltage = <850000>; > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-max-microvolt = <1025000>; > > + regulator-min-microvolt = <720000>; > > + regulator-name = "BUCK2"; > > + regulator-ramp-delay = <3125>; > > + }; > > + > > + BUCK4 { > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-max-microvolt = <3600000>; > > + regulator-min-microvolt = <3000000>; > > + regulator-name = "BUCK4"; > > + }; > > + > > + BUCK5 { > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-max-microvolt = <1950000>; > > + regulator-min-microvolt = <1650000>; > > + regulator-name = "BUCK5"; > > + }; > > + > > + BUCK6 { > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-max-microvolt = <1155000>; > > + regulator-min-microvolt = <1045000>; > > + regulator-name = "BUCK6"; > > + }; > > + > > + LDO1 { > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-max-microvolt = <1950000>; > > + regulator-min-microvolt = <1650000>; > > + regulator-name = "LDO1"; > > + }; > > + > > + LDO3 { > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-max-microvolt = <1890000>; > > + regulator-min-microvolt = <1710000>; > > + regulator-name = "LDO3"; > > + }; > > + > > + LDO4 { > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-max-microvolt = <950000>; > > + regulator-min-microvolt = <850000>; > > + regulator-name = "LDO4"; > > + }; > > + > > + LDO5 { > > + regulator-always-on; > > + regulator-boot-on; > > + regulator-max-microvolt = <3300000>; > > + regulator-min-microvolt = <1800000>; > > + regulator-name = "LDO5"; > > + }; > > + }; > > + }; > > +}; > > + > > +&i2c2 { > > + clock-frequency = <400000>; > > + pinctrl-0 = <&pinctrl_i2c2>; > > + pinctrl-names = "default"; > > + status = "okay"; > > + > > + rtc: rtc@68 { > > + compatible = "dallas,ds1341"; > > + reg = <0x68>; > > + }; > > +}; > > + > > +&pwm4 { > > + pinctrl-0 = <&pinctrl_pwm4>; > > + pinctrl-names = "default"; > > + status = "okay"; > > +}; > > + > > +&uart2 { > > + pinctrl-0 = <&pinctrl_uart2>; > > + pinctrl-names = "default"; > > + status = "okay"; > > +}; > > + > > +&usb3_1 { > > + status = "okay"; > > +}; > > + > > +&usb3_phy1 { > > + vbus-supply = <®_usb_host>; > > + status = "okay"; > > +}; > > + > > +&usb_dwc3_1 { > > + dr_mode = "host"; > > + status = "okay"; > > +}; > > + > > +&usdhc3 { > > + assigned-clocks = <&clk IMX8MP_CLK_USDHC3>; > > + assigned-clock-rates = <400000000>; > > + pinctrl-0 = <&pinctrl_usdhc3>; > > + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; > > + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; > > + pinctrl-names = "default", "state_100mhz", "state_200mhz"; > > + bus-width = <8>; > > + non-removable; > > + status = "okay"; > > +}; > > + > > +&wdog1 { > > + pinctrl-0 = <&pinctrl_wdog>; > > + pinctrl-names = "default"; > > + fsl,ext-reset-output; > > + status = "okay"; > > +}; > > + > > +&iomuxc { > > + pinctrl_eqos: eqosgrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_ENET_MDC__ENET_QOS_MDC 0x2 > > + MX8MP_IOMUXC_ENET_MDIO__ENET_QOS_MDIO 0x2 > > + MX8MP_IOMUXC_ENET_RD0__ENET_QOS_RGMII_RD0 0x90 > > + MX8MP_IOMUXC_ENET_RD1__ENET_QOS_RGMII_RD1 0x90 > > + MX8MP_IOMUXC_ENET_RD2__ENET_QOS_RGMII_RD2 0x90 > > + MX8MP_IOMUXC_ENET_RD3__ENET_QOS_RGMII_RD3 0x90 > > + MX8MP_IOMUXC_ENET_RX_CTL__ENET_QOS_RGMII_RX_CTL 0x90 > > + MX8MP_IOMUXC_ENET_RXC__CCM_ENET_QOS_CLOCK_GENERATE_RX_CLK 0x90 > > + MX8MP_IOMUXC_ENET_TD0__ENET_QOS_RGMII_TD0 0x16 > > + MX8MP_IOMUXC_ENET_TD1__ENET_QOS_RGMII_TD1 0x16 > > + MX8MP_IOMUXC_ENET_TD2__ENET_QOS_RGMII_TD2 0x16 > > + MX8MP_IOMUXC_ENET_TD3__ENET_QOS_RGMII_TD3 0x16 > > + MX8MP_IOMUXC_ENET_TX_CTL__ENET_QOS_RGMII_TX_CTL 0x16 > > + MX8MP_IOMUXC_ENET_TXC__CCM_ENET_QOS_CLOCK_GENERATE_TX_CLK 0x16 > > + >; > > + }; > > + > > + pinctrl_ethphy0: ethphy0grp { > > + fsl,pins = < > > + MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x10 > > + MX8MP_IOMUXC_SAI5_RXD1__GPIO3_IO22 0x10 > > + >; > > + }; > > + > > + pinctrl_ethphy1: ethphy1grp { > > + fsl,pins = < > > + MX8MP_IOMUXC_SAI5_RXFS__GPIO3_IO19 0x10 > > + MX8MP_IOMUXC_SAI5_RXC__GPIO3_IO20 0x10 > > + >; > > + }; > > + > > + pinctrl_fec: fecgrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 > > + MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 > > + MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 > > + MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 > > + MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 > > + MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 > > + MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 > > + MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 > > + MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 > > + MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 > > + MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 > > + MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 > > + MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 > > + MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 > > + >; > > + }; > > + > > + pinctrl_gpio_keys: gpiokeysgrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_GPIO1_IO07__GPIO1_IO07 0x80 > > + >; > > + }; > > + > > + pinctrl_i2c1: i2c1grp { > > + fsl,pins = < > > + MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c2 > > + MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c2 > > + >; > > + }; > > + > > + pinctrl_i2c2: i2c2grp { > > + fsl,pins = < > > + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 > > + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 > > + >; > > + }; > > + > > + pinctrl_pmic: pmicgrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_GPIO1_IO03__GPIO1_IO03 0x1c0 > > + >; > > + }; > > + > > + pinctrl_pwm4: pwm4grp { > > + fsl,pins = < > > + MX8MP_IOMUXC_SAI3_MCLK__PWM4_OUT 0x102 > > + >; > > + }; > > + > > + pinctrl_uart2: uart2grp { > > + fsl,pins = < > > + MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x0 > > + MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x0 > > + >; > > + }; > > + > > + pinctrl_usb_host_vbus: usb1grp { > > + fsl,pins = < > > + MX8MP_IOMUXC_GPIO1_IO14__USB2_OTG_PWR 0x0 > > + >; > > + }; > > + > > + pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x194 > > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d4 > > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d4 > > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d4 > > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d4 > > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d4 > > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d4 > > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d4 > > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d4 > > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d4 > > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x194 > > + >; > > + }; > > + > > + pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x196 > > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d6 > > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d6 > > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d6 > > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d6 > > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d6 > > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d6 > > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d6 > > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d6 > > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d6 > > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x196 > > + >; > > + }; > > + > > + pinctrl_usdhc3: usdhc3grp { > > + fsl,pins = < > > + MX8MP_IOMUXC_NAND_WE_B__USDHC3_CLK 0x190 > > + MX8MP_IOMUXC_NAND_WP_B__USDHC3_CMD 0x1d0 > > + MX8MP_IOMUXC_NAND_DATA04__USDHC3_DATA0 0x1d0 > > + MX8MP_IOMUXC_NAND_DATA05__USDHC3_DATA1 0x1d0 > > + MX8MP_IOMUXC_NAND_DATA06__USDHC3_DATA2 0x1d0 > > + MX8MP_IOMUXC_NAND_DATA07__USDHC3_DATA3 0x1d0 > > + MX8MP_IOMUXC_NAND_RE_B__USDHC3_DATA4 0x1d0 > > + MX8MP_IOMUXC_NAND_CE2_B__USDHC3_DATA5 0x1d0 > > + MX8MP_IOMUXC_NAND_CE3_B__USDHC3_DATA6 0x1d0 > > + MX8MP_IOMUXC_NAND_CLE__USDHC3_DATA7 0x1d0 > > + MX8MP_IOMUXC_NAND_CE1_B__USDHC3_STROBE 0x190 > > + >; > > + }; > > + > > + pinctrl_wdog: wdoggrp { > > + fsl,pins = < > > + MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x166 > > + >; > > + }; > > +}; > > -- > > 2.43.0 > > > > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board 2024-09-24 17:37 ` Marco Felsch @ 2024-09-25 11:30 ` Michal Vokáč 2024-09-25 16:24 ` Frank Li 0 siblings, 1 reply; 10+ messages in thread From: Michal Vokáč @ 2024-09-25 11:30 UTC (permalink / raw) To: Marco Felsch Cc: Rob Herring, Conor Dooley, Fabio Estevam, Michael Walle, devicetree, Alexander Stein, Greg Kroah-Hartman, Sascha Hauer, Mathieu Othacehe, Hugo Villeneuve, linux-kernel, Hiago De Franco, Herburger, Petr Benes, linux-usb, Pengutronix Kernel Team, Joao Paulo Goncalves, Krzysztof Kozlowski, imx, Shawn Guo, linux-arm-kernel, Frank Li On 24. 09. 24 19:37, Marco Felsch wrote: > Hi Frank, > > On 24-09-24, Frank Li wrote: >> On Tue, Sep 24, 2024 at 12:39:41PM +0200, Michal Vokáč wrote: >>> The IOTA2 Lumpy board is based on the i.MX8MPlus EVK. >>> >>> Basic features are: >>> - 4GB LPDDR4 >>> - 64GB eMMC >>> - 2x 1GB Ethernet >>> - USB 3.0 Type-C dual role port, without power delivery >>> - USB 3.0 Type-A host port >>> - RGB LED - PWM driven >>> - speaker - PWM driven >>> - RTC with super capacitor backup >>> >>> Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> >>> --- >>> v4: >>> - Moved the iomuxc node to the end of the file. >>> - Moved the bus-width and non-removeable properties below >>> the pinctrl-* properties in &usdhc3 node. >>> - Moved the fsl,ext-reset-output below the pinctrl-* properties >>> in &wdog1 node. >>> v3: >>> - Dropped pinctrl-names property from &usb_dwc3_1 node. >>> v2: >>> - Dropped unused property from pwm4 node. >>> - Sorted all nodes and properties using dt-format tool from Frank. >>> >>> arch/arm64/boot/dts/freescale/Makefile | 1 + >>> .../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++ >> >> Suggest use https://github.com/lznuaa/dt-format >> sort node. any issue, let me know. > > Thanks for the link :) would be nice to have this script to be part of > the kernel. The script follows the rules in [1] I'm just used to have > common properties like pinctrl-* in front of the device specific > properties e.g. "enable-active-high". But this rule is not part of [1] > so I can't blame the script. > > Regards, > Marco > > [1] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node Thank you for the review Frank & Marco. I quickly went through the file again and found another few properties that could be better ordered according to the kernel documentation [1]. >>> 2 files changed, 424 insertions(+) >>> create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts >>> >>> diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile >>> index 9d3df8b218a2..aa26a50b7bb4 100644 >>> --- a/arch/arm64/boot/dts/freescale/Makefile >>> +++ b/arch/arm64/boot/dts/freescale/Makefile >>> @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb >>> dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb >>> dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb >>> dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb >>> +dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb >>> dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb >>> dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb >>> dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb >>> diff --git a/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts >>> new file mode 100644 >>> index 000000000000..9eb58e818dc7 >>> --- /dev/null >>> +++ b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts >>> @@ -0,0 +1,423 @@ >>> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) >>> +/* >>> + * Copyright 2023 Y Soft >>> + */ >>> + >>> +/dts-v1/; >>> + >>> +#include "imx8mp.dtsi" >>> + >>> +/ { >>> + compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp"; >>> + model = "Y Soft i.MX8MPlus IOTA2 Lumpy board"; >>> + >>> + beeper { >>> + compatible = "pwm-beeper"; >>> + pwms = <&pwm4 0 500000 0>; >>> + }; >>> + >>> + chosen { >>> + stdout-path = &uart2; >>> + }; >>> + >>> + gpio_keys: gpio-keys { >>> + compatible = "gpio-keys"; >>> + pinctrl-0 = <&pinctrl_gpio_keys>; >>> + pinctrl-names = "default"; >>> + >>> + button-reset { >>> + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; >>> + label = "Factory RESET"; >>> + linux,code = <BTN_0>; >>> + }; >>> + }; >>> + >>> + reg_usb_host: regulator-usb-host { >>> + compatible = "regulator-fixed"; >>> + enable-active-high; >>> + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; The enable-active-high and gpio should go bellow regulator-*. >>> + pinctrl-0 = <&pinctrl_usb_host_vbus>; >>> + pinctrl-names = "default"; >>> + regulator-max-microvolt = <5000000>; >>> + regulator-min-microvolt = <5000000>; >>> + regulator-name = "usb-host"; >>> + }; >>> + >>> + memory@40000000 { >>> + reg = <0x0 0x40000000 0 0x80000000>, >>> + <0x1 0x00000000 0 0x80000000>; >>> + device_type = "memory"; >>> + }; >>> +}; >>> + >>> +&A53_0 { >>> + cpu-supply = <®_arm>; >>> +}; >>> + >>> +&A53_1 { >>> + cpu-supply = <®_arm>; >>> +}; >>> + >>> +&A53_2 { >>> + cpu-supply = <®_arm>; >>> +}; >>> + >>> +&A53_3 { >>> + cpu-supply = <®_arm>; >>> +}; >>> + >>> +&eqos { >>> + phy-handle = <ðphy0>; >>> + phy-mode = "rgmii-id"; >>> + pinctrl-0 = <&pinctrl_eqos>; >>> + pinctrl-names = "default"; >>> + status = "okay"; >>> + >>> + mdio { >>> + compatible = "snps,dwmac-mdio"; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + ethphy0: ethernet-phy@0 { >>> + reg = <0>; >>> + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; >>> + interrupt-parent = <&gpio3>; >>> + micrel,led-mode = <0>; The micrel,* is a vendor specific property. It should go bellow the reset-*. >>> + pinctrl-0 = <&pinctrl_ethphy0>; >>> + pinctrl-names = "default"; >>> + reset-assert-us = <1000>; >>> + reset-deassert-us = <1000>; >>> + reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; >>> + }; >>> + }; >>> +}; >>> + >>> +&fec { >>> + fsl,magic-packet; >>> + phy-handle = <ðphy1>; >>> + phy-mode = "rgmii-id"; >>> + pinctrl-0 = <&pinctrl_fec>; >>> + pinctrl-names = "default"; >>> + status = "okay"; >>> + >>> + mdio { >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + >>> + ethphy1: ethernet-phy@0 { >>> + reg = <0>; >>> + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; >>> + interrupt-parent = <&gpio3>; >>> + micrel,led-mode = <0>; Same as above, micrel,* should go bellow common properties. I will send a v5 with these fixed. Michal >>> + pinctrl-0 = <&pinctrl_ethphy1>; >>> + pinctrl-names = "default"; >>> + reset-assert-us = <1000>; >>> + reset-deassert-us = <1000>; >>> + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; >>> + }; >>> + }; >>> +}; >>> + ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board 2024-09-25 11:30 ` Michal Vokáč @ 2024-09-25 16:24 ` Frank Li 2024-09-26 7:50 ` Marco Felsch 0 siblings, 1 reply; 10+ messages in thread From: Frank Li @ 2024-09-25 16:24 UTC (permalink / raw) To: Michal Vokáč Cc: Marco Felsch, Rob Herring, Conor Dooley, Fabio Estevam, Michael Walle, devicetree, Alexander Stein, Greg Kroah-Hartman, Sascha Hauer, Mathieu Othacehe, Hugo Villeneuve, linux-kernel, Hiago De Franco, Herburger, Petr Benes, linux-usb, Pengutronix Kernel Team, Joao Paulo Goncalves, Krzysztof Kozlowski, imx, Shawn Guo, linux-arm-kernel On Wed, Sep 25, 2024 at 01:30:31PM +0200, Michal Vokáč wrote: > On 24. 09. 24 19:37, Marco Felsch wrote: > > Hi Frank, > > > > On 24-09-24, Frank Li wrote: > > > On Tue, Sep 24, 2024 at 12:39:41PM +0200, Michal Vokáč wrote: > > > > The IOTA2 Lumpy board is based on the i.MX8MPlus EVK. > > > > > > > > Basic features are: > > > > - 4GB LPDDR4 > > > > - 64GB eMMC > > > > - 2x 1GB Ethernet > > > > - USB 3.0 Type-C dual role port, without power delivery > > > > - USB 3.0 Type-A host port > > > > - RGB LED - PWM driven > > > > - speaker - PWM driven > > > > - RTC with super capacitor backup > > > > > > > > Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> > > > > --- > > > > v4: > > > > - Moved the iomuxc node to the end of the file. > > > > - Moved the bus-width and non-removeable properties below > > > > the pinctrl-* properties in &usdhc3 node. > > > > - Moved the fsl,ext-reset-output below the pinctrl-* properties > > > > in &wdog1 node. > > > > v3: > > > > - Dropped pinctrl-names property from &usb_dwc3_1 node. > > > > v2: > > > > - Dropped unused property from pwm4 node. > > > > - Sorted all nodes and properties using dt-format tool from Frank. > > > > > > > > arch/arm64/boot/dts/freescale/Makefile | 1 + > > > > .../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++ > > > > > > Suggest use https://github.com/lznuaa/dt-format > > > sort node. any issue, let me know. > > > > Thanks for the link :) would be nice to have this script to be part of > > the kernel. It depend on how much people like and use it. >> The script follows the rules in [1] I'm just used to have > > common properties like pinctrl-* in front of the device specific > > properties e.g. "enable-active-high". But this rule is not part of [1] > > so I can't blame the script. I just write it. Not 100% align order-of-properties-in-device-node yet. Some propertiy need special treated. Thank you provide the feedback. I push change, enable-active-high and gpio will after regulator*. Frank > > > > Regards, > > Marco > > > > [1] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node > > Thank you for the review Frank & Marco. > I quickly went through the file again and found another few properties > that could be better ordered according to the kernel documentation [1]. > > > > > 2 files changed, 424 insertions(+) > > > > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > > > > > > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > > > > index 9d3df8b218a2..aa26a50b7bb4 100644 > > > > --- a/arch/arm64/boot/dts/freescale/Makefile > > > > +++ b/arch/arm64/boot/dts/freescale/Makefile > > > > @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb > > > > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > > > new file mode 100644 > > > > index 000000000000..9eb58e818dc7 > > > > --- /dev/null > > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > > > @@ -0,0 +1,423 @@ > > > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > > > +/* > > > > + * Copyright 2023 Y Soft > > > > + */ > > > > + > > > > +/dts-v1/; > > > > + > > > > +#include "imx8mp.dtsi" > > > > + > > > > +/ { > > > > + compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp"; > > > > + model = "Y Soft i.MX8MPlus IOTA2 Lumpy board"; > > > > + > > > > + beeper { > > > > + compatible = "pwm-beeper"; > > > > + pwms = <&pwm4 0 500000 0>; > > > > + }; > > > > + > > > > + chosen { > > > > + stdout-path = &uart2; > > > > + }; > > > > + > > > > + gpio_keys: gpio-keys { > > > > + compatible = "gpio-keys"; > > > > + pinctrl-0 = <&pinctrl_gpio_keys>; > > > > + pinctrl-names = "default"; > > > > + > > > > + button-reset { > > > > + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; > > > > + label = "Factory RESET"; > > > > + linux,code = <BTN_0>; > > > > + }; > > > > + }; > > > > + > > > > + reg_usb_host: regulator-usb-host { > > > > + compatible = "regulator-fixed"; > > > > + enable-active-high; > > > > + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; > > The enable-active-high and gpio should go bellow regulator-*. > > > > > + pinctrl-0 = <&pinctrl_usb_host_vbus>; > > > > + pinctrl-names = "default"; > > > > + regulator-max-microvolt = <5000000>; > > > > + regulator-min-microvolt = <5000000>; > > > > + regulator-name = "usb-host"; > > > > + }; > > > > + > > > > + memory@40000000 { > > > > + reg = <0x0 0x40000000 0 0x80000000>, > > > > + <0x1 0x00000000 0 0x80000000>; > > > > + device_type = "memory"; > > > > + }; > > > > +}; > > > > + > > > > +&A53_0 { > > > > + cpu-supply = <®_arm>; > > > > +}; > > > > + > > > > +&A53_1 { > > > > + cpu-supply = <®_arm>; > > > > +}; > > > > + > > > > +&A53_2 { > > > > + cpu-supply = <®_arm>; > > > > +}; > > > > + > > > > +&A53_3 { > > > > + cpu-supply = <®_arm>; > > > > +}; > > > > + > > > > +&eqos { > > > > + phy-handle = <ðphy0>; > > > > + phy-mode = "rgmii-id"; > > > > + pinctrl-0 = <&pinctrl_eqos>; > > > > + pinctrl-names = "default"; > > > > + status = "okay"; > > > > + > > > > + mdio { > > > > + compatible = "snps,dwmac-mdio"; > > > > + #address-cells = <1>; > > > > + #size-cells = <0>; > > > > + > > > > + ethphy0: ethernet-phy@0 { > > > > + reg = <0>; > > > > + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; > > > > + interrupt-parent = <&gpio3>; > > > > + micrel,led-mode = <0>; > > The micrel,* is a vendor specific property. It should go bellow the reset-*. > > > > > + pinctrl-0 = <&pinctrl_ethphy0>; > > > > + pinctrl-names = "default"; > > > > + reset-assert-us = <1000>; > > > > + reset-deassert-us = <1000>; > > > > + reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; > > > > + }; > > > > + }; > > > > +}; > > > > + > > > > +&fec { > > > > + fsl,magic-packet; > > > > + phy-handle = <ðphy1>; > > > > + phy-mode = "rgmii-id"; > > > > + pinctrl-0 = <&pinctrl_fec>; > > > > + pinctrl-names = "default"; > > > > + status = "okay"; > > > > + > > > > + mdio { > > > > + #address-cells = <1>; > > > > + #size-cells = <0>; > > > > + > > > > + ethphy1: ethernet-phy@0 { > > > > + reg = <0>; > > > > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; > > > > + interrupt-parent = <&gpio3>; > > > > + micrel,led-mode = <0>; > > Same as above, micrel,* should go bellow common properties. > I will send a v5 with these fixed. > > Michal > > > > > + pinctrl-0 = <&pinctrl_ethphy1>; > > > > + pinctrl-names = "default"; > > > > + reset-assert-us = <1000>; > > > > + reset-deassert-us = <1000>; > > > > + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; > > > > + }; > > > > + }; > > > > +}; > > > > + ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board 2024-09-25 16:24 ` Frank Li @ 2024-09-26 7:50 ` Marco Felsch 0 siblings, 0 replies; 10+ messages in thread From: Marco Felsch @ 2024-09-26 7:50 UTC (permalink / raw) To: Frank Li Cc: Michal Vokáč, Rob Herring, Conor Dooley, Fabio Estevam, Michael Walle, devicetree, Alexander Stein, Greg Kroah-Hartman, Sascha Hauer, Mathieu Othacehe, Hugo Villeneuve, linux-kernel, Hiago De Franco, Herburger, Petr Benes, linux-usb, Pengutronix Kernel Team, Joao Paulo Goncalves, Krzysztof Kozlowski, imx, Shawn Guo, linux-arm-kernel On 24-09-25, Frank Li wrote: > On Wed, Sep 25, 2024 at 01:30:31PM +0200, Michal Vokáč wrote: > > On 24. 09. 24 19:37, Marco Felsch wrote: > > > Hi Frank, > > > > > > On 24-09-24, Frank Li wrote: > > > > On Tue, Sep 24, 2024 at 12:39:41PM +0200, Michal Vokáč wrote: > > > > > The IOTA2 Lumpy board is based on the i.MX8MPlus EVK. > > > > > > > > > > Basic features are: > > > > > - 4GB LPDDR4 > > > > > - 64GB eMMC > > > > > - 2x 1GB Ethernet > > > > > - USB 3.0 Type-C dual role port, without power delivery > > > > > - USB 3.0 Type-A host port > > > > > - RGB LED - PWM driven > > > > > - speaker - PWM driven > > > > > - RTC with super capacitor backup > > > > > > > > > > Signed-off-by: Michal Vokáč <michal.vokac@ysoft.com> > > > > > --- > > > > > v4: > > > > > - Moved the iomuxc node to the end of the file. > > > > > - Moved the bus-width and non-removeable properties below > > > > > the pinctrl-* properties in &usdhc3 node. > > > > > - Moved the fsl,ext-reset-output below the pinctrl-* properties > > > > > in &wdog1 node. > > > > > v3: > > > > > - Dropped pinctrl-names property from &usb_dwc3_1 node. > > > > > v2: > > > > > - Dropped unused property from pwm4 node. > > > > > - Sorted all nodes and properties using dt-format tool from Frank. > > > > > > > > > > arch/arm64/boot/dts/freescale/Makefile | 1 + > > > > > .../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++ > > > > > > > > Suggest use https://github.com/lznuaa/dt-format > > > > sort node. any issue, let me know. > > > > > > Thanks for the link :) would be nice to have this script to be part of > > > the kernel. > > It depend on how much people like and use it. I don't see any reason why the kernel shouldn't have such a script, it makes the life easier for all of us (incl. the dt-maintainers). By that I mean the idea of having such a script since I actually didn't looked into your code. > >> The script follows the rules in [1] I'm just used to have > > > common properties like pinctrl-* in front of the device specific > > > properties e.g. "enable-active-high". But this rule is not part of [1] > > > so I can't blame the script. > > I just write it. Not 100% align order-of-properties-in-device-node yet. > Some propertiy need special treated. Thank you provide the feedback. > > I push change, enable-active-high and gpio will after regulator*. :) Thank you! Regards, Marco > > Frank > > > > > > > Regards, > > > Marco > > > > > > [1] https://docs.kernel.org/devicetree/bindings/dts-coding-style.html#order-of-properties-in-device-node > > > > Thank you for the review Frank & Marco. > > I quickly went through the file again and found another few properties > > that could be better ordered according to the kernel documentation [1]. > > > > > > > 2 files changed, 424 insertions(+) > > > > > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > > > > > > > > > diff --git a/arch/arm64/boot/dts/freescale/Makefile b/arch/arm64/boot/dts/freescale/Makefile > > > > > index 9d3df8b218a2..aa26a50b7bb4 100644 > > > > > --- a/arch/arm64/boot/dts/freescale/Makefile > > > > > +++ b/arch/arm64/boot/dts/freescale/Makefile > > > > > @@ -171,6 +171,7 @@ dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk2.dtb > > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-dhcom-pdk3.dtb > > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-evk.dtb > > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-icore-mx8mp-edimm2.2.dtb > > > > > +dtb-$(CONFIG_ARCH_MXC) += imx8mp-iota2-lumpy.dtb > > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-msc-sm2s-ep1.dtb > > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-navqp.dtb > > > > > dtb-$(CONFIG_ARCH_MXC) += imx8mp-phyboard-pollux-rdk.dtb > > > > > diff --git a/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > > > > new file mode 100644 > > > > > index 000000000000..9eb58e818dc7 > > > > > --- /dev/null > > > > > +++ b/arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > > > > @@ -0,0 +1,423 @@ > > > > > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > > > > > +/* > > > > > + * Copyright 2023 Y Soft > > > > > + */ > > > > > + > > > > > +/dts-v1/; > > > > > + > > > > > +#include "imx8mp.dtsi" > > > > > + > > > > > +/ { > > > > > + compatible = "ysoft,imx8mp-iota2-lumpy", "fsl,imx8mp"; > > > > > + model = "Y Soft i.MX8MPlus IOTA2 Lumpy board"; > > > > > + > > > > > + beeper { > > > > > + compatible = "pwm-beeper"; > > > > > + pwms = <&pwm4 0 500000 0>; > > > > > + }; > > > > > + > > > > > + chosen { > > > > > + stdout-path = &uart2; > > > > > + }; > > > > > + > > > > > + gpio_keys: gpio-keys { > > > > > + compatible = "gpio-keys"; > > > > > + pinctrl-0 = <&pinctrl_gpio_keys>; > > > > > + pinctrl-names = "default"; > > > > > + > > > > > + button-reset { > > > > > + gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; > > > > > + label = "Factory RESET"; > > > > > + linux,code = <BTN_0>; > > > > > + }; > > > > > + }; > > > > > + > > > > > + reg_usb_host: regulator-usb-host { > > > > > + compatible = "regulator-fixed"; > > > > > + enable-active-high; > > > > > + gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>; > > > > The enable-active-high and gpio should go bellow regulator-*. > > > > > > > + pinctrl-0 = <&pinctrl_usb_host_vbus>; > > > > > + pinctrl-names = "default"; > > > > > + regulator-max-microvolt = <5000000>; > > > > > + regulator-min-microvolt = <5000000>; > > > > > + regulator-name = "usb-host"; > > > > > + }; > > > > > + > > > > > + memory@40000000 { > > > > > + reg = <0x0 0x40000000 0 0x80000000>, > > > > > + <0x1 0x00000000 0 0x80000000>; > > > > > + device_type = "memory"; > > > > > + }; > > > > > +}; > > > > > + > > > > > +&A53_0 { > > > > > + cpu-supply = <®_arm>; > > > > > +}; > > > > > + > > > > > +&A53_1 { > > > > > + cpu-supply = <®_arm>; > > > > > +}; > > > > > + > > > > > +&A53_2 { > > > > > + cpu-supply = <®_arm>; > > > > > +}; > > > > > + > > > > > +&A53_3 { > > > > > + cpu-supply = <®_arm>; > > > > > +}; > > > > > + > > > > > +&eqos { > > > > > + phy-handle = <ðphy0>; > > > > > + phy-mode = "rgmii-id"; > > > > > + pinctrl-0 = <&pinctrl_eqos>; > > > > > + pinctrl-names = "default"; > > > > > + status = "okay"; > > > > > + > > > > > + mdio { > > > > > + compatible = "snps,dwmac-mdio"; > > > > > + #address-cells = <1>; > > > > > + #size-cells = <0>; > > > > > + > > > > > + ethphy0: ethernet-phy@0 { > > > > > + reg = <0>; > > > > > + interrupts = <21 IRQ_TYPE_LEVEL_LOW>; > > > > > + interrupt-parent = <&gpio3>; > > > > > + micrel,led-mode = <0>; > > > > The micrel,* is a vendor specific property. It should go bellow the reset-*. > > > > > > > + pinctrl-0 = <&pinctrl_ethphy0>; > > > > > + pinctrl-names = "default"; > > > > > + reset-assert-us = <1000>; > > > > > + reset-deassert-us = <1000>; > > > > > + reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>; > > > > > + }; > > > > > + }; > > > > > +}; > > > > > + > > > > > +&fec { > > > > > + fsl,magic-packet; > > > > > + phy-handle = <ðphy1>; > > > > > + phy-mode = "rgmii-id"; > > > > > + pinctrl-0 = <&pinctrl_fec>; > > > > > + pinctrl-names = "default"; > > > > > + status = "okay"; > > > > > + > > > > > + mdio { > > > > > + #address-cells = <1>; > > > > > + #size-cells = <0>; > > > > > + > > > > > + ethphy1: ethernet-phy@0 { > > > > > + reg = <0>; > > > > > + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; > > > > > + interrupt-parent = <&gpio3>; > > > > > + micrel,led-mode = <0>; > > > > Same as above, micrel,* should go bellow common properties. > > I will send a v5 with these fixed. > > > > Michal > > > > > > > + pinctrl-0 = <&pinctrl_ethphy1>; > > > > > + pinctrl-names = "default"; > > > > > + reset-assert-us = <1000>; > > > > > + reset-deassert-us = <1000>; > > > > > + reset-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; > > > > > + }; > > > > > + }; > > > > > +}; > > > > > + > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [PATCH v4 0/2] Add support for new IMX8MP based board 2024-09-24 10:39 [PATCH v4 0/2] Add support for new IMX8MP based board Michal Vokáč 2024-09-24 10:39 ` [PATCH v4 1/2] dt-bindings: arm: Add i.MX8MP IOTA2 Lumpy board Michal Vokáč 2024-09-24 10:39 ` [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board Michal Vokáč @ 2024-09-25 1:56 ` Rob Herring (Arm) 2 siblings, 0 replies; 10+ messages in thread From: Rob Herring (Arm) @ 2024-09-25 1:56 UTC (permalink / raw) To: Michal Vokáč Cc: imx, Joao Paulo Goncalves, Hugo Villeneuve, Michael Walle, Herburger, Mathieu Othacehe, Sascha Hauer, Conor Dooley, Hiago De Franco, Fabio Estevam, linux-kernel, linux-arm-kernel, Petr Benes, Pengutronix Kernel Team, Alexander Stein, Krzysztof Kozlowski, linux-usb, Greg Kroah-Hartman, devicetree, Shawn Guo On Tue, 24 Sep 2024 12:39:39 +0200, Michal Vokáč wrote: > Hi, > this series adds support for a new member in our IOTA platform. > The board is based on the i.MX8MP SoC. It adds support for most > of the board functionality except USB Type-C port and some other > minor things. > > This series originally included the dt-binding for that Type-C > port controller but I finally removed it based on a good comment > from Krzysztof. I will post the Type-C binding including the driver > in a followup series. > > Michal > > Michal Vokáč (2): > dt-bindings: arm: Add i.MX8MP IOTA2 Lumpy board > arm64: dts: imx: Add imx8mp-iota2-lumpy board > > .../devicetree/bindings/arm/fsl.yaml | 1 + > arch/arm64/boot/dts/freescale/Makefile | 1 + > .../boot/dts/freescale/imx8mp-iota2-lumpy.dts | 423 ++++++++++++++++++ > 3 files changed, 425 insertions(+) > create mode 100644 arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dts > > -- > 2.43.0 > > My bot found new DTB warnings on the .dts files added or changed in this series. Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings are fixed by another series. Ultimately, it is up to the platform maintainer whether these warnings are acceptable or not. No need to reply unless the platform maintainer has comments. If you already ran DT checks and didn't see these error(s), then make sure dt-schema is up to date: pip3 install dtschema --upgrade New warnings running 'make CHECK_DTBS=y freescale/imx8mp-iota2-lumpy.dtb' for 20240924103941.1729061-1-michal.vokac@ysoft.com: arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dtb: pcie-ep@33800000: reg: [[864026624, 4194304], [402653184, 134217728]] is too short from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml# arch/arm64/boot/dts/freescale/imx8mp-iota2-lumpy.dtb: pcie-ep@33800000: reg-names: ['dbi', 'addr_space'] is too short from schema $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-ep.yaml# ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2024-09-26 7:50 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2024-09-24 10:39 [PATCH v4 0/2] Add support for new IMX8MP based board Michal Vokáč 2024-09-24 10:39 ` [PATCH v4 1/2] dt-bindings: arm: Add i.MX8MP IOTA2 Lumpy board Michal Vokáč 2024-09-24 10:39 ` [PATCH v4 2/2] arm64: dts: imx: Add imx8mp-iota2-lumpy board Michal Vokáč 2024-09-24 11:10 ` Marco Felsch 2024-09-24 15:15 ` Frank Li 2024-09-24 17:37 ` Marco Felsch 2024-09-25 11:30 ` Michal Vokáč 2024-09-25 16:24 ` Frank Li 2024-09-26 7:50 ` Marco Felsch 2024-09-25 1:56 ` [PATCH v4 0/2] Add support for new IMX8MP based board Rob Herring (Arm)
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