From: Terry Bowman <Terry.Bowman@amd.com>
To: Guenter Roeck <linux@roeck-us.net>,
linux-watchdog@vger.kernel.org, jdelvare@suse.com,
linux-i2c@vger.kernel.org, wsa@kernel.org,
andy.shevchenko@gmail.com, rafael.j.wysocki@intel.com
Cc: linux-kernel@vger.kernel.org, wim@linux-watchdog.org,
rrichter@amd.com, thomas.lendacky@amd.com,
sudheesh.mavila@amd.com, Nehal-bakulchandra.Shah@amd.com,
Basavaraj.Natikar@amd.com, Shyam-sundar.S-k@amd.com,
Mario.Limonciello@amd.com
Subject: Re: [PATCH v4 2/4] Watchdog: sp5100_tco: Refactor MMIO base address initialization
Date: Tue, 1 Feb 2022 14:32:45 -0600 [thread overview]
Message-ID: <e7112674-05e2-93cd-b8f9-3e31f173238d@amd.com> (raw)
In-Reply-To: <c1d121f7-f482-7913-eced-4fbef962656d@amd.com>
On 2/1/22 10:46, Terry Bowman wrote:
>
>
> On 2/1/22 09:31, Guenter Roeck wrote:
>> On 1/30/22 11:12, Terry Bowman wrote:
>>> Combine MMIO base address and alternate base address detection. Combine
>>> based on layout type. This will simplify the function by eliminating
>>> a switch case.
>>>
>>> Move existing request/release code into functions. This currently only
>>> supports port I/O request/release. The move into a separate function
>>> will make it ready for adding MMIO region support.
>>>
>>> Co-developed-by: Robert Richter <rrichter@amd.com>
>>> Signed-off-by: Robert Richter <rrichter@amd.com>
>>> Signed-off-by: Terry Bowman <terry.bowman@amd.com>
>>> Tested-by: Jean Delvare <jdelvare@suse.de>
>>> Reviewed-by: Jean Delvare <jdelvare@suse.de>
>>> ---
>>> drivers/watchdog/sp5100_tco.c | 155 ++++++++++++++++++----------------
>>> drivers/watchdog/sp5100_tco.h | 1 +
>>> 2 files changed, 82 insertions(+), 74 deletions(-)
>>>
>>> diff --git a/drivers/watchdog/sp5100_tco.c b/drivers/watchdog/sp5100_tco.c
>>> index b365bbc9ac36..16e122d5045e 100644
>>> --- a/drivers/watchdog/sp5100_tco.c
>>> +++ b/drivers/watchdog/sp5100_tco.c
>>> @@ -223,6 +223,55 @@ static u32 sp5100_tco_read_pm_reg32(u8 index)
>>> return val;
>>> }
>>> +static u32 sp5100_tco_request_region(struct device *dev,
>>> + u32 mmio_addr,
>>> + const char *dev_name)
>>> +{
>>> + if (!devm_request_mem_region(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE,
>>> + dev_name)) {
>>> + dev_dbg(dev, "MMIO address 0x%08x already in use\n", mmio_addr);
>>> + return 0;
>>> + }
>>> +
>>> + return mmio_addr;
>>> +}
>>> +
>>> +static u32 sp5100_tco_prepare_base(struct sp5100_tco *tco,
>>> + u32 mmio_addr,
>>> + u32 alt_mmio_addr,
>>> + const char *dev_name)
>>> +{
>>> + struct device *dev = tco->wdd.parent;
>>> +
>>> + dev_dbg(dev, "Got 0x%08x from SBResource_MMIO register\n", mmio_addr);
>>> +
>>> + if (!mmio_addr && !alt_mmio_addr)
>>> + return -ENODEV;
>>> +
>>> + /* Check for MMIO address and alternate MMIO address conflicts */
>>> + if (mmio_addr)
>>> + mmio_addr = sp5100_tco_request_region(dev, mmio_addr, dev_name);
>>> +
>>> + if (!mmio_addr && alt_mmio_addr)
>>> + mmio_addr = sp5100_tco_request_region(dev, alt_mmio_addr, dev_name);
>>> +
>>> + if (!mmio_addr) {
>>> + dev_err(dev, "Failed to reserve MMIO or alternate MMIO region\n");
>>> + return -EBUSY;
>>> + }
>>> +
>>> + tco->tcobase = devm_ioremap(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE);
>>> + if (!tco->tcobase) {
>>> + dev_err(dev, "MMIO address 0x%08x failed mapping\n", mmio_addr);
>>> + devm_release_mem_region(dev, mmio_addr, SP5100_WDT_MEM_MAP_SIZE);
>>> + return -ENOMEM;
>>> + }
>>> +
>>> + dev_info(dev, "Using 0x%08x for watchdog MMIO address\n", tco->tcobase);
>>> +
>>
>> I know this is the same as the old code, but I think it would make sense to change
>> this as suggested by 0-day and use %px instead.
>>
>> Thanks,
>> Guenter
>
>
Hi Guenter,
This line was changed in v4 and should be reverted. It should be using the mmio_addr
physical address with '0x%08x' formatting instead of tco->tcobase. This would be:
dev_info(dev, "Using 0x%08x for watchdog MMIO address\n", mmio_addr);
The dmesg then provides:
[ 5.972921] sp5100_tco: SP5100/SB800 TCO WatchDog Timer Driver
[ 5.978238] sp5100-tco sp5100-tco: Using 0xfeb00000 for watchdog MMIO address
[ 5.978252] sp5100-tco sp5100-tco: Watchdog hardware is disabled
Do your agree?
Regards,
Terry
next prev parent reply other threads:[~2022-02-01 20:32 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-30 19:12 [PATCH v4 0/4] Watchdog: sp5100_tco: Replace cd6h/cd7h port I/O accesses with MMIO accesses Terry Bowman
2022-01-30 19:12 ` [PATCH v4 1/4] Watchdog: sp5100_tco: Move timer initialization into function Terry Bowman
2022-01-30 19:12 ` [PATCH v4 2/4] Watchdog: sp5100_tco: Refactor MMIO base address initialization Terry Bowman
2022-01-31 2:52 ` kernel test robot
2022-01-31 3:13 ` kernel test robot
2022-02-01 15:31 ` Guenter Roeck
2022-02-01 16:46 ` Terry Bowman
2022-02-01 20:32 ` Terry Bowman [this message]
2022-02-01 22:36 ` Guenter Roeck
2022-01-30 19:12 ` [PATCH v4 3/4] Watchdog: sp5100_tco: Add initialization using EFCH MMIO Terry Bowman
2022-01-31 5:37 ` kernel test robot
2022-01-31 5:58 ` kernel test robot
2022-01-30 19:12 ` [PATCH v4 4/4] Watchdog: sp5100_tco: Enable Family 17h+ CPUs Terry Bowman
2022-02-07 12:44 ` [PATCH v4 0/4] Watchdog: sp5100_tco: Replace cd6h/cd7h port I/O accesses with MMIO accesses Jean Delvare
2022-02-07 13:03 ` Wolfram Sang
2022-02-08 9:45 ` Jean Delvare
2022-02-08 10:00 ` Wolfram Sang
2022-02-08 14:20 ` Jean Delvare
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