[PATCH v2 0/8] ath10k: fixes 2013-10-15

[PATCH v2 0/8] ath10k: fixes 2013-10-15

[Kalle Valo]

This is Michal's patchset which he said:

  This is a bunch of fixes I've had queued up for
  some time now. I was reluctant to send them without some additional checks
  and because some of the fixes are not ideal. At least we can get a discussion
  going if anything raises any serious concern.

For v2 I added one patch myself, modified "ath10k: fix device initialization
routine" to use ath10k_pci_write32() style of wrappers and fixed long line warnings
from checkpatch.

---

Kalle Valo (1):
      ath10k: implement ath10k_pci_soc_read/write32()

Michal Kazior (7):
      ath10k: prevent starting monitor without a vdev
      ath10k: add sanity checks for monitor management
      ath10k: fix endianess in prints
      ath10k: fix NSS reporting in RX
      ath10k: fix NULL deref upon early FW crash
      ath10k: fix device initialization routine
      ath10k: fix FW crashes on heavy TX on 10.1.389 AP FW


 drivers/net/wireless/ath/ath10k/ce.c     |   11 ++
 drivers/net/wireless/ath/ath10k/core.c   |    3 -
 drivers/net/wireless/ath/ath10k/htt_tx.c |   11 +-
 drivers/net/wireless/ath/ath10k/hw.h     |    7 ++
 drivers/net/wireless/ath/ath10k/mac.c    |   25 +++++-
 drivers/net/wireless/ath/ath10k/pci.c    |  135 ++++++++++++++++++------------
 drivers/net/wireless/ath/ath10k/pci.h    |   20 ++++
 drivers/net/wireless/ath/ath10k/txrx.c   |    2 
 drivers/net/wireless/ath/ath10k/wmi.c    |   16 ++--
 9 files changed, 158 insertions(+), 72 deletions(-)

[PATCH v2 1/8] ath10k: prevent starting monitor without a vdev

[Kalle Valo]

From: Michal Kazior <michal.kazior@tieto.com>

This fixes issue with interface bridging.

Linux bridging sets promiscuous mode for all
interfaces that are in a bridge. This translates
to configure_filter() being called in a mac80211
driver.

Before the patch operational interface would be
started and upped again when promiscuous mode was
enabled causing all sorts of strange issues:

 * no HTT RX happening (i.e. no traffic)
 * FW crash upon driver reload/unload

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath10k/mac.c |   10 ++++++++--
 1 file changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/mac.c b/drivers/net/wireless/ath/ath10k/mac.c
index 0b1cc51..527343d 100644
--- a/drivers/net/wireless/ath/ath10k/mac.c
+++ b/drivers/net/wireless/ath/ath10k/mac.c
@@ -2265,8 +2265,14 @@ static void ath10k_configure_filter(struct ieee80211_hw *hw,
 	*total_flags &= SUPPORTED_FILTERS;
 	ar->filter_flags = *total_flags;
 
+	/* Monitor must not be started if it wasn't created first.
+	 * Promiscuous mode may be started on a non-monitor interface - in
+	 * such case the monitor vdev is not created so starting the
+	 * monitor makes no sense. Since ath10k uses no special RX filters
+	 * (only BSS filter in STA mode) there's no need for any special
+	 * action here. */
 	if ((ar->filter_flags & FIF_PROMISC_IN_BSS) &&
-	    !ar->monitor_enabled) {
+	    !ar->monitor_enabled && ar->monitor_present) {
 		ath10k_dbg(ATH10K_DBG_MAC, "mac monitor %d start\n",
 			   ar->monitor_vdev_id);
 
@@ -2274,7 +2280,7 @@ static void ath10k_configure_filter(struct ieee80211_hw *hw,
 		if (ret)
 			ath10k_warn("Unable to start monitor mode\n");
 	} else if (!(ar->filter_flags & FIF_PROMISC_IN_BSS) &&
-		   ar->monitor_enabled) {
+		   ar->monitor_enabled && ar->monitor_present) {
 		ath10k_dbg(ATH10K_DBG_MAC, "mac monitor %d stop\n",
 			   ar->monitor_vdev_id);
 

[PATCH v2 2/8] ath10k: add sanity checks for monitor management

[Kalle Valo]

From: Michal Kazior <michal.kazior@tieto.com>

Add a few checks and warnings to make it easier to
track any kind of monitor vdev mismanagement.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath10k/mac.c |   15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/drivers/net/wireless/ath/ath10k/mac.c b/drivers/net/wireless/ath/ath10k/mac.c
index 527343d..da23c3f 100644
--- a/drivers/net/wireless/ath/ath10k/mac.c
+++ b/drivers/net/wireless/ath/ath10k/mac.c
@@ -516,6 +516,11 @@ static int ath10k_monitor_start(struct ath10k *ar, int vdev_id)
 
 	lockdep_assert_held(&ar->conf_mutex);
 
+	if (!ar->monitor_present) {
+		ath10k_warn("mac montor stop -- monitor is not present\n");
+		return -EINVAL;
+	}
+
 	arg.vdev_id = vdev_id;
 	arg.channel.freq = channel->center_freq;
 	arg.channel.band_center_freq1 = ar->hw->conf.chandef.center_freq1;
@@ -566,6 +571,16 @@ static int ath10k_monitor_stop(struct ath10k *ar)
 
 	lockdep_assert_held(&ar->conf_mutex);
 
+	if (!ar->monitor_present) {
+		ath10k_warn("mac montor stop -- monitor is not present\n");
+		return -EINVAL;
+	}
+
+	if (!ar->monitor_enabled) {
+		ath10k_warn("mac montor stop -- monitor is not enabled\n");
+		return -EINVAL;
+	}
+
 	ret = ath10k_wmi_vdev_down(ar, ar->monitor_vdev_id);
 	if (ret)
 		ath10k_warn("Monitor vdev down failed: %d\n", ret);

[PATCH v2 3/8] ath10k: fix endianess in prints

[Kalle Valo]

From: Michal Kazior <michal.kazior@tieto.com>

This fixes incorrect values being printed on
big-endian hosts.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath10k/wmi.c |   16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/wmi.c b/drivers/net/wireless/ath/ath10k/wmi.c
index 77238af..a796d0b 100644
--- a/drivers/net/wireless/ath/ath10k/wmi.c
+++ b/drivers/net/wireless/ath/ath10k/wmi.c
@@ -2211,7 +2211,7 @@ static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
 	}
 
 	ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
-		   __cpu_to_le32(ar->wmi.num_mem_chunks));
+		   ar->wmi.num_mem_chunks);
 
 	cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
 
@@ -2224,10 +2224,10 @@ static int ath10k_wmi_main_cmd_init(struct ath10k *ar)
 			__cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
 
 		ath10k_dbg(ATH10K_DBG_WMI,
-			   "wmi chunk %d len %d requested, addr 0x%x\n",
+			   "wmi chunk %d len %d requested, addr 0x%llx\n",
 			   i,
-			   cmd->host_mem_chunks[i].size,
-			   cmd->host_mem_chunks[i].ptr);
+			   ar->wmi.mem_chunks[i].len,
+			   (unsigned long long)ar->wmi.mem_chunks[i].paddr);
 	}
 out:
 	memcpy(&cmd->resource_config, &config, sizeof(config));
@@ -2302,7 +2302,7 @@ static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
 	}
 
 	ath10k_dbg(ATH10K_DBG_WMI, "wmi sending %d memory chunks info.\n",
-		   __cpu_to_le32(ar->wmi.num_mem_chunks));
+		   ar->wmi.num_mem_chunks);
 
 	cmd->num_host_mem_chunks = __cpu_to_le32(ar->wmi.num_mem_chunks);
 
@@ -2315,10 +2315,10 @@ static int ath10k_wmi_10x_cmd_init(struct ath10k *ar)
 			__cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
 
 		ath10k_dbg(ATH10K_DBG_WMI,
-			   "wmi chunk %d len %d requested, addr 0x%x\n",
+			   "wmi chunk %d len %d requested, addr 0x%llx\n",
 			   i,
-			   cmd->host_mem_chunks[i].size,
-			   cmd->host_mem_chunks[i].ptr);
+			   ar->wmi.mem_chunks[i].len,
+			   (unsigned long long)ar->wmi.mem_chunks[i].paddr);
 	}
 out:
 	memcpy(&cmd->resource_config, &config, sizeof(config));

[PATCH v2 4/8] ath10k: fix NSS reporting in RX

[Kalle Valo]

From: Michal Kazior <michal.kazior@tieto.com>

NSTS values reported in the VHT-SIG-A1 are 0
through 7 but they actually describe number of
streams 1 through 8.

1SS frames were dropped. This patch fixes this.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath10k/txrx.c |    2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/net/wireless/ath/ath10k/txrx.c b/drivers/net/wireless/ath/ath10k/txrx.c
index 5ae373a..c511f91 100644
--- a/drivers/net/wireless/ath/ath10k/txrx.c
+++ b/drivers/net/wireless/ath/ath10k/txrx.c
@@ -183,7 +183,7 @@ static void process_rx_rates(struct ath10k *ar, struct htt_rx_info *info,
 		/* VHT-SIG-A1 in info 1, VHT-SIG-A2 in info2
 		   TODO check this */
 		mcs = (info2 >> 4) & 0x0F;
-		nss = (info1 >> 10) & 0x07;
+		nss = ((info1 >> 10) & 0x07) + 1;
 		bw = info1 & 3;
 		sgi = info2 & 1;
 

[PATCH v2 5/8] ath10k: fix NULL deref upon early FW crash

[Kalle Valo]

From: Michal Kazior <michal.kazior@tieto.com>

If firmware crashes during FW probing it would try
to perform FW recovery which uses mac80211
workqueue before registering to mac80211.

Using internal workqueue solves the problem.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath10k/core.c |    3 ++-
 drivers/net/wireless/ath/ath10k/pci.c  |    2 +-
 2 files changed, 3 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c
index 1129994..2a360ca 100644
--- a/drivers/net/wireless/ath/ath10k/core.c
+++ b/drivers/net/wireless/ath/ath10k/core.c
@@ -664,7 +664,8 @@ static void ath10k_core_restart(struct work_struct *work)
 		ieee80211_restart_hw(ar->hw);
 		break;
 	case ATH10K_STATE_OFF:
-		/* this can happen if driver is being unloaded */
+		/* this can happen if driver is being unloaded
+		 * or if the crash happens during FW probing */
 		ath10k_warn("cannot restart a device that hasn't been started\n");
 		break;
 	case ATH10K_STATE_RESTARTING:
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index f8d59c7..d09f8a2 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -777,7 +777,7 @@ static void ath10k_pci_hif_dump_area(struct ath10k *ar)
 			   reg_dump_values[i + 2],
 			   reg_dump_values[i + 3]);
 
-	ieee80211_queue_work(ar->hw, &ar->restart_work);
+	queue_work(ar->workqueue, &ar->restart_work);
 }
 
 static void ath10k_pci_hif_send_complete_check(struct ath10k *ar, u8 pipe,

[PATCH v2 6/8] ath10k: implement ath10k_pci_soc_read/write32()

[Kalle Valo]

To make it easier to access SOC registers. No functional
changes.

Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath10k/pci.c |    3 +--
 drivers/net/wireless/ath/ath10k/pci.h |   10 ++++++++++
 2 files changed, 11 insertions(+), 2 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index d09f8a2..5c78383 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -2454,8 +2454,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
 		return ret;
 	}
 
-	chip_id = ath10k_pci_read32(ar,
-				    RTC_SOC_BASE_ADDRESS + SOC_CHIP_ID_ADDRESS);
+	chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
 
 	ath10k_do_pci_sleep(ar);
 
diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h
index 52fb7b9..a304c33 100644
--- a/drivers/net/wireless/ath/ath10k/pci.h
+++ b/drivers/net/wireless/ath/ath10k/pci.h
@@ -318,6 +318,16 @@ static inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset)
 	return ioread32(ar_pci->mem + offset);
 }
 
+static inline u32 ath10k_pci_soc_read32(struct ath10k *ar, u32 addr)
+{
+	return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr);
+}
+
+static inline void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val)
+{
+	ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val);
+}
+
 int ath10k_do_pci_wake(struct ath10k *ar);
 void ath10k_do_pci_sleep(struct ath10k *ar);
 

Re: [PATCH v2 6/8] ath10k: implement ath10k_pci_soc_read/write32()

[Michal Kazior]

On 16 October 2013 06:46, Kalle Valo <kvalo@qca.qualcomm.com> wrote:
> To make it easier to access SOC registers. No functional
> changes.
>
> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
> ---
>  drivers/net/wireless/ath/ath10k/pci.c |    3 +--
>  drivers/net/wireless/ath/ath10k/pci.h |   10 ++++++++++
>  2 files changed, 11 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
> index d09f8a2..5c78383 100644
> --- a/drivers/net/wireless/ath/ath10k/pci.c
> +++ b/drivers/net/wireless/ath/ath10k/pci.c
> @@ -2454,8 +2454,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
>                 return ret;
>         }
>
> -       chip_id = ath10k_pci_read32(ar,
> -                                   RTC_SOC_BASE_ADDRESS + SOC_CHIP_ID_ADDRESS);
> +       chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
>
>         ath10k_do_pci_sleep(ar);
>
> diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h
> index 52fb7b9..a304c33 100644
> --- a/drivers/net/wireless/ath/ath10k/pci.h
> +++ b/drivers/net/wireless/ath/ath10k/pci.h
> @@ -318,6 +318,16 @@ static inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset)
>         return ioread32(ar_pci->mem + offset);
>  }
>
> +static inline u32 ath10k_pci_soc_read32(struct ath10k *ar, u32 addr)
> +{
> +       return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr);
> +}
> +
> +static inline void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val)
> +{
> +       ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val);
> +}
> +

I'm not entirely sure about this. There are a couple of soc address
groups (RTC_SOC, RTC_WMAC, SOC_PCIE, SOC_CORE, ..).

I'd rather use just raw ioread/iowrite than have all those wrappers. I
think the reason for having ath10k_pci_{read,write}32 was the HW v1
workaround. Do we really need to keep it?


Michał

Re: [PATCH v2 6/8] ath10k: implement ath10k_pci_soc_read/write32()

[Kalle Valo]

Michal Kazior <michal.kazior@tieto.com> writes:

> On 16 October 2013 06:46, Kalle Valo <kvalo@qca.qualcomm.com> wrote:
>> To make it easier to access SOC registers. No functional
>> changes.
>>
>> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
>> ---
>>  drivers/net/wireless/ath/ath10k/pci.c |    3 +--
>>  drivers/net/wireless/ath/ath10k/pci.h |   10 ++++++++++
>>  2 files changed, 11 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
>> index d09f8a2..5c78383 100644
>> --- a/drivers/net/wireless/ath/ath10k/pci.c
>> +++ b/drivers/net/wireless/ath/ath10k/pci.c
>> @@ -2454,8 +2454,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
>>                 return ret;
>>         }
>>
>> -       chip_id = ath10k_pci_read32(ar,
>> -                                   RTC_SOC_BASE_ADDRESS + SOC_CHIP_ID_ADDRESS);
>> +       chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
>>
>>         ath10k_do_pci_sleep(ar);
>>
>> diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h
>> index 52fb7b9..a304c33 100644
>> --- a/drivers/net/wireless/ath/ath10k/pci.h
>> +++ b/drivers/net/wireless/ath/ath10k/pci.h
>> @@ -318,6 +318,16 @@ static inline u32 ath10k_pci_read32(struct ath10k *ar, u32 offset)
>>         return ioread32(ar_pci->mem + offset);
>>  }
>>
>> +static inline u32 ath10k_pci_soc_read32(struct ath10k *ar, u32 addr)
>> +{
>> +       return ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS + addr);
>> +}
>> +
>> +static inline void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val)
>> +{
>> +       ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val);
>> +}
>> +
>
> I'm not entirely sure about this. There are a couple of soc address
> groups (RTC_SOC, RTC_WMAC, SOC_PCIE, SOC_CORE, ..).

And then we can have different functions for each group.

> I'd rather use just raw ioread/iowrite than have all those wrappers.

Well, I again would prefer to have clean interfaces instead of doing
address arithmetic in every call :)

> I think the reason for having ath10k_pci_{read,write}32 was the HW v1
> workaround.

No, it was also to make the code simple.

> Do we really need to keep it?

In my opinion yes. What is the negative side of keeping them? Why don't
you like these wrappers?

-- 
Kalle Valo

[PATCH v2 7/8] ath10k: fix device initialization routine

[Kalle Valo]

From: Michal Kazior <michal.kazior@tieto.com>

Hardware revision 2 does not support cold reset
correctly. As such it would sometimes lead to host
machine freeze or data bus errors.

The patch introduces warm reset function which is
used instead of the cold reset one. It also moves
the reset before interrupts are being set up to
prevent any kind of spurious interrupts from being
handled.

kvalo: use ath10k_pci_write32() style wrappers, fix long
lines

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath10k/hw.h  |    7 ++
 drivers/net/wireless/ath/ath10k/pci.c |  130 ++++++++++++++++++++-------------
 drivers/net/wireless/ath/ath10k/pci.h |   10 +++
 3 files changed, 97 insertions(+), 50 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/hw.h b/drivers/net/wireless/ath/ath10k/hw.h
index 8aeb46d..2032737 100644
--- a/drivers/net/wireless/ath/ath10k/hw.h
+++ b/drivers/net/wireless/ath/ath10k/hw.h
@@ -204,8 +204,11 @@ enum ath10k_mcast2ucast_mode {
 #define WLAN_ANALOG_INTF_PCIE_BASE_ADDRESS	0x0006c000
 #define PCIE_LOCAL_BASE_ADDRESS			0x00080000
 
+#define SOC_RESET_CONTROL_ADDRESS		0x00000000
 #define SOC_RESET_CONTROL_OFFSET		0x00000000
 #define SOC_RESET_CONTROL_SI0_RST_MASK		0x00000001
+#define SOC_RESET_CONTROL_CE_RST_MASK		0x00040000
+#define SOC_RESET_CONTROL_CPU_WARM_RST_MASK	0x00000040
 #define SOC_CPU_CLOCK_OFFSET			0x00000020
 #define SOC_CPU_CLOCK_STANDARD_LSB		0
 #define SOC_CPU_CLOCK_STANDARD_MASK		0x00000003
@@ -215,6 +218,8 @@ enum ath10k_mcast2ucast_mode {
 #define SOC_LPO_CAL_OFFSET			0x000000e0
 #define SOC_LPO_CAL_ENABLE_LSB			20
 #define SOC_LPO_CAL_ENABLE_MASK			0x00100000
+#define SOC_LF_TIMER_CONTROL0_ADDRESS		0x00000050
+#define SOC_LF_TIMER_CONTROL0_ENABLE_MASK	0x00000004
 
 #define SOC_CHIP_ID_ADDRESS			0x000000ec
 #define SOC_CHIP_ID_REV_LSB			8
@@ -269,8 +274,10 @@ enum ath10k_mcast2ucast_mode {
 #define CORE_CTRL_CPU_INTR_MASK			0x00002000
 #define CORE_CTRL_ADDRESS			0x0000
 #define PCIE_INTR_ENABLE_ADDRESS		0x0008
+#define PCIE_INTR_CAUSE_ADDRESS			0x000c
 #define PCIE_INTR_CLR_ADDRESS			0x0014
 #define SCRATCH_3_ADDRESS			0x0030
+#define CPU_INTR_ADDRESS			0x0010
 
 /* Firmware indications to the Host via SCRATCH_3 register. */
 #define FW_INDICATOR_ADDRESS	(SOC_CORE_BASE_ADDRESS + SCRATCH_3_ADDRESS)
diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c
index 5c78383..1e9cfcc9 100644
--- a/drivers/net/wireless/ath/ath10k/pci.c
+++ b/drivers/net/wireless/ath/ath10k/pci.c
@@ -52,7 +52,6 @@ static int ath10k_pci_post_rx_pipe(struct ath10k_pci_pipe *pipe_info,
 					     int num);
 static void ath10k_pci_rx_pipe_cleanup(struct ath10k_pci_pipe *pipe_info);
 static void ath10k_pci_stop_ce(struct ath10k *ar);
-static void ath10k_pci_device_reset(struct ath10k *ar);
 static int ath10k_pci_reset_target(struct ath10k *ar);
 static int ath10k_pci_start_intr(struct ath10k *ar);
 static void ath10k_pci_stop_intr(struct ath10k *ar);
@@ -1825,16 +1824,78 @@ static void ath10k_pci_fw_interrupt_handler(struct ath10k *ar)
 	ath10k_pci_sleep(ar);
 }
 
-static int ath10k_pci_hif_power_up(struct ath10k *ar)
+static int ath10k_pci_warm_reset(struct ath10k *ar)
 {
 	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
 	int ret;
+	u32 val;
 
-	ret = ath10k_pci_start_intr(ar);
-	if (ret) {
-		ath10k_err("could not start interrupt handling (%d)\n", ret);
-		goto err;
-	}
+	ath10k_dbg(ATH10K_DBG_BOOT, "performing warm chip reset\n");
+
+	ret = ath10k_do_pci_wake(ar);
+	if (ret)
+		return ret;
+
+	ath10k_dbg(ATH10K_DBG_BOOT,
+		   "pci intr cause 0x%08x cpu intr 0x%08x (before)\n",
+		   ath10k_pci_core_read32(ar, PCIE_INTR_CAUSE_ADDRESS),
+		   ath10k_pci_core_read32(ar, CPU_INTR_ADDRESS));
+
+	/* disable pending irqs */
+	ath10k_pci_core_write32(ar, PCIE_INTR_ENABLE_ADDRESS, 0);
+	ath10k_pci_core_write32(ar, PCIE_INTR_CLR_ADDRESS, ~0);
+
+	msleep(100);
+
+	/* clear fw indicator */
+	ath10k_pci_write32(ar, ar_pci->fw_indicator_address, 0);
+
+	/* clear target LF timer interrupts */
+	val = ath10k_pci_soc_read32(ar, SOC_LF_TIMER_CONTROL0_ADDRESS);
+	ath10k_pci_soc_write32(ar, SOC_LF_TIMER_CONTROL0_ADDRESS,
+			       val & ~SOC_LF_TIMER_CONTROL0_ENABLE_MASK);
+
+	/* reset CE */
+	val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS);
+	val |= SOC_RESET_CONTROL_CE_RST_MASK;
+	ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS, val);
+	val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS);
+
+	msleep(10);
+
+	/* unreset CE */
+	val &= ~SOC_RESET_CONTROL_CE_RST_MASK;
+	ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS, val);
+	val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS);
+
+	msleep(10);
+
+	ath10k_dbg(ATH10K_DBG_BOOT,
+		   "pci intr cause 0x%08x cpu intr 0x%08x (after)\n",
+		   ath10k_pci_core_read32(ar, PCIE_INTR_CAUSE_ADDRESS),
+		   ath10k_pci_core_read32(ar, CPU_INTR_ADDRESS));
+
+	/* CPU warm reset */
+	val = ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS);
+	ath10k_pci_soc_write32(ar, SOC_RESET_CONTROL_ADDRESS,
+			       val | SOC_RESET_CONTROL_CPU_WARM_RST_MASK);
+
+	ath10k_dbg(ATH10K_DBG_BOOT, "soc reset control 0x%08x\n",
+		   ath10k_pci_soc_read32(ar, SOC_RESET_CONTROL_ADDRESS));
+
+	msleep(100);
+
+	ath10k_dbg(ATH10K_DBG_BOOT, "warm reset complete\n");
+
+	ath10k_do_pci_sleep(ar);
+
+	return ret;
+}
+
+static int ath10k_pci_hif_power_up(struct ath10k *ar)
+{
+	struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
+	int ret;
 
 	/*
 	 * Bring the target up cleanly.
@@ -1845,8 +1906,19 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar)
 	 * (aux) powered and running. On a subsequent driver load, the Target
 	 * is in an unexpected state. We try to catch that here in order to
 	 * reset the Target and retry the probe.
+	 *
+	 * Only HW v2 supports warm reset. Since ath10k does not support v1
+	 * anymore just forget about cold reset which is broken on v2 for now.
 	 */
-	ath10k_pci_device_reset(ar);
+	ret = ath10k_pci_warm_reset(ar);
+	if (ret)
+		goto err;
+
+	ret = ath10k_pci_start_intr(ar);
+	if (ret) {
+		ath10k_err("could not start interrupt handling (%d)\n", ret);
+		goto err;
+	}
 
 	ret = ath10k_pci_reset_target(ar);
 	if (ret)
@@ -2278,48 +2350,6 @@ static int ath10k_pci_reset_target(struct ath10k *ar)
 	return 0;
 }
 
-static void ath10k_pci_device_reset(struct ath10k *ar)
-{
-	int i;
-	u32 val;
-
-	if (!SOC_GLOBAL_RESET_ADDRESS)
-		return;
-
-	ath10k_pci_reg_write32(ar, PCIE_SOC_WAKE_ADDRESS,
-			       PCIE_SOC_WAKE_V_MASK);
-	for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {
-		if (ath10k_pci_target_is_awake(ar))
-			break;
-		msleep(1);
-	}
-
-	/* Put Target, including PCIe, into RESET. */
-	val = ath10k_pci_reg_read32(ar, SOC_GLOBAL_RESET_ADDRESS);
-	val |= 1;
-	ath10k_pci_reg_write32(ar, SOC_GLOBAL_RESET_ADDRESS, val);
-
-	for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {
-		if (ath10k_pci_reg_read32(ar, RTC_STATE_ADDRESS) &
-					  RTC_STATE_COLD_RESET_MASK)
-			break;
-		msleep(1);
-	}
-
-	/* Pull Target, including PCIe, out of RESET. */
-	val &= ~1;
-	ath10k_pci_reg_write32(ar, SOC_GLOBAL_RESET_ADDRESS, val);
-
-	for (i = 0; i < ATH_PCI_RESET_WAIT_MAX; i++) {
-		if (!(ath10k_pci_reg_read32(ar, RTC_STATE_ADDRESS) &
-					    RTC_STATE_COLD_RESET_MASK))
-			break;
-		msleep(1);
-	}
-
-	ath10k_pci_reg_write32(ar, PCIE_SOC_WAKE_ADDRESS, PCIE_SOC_WAKE_RESET);
-}
-
 static void ath10k_pci_dump_features(struct ath10k_pci *ar_pci)
 {
 	int i;
diff --git a/drivers/net/wireless/ath/ath10k/pci.h b/drivers/net/wireless/ath/ath10k/pci.h
index a304c33..28e8ca2 100644
--- a/drivers/net/wireless/ath/ath10k/pci.h
+++ b/drivers/net/wireless/ath/ath10k/pci.h
@@ -328,6 +328,16 @@ static inline void ath10k_pci_soc_write32(struct ath10k *ar, u32 addr, u32 val)
 	ath10k_pci_write32(ar, RTC_SOC_BASE_ADDRESS + addr, val);
 }
 
+static inline u32 ath10k_pci_core_read32(struct ath10k *ar, u32 addr)
+{
+	return ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + addr);
+}
+
+static inline void ath10k_pci_core_write32(struct ath10k *ar, u32 addr, u32 val)
+{
+	ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + addr, val);
+}
+
 int ath10k_do_pci_wake(struct ath10k *ar);
 void ath10k_do_pci_sleep(struct ath10k *ar);
 

Re: [PATCH v2 7/8] ath10k: fix device initialization routine

[Michal Kazior]

On 16 October 2013 06:46, Kalle Valo <kvalo@qca.qualcomm.com> wrote:
> From: Michal Kazior <michal.kazior@tieto.com>
>
> Hardware revision 2 does not support cold reset
> correctly. As such it would sometimes lead to host
> machine freeze or data bus errors.
>
> The patch introduces warm reset function which is
> used instead of the cold reset one. It also moves
> the reset before interrupts are being set up to
> prevent any kind of spurious interrupts from being
> handled.
>
> kvalo: use ath10k_pci_write32() style wrappers, fix long
> lines
>
> Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
> ---

[...]

> @@ -1825,16 +1824,78 @@ static void ath10k_pci_fw_interrupt_handler(struct ath10k *ar)
>         ath10k_pci_sleep(ar);
>  }
>
> -static int ath10k_pci_hif_power_up(struct ath10k *ar)
> +static int ath10k_pci_warm_reset(struct ath10k *ar)
>  {
>         struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
>         int ret;
> +       u32 val;
>
> -       ret = ath10k_pci_start_intr(ar);
> -       if (ret) {
> -               ath10k_err("could not start interrupt handling (%d)\n", ret);
> -               goto err;
> -       }
> +       ath10k_dbg(ATH10K_DBG_BOOT, "performing warm chip reset\n");
> +
> +       ret = ath10k_do_pci_wake(ar);
> +       if (ret)
> +               return ret;
> +
> +       ath10k_dbg(ATH10K_DBG_BOOT,
> +                  "pci intr cause 0x%08x cpu intr 0x%08x (before)\n",
> +                  ath10k_pci_core_read32(ar, PCIE_INTR_CAUSE_ADDRESS),
> +                  ath10k_pci_core_read32(ar, CPU_INTR_ADDRESS));
> +
> +       /* disable pending irqs */
> +       ath10k_pci_core_write32(ar, PCIE_INTR_ENABLE_ADDRESS, 0);
> +       ath10k_pci_core_write32(ar, PCIE_INTR_CLR_ADDRESS, ~0);

These use SOC_CORE_BASE_ADDRESS as the suffix, not the RTC_SOC_BASE_ADDRESS.


> +       ath10k_dbg(ATH10K_DBG_BOOT,
> +                  "pci intr cause 0x%08x cpu intr 0x%08x (after)\n",
> +                  ath10k_pci_core_read32(ar, PCIE_INTR_CAUSE_ADDRESS),
> +                  ath10k_pci_core_read32(ar, CPU_INTR_ADDRESS));

Ditto. These are in SOC_CORE_BASE_ADDRESS group.


Michał

Re: [PATCH v2 7/8] ath10k: fix device initialization routine

[Kalle Valo]

Michal Kazior <michal.kazior@tieto.com> writes:

>> +       /* disable pending irqs */
>> +       ath10k_pci_core_write32(ar, PCIE_INTR_ENABLE_ADDRESS, 0);
>> +       ath10k_pci_core_write32(ar, PCIE_INTR_CLR_ADDRESS, ~0);
>
> These use SOC_CORE_BASE_ADDRESS as the suffix, not the RTC_SOC_BASE_ADDRESS.

But I am using SOC_CORE_BASE_ADDRESS, right?

static inline u32 ath10k_pci_core_read32(struct ath10k *ar, u32 addr)
{
	return ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + addr);
}

static inline void ath10k_pci_core_write32(struct ath10k *ar, u32 addr, u32 val)
{
	ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + addr, val);
}

-- 
Kalle Valo

Re: [PATCH v2 7/8] ath10k: fix device initialization routine

[Michal Kazior]

On 16 October 2013 08:57, Kalle Valo <kvalo@qca.qualcomm.com> wrote:
> Michal Kazior <michal.kazior@tieto.com> writes:
>
>>> +       /* disable pending irqs */
>>> +       ath10k_pci_core_write32(ar, PCIE_INTR_ENABLE_ADDRESS, 0);
>>> +       ath10k_pci_core_write32(ar, PCIE_INTR_CLR_ADDRESS, ~0);
>>
>> These use SOC_CORE_BASE_ADDRESS as the suffix, not the RTC_SOC_BASE_ADDRESS.
>
> But I am using SOC_CORE_BASE_ADDRESS, right?

Ah, right. Sorry. My eyesight failed me :) Those function names seem a
little confusing (_core_ for SOC_CORE and _soc_ for RTC_SOC)


Michał

Re: [PATCH v2 7/8] ath10k: fix device initialization routine

[Kalle Valo]

Michal Kazior <michal.kazior@tieto.com> writes:

> On 16 October 2013 08:57, Kalle Valo <kvalo@qca.qualcomm.com> wrote:
>> Michal Kazior <michal.kazior@tieto.com> writes:
>>
>>>> +       /* disable pending irqs */
>>>> +       ath10k_pci_core_write32(ar, PCIE_INTR_ENABLE_ADDRESS, 0);
>>>> +       ath10k_pci_core_write32(ar, PCIE_INTR_CLR_ADDRESS, ~0);
>>>
>>> These use SOC_CORE_BASE_ADDRESS as the suffix, not the RTC_SOC_BASE_ADDRESS.
>>
>> But I am using SOC_CORE_BASE_ADDRESS, right?
>
> Ah, right. Sorry. My eyesight failed me :) Those function names seem a
> little confusing (_core_ for SOC_CORE and _soc_ for RTC_SOC)

Yeah, I agree. I didn't research what RTC_SOC stands for, I just assumed
it contains registers for controlling the whole SOC state. That's why I
used "_soc_" here. And CORE registers control just one part of SOC.

-- 
Kalle Valo

[PATCH v2 8/8] ath10k: fix FW crashes on heavy TX on 10.1.389 AP FW

[Kalle Valo]

From: Michal Kazior <michal.kazior@tieto.com>

10.1.389 firmware has some differences in
calculation of number of outstanding HTT TX
completions. This led to FW crashes of 10.1.389
while main firmware branch was unnaffected.

The patch makes sure ath10k doesn't queue up more
MSDUs than it should.

Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
---
 drivers/net/wireless/ath/ath10k/ce.c     |   11 +++++++++++
 drivers/net/wireless/ath/ath10k/htt_tx.c |   11 ++++-------
 2 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/net/wireless/ath/ath10k/ce.c b/drivers/net/wireless/ath/ath10k/ce.c
index e46951b..d243f28 100644
--- a/drivers/net/wireless/ath/ath10k/ce.c
+++ b/drivers/net/wireless/ath/ath10k/ce.c
@@ -1050,6 +1050,17 @@ struct ath10k_ce_pipe *ath10k_ce_init(struct ath10k *ar,
 	u32 ctrl_addr = ath10k_ce_base_address(ce_id);
 	int ret;
 
+	/*
+	 * Make sure there's enough CE ringbuffer entries for HTT TX to avoid
+	 * additional TX locking checks.
+	 *
+	 * For the lack of a better place do the check here.
+	 */
+	BUILD_BUG_ON(TARGET_NUM_MSDU_DESC >
+		     (CE_HTT_H2T_MSG_SRC_NENTRIES - 1));
+	BUILD_BUG_ON(TARGET_10X_NUM_MSDU_DESC >
+		     (CE_HTT_H2T_MSG_SRC_NENTRIES - 1));
+
 	ret = ath10k_pci_wake(ar);
 	if (ret)
 		return NULL;
diff --git a/drivers/net/wireless/ath/ath10k/htt_tx.c b/drivers/net/wireless/ath/ath10k/htt_tx.c
index d9335e9..f1d36d2 100644
--- a/drivers/net/wireless/ath/ath10k/htt_tx.c
+++ b/drivers/net/wireless/ath/ath10k/htt_tx.c
@@ -85,16 +85,13 @@ void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
 
 int ath10k_htt_tx_attach(struct ath10k_htt *htt)
 {
-	u8 pipe;
-
 	spin_lock_init(&htt->tx_lock);
 	init_waitqueue_head(&htt->empty_tx_wq);
 
-	/* At the beginning free queue number should hint us the maximum
-	 * queue length */
-	pipe = htt->ar->htc.endpoint[htt->eid].ul_pipe_id;
-	htt->max_num_pending_tx = ath10k_hif_get_free_queue_number(htt->ar,
-								   pipe);
+	if (test_bit(ATH10K_FW_FEATURE_WMI_10X, htt->ar->fw_features))
+		htt->max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC;
+	else
+		htt->max_num_pending_tx = TARGET_NUM_MSDU_DESC;
 
 	ath10k_dbg(ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
 		   htt->max_num_pending_tx);

Re: [PATCH v2 0/8] ath10k: fixes 2013-10-15

[Kalle Valo]

Kalle Valo <kvalo@qca.qualcomm.com> writes:

> This is Michal's patchset which he said:
>
>   This is a bunch of fixes I've had queued up for
>   some time now. I was reluctant to send them without some additional checks
>   and because some of the fixes are not ideal. At least we can get a discussion
>   going if anything raises any serious concern.
>
> For v2 I added one patch myself, modified "ath10k: fix device initialization
> routine" to use ath10k_pci_write32() style of wrappers and fixed long line warnings
> from checkpatch.
>
> ---
>
> Kalle Valo (1):
>       ath10k: implement ath10k_pci_soc_read/write32()
>
> Michal Kazior (7):
>       ath10k: prevent starting monitor without a vdev
>       ath10k: add sanity checks for monitor management
>       ath10k: fix endianess in prints
>       ath10k: fix NSS reporting in RX
>       ath10k: fix NULL deref upon early FW crash
>       ath10k: fix FW crashes on heavy TX on 10.1.389 AP FW

These patches applied.

>       ath10k: fix device initialization routine

I dropped this patch for now, because of some of the warm reset issues.
We need to investigate more.

-- 
Kalle Valo