* [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D
@ 2026-05-11 7:01 Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 01/11] wifi: rtw89: phy: define BB wrap data for RTL8922D variants Ping-Ke Shih
` (10 more replies)
0 siblings, 11 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
The BB wrap is a set of registers to control TX power and shape.
The RTL8922D add more registers to fine tune performance by QAM, bandwidth
and etc. Add them according to hardware design.
Ping-Ke Shih (11):
wifi: rtw89: phy: define BB wrap data for RTL8922D variants
wifi: rtw89: phy: set BB wrap of out-of-band DPD
wifi: rtw89: phy: set BB wrap of DPD by bandwidth
wifi: rtw89: phy: set BB wrap of control options
wifi: rtw89: phy: set BB wrap of QAM threshold
wifi: rtw89: phy: set BB wrap of QAM options
wifi: rtw89: phy: set BB wrap of trigger-base partial band
wifi: rtw89: phy: set BB wrap of CIM3K
wifi: rtw89: phy: change order to align register order
wifi: rtw89: phy: configure control options of BB wrapper by RFSI band
wifi: rtw89: phy: add BB wrapper generation 3 for RTL8922D variant
drivers/net/wireless/realtek/rtw89/chan.c | 2 +
drivers/net/wireless/realtek/rtw89/core.c | 4 +
drivers/net/wireless/realtek/rtw89/core.h | 21 +
drivers/net/wireless/realtek/rtw89/phy.h | 88 +++
drivers/net/wireless/realtek/rtw89/phy_be.c | 517 ++++++++++++------
drivers/net/wireless/realtek/rtw89/reg.h | 73 +++
drivers/net/wireless/realtek/rtw89/rtw8851b.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 +
.../net/wireless/realtek/rtw89/rtw8852bt.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8922a.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 160 +++++-
13 files changed, 699 insertions(+), 172 deletions(-)
base-commit: c1ed02655f9134d6af6a01a58b734329c2f4f22c
--
2.25.1
^ permalink raw reply [flat|nested] 12+ messages in thread
* [PATCH rtw-next 01/11] wifi: rtw89: phy: define BB wrap data for RTL8922D variants
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 02/11] wifi: rtw89: phy: set BB wrap of out-of-band DPD Ping-Ke Shih
` (9 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
The BB wrap is a hardware block to control TX power. Since RTL8922D has
many variants with different CID and RFE types, prepare flow and dummy
struct adopt to configuration functions for coming patches.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/core.c | 4 ++
drivers/net/wireless/realtek/rtw89/core.h | 13 +++++++
drivers/net/wireless/realtek/rtw89/phy.h | 3 ++
drivers/net/wireless/realtek/rtw89/rtw8851b.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8852a.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8852b.c | 1 +
.../net/wireless/realtek/rtw89/rtw8852bt.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8852c.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8922a.c | 1 +
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 38 +++++++++++++++++++
10 files changed, 64 insertions(+)
diff --git a/drivers/net/wireless/realtek/rtw89/core.c b/drivers/net/wireless/realtek/rtw89/core.c
index b85728ceb63c..dafe71aa4876 100644
--- a/drivers/net/wireless/realtek/rtw89/core.c
+++ b/drivers/net/wireless/realtek/rtw89/core.c
@@ -6778,6 +6778,10 @@ int rtw89_chip_info_setup(struct rtw89_dev *rtwdev)
if (ret)
goto out;
+ ret = rtw89_chip_data_setup(rtwdev);
+ if (ret)
+ goto out;
+
rtw89_core_setup_rfe_parms(rtwdev);
rtwdev->ps_mode = rtw89_update_ps_mode(rtwdev);
diff --git a/drivers/net/wireless/realtek/rtw89/core.h b/drivers/net/wireless/realtek/rtw89/core.h
index bccfee7535a7..ab9165fcaf7d 100644
--- a/drivers/net/wireless/realtek/rtw89/core.h
+++ b/drivers/net/wireless/realtek/rtw89/core.h
@@ -27,6 +27,7 @@ struct rtw89_phy_calc_efuse_gain;
struct rtw89_debugfs;
struct rtw89_regd_data;
struct rtw89_wow_cam_info;
+struct rtw89_bb_wrap_data;
struct rtw89_fw_cmd_ofld_info;
extern const struct ieee80211_ops rtw89_ops;
@@ -3828,6 +3829,7 @@ struct rtw89_chip_ops {
enum rtw89_efuse_block block);
int (*read_phycap)(struct rtw89_dev *rtwdev, u8 *phycap_map);
void (*fem_setup)(struct rtw89_dev *rtwdev);
+ int (*data_setup)(struct rtw89_dev *rtwdev);
void (*rfe_gpio)(struct rtw89_dev *rtwdev);
void (*rfk_hw_init)(struct rtw89_dev *rtwdev);
void (*rfk_init)(struct rtw89_dev *rtwdev);
@@ -4574,6 +4576,7 @@ struct rtw89_bb_stat_cfg {
};
struct rtw89_phy_info {
+ const struct rtw89_bb_wrap_data *bb_wrap_data;
struct rtw89_bb_stat_cfg bb_stat_cfg;
};
@@ -7461,6 +7464,16 @@ static inline void rtw89_chip_fem_setup(struct rtw89_dev *rtwdev)
chip->ops->fem_setup(rtwdev);
}
+static inline int rtw89_chip_data_setup(struct rtw89_dev *rtwdev)
+{
+ const struct rtw89_chip_info *chip = rtwdev->chip;
+
+ if (!chip->ops->data_setup)
+ return 0;
+
+ return chip->ops->data_setup(rtwdev);
+}
+
static inline void rtw89_chip_rfe_gpio(struct rtw89_dev *rtwdev)
{
const struct rtw89_chip_info *chip = rtwdev->chip;
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index a6e685654037..e4933bd522b2 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -569,6 +569,9 @@ struct rtw89_phy_rfk_log_fmt {
const struct rtw89_fw_element_hdr *elm[RTW89_PHY_C2H_RFK_LOG_FUNC_NUM];
};
+struct rtw89_bb_wrap_data {
+};
+
struct rtw89_phy_gen_def {
u32 cr_base;
u32 physt_bmp_start;
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8851b.c b/drivers/net/wireless/realtek/rtw89/rtw8851b.c
index e047e716d9e3..2fb54e1fc7ab 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8851b.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8851b.c
@@ -2556,6 +2556,7 @@ static const struct rtw89_chip_ops rtw8851b_chip_ops = {
.read_efuse = rtw8851b_read_efuse,
.read_phycap = rtw8851b_read_phycap,
.fem_setup = NULL,
+ .data_setup = NULL,
.rfe_gpio = rtw8851b_rfe_gpio,
.rfk_hw_init = NULL,
.rfk_init = rtw8851b_rfk_init,
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852a.c b/drivers/net/wireless/realtek/rtw89/rtw8852a.c
index 686e489d42f2..d3b6e8a7f5bd 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8852a.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8852a.c
@@ -2302,6 +2302,7 @@ static const struct rtw89_chip_ops rtw8852a_chip_ops = {
.read_efuse = rtw8852a_read_efuse,
.read_phycap = rtw8852a_read_phycap,
.fem_setup = rtw8852a_fem_setup,
+ .data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = NULL,
.rfk_init = rtw8852a_rfk_init,
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852b.c b/drivers/net/wireless/realtek/rtw89/rtw8852b.c
index 6ab99f72fda7..989ac38fe359 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8852b.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8852b.c
@@ -883,6 +883,7 @@ static const struct rtw89_chip_ops rtw8852b_chip_ops = {
.read_efuse = rtw8852bx_read_efuse,
.read_phycap = rtw8852bx_read_phycap,
.fem_setup = NULL,
+ .data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = NULL,
.rfk_init = rtw8852b_rfk_init,
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852bt.c b/drivers/net/wireless/realtek/rtw89/rtw8852bt.c
index 83de26273100..b58561e141cb 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8852bt.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8852bt.c
@@ -729,6 +729,7 @@ static const struct rtw89_chip_ops rtw8852bt_chip_ops = {
.read_efuse = rtw8852bx_read_efuse,
.read_phycap = rtw8852bx_read_phycap,
.fem_setup = NULL,
+ .data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = NULL,
.rfk_init = rtw8852bt_rfk_init,
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8852c.c b/drivers/net/wireless/realtek/rtw89/rtw8852c.c
index cc278587b532..9ecd140dcdd5 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8852c.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8852c.c
@@ -3091,6 +3091,7 @@ static const struct rtw89_chip_ops rtw8852c_chip_ops = {
.read_efuse = rtw8852c_read_efuse,
.read_phycap = rtw8852c_read_phycap,
.fem_setup = NULL,
+ .data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = NULL,
.rfk_init = rtw8852c_rfk_init,
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922a.c b/drivers/net/wireless/realtek/rtw89/rtw8922a.c
index e6f15ee2a86b..07270e83b778 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922a.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922a.c
@@ -3086,6 +3086,7 @@ static const struct rtw89_chip_ops rtw8922a_chip_ops = {
.read_efuse = rtw8922a_read_efuse,
.read_phycap = rtw8922a_read_phycap,
.fem_setup = NULL,
+ .data_setup = NULL,
.rfe_gpio = NULL,
.rfk_hw_init = rtw8922a_rfk_hw_init,
.rfk_init = rtw8922a_rfk_init,
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index b8b75fca0a1b..66b05aedcf11 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -286,6 +286,15 @@ static const struct rtw89_efuse_block_cfg rtw8922d_efuse_blocks[] = {
[RTW89_EFUSE_BLOCK_ADIE] = {.offset = 0x70000, .size = 0x10},
};
+static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
+};
+
+static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
+};
+
+static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_rfe35_41_44 = {
+};
+
static void rtw8922d_sel_bt_rx_path(struct rtw89_dev *rtwdev, u8 val,
enum rtw89_rf_path rx_path)
{
@@ -918,6 +927,34 @@ static void rtw8922d_power_trim(struct rtw89_dev *rtwdev)
rtw8922d_pad_bias_trim(rtwdev);
}
+static int rtw8922d_data_setup(struct rtw89_dev *rtwdev)
+{
+ const struct rtw89_bb_wrap_data *data;
+ struct rtw89_hal *hal = &rtwdev->hal;
+ bool rfe35_41_44 = false;
+
+ switch (rtwdev->efuse.rfe_type) {
+ case 35:
+ case 41:
+ case 44:
+ rfe35_41_44 = true;
+ break;
+ }
+
+ if (hal->cid == RTL8922D_CID7025) {
+ data = &rtw8922d_bb_wrap_data_7025_default;
+ } else {
+ if (rfe35_41_44)
+ data = &rtw8922d_bb_wrap_data_7090_rfe35_41_44;
+ else
+ data = &rtw8922d_bb_wrap_data_7090_default;
+ }
+
+ rtwdev->phy_info.bb_wrap_data = data;
+
+ return 0;
+}
+
static void rtw8922d_set_channel_mac(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
u8 mac_idx)
@@ -2933,6 +2970,7 @@ static const struct rtw89_chip_ops rtw8922d_chip_ops = {
.read_efuse = rtw8922d_read_efuse,
.read_phycap = rtw8922d_read_phycap,
.fem_setup = NULL,
+ .data_setup = rtw8922d_data_setup,
.rfe_gpio = NULL,
.rfk_hw_init = rtw8922d_rfk_hw_init,
.rfk_init = rtw8922d_rfk_init,
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 02/11] wifi: rtw89: phy: set BB wrap of out-of-band DPD
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 01/11] wifi: rtw89: phy: define BB wrap data for RTL8922D variants Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 03/11] wifi: rtw89: phy: set BB wrap of DPD by bandwidth Ping-Ke Shih
` (8 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
Control the out-of-band DPD (digital pre-distortion) to ensure out-of-band
signal under requirement.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/phy.h | 6 +++
drivers/net/wireless/realtek/rtw89/phy_be.c | 42 +++++++++++--------
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 3 ++
3 files changed, 34 insertions(+), 17 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index e4933bd522b2..0851a56cfe61 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -569,7 +569,13 @@ struct rtw89_phy_rfk_log_fmt {
const struct rtw89_fw_element_hdr *elm[RTW89_PHY_C2H_RFK_LOG_FUNC_NUM];
};
+enum rtw89_mdpd_onoff {
+ MDPD_ON = 0,
+ MDPD_OFF = 1,
+};
+
struct rtw89_bb_wrap_data {
+ u8 mdpd_by_dbw[4];
};
struct rtw89_phy_gen_def {
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index 5cd298a2c91b..94b977d29518 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -886,23 +886,31 @@ static void rtw89_phy_bb_set_oob_dpd_qam_comp_val(struct rtw89_dev *rtwdev,
static void rtw89_phy_bb_set_mdpd_qam_comp_val(struct rtw89_dev *rtwdev,
enum rtw89_mac_idx mac_idx)
{
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH7_BE4, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW7_BE4, 0x0, mac_idx);
+ const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
+ u8 th;
+
+ if (!d)
+ return;
+
+ th = d->mdpd_by_dbw[0];
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_TH7_BE4, th, mac_idx);
+
+ th = d->mdpd_by_dbw[2];
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_CBW160_BE4, B_DPD_CBW160_OW7_BE4, th, mac_idx);
}
static void rtw89_phy_bb_set_cim3k_val(struct rtw89_dev *rtwdev,
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index 66b05aedcf11..326d12da2962 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -287,12 +287,15 @@ static const struct rtw89_efuse_block_cfg rtw8922d_efuse_blocks[] = {
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
+ .mdpd_by_dbw = {MDPD_ON, MDPD_ON, MDPD_ON, MDPD_ON},
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
+ .mdpd_by_dbw = {MDPD_OFF, MDPD_OFF, MDPD_ON, MDPD_ON},
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_rfe35_41_44 = {
+ .mdpd_by_dbw = {MDPD_OFF, MDPD_OFF, MDPD_ON, MDPD_ON},
};
static void rtw8922d_sel_bt_rx_path(struct rtw89_dev *rtwdev, u8 val,
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 03/11] wifi: rtw89: phy: set BB wrap of DPD by bandwidth
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 01/11] wifi: rtw89: phy: define BB wrap data for RTL8922D variants Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 02/11] wifi: rtw89: phy: set BB wrap of out-of-band DPD Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 04/11] wifi: rtw89: phy: set BB wrap of control options Ping-Ke Shih
` (7 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
Apply different settings to out-of-band DPD (digital pre-distortion) by
bandwidth, as hardware defines separate registers.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/phy.h | 15 ++
drivers/net/wireless/realtek/rtw89/phy_be.c | 156 ++++++++++--------
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 27 +++
3 files changed, 127 insertions(+), 71 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index 0851a56cfe61..c7cf99fe46fb 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -569,12 +569,27 @@ struct rtw89_phy_rfk_log_fmt {
const struct rtw89_fw_element_hdr *elm[RTW89_PHY_C2H_RFK_LOG_FUNC_NUM];
};
+enum rtw89_rfsi_ctrl_band {
+ RFSI_CTRL_BAND_5_6GHZ,
+ RFSI_CTRL_BAND_2GHZ,
+
+ RFSI_CTRL_BAND_NUM,
+};
+
enum rtw89_mdpd_onoff {
MDPD_ON = 0,
MDPD_OFF = 1,
};
+enum rtw89_oob_dpd_onoff {
+ OOB_DPD_OFF = 0,
+ OOB_DPD_ON = 1,
+};
+
struct rtw89_bb_wrap_data {
+ struct {
+ u8 oob_dpd_by_cbw[8];
+ } bands[RFSI_CTRL_BAND_NUM];
u8 mdpd_by_dbw[4];
};
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index 94b977d29518..4ba18e821578 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -810,77 +810,91 @@ static void rtw89_phy_bb_wrap_tx_rfsi_qam_comp_val(struct rtw89_dev *rtwdev,
static void rtw89_phy_bb_set_oob_dpd_qam_comp_val(struct rtw89_dev *rtwdev,
enum rtw89_mac_idx mac_idx)
{
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK7_BE4, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK7_BE4, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH7_BE4, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH7_BE4, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH7_BE4, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW7_BE4, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW7_BE4, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW0_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW1_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW2_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW3_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW4_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW5_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW6_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW7_BE4, 0x0, mac_idx);
+ const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
+ u8 th;
+
+ if (!d)
+ return;
+
+ th = d->bands[0].oob_dpd_by_cbw[0];
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_CCK7_BE4, th, mac_idx);
+
+ th = d->bands[0].oob_dpd_by_cbw[1];
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_CCK7_BE4, th, mac_idx);
+
+ th = d->bands[0].oob_dpd_by_cbw[2];
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW20_BE4, B_OOB_CBW20_TH7_BE4, th, mac_idx);
+
+ th = d->bands[0].oob_dpd_by_cbw[3];
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_TH7_BE4, th, mac_idx);
+
+ th = d->bands[0].oob_dpd_by_cbw[4];
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_TH7_BE4, th, mac_idx);
+
+ th = d->bands[0].oob_dpd_by_cbw[5];
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW20_OW7_BE4, th, mac_idx);
+
+ th = d->bands[0].oob_dpd_by_cbw[6];
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW40_BE4, B_OOB_CBW40_OW7_BE4, th, mac_idx);
+
+ th = d->bands[0].oob_dpd_by_cbw[7];
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW0_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW1_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW2_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW3_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW4_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW5_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW6_BE4, th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_OOB_CBW80_BE4, B_OOB_CBW80_OW7_BE4, th, mac_idx);
}
static void rtw89_phy_bb_set_mdpd_qam_comp_val(struct rtw89_dev *rtwdev,
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index 326d12da2962..2e5e264e75db 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -287,14 +287,41 @@ static const struct rtw89_efuse_block_cfg rtw8922d_efuse_blocks[] = {
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
+ .bands = {
+ [RFSI_CTRL_BAND_5_6GHZ] = {
+ .oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
+ OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
+ },
+ [RFSI_CTRL_BAND_2GHZ] = {
+ .oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
+ OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
+ }},
.mdpd_by_dbw = {MDPD_ON, MDPD_ON, MDPD_ON, MDPD_ON},
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
+ .bands = {
+ [RFSI_CTRL_BAND_5_6GHZ] = {
+ .oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
+ OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
+ },
+ [RFSI_CTRL_BAND_2GHZ] = {
+ .oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
+ OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
+ }},
.mdpd_by_dbw = {MDPD_OFF, MDPD_OFF, MDPD_ON, MDPD_ON},
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_rfe35_41_44 = {
+ .bands = {
+ [RFSI_CTRL_BAND_5_6GHZ] = {
+ .oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
+ OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
+ },
+ [RFSI_CTRL_BAND_2GHZ] = {
+ .oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
+ OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
+ }},
.mdpd_by_dbw = {MDPD_OFF, MDPD_OFF, MDPD_ON, MDPD_ON},
};
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 04/11] wifi: rtw89: phy: set BB wrap of control options
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
` (2 preceding siblings ...)
2026-05-11 7:01 ` [PATCH rtw-next 03/11] wifi: rtw89: phy: set BB wrap of DPD by bandwidth Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 05/11] wifi: rtw89: phy: set BB wrap of QAM threshold Ping-Ke Shih
` (6 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
Set main options to control BB wrap functions. For example, enable options
by data bandwidth or channel bandwidth.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/phy.h | 11 ++++++++
drivers/net/wireless/realtek/rtw89/phy_be.c | 11 ++++++--
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 27 +++++++++++++++++++
3 files changed, 47 insertions(+), 2 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index c7cf99fe46fb..a3e12590f473 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -586,7 +586,18 @@ enum rtw89_oob_dpd_onoff {
OOB_DPD_ON = 1,
};
+#define _8nibble(n0, n1, n2, n3, n4, n5, n6, n7) \
+ ((n0) << 0 | (n1) << 4 | (n2) << 8 | (n3) << 12 | \
+ (n4) << 16 | (n5) << 20 | (n6) << 24 | (n7) << 28)
+
+struct rtw89_bb_wrap_common_data {
+ struct {
+ u32 rfsi_ct_opt[2];
+ } bands[RFSI_CTRL_BAND_NUM];
+};
+
struct rtw89_bb_wrap_data {
+ const struct rtw89_bb_wrap_common_data *common;
struct {
u8 oob_dpd_by_cbw[8];
} bands[RFSI_CTRL_BAND_NUM];
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index 4ba18e821578..c52306b9fec4 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -648,13 +648,20 @@ static u32 rtw89_phy_bb_wrap_be_bandedge_decision(struct rtw89_dev *rtwdev,
void rtw89_phy_bb_wrap_set_rfsi_ct_opt(struct rtw89_dev *rtwdev,
enum rtw89_phy_idx phy_idx)
{
+ const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
+ const u32 *val;
u32 reg;
+ if (!d || !d->common)
+ return;
+
+ val = d->common->bands[0].rfsi_ct_opt;
+
reg = rtw89_mac_reg_by_idx(rtwdev, R_RFSI_CT_OPT_0_BE4, phy_idx);
- rtw89_write32(rtwdev, reg, 0x00010001);
+ rtw89_write32(rtwdev, reg, val[0]);
reg = rtw89_mac_reg_by_idx(rtwdev, R_RFSI_CT_OPT_8_BE4, phy_idx);
- rtw89_write32(rtwdev, reg, 0x00010001);
+ rtw89_write32(rtwdev, reg, val[1]);
}
EXPORT_SYMBOL(rtw89_phy_bb_wrap_set_rfsi_ct_opt);
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index 2e5e264e75db..18d75184f82b 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -286,7 +286,32 @@ static const struct rtw89_efuse_block_cfg rtw8922d_efuse_blocks[] = {
[RTW89_EFUSE_BLOCK_ADIE] = {.offset = 0x70000, .size = 0x10},
};
+static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7025 = {
+ .bands = {
+ [RFSI_CTRL_BAND_5_6GHZ] = {
+ .rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
+ _8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
+ },
+ [RFSI_CTRL_BAND_2GHZ] = {
+ .rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
+ _8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
+ }},
+};
+
+static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7090 = {
+ .bands = {
+ [RFSI_CTRL_BAND_5_6GHZ] = {
+ .rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
+ _8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
+ },
+ [RFSI_CTRL_BAND_2GHZ] = {
+ .rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
+ _8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
+ }},
+};
+
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
+ .common = &rtw8922d_bb_wrap_common_data_7025,
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
.oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
@@ -300,6 +325,7 @@ static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
+ .common = &rtw8922d_bb_wrap_common_data_7090,
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
.oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
@@ -313,6 +339,7 @@ static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_rfe35_41_44 = {
+ .common = &rtw8922d_bb_wrap_common_data_7090,
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
.oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 05/11] wifi: rtw89: phy: set BB wrap of QAM threshold
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
` (3 preceding siblings ...)
2026-05-11 7:01 ` [PATCH rtw-next 04/11] wifi: rtw89: phy: set BB wrap of control options Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 06/11] wifi: rtw89: phy: set BB wrap of QAM options Ping-Ke Shih
` (5 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
Make hardware to consider which QAM (data rate) to apply BB wrapper
parameters, which are set by other registers.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/phy.h | 12 +++
drivers/net/wireless/realtek/rtw89/phy_be.c | 74 +++++++++++--------
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 2 +
3 files changed, 56 insertions(+), 32 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index a3e12590f473..d2f443c98412 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -586,6 +586,17 @@ enum rtw89_oob_dpd_onoff {
OOB_DPD_ON = 1,
};
+enum rtw89_rfsi_ctrl_modulation {
+ RFSI_BPSK = 0,
+ RFSI_QPSK = 1,
+ RFSI_16QAM = 2,
+ RFSI_64QAM = 3,
+ RFSI_256QAM = 4,
+ RFSI_1024QAM = 5,
+ RFSI_4096QAM = 6,
+ RFSI_MAX,
+};
+
#define _8nibble(n0, n1, n2, n3, n4, n5, n6, n7) \
((n0) << 0 | (n1) << 4 | (n2) << 8 | (n3) << 12 | \
(n4) << 16 | (n5) << 20 | (n6) << 24 | (n7) << 28)
@@ -594,6 +605,7 @@ struct rtw89_bb_wrap_common_data {
struct {
u32 rfsi_ct_opt[2];
} bands[RFSI_CTRL_BAND_NUM];
+ u8 qam_th[6];
};
struct rtw89_bb_wrap_data {
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index c52306b9fec4..ca3cfdc90445 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -691,42 +691,52 @@ EXPORT_SYMBOL(rtw89_phy_bb_wrap_set_rfsi_bandedge_ch);
static void rtw89_phy_bb_wrap_tx_rfsi_qam_comp_th_init(struct rtw89_dev *rtwdev,
enum rtw89_mac_idx mac_idx)
{
+ const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
+ u8 th0, th1, th2;
+
+ if (!d || !d->common)
+ return;
+
+ th0 = d->common->qam_th[0];
+ th1 = d->common->qam_th[1];
+ th2 = d->common->qam_th[2];
+
/* TH0 */
- rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_0_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_3_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_1_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_4_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_7_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_0_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_3_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_6_BE4, 0x1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_0_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_3_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_1_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_4_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_7_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_0_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_3_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_6_BE4, th0, mac_idx);
/* TH1 */
- rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_1_BE4, 0x2, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_4_BE4, 0x2, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_2_BE4, 0x2, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_5_BE4, 0x2, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_8_BE4, 0x2, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_1_BE4, 0x2, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_4_BE4, 0x2, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_7_BE4, 0x2, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_1_BE4, th1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_4_BE4, th1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_2_BE4, th1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_5_BE4, th1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_8_BE4, th1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_1_BE4, th1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_4_BE4, th1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_7_BE4, th1, mac_idx);
/* TH2 */
- rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_2_BE4, 0x4, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_0_BE4, 0x4, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_3_BE4, 0x4, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_6_BE4, 0x4, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_9_BE4, 0x4, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_2_BE4, 0x4, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_5_BE4, 0x4, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_8_BE4, 0x4, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH0_BE4, B_QAM_TH0_2_BE4, th2, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_0_BE4, th2, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_3_BE4, th2, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_6_BE4, th2, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH1_BE4, B_QAM_TH1_9_BE4, th2, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_2_BE4, th2, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_5_BE4, th2, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_TH2_BE4, B_QAM_TH2_8_BE4, th2, mac_idx);
/* DPD 160M */
- rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_0_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_1_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_2_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_3_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_4_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH1_BE4, B_DPD_DBW160_TH1_5_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH1_BE4, B_DPD_DBW160_TH1_6_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH1_BE4, B_DPD_DBW160_TH1_7_BE4, 0x1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_0_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_1_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_2_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_3_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH0_BE4, B_DPD_DBW160_TH0_4_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH1_BE4, B_DPD_DBW160_TH1_5_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH1_BE4, B_DPD_DBW160_TH1_6_BE4, th0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_DPD_DBW160_TH1_BE4, B_DPD_DBW160_TH1_7_BE4, th0, mac_idx);
/* DPD 20M */
rtw89_write32_idx(rtwdev, R_DPD_CBW_TH0_BE4, B_DPD_CBW20_TH0_0_BE4, 0x2, mac_idx);
rtw89_write32_idx(rtwdev, R_DPD_CBW_TH0_BE4, B_DPD_CBW20_TH0_1_BE4, 0x2, mac_idx);
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index 18d75184f82b..a867652907bc 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -296,6 +296,7 @@ static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7025
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
}},
+ .qam_th = {RFSI_BPSK, RFSI_QPSK, RFSI_256QAM, RFSI_MAX, RFSI_MAX, RFSI_MAX},
};
static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7090 = {
@@ -308,6 +309,7 @@ static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7090
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
}},
+ .qam_th = {RFSI_BPSK, RFSI_QPSK, RFSI_256QAM, RFSI_MAX, RFSI_MAX, RFSI_MAX},
};
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 06/11] wifi: rtw89: phy: set BB wrap of QAM options
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
` (4 preceding siblings ...)
2026-05-11 7:01 ` [PATCH rtw-next 05/11] wifi: rtw89: phy: set BB wrap of QAM threshold Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 07/11] wifi: rtw89: phy: set BB wrap of trigger-base partial band Ping-Ke Shih
` (4 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
Apply these options to selected QAM to TX signal under requirements.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/phy.h | 15 ++++
drivers/net/wireless/realtek/rtw89/phy_be.c | 79 +++++++++++--------
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 36 +++++++++
3 files changed, 96 insertions(+), 34 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index d2f443c98412..5a0ffc51ece2 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -597,10 +597,21 @@ enum rtw89_rfsi_ctrl_modulation {
RFSI_MAX,
};
+#define MAX_TX_RFSI_CTRL_OPT 10
+
#define _8nibble(n0, n1, n2, n3, n4, n5, n6, n7) \
((n0) << 0 | (n1) << 4 | (n2) << 8 | (n3) << 12 | \
(n4) << 16 | (n5) << 20 | (n6) << 24 | (n7) << 28)
+#define _qam_comp_code(c) ((((c) & (BIT(15) | BIT(14))) >> 11) | \
+ (((c) & BIT(12)) >> 10) | \
+ (((c) & (BIT(9) | BIT(8))) >> 8))
+
+#define _10qam_comp_code(c0, c1, c2, c3, c4, c5, c6, c7, c8, c9) \
+ _qam_comp_code(c0), _qam_comp_code(c1), _qam_comp_code(c2), _qam_comp_code(c3), \
+ _qam_comp_code(c4), _qam_comp_code(c5), _qam_comp_code(c6), _qam_comp_code(c7), \
+ _qam_comp_code(c8), _qam_comp_code(c9)
+
struct rtw89_bb_wrap_common_data {
struct {
u32 rfsi_ct_opt[2];
@@ -611,6 +622,10 @@ struct rtw89_bb_wrap_common_data {
struct rtw89_bb_wrap_data {
const struct rtw89_bb_wrap_common_data *common;
struct {
+ u16 qam_comp_th0[MAX_TX_RFSI_CTRL_OPT];
+ u16 qam_comp_th1[MAX_TX_RFSI_CTRL_OPT]; /* encoded */
+ u16 qam_comp_th2[MAX_TX_RFSI_CTRL_OPT]; /* encoded */
+ u16 qam_comp_ow[MAX_TX_RFSI_CTRL_OPT];
u8 oob_dpd_by_cbw[8];
} bands[RFSI_CTRL_BAND_NUM];
u8 mdpd_by_dbw[4];
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index ca3cfdc90445..fc7f481783c0 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -788,40 +788,51 @@ static void rtw89_phy_bb_wrap_tx_rfsi_scenario_def(struct rtw89_dev *rtwdev,
static void rtw89_phy_bb_wrap_tx_rfsi_qam_comp_val(struct rtw89_dev *rtwdev,
enum rtw89_mac_idx mac_idx)
{
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH0_BE4, MASKLWORD, 0x4010, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH0_BE4, MASKHWORD, 0x4410, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH1_BE4, MASKLWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH1_BE4, MASKHWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH2_BE4, MASKLWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH2_BE4, MASKHWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH3_BE4, MASKLWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH3_BE4, MASKHWORD, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_L, 0x8, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_M, 0x8, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_H, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_L, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_M, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_H, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH6_BE4, B_QAM_COMP_TH6_L, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH6_BE4, B_QAM_COMP_TH6_M, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_2L, 0x8, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_2M, 0x8, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_2H, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_2L, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_2M, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_2H, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH6_BE4, B_QAM_COMP_TH6_2L, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_QAM_COMP_TH6_BE4, B_QAM_COMP_TH6_2M, 0x0, mac_idx);
-
- rtw89_write32_idx(rtwdev, R_OW_VAL_0_BE4, MASKLWORD, 0x4010, mac_idx);
- rtw89_write32_idx(rtwdev, R_OW_VAL_0_BE4, MASKHWORD, 0x4010, mac_idx);
- rtw89_write32_idx(rtwdev, R_OW_VAL_1_BE4, MASKLWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OW_VAL_1_BE4, MASKHWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OW_VAL_2_BE4, MASKLWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OW_VAL_2_BE4, MASKHWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OW_VAL_3_BE4, MASKLWORD, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_OW_VAL_3_BE4, MASKHWORD, 0x0, mac_idx);
+ const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
+ const u16 *th;
+
+ if (!d || !d->common)
+ return;
+
+ th = d->bands[0].qam_comp_th0;
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH0_BE4, MASKLWORD, th[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH0_BE4, MASKHWORD, th[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH1_BE4, MASKLWORD, th[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH1_BE4, MASKHWORD, th[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH2_BE4, MASKLWORD, th[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH2_BE4, MASKHWORD, th[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH3_BE4, MASKLWORD, th[6], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH3_BE4, MASKHWORD, th[7], mac_idx);
+
+ th = d->bands[0].qam_comp_th1;
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_L, th[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_M, th[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_H, th[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_L, th[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_M, th[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_H, th[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH6_BE4, B_QAM_COMP_TH6_L, th[6], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH6_BE4, B_QAM_COMP_TH6_M, th[7], mac_idx);
+
+ th = d->bands[0].qam_comp_th2;
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_2L, th[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_2M, th[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH4_BE4, B_QAM_COMP_TH4_2H, th[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_2L, th[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_2M, th[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH5_BE4, B_QAM_COMP_TH5_2H, th[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH6_BE4, B_QAM_COMP_TH6_2L, th[6], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM_COMP_TH6_BE4, B_QAM_COMP_TH6_2M, th[7], mac_idx);
+
+ th = d->bands[0].qam_comp_ow;
+ rtw89_write32_idx(rtwdev, R_OW_VAL_0_BE4, MASKLWORD, th[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_OW_VAL_0_BE4, MASKHWORD, th[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_OW_VAL_1_BE4, MASKLWORD, th[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_OW_VAL_1_BE4, MASKHWORD, th[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_OW_VAL_2_BE4, MASKLWORD, th[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_OW_VAL_2_BE4, MASKHWORD, th[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_OW_VAL_3_BE4, MASKLWORD, th[6], mac_idx);
+ rtw89_write32_idx(rtwdev, R_OW_VAL_3_BE4, MASKHWORD, th[7], mac_idx);
}
static void rtw89_phy_bb_set_oob_dpd_qam_comp_val(struct rtw89_dev *rtwdev,
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index a867652907bc..114f53ab9f7c 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -316,10 +316,22 @@ static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
.common = &rtw8922d_bb_wrap_common_data_7025,
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
+ .qam_comp_th0 = {0x4000, 0x6400, 0x6500, 0x6000, 0, 0, 0, 0, 0, 0},
+ .qam_comp_th1 = {_10qam_comp_code(0x4000, 0x6400, 0x6500, 0x6000,
+ 0, 0, 0, 0, 0, 0)},
+ .qam_comp_th2 = {_10qam_comp_code(0x4000, 0x4400, 0x4400, 0x4000,
+ 0, 0, 0, 0, 0, 0)},
+ .qam_comp_ow = {0x4000, 0x4400, 0x4400, 0x4000, 0, 0, 0, 0, 0, 0},
.oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
},
[RFSI_CTRL_BAND_2GHZ] = {
+ .qam_comp_th0 = {0x4000, 0x4400, 0x4500, 0, 0, 0, 0, 0, 0, 0},
+ .qam_comp_th1 = {_10qam_comp_code(0x4000, 0x4400, 0x4500, 0,
+ 0, 0, 0, 0, 0, 0)},
+ .qam_comp_th2 = {_10qam_comp_code(0x4000, 0x4400, 0x4400, 0,
+ 0, 0, 0, 0, 0, 0)},
+ .qam_comp_ow = {0x4000, 0x4400, 0x4400, 0, 0, 0, 0, 0, 0, 0},
.oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
}},
@@ -330,10 +342,22 @@ static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
.common = &rtw8922d_bb_wrap_common_data_7090,
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
+ .qam_comp_th0 = {0x4000, 0x6420, 0x6520, 0x6000, 0, 0, 0, 0, 0, 0},
+ .qam_comp_th1 = {_10qam_comp_code(0x4000, 0x6400, 0x6500, 0x6000,
+ 0, 0, 0, 0, 0, 0)},
+ .qam_comp_th2 = {_10qam_comp_code(0x4000, 0x4400, 0x4400, 0x4000,
+ 0, 0, 0, 0, 0, 0)},
+ .qam_comp_ow = {0x4000, 0x4000, 0x4000, 0x4000, 0, 0, 0, 0, 0, 0},
.oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
},
[RFSI_CTRL_BAND_2GHZ] = {
+ .qam_comp_th0 = {0x4000, 0x4400, 0x4500, 0, 0, 0, 0, 0, 0, 0},
+ .qam_comp_th1 = {_10qam_comp_code(0x4000, 0x4400, 0x4500, 0, 0,
+ 0, 0, 0, 0, 0)},
+ .qam_comp_th2 = {_10qam_comp_code(0x4000, 0x4400, 0x4400, 0, 0,
+ 0, 0, 0, 0, 0)},
+ .qam_comp_ow = {0x4000, 0x4000, 0x4000, 0, 0, 0, 0, 0, 0, 0},
.oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
}},
@@ -344,10 +368,22 @@ static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_rfe35_41_44 =
.common = &rtw8922d_bb_wrap_common_data_7090,
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
+ .qam_comp_th0 = {0x4000, 0x6420, 0x6520, 0x6000, 0, 0, 0, 0, 0, 0},
+ .qam_comp_th1 = {_10qam_comp_code(0x4000, 0x6400, 0x6500, 0x6000,
+ 0, 0, 0, 0, 0, 0)},
+ .qam_comp_th2 = {_10qam_comp_code(0x4000, 0x4400, 0x4400, 0x4000,
+ 0, 0, 0, 0, 0, 0)},
+ .qam_comp_ow = {0x4000, 0x4000, 0x4000, 0x4000, 0, 0, 0, 0, 0, 0},
.oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
},
[RFSI_CTRL_BAND_2GHZ] = {
+ .qam_comp_th0 = {0x4000, 0x4400, 0x4500, 0, 0, 0, 0, 0, 0, 0},
+ .qam_comp_th1 = {_10qam_comp_code(0x4000, 0x4400, 0x4500, 0, 0,
+ 0, 0, 0, 0, 0)},
+ .qam_comp_th2 = {_10qam_comp_code(0x4000, 0x4400, 0x4400, 0, 0,
+ 0, 0, 0, 0, 0)},
+ .qam_comp_ow = {0x4000, 0x4000, 0x4000, 0, 0, 0, 0, 0, 0, 0},
.oob_dpd_by_cbw = {OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF,
OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF, OOB_DPD_OFF},
}},
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 07/11] wifi: rtw89: phy: set BB wrap of trigger-base partial band
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
` (5 preceding siblings ...)
2026-05-11 7:01 ` [PATCH rtw-next 06/11] wifi: rtw89: phy: set BB wrap of QAM options Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 08/11] wifi: rtw89: phy: set BB wrap of CIM3K Ping-Ke Shih
` (3 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
Apply options to trigger-base partial band. For example, TX at RU-106 on
a 160MHz bandwidth.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/phy.h | 1 +
drivers/net/wireless/realtek/rtw89/phy_be.c | 8 +++++++-
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 4 ++++
3 files changed, 12 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index 5a0ffc51ece2..51495701b102 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -615,6 +615,7 @@ enum rtw89_rfsi_ctrl_modulation {
struct rtw89_bb_wrap_common_data {
struct {
u32 rfsi_ct_opt[2];
+ u8 pb_tb;
} bands[RFSI_CTRL_BAND_NUM];
u8 qam_th[6];
};
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index fc7f481783c0..75806ffc6242 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -771,13 +771,19 @@ static void rtw89_phy_bb_wrap_tx_rfsi_qam_comp_th_init(struct rtw89_dev *rtwdev,
static void rtw89_phy_bb_wrap_tx_rfsi_scenario_def(struct rtw89_dev *rtwdev,
enum rtw89_mac_idx mac_idx)
{
+ const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
+ u8 pb_tb = 0;
+
+ if (d && d->common)
+ pb_tb = d->common->bands[0].pb_tb;
+
rtw89_write32_idx(rtwdev, R_RFSI_CT_DEF_BE4, B_RFSI_CT_ER_BE4, 0x0, mac_idx);
rtw89_write32_idx(rtwdev, R_RFSI_CT_DEF_BE4, B_RFSI_CT_SUBF_BE4, 0x0, mac_idx);
rtw89_write32_idx(rtwdev, R_RFSI_CT_DEF_BE4, B_RFSI_CT_FTM_BE4, 0x0, mac_idx);
rtw89_write32_idx(rtwdev, R_RFSI_CT_DEF_BE4, B_RFSI_CT_SENS_BE4, 0x0, mac_idx);
rtw89_write32_idx(rtwdev, R_FBTB_CT_DEF_BE4, B_FBTB_CT_DEF_BE, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_FBTB_CT_DEF_BE4, B_FBTB_CT_PB_BE4, 0x0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_FBTB_CT_DEF_BE4, B_FBTB_CT_PB_BE4, pb_tb, mac_idx);
rtw89_write32_idx(rtwdev, R_FBTB_CT_DEF_BE4, B_FBTB_CT_DL_WO_BE4, 0x0, mac_idx);
rtw89_write32_idx(rtwdev, R_FBTB_CT_DEF_BE4, B_FBTB_CT_DL_BF_BE4, 0x0, mac_idx);
rtw89_write32_idx(rtwdev, R_FBTB_CT_DEF_BE4, B_FBTB_CT_MUMIMO_BE4, 0x0, mac_idx);
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index 114f53ab9f7c..15c44dd0d9fa 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -291,10 +291,12 @@ static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7025
[RFSI_CTRL_BAND_5_6GHZ] = {
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
+ .pb_tb = 3,
},
[RFSI_CTRL_BAND_2GHZ] = {
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
+ .pb_tb = 0,
}},
.qam_th = {RFSI_BPSK, RFSI_QPSK, RFSI_256QAM, RFSI_MAX, RFSI_MAX, RFSI_MAX},
};
@@ -304,10 +306,12 @@ static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7090
[RFSI_CTRL_BAND_5_6GHZ] = {
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
+ .pb_tb = 3,
},
[RFSI_CTRL_BAND_2GHZ] = {
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
+ .pb_tb = 0,
}},
.qam_th = {RFSI_BPSK, RFSI_QPSK, RFSI_256QAM, RFSI_MAX, RFSI_MAX, RFSI_MAX},
};
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 08/11] wifi: rtw89: phy: set BB wrap of CIM3K
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
` (6 preceding siblings ...)
2026-05-11 7:01 ` [PATCH rtw-next 07/11] wifi: rtw89: phy: set BB wrap of trigger-base partial band Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 09/11] wifi: rtw89: phy: change order to align register order Ping-Ke Shih
` (2 subsequent siblings)
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
The options to enable calibrations of CIM 3rd-order for threshold,
non-bandedge and bandedge.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/phy.h | 13 ++++++++++
drivers/net/wireless/realtek/rtw89/phy_be.c | 24 +++++++++++++++----
drivers/net/wireless/realtek/rtw89/reg.h | 3 +++
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 4 ++++
4 files changed, 40 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index 51495701b102..bfe647b2de25 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -586,6 +586,16 @@ enum rtw89_oob_dpd_onoff {
OOB_DPD_ON = 1,
};
+enum rtw89_cim3k_onoff {
+ CIM3K_ON = 1,
+ CIM3K_OFF = 0,
+};
+
+enum rtw89_cim3k_en_dis {
+ CIM3K_ENABLE = 1,
+ CIM3K_DISABLE = 0,
+};
+
enum rtw89_rfsi_ctrl_modulation {
RFSI_BPSK = 0,
RFSI_QPSK = 1,
@@ -614,6 +624,9 @@ enum rtw89_rfsi_ctrl_modulation {
struct rtw89_bb_wrap_common_data {
struct {
+ struct rtw89_bb_wrap_data_cim3k {
+ u8 th, ow, non_bandedge, bandedge;
+ } cim3k;
u32 rfsi_ct_opt[2];
u8 pb_tb;
} bands[RFSI_CTRL_BAND_NUM];
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index 75806ffc6242..f8e25167b44d 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -964,10 +964,26 @@ static void rtw89_phy_bb_set_mdpd_qam_comp_val(struct rtw89_dev *rtwdev,
static void rtw89_phy_bb_set_cim3k_val(struct rtw89_dev *rtwdev,
enum rtw89_mac_idx mac_idx)
{
- rtw89_write32_idx(rtwdev, R_COMP_CIM3K_BE4, B_COMP_CIM3K_TH_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_COMP_CIM3K_BE4, B_COMP_CIM3K_OW_BE4, 0x0, mac_idx);
- rtw89_write32_idx(rtwdev, R_COMP_CIM3K_BE4, B_COMP_CIM3K_NONBE_BE4, 0x1, mac_idx);
- rtw89_write32_idx(rtwdev, R_COMP_CIM3K_BE4, B_COMP_CIM3K_BANDEDGE_BE4, 0x1, mac_idx);
+ const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
+ const struct rtw89_bb_wrap_data_cim3k *p;
+
+ if (!d || !d->common)
+ return;
+
+ p = &d->common->bands[0].cim3k;
+
+ rtw89_write32_idx(rtwdev, R_COMP_CIM3K_BE4, B_COMP_CIM3K_TH_BE4, p->th, mac_idx);
+ rtw89_write32_idx(rtwdev, R_COMP_CIM3K_BE4, B_COMP_CIM3K_OW_BE4, p->ow, mac_idx);
+ rtw89_write32_idx(rtwdev, R_COMP_CIM3K_BE4, B_COMP_CIM3K_NONBE_BE4,
+ p->non_bandedge, mac_idx);
+ rtw89_write32_idx(rtwdev, R_COMP_CIM3K_BE4, B_COMP_CIM3K_BANDEDGE_BE4,
+ p->bandedge, mac_idx);
+
+ if (rtwdev->chip->chip_id != RTL8922D)
+ return;
+
+ rtw89_write32_idx(rtwdev, R_CIM3K_SU_FORCE, B_CIM3K_SU_FORCE_EN, 1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_CIM3K_SU_FORCE, B_CIM3K_SU_FORCE_VAL, 0, mac_idx);
}
static void rtw89_phy_bb_wrap_tx_rfsi_ctrl_init(struct rtw89_dev *rtwdev,
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index 716747c3a10e..e46c32ec8e90 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -10596,6 +10596,9 @@
#define B_FBTB_CT_MUMIMO_BE4 GENMASK(19, 16)
#define B_FBTB_CT_FTM_BE4 GENMASK(23, 20)
#define B_FBTB_CT_SENS_BE4 GENMASK(27, 24)
+#define R_CIM3K_SU_FORCE 0x119F8
+#define B_CIM3K_SU_FORCE_EN BIT(17)
+#define B_CIM3K_SU_FORCE_VAL BIT(18)
#define R_RFSI_CT_OPT_0_BE4 0x11A94
#define R_RFSI_CT_OPT_8_BE4 0x11A98
#define R_QAM_COMP_TH0_BE4 0x11A9C
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index 15c44dd0d9fa..ec94067aa1a5 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -289,11 +289,13 @@ static const struct rtw89_efuse_block_cfg rtw8922d_efuse_blocks[] = {
static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7025 = {
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
+ .cim3k = {CIM3K_OFF, CIM3K_OFF, CIM3K_ENABLE, CIM3K_ENABLE},
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
.pb_tb = 3,
},
[RFSI_CTRL_BAND_2GHZ] = {
+ .cim3k = {CIM3K_OFF, CIM3K_OFF, CIM3K_ENABLE, CIM3K_ENABLE},
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
.pb_tb = 0,
@@ -304,11 +306,13 @@ static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7025
static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7090 = {
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
+ .cim3k = {CIM3K_OFF, CIM3K_OFF, CIM3K_DISABLE, CIM3K_ENABLE},
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
.pb_tb = 3,
},
[RFSI_CTRL_BAND_2GHZ] = {
+ .cim3k = {CIM3K_OFF, CIM3K_OFF, CIM3K_DISABLE, CIM3K_ENABLE},
.rfsi_ct_opt = {_8nibble(2, 2, 2, 2, 1, 1, 1, 1),
_8nibble(2, 2, 2, 2, 1, 1, 1, 1)},
.pb_tb = 0,
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 09/11] wifi: rtw89: phy: change order to align register order
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
` (7 preceding siblings ...)
2026-05-11 7:01 ` [PATCH rtw-next 08/11] wifi: rtw89: phy: set BB wrap of CIM3K Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 10/11] wifi: rtw89: phy: configure control options of BB wrapper by RFSI band Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 11/11] wifi: rtw89: phy: add BB wrapper generation 3 for RTL8922D variant Ping-Ke Shih
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
Change the order to align what vendor driver does.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/phy_be.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index f8e25167b44d..23ed170f6d38 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -587,8 +587,8 @@ static void rtw89_phy_bb_wrap_force_cr_init(struct rtw89_dev *rtwdev,
addr = rtw89_mac_reg_by_idx(rtwdev, R_BE_PWR_FORCE_LMT, mac_idx);
rtw89_write32_mask(rtwdev, addr, B_BE_PWR_FORCE_LMT_ON, 0);
- addr = rtw89_mac_reg_by_idx(rtwdev, R_BE_PWR_BOOST, mac_idx);
- rtw89_write32_mask(rtwdev, addr, B_BE_PWR_FORCE_RATE_ON, 0);
+ addr = rtw89_mac_reg_by_idx(rtwdev, R_BE_PWR_RATE_CTRL, mac_idx);
+ rtw89_write32_mask(rtwdev, addr, B_BE_FORCE_PWR_BY_RATE_EN, 0);
addr = rtw89_mac_reg_by_idx(rtwdev, R_BE_PWR_OFST_RULMT, mac_idx);
rtw89_write32_mask(rtwdev, addr, B_BE_PWR_FORCE_RU_ENON, 0);
rtw89_write32_mask(rtwdev, addr, B_BE_PWR_FORCE_RU_ON, 0);
@@ -596,8 +596,8 @@ static void rtw89_phy_bb_wrap_force_cr_init(struct rtw89_dev *rtwdev,
rtw89_write32_mask(rtwdev, addr, B_BE_PWR_FORCE_MACID_ALL, 0);
addr = rtw89_mac_reg_by_idx(rtwdev, R_BE_PWR_COEX_CTRL, mac_idx);
rtw89_write32_mask(rtwdev, addr, B_BE_PWR_FORCE_COEX_ON, 0);
- addr = rtw89_mac_reg_by_idx(rtwdev, R_BE_PWR_RATE_CTRL, mac_idx);
- rtw89_write32_mask(rtwdev, addr, B_BE_FORCE_PWR_BY_RATE_EN, 0);
+ addr = rtw89_mac_reg_by_idx(rtwdev, R_BE_PWR_BOOST, mac_idx);
+ rtw89_write32_mask(rtwdev, addr, B_BE_PWR_FORCE_RATE_ON, 0);
}
static void rtw89_phy_bb_wrap_ftm_init(struct rtw89_dev *rtwdev,
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 10/11] wifi: rtw89: phy: configure control options of BB wrapper by RFSI band
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
` (8 preceding siblings ...)
2026-05-11 7:01 ` [PATCH rtw-next 09/11] wifi: rtw89: phy: change order to align register order Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 11/11] wifi: rtw89: phy: add BB wrapper generation 3 for RTL8922D variant Ping-Ke Shih
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
The settings of control options are predefined per RFSI band (2GHz band or
not 5/6GHz band) and used for fine-tuning transmit power. Calculate and set
the RFSI band once creating channel context, and use it by BB wrapper
configurations.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/chan.c | 2 ++
drivers/net/wireless/realtek/rtw89/core.h | 8 ++++++++
drivers/net/wireless/realtek/rtw89/phy.h | 8 +-------
drivers/net/wireless/realtek/rtw89/phy_be.c | 5 +++--
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 2 +-
5 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/chan.c b/drivers/net/wireless/realtek/rtw89/chan.c
index cd846cb81f0c..6f11335b4968 100644
--- a/drivers/net/wireless/realtek/rtw89/chan.c
+++ b/drivers/net/wireless/realtek/rtw89/chan.c
@@ -150,6 +150,8 @@ void rtw89_chan_create(struct rtw89_chan *chan, u8 center_chan, u8 primary_chan,
primary_freq);
chan->pri_sb_idx = rtw89_get_primary_sb_idx(center_chan, primary_chan,
bandwidth);
+ chan->rfsi_band = band == RTW89_BAND_2G ? RFSI_CTRL_BAND_2GHZ :
+ RFSI_CTRL_BAND_5_6GHZ;
}
static void _rtw89_chan_update_punctured(struct rtw89_dev *rtwdev,
diff --git a/drivers/net/wireless/realtek/rtw89/core.h b/drivers/net/wireless/realtek/rtw89/core.h
index ab9165fcaf7d..205087fd0161 100644
--- a/drivers/net/wireless/realtek/rtw89/core.h
+++ b/drivers/net/wireless/realtek/rtw89/core.h
@@ -993,6 +993,13 @@ enum rtw89_sc_offset {
RTW89_SC_40_LOWER = 10,
};
+enum rtw89_rfsi_ctrl_band {
+ RFSI_CTRL_BAND_5_6GHZ,
+ RFSI_CTRL_BAND_2GHZ,
+
+ RFSI_CTRL_BAND_NUM,
+};
+
/* only mgd features can be added to the enum */
enum rtw89_wow_flags {
RTW89_WOW_FLAG_EN_MAGIC_PKT,
@@ -1016,6 +1023,7 @@ struct rtw89_chan {
enum rtw89_tx_comp_band tx_comp_band;
enum rtw89_sc_offset pri_ch_idx;
u8 pri_sb_idx;
+ enum rtw89_rfsi_ctrl_band rfsi_band;
};
struct rtw89_chan_rcd {
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index bfe647b2de25..ab3c8bb2e851 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -569,13 +569,6 @@ struct rtw89_phy_rfk_log_fmt {
const struct rtw89_fw_element_hdr *elm[RTW89_PHY_C2H_RFK_LOG_FUNC_NUM];
};
-enum rtw89_rfsi_ctrl_band {
- RFSI_CTRL_BAND_5_6GHZ,
- RFSI_CTRL_BAND_2GHZ,
-
- RFSI_CTRL_BAND_NUM,
-};
-
enum rtw89_mdpd_onoff {
MDPD_ON = 0,
MDPD_OFF = 1,
@@ -1026,6 +1019,7 @@ static inline void rtw89_phy_bb_wrap_init(struct rtw89_dev *rtwdev)
}
void rtw89_phy_bb_wrap_set_rfsi_ct_opt(struct rtw89_dev *rtwdev,
+ enum rtw89_rfsi_ctrl_band ctrl_band,
enum rtw89_phy_idx phy_idx);
void rtw89_phy_bb_wrap_set_rfsi_bandedge_ch(struct rtw89_dev *rtwdev,
const struct rtw89_chan *chan,
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index 23ed170f6d38..387a3e5fd15a 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -646,6 +646,7 @@ static u32 rtw89_phy_bb_wrap_be_bandedge_decision(struct rtw89_dev *rtwdev,
}
void rtw89_phy_bb_wrap_set_rfsi_ct_opt(struct rtw89_dev *rtwdev,
+ enum rtw89_rfsi_ctrl_band rfsi_band,
enum rtw89_phy_idx phy_idx)
{
const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
@@ -655,7 +656,7 @@ void rtw89_phy_bb_wrap_set_rfsi_ct_opt(struct rtw89_dev *rtwdev,
if (!d || !d->common)
return;
- val = d->common->bands[0].rfsi_ct_opt;
+ val = d->common->bands[rfsi_band].rfsi_ct_opt;
reg = rtw89_mac_reg_by_idx(rtwdev, R_RFSI_CT_OPT_0_BE4, phy_idx);
rtw89_write32(rtwdev, reg, val[0]);
@@ -1004,7 +1005,7 @@ static void rtw89_phy_bb_wrap_tx_rfsi_ctrl_init(struct rtw89_dev *rtwdev,
rtw89_phy_bb_set_mdpd_qam_comp_val(rtwdev, mac_idx);
rtw89_phy_bb_set_cim3k_val(rtwdev, mac_idx);
- rtw89_phy_bb_wrap_set_rfsi_ct_opt(rtwdev, phy_idx);
+ rtw89_phy_bb_wrap_set_rfsi_ct_opt(rtwdev, 0, phy_idx);
rtw89_entity_get_conf(rtwdev, &conf);
chan = conf.chans[phy_idx];
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index ec94067aa1a5..ade89234afd6 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -2284,7 +2284,7 @@ static void rtw8922d_set_channel_bb(struct rtw89_dev *rtwdev,
u8 pri_sb = chan->pri_sb_idx;
u32 val;
- rtw89_phy_bb_wrap_set_rfsi_ct_opt(rtwdev, phy_idx);
+ rtw89_phy_bb_wrap_set_rfsi_ct_opt(rtwdev, chan->rfsi_band, phy_idx);
rtw8922d_ctrl_ch(rtwdev, chan, phy_idx);
rtw8922d_ctrl_bw(rtwdev, pri_sb, chan->band_width, phy_idx);
rtw89_phy_bb_wrap_set_rfsi_bandedge_ch(rtwdev, chan, phy_idx);
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
* [PATCH rtw-next 11/11] wifi: rtw89: phy: add BB wrapper generation 3 for RTL8922D variant
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
` (9 preceding siblings ...)
2026-05-11 7:01 ` [PATCH rtw-next 10/11] wifi: rtw89: phy: configure control options of BB wrapper by RFSI band Ping-Ke Shih
@ 2026-05-11 7:01 ` Ping-Ke Shih
10 siblings, 0 replies; 12+ messages in thread
From: Ping-Ke Shih @ 2026-05-11 7:01 UTC (permalink / raw)
To: linux-wireless
The BB wrapper generation 3 support more settings to fine tune power
threshold and CCK CFIR/filter per RFSI band. Add them accordingly.
Signed-off-by: Ping-Ke Shih <pkshih@realtek.com>
---
drivers/net/wireless/realtek/rtw89/phy.h | 18 +++
drivers/net/wireless/realtek/rtw89/phy_be.c | 112 +++++++++++++++++-
drivers/net/wireless/realtek/rtw89/reg.h | 70 +++++++++++
drivers/net/wireless/realtek/rtw89/rtw8922d.c | 17 +++
4 files changed, 212 insertions(+), 5 deletions(-)
diff --git a/drivers/net/wireless/realtek/rtw89/phy.h b/drivers/net/wireless/realtek/rtw89/phy.h
index ab3c8bb2e851..0a119b5f8159 100644
--- a/drivers/net/wireless/realtek/rtw89/phy.h
+++ b/drivers/net/wireless/realtek/rtw89/phy.h
@@ -600,6 +600,16 @@ enum rtw89_rfsi_ctrl_modulation {
RFSI_MAX,
};
+enum rtw89_cfir_onoff {
+ CFIR_ON = 1,
+ CFIR_OFF = 0,
+};
+
+enum rtw89_filter_onoff {
+ FILTER_A_ON = 1,
+ FILTER_A_OFF = 0,
+};
+
#define MAX_TX_RFSI_CTRL_OPT 10
#define _8nibble(n0, n1, n2, n3, n4, n5, n6, n7) \
@@ -626,8 +636,16 @@ struct rtw89_bb_wrap_common_data {
u8 qam_th[6];
};
+struct rtw89_bb_wrap_common_data_gen3 {
+ struct {
+ u8 qam_th[6];
+ } bands[RFSI_CTRL_BAND_NUM];
+ u8 cck_val[2];
+};
+
struct rtw89_bb_wrap_data {
const struct rtw89_bb_wrap_common_data *common;
+ const struct rtw89_bb_wrap_common_data_gen3 *common_gen3;
struct {
u16 qam_comp_th0[MAX_TX_RFSI_CTRL_OPT];
u16 qam_comp_th1[MAX_TX_RFSI_CTRL_OPT]; /* encoded */
diff --git a/drivers/net/wireless/realtek/rtw89/phy_be.c b/drivers/net/wireless/realtek/rtw89/phy_be.c
index 387a3e5fd15a..54c91ed4f73d 100644
--- a/drivers/net/wireless/realtek/rtw89/phy_be.c
+++ b/drivers/net/wireless/realtek/rtw89/phy_be.c
@@ -769,6 +769,75 @@ static void rtw89_phy_bb_wrap_tx_rfsi_qam_comp_th_init(struct rtw89_dev *rtwdev,
rtw89_write32_idx(rtwdev, R_COMP_CIM3K_BE4, B_COMP_CIM3K_TH2_BE4, 0x2, mac_idx);
}
+static void rtw89_phy_bb_wrap_tx_rfsi_qam_comp_th_gen3_init(struct rtw89_dev *rtwdev,
+ const struct rtw89_chan *chan,
+ enum rtw89_mac_idx mac_idx)
+{
+ const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
+ const struct rtw89_bb_wrap_common_data_gen3 *common_gen3;
+ const u8 *ths;
+
+ if (!d || !d->common_gen3)
+ return;
+
+ common_gen3 = d->common_gen3;
+ ths = common_gen3->bands[chan->rfsi_band].qam_th;
+
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH0_0_BE4, ths[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH0_1_BE4, ths[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH0_2_BE4, ths[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH0_3_BE4, ths[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH0_4_BE4, ths[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH0_5_BE4, ths[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH0_6_BE4, ths[0], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH0_7_BE4, ths[0], mac_idx);
+
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH1_0_BE4, ths[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH0_BE4, B_QAM3_TH1_1_BE4, ths[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH1_2_BE4, ths[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH1_3_BE4, ths[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH1_4_BE4, ths[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH1_5_BE4, ths[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH1_6_BE4, ths[1], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH1_7_BE4, ths[1], mac_idx);
+
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH2_0_BE4, ths[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH2_1_BE4, ths[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH2_2_BE4, ths[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH1_BE4, B_QAM3_TH2_3_BE4, ths[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH2_4_BE4, ths[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH2_5_BE4, ths[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH2_6_BE4, ths[2], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH2_7_BE4, ths[2], mac_idx);
+
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH3_0_BE4, ths[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH3_1_BE4, ths[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH3_2_BE4, ths[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH3_3_BE4, ths[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH3_4_BE4, ths[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH2_BE4, B_QAM3_TH3_5_BE4, ths[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH3_6_BE4, ths[3], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH3_7_BE4, ths[3], mac_idx);
+
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_TH4_0_BE4, ths[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_TH4_1_BE4, ths[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_TH4_2_BE4, ths[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_TH4_3_BE4, ths[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_TH4_4_BE4, ths[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_TH4_5_BE4, ths[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_TH4_6_BE4, ths[4], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_TH4_7_BE4, ths[4], mac_idx);
+
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH5_0_BE4, ths[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH5_1_BE4, ths[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH5_2_BE4, ths[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH5_3_BE4, ths[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH5_4_BE4, ths[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH5_5_BE4, ths[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH5_6_BE4, ths[5], mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH3_BE4, B_QAM3_TH5_7_BE4, ths[5], mac_idx);
+}
+
static void rtw89_phy_bb_wrap_tx_rfsi_scenario_def(struct rtw89_dev *rtwdev,
enum rtw89_mac_idx mac_idx)
{
@@ -987,6 +1056,39 @@ static void rtw89_phy_bb_set_cim3k_val(struct rtw89_dev *rtwdev,
rtw89_write32_idx(rtwdev, R_CIM3K_SU_FORCE, B_CIM3K_SU_FORCE_VAL, 0, mac_idx);
}
+static void rtw89_phy_bb_set_cck_cfir_filter_val_gen3(struct rtw89_dev *rtwdev,
+ enum rtw89_mac_idx mac_idx)
+{
+ const struct rtw89_bb_wrap_data *d = rtwdev->phy_info.bb_wrap_data;
+ const struct rtw89_bb_wrap_common_data_gen3 *common_gen3;
+ u8 cck0, cck1;
+
+ if (!d || !d->common_gen3)
+ return;
+
+ common_gen3 = d->common_gen3;
+ cck0 = common_gen3->cck_val[0];
+ cck1 = common_gen3->cck_val[1];
+
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_CFIR0_BE4, cck0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_CFIR1_BE4, cck0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_CFIR2_BE4, cck0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_CFIR3_BE4, cck0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_CFIR4_BE4, cck0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_CFIR5_BE4, cck0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_CFIR6_BE4, cck0, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_TH4_BE4, B_QAM3_CFIR7_BE4, cck0, mac_idx);
+
+ rtw89_write32_idx(rtwdev, R_QAM3_FLTR_BE4, B_QAM3_FLTR0_BE4, cck1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_FLTR_BE4, B_QAM3_FLTR1_BE4, cck1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_FLTR_BE4, B_QAM3_FLTR2_BE4, cck1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_FLTR_BE4, B_QAM3_FLTR3_BE4, cck1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_FLTR_BE4, B_QAM3_FLTR4_BE4, cck1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_FLTR_BE4, B_QAM3_FLTR5_BE4, cck1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_FLTR_BE4, B_QAM3_FLTR6_BE4, cck1, mac_idx);
+ rtw89_write32_idx(rtwdev, R_QAM3_FLTR_BE4, B_QAM3_FLTR7_BE4, cck1, mac_idx);
+}
+
static void rtw89_phy_bb_wrap_tx_rfsi_ctrl_init(struct rtw89_dev *rtwdev,
enum rtw89_mac_idx mac_idx)
{
@@ -998,18 +1100,18 @@ static void rtw89_phy_bb_wrap_tx_rfsi_ctrl_init(struct rtw89_dev *rtwdev,
if (chip_id != RTL8922D)
return;
+ rtw89_entity_get_conf(rtwdev, &conf);
+ chan = conf.chans[phy_idx];
+
rtw89_phy_bb_wrap_tx_rfsi_qam_comp_th_init(rtwdev, mac_idx);
+ rtw89_phy_bb_wrap_tx_rfsi_qam_comp_th_gen3_init(rtwdev, chan, mac_idx);
rtw89_phy_bb_wrap_tx_rfsi_scenario_def(rtwdev, mac_idx);
rtw89_phy_bb_wrap_tx_rfsi_qam_comp_val(rtwdev, mac_idx);
rtw89_phy_bb_set_oob_dpd_qam_comp_val(rtwdev, mac_idx);
rtw89_phy_bb_set_mdpd_qam_comp_val(rtwdev, mac_idx);
rtw89_phy_bb_set_cim3k_val(rtwdev, mac_idx);
-
+ rtw89_phy_bb_set_cck_cfir_filter_val_gen3(rtwdev, mac_idx);
rtw89_phy_bb_wrap_set_rfsi_ct_opt(rtwdev, 0, phy_idx);
-
- rtw89_entity_get_conf(rtwdev, &conf);
- chan = conf.chans[phy_idx];
-
rtw89_phy_bb_wrap_set_rfsi_bandedge_ch(rtwdev, chan, phy_idx);
}
diff --git a/drivers/net/wireless/realtek/rtw89/reg.h b/drivers/net/wireless/realtek/rtw89/reg.h
index e46c32ec8e90..c9bfb163c32e 100644
--- a/drivers/net/wireless/realtek/rtw89/reg.h
+++ b/drivers/net/wireless/realtek/rtw89/reg.h
@@ -10599,6 +10599,17 @@
#define R_CIM3K_SU_FORCE 0x119F8
#define B_CIM3K_SU_FORCE_EN BIT(17)
#define B_CIM3K_SU_FORCE_VAL BIT(18)
+#define R_QAM3_TH0_BE4 0x119FC
+#define B_QAM3_TH0_0_BE4 GENMASK(2, 0)
+#define B_QAM3_TH0_1_BE4 GENMASK(5, 3)
+#define B_QAM3_TH0_2_BE4 GENMASK(8, 6)
+#define B_QAM3_TH0_3_BE4 GENMASK(11, 9)
+#define B_QAM3_TH0_4_BE4 GENMASK(14, 12)
+#define B_QAM3_TH0_5_BE4 GENMASK(17, 15)
+#define B_QAM3_TH0_6_BE4 GENMASK(20, 18)
+#define B_QAM3_TH0_7_BE4 GENMASK(23, 21)
+#define B_QAM3_TH1_0_BE4 GENMASK(26, 24)
+#define B_QAM3_TH1_1_BE4 GENMASK(29, 27)
#define R_RFSI_CT_OPT_0_BE4 0x11A94
#define R_RFSI_CT_OPT_8_BE4 0x11A98
#define R_QAM_COMP_TH0_BE4 0x11A9C
@@ -10634,6 +10645,65 @@
#define B_BANDEDGE_DBW80_BE4 BIT(31)
#define R_BANDEDGE_DBWY_BE4 0x11AD0
#define B_BANDEDGE_DBW160_BE4 BIT(0)
+#define R_QAM3_TH1_BE4 0x11BE8
+#define B_QAM3_TH1_2_BE4 GENMASK(2, 0)
+#define B_QAM3_TH1_3_BE4 GENMASK(5, 3)
+#define B_QAM3_TH1_4_BE4 GENMASK(8, 6)
+#define B_QAM3_TH1_5_BE4 GENMASK(11, 9)
+#define B_QAM3_TH1_6_BE4 GENMASK(14, 12)
+#define B_QAM3_TH1_7_BE4 GENMASK(17, 15)
+#define B_QAM3_TH2_0_BE4 GENMASK(20, 18)
+#define B_QAM3_TH2_1_BE4 GENMASK(23, 21)
+#define B_QAM3_TH2_2_BE4 GENMASK(26, 24)
+#define B_QAM3_TH2_3_BE4 GENMASK(29, 27)
+#define R_QAM3_TH2_BE4 0x11BEC
+#define B_QAM3_TH2_4_BE4 GENMASK(2, 0)
+#define B_QAM3_TH2_5_BE4 GENMASK(5, 3)
+#define B_QAM3_TH2_6_BE4 GENMASK(8, 6)
+#define B_QAM3_TH2_7_BE4 GENMASK(11, 9)
+#define B_QAM3_TH3_0_BE4 GENMASK(14, 12)
+#define B_QAM3_TH3_1_BE4 GENMASK(17, 15)
+#define B_QAM3_TH3_2_BE4 GENMASK(20, 18)
+#define B_QAM3_TH3_3_BE4 GENMASK(23, 21)
+#define B_QAM3_TH3_4_BE4 GENMASK(26, 24)
+#define B_QAM3_TH3_5_BE4 GENMASK(29, 27)
+#define R_QAM3_TH3_BE4 0x11BF4
+#define B_QAM3_TH3_6_BE4 GENMASK(2, 0)
+#define B_QAM3_TH3_7_BE4 GENMASK(5, 3)
+#define B_QAM3_TH5_0_BE4 GENMASK(8, 6)
+#define B_QAM3_TH5_1_BE4 GENMASK(11, 9)
+#define B_QAM3_TH5_2_BE4 GENMASK(14, 12)
+#define B_QAM3_TH5_3_BE4 GENMASK(17, 15)
+#define B_QAM3_TH5_4_BE4 GENMASK(20, 18)
+#define B_QAM3_TH5_5_BE4 GENMASK(23, 21)
+#define B_QAM3_TH5_6_BE4 GENMASK(26, 24)
+#define B_QAM3_TH5_7_BE4 GENMASK(29, 27)
+#define R_QAM3_TH4_BE4 0x11BF8
+#define B_QAM3_TH4_0_BE4 GENMASK(2, 0)
+#define B_QAM3_TH4_1_BE4 GENMASK(5, 3)
+#define B_QAM3_TH4_2_BE4 GENMASK(8, 6)
+#define B_QAM3_TH4_3_BE4 GENMASK(11, 9)
+#define B_QAM3_TH4_4_BE4 GENMASK(14, 12)
+#define B_QAM3_TH4_5_BE4 GENMASK(17, 15)
+#define B_QAM3_TH4_6_BE4 GENMASK(20, 18)
+#define B_QAM3_TH4_7_BE4 GENMASK(23, 21)
+#define B_QAM3_CFIR0_BE4 BIT(24)
+#define B_QAM3_CFIR1_BE4 BIT(25)
+#define B_QAM3_CFIR2_BE4 BIT(26)
+#define B_QAM3_CFIR3_BE4 BIT(27)
+#define B_QAM3_CFIR4_BE4 BIT(28)
+#define B_QAM3_CFIR5_BE4 BIT(29)
+#define B_QAM3_CFIR6_BE4 BIT(30)
+#define B_QAM3_CFIR7_BE4 BIT(31)
+#define R_QAM3_FLTR_BE4 0x11BFC
+#define B_QAM3_FLTR0_BE4 GENMASK(1, 0)
+#define B_QAM3_FLTR1_BE4 GENMASK(3, 2)
+#define B_QAM3_FLTR2_BE4 GENMASK(5, 4)
+#define B_QAM3_FLTR3_BE4 GENMASK(7, 6)
+#define B_QAM3_FLTR4_BE4 GENMASK(9, 8)
+#define B_QAM3_FLTR5_BE4 GENMASK(11, 10)
+#define B_QAM3_FLTR6_BE4 GENMASK(13, 12)
+#define B_QAM3_FLTR7_BE4 GENMASK(15, 14)
#define R_SYS_DBCC_BE4 0x20000
#define B_SYS_DBCC_BE4 BIT(0)
diff --git a/drivers/net/wireless/realtek/rtw89/rtw8922d.c b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
index ade89234afd6..c6c37e25e4c8 100644
--- a/drivers/net/wireless/realtek/rtw89/rtw8922d.c
+++ b/drivers/net/wireless/realtek/rtw89/rtw8922d.c
@@ -320,8 +320,23 @@ static const struct rtw89_bb_wrap_common_data rtw8922d_bb_wrap_common_data_7090
.qam_th = {RFSI_BPSK, RFSI_QPSK, RFSI_256QAM, RFSI_MAX, RFSI_MAX, RFSI_MAX},
};
+static const
+struct rtw89_bb_wrap_common_data_gen3 rtw8922d_bb_wrap_common_data_gen3_7090 = {
+ .bands = {
+ [RFSI_CTRL_BAND_5_6GHZ] = {
+ .qam_th = {RFSI_QPSK, RFSI_BPSK, RFSI_256QAM, RFSI_MAX,
+ RFSI_MAX, RFSI_MAX},
+ },
+ [RFSI_CTRL_BAND_2GHZ] = {
+ .qam_th = {RFSI_MAX, RFSI_MAX, RFSI_256QAM, RFSI_MAX,
+ RFSI_MAX, RFSI_MAX},
+ }},
+ .cck_val = {CFIR_OFF, FILTER_A_OFF},
+};
+
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
.common = &rtw8922d_bb_wrap_common_data_7025,
+ .common_gen3 = NULL,
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
.qam_comp_th0 = {0x4000, 0x6400, 0x6500, 0x6000, 0, 0, 0, 0, 0, 0},
@@ -348,6 +363,7 @@ static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7025_default = {
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
.common = &rtw8922d_bb_wrap_common_data_7090,
+ .common_gen3 = &rtw8922d_bb_wrap_common_data_gen3_7090,
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
.qam_comp_th0 = {0x4000, 0x6420, 0x6520, 0x6000, 0, 0, 0, 0, 0, 0},
@@ -374,6 +390,7 @@ static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_default = {
static const struct rtw89_bb_wrap_data rtw8922d_bb_wrap_data_7090_rfe35_41_44 = {
.common = &rtw8922d_bb_wrap_common_data_7090,
+ .common_gen3 = &rtw8922d_bb_wrap_common_data_gen3_7090,
.bands = {
[RFSI_CTRL_BAND_5_6GHZ] = {
.qam_comp_th0 = {0x4000, 0x6420, 0x6520, 0x6000, 0, 0, 0, 0, 0, 0},
--
2.25.1
^ permalink raw reply related [flat|nested] 12+ messages in thread
end of thread, other threads:[~2026-05-11 7:02 UTC | newest]
Thread overview: 12+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-05-11 7:01 [PATCH rtw-next 00/11] wifi: rtw89: update BB wrap for RTL8922D Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 01/11] wifi: rtw89: phy: define BB wrap data for RTL8922D variants Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 02/11] wifi: rtw89: phy: set BB wrap of out-of-band DPD Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 03/11] wifi: rtw89: phy: set BB wrap of DPD by bandwidth Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 04/11] wifi: rtw89: phy: set BB wrap of control options Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 05/11] wifi: rtw89: phy: set BB wrap of QAM threshold Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 06/11] wifi: rtw89: phy: set BB wrap of QAM options Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 07/11] wifi: rtw89: phy: set BB wrap of trigger-base partial band Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 08/11] wifi: rtw89: phy: set BB wrap of CIM3K Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 09/11] wifi: rtw89: phy: change order to align register order Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 10/11] wifi: rtw89: phy: configure control options of BB wrapper by RFSI band Ping-Ke Shih
2026-05-11 7:01 ` [PATCH rtw-next 11/11] wifi: rtw89: phy: add BB wrapper generation 3 for RTL8922D variant Ping-Ke Shih
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox