* Re: [PATCH v2 13/16] wcn36xx: add wcn36xx.h
From: Joe Perches @ 2013-09-03 5:27 UTC (permalink / raw)
To: Kalle Valo; +Cc: Eugene Krasnikov, linux-wireless, wcn36xx
In-Reply-To: <877geyv5ma.fsf@purkki.adurom.net>
On Tue, 2013-09-03 at 08:25 +0300, Kalle Valo wrote:
> Joe Perches <joe@perches.com> writes:
>
> > Most don't do that.
> > Generally it's enabled/disabled by module.
> >
> >> And enabling log messages on the file level is sometimes too
> >> much. So it would really need some sort of grouping feature with a
> >> stable interface.
> >
> > Like by module?
>
> What does module mean in this context?
KBUILD_MODNAME
^ permalink raw reply
* Re: [PATCH v2 13/16] wcn36xx: add wcn36xx.h
From: Kalle Valo @ 2013-09-03 5:25 UTC (permalink / raw)
To: Joe Perches; +Cc: Eugene Krasnikov, linux-wireless, wcn36xx
In-Reply-To: <1378185231.29083.15.camel@joe-AO722>
Joe Perches <joe@perches.com> writes:
> Most don't do that.
> Generally it's enabled/disabled by module.
>
>> And enabling log messages on the file level is sometimes too
>> much. So it would really need some sort of grouping feature with a
>> stable interface.
>
> Like by module?
What does module mean in this context? File like "wmi.c" or something
else?
--
Kalle Valo
^ permalink raw reply
* Re: [PATCH v2 13/16] wcn36xx: add wcn36xx.h
From: Joe Perches @ 2013-09-03 5:13 UTC (permalink / raw)
To: Kalle Valo; +Cc: Eugene Krasnikov, linux-wireless, wcn36xx
In-Reply-To: <87bo4av6fj.fsf@purkki.adurom.net>
On Tue, 2013-09-03 at 08:08 +0300, Kalle Valo wrote:
> Joe Perches <joe@perches.com> writes:
> Please, no dynamic_debug. It's useless on a wifi driver.
> > Why is that?
> It's not really usable in practise, at least the last time I looked at
> it.
Then you probably haven't looked recently.
> It's cumbersome to enable log messages based on their line numbers
> and line numbers change so you can't really make any scripts to help
> with that.
Most don't do that.
Generally it's enabled/disabled by module.
> And enabling log messages on the file level is sometimes too
> much. So it would really need some sort of grouping feature with a
> stable interface.
Like by module?
^ permalink raw reply
* Re: [PATCH v2 13/16] wcn36xx: add wcn36xx.h
From: Kalle Valo @ 2013-09-03 5:08 UTC (permalink / raw)
To: Joe Perches; +Cc: Eugene Krasnikov, linux-wireless, wcn36xx
In-Reply-To: <1378144193.1953.88.camel@joe-AO722>
Joe Perches <joe@perches.com> writes:
> On Mon, 2013-09-02 at 17:15 +0300, Kalle Valo wrote:
>> Joe Perches <joe@perches.com> writes:
>>
>> >> +#define wcn36xx_dbg(mask, fmt, arg...) do { \
>> >> + if (debug_mask & mask) \
>> >> + printk(KERN_DEBUG pr_fmt(fmt), ##arg); \
>> >> +} while (0)
>> >
>> > And maybe this one using pr_debug so dynamic_debug
>> > can work too.
>>
>> Please, no dynamic_debug. It's useless on a wifi driver.
>
> Why is that?
It's not really usable in practise, at least the last time I looked at
it. It's cumbersome to enable log messages based on their line numbers
and line numbers change so you can't really make any scripts to help
with that. And enabling log messages on the file level is sometimes too
much. So it would really need some sort of grouping feature with a
stable interface.
--
Kalle Valo
^ permalink raw reply
* [PATCH 3/3] ath9k: Update AR9485 1.1 initvals
From: Sujith Manoharan @ 2013-09-03 4:58 UTC (permalink / raw)
To: John Linville; +Cc: linux-wireless
In-Reply-To: <1378184337-1816-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
* Remove duplicate array mappings.
* Fix ETSI CCA compliance.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
drivers/net/wireless/ath/ath9k/ar9485_initvals.h | 218 +++++++++++++++++++----
1 file changed, 184 insertions(+), 34 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
index 88ff1d7..6f899c6 100644
--- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
@@ -20,7 +20,17 @@
/* AR9485 1.1 */
-#define ar9485_1_1_mac_postamble ar9300_2p2_mac_postamble
+static const u32 ar9485_1_1_mac_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+ {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+ {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+ {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+ {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+ {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+ {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+ {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+};
static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
/* Addr allmodes */
@@ -34,6 +44,7 @@ static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
{0x00009e00, 0x037216a0},
{0x00009e04, 0x00182020},
{0x00009e18, 0x00000000},
+ {0x00009e20, 0x000003a8},
{0x00009e2c, 0x00004121},
{0x00009e44, 0x02282324},
{0x0000a000, 0x00060005},
@@ -174,7 +185,7 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
{0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
{0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
{0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050da, 0x000050da},
{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
{0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
@@ -200,14 +211,14 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
{0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
{0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
{0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
- {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
- {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62001eee, 0x62001eee},
+ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x66001ff6, 0x66001ff6},
+ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
{0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
@@ -263,6 +274,11 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
static const u32 ar9485Modes_green_ob_db_tx_gain_1_1[][5] = {
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
{0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
+ {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
+ {0x0000a2dc, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
{0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
{0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
@@ -297,6 +313,22 @@ static const u32 ar9485Modes_green_ob_db_tx_gain_1_1[][5] = {
{0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
{0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
{0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a58c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a590, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a594, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a598, 0x00000000, 0x00000000, 0x01404501, 0x01404501},
+ {0x0000a59c, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a5a0, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a5a4, 0x00000000, 0x00000000, 0x02808803, 0x02808803},
+ {0x0000a5a8, 0x00000000, 0x00000000, 0x04c14b04, 0x04c14b04},
+ {0x0000a5ac, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b0, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b4, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b8, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5bc, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
{0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
{0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
{0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
@@ -341,6 +373,100 @@ static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
{0x0000a2e0, 0x00000000, 0x00000000, 0xffc63a84, 0xffc63a84},
{0x0000a2e4, 0x00000000, 0x00000000, 0xfe0fc000, 0xfe0fc000},
{0x0000a2e8, 0x00000000, 0x00000000, 0xfff00000, 0xfff00000},
+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050da, 0x000050da},
+ {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+ {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+ {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+ {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
+ {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
+ {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
+ {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
+ {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
+ {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
+ {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
+ {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
+ {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
+ {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
+ {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
+ {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+ {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+ {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+ {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+ {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+ {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+ {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+ {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+ {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
+ {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62001eee, 0x62001eee},
+ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x66001ff6, 0x66001ff6},
+ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a58c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a590, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a594, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a598, 0x00000000, 0x00000000, 0x01404501, 0x01404501},
+ {0x0000a59c, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a5a0, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a5a4, 0x00000000, 0x00000000, 0x02808803, 0x02808803},
+ {0x0000a5a8, 0x00000000, 0x00000000, 0x04c14b04, 0x04c14b04},
+ {0x0000a5ac, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b0, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b4, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b8, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5bc, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+ {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
+static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+ {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
+ {0x0000a2dc, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
{0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
@@ -427,7 +553,7 @@ static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
};
-static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
+static const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5] = {
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
{0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
@@ -521,12 +647,15 @@ static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
};
-#define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
-
static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
{0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+ {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
+ {0x0000a2dc, 0x00000000, 0x00000000, 0xffad452a, 0xffad452a},
+ {0x0000a2e0, 0x00000000, 0x00000000, 0xffc98634, 0xffc98634},
+ {0x0000a2e4, 0x00000000, 0x00000000, 0xfff60780, 0xfff60780},
+ {0x0000a2e8, 0x00000000, 0x00000000, 0xfffff800, 0xfffff800},
+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
{0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
{0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
{0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
@@ -543,23 +672,39 @@ static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
{0x0000a530, 0x48023ec6, 0x48023ec6, 0x310006e0, 0x310006e0},
{0x0000a534, 0x4d023f01, 0x4d023f01, 0x330006e0, 0x330006e0},
{0x0000a538, 0x53023f4b, 0x53023f4b, 0x3e0008e3, 0x3e0008e3},
- {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x410008e5, 0x410008e5},
- {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x430008e6, 0x430008e6},
- {0x0000a544, 0x6502feca, 0x6502feca, 0x4a0008ec, 0x4a0008ec},
- {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4e0008f1, 0x4e0008f1},
- {0x0000a54c, 0x7203feca, 0x7203feca, 0x520008f3, 0x520008f3},
- {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x54000eed, 0x54000eed},
- {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x58000ef1, 0x58000ef1},
- {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5c000ef3, 0x5c000ef3},
- {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x60000ef5, 0x60000ef5},
- {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a564, 0x960fffcb, 0x960fffcb, 0x62000ef6, 0x62000ef6},
- {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x430008e6, 0x430008e6},
+ {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x4a0008ec, 0x4a0008ec},
+ {0x0000a544, 0x6502feca, 0x6502feca, 0x4e0008f1, 0x4e0008f1},
+ {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x520008f3, 0x520008f3},
+ {0x0000a54c, 0x7203feca, 0x7203feca, 0x54000eed, 0x54000eed},
+ {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x58000ef1, 0x58000ef1},
+ {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x5c000ef3, 0x5c000ef3},
+ {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x66001ff0, 0x66001ff0},
+ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x68001ff6, 0x68001ff6},
+ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a58c, 0x00000000, 0x00000000, 0x01804000, 0x01804000},
+ {0x0000a590, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a594, 0x00000000, 0x00000000, 0x0340ca02, 0x0340ca02},
+ {0x0000a598, 0x00000000, 0x00000000, 0x0340cd03, 0x0340cd03},
+ {0x0000a59c, 0x00000000, 0x00000000, 0x0340cd03, 0x0340cd03},
+ {0x0000a5a0, 0x00000000, 0x00000000, 0x06415304, 0x06415304},
+ {0x0000a5a4, 0x00000000, 0x00000000, 0x04c11905, 0x04c11905},
+ {0x0000a5a8, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5ac, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5b0, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5b4, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5b8, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5bc, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
{0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
{0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
{0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
@@ -823,6 +968,7 @@ static const u32 ar9485_common_rx_gain_1_1[][2] = {
{0x00009e00, 0x03721b20},
{0x00009e04, 0x00082020},
{0x00009e18, 0x0300501e},
+ {0x00009e20, 0x000003ba},
{0x00009e2c, 0x00002e21},
{0x00009e44, 0x02182324},
{0x0000a000, 0x00060005},
@@ -1001,7 +1147,6 @@ static const u32 ar9485_1_1_baseband_postamble[][5] = {
{0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec80d2e, 0x7ec80d2e},
{0x00009e14, 0x31395d53, 0x31396053, 0x312e6053, 0x312e5d53},
{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
- {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
{0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946222, 0xcf946222},
{0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},
{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
@@ -1020,7 +1165,7 @@ static const u32 ar9485_1_1_baseband_postamble[][5] = {
{0x0000a284, 0x00000000, 0x00000000, 0x000002a0, 0x000002a0},
{0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
- {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00058d18, 0x00058d18},
+ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
{0x0000a2d0, 0x00071981, 0x00071981, 0x00071982, 0x00071982},
{0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
@@ -1206,6 +1351,11 @@ static const u32 ar9485_1_1_mac_core[][2] = {
{0x000083d0, 0x000301ff},
};
-#define ar9485_1_1_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
+static const u32 ar9485_1_1_baseband_core_txfir_coeff_japan_2484[][2] = {
+ /* Addr allmodes */
+ {0x0000a398, 0x00000000},
+ {0x0000a39c, 0x6f7f0301},
+ {0x0000a3a0, 0xca9228ee},
+};
#endif /* INITVALS_9485_H */
--
1.8.4
^ permalink raw reply related
* [PATCH 1/3] ath9k: Fix regulatory compliance for AR9462/AR9565
From: Sujith Manoharan @ 2013-09-03 4:58 UTC (permalink / raw)
To: John Linville; +Cc: linux-wireless
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Adjust the CCA values based on the regulatory domain
present in the EEPROM.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
drivers/net/wireless/ath/ath9k/ar9003_phy.h | 4 ++++
drivers/net/wireless/ath/ath9k/hw.c | 12 ++++++++++++
2 files changed, 16 insertions(+)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 6fd7523..fca6243 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -343,8 +343,12 @@
#define AR_PHY_CCA_NOM_VAL_9462_2GHZ -127
#define AR_PHY_CCA_MIN_GOOD_VAL_9462_2GHZ -127
+#define AR_PHY_CCA_MAX_GOOD_VAL_9462_2GHZ -60
+#define AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_2GHZ -95
#define AR_PHY_CCA_NOM_VAL_9462_5GHZ -127
#define AR_PHY_CCA_MIN_GOOD_VAL_9462_5GHZ -127
+#define AR_PHY_CCA_MAX_GOOD_VAL_9462_5GHZ -60
+#define AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_5GHZ -100
#define AR_PHY_CCA_NOM_VAL_9330_2GHZ -118
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index ecc6ec4..260e0c6 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -549,6 +549,18 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
ath9k_hw_ani_init(ah);
+ /*
+ * EEPROM needs to be initialized before we do this.
+ * This is required for regulatory compliance.
+ */
+ if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
+ u16 regdmn = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
+ if ((regdmn & 0xF0) == CTL_FCC) {
+ ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_2GHZ;
+ ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_5GHZ;
+ }
+ }
+
return 0;
}
--
1.8.4
^ permalink raw reply related
* [PATCH 2/3] ath9k: Add and use initvals for channel 14
From: Sujith Manoharan @ 2013-09-03 4:58 UTC (permalink / raw)
To: John Linville; +Cc: linux-wireless
In-Reply-To: <1378184337-1816-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
This is missing for AR9565.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
drivers/net/wireless/ath/ath9k/ar9003_hw.c | 2 ++
drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h | 7 +++++++
2 files changed, 9 insertions(+)
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index d40bdd2..b07f164 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -364,6 +364,8 @@ static void ar9003_hw_init_mode_regs(struct ath_hw *ah)
INIT_INI_ARRAY(&ah->iniModesFastClock,
ar9565_1p0_modes_fast_clock);
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+ ar9565_1p0_baseband_core_txfir_coeff_japan_2484);
} else {
/* mac */
INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
diff --git a/drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h
index 03ecc07..a8c757b 100644
--- a/drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h
@@ -1231,4 +1231,11 @@ static const u32 ar9565_1p0_modes_high_power_tx_gain_table[][5] = {
{0x00016054, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
};
+static const u32 ar9565_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
+ /* Addr allmodes */
+ {0x0000a398, 0x00000000},
+ {0x0000a39c, 0x6f7f0301},
+ {0x0000a3a0, 0xca9228ee},
+};
+
#endif /* INITVALS_9565_1P0_H */
--
1.8.4
^ permalink raw reply related
* [PATCH 4/4] initvals: Update AR9485 1.1 initvals
From: Sujith Manoharan @ 2013-09-03 4:58 UTC (permalink / raw)
To: Luis R. Rodriguez; +Cc: linux-wireless
In-Reply-To: <1378184318-1169-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
This fixes issues with ETSI/CCA compliance.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
tools/initvals/ar9485_initvals.h | 61 ++++++++++++++++++++--------------------
tools/initvals/checksums.txt | 12 ++++----
2 files changed, 38 insertions(+), 35 deletions(-)
diff --git a/tools/initvals/ar9485_initvals.h b/tools/initvals/ar9485_initvals.h
index 4b37ced..6f899c6 100644
--- a/tools/initvals/ar9485_initvals.h
+++ b/tools/initvals/ar9485_initvals.h
@@ -44,6 +44,7 @@ static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
{0x00009e00, 0x037216a0},
{0x00009e04, 0x00182020},
{0x00009e18, 0x00000000},
+ {0x00009e20, 0x000003a8},
{0x00009e2c, 0x00004121},
{0x00009e44, 0x02282324},
{0x0000a000, 0x00060005},
@@ -184,7 +185,7 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
{0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
{0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
{0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050da, 0x000050da},
{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
{0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
@@ -210,14 +211,14 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
{0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
{0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
{0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
- {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
- {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62001eee, 0x62001eee},
+ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x66001ff6, 0x66001ff6},
+ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
{0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
@@ -372,7 +373,7 @@ static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
{0x0000a2e0, 0x00000000, 0x00000000, 0xffc63a84, 0xffc63a84},
{0x0000a2e4, 0x00000000, 0x00000000, 0xfe0fc000, 0xfe0fc000},
{0x0000a2e8, 0x00000000, 0x00000000, 0xfff00000, 0xfff00000},
- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050da, 0x000050da},
{0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
{0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
@@ -398,14 +399,14 @@ static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
{0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
{0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
{0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
- {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
- {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
- {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62001eee, 0x62001eee},
+ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x66001ff6, 0x66001ff6},
+ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
+ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x66001ff6, 0x66001ff6},
{0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
@@ -654,7 +655,7 @@ static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
{0x0000a2e0, 0x00000000, 0x00000000, 0xffc98634, 0xffc98634},
{0x0000a2e4, 0x00000000, 0x00000000, 0xfff60780, 0xfff60780},
{0x0000a2e8, 0x00000000, 0x00000000, 0xfffff800, 0xfffff800},
- {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d7, 0x000050d7},
+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
{0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
{0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
{0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
@@ -679,15 +680,15 @@ static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
{0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x58000ef1, 0x58000ef1},
{0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x5c000ef3, 0x5c000ef3},
{0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x62000ef6, 0x62000ef6},
- {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a564, 0x960fffcb, 0x960fffcb, 0x62000ef6, 0x62000ef6},
- {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
- {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x66001ff0, 0x66001ff0},
+ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x68001ff6, 0x68001ff6},
+ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
+ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x68001ff6, 0x68001ff6},
{0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
@@ -967,6 +968,7 @@ static const u32 ar9485_common_rx_gain_1_1[][2] = {
{0x00009e00, 0x03721b20},
{0x00009e04, 0x00082020},
{0x00009e18, 0x0300501e},
+ {0x00009e20, 0x000003ba},
{0x00009e2c, 0x00002e21},
{0x00009e44, 0x02182324},
{0x0000a000, 0x00060005},
@@ -1145,7 +1147,6 @@ static const u32 ar9485_1_1_baseband_postamble[][5] = {
{0x00009e10, 0x7ec88d2e, 0x7ec88d2e, 0x7ec80d2e, 0x7ec80d2e},
{0x00009e14, 0x31395d53, 0x31396053, 0x312e6053, 0x312e5d53},
{0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
- {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
{0x00009e3c, 0xcf946220, 0xcf946220, 0xcf946222, 0xcf946222},
{0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},
{0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
@@ -1164,7 +1165,7 @@ static const u32 ar9485_1_1_baseband_postamble[][5] = {
{0x0000a284, 0x00000000, 0x00000000, 0x000002a0, 0x000002a0},
{0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
- {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00058d18, 0x00058d18},
+ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
{0x0000a2d0, 0x00071981, 0x00071981, 0x00071982, 0x00071982},
{0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
diff --git a/tools/initvals/checksums.txt b/tools/initvals/checksums.txt
index 9fd46a4..beba14f 100644
--- a/tools/initvals/checksums.txt
+++ b/tools/initvals/checksums.txt
@@ -184,20 +184,22 @@ d9efd1c575ac43d60c310d717c59617a5323c111 ar9462_2p1_modes_fast_clock
dfaefa89122b4b769bfcf93b4bd9569f2b0ee961 ar9462_2p1_baseband_core_txfir_coeff_japan_2484
c8dc777b012068116cd5282aade8eb460f397d20 ar9485_1_1_mac_postamble
5d20e4848b97566ad55e0e95458463d622ee5480 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1
-d9a90632a00a7b417154173b947dfffdeab23e51 ar9485Common_wo_xlna_rx_gain_1_1
-88b0666758b93ccaa26d500f4a80fec368c6a4e2 ar9485Modes_high_power_tx_gain_1_1
-0ac7092cc0a74e2cd03a3cc8821d46fbc3d1b3f4 ar9485Modes_high_ob_db_tx_gain_1_1
+118caf7bf15a5e2815e901201660790d687b8e88 ar9485Common_wo_xlna_rx_gain_1_1
+4ab61ebe1630e1e520bd42eae923f01b29595097 ar9485Modes_high_power_tx_gain_1_1
+847e6743c552579a318d5e6e8bae695836332be8 ar9485Modes_green_ob_db_tx_gain_1_1
+a86889c4252ea3089ed0dc763e5f831941fc4fcc ar9485Modes_high_ob_db_tx_gain_1_1
88b0666758b93ccaa26d500f4a80fec368c6a4e2 ar9485Modes_low_ob_db_tx_gain_1_1
88b0666758b93ccaa26d500f4a80fec368c6a4e2 ar9485_modes_lowest_ob_db_tx_gain_1_1
+01f3b7a52af2ae57b0dd6e86435f7fbfdb37ccd4 ar9485Modes_green_spur_ob_db_tx_gain_1_1
5ca2c72bdaf75ac11c0f8ae8dae5bef32ffa3c3b ar9485_1_1
26e183ba89fcd047fa2c6e92549ed33772800bfb ar9485_1_1_radio_core
2cb731330486f7c5bc501693eb729531124d21a4 ar9485_1_1_baseband_core
-1d9e632b3fdcb2db52f95dd75ff2eac31fcac0d6 ar9485_common_rx_gain_1_1
+7479ef6332b0d923e8e7ddb888eb3a09aac7a8b4 ar9485_common_rx_gain_1_1
13bec2462d608918bcc8a5d2600c750730663745 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1
b8bc19098aa0ac38cf74ca4747e28ce6bad14fa1 ar9485_1_1_pcie_phy_clkreq_enable_L1
7e1adfdb0f6a6dbbbe901d8eb019a425edfa58a6 ar9485_1_1_soc_preamble
f247bc63c9a632092b94d1af1526650753b77a60 ar9485_fast_clock_1_1_baseband_postamble
-f1b452dfb558a755d9004241c29b43abd3332359 ar9485_1_1_baseband_postamble
+5e45cc3ca32a1cde2ad90f65bb81d0872b8dc87d ar9485_1_1_baseband_postamble
c8016c349304ed85842783f04f01f40a0cf4468f ar9485_1_1_pcie_phy_clkreq_disable_L1
f5bb0f6a25e512b85039e8c49ebc6555ff27ac4d ar9485_1_1_radio_postamble
be2a6982ce450a3e03b1593199395599778297b0 ar9485_1_1_mac_core
--
1.8.4
^ permalink raw reply related
* [PATCH 3/4] initvals: Add missing initval arrays for AR9485
From: Sujith Manoharan @ 2013-09-03 4:58 UTC (permalink / raw)
To: Luis R. Rodriguez; +Cc: linux-wireless
In-Reply-To: <1378184318-1169-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
tools/initvals/ar9485_initvals.h | 188 +++++++++++++++++++++++++++++++++++++++
tools/initvals/initvals.c | 4 +
2 files changed, 192 insertions(+)
diff --git a/tools/initvals/ar9485_initvals.h b/tools/initvals/ar9485_initvals.h
index 5b5ab76..4b37ced 100644
--- a/tools/initvals/ar9485_initvals.h
+++ b/tools/initvals/ar9485_initvals.h
@@ -270,6 +270,100 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
};
+static const u32 ar9485Modes_green_ob_db_tx_gain_1_1[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
+ {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
+ {0x0000a2dc, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+ {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
+ {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
+ {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
+ {0x0000a508, 0x0c002e00, 0x0c002e00, 0x06000203, 0x06000203},
+ {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
+ {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
+ {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
+ {0x0000a518, 0x25020ec0, 0x25020ec0, 0x15000604, 0x15000604},
+ {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x18000605, 0x18000605},
+ {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000a04, 0x1c000a04},
+ {0x0000a524, 0x35001fc4, 0x35001fc4, 0x21000a06, 0x21000a06},
+ {0x0000a528, 0x3c022f04, 0x3c022f04, 0x29000a24, 0x29000a24},
+ {0x0000a52c, 0x41023e85, 0x41023e85, 0x2f000e21, 0x2f000e21},
+ {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000e20, 0x31000e20},
+ {0x0000a534, 0x4d023f01, 0x4d023f01, 0x33000e20, 0x33000e20},
+ {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+ {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+ {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+ {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+ {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+ {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+ {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+ {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+ {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
+ {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a58c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a590, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a594, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a598, 0x00000000, 0x00000000, 0x01404501, 0x01404501},
+ {0x0000a59c, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a5a0, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a5a4, 0x00000000, 0x00000000, 0x02808803, 0x02808803},
+ {0x0000a5a8, 0x00000000, 0x00000000, 0x04c14b04, 0x04c14b04},
+ {0x0000a5ac, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b0, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b4, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b8, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5bc, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
+ {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
+ {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
+ {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+ {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
/* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
{0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
@@ -552,6 +646,100 @@ static const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5] = {
{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
};
+static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
+ {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
+ {0x0000a2dc, 0x00000000, 0x00000000, 0xffad452a, 0xffad452a},
+ {0x0000a2e0, 0x00000000, 0x00000000, 0xffc98634, 0xffc98634},
+ {0x0000a2e4, 0x00000000, 0x00000000, 0xfff60780, 0xfff60780},
+ {0x0000a2e8, 0x00000000, 0x00000000, 0xfffff800, 0xfffff800},
+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d7, 0x000050d7},
+ {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
+ {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
+ {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
+ {0x0000a508, 0x0c002e00, 0x0c002e00, 0x07000203, 0x07000203},
+ {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
+ {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
+ {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
+ {0x0000a518, 0x25020ec0, 0x25020ec0, 0x14000406, 0x14000406},
+ {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1800040a, 0x1800040a},
+ {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000460, 0x1c000460},
+ {0x0000a524, 0x35001fc4, 0x35001fc4, 0x22000463, 0x22000463},
+ {0x0000a528, 0x3c022f04, 0x3c022f04, 0x26000465, 0x26000465},
+ {0x0000a52c, 0x41023e85, 0x41023e85, 0x2e0006e0, 0x2e0006e0},
+ {0x0000a530, 0x48023ec6, 0x48023ec6, 0x310006e0, 0x310006e0},
+ {0x0000a534, 0x4d023f01, 0x4d023f01, 0x330006e0, 0x330006e0},
+ {0x0000a538, 0x53023f4b, 0x53023f4b, 0x3e0008e3, 0x3e0008e3},
+ {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x430008e6, 0x430008e6},
+ {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x4a0008ec, 0x4a0008ec},
+ {0x0000a544, 0x6502feca, 0x6502feca, 0x4e0008f1, 0x4e0008f1},
+ {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x520008f3, 0x520008f3},
+ {0x0000a54c, 0x7203feca, 0x7203feca, 0x54000eed, 0x54000eed},
+ {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x58000ef1, 0x58000ef1},
+ {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x5c000ef3, 0x5c000ef3},
+ {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x62000ef6, 0x62000ef6},
+ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x62000ef6, 0x62000ef6},
+ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+ {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a58c, 0x00000000, 0x00000000, 0x01804000, 0x01804000},
+ {0x0000a590, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a594, 0x00000000, 0x00000000, 0x0340ca02, 0x0340ca02},
+ {0x0000a598, 0x00000000, 0x00000000, 0x0340cd03, 0x0340cd03},
+ {0x0000a59c, 0x00000000, 0x00000000, 0x0340cd03, 0x0340cd03},
+ {0x0000a5a0, 0x00000000, 0x00000000, 0x06415304, 0x06415304},
+ {0x0000a5a4, 0x00000000, 0x00000000, 0x04c11905, 0x04c11905},
+ {0x0000a5a8, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5ac, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5b0, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5b4, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5b8, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000a5bc, 0x00000000, 0x00000000, 0x06415905, 0x06415905},
+ {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+ {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
+ {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
+ {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
+ {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+ {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+ {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
static const u32 ar9485_1_1[][2] = {
/* Addr allmodes */
{0x0000a580, 0x00000000},
diff --git a/tools/initvals/initvals.c b/tools/initvals/initvals.c
index d1b5f16..3cefca1 100644
--- a/tools/initvals/initvals.c
+++ b/tools/initvals/initvals.c
@@ -254,6 +254,8 @@ struct initval_family {
#define ar9485_poseidon1_1_radio_postamble ar9485_1_1_radio_postamble
#define ar9485_poseidon1_1_mac_core ar9485_1_1_mac_core
#define ar9485_poseidon1_1_baseband_core_txfir_coeff_japan_2484 ar9485_1_1_baseband_core_txfir_coeff_japan_2484
+#define ar9485_modes_green_ob_db_tx_gain_poseidon1_1 ar9485Modes_green_ob_db_tx_gain_1_1
+#define ar9485_modes_green_spur_ob_db_tx_gain_poseidon1_1 ar9485Modes_green_spur_ob_db_tx_gain_1_1
#include "ar9485_1_1.ini"
@@ -832,9 +834,11 @@ static void ar9485_hw_print_initvals(bool check)
INI_PRINT(ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1);
INI_PRINT(ar9485Common_wo_xlna_rx_gain_1_1);
INI_PRINT(ar9485Modes_high_power_tx_gain_1_1);
+ INI_PRINT(ar9485Modes_green_ob_db_tx_gain_1_1);
INI_PRINT(ar9485Modes_high_ob_db_tx_gain_1_1);
INI_PRINT(ar9485Modes_low_ob_db_tx_gain_1_1);
INI_PRINT(ar9485_modes_lowest_ob_db_tx_gain_1_1);
+ INI_PRINT(ar9485Modes_green_spur_ob_db_tx_gain_1_1);
INI_PRINT(ar9485_1_1);
INI_PRINT(ar9485_1_1_radio_core);
INI_PRINT(ar9485_1_1_baseband_core);
--
1.8.4
^ permalink raw reply related
* [PATCH 2/4] initvals: Remove duplicate mapping for AR9485 arrays
From: Sujith Manoharan @ 2013-09-03 4:58 UTC (permalink / raw)
To: Luis R. Rodriguez; +Cc: linux-wireless
In-Reply-To: <1378184318-1169-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
tools/initvals/ar9485_initvals.h | 115 +++++++++++++++++++++++++++++++++++++--
tools/initvals/initvals.c | 18 ++----
2 files changed, 116 insertions(+), 17 deletions(-)
diff --git a/tools/initvals/ar9485_initvals.h b/tools/initvals/ar9485_initvals.h
index a3710f3..5b5ab76 100644
--- a/tools/initvals/ar9485_initvals.h
+++ b/tools/initvals/ar9485_initvals.h
@@ -20,7 +20,17 @@
/* AR9485 1.1 */
-#define ar9485_1_1_mac_postamble ar9300_2p2_mac_postamble
+static const u32 ar9485_1_1_mac_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
+ {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
+ {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
+ {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
+ {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
+ {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
+ {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
+ {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
+};
static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
/* Addr allmodes */
@@ -448,7 +458,99 @@ static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
{0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
};
-#define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
+static const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+ {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
+ {0x0000a2dc, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
+ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+ {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
+ {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
+ {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
+ {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
+ {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
+ {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
+ {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
+ {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
+ {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
+ {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
+ {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
+ {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
+ {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
+ {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
+ {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+ {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+ {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+ {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+ {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+ {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+ {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+ {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+ {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
+ {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+ {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a58c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a590, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a594, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a598, 0x00000000, 0x00000000, 0x01404501, 0x01404501},
+ {0x0000a59c, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a5a0, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
+ {0x0000a5a4, 0x00000000, 0x00000000, 0x02808803, 0x02808803},
+ {0x0000a5a8, 0x00000000, 0x00000000, 0x04c14b04, 0x04c14b04},
+ {0x0000a5ac, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b0, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b4, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5b8, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000a5bc, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
+ {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+ {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
static const u32 ar9485_1_1[][2] = {
/* Addr allmodes */
@@ -874,7 +976,7 @@ static const u32 ar9485_1_1_baseband_postamble[][5] = {
{0x0000a284, 0x00000000, 0x00000000, 0x000002a0, 0x000002a0},
{0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
{0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
- {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
+ {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00058d18, 0x00058d18},
{0x0000a2d0, 0x00071981, 0x00071981, 0x00071982, 0x00071982},
{0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
{0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
@@ -1060,6 +1162,11 @@ static const u32 ar9485_1_1_mac_core[][2] = {
{0x000083d0, 0x000301ff},
};
-#define ar9485_1_1_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
+static const u32 ar9485_1_1_baseband_core_txfir_coeff_japan_2484[][2] = {
+ /* Addr allmodes */
+ {0x0000a398, 0x00000000},
+ {0x0000a39c, 0x6f7f0301},
+ {0x0000a3a0, 0xca9228ee},
+};
#endif /* INITVALS_9485_H */
diff --git a/tools/initvals/initvals.c b/tools/initvals/initvals.c
index 41e8051..d1b5f16 100644
--- a/tools/initvals/initvals.c
+++ b/tools/initvals/initvals.c
@@ -828,19 +828,13 @@ static void ar9340_hw_print_initvals(bool check)
static void ar9485_hw_print_initvals(bool check)
{
- INI_PRINT_DUP(ar9485_1_1_mac_postamble,
- ar9300_2p2_mac_postamble);
+ INI_PRINT(ar9485_1_1_mac_postamble);
INI_PRINT(ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1);
INI_PRINT(ar9485Common_wo_xlna_rx_gain_1_1);
-
INI_PRINT(ar9485Modes_high_power_tx_gain_1_1);
- INI_PRINT_DUP(ar9485Modes_high_ob_db_tx_gain_1_1,
- ar9485Modes_high_power_tx_gain_1_1);
- INI_PRINT_DUP(ar9485Modes_low_ob_db_tx_gain_1_1,
- ar9485Modes_high_ob_db_tx_gain_1_1);
- INI_PRINT_DUP(ar9485_modes_lowest_ob_db_tx_gain_1_1,
- ar9485Modes_low_ob_db_tx_gain_1_1);
-
+ INI_PRINT(ar9485Modes_high_ob_db_tx_gain_1_1);
+ INI_PRINT(ar9485Modes_low_ob_db_tx_gain_1_1);
+ INI_PRINT(ar9485_modes_lowest_ob_db_tx_gain_1_1);
INI_PRINT(ar9485_1_1);
INI_PRINT(ar9485_1_1_radio_core);
INI_PRINT(ar9485_1_1_baseband_core);
@@ -853,9 +847,7 @@ static void ar9485_hw_print_initvals(bool check)
INI_PRINT(ar9485_1_1_pcie_phy_clkreq_disable_L1);
INI_PRINT(ar9485_1_1_radio_postamble);
INI_PRINT(ar9485_1_1_mac_core);
-
- INI_PRINT_DUP(ar9485_1_1_baseband_core_txfir_coeff_japan_2484,
- ar9462_2p0_baseband_core_txfir_coeff_japan_2484);
+ INI_PRINT(ar9485_1_1_baseband_core_txfir_coeff_japan_2484);
}
static void ar955x_1p0_hw_print_initvals(bool check)
--
1.8.4
^ permalink raw reply related
* [PATCH 1/4] initvals: Add channel 14 initvals for AR9565
From: Sujith Manoharan @ 2013-09-03 4:58 UTC (permalink / raw)
To: Luis R. Rodriguez; +Cc: linux-wireless
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
tools/initvals/ar9565_1p0_initvals.h | 7 +++++++
tools/initvals/checksums.txt | 1 +
tools/initvals/initvals.c | 1 +
3 files changed, 9 insertions(+)
diff --git a/tools/initvals/ar9565_1p0_initvals.h b/tools/initvals/ar9565_1p0_initvals.h
index 03ecc07..a8c757b 100644
--- a/tools/initvals/ar9565_1p0_initvals.h
+++ b/tools/initvals/ar9565_1p0_initvals.h
@@ -1231,4 +1231,11 @@ static const u32 ar9565_1p0_modes_high_power_tx_gain_table[][5] = {
{0x00016054, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
};
+static const u32 ar9565_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
+ /* Addr allmodes */
+ {0x0000a398, 0x00000000},
+ {0x0000a39c, 0x6f7f0301},
+ {0x0000a3a0, 0xca9228ee},
+};
+
#endif /* INITVALS_9565_1P0_H */
diff --git a/tools/initvals/checksums.txt b/tools/initvals/checksums.txt
index e39c382..9fd46a4 100644
--- a/tools/initvals/checksums.txt
+++ b/tools/initvals/checksums.txt
@@ -234,6 +234,7 @@ a3173672141a2ac797e660228d41a609f9ab2c4c ar9565_1p0_pciephy_clkreq_disabl
4bf703cdebf0bfb9ad867cb53b79d6c3957b6f91 ar9565_1p0_modes_low_ob_db_tx_gain_table
e1be4dc91b540109b236b6b4002a9108ad3a01de ar9565_1p0_modes_high_ob_db_tx_gain_table
19ed468cdcc0c0be512a64d55f40c609e6d75720 ar9565_1p0_modes_high_power_tx_gain_table
+dfaefa89122b4b769bfcf93b4bd9569f2b0ee961 ar9565_1p0_baseband_core_txfir_coeff_japan_2484
87e0ecae5df96673e22bc448b17d813510964de8 ar9580_1p0_modes_fast_clock
6b0fb5b3698c99f42a885c8e982ae436363f1865 ar9580_1p0_radio_postamble
5b81bf27a30c826cfde3e8f6746473e949cb41ef ar9580_1p0_baseband_core
diff --git a/tools/initvals/initvals.c b/tools/initvals/initvals.c
index a1647e3..41e8051 100644
--- a/tools/initvals/initvals.c
+++ b/tools/initvals/initvals.c
@@ -982,6 +982,7 @@ static void ar9565_1p0_hw_print_initvals(bool check)
INI_PRINT(ar9565_1p0_modes_low_ob_db_tx_gain_table);
INI_PRINT(ar9565_1p0_modes_high_ob_db_tx_gain_table);
INI_PRINT(ar9565_1p0_modes_high_power_tx_gain_table);
+ INI_PRINT(ar9565_1p0_baseband_core_txfir_coeff_japan_2484);
}
#define FAM(_name, _def, _ver, _print) { \
--
1.8.4
^ permalink raw reply related
* WFD Development setup issues
From: HunTERminator Chief @ 2013-09-02 23:02 UTC (permalink / raw)
To: linux-wireless
[-- Attachment #1: Type: text/plain, Size: 4583 bytes --]
Hello all,
I am writing a C++ application to manage Wifi-Direct connections and am simply trying to get Wifi-Direct up and running at this point.
I have compiled wpa_supplicant 2.0 on Ubuntu 12.04 using a Broadcom BCM4312 802.11b/g LP-PHY (rev 01) adapter.
When I try to initialize wpa supplicant (following these instructions: http://wireless.kernel.org/en/developers/p2p/howto )
I get the following error output:
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1378158767.776376: EAPOL: SUPP_PAE entering state DISCONNECTED
1378158767.776385: EAPOL: Supplicant port status: Unauthorized
1378158767.776417: EAPOL: KEY_RX entering state NO_KEY_RECEIVE
1378158767.776424: EAPOL: SUPP_BE entering state INITIALIZE
1378158767.776433: EAP: EAP entering state DISABLED
1378158767.776440: EAPOL: Supplicant port status: Unauthorized
1378158767.776462: EAPOL: Supplicant port status: Unauthorized
1378158767.776503: Using existing control interface directory.
1378158767.776528: ctrl_iface bind(PF_UNIX) failed: Address already in use
1378158767.776542: ctrl_iface exists and seems to be in use - cannot override it
1378158767.776547: Delete '/var/run/wpa_supplicant/eth1' manually if it is not used anymore
1378158767.776556: Failed to initialize control interface '/var/run/wpa_supplicant'.
You may have another wpa_supplicant process already running or the file was
left by an unclean termination of wpa_supplicant in which case you will need
to manually remove this file before starting wpa_supplicant again.
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
(Note: Broadcom names its wireless connection eth1, not wlan0)
When I then delete the 'eth1' folder from wpa_supplicant and run again I get this error:
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1378160287.325607: eth1: No suitable network found
1378160287.325617: eth1: Short-circuit new scan request since there are no enabled networks
1378160287.325627: eth1: State: INACTIVE -> INACTIVE
1378160287.325637: eth1: Checking for other virtual interfaces sharing same radio (phy0) in event_scan_results
1378160287.327677: RTM_NEWLINK: operstate=0 ifi_flags=0x11043 ([UP][RUNNING][LOWER_UP])
1378160287.327705: RTM_NEWLINK, IFLA_IFNAME: Interface 'eth1' added
1378160287.327745: nl80211: if_removed already cleared - ignore event
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
This loops over and over outputting this to the screen along with "removing" various networks that I have connected to in the past:
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
1378160350.834446: eth1: BSS: Remove id 14 BSSID 00:23:69:99:55:79 SSID 'BBLink' due to wpa_bss_flush_by_age
1378160350.834480: eth1: BSS: Remove id 18 BSSID 70:56:81:84:84:d1 SSID 'Peter-NC' due to wpa_bss_flush_by_age
1378160350.834494: eth1: BSS: Remove id 19 BSSID 00:8e:f2:53:66:be SSID 'NETGEAR36' due to wpa_bss_flush_by_age
1378160350.834508: eth1: BSS: Remove id 21 BSSID 94:44:52:2f:8d:c3 SSID 'Belkin_G_Wireless_2F8DC3' due to wpa_bss_flush_by_age
1378160350.834522: eth1: BSS: Remove id 22 BSSID 00:22:3f:65:ac:f0 SSID 'Perza' due to wpa_bss_flush_by_age
1378160350.834535: eth1: BSS: Remove id 23 BSSID ec:1a:59:4a:a1:7d SSID 'belkin.17d' due to wpa_bss_flush_by_age
1378160350.834548: eth1: BSS: Remove id 24 BSSID 84:1b:5e:04:3c:8e SSID 'kirat' due to wpa_bss_flush_by_age
1378160350.834561: eth1: BSS: Remove id 26 BSSID c8:3a:35:57:3a:98 SSID '420' due to wpa_bss_flush_by_age
-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------
I have attached the full output to this email.
Can anyone tell me why this is happening? Or otherwise, how to get the ./wpa_supplicant to run properly?
Thanks in advance
-Brian
[-- Attachment #2: wpa_supplicant_output.txt --]
[-- Type: text/plain, Size: 23530 bytes --]
brian@Sir-Flimsy-Screen:~/wpa_supplicant-2.0/wpa_supplicant$ sudo ./wpa_supplicant -Dnl80211 -c ~/wpa_config -i eth1 -dt
1378160160.685930: wpa_supplicant v2.0
1378160160.686148: random: Trying to read entropy from /dev/random
1378160160.686257: Successfully initialized wpa_supplicant
1378160160.687770: Initializing interface 'eth1' conf '/home/brian/wpa_config' driver 'nl80211' ctrl_interface 'N/A' bridge 'N/A'
1378160160.687806: Configuration file '/home/brian/wpa_config' -> '/home/brian/wpa_config'
1378160160.687815: Reading configuration file '/home/brian/wpa_config'
1378160160.687883: ctrl_interface='/var/run/wpa_supplicant'
1378160160.687893: ap_scan=1
1378160160.687899: device_name='Flimsy'
1378160160.688523: nl80211: interface eth1 in phy phy0
1378160160.688551: rfkill: initial event: idx=0 type=1 op=0 soft=0 hard=0
1378160160.688558: rfkill: initial event: idx=1 type=1 op=0 soft=0 hard=0
1378160160.688563: rfkill: initial event: idx=2 type=1 op=0 soft=0 hard=0
1378160160.688631: nl80211: Set mode ifindex 3 iftype 2 (STATION)
1378160160.688677: nl80211: Subscribe to mgmt frames with non-AP handle 0x94d9f78
1378160160.688689: nl80211: Register frame type=0xd0 nl_handle=0x94d9f78
1378160160.688695: nl80211: Register frame match - hexdump(len=2): 04 0a
1378160160.688726: nl80211: Register frame command failed (type=208): ret=-95 (Operation not supported)
1378160160.688733: nl80211: Register frame match - hexdump(len=2): 04 0a
1378160160.688738: nl80211: Failed to register Action frame processing - ignore for now
1378160160.688747: netlink: Operstate: linkmode=1, operstate=5
1378160160.689550: nl80211: driver param='(null)'
1378160160.689680: nl80211: Regulatory information - country=00
1378160160.689698: nl80211: 2402-2472 @ 40 MHz
1378160160.689711: nl80211: 2457-2482 @ 20 MHz
1378160160.689722: nl80211: 2474-2494 @ 20 MHz
1378160160.689734: nl80211: 5170-5250 @ 40 MHz
1378160160.689745: nl80211: 5735-5835 @ 40 MHz
1378160160.689771: nl80211: Added 802.11b mode based on 802.11g information
1378160160.690628: eth1: Own MAC address: 0c:60:76:7e:87:6e
1378160160.690697: wpa_driver_nl80211_set_key: ifindex=3 alg=0 addr=(nil) key_idx=0 set_tx=0 seq_len=0 key_len=0
1378160160.690977: wpa_driver_nl80211_set_key: ifindex=3 alg=0 addr=(nil) key_idx=1 set_tx=0 seq_len=0 key_len=0
1378160160.691268: wpa_driver_nl80211_set_key: ifindex=3 alg=0 addr=(nil) key_idx=2 set_tx=0 seq_len=0 key_len=0
1378160160.691556: wpa_driver_nl80211_set_key: ifindex=3 alg=0 addr=(nil) key_idx=3 set_tx=0 seq_len=0 key_len=0
1378160160.691788: eth1: RSN: flushing PMKID list in the driver
1378160160.691817: nl80211: Flush PMKIDs
1378160160.692054: eth1: State: DISCONNECTED -> INACTIVE
1378160160.692080: WPS: Set UUID for interface eth1
1378160160.692139: WPS: UUID based on MAC address - hexdump(len=16): 30 d0 20 b4 19 36 5f eb ac 93 40 a5 26 ea ab a3
1378160160.692170: EAPOL: SUPP_PAE entering state DISCONNECTED
1378160160.692188: EAPOL: Supplicant port status: Unauthorized
1378160160.692406: EAPOL: KEY_RX entering state NO_KEY_RECEIVE
1378160160.692419: EAPOL: SUPP_BE entering state INITIALIZE
1378160160.692434: EAP: EAP entering state DISABLED
1378160160.692452: EAPOL: Supplicant port status: Unauthorized
1378160160.692483: EAPOL: Supplicant port status: Unauthorized
1378160160.692538: Using existing control interface directory.
1378160160.692594: eth1: Added interface eth1
1378160160.692612: eth1: State: INACTIVE -> DISCONNECTED
1378160160.692626: wpa_driver_nl80211_set_operstate: operstate 0->0 (DORMANT)
1378160160.692638: netlink: Operstate: linkmode=-1, operstate=5
1378160160.692992: random: Got 20/20 bytes from /dev/random
1378160160.693044: RTM_NEWLINK: operstate=0 ifi_flags=0x11003 ([UP][LOWER_UP])
1378160160.693066: RTM_NEWLINK, IFLA_IFNAME: Interface 'eth1' added
1378160160.693092: nl80211: if_removed already cleared - ignore event
1378160160.693107: RTM_NEWLINK: operstate=0 ifi_flags=0x11043 ([UP][RUNNING][LOWER_UP])
1378160160.693120: RTM_NEWLINK, IFLA_IFNAME: Interface 'eth1' added
1378160160.693137: nl80211: if_removed already cleared - ignore event
1378160160.693151: RTM_NEWLINK: operstate=0 ifi_flags=0x11003 ([UP][LOWER_UP])
1378160160.693164: RTM_NEWLINK, IFLA_IFNAME: Interface 'eth1' added
1378160160.693180: nl80211: if_removed already cleared - ignore event
1378160160.693195: RTM_NEWLINK: operstate=0 ifi_flags=0x11043 ([UP][RUNNING][LOWER_UP])
1378160160.693208: RTM_NEWLINK, IFLA_IFNAME: Interface 'eth1' added
1378160160.693224: nl80211: if_removed already cleared - ignore event
1378160161.693603: EAPOL: disable timer tick
1378160161.693625: EAPOL: Supplicant port status: Unauthorized
1378160165.370556: nl80211: Event message available
1378160165.370622: nl80211: Scan trigger
1378160167.324574: nl80211: Event message available
1378160167.324622: nl80211: New scan results available
1378160167.324646: eth1: Event SCAN_RESULTS (3) received
1378160167.324715: nl80211: Associated on 2417 MHz
1378160167.324722: nl80211: Associated with 20:aa:4b:60:7a:e3
1378160167.324818: nl80211: Received scan results (33 BSSes)
1378160167.324835: nl80211: Scan results indicate BSS status with 20:aa:4b:60:7a:e3 as associated
1378160167.324843: nl80211: Local state (not associated) does not match with BSS state
1378160167.324898: eth1: BSS: Start scan result update 1
1378160167.324909: eth1: BSS: Add new id 0 BSSID 20:aa:4b:60:7a:e3 SSID 'Internet Box UHF'
1378160167.324920: eth1: BSS: Add new id 1 BSSID 20:aa:4b:2c:18:f4 SSID 'pearl4u'
1378160167.324929: eth1: BSS: Add new id 2 BSSID 30:46:9a:64:83:de SSID 'CGD24G93'
1378160167.324938: eth1: BSS: Add new id 3 BSSID 20:4e:7f:47:a7:aa SSID 'Legaleagle'
1378160167.324948: eth1: BSS: Add new id 4 BSSID ec:1a:59:3e:96:8c SSID 'belkin.68c'
1378160167.324957: eth1: BSS: Add new id 5 BSSID 20:4e:7f:46:80:b0 SSID 'BuenaVista'
1378160167.324983: eth1: BSS: Add new id 6 BSSID ec:1a:59:9a:5a:28 SSID 'kranthi'
1378160167.324993: eth1: BSS: Add new id 7 BSSID 58:6d:8f:75:0d:96 SSID 'Harris'
1378160167.325002: eth1: BSS: Add new id 8 BSSID 00:17:3f:67:4d:9c SSID 'Magnitude'
1378160167.325012: eth1: BSS: Add new id 9 BSSID 20:aa:4b:c2:13:f0 SSID 'InquisitorSlade'
1378160167.325021: eth1: BSS: Add new id 10 BSSID ec:1a:59:a8:0e:99 SSID 'belkin.e99'
1378160167.325031: eth1: BSS: Add new id 11 BSSID 08:86:3b:a2:8d:60 SSID 'gobluedevils'
1378160167.325040: eth1: BSS: Add new id 12 BSSID 00:26:f2:f6:90:21 SSID 'Madimatt'
1378160167.325049: eth1: BSS: Add new id 13 BSSID 84:1b:5e:29:fe:5c SSID 'JOHNRO'
1378160167.325059: eth1: BSS: Add new id 14 BSSID 00:23:69:99:55:79 SSID 'BBLink'
1378160167.325068: eth1: BSS: Add new id 15 BSSID 00:24:2c:0e:46:89 SSID 'REYNOLDS'
1378160167.325078: eth1: BSS: Add new id 16 BSSID 08:86:3b:4a:5e:68 SSID 'belkin.e68'
1378160167.325087: eth1: BSS: Add new id 17 BSSID ec:1a:59:86:e6:3b SSID 'belkin.63b'
1378160167.325097: eth1: BSS: Add new id 18 BSSID 70:56:81:84:84:d1 SSID 'Peter-NC'
1378160167.325106: eth1: BSS: Add new id 19 BSSID 00:8e:f2:53:66:be SSID 'NETGEAR36'
1378160167.325116: eth1: BSS: Add new id 20 BSSID 90:72:40:0e:1e:72 SSID 'Trish's Wi-Fi Network'
1378160167.325127: eth1: BSS: Add new id 21 BSSID 94:44:52:2f:8d:c3 SSID 'Belkin_G_Wireless_2F8DC3'
1378160167.325136: eth1: BSS: Add new id 22 BSSID 00:22:3f:65:ac:f0 SSID 'Perza'
1378160167.325146: eth1: BSS: Add new id 23 BSSID ec:1a:59:4a:a1:7d SSID 'belkin.17d'
1378160167.325156: eth1: BSS: Add new id 24 BSSID 84:1b:5e:04:3c:8e SSID 'kirat'
1378160167.325170: eth1: BSS: Add new id 25 BSSID 30:46:9a:64:7c:db SSID 'AThomas'
1378160167.325181: eth1: BSS: Add new id 26 BSSID c8:3a:35:57:3a:98 SSID '420'
1378160167.325190: eth1: BSS: Add new id 27 BSSID 00:14:d1:42:9a:6a SSID '200a'
1378160167.325199: eth1: BSS: Add new id 28 BSSID 00:14:d1:42:97:52 SSID '513'
1378160167.325209: eth1: BSS: Add new id 29 BSSID e0:91:f5:ca:b9:4c SSID 'Diamond1'
1378160167.325218: eth1: BSS: Add new id 30 BSSID 58:6d:8f:75:0d:98 SSID 'Harris-guest'
1378160167.325228: eth1: BSS: Add new id 31 BSSID ec:1a:59:9a:5a:2b SSID 'belkin.a28.guests'
1378160167.325238: eth1: BSS: Add new id 32 BSSID 00:18:39:80:c1:47 SSID 'linksys'
1378160167.325248: BSS: last_scan_res_used=33/64 last_scan_full=0
1378160167.325268: eth1: New scan results available
1378160167.325302: WPS: AP 20:aa:4b:2c:18:f4 type 0 added
1378160167.325309: WPS: AP 30:46:9a:64:83:de type 0 added
1378160167.325316: WPS: AP 20:4e:7f:47:a7:aa type 0 added
1378160167.325322: WPS: AP ec:1a:59:3e:96:8c type 0 added
1378160167.325328: WPS: AP 20:4e:7f:46:80:b0 type 0 added
1378160167.325334: WPS: AP ec:1a:59:9a:5a:28 type 0 added
1378160167.325341: WPS: AP 58:6d:8f:75:0d:96 type 0 added
1378160167.325347: WPS: AP 20:aa:4b:c2:13:f0 type 0 added
1378160167.325353: WPS: AP ec:1a:59:a8:0e:99 type 0 added
1378160167.325359: WPS: AP 08:86:3b:a2:8d:60 type 0 added
1378160167.325365: WPS: AP 00:26:f2:f6:90:21 type 0 added
1378160167.325371: WPS: AP 84:1b:5e:29:fe:5c type 0 added
1378160167.325377: WPS: AP 00:23:69:99:55:79 type 0 added
1378160167.325383: WPS: AP 08:86:3b:4a:5e:68 type 0 added
1378160167.325389: WPS: AP ec:1a:59:86:e6:3b type 0 added
1378160167.325395: WPS: AP 00:8e:f2:53:66:be type 0 added
1378160167.325401: WPS: AP 94:44:52:2f:8d:c3 type 0 added
1378160167.325407: WPS: AP ec:1a:59:4a:a1:7d type 0 added
1378160167.325413: WPS: AP 84:1b:5e:04:3c:8e type 0 added
1378160167.325420: WPS: AP 30:46:9a:64:7c:db type 0 added
1378160167.325427: WPS: AP c8:3a:35:57:3a:98 type 0 added
1378160167.325433: WPS: AP e0:91:f5:ca:b9:4c type 0 added
1378160167.325442: WPS: AP[0] 20:aa:4b:2c:18:f4 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325448: WPS: AP[1] 30:46:9a:64:83:de type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325454: WPS: AP[2] 20:4e:7f:47:a7:aa type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325460: WPS: AP[3] ec:1a:59:3e:96:8c type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325466: WPS: AP[4] 20:4e:7f:46:80:b0 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325472: WPS: AP[5] ec:1a:59:9a:5a:28 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325478: WPS: AP[6] 58:6d:8f:75:0d:96 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325483: WPS: AP[7] 20:aa:4b:c2:13:f0 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325489: WPS: AP[8] ec:1a:59:a8:0e:99 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325495: WPS: AP[9] 08:86:3b:a2:8d:60 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325501: WPS: AP[10] 00:26:f2:f6:90:21 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325507: WPS: AP[11] 84:1b:5e:29:fe:5c type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325512: WPS: AP[12] 00:23:69:99:55:79 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325519: WPS: AP[13] 08:86:3b:4a:5e:68 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325525: WPS: AP[14] ec:1a:59:86:e6:3b type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325531: WPS: AP[15] 00:8e:f2:53:66:be type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325537: WPS: AP[16] 94:44:52:2f:8d:c3 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325543: WPS: AP[17] ec:1a:59:4a:a1:7d type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325548: WPS: AP[18] 84:1b:5e:04:3c:8e type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325779: WPS: AP[19] 30:46:9a:64:7c:db type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325789: WPS: AP[20] c8:3a:35:57:3a:98 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325795: WPS: AP[21] e0:91:f5:ca:b9:4c type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160167.325813: eth1: No suitable network found
1378160167.325822: eth1: Short-circuit new scan request since there are no enabled networks
1378160167.325829: eth1: State: DISCONNECTED -> INACTIVE
1378160167.325836: eth1: Checking for other virtual interfaces sharing same radio (phy0) in event_scan_results
1378160167.325859: RTM_NEWLINK: operstate=0 ifi_flags=0x11043 ([UP][RUNNING][LOWER_UP])
1378160167.325866: RTM_NEWLINK, IFLA_IFNAME: Interface 'eth1' added
1378160167.325894: nl80211: if_removed already cleared - ignore event
1378160285.371771: nl80211: Event message available
1378160285.371826: nl80211: Scan trigger
1378160287.324621: nl80211: Event message available
1378160287.324673: nl80211: New scan results available
1378160287.324691: eth1: Event SCAN_RESULTS (3) received
1378160287.324783: nl80211: Associated on 2417 MHz
1378160287.324793: nl80211: Associated with 20:aa:4b:60:7a:e3
1378160287.324931: nl80211: Received scan results (30 BSSes)
1378160287.324958: nl80211: Scan results indicate BSS status with 20:aa:4b:60:7a:e3 as associated
1378160287.324969: nl80211: Local state (not associated) does not match with BSS state
1378160287.325043: eth1: BSS: Start scan result update 2
1378160287.325095: eth1: BSS: Add new id 33 BSSID 00:15:ff:2c:ba:a6 SSID 'Verizon MIFI4510L BAA6 Secure'
1378160287.325132: eth1: BSS: Add new id 34 BSSID 44:94:fc:71:ad:ac SSID 'forverblessed'
1378160287.325162: eth1: BSS: Add new id 35 BSSID 94:44:52:64:c9:49 SSID 'Belkin.3949'
1378160287.325180: eth1: BSS: Add new id 36 BSSID ec:1a:59:2a:62:94 SSID 'belkin.294'
1378160287.325197: eth1: BSS: Add new id 37 BSSID 10:60:4b:e9:9e:f9 SSID 'HP-Print-F9-Deskjet 3510 series'
1378160287.325226: BSS: last_scan_res_used=30/64 last_scan_full=0
1378160287.325254: eth1: New scan results available
1378160287.325322: WPS: AP 44:94:fc:71:ad:ac type 0 added
1378160287.325340: WPS: AP 94:44:52:64:c9:49 type 0 added
1378160287.325352: WPS: AP ec:1a:59:2a:62:94 type 0 added
1378160287.325364: WPS: AP[0] 20:aa:4b:2c:18:f4 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325374: WPS: AP[1] 30:46:9a:64:83:de type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325384: WPS: AP[2] 20:4e:7f:47:a7:aa type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325393: WPS: AP[3] ec:1a:59:3e:96:8c type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325403: WPS: AP[4] 20:4e:7f:46:80:b0 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325412: WPS: AP[5] ec:1a:59:9a:5a:28 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325421: WPS: AP[6] 58:6d:8f:75:0d:96 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325431: WPS: AP[7] 20:aa:4b:c2:13:f0 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325440: WPS: AP[8] ec:1a:59:a8:0e:99 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325449: WPS: AP[9] 08:86:3b:a2:8d:60 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325459: WPS: AP[10] 00:26:f2:f6:90:21 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325468: WPS: AP[11] 84:1b:5e:29:fe:5c type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325477: WPS: AP[12] 00:23:69:99:55:79 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325487: WPS: AP[13] 08:86:3b:4a:5e:68 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325496: WPS: AP[14] ec:1a:59:86:e6:3b type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325505: WPS: AP[15] 00:8e:f2:53:66:be type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325515: WPS: AP[16] 94:44:52:2f:8d:c3 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325524: WPS: AP[17] ec:1a:59:4a:a1:7d type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325534: WPS: AP[18] 84:1b:5e:04:3c:8e type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325543: WPS: AP[19] 30:46:9a:64:7c:db type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325553: WPS: AP[20] c8:3a:35:57:3a:98 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325562: WPS: AP[21] e0:91:f5:ca:b9:4c type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325572: WPS: AP[22] 44:94:fc:71:ad:ac type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325581: WPS: AP[23] 94:44:52:64:c9:49 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325591: WPS: AP[24] ec:1a:59:2a:62:94 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160287.325607: eth1: No suitable network found
1378160287.325617: eth1: Short-circuit new scan request since there are no enabled networks
1378160287.325627: eth1: State: INACTIVE -> INACTIVE
1378160287.325637: eth1: Checking for other virtual interfaces sharing same radio (phy0) in event_scan_results
1378160287.327677: RTM_NEWLINK: operstate=0 ifi_flags=0x11043 ([UP][RUNNING][LOWER_UP])
1378160287.327705: RTM_NEWLINK, IFLA_IFNAME: Interface 'eth1' added
1378160287.327745: nl80211: if_removed already cleared - ignore event
1378160350.834446: eth1: BSS: Remove id 14 BSSID 00:23:69:99:55:79 SSID 'BBLink' due to wpa_bss_flush_by_age
1378160350.834480: eth1: BSS: Remove id 18 BSSID 70:56:81:84:84:d1 SSID 'Peter-NC' due to wpa_bss_flush_by_age
1378160350.834494: eth1: BSS: Remove id 19 BSSID 00:8e:f2:53:66:be SSID 'NETGEAR36' due to wpa_bss_flush_by_age
1378160350.834508: eth1: BSS: Remove id 21 BSSID 94:44:52:2f:8d:c3 SSID 'Belkin_G_Wireless_2F8DC3' due to wpa_bss_flush_by_age
1378160350.834522: eth1: BSS: Remove id 22 BSSID 00:22:3f:65:ac:f0 SSID 'Perza' due to wpa_bss_flush_by_age
1378160350.834535: eth1: BSS: Remove id 23 BSSID ec:1a:59:4a:a1:7d SSID 'belkin.17d' due to wpa_bss_flush_by_age
1378160350.834548: eth1: BSS: Remove id 24 BSSID 84:1b:5e:04:3c:8e SSID 'kirat' due to wpa_bss_flush_by_age
1378160350.834561: eth1: BSS: Remove id 26 BSSID c8:3a:35:57:3a:98 SSID '420' due to wpa_bss_flush_by_age
1378160405.370624: nl80211: Event message available
1378160405.370662: nl80211: Scan trigger
1378160407.328598: nl80211: Event message available
1378160407.328640: nl80211: New scan results available
1378160407.328652: eth1: Event SCAN_RESULTS (3) received
1378160407.328714: nl80211: Associated on 2417 MHz
1378160407.328721: nl80211: Associated with 20:aa:4b:60:7a:e3
1378160407.328801: nl80211: Received scan results (33 BSSes)
1378160407.328820: nl80211: Scan results indicate BSS status with 20:aa:4b:60:7a:e3 as associated
1378160407.328826: nl80211: Local state (not associated) does not match with BSS state
1378160407.328875: eth1: BSS: Start scan result update 3
1378160407.328915: eth1: BSS: Add new id 38 BSSID 20:aa:4b:fa:f1:77 SSID 'Kaipoche'
1378160407.328928: eth1: BSS: Add new id 39 BSSID 08:86:3b:62:c6:c6 SSID 'belkin.6c6'
1378160407.328940: eth1: BSS: Add new id 40 BSSID 20:4e:7f:0a:6f:ba SSID 'CGD24GBF'
1378160407.328950: eth1: BSS: Add new id 41 BSSID 00:8e:f2:53:66:be SSID 'NETGEAR36'
1378160407.328960: eth1: BSS: Add new id 42 BSSID 00:23:69:99:55:79 SSID 'BBLink'
1378160407.328978: eth1: BSS: Add new id 43 BSSID 70:56:81:84:84:d1 SSID 'Peter-NC'
1378160407.328993: eth1: BSS: Add new id 44 BSSID 00:22:3f:65:ac:f0 SSID 'Perza'
1378160407.329008: eth1: BSS: Add new id 45 BSSID 68:7f:74:fa:0c:f0 SSID 'Donnie'
1378160407.329030: eth1: BSS: Add new id 46 BSSID ec:1a:59:85:49:1f SSID 'belkin.91c.guests'
1378160407.329040: BSS: last_scan_res_used=33/64 last_scan_full=0
1378160407.329060: eth1: New scan results available
1378160407.329097: WPS: AP 20:aa:4b:fa:f1:77 type 0 added
1378160407.329104: WPS: AP 08:86:3b:62:c6:c6 type 0 added
1378160407.329112: WPS: AP 20:4e:7f:0a:6f:ba type 0 added
1378160407.329125: WPS: AP 68:7f:74:fa:0c:f0 type 0 added
1378160407.329133: WPS: AP[0] 20:aa:4b:2c:18:f4 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329140: WPS: AP[1] 30:46:9a:64:83:de type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329146: WPS: AP[2] 20:4e:7f:47:a7:aa type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329151: WPS: AP[3] ec:1a:59:3e:96:8c type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329157: WPS: AP[4] 20:4e:7f:46:80:b0 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329163: WPS: AP[5] ec:1a:59:9a:5a:28 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329169: WPS: AP[6] 58:6d:8f:75:0d:96 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329175: WPS: AP[7] 20:aa:4b:c2:13:f0 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329180: WPS: AP[8] ec:1a:59:a8:0e:99 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329187: WPS: AP[9] 08:86:3b:a2:8d:60 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329193: WPS: AP[10] 00:26:f2:f6:90:21 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329198: WPS: AP[11] 84:1b:5e:29:fe:5c type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329204: WPS: AP[12] 00:23:69:99:55:79 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329210: WPS: AP[13] 08:86:3b:4a:5e:68 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329216: WPS: AP[14] ec:1a:59:86:e6:3b type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329222: WPS: AP[15] 00:8e:f2:53:66:be type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329227: WPS: AP[16] 94:44:52:2f:8d:c3 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329233: WPS: AP[17] ec:1a:59:4a:a1:7d type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329239: WPS: AP[18] 84:1b:5e:04:3c:8e type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329245: WPS: AP[19] 30:46:9a:64:7c:db type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329250: WPS: AP[20] c8:3a:35:57:3a:98 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329256: WPS: AP[21] e0:91:f5:ca:b9:4c type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329262: WPS: AP[22] 44:94:fc:71:ad:ac type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329268: WPS: AP[23] 94:44:52:64:c9:49 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329274: WPS: AP[24] ec:1a:59:2a:62:94 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329280: WPS: AP[25] 20:aa:4b:fa:f1:77 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329286: WPS: AP[26] 08:86:3b:62:c6:c6 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329291: WPS: AP[27] 20:4e:7f:0a:6f:ba type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329297: WPS: AP[28] 68:7f:74:fa:0c:f0 type=0 tries=0 last_attempt=-1 sec ago blacklist=0
1378160407.329307: eth1: No suitable network found
1378160407.329314: eth1: Short-circuit new scan request since there are no enabled networks
1378160407.329320: eth1: State: INACTIVE -> INACTIVE
1378160407.329326: eth1: Checking for other virtual interfaces sharing same radio (phy0) in event_scan_results
1378160407.331353: RTM_NEWLINK: operstate=0 ifi_flags=0x11043 ([UP][RUNNING][LOWER_UP])
1378160407.331374: RTM_NEWLINK, IFLA_IFNAME: Interface 'eth1' added
1378160407.331402: nl80211: if_removed already cleared - ignore event
1378160470.913526: eth1: BSS: Remove id 8 BSSID 00:17:3f:67:4d:9c SSID 'Magnitude' due to wpa_bss_flush_by_age
1378160470.913562: eth1: BSS: Remove id 12 BSSID 00:26:f2:f6:90:21 SSID 'Madimatt' due to wpa_bss_flush_by_age
1378160470.913577: eth1: BSS: Remove id 13 BSSID 84:1b:5e:29:fe:5c SSID 'JOHNRO' due to wpa_bss_flush_by_age
1378160470.913591: eth1: BSS: Remove id 20 BSSID 90:72:40:0e:1e:72 SSID 'Trish's Wi-Fi Network' due to wpa_bss_flush_by_age
1378160470.913605: eth1: BSS: Remove id 37 BSSID 10:60:4b:e9:9e:f9 SSID 'HP-Print-F9-Deskjet 3510 series' due to wpa_bss_flush_by_age
1378160470.913619: eth1: BSS: Remove id 29 BSSID e0:91:f5:ca:b9:4c SSID 'Diamond1' due to wpa_bss_flush_by_age
^ permalink raw reply
* Hilarious 11n performance with iwlwifi and Thinkpad T520s
From: Yorick Peterse @ 2013-09-02 20:59 UTC (permalink / raw)
To: linux-wireless
Hey folks,
So first of yes, the title could probably be considered "link bait" but
honestly I'm fed up with iwlwifi and 11n networks that I consider this
the most friendly subject that I can come up with.
Anyway, lets get to the problem. I'm currently using a Thinkpad T520
running Arch Linux with kernel version 3.10.10-1. The particular
wireless chipset of this laptop is a Centrino Wireless-N 1000 (Condor
Peak). Ever since day 1 of using this laptop/chipset I've been having
issues with 802.11n (in combinatio with the iwlwifi driver).
Either I couldn't connect to a network at all (e.g. with my previous
router) or performance would be hilariously slow up to the point where
even 11b would be faster. Now that I have a new router (Asus RT-N66U, I
can recommend it to those that want a decent router) I can at least
connect, sadly the performance of my laptop is still anything but
decent.
What happens is that I can connect and use 11n fine for a bit. However,
as time progresses the amount of excessive retries (as reported by
`iwconfig`) fills up up to a point where the bitrate plummets to 1MB/sec
and my log files start filling up with iwlwifi errors such as the one
seen here: http://git.io/7JLTLw (links to gist.github.com).
When this happens download speed also drops to around 1MB/sec (due to
the bitrate) and response times go up. Before Linux 3.10 (Linux 3.9 for
example) I could work around this issue by either reconnecting to the
network or reloading the driver. With Linux 3.10.10 however it seems
this doesn't do anything. In this particular log entry you can see me
reconnecting to the network on Sep 02 21:41:21 with the same errors
popping up moments later.
This particular problem isn't exactly new either, similar (or maybe even
the same) issues have been reported before:
* https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1034740
* https://bugzilla.redhat.com/show_bug.cgi?id=804259
* http://bugs.centos.org/view.php?id=6305
This would suggest to me that the issue is an actual driver issue
instead of being some race condition that only occurs on specific
hardware configurations.
The common "fix" for this problem is to disable 11n on driver level.
This isn't exactly a fix however, it's simply sticking your head in the
sand and ignoring it. I suppose that for a lot of people this is good
enough since their internet speeds don't require 11n. In my case however
I'm using a fibre internet connection and I'd like to actually be able
to use the full 10 MB/sec via the wifi connection (it's 2013 after all).
To cut a long story short, what I'd like to know is the following:
1. Is this a known issue and if so, when can we expect a fix?
2. What can I do to help out with this? Actually writing kernel code is
way over my head but I'd love to help out by testing patches as much
as my schedule permits.
Some extra hardware/software information in case it helps:
uname output:
Linux tuxbook 3.10.10-1-ARCH #1 SMP PREEMPT Fri Aug 30 11:30:06 CEST
2013 x86_64 GNU/Linux
The operating system is Arch Linux 64bit. The network management
software used is Network manager 0.9.8.2-1 which uses wpa_supplicant
1.4-2 and dhcpcd 6.0.5-1 under the hood.
In total there are about 29 networks (mine included) in my area, these
operate on channels 1, 3, 4, 5, 6, 7, 8, 11 (some networks operate on
the same channel). My own network is the only one that runs on channel
5, changing channels doesn't have any affect on the performance in any
noticable way.
If there's any more info that I could/should provide I'd be happy to do
so.
Yorick Peterse
^ permalink raw reply
* Re: [PATCH] wcn36xx: mac80211 driver for Qualcomm WCN3660/WCN3680 hardware
From: Eugene Krasnikov @ 2013-09-02 18:54 UTC (permalink / raw)
To: Hauke Mehrtens; +Cc: John Linville, linux-wireless, wcn36xx
In-Reply-To: <5224A1F9.3030907@hauke-m.de>
Will check with legal department if licenses are compliant and come back to you.
But I guess for driver contribution it's not mandatory.
2013/9/2 Hauke Mehrtens <hauke@hauke-m.de>:
> On 09/02/2013 12:38 PM, Eugene Krasnikov wrote:
>> This is a mac80211 driver for Qualcomm WCN3660/WCN3680 devices. So
>> far WCN3660/WCN3680 is available only on MSM platform.
>>
>> Firmware can be found here:
>> https://github.com/AOKP/vendor_sony/find/jb-mr1
>
> Will you send the firmware for inclusion to linux-fimware?
> I am also missing the firmware for ath10k there.
>
>> Wiki page is available here:
>> http://wireless.kernel.org/en/users/Drivers/wcn36xx
>>
>
> Hauke
>
--
Best regards,
Eugene
^ permalink raw reply
* Re: [PATCH v2 13/16] wcn36xx: add wcn36xx.h
From: Joe Perches @ 2013-09-02 17:49 UTC (permalink / raw)
To: Kalle Valo; +Cc: Eugene Krasnikov, linux-wireless, wcn36xx
In-Reply-To: <87ioyjux5w.fsf@purkki.adurom.net>
On Mon, 2013-09-02 at 17:15 +0300, Kalle Valo wrote:
> Joe Perches <joe@perches.com> writes:
>
> >> +#define wcn36xx_dbg(mask, fmt, arg...) do { \
> >> + if (debug_mask & mask) \
> >> + printk(KERN_DEBUG pr_fmt(fmt), ##arg); \
> >> +} while (0)
> >
> > And maybe this one using pr_debug so dynamic_debug
> > can work too.
>
> Please, no dynamic_debug. It's useless on a wifi driver.
Why is that?
^ permalink raw reply
* Re: [PATCH] wcn36xx: mac80211 driver for Qualcomm WCN3660/WCN3680 hardware
From: Hauke Mehrtens @ 2013-09-02 14:34 UTC (permalink / raw)
To: Eugene Krasnikov; +Cc: linville, linux-wireless, wcn36xx
In-Reply-To: <1378118306-7890-1-git-send-email-k.eugene.e@gmail.com>
On 09/02/2013 12:38 PM, Eugene Krasnikov wrote:
> This is a mac80211 driver for Qualcomm WCN3660/WCN3680 devices. So
> far WCN3660/WCN3680 is available only on MSM platform.
>
> Firmware can be found here:
> https://github.com/AOKP/vendor_sony/find/jb-mr1
Will you send the firmware for inclusion to linux-fimware?
I am also missing the firmware for ath10k there.
> Wiki page is available here:
> http://wireless.kernel.org/en/users/Drivers/wcn36xx
>
Hauke
^ permalink raw reply
* Re: [PATCH v2 13/16] wcn36xx: add wcn36xx.h
From: Kalle Valo @ 2013-09-02 14:15 UTC (permalink / raw)
To: Joe Perches; +Cc: Eugene Krasnikov, linux-wireless, wcn36xx
In-Reply-To: <1377298929.2816.15.camel@joe-AO722>
Joe Perches <joe@perches.com> writes:
>> +#define wcn36xx_dbg(mask, fmt, arg...) do { \
>> + if (debug_mask & mask) \
>> + printk(KERN_DEBUG pr_fmt(fmt), ##arg); \
>> +} while (0)
>
> And maybe this one using pr_debug so dynamic_debug
> can work too.
Please, no dynamic_debug. It's useless on a wifi driver.
--
Kalle Valo
^ permalink raw reply
* Re: [PATCH] wcn36xx: mac80211 driver for Qualcomm WCN3660/WCN3680 hardware
From: Eugene Krasnikov @ 2013-09-02 10:40 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, wcn36xx, Eugene Krasnikov
In-Reply-To: <1378118306-7890-1-git-send-email-k.eugene.e@gmail.com>
Hi John,
As far as I understand it as too late for changes 3.12 release so it
would be nice if this patch can go into 3.13 release. Please let me
know if you have any problems with applying/building the patch.
2013/9/2 Eugene Krasnikov <k.eugene.e@gmail.com>:
> This is a mac80211 driver for Qualcomm WCN3660/WCN3680 devices. So
> far WCN3660/WCN3680 is available only on MSM platform.
>
> Firmware can be found here:
> https://github.com/AOKP/vendor_sony/find/jb-mr1
>
> Wiki page is available here:
> http://wireless.kernel.org/en/users/Drivers/wcn36xx
>
> A lot people made a contribution to this driver. Here is the list in
> alphabetical order:
>
> Eugene Krasnikov <k.eugene.e@gmail.com>
> Kalle Valo <kvalo@qca.qualcomm.com>
> Olof Johansson <dev@skyshaper.net>
> Pontus Fuchs <pontus.fuchs@gmail.com>
> Yanbo Li <yanbol@qti.qualcomm.com>
>
> Signed-off-by: Eugene Krasnikov <k.eugene.e@gmail.com>
> ---
> MAINTAINERS | 8 +
> drivers/net/wireless/ath/Kconfig | 1 +
> drivers/net/wireless/ath/Makefile | 1 +
> drivers/net/wireless/ath/wcn36xx/Kconfig | 16 +
> drivers/net/wireless/ath/wcn36xx/Makefile | 7 +
> drivers/net/wireless/ath/wcn36xx/debug.c | 166 +
> drivers/net/wireless/ath/wcn36xx/debug.h | 49 +
> drivers/net/wireless/ath/wcn36xx/dxe.c | 804 +++++
> drivers/net/wireless/ath/wcn36xx/dxe.h | 281 ++
> drivers/net/wireless/ath/wcn36xx/hal.h | 4657 ++++++++++++++++++++++++++++
> drivers/net/wireless/ath/wcn36xx/main.c | 1029 ++++++
> drivers/net/wireless/ath/wcn36xx/pmc.c | 46 +
> drivers/net/wireless/ath/wcn36xx/pmc.h | 32 +
> drivers/net/wireless/ath/wcn36xx/smd.c | 1529 +++++++++
> drivers/net/wireless/ath/wcn36xx/smd.h | 121 +
> drivers/net/wireless/ath/wcn36xx/txrx.c | 256 ++
> drivers/net/wireless/ath/wcn36xx/txrx.h | 160 +
> drivers/net/wireless/ath/wcn36xx/wcn36xx.h | 236 ++
> 18 files changed, 9399 insertions(+)
> create mode 100644 drivers/net/wireless/ath/wcn36xx/Kconfig
> create mode 100644 drivers/net/wireless/ath/wcn36xx/Makefile
> create mode 100644 drivers/net/wireless/ath/wcn36xx/debug.c
> create mode 100644 drivers/net/wireless/ath/wcn36xx/debug.h
> create mode 100644 drivers/net/wireless/ath/wcn36xx/dxe.c
> create mode 100644 drivers/net/wireless/ath/wcn36xx/dxe.h
> create mode 100644 drivers/net/wireless/ath/wcn36xx/hal.h
> create mode 100644 drivers/net/wireless/ath/wcn36xx/main.c
> create mode 100644 drivers/net/wireless/ath/wcn36xx/pmc.c
> create mode 100644 drivers/net/wireless/ath/wcn36xx/pmc.h
> create mode 100644 drivers/net/wireless/ath/wcn36xx/smd.c
> create mode 100644 drivers/net/wireless/ath/wcn36xx/smd.h
> create mode 100644 drivers/net/wireless/ath/wcn36xx/txrx.c
> create mode 100644 drivers/net/wireless/ath/wcn36xx/txrx.h
> create mode 100644 drivers/net/wireless/ath/wcn36xx/wcn36xx.h
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 2116b9a..01c705e 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -6733,6 +6733,14 @@ L: linux-hexagon@vger.kernel.org
> S: Supported
> F: arch/hexagon/
>
> +QUALCOMM WCN36XX WIRELESS DRIVER
> +M: Eugene Krasnikov <k.eugene.e@gmail.com>
> +L: wcn36xx@lists.infradead.org
> +W: http://wireless.kernel.org/en/users/Drivers/wcn36xx
> +T: git git://github.com/KrasnikovEugene/wcn36xx.git
> +S: Supported
> +F: drivers/net/wireless/ath/wcn36xx/
> +
> QUICKCAM PARALLEL PORT WEBCAMS
> M: Hans Verkuil <hverkuil@xs4all.nl>
> L: linux-media@vger.kernel.org
> diff --git a/drivers/net/wireless/ath/Kconfig b/drivers/net/wireless/ath/Kconfig
> index 1abf1d4..ba81d62 100644
> --- a/drivers/net/wireless/ath/Kconfig
> +++ b/drivers/net/wireless/ath/Kconfig
> @@ -32,5 +32,6 @@ source "drivers/net/wireless/ath/ath6kl/Kconfig"
> source "drivers/net/wireless/ath/ar5523/Kconfig"
> source "drivers/net/wireless/ath/wil6210/Kconfig"
> source "drivers/net/wireless/ath/ath10k/Kconfig"
> +source "drivers/net/wireless/ath/wcn36xx/Kconfig"
>
> endif
> diff --git a/drivers/net/wireless/ath/Makefile b/drivers/net/wireless/ath/Makefile
> index fb05cfd..363b056 100644
> --- a/drivers/net/wireless/ath/Makefile
> +++ b/drivers/net/wireless/ath/Makefile
> @@ -5,6 +5,7 @@ obj-$(CONFIG_ATH6KL) += ath6kl/
> obj-$(CONFIG_AR5523) += ar5523/
> obj-$(CONFIG_WIL6210) += wil6210/
> obj-$(CONFIG_ATH10K) += ath10k/
> +obj-$(CONFIG_WCN36XX) += wcn36xx/
>
> obj-$(CONFIG_ATH_COMMON) += ath.o
>
> diff --git a/drivers/net/wireless/ath/wcn36xx/Kconfig b/drivers/net/wireless/ath/wcn36xx/Kconfig
> new file mode 100644
> index 0000000..591ebae
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/Kconfig
> @@ -0,0 +1,16 @@
> +config WCN36XX
> + tristate "Qualcomm Atheros WCN3660/3680 support"
> + depends on MAC80211 && HAS_DMA
> + ---help---
> + This module adds support for wireless adapters based on
> + Qualcomm Atheros WCN3660 and WCN3680 mobile chipsets.
> +
> + If you choose to build a module, it'll be called wcn36xx.
> +
> +config WCN36XX_DEBUGFS
> + bool "WCN36XX debugfs support"
> + depends on WCN36XX
> + ---help---
> + Enabled debugfs support
> +
> + If unsure, say Y to make it easier to debug problems.
> diff --git a/drivers/net/wireless/ath/wcn36xx/Makefile b/drivers/net/wireless/ath/wcn36xx/Makefile
> new file mode 100644
> index 0000000..24ca549
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/Makefile
> @@ -0,0 +1,7 @@
> +obj-$(CONFIG_WCN36XX) := wcn36xx.o
> +wcn36xx-y += main.o \
> + dxe.o \
> + txrx.o \
> + smd.o \
> + pmc.o \
> + debug.o
> diff --git a/drivers/net/wireless/ath/wcn36xx/debug.c b/drivers/net/wireless/ath/wcn36xx/debug.c
> new file mode 100644
> index 0000000..91508f3
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/debug.c
> @@ -0,0 +1,166 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> +
> +#include <linux/debugfs.h>
> +#include <linux/uaccess.h>
> +#include "wcn36xx.h"
> +#include "debug.h"
> +#include "pmc.h"
> +
> +#ifdef CONFIG_WCN36XX_DEBUGFS
> +
> +static int wcn36xx_debugfs_open(struct inode *inode, struct file *file)
> +{
> + file->private_data = inode->i_private;
> +
> + return 0;
> +}
> +
> +static ssize_t read_file_bool_bmps(struct file *file, char __user *user_buf,
> + size_t count, loff_t *ppos)
> +{
> + struct wcn36xx *wcn = file->private_data;
> + char buf[3];
> +
> + if (wcn->pw_state == WCN36XX_BMPS)
> + buf[0] = '1';
> + else
> + buf[0] = '0';
> +
> + buf[1] = '\n';
> + buf[2] = 0x00;
> +
> + return simple_read_from_buffer(user_buf, count, ppos, buf, 2);
> +}
> +
> +static ssize_t write_file_bool_bmps(struct file *file,
> + const char __user *user_buf,
> + size_t count, loff_t *ppos)
> +{
> + struct wcn36xx *wcn = file->private_data;
> + struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
> + struct ieee80211_vif,
> + drv_priv);
> + char buf[32];
> + int buf_size;
> +
> + buf_size = min(count, (sizeof(buf)-1));
> + if (copy_from_user(buf, user_buf, buf_size))
> + return -EFAULT;
> +
> + switch (buf[0]) {
> + case 'y':
> + case 'Y':
> + case '1':
> + wcn36xx_enable_keep_alive_null_packet(wcn);
> + wcn36xx_pmc_enter_bmps_state(wcn, vif->bss_conf.sync_tsf);
> + break;
> + case 'n':
> + case 'N':
> + case '0':
> + wcn36xx_pmc_exit_bmps_state(wcn);
> + break;
> + }
> +
> + return count;
> +}
> +
> +static const struct file_operations fops_wcn36xx_bmps = {
> + .open = wcn36xx_debugfs_open,
> + .read = read_file_bool_bmps,
> + .write = write_file_bool_bmps,
> +};
> +
> +static ssize_t write_file_dump(struct file *file,
> + const char __user *user_buf,
> + size_t count, loff_t *ppos)
> +{
> + struct wcn36xx *wcn = file->private_data;
> + char buf[255], *tmp;
> + int buf_size;
> + u32 arg[WCN36xx_MAX_DUMP_ARGS];
> + int i;
> +
> + memset(buf, 0, sizeof(buf));
> + memset(arg, 0, sizeof(arg));
> +
> + buf_size = min(count, (sizeof(buf) - 1));
> + if (copy_from_user(buf, user_buf, buf_size))
> + return -EFAULT;
> +
> + tmp = buf;
> +
> + for (i = 0; i < WCN36xx_MAX_DUMP_ARGS; i++) {
> + char *begin;
> + begin = strsep(&tmp, " ");
> + if (begin == NULL)
> + break;
> +
> + if (kstrtoul(begin, 0, (unsigned long *)(arg + i)) != 0)
> + break;
> + }
> +
> + wcn36xx_info("DUMP args is %d %d %d %d %d\n", arg[0], arg[1], arg[2],
> + arg[3], arg[4]);
> + wcn36xx_smd_dump_cmd_req(wcn, arg[0], arg[1], arg[2], arg[3], arg[4]);
> +
> + return count;
> +}
> +
> +static const struct file_operations fops_wcn36xx_dump = {
> + .open = wcn36xx_debugfs_open,
> + .write = write_file_dump,
> +};
> +
> +#define ADD_FILE(name, mode, fop, priv_data) \
> + do { \
> + struct dentry *d; \
> + d = debugfs_create_file(__stringify(name), \
> + mode, dfs->rootdir, \
> + priv_data, fop); \
> + dfs->file_##name.dentry = d; \
> + if (IS_ERR(d)) { \
> + wcn36xx_warn("Create the debugfs entry failed");\
> + dfs->file_##name.dentry = NULL; \
> + } \
> + } while (0)
> +
> +
> +void wcn36xx_debugfs_init(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_dfs_entry *dfs = &wcn->dfs;
> +
> + dfs->rootdir = debugfs_create_dir(KBUILD_MODNAME,
> + wcn->hw->wiphy->debugfsdir);
> + if (IS_ERR(dfs->rootdir)) {
> + wcn36xx_warn("Create the debugfs failed\n");
> + dfs->rootdir = NULL;
> + }
> +
> + ADD_FILE(bmps_switcher, S_IRUSR | S_IWUSR,
> + &fops_wcn36xx_bmps, wcn);
> + ADD_FILE(dump, S_IWUSR, &fops_wcn36xx_dump, wcn);
> +}
> +
> +void wcn36xx_debugfs_exit(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_dfs_entry *dfs = &wcn->dfs;
> + debugfs_remove_recursive(dfs->rootdir);
> +}
> +
> +#endif /* CONFIG_WCN36XX_DEBUGFS */
> diff --git a/drivers/net/wireless/ath/wcn36xx/debug.h b/drivers/net/wireless/ath/wcn36xx/debug.h
> new file mode 100644
> index 0000000..46307aa
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/debug.h
> @@ -0,0 +1,49 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#ifndef _WCN36XX_DEBUG_H_
> +#define _WCN36XX_DEBUG_H_
> +
> +#include <linux/kernel.h>
> +
> +#define WCN36xx_MAX_DUMP_ARGS 5
> +
> +#ifdef CONFIG_WCN36XX_DEBUGFS
> +struct wcn36xx_dfs_file {
> + struct dentry *dentry;
> + u32 value;
> +};
> +
> +struct wcn36xx_dfs_entry {
> + struct dentry *rootdir;
> + struct wcn36xx_dfs_file file_bmps_switcher;
> + struct wcn36xx_dfs_file file_dump;
> +};
> +
> +void wcn36xx_debugfs_init(struct wcn36xx *wcn);
> +void wcn36xx_debugfs_exit(struct wcn36xx *wcn);
> +
> +#else
> +static inline void wcn36xx_debugfs_init(struct wcn36xx *wcn)
> +{
> +}
> +static inline void wcn36xx_debugfs_exit(struct wcn36xx *wcn)
> +{
> +}
> +
> +#endif /* CONFIG_WCN36XX_DEBUGFS */
> +
> +#endif /* _WCN36XX_DEBUG_H_ */
> diff --git a/drivers/net/wireless/ath/wcn36xx/dxe.c b/drivers/net/wireless/ath/wcn36xx/dxe.c
> new file mode 100644
> index 0000000..db1f413
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/dxe.c
> @@ -0,0 +1,804 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +/* DXE - DMA transfer engine
> + * we have 2 channels(High prio and Low prio) for TX and 2 channels for RX.
> + * through low channels data packets are transfered
> + * through high channels managment packets are transfered
> + */
> +
> +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> +
> +#include <linux/interrupt.h>
> +#include "wcn36xx.h"
> +#include "txrx.h"
> +
> +void *wcn36xx_dxe_get_next_bd(struct wcn36xx *wcn, bool is_low)
> +{
> + struct wcn36xx_dxe_ch *ch = is_low ?
> + &wcn->dxe_tx_l_ch :
> + &wcn->dxe_tx_h_ch;
> +
> + return ch->head_blk_ctl->bd_cpu_addr;
> +}
> +
> +static void wcn36xx_dxe_write_register(struct wcn36xx *wcn, int addr, int data)
> +{
> + wcn36xx_dbg(WCN36XX_DBG_DXE,
> + "wcn36xx_dxe_write_register: addr=%x, data=%x\n",
> + addr, data);
> +
> + writel(data, wcn->mmio + addr);
> +}
> +
> +static void wcn36xx_dxe_read_register(struct wcn36xx *wcn, int addr, int *data)
> +{
> + *data = readl(wcn->mmio + addr);
> +
> + wcn36xx_dbg(WCN36XX_DBG_DXE,
> + "wcn36xx_dxe_read_register: addr=%x, data=%x\n",
> + addr, *data);
> +}
> +
> +static void wcn36xx_dxe_free_ctl_block(struct wcn36xx_dxe_ch *ch)
> +{
> + struct wcn36xx_dxe_ctl *ctl = ch->head_blk_ctl, *next;
> + int i;
> +
> + for (i = 0; i < ch->desc_num && ctl; i++) {
> + next = ctl->next;
> + kfree(ctl);
> + ctl = next;
> + }
> +}
> +
> +static int wcn36xx_dxe_allocate_ctl_block(struct wcn36xx_dxe_ch *ch)
> +{
> + struct wcn36xx_dxe_ctl *prev_ctl = NULL;
> + struct wcn36xx_dxe_ctl *cur_ctl = NULL;
> + int i;
> +
> + for (i = 0; i < ch->desc_num; i++) {
> + cur_ctl = kzalloc(sizeof(*cur_ctl), GFP_KERNEL);
> + if (!cur_ctl)
> + goto out_fail;
> +
> + cur_ctl->ctl_blk_order = i;
> + if (i == 0) {
> + ch->head_blk_ctl = cur_ctl;
> + ch->tail_blk_ctl = cur_ctl;
> + } else if (ch->desc_num - 1 == i) {
> + prev_ctl->next = cur_ctl;
> + cur_ctl->next = ch->head_blk_ctl;
> + } else {
> + prev_ctl->next = cur_ctl;
> + }
> + prev_ctl = cur_ctl;
> + }
> +
> + return 0;
> +
> +out_fail:
> + wcn36xx_dxe_free_ctl_block(ch);
> + return -ENOMEM;
> +}
> +
> +int wcn36xx_dxe_alloc_ctl_blks(struct wcn36xx *wcn)
> +{
> + int ret;
> +
> + wcn->dxe_tx_l_ch.ch_type = WCN36XX_DXE_CH_TX_L;
> + wcn->dxe_tx_h_ch.ch_type = WCN36XX_DXE_CH_TX_H;
> + wcn->dxe_rx_l_ch.ch_type = WCN36XX_DXE_CH_RX_L;
> + wcn->dxe_rx_h_ch.ch_type = WCN36XX_DXE_CH_RX_H;
> +
> + wcn->dxe_tx_l_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_TX_L;
> + wcn->dxe_tx_h_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_TX_H;
> + wcn->dxe_rx_l_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_RX_L;
> + wcn->dxe_rx_h_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_RX_H;
> +
> + wcn->dxe_tx_l_ch.dxe_wq = WCN36XX_DXE_WQ_TX_L;
> + wcn->dxe_tx_h_ch.dxe_wq = WCN36XX_DXE_WQ_TX_H;
> +
> + wcn->dxe_tx_l_ch.ctrl_bd = WCN36XX_DXE_CTRL_TX_L_BD;
> + wcn->dxe_tx_h_ch.ctrl_bd = WCN36XX_DXE_CTRL_TX_H_BD;
> +
> + wcn->dxe_tx_l_ch.ctrl_skb = WCN36XX_DXE_CTRL_TX_L_SKB;
> + wcn->dxe_tx_h_ch.ctrl_skb = WCN36XX_DXE_CTRL_TX_H_SKB;
> +
> + wcn->dxe_tx_l_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_L;
> + wcn->dxe_tx_h_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_H;
> +
> + wcn->dxe_tx_l_ch.def_ctrl = WCN36XX_DXE_CH_DEFAULT_CTL_TX_L;
> + wcn->dxe_tx_h_ch.def_ctrl = WCN36XX_DXE_CH_DEFAULT_CTL_TX_H;
> +
> + /* DXE control block allocation */
> + ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_tx_l_ch);
> + if (ret)
> + goto out_err;
> + ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_tx_h_ch);
> + if (ret)
> + goto out_err;
> + ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_rx_l_ch);
> + if (ret)
> + goto out_err;
> + ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_rx_h_ch);
> + if (ret)
> + goto out_err;
> +
> + /* Initialize SMSM state Clear TX Enable RING EMPTY STATE */
> + ret = wcn->ctrl_ops->smsm_change_state(
> + WCN36XX_SMSM_WLAN_TX_ENABLE,
> + WCN36XX_SMSM_WLAN_TX_RINGS_EMPTY);
> +
> + return 0;
> +
> +out_err:
> + wcn36xx_err("Failed to allocate DXE control blocks\n");
> + wcn36xx_dxe_free_ctl_blks(wcn);
> + return -ENOMEM;
> +}
> +
> +void wcn36xx_dxe_free_ctl_blks(struct wcn36xx *wcn)
> +{
> + wcn36xx_dxe_free_ctl_block(&wcn->dxe_tx_l_ch);
> + wcn36xx_dxe_free_ctl_block(&wcn->dxe_tx_h_ch);
> + wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_l_ch);
> + wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_h_ch);
> +}
> +
> +static int wcn36xx_dxe_init_descs(struct wcn36xx_dxe_ch *wcn_ch)
> +{
> + struct wcn36xx_dxe_desc *cur_dxe = NULL;
> + struct wcn36xx_dxe_desc *prev_dxe = NULL;
> + struct wcn36xx_dxe_ctl *cur_ctl = NULL;
> + size_t size;
> + int i;
> +
> + size = wcn_ch->desc_num * sizeof(struct wcn36xx_dxe_desc);
> + wcn_ch->cpu_addr = dma_alloc_coherent(NULL, size, &wcn_ch->dma_addr,
> + GFP_KERNEL);
> + if (!wcn_ch->cpu_addr)
> + return -ENOMEM;
> +
> + memset(wcn_ch->cpu_addr, 0, size);
> +
> + cur_dxe = (struct wcn36xx_dxe_desc *)wcn_ch->cpu_addr;
> + cur_ctl = wcn_ch->head_blk_ctl;
> +
> + for (i = 0; i < wcn_ch->desc_num; i++) {
> + cur_ctl->desc = cur_dxe;
> + cur_ctl->desc_phy_addr = wcn_ch->dma_addr +
> + i * sizeof(struct wcn36xx_dxe_desc);
> +
> + switch (wcn_ch->ch_type) {
> + case WCN36XX_DXE_CH_TX_L:
> + cur_dxe->ctrl = WCN36XX_DXE_CTRL_TX_L;
> + cur_dxe->dst_addr_l = WCN36XX_DXE_WQ_TX_L;
> + break;
> + case WCN36XX_DXE_CH_TX_H:
> + cur_dxe->ctrl = WCN36XX_DXE_CTRL_TX_H;
> + cur_dxe->dst_addr_l = WCN36XX_DXE_WQ_TX_H;
> + break;
> + case WCN36XX_DXE_CH_RX_L:
> + cur_dxe->ctrl = WCN36XX_DXE_CTRL_RX_L;
> + cur_dxe->src_addr_l = WCN36XX_DXE_WQ_RX_L;
> + break;
> + case WCN36XX_DXE_CH_RX_H:
> + cur_dxe->ctrl = WCN36XX_DXE_CTRL_RX_H;
> + cur_dxe->src_addr_l = WCN36XX_DXE_WQ_RX_H;
> + break;
> + }
> + if (0 == i) {
> + cur_dxe->phy_next_l = 0;
> + } else if ((0 < i) && (i < wcn_ch->desc_num - 1)) {
> + prev_dxe->phy_next_l =
> + cur_ctl->desc_phy_addr;
> + } else if (i == (wcn_ch->desc_num - 1)) {
> + prev_dxe->phy_next_l =
> + cur_ctl->desc_phy_addr;
> + cur_dxe->phy_next_l =
> + wcn_ch->head_blk_ctl->desc_phy_addr;
> + }
> + cur_ctl = cur_ctl->next;
> + prev_dxe = cur_dxe;
> + cur_dxe++;
> + }
> +
> + return 0;
> +}
> +
> +static void wcn36xx_dxe_init_tx_bd(struct wcn36xx_dxe_ch *ch,
> + struct wcn36xx_dxe_mem_pool *pool)
> +{
> + int i, chunk_size = pool->chunk_size;
> + dma_addr_t bd_phy_addr = pool->phy_addr;
> + void *bd_cpu_addr = pool->virt_addr;
> + struct wcn36xx_dxe_ctl *cur = ch->head_blk_ctl;
> +
> + for (i = 0; i < ch->desc_num; i++) {
> + /* Only every second dxe needs a bd pointer,
> + the other will point to the skb data */
> + if (!(i & 1)) {
> + cur->bd_phy_addr = bd_phy_addr;
> + cur->bd_cpu_addr = bd_cpu_addr;
> + bd_phy_addr += chunk_size;
> + bd_cpu_addr += chunk_size;
> + } else {
> + cur->bd_phy_addr = 0;
> + cur->bd_cpu_addr = NULL;
> + }
> + cur = cur->next;
> + }
> +}
> +
> +static int wcn36xx_dxe_enable_ch_int(struct wcn36xx *wcn, u16 wcn_ch)
> +{
> + int reg_data = 0;
> +
> + wcn36xx_dxe_read_register(wcn,
> + WCN36XX_DXE_INT_MASK_REG,
> + ®_data);
> +
> + reg_data |= wcn_ch;
> +
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_INT_MASK_REG,
> + (int)reg_data);
> + return 0;
> +}
> +
> +static int wcn36xx_dxe_fill_skb(struct wcn36xx_dxe_ctl *ctl)
> +{
> + struct wcn36xx_dxe_desc *dxe = ctl->desc;
> + struct sk_buff *skb;
> +
> + skb = alloc_skb(WCN36XX_PKT_SIZE, GFP_ATOMIC);
> + if (skb == NULL)
> + return -ENOMEM;
> +
> + dxe->dst_addr_l = dma_map_single(NULL,
> + skb_tail_pointer(skb),
> + WCN36XX_PKT_SIZE,
> + DMA_FROM_DEVICE);
> + ctl->skb = skb;
> +
> + return 0;
> +}
> +
> +static int wcn36xx_dxe_ch_alloc_skb(struct wcn36xx *wcn,
> + struct wcn36xx_dxe_ch *wcn_ch)
> +{
> + int i;
> + struct wcn36xx_dxe_ctl *cur_ctl = NULL;
> +
> + cur_ctl = wcn_ch->head_blk_ctl;
> +
> + for (i = 0; i < wcn_ch->desc_num; i++) {
> + wcn36xx_dxe_fill_skb(cur_ctl);
> + cur_ctl = cur_ctl->next;
> + }
> +
> + return 0;
> +}
> +
> +static void wcn36xx_dxe_ch_free_skbs(struct wcn36xx *wcn,
> + struct wcn36xx_dxe_ch *wcn_ch)
> +{
> + struct wcn36xx_dxe_ctl *cur = wcn_ch->head_blk_ctl;
> + int i;
> +
> + for (i = 0; i < wcn_ch->desc_num; i++) {
> + kfree_skb(cur->skb);
> + cur = cur->next;
> + }
> +}
> +
> +void wcn36xx_dxe_tx_ack_ind(struct wcn36xx *wcn, u32 status)
> +{
> + struct ieee80211_tx_info *info;
> + struct sk_buff *skb;
> + unsigned long flags;
> +
> + spin_lock_irqsave(&wcn->dxe_lock, flags);
> + skb = wcn->tx_ack_skb;
> + wcn->tx_ack_skb = NULL;
> + spin_unlock_irqrestore(&wcn->dxe_lock, flags);
> +
> + if (!skb) {
> + wcn36xx_warn("Spurious TX complete indication\n");
> + return;
> + }
> +
> + info = IEEE80211_SKB_CB(skb);
> +
> + if (status == 1)
> + info->flags |= IEEE80211_TX_STAT_ACK;
> +
> + wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ack status: %d\n", status);
> +
> + ieee80211_tx_status_irqsafe(wcn->hw, skb);
> + ieee80211_wake_queues(wcn->hw);
> +}
> +
> +static void reap_tx_dxes(struct wcn36xx *wcn, struct wcn36xx_dxe_ch *ch)
> +{
> + struct wcn36xx_dxe_ctl *ctl = ch->tail_blk_ctl;
> + struct ieee80211_tx_info *info;
> + unsigned long flags;
> +
> + /*
> + * Make at least one loop of do-while because in case ring is
> + * completely full head and tail are pointing to the same element
> + * and while-do will not make any cycles.
> + */
> + do {
> + if (ctl->skb) {
> + dma_unmap_single(NULL, ctl->desc->src_addr_l,
> + ctl->skb->len, DMA_TO_DEVICE);
> + info = IEEE80211_SKB_CB(ctl->skb);
> + if (!(info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS)) {
> + /* Keep frame until TX status comes */
> + ieee80211_free_txskb(wcn->hw, ctl->skb);
> + }
> + spin_lock_irqsave(&ctl->skb_lock, flags);
> + if (wcn->queues_stopped) {
> + wcn->queues_stopped = false;
> + ieee80211_wake_queues(wcn->hw);
> + }
> + spin_unlock_irqrestore(&ctl->skb_lock, flags);
> +
> + ctl->skb = NULL;
> + }
> + ctl = ctl->next;
> + } while (ctl != ch->head_blk_ctl &&
> + !(ctl->desc->ctrl & WCN36XX_DXE_CTRL_VALID_MASK));
> +
> + ch->tail_blk_ctl = ctl;
> +}
> +
> +static irqreturn_t wcn36xx_irq_tx_complete(int irq, void *dev)
> +{
> + struct wcn36xx *wcn = (struct wcn36xx *)dev;
> + int int_src, int_reason;
> +
> + wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src);
> +
> + if (int_src & WCN36XX_INT_MASK_CHAN_TX_H) {
> + wcn36xx_dxe_read_register(wcn,
> + WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H,
> + &int_reason);
> +
> + /* TODO: Check int_reason */
> +
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_0_INT_CLR,
> + WCN36XX_INT_MASK_CHAN_TX_H);
> +
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_ED_CLR,
> + WCN36XX_INT_MASK_CHAN_TX_H);
> + wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ready high\n");
> + reap_tx_dxes(wcn, &wcn->dxe_tx_h_ch);
> + }
> +
> + if (int_src & WCN36XX_INT_MASK_CHAN_TX_L) {
> + wcn36xx_dxe_read_register(wcn,
> + WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L,
> + &int_reason);
> + /* TODO: Check int_reason */
> +
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_0_INT_CLR,
> + WCN36XX_INT_MASK_CHAN_TX_L);
> +
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_ED_CLR,
> + WCN36XX_INT_MASK_CHAN_TX_L);
> + wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ready low\n");
> + reap_tx_dxes(wcn, &wcn->dxe_tx_l_ch);
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +static irqreturn_t wcn36xx_irq_rx_ready(int irq, void *dev)
> +{
> + struct wcn36xx *wcn = (struct wcn36xx *)dev;
> +
> + disable_irq_nosync(wcn->rx_irq);
> + wcn36xx_dxe_rx_frame(wcn);
> + enable_irq(wcn->rx_irq);
> + return IRQ_HANDLED;
> +}
> +
> +static int wcn36xx_dxe_request_irqs(struct wcn36xx *wcn)
> +{
> + int ret;
> +
> + ret = request_irq(wcn->tx_irq, wcn36xx_irq_tx_complete,
> + IRQF_TRIGGER_HIGH, "wcn36xx_tx", wcn);
> + if (ret) {
> + wcn36xx_err("failed to alloc tx irq\n");
> + goto out_err;
> + }
> +
> + ret = request_irq(wcn->rx_irq, wcn36xx_irq_rx_ready, IRQF_TRIGGER_HIGH,
> + "wcn36xx_rx", wcn);
> + if (ret) {
> + wcn36xx_err("failed to alloc rx irq\n");
> + goto out_txirq;
> + }
> +
> + enable_irq_wake(wcn->rx_irq);
> +
> + return 0;
> +
> +out_txirq:
> + free_irq(wcn->tx_irq, wcn);
> +out_err:
> + return ret;
> +
> +}
> +
> +static int wcn36xx_rx_handle_packets(struct wcn36xx *wcn,
> + struct wcn36xx_dxe_ch *ch)
> +{
> + struct wcn36xx_dxe_ctl *ctl = ch->head_blk_ctl;
> + struct wcn36xx_dxe_desc *dxe = ctl->desc;
> + dma_addr_t dma_addr;
> + struct sk_buff *skb;
> +
> + while (!(dxe->ctrl & WCN36XX_DXE_CTRL_VALID_MASK)) {
> + skb = ctl->skb;
> + dma_addr = dxe->dst_addr_l;
> + wcn36xx_dxe_fill_skb(ctl);
> +
> + switch (ch->ch_type) {
> + case WCN36XX_DXE_CH_RX_L:
> + dxe->ctrl = WCN36XX_DXE_CTRL_RX_L;
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_ENCH_ADDR,
> + WCN36XX_DXE_INT_CH1_MASK);
> + break;
> + case WCN36XX_DXE_CH_RX_H:
> + dxe->ctrl = WCN36XX_DXE_CTRL_RX_H;
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_ENCH_ADDR,
> + WCN36XX_DXE_INT_CH3_MASK);
> + break;
> + default:
> + wcn36xx_warn("Unknown channel\n");
> + }
> +
> + dma_unmap_single(NULL, dma_addr, WCN36XX_PKT_SIZE,
> + DMA_FROM_DEVICE);
> + wcn36xx_rx_skb(wcn, skb);
> + ctl = ctl->next;
> + dxe = ctl->desc;
> + }
> +
> + ch->head_blk_ctl = ctl;
> +
> + return 0;
> +}
> +
> +void wcn36xx_dxe_rx_frame(struct wcn36xx *wcn)
> +{
> + int int_src;
> +
> + wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src);
> +
> + /* RX_LOW_PRI */
> + if (int_src & WCN36XX_DXE_INT_CH1_MASK) {
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,
> + WCN36XX_DXE_INT_CH1_MASK);
> + wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_l_ch));
> + }
> +
> + /* RX_HIGH_PRI */
> + if (int_src & WCN36XX_DXE_INT_CH3_MASK) {
> + /* Clean up all the INT within this channel */
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,
> + WCN36XX_DXE_INT_CH3_MASK);
> + wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_h_ch));
> + }
> +
> + if (!int_src)
> + wcn36xx_warn("No DXE interrupt pending\n");
> +}
> +
> +int wcn36xx_dxe_allocate_mem_pools(struct wcn36xx *wcn)
> +{
> + size_t s;
> + void *cpu_addr;
> +
> + /* Allocate BD headers for MGMT frames */
> +
> + /* Where this come from ask QC */
> + wcn->mgmt_mem_pool.chunk_size = WCN36XX_BD_CHUNK_SIZE +
> + 16 - (WCN36XX_BD_CHUNK_SIZE % 8);
> +
> + s = wcn->mgmt_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_H;
> + cpu_addr = dma_alloc_coherent(NULL, s, &wcn->mgmt_mem_pool.phy_addr,
> + GFP_KERNEL);
> + if (!cpu_addr)
> + goto out_err;
> +
> + wcn->mgmt_mem_pool.virt_addr = cpu_addr;
> + memset(cpu_addr, 0, s);
> +
> + /* Allocate BD headers for DATA frames */
> +
> + /* Where this come from ask QC */
> + wcn->data_mem_pool.chunk_size = WCN36XX_BD_CHUNK_SIZE +
> + 16 - (WCN36XX_BD_CHUNK_SIZE % 8);
> +
> + s = wcn->data_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_L;
> + cpu_addr = dma_alloc_coherent(NULL, s, &wcn->data_mem_pool.phy_addr,
> + GFP_KERNEL);
> + if (!cpu_addr)
> + goto out_err;
> +
> + wcn->data_mem_pool.virt_addr = cpu_addr;
> + memset(cpu_addr, 0, s);
> +
> + return 0;
> +
> +out_err:
> + wcn36xx_dxe_free_mem_pools(wcn);
> + wcn36xx_err("Failed to allocate BD mempool\n");
> + return -ENOMEM;
> +}
> +
> +void wcn36xx_dxe_free_mem_pools(struct wcn36xx *wcn)
> +{
> + if (wcn->mgmt_mem_pool.virt_addr)
> + dma_free_coherent(NULL, wcn->mgmt_mem_pool.chunk_size *
> + WCN36XX_DXE_CH_DESC_NUMB_TX_H,
> + wcn->mgmt_mem_pool.virt_addr,
> + wcn->mgmt_mem_pool.phy_addr);
> +
> + if (wcn->data_mem_pool.virt_addr) {
> + dma_free_coherent(NULL, wcn->data_mem_pool.chunk_size *
> + WCN36XX_DXE_CH_DESC_NUMB_TX_L,
> + wcn->data_mem_pool.virt_addr,
> + wcn->data_mem_pool.phy_addr);
> + }
> +}
> +
> +int wcn36xx_dxe_tx_frame(struct wcn36xx *wcn,
> + struct sk_buff *skb,
> + bool is_low)
> +{
> + struct wcn36xx_dxe_ctl *ctl = NULL;
> + struct wcn36xx_dxe_desc *desc = NULL;
> + struct wcn36xx_dxe_ch *ch = NULL;
> + unsigned long flags;
> +
> + ch = is_low ? &wcn->dxe_tx_l_ch : &wcn->dxe_tx_h_ch;
> +
> + ctl = ch->head_blk_ctl;
> +
> + spin_lock_irqsave(&ctl->next->skb_lock, flags);
> +
> + /*
> + * If skb is not null that means that we reached the tail of the ring
> + * hence ring is full. Stop queues to let mac80211 back off until ring
> + * has an empty slot again.
> + */
> + if (NULL != ctl->next->skb) {
> + ieee80211_stop_queues(wcn->hw);
> + wcn->queues_stopped = true;
> + spin_unlock_irqrestore(&ctl->next->skb_lock, flags);
> + return -EBUSY;
> + }
> + spin_unlock_irqrestore(&ctl->next->skb_lock, flags);
> +
> + ctl->skb = NULL;
> + desc = ctl->desc;
> +
> + /* Set source address of the BD we send */
> + desc->src_addr_l = ctl->bd_phy_addr;
> +
> + desc->dst_addr_l = ch->dxe_wq;
> + desc->fr_len = sizeof(struct wcn36xx_tx_bd);
> + desc->ctrl = ch->ctrl_bd;
> +
> + wcn36xx_dbg(WCN36XX_DBG_DXE, "DXE TX\n");
> +
> + wcn36xx_dbg_dump(WCN36XX_DBG_DXE_DUMP, "DESC1 >>> ",
> + (char *)desc, sizeof(*desc));
> + wcn36xx_dbg_dump(WCN36XX_DBG_DXE_DUMP,
> + "BD >>> ", (char *)ctl->bd_cpu_addr,
> + sizeof(struct wcn36xx_tx_bd));
> +
> + /* Set source address of the SKB we send */
> + ctl = ctl->next;
> + ctl->skb = skb;
> + desc = ctl->desc;
> + if (ctl->bd_cpu_addr) {
> + wcn36xx_err("bd_cpu_addr cannot be NULL for skb DXE\n");
> + return -EINVAL;
> + }
> +
> + desc->src_addr_l = dma_map_single(NULL,
> + ctl->skb->data,
> + ctl->skb->len,
> + DMA_TO_DEVICE);
> +
> + desc->dst_addr_l = ch->dxe_wq;
> + desc->fr_len = ctl->skb->len;
> +
> + /* set dxe descriptor to VALID */
> + desc->ctrl = ch->ctrl_skb;
> +
> + wcn36xx_dbg_dump(WCN36XX_DBG_DXE_DUMP, "DESC2 >>> ",
> + (char *)desc, sizeof(*desc));
> + wcn36xx_dbg_dump(WCN36XX_DBG_DXE_DUMP, "SKB >>> ",
> + (char *)ctl->skb->data, ctl->skb->len);
> +
> + /* Move the head of the ring to the next empty descriptor */
> + ch->head_blk_ctl = ctl->next;
> +
> + /*
> + * When connected and trying to send data frame chip can be in sleep
> + * mode and writing to the register will not wake up the chip. Instead
> + * notify chip about new frame through SMSM bus.
> + */
> + if (wcn->pw_state == WCN36XX_BMPS) {
> + wcn->ctrl_ops->smsm_change_state(
> + 0,
> + WCN36XX_SMSM_WLAN_TX_ENABLE);
> + } else {
> + /* indicate End Of Packet and generate interrupt on descriptor
> + * done.
> + */
> + wcn36xx_dxe_write_register(wcn,
> + ch->reg_ctrl, ch->def_ctrl);
> + }
> +
> + return 0;
> +}
> +
> +int wcn36xx_dxe_init(struct wcn36xx *wcn)
> +{
> + int reg_data = 0, ret;
> +
> + reg_data = WCN36XX_DXE_REG_RESET;
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data);
> +
> + /* Setting interrupt path */
> + reg_data = WCN36XX_DXE_CCU_INT;
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CCU_INT, reg_data);
> +
> + /***************************************/
> + /* Init descriptors for TX LOW channel */
> + /***************************************/
> + wcn36xx_dxe_init_descs(&wcn->dxe_tx_l_ch);
> + wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_l_ch, &wcn->data_mem_pool);
> +
> + /* Write channel head to a NEXT register */
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_L,
> + wcn->dxe_tx_l_ch.head_blk_ctl->desc_phy_addr);
> +
> + /* Program DMA destination addr for TX LOW */
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_CH_DEST_ADDR_TX_L,
> + WCN36XX_DXE_WQ_TX_L);
> +
> + wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data);
> + wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_L);
> +
> + /***************************************/
> + /* Init descriptors for TX HIGH channel */
> + /***************************************/
> + wcn36xx_dxe_init_descs(&wcn->dxe_tx_h_ch);
> + wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_h_ch, &wcn->mgmt_mem_pool);
> +
> + /* Write channel head to a NEXT register */
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_H,
> + wcn->dxe_tx_h_ch.head_blk_ctl->desc_phy_addr);
> +
> + /* Program DMA destination addr for TX HIGH */
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_CH_DEST_ADDR_TX_H,
> + WCN36XX_DXE_WQ_TX_H);
> +
> + wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data);
> +
> + /* Enable channel interrupts */
> + wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_H);
> +
> + /***************************************/
> + /* Init descriptors for RX LOW channel */
> + /***************************************/
> + wcn36xx_dxe_init_descs(&wcn->dxe_rx_l_ch);
> +
> + /* For RX we need to preallocated buffers */
> + wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_l_ch);
> +
> + /* Write channel head to a NEXT register */
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_L,
> + wcn->dxe_rx_l_ch.head_blk_ctl->desc_phy_addr);
> +
> + /* Write DMA source address */
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_CH_SRC_ADDR_RX_L,
> + WCN36XX_DXE_WQ_RX_L);
> +
> + /* Program preallocated destination address */
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_CH_DEST_ADDR_RX_L,
> + wcn->dxe_rx_l_ch.head_blk_ctl->desc->phy_next_l);
> +
> + /* Enable default control registers */
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_REG_CTL_RX_L,
> + WCN36XX_DXE_CH_DEFAULT_CTL_RX_L);
> +
> + /* Enable channel interrupts */
> + wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_L);
> +
> + /***************************************/
> + /* Init descriptors for RX HIGH channel */
> + /***************************************/
> + wcn36xx_dxe_init_descs(&wcn->dxe_rx_h_ch);
> +
> + /* For RX we need to prealocat buffers */
> + wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_h_ch);
> +
> + /* Write chanel head to a NEXT register */
> + wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_H,
> + wcn->dxe_rx_h_ch.head_blk_ctl->desc_phy_addr);
> +
> + /* Write DMA source address */
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_CH_SRC_ADDR_RX_H,
> + WCN36XX_DXE_WQ_RX_H);
> +
> + /* Program preallocated destination address */
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_CH_DEST_ADDR_RX_H,
> + wcn->dxe_rx_h_ch.head_blk_ctl->desc->phy_next_l);
> +
> + /* Enable default control registers */
> + wcn36xx_dxe_write_register(wcn,
> + WCN36XX_DXE_REG_CTL_RX_H,
> + WCN36XX_DXE_CH_DEFAULT_CTL_RX_H);
> +
> + /* Enable channel interrupts */
> + wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_H);
> +
> + ret = wcn36xx_dxe_request_irqs(wcn);
> + if (ret < 0)
> + goto out_err;
> +
> + return 0;
> +
> +out_err:
> + return ret;
> +}
> +
> +void wcn36xx_dxe_deinit(struct wcn36xx *wcn)
> +{
> + free_irq(wcn->tx_irq, wcn);
> + free_irq(wcn->rx_irq, wcn);
> +
> + if (wcn->tx_ack_skb) {
> + ieee80211_tx_status_irqsafe(wcn->hw, wcn->tx_ack_skb);
> + wcn->tx_ack_skb = NULL;
> + }
> +
> + wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_l_ch);
> + wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_h_ch);
> +}
> diff --git a/drivers/net/wireless/ath/wcn36xx/dxe.h b/drivers/net/wireless/ath/wcn36xx/dxe.h
> new file mode 100644
> index 0000000..38e458e
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/dxe.h
> @@ -0,0 +1,281 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#ifndef _DXE_H_
> +#define _DXE_H_
> +
> +#include "wcn36xx.h"
> +
> +/*
> +TX_LOW = DMA0
> +TX_HIGH = DMA4
> +RX_LOW = DMA1
> +RX_HIGH = DMA3
> +H2H_TEST_RX_TX = DMA2
> +*/
> +
> +/* DXE registers */
> +#define WCN36XX_DXE_MEM_BASE 0x03000000
> +#define WCN36XX_DXE_MEM_REG 0x202000
> +
> +#define WCN36XX_DXE_CCU_INT 0xA0011
> +#define WCN36XX_DXE_REG_CCU_INT 0x200b10
> +
> +/* TODO This must calculated properly but not hardcoded */
> +#define WCN36XX_DXE_CTRL_TX_L 0x328a44
> +#define WCN36XX_DXE_CTRL_TX_H 0x32ce44
> +#define WCN36XX_DXE_CTRL_RX_L 0x12ad2f
> +#define WCN36XX_DXE_CTRL_RX_H 0x12d12f
> +#define WCN36XX_DXE_CTRL_TX_H_BD 0x30ce45
> +#define WCN36XX_DXE_CTRL_TX_H_SKB 0x32ce4d
> +#define WCN36XX_DXE_CTRL_TX_L_BD 0x308a45
> +#define WCN36XX_DXE_CTRL_TX_L_SKB 0x328a4d
> +
> +/* TODO This must calculated properly but not hardcoded */
> +#define WCN36XX_DXE_WQ_TX_L 0x17
> +#define WCN36XX_DXE_WQ_TX_H 0x17
> +#define WCN36XX_DXE_WQ_RX_L 0xB
> +#define WCN36XX_DXE_WQ_RX_H 0x4
> +
> +/* DXE descriptor control filed */
> +#define WCN36XX_DXE_CTRL_VALID_MASK (0x00000001)
> +
> +/* TODO This must calculated properly but not hardcoded */
> +/* DXE default control register values */
> +#define WCN36XX_DXE_CH_DEFAULT_CTL_RX_L 0x847EAD2F
> +#define WCN36XX_DXE_CH_DEFAULT_CTL_RX_H 0x84FED12F
> +#define WCN36XX_DXE_CH_DEFAULT_CTL_TX_H 0x853ECF4D
> +#define WCN36XX_DXE_CH_DEFAULT_CTL_TX_L 0x843e8b4d
> +
> +/* Common DXE registers */
> +#define WCN36XX_DXE_MEM_CSR (WCN36XX_DXE_MEM_REG + 0x00)
> +#define WCN36XX_DXE_REG_CSR_RESET (WCN36XX_DXE_MEM_REG + 0x00)
> +#define WCN36XX_DXE_ENCH_ADDR (WCN36XX_DXE_MEM_REG + 0x04)
> +#define WCN36XX_DXE_REG_CH_EN (WCN36XX_DXE_MEM_REG + 0x08)
> +#define WCN36XX_DXE_REG_CH_DONE (WCN36XX_DXE_MEM_REG + 0x0C)
> +#define WCN36XX_DXE_REG_CH_ERR (WCN36XX_DXE_MEM_REG + 0x10)
> +#define WCN36XX_DXE_INT_MASK_REG (WCN36XX_DXE_MEM_REG + 0x18)
> +#define WCN36XX_DXE_INT_SRC_RAW_REG (WCN36XX_DXE_MEM_REG + 0x20)
> + /* #define WCN36XX_DXE_INT_CH6_MASK 0x00000040 */
> + /* #define WCN36XX_DXE_INT_CH5_MASK 0x00000020 */
> + #define WCN36XX_DXE_INT_CH4_MASK 0x00000010
> + #define WCN36XX_DXE_INT_CH3_MASK 0x00000008
> + /* #define WCN36XX_DXE_INT_CH2_MASK 0x00000004 */
> + #define WCN36XX_DXE_INT_CH1_MASK 0x00000002
> + #define WCN36XX_DXE_INT_CH0_MASK 0x00000001
> +#define WCN36XX_DXE_0_INT_CLR (WCN36XX_DXE_MEM_REG + 0x30)
> +#define WCN36XX_DXE_0_INT_ED_CLR (WCN36XX_DXE_MEM_REG + 0x34)
> +#define WCN36XX_DXE_0_INT_DONE_CLR (WCN36XX_DXE_MEM_REG + 0x38)
> +#define WCN36XX_DXE_0_INT_ERR_CLR (WCN36XX_DXE_MEM_REG + 0x3C)
> +
> +#define WCN36XX_DXE_0_CH0_STATUS (WCN36XX_DXE_MEM_REG + 0x404)
> +#define WCN36XX_DXE_0_CH1_STATUS (WCN36XX_DXE_MEM_REG + 0x444)
> +#define WCN36XX_DXE_0_CH2_STATUS (WCN36XX_DXE_MEM_REG + 0x484)
> +#define WCN36XX_DXE_0_CH3_STATUS (WCN36XX_DXE_MEM_REG + 0x4C4)
> +#define WCN36XX_DXE_0_CH4_STATUS (WCN36XX_DXE_MEM_REG + 0x504)
> +
> +#define WCN36XX_DXE_REG_RESET 0x5c89
> +
> +/* Temporary BMU Workqueue 4 */
> +#define WCN36XX_DXE_BMU_WQ_RX_LOW 0xB
> +#define WCN36XX_DXE_BMU_WQ_RX_HIGH 0x4
> +/* DMA channel offset */
> +#define WCN36XX_DXE_TX_LOW_OFFSET 0x400
> +#define WCN36XX_DXE_TX_HIGH_OFFSET 0x500
> +#define WCN36XX_DXE_RX_LOW_OFFSET 0x440
> +#define WCN36XX_DXE_RX_HIGH_OFFSET 0x4C0
> +
> +/* Address of the next DXE descriptor */
> +#define WCN36XX_DXE_CH_NEXT_DESC_ADDR 0x001C
> +#define WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_L (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_TX_LOW_OFFSET + \
> + WCN36XX_DXE_CH_NEXT_DESC_ADDR)
> +#define WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_H (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_TX_HIGH_OFFSET + \
> + WCN36XX_DXE_CH_NEXT_DESC_ADDR)
> +#define WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_L (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_LOW_OFFSET + \
> + WCN36XX_DXE_CH_NEXT_DESC_ADDR)
> +#define WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_H (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_HIGH_OFFSET + \
> + WCN36XX_DXE_CH_NEXT_DESC_ADDR)
> +
> +/* DXE Descriptor source address */
> +#define WCN36XX_DXE_CH_SRC_ADDR 0x000C
> +#define WCN36XX_DXE_CH_SRC_ADDR_RX_L (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_LOW_OFFSET + \
> + WCN36XX_DXE_CH_SRC_ADDR)
> +#define WCN36XX_DXE_CH_SRC_ADDR_RX_H (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_HIGH_OFFSET + \
> + WCN36XX_DXE_CH_SRC_ADDR)
> +
> +/* DXE Descriptor address destination address */
> +#define WCN36XX_DXE_CH_DEST_ADDR 0x0014
> +#define WCN36XX_DXE_CH_DEST_ADDR_TX_L (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_TX_LOW_OFFSET + \
> + WCN36XX_DXE_CH_DEST_ADDR)
> +#define WCN36XX_DXE_CH_DEST_ADDR_TX_H (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_TX_HIGH_OFFSET + \
> + WCN36XX_DXE_CH_DEST_ADDR)
> +#define WCN36XX_DXE_CH_DEST_ADDR_RX_L (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_LOW_OFFSET + \
> + WCN36XX_DXE_CH_DEST_ADDR)
> +#define WCN36XX_DXE_CH_DEST_ADDR_RX_H (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_HIGH_OFFSET + \
> + WCN36XX_DXE_CH_DEST_ADDR)
> +
> +/* Interrupt status */
> +#define WCN36XX_DXE_CH_STATUS_REG_ADDR 0x0004
> +#define WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_TX_LOW_OFFSET + \
> + WCN36XX_DXE_CH_STATUS_REG_ADDR)
> +#define WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_TX_HIGH_OFFSET + \
> + WCN36XX_DXE_CH_STATUS_REG_ADDR)
> +#define WCN36XX_DXE_CH_STATUS_REG_ADDR_RX_L (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_LOW_OFFSET + \
> + WCN36XX_DXE_CH_STATUS_REG_ADDR)
> +#define WCN36XX_DXE_CH_STATUS_REG_ADDR_RX_H (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_HIGH_OFFSET + \
> + WCN36XX_DXE_CH_STATUS_REG_ADDR)
> +
> +
> +/* DXE default control register */
> +#define WCN36XX_DXE_REG_CTL_RX_L (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_LOW_OFFSET)
> +#define WCN36XX_DXE_REG_CTL_RX_H (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_RX_HIGH_OFFSET)
> +#define WCN36XX_DXE_REG_CTL_TX_H (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_TX_HIGH_OFFSET)
> +#define WCN36XX_DXE_REG_CTL_TX_L (WCN36XX_DXE_MEM_REG + \
> + WCN36XX_DXE_TX_LOW_OFFSET)
> +
> +#define WCN36XX_SMSM_WLAN_TX_ENABLE 0x00000400
> +#define WCN36XX_SMSM_WLAN_TX_RINGS_EMPTY 0x00000200
> +
> +
> +/* Interrupt control channel mask */
> +#define WCN36XX_INT_MASK_CHAN_TX_L 0x00000001
> +#define WCN36XX_INT_MASK_CHAN_RX_L 0x00000002
> +#define WCN36XX_INT_MASK_CHAN_RX_H 0x00000008
> +#define WCN36XX_INT_MASK_CHAN_TX_H 0x00000010
> +
> +#define WCN36XX_BD_CHUNK_SIZE 128
> +
> +#define WCN36XX_PKT_SIZE 0xF20
> +enum wcn36xx_dxe_ch_type {
> + WCN36XX_DXE_CH_TX_L,
> + WCN36XX_DXE_CH_TX_H,
> + WCN36XX_DXE_CH_RX_L,
> + WCN36XX_DXE_CH_RX_H
> +};
> +
> +/* amount of descriptors per channel */
> +enum wcn36xx_dxe_ch_desc_num {
> + WCN36XX_DXE_CH_DESC_NUMB_TX_L = 128,
> + WCN36XX_DXE_CH_DESC_NUMB_TX_H = 10,
> + WCN36XX_DXE_CH_DESC_NUMB_RX_L = 512,
> + WCN36XX_DXE_CH_DESC_NUMB_RX_H = 40
> +};
> +
> +/**
> + * struct wcn36xx_dxe_desc - describes descriptor of one DXE buffer
> + *
> + * @ctrl: is a union that consists of following bits:
> + * union {
> + * u32 valid :1; //0 = DMA stop, 1 = DMA continue with this
> + * //descriptor
> + * u32 transfer_type :2; //0 = Host to Host space
> + * u32 eop :1; //End of Packet
> + * u32 bd_handling :1; //if transferType = Host to BMU, then 0
> + * // means first 128 bytes contain BD, and 1
> + * // means create new empty BD
> + * u32 siq :1; // SIQ
> + * u32 diq :1; // DIQ
> + * u32 pdu_rel :1; //0 = don't release BD and PDUs when done,
> + * // 1 = release them
> + * u32 bthld_sel :4; //BMU Threshold Select
> + * u32 prio :3; //Specifies the priority level to use for
> + * // the transfer
> + * u32 stop_channel :1; //1 = DMA stops processing further, channel
> + * //requires re-enabling after this
> + * u32 intr :1; //Interrupt on Descriptor Done
> + * u32 rsvd :1; //reserved
> + * u32 size :14;//14 bits used - ignored for BMU transfers,
> + * //only used for host to host transfers?
> + * } ctrl;
> + */
> +struct wcn36xx_dxe_desc {
> + u32 ctrl;
> + u32 fr_len;
> +
> + u32 src_addr_l;
> + u32 dst_addr_l;
> + u32 phy_next_l;
> + u32 src_addr_h;
> + u32 dst_addr_h;
> + u32 phy_next_h;
> +} __packed;
> +
> +/* DXE Control block */
> +struct wcn36xx_dxe_ctl {
> + struct wcn36xx_dxe_ctl *next;
> + struct wcn36xx_dxe_desc *desc;
> + unsigned int desc_phy_addr;
> + int ctl_blk_order;
> + struct sk_buff *skb;
> + spinlock_t skb_lock;
> + void *bd_cpu_addr;
> + dma_addr_t bd_phy_addr;
> +};
> +
> +struct wcn36xx_dxe_ch {
> + enum wcn36xx_dxe_ch_type ch_type;
> + void *cpu_addr;
> + dma_addr_t dma_addr;
> + enum wcn36xx_dxe_ch_desc_num desc_num;
> + /* DXE control block ring */
> + struct wcn36xx_dxe_ctl *head_blk_ctl;
> + struct wcn36xx_dxe_ctl *tail_blk_ctl;
> +
> + /* DXE channel specific configs */
> + u32 dxe_wq;
> + u32 ctrl_bd;
> + u32 ctrl_skb;
> + u32 reg_ctrl;
> + u32 def_ctrl;
> +};
> +
> +/* Memory Pool for BD headers */
> +struct wcn36xx_dxe_mem_pool {
> + int chunk_size;
> + void *virt_addr;
> + dma_addr_t phy_addr;
> +};
> +int wcn36xx_dxe_allocate_mem_pools(struct wcn36xx *wcn);
> +void wcn36xx_dxe_free_mem_pools(struct wcn36xx *wcn);
> +void wcn36xx_dxe_rx_frame(struct wcn36xx *wcn);
> +int wcn36xx_dxe_alloc_ctl_blks(struct wcn36xx *wcn);
> +void wcn36xx_dxe_free_ctl_blks(struct wcn36xx *wcn);
> +int wcn36xx_dxe_init(struct wcn36xx *wcn);
> +void wcn36xx_dxe_deinit(struct wcn36xx *wcn);
> +int wcn36xx_dxe_init_channels(struct wcn36xx *wcn);
> +int wcn36xx_dxe_tx_frame(struct wcn36xx *wcn,
> + struct sk_buff *skb,
> + bool is_low);
> +void wcn36xx_dxe_tx_ack_ind(struct wcn36xx *wcn, u32 status);
> +void *wcn36xx_dxe_get_next_bd(struct wcn36xx *wcn, bool is_low);
> +#endif /* _DXE_H_ */
> diff --git a/drivers/net/wireless/ath/wcn36xx/hal.h b/drivers/net/wireless/ath/wcn36xx/hal.h
> new file mode 100644
> index 0000000..56da0dc
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/hal.h
> @@ -0,0 +1,4657 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#ifndef _HAL_H_
> +#define _HAL_H_
> +
> +/*---------------------------------------------------------------------------
> + API VERSIONING INFORMATION
> +
> + The RIVA API is versioned as MAJOR.MINOR.VERSION.REVISION
> + The MAJOR is incremented for major product/architecture changes
> + (and then MINOR/VERSION/REVISION are zeroed)
> + The MINOR is incremented for minor product/architecture changes
> + (and then VERSION/REVISION are zeroed)
> + The VERSION is incremented if a significant API change occurs
> + (and then REVISION is zeroed)
> + The REVISION is incremented if an insignificant API change occurs
> + or if a new API is added
> + All values are in the range 0..255 (ie they are 8-bit values)
> + ---------------------------------------------------------------------------*/
> +#define WCN36XX_HAL_VER_MAJOR 1
> +#define WCN36XX_HAL_VER_MINOR 4
> +#define WCN36XX_HAL_VER_VERSION 1
> +#define WCN36XX_HAL_VER_REVISION 2
> +
> +/* This is to force compiler to use the maximum of an int ( 4 bytes ) */
> +#define WCN36XX_HAL_MAX_ENUM_SIZE 0x7FFFFFFF
> +#define WCN36XX_HAL_MSG_TYPE_MAX_ENUM_SIZE 0x7FFF
> +
> +/* Max no. of transmit categories */
> +#define STACFG_MAX_TC 8
> +
> +/* The maximum value of access category */
> +#define WCN36XX_HAL_MAX_AC 4
> +
> +#define WCN36XX_HAL_IPV4_ADDR_LEN 4
> +
> +#define WALN_HAL_STA_INVALID_IDX 0xFF
> +#define WCN36XX_HAL_BSS_INVALID_IDX 0xFF
> +
> +/* Default Beacon template size */
> +#define BEACON_TEMPLATE_SIZE 0x180
> +
> +/* Param Change Bitmap sent to HAL */
> +#define PARAM_BCN_INTERVAL_CHANGED (1 << 0)
> +#define PARAM_SHORT_PREAMBLE_CHANGED (1 << 1)
> +#define PARAM_SHORT_SLOT_TIME_CHANGED (1 << 2)
> +#define PARAM_llACOEXIST_CHANGED (1 << 3)
> +#define PARAM_llBCOEXIST_CHANGED (1 << 4)
> +#define PARAM_llGCOEXIST_CHANGED (1 << 5)
> +#define PARAM_HT20MHZCOEXIST_CHANGED (1<<6)
> +#define PARAM_NON_GF_DEVICES_PRESENT_CHANGED (1<<7)
> +#define PARAM_RIFS_MODE_CHANGED (1<<8)
> +#define PARAM_LSIG_TXOP_FULL_SUPPORT_CHANGED (1<<9)
> +#define PARAM_OBSS_MODE_CHANGED (1<<10)
> +#define PARAM_BEACON_UPDATE_MASK \
> + (PARAM_BCN_INTERVAL_CHANGED | \
> + PARAM_SHORT_PREAMBLE_CHANGED | \
> + PARAM_SHORT_SLOT_TIME_CHANGED | \
> + PARAM_llACOEXIST_CHANGED | \
> + PARAM_llBCOEXIST_CHANGED | \
> + PARAM_llGCOEXIST_CHANGED | \
> + PARAM_HT20MHZCOEXIST_CHANGED | \
> + PARAM_NON_GF_DEVICES_PRESENT_CHANGED | \
> + PARAM_RIFS_MODE_CHANGED | \
> + PARAM_LSIG_TXOP_FULL_SUPPORT_CHANGED | \
> + PARAM_OBSS_MODE_CHANGED)
> +
> +/* dump command response Buffer size */
> +#define DUMPCMD_RSP_BUFFER 100
> +
> +/* version string max length (including NULL) */
> +#define WCN36XX_HAL_VERSION_LENGTH 64
> +
> +/* message types for messages exchanged between WDI and HAL */
> +enum wcn36xx_hal_host_msg_type {
> + /* Init/De-Init */
> + WCN36XX_HAL_START_REQ = 0,
> + WCN36XX_HAL_START_RSP = 1,
> + WCN36XX_HAL_STOP_REQ = 2,
> + WCN36XX_HAL_STOP_RSP = 3,
> +
> + /* Scan */
> + WCN36XX_HAL_INIT_SCAN_REQ = 4,
> + WCN36XX_HAL_INIT_SCAN_RSP = 5,
> + WCN36XX_HAL_START_SCAN_REQ = 6,
> + WCN36XX_HAL_START_SCAN_RSP = 7,
> + WCN36XX_HAL_END_SCAN_REQ = 8,
> + WCN36XX_HAL_END_SCAN_RSP = 9,
> + WCN36XX_HAL_FINISH_SCAN_REQ = 10,
> + WCN36XX_HAL_FINISH_SCAN_RSP = 11,
> +
> + /* HW STA configuration/deconfiguration */
> + WCN36XX_HAL_CONFIG_STA_REQ = 12,
> + WCN36XX_HAL_CONFIG_STA_RSP = 13,
> + WCN36XX_HAL_DELETE_STA_REQ = 14,
> + WCN36XX_HAL_DELETE_STA_RSP = 15,
> + WCN36XX_HAL_CONFIG_BSS_REQ = 16,
> + WCN36XX_HAL_CONFIG_BSS_RSP = 17,
> + WCN36XX_HAL_DELETE_BSS_REQ = 18,
> + WCN36XX_HAL_DELETE_BSS_RSP = 19,
> +
> + /* Infra STA asscoiation */
> + WCN36XX_HAL_JOIN_REQ = 20,
> + WCN36XX_HAL_JOIN_RSP = 21,
> + WCN36XX_HAL_POST_ASSOC_REQ = 22,
> + WCN36XX_HAL_POST_ASSOC_RSP = 23,
> +
> + /* Security */
> + WCN36XX_HAL_SET_BSSKEY_REQ = 24,
> + WCN36XX_HAL_SET_BSSKEY_RSP = 25,
> + WCN36XX_HAL_SET_STAKEY_REQ = 26,
> + WCN36XX_HAL_SET_STAKEY_RSP = 27,
> + WCN36XX_HAL_RMV_BSSKEY_REQ = 28,
> + WCN36XX_HAL_RMV_BSSKEY_RSP = 29,
> + WCN36XX_HAL_RMV_STAKEY_REQ = 30,
> + WCN36XX_HAL_RMV_STAKEY_RSP = 31,
> +
> + /* Qos Related */
> + WCN36XX_HAL_ADD_TS_REQ = 32,
> + WCN36XX_HAL_ADD_TS_RSP = 33,
> + WCN36XX_HAL_DEL_TS_REQ = 34,
> + WCN36XX_HAL_DEL_TS_RSP = 35,
> + WCN36XX_HAL_UPD_EDCA_PARAMS_REQ = 36,
> + WCN36XX_HAL_UPD_EDCA_PARAMS_RSP = 37,
> + WCN36XX_HAL_ADD_BA_REQ = 38,
> + WCN36XX_HAL_ADD_BA_RSP = 39,
> + WCN36XX_HAL_DEL_BA_REQ = 40,
> + WCN36XX_HAL_DEL_BA_RSP = 41,
> +
> + WCN36XX_HAL_CH_SWITCH_REQ = 42,
> + WCN36XX_HAL_CH_SWITCH_RSP = 43,
> + WCN36XX_HAL_SET_LINK_ST_REQ = 44,
> + WCN36XX_HAL_SET_LINK_ST_RSP = 45,
> + WCN36XX_HAL_GET_STATS_REQ = 46,
> + WCN36XX_HAL_GET_STATS_RSP = 47,
> + WCN36XX_HAL_UPDATE_CFG_REQ = 48,
> + WCN36XX_HAL_UPDATE_CFG_RSP = 49,
> +
> + WCN36XX_HAL_MISSED_BEACON_IND = 50,
> + WCN36XX_HAL_UNKNOWN_ADDR2_FRAME_RX_IND = 51,
> + WCN36XX_HAL_MIC_FAILURE_IND = 52,
> + WCN36XX_HAL_FATAL_ERROR_IND = 53,
> + WCN36XX_HAL_SET_KEYDONE_MSG = 54,
> +
> + /* NV Interface */
> + WCN36XX_HAL_DOWNLOAD_NV_REQ = 55,
> + WCN36XX_HAL_DOWNLOAD_NV_RSP = 56,
> +
> + WCN36XX_HAL_ADD_BA_SESSION_REQ = 57,
> + WCN36XX_HAL_ADD_BA_SESSION_RSP = 58,
> + WCN36XX_HAL_TRIGGER_BA_REQ = 59,
> + WCN36XX_HAL_TRIGGER_BA_RSP = 60,
> + WCN36XX_HAL_UPDATE_BEACON_REQ = 61,
> + WCN36XX_HAL_UPDATE_BEACON_RSP = 62,
> + WCN36XX_HAL_SEND_BEACON_REQ = 63,
> + WCN36XX_HAL_SEND_BEACON_RSP = 64,
> +
> + WCN36XX_HAL_SET_BCASTKEY_REQ = 65,
> + WCN36XX_HAL_SET_BCASTKEY_RSP = 66,
> + WCN36XX_HAL_DELETE_STA_CONTEXT_IND = 67,
> + WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_REQ = 68,
> + WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_RSP = 69,
> +
> + /* PTT interface support */
> + WCN36XX_HAL_PROCESS_PTT_REQ = 70,
> + WCN36XX_HAL_PROCESS_PTT_RSP = 71,
> +
> + /* BTAMP related events */
> + WCN36XX_HAL_SIGNAL_BTAMP_EVENT_REQ = 72,
> + WCN36XX_HAL_SIGNAL_BTAMP_EVENT_RSP = 73,
> + WCN36XX_HAL_TL_HAL_FLUSH_AC_REQ = 74,
> + WCN36XX_HAL_TL_HAL_FLUSH_AC_RSP = 75,
> +
> + WCN36XX_HAL_ENTER_IMPS_REQ = 76,
> + WCN36XX_HAL_EXIT_IMPS_REQ = 77,
> + WCN36XX_HAL_ENTER_BMPS_REQ = 78,
> + WCN36XX_HAL_EXIT_BMPS_REQ = 79,
> + WCN36XX_HAL_ENTER_UAPSD_REQ = 80,
> + WCN36XX_HAL_EXIT_UAPSD_REQ = 81,
> + WCN36XX_HAL_UPDATE_UAPSD_PARAM_REQ = 82,
> + WCN36XX_HAL_CONFIGURE_RXP_FILTER_REQ = 83,
> + WCN36XX_HAL_ADD_BCN_FILTER_REQ = 84,
> + WCN36XX_HAL_REM_BCN_FILTER_REQ = 85,
> + WCN36XX_HAL_ADD_WOWL_BCAST_PTRN = 86,
> + WCN36XX_HAL_DEL_WOWL_BCAST_PTRN = 87,
> + WCN36XX_HAL_ENTER_WOWL_REQ = 88,
> + WCN36XX_HAL_EXIT_WOWL_REQ = 89,
> + WCN36XX_HAL_HOST_OFFLOAD_REQ = 90,
> + WCN36XX_HAL_SET_RSSI_THRESH_REQ = 91,
> + WCN36XX_HAL_GET_RSSI_REQ = 92,
> + WCN36XX_HAL_SET_UAPSD_AC_PARAMS_REQ = 93,
> + WCN36XX_HAL_CONFIGURE_APPS_CPU_WAKEUP_STATE_REQ = 94,
> +
> + WCN36XX_HAL_ENTER_IMPS_RSP = 95,
> + WCN36XX_HAL_EXIT_IMPS_RSP = 96,
> + WCN36XX_HAL_ENTER_BMPS_RSP = 97,
> + WCN36XX_HAL_EXIT_BMPS_RSP = 98,
> + WCN36XX_HAL_ENTER_UAPSD_RSP = 99,
> + WCN36XX_HAL_EXIT_UAPSD_RSP = 100,
> + WCN36XX_HAL_SET_UAPSD_AC_PARAMS_RSP = 101,
> + WCN36XX_HAL_UPDATE_UAPSD_PARAM_RSP = 102,
> + WCN36XX_HAL_CONFIGURE_RXP_FILTER_RSP = 103,
> + WCN36XX_HAL_ADD_BCN_FILTER_RSP = 104,
> + WCN36XX_HAL_REM_BCN_FILTER_RSP = 105,
> + WCN36XX_HAL_SET_RSSI_THRESH_RSP = 106,
> + WCN36XX_HAL_HOST_OFFLOAD_RSP = 107,
> + WCN36XX_HAL_ADD_WOWL_BCAST_PTRN_RSP = 108,
> + WCN36XX_HAL_DEL_WOWL_BCAST_PTRN_RSP = 109,
> + WCN36XX_HAL_ENTER_WOWL_RSP = 110,
> + WCN36XX_HAL_EXIT_WOWL_RSP = 111,
> + WCN36XX_HAL_RSSI_NOTIFICATION_IND = 112,
> + WCN36XX_HAL_GET_RSSI_RSP = 113,
> + WCN36XX_HAL_CONFIGURE_APPS_CPU_WAKEUP_STATE_RSP = 114,
> +
> + /* 11k related events */
> + WCN36XX_HAL_SET_MAX_TX_POWER_REQ = 115,
> + WCN36XX_HAL_SET_MAX_TX_POWER_RSP = 116,
> +
> + /* 11R related msgs */
> + WCN36XX_HAL_AGGR_ADD_TS_REQ = 117,
> + WCN36XX_HAL_AGGR_ADD_TS_RSP = 118,
> +
> + /* P2P WLAN_FEATURE_P2P */
> + WCN36XX_HAL_SET_P2P_GONOA_REQ = 119,
> + WCN36XX_HAL_SET_P2P_GONOA_RSP = 120,
> +
> + /* WLAN Dump commands */
> + WCN36XX_HAL_DUMP_COMMAND_REQ = 121,
> + WCN36XX_HAL_DUMP_COMMAND_RSP = 122,
> +
> + /* OEM_DATA FEATURE SUPPORT */
> + WCN36XX_HAL_START_OEM_DATA_REQ = 123,
> + WCN36XX_HAL_START_OEM_DATA_RSP = 124,
> +
> + /* ADD SELF STA REQ and RSP */
> + WCN36XX_HAL_ADD_STA_SELF_REQ = 125,
> + WCN36XX_HAL_ADD_STA_SELF_RSP = 126,
> +
> + /* DEL SELF STA SUPPORT */
> + WCN36XX_HAL_DEL_STA_SELF_REQ = 127,
> + WCN36XX_HAL_DEL_STA_SELF_RSP = 128,
> +
> + /* Coex Indication */
> + WCN36XX_HAL_COEX_IND = 129,
> +
> + /* Tx Complete Indication */
> + WCN36XX_HAL_OTA_TX_COMPL_IND = 130,
> +
> + /* Host Suspend/resume messages */
> + WCN36XX_HAL_HOST_SUSPEND_IND = 131,
> + WCN36XX_HAL_HOST_RESUME_REQ = 132,
> + WCN36XX_HAL_HOST_RESUME_RSP = 133,
> +
> + WCN36XX_HAL_SET_TX_POWER_REQ = 134,
> + WCN36XX_HAL_SET_TX_POWER_RSP = 135,
> + WCN36XX_HAL_GET_TX_POWER_REQ = 136,
> + WCN36XX_HAL_GET_TX_POWER_RSP = 137,
> +
> + WCN36XX_HAL_P2P_NOA_ATTR_IND = 138,
> +
> + WCN36XX_HAL_ENABLE_RADAR_DETECT_REQ = 139,
> + WCN36XX_HAL_ENABLE_RADAR_DETECT_RSP = 140,
> + WCN36XX_HAL_GET_TPC_REPORT_REQ = 141,
> + WCN36XX_HAL_GET_TPC_REPORT_RSP = 142,
> + WCN36XX_HAL_RADAR_DETECT_IND = 143,
> + WCN36XX_HAL_RADAR_DETECT_INTR_IND = 144,
> + WCN36XX_HAL_KEEP_ALIVE_REQ = 145,
> + WCN36XX_HAL_KEEP_ALIVE_RSP = 146,
> +
> + /* PNO messages */
> + WCN36XX_HAL_SET_PREF_NETWORK_REQ = 147,
> + WCN36XX_HAL_SET_PREF_NETWORK_RSP = 148,
> + WCN36XX_HAL_SET_RSSI_FILTER_REQ = 149,
> + WCN36XX_HAL_SET_RSSI_FILTER_RSP = 150,
> + WCN36XX_HAL_UPDATE_SCAN_PARAM_REQ = 151,
> + WCN36XX_HAL_UPDATE_SCAN_PARAM_RSP = 152,
> + WCN36XX_HAL_PREF_NETW_FOUND_IND = 153,
> +
> + WCN36XX_HAL_SET_TX_PER_TRACKING_REQ = 154,
> + WCN36XX_HAL_SET_TX_PER_TRACKING_RSP = 155,
> + WCN36XX_HAL_TX_PER_HIT_IND = 156,
> +
> + WCN36XX_HAL_8023_MULTICAST_LIST_REQ = 157,
> + WCN36XX_HAL_8023_MULTICAST_LIST_RSP = 158,
> +
> + WCN36XX_HAL_SET_PACKET_FILTER_REQ = 159,
> + WCN36XX_HAL_SET_PACKET_FILTER_RSP = 160,
> + WCN36XX_HAL_PACKET_FILTER_MATCH_COUNT_REQ = 161,
> + WCN36XX_HAL_PACKET_FILTER_MATCH_COUNT_RSP = 162,
> + WCN36XX_HAL_CLEAR_PACKET_FILTER_REQ = 163,
> + WCN36XX_HAL_CLEAR_PACKET_FILTER_RSP = 164,
> +
> + /*
> + * This is temp fix. Should be removed once Host and Riva code is
> + * in sync.
> + */
> + WCN36XX_HAL_INIT_SCAN_CON_REQ = 165,
> +
> + WCN36XX_HAL_SET_POWER_PARAMS_REQ = 166,
> + WCN36XX_HAL_SET_POWER_PARAMS_RSP = 167,
> +
> + WCN36XX_HAL_TSM_STATS_REQ = 168,
> + WCN36XX_HAL_TSM_STATS_RSP = 169,
> +
> + /* wake reason indication (WOW) */
> + WCN36XX_HAL_WAKE_REASON_IND = 170,
> +
> + /* GTK offload support */
> + WCN36XX_HAL_GTK_OFFLOAD_REQ = 171,
> + WCN36XX_HAL_GTK_OFFLOAD_RSP = 172,
> + WCN36XX_HAL_GTK_OFFLOAD_GETINFO_REQ = 173,
> + WCN36XX_HAL_GTK_OFFLOAD_GETINFO_RSP = 174,
> +
> + WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_REQ = 175,
> + WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_RSP = 176,
> + WCN36XX_HAL_EXCLUDE_UNENCRYPTED_IND = 177,
> +
> + WCN36XX_HAL_SET_THERMAL_MITIGATION_REQ = 178,
> + WCN36XX_HAL_SET_THERMAL_MITIGATION_RSP = 179,
> +
> + WCN36XX_HAL_UPDATE_VHT_OP_MODE_REQ = 182,
> + WCN36XX_HAL_UPDATE_VHT_OP_MODE_RSP = 183,
> +
> + WCN36XX_HAL_P2P_NOA_START_IND = 184,
> +
> + WCN36XX_HAL_GET_ROAM_RSSI_REQ = 185,
> + WCN36XX_HAL_GET_ROAM_RSSI_RSP = 186,
> +
> + WCN36XX_HAL_CLASS_B_STATS_IND = 187,
> + WCN36XX_HAL_DEL_BA_IND = 188,
> + WCN36XX_HAL_DHCP_START_IND = 189,
> + WCN36XX_HAL_DHCP_STOP_IND = 190,
> +
> + WCN36XX_HAL_MSG_MAX = WCN36XX_HAL_MSG_TYPE_MAX_ENUM_SIZE
> +};
> +
> +/* Enumeration for Version */
> +enum wcn36xx_hal_host_msg_version {
> + WCN36XX_HAL_MSG_VERSION0 = 0,
> + WCN36XX_HAL_MSG_VERSION1 = 1,
> + /* define as 2 bytes data */
> + WCN36XX_HAL_MSG_WCNSS_CTRL_VERSION = 0x7FFF,
> + WCN36XX_HAL_MSG_VERSION_MAX_FIELD = WCN36XX_HAL_MSG_WCNSS_CTRL_VERSION
> +};
> +
> +enum driver_type {
> + DRIVER_TYPE_PRODUCTION = 0,
> + DRIVER_TYPE_MFG = 1,
> + DRIVER_TYPE_DVT = 2,
> + DRIVER_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +enum wcn36xx_hal_stop_type {
> + HAL_STOP_TYPE_SYS_RESET,
> + HAL_STOP_TYPE_SYS_DEEP_SLEEP,
> + HAL_STOP_TYPE_RF_KILL,
> + HAL_STOP_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +enum wcn36xx_hal_sys_mode {
> + HAL_SYS_MODE_NORMAL,
> + HAL_SYS_MODE_LEARN,
> + HAL_SYS_MODE_SCAN,
> + HAL_SYS_MODE_PROMISC,
> + HAL_SYS_MODE_SUSPEND_LINK,
> + HAL_SYS_MODE_ROAM_SCAN,
> + HAL_SYS_MODE_ROAM_SUSPEND_LINK,
> + HAL_SYS_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +enum phy_chan_bond_state {
> + /* 20MHz IF bandwidth centered on IF carrier */
> + PHY_SINGLE_CHANNEL_CENTERED = 0,
> +
> + /* 40MHz IF bandwidth with lower 20MHz supporting the primary channel */
> + PHY_DOUBLE_CHANNEL_LOW_PRIMARY = 1,
> +
> + /* 40MHz IF bandwidth centered on IF carrier */
> + PHY_DOUBLE_CHANNEL_CENTERED = 2,
> +
> + /* 40MHz IF bandwidth with higher 20MHz supporting the primary ch */
> + PHY_DOUBLE_CHANNEL_HIGH_PRIMARY = 3,
> +
> + /* 20/40MHZ offset LOW 40/80MHZ offset CENTERED */
> + PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_CENTERED = 4,
> +
> + /* 20/40MHZ offset CENTERED 40/80MHZ offset CENTERED */
> + PHY_QUADRUPLE_CHANNEL_20MHZ_CENTERED_40MHZ_CENTERED = 5,
> +
> + /* 20/40MHZ offset HIGH 40/80MHZ offset CENTERED */
> + PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_CENTERED = 6,
> +
> + /* 20/40MHZ offset LOW 40/80MHZ offset LOW */
> + PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW = 7,
> +
> + /* 20/40MHZ offset HIGH 40/80MHZ offset LOW */
> + PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_LOW = 8,
> +
> + /* 20/40MHZ offset LOW 40/80MHZ offset HIGH */
> + PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH = 9,
> +
> + /* 20/40MHZ offset-HIGH 40/80MHZ offset HIGH */
> + PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_HIGH = 10,
> +
> + PHY_CHANNEL_BONDING_STATE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +/* Spatial Multiplexing(SM) Power Save mode */
> +enum wcn36xx_hal_ht_mimo_state {
> + /* Static SM Power Save mode */
> + WCN36XX_HAL_HT_MIMO_PS_STATIC = 0,
> +
> + /* Dynamic SM Power Save mode */
> + WCN36XX_HAL_HT_MIMO_PS_DYNAMIC = 1,
> +
> + /* reserved */
> + WCN36XX_HAL_HT_MIMO_PS_NA = 2,
> +
> + /* SM Power Save disabled */
> + WCN36XX_HAL_HT_MIMO_PS_NO_LIMIT = 3,
> +
> + WCN36XX_HAL_HT_MIMO_PS_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +/* each station added has a rate mode which specifies the sta attributes */
> +enum sta_rate_mode {
> + STA_TAURUS = 0,
> + STA_TITAN,
> + STA_POLARIS,
> + STA_11b,
> + STA_11bg,
> + STA_11a,
> + STA_11n,
> + STA_11ac,
> + STA_INVALID_RATE_MODE = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +/* 1,2,5.5,11 */
> +#define WCN36XX_HAL_NUM_DSSS_RATES 4
> +
> +/* 6,9,12,18,24,36,48,54 */
> +#define WCN36XX_HAL_NUM_OFDM_RATES 8
> +
> +/* 72,96,108 */
> +#define WCN36XX_HAL_NUM_POLARIS_RATES 3
> +
> +#define WCN36XX_HAL_MAC_MAX_SUPPORTED_MCS_SET 16
> +
> +enum wcn36xx_hal_bss_type {
> + WCN36XX_HAL_INFRASTRUCTURE_MODE,
> +
> + /* Added for softAP support */
> + WCN36XX_HAL_INFRA_AP_MODE,
> +
> + WCN36XX_HAL_IBSS_MODE,
> +
> + /* Added for BT-AMP support */
> + WCN36XX_HAL_BTAMP_STA_MODE,
> +
> + /* Added for BT-AMP support */
> + WCN36XX_HAL_BTAMP_AP_MODE,
> +
> + WCN36XX_HAL_AUTO_MODE,
> +
> + WCN36XX_HAL_DONOT_USE_BSS_TYPE = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +enum wcn36xx_hal_nw_type {
> + WCN36XX_HAL_11A_NW_TYPE,
> + WCN36XX_HAL_11B_NW_TYPE,
> + WCN36XX_HAL_11G_NW_TYPE,
> + WCN36XX_HAL_11N_NW_TYPE,
> + WCN36XX_HAL_DONOT_USE_NW_TYPE = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +#define WCN36XX_HAL_MAC_RATESET_EID_MAX 12
> +
> +enum wcn36xx_hal_ht_operating_mode {
> + /* No Protection */
> + WCN36XX_HAL_HT_OP_MODE_PURE,
> +
> + /* Overlap Legacy device present, protection is optional */
> + WCN36XX_HAL_HT_OP_MODE_OVERLAP_LEGACY,
> +
> + /* No legacy device, but 20 MHz HT present */
> + WCN36XX_HAL_HT_OP_MODE_NO_LEGACY_20MHZ_HT,
> +
> + /* Protection is required */
> + WCN36XX_HAL_HT_OP_MODE_MIXED,
> +
> + WCN36XX_HAL_HT_OP_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +/* Encryption type enum used with peer */
> +enum ani_ed_type {
> + WCN36XX_HAL_ED_NONE,
> + WCN36XX_HAL_ED_WEP40,
> + WCN36XX_HAL_ED_WEP104,
> + WCN36XX_HAL_ED_TKIP,
> + WCN36XX_HAL_ED_CCMP,
> + WCN36XX_HAL_ED_WPI,
> + WCN36XX_HAL_ED_AES_128_CMAC,
> + WCN36XX_HAL_ED_NOT_IMPLEMENTED = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +#define WLAN_MAX_KEY_RSC_LEN 16
> +#define WLAN_WAPI_KEY_RSC_LEN 16
> +
> +/* MAX key length when ULA is used */
> +#define WCN36XX_HAL_MAC_MAX_KEY_LENGTH 32
> +#define WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS 4
> +
> +/*
> + * Enum to specify whether key is used for TX only, RX only or both.
> + */
> +enum ani_key_direction {
> + WCN36XX_HAL_TX_ONLY,
> + WCN36XX_HAL_RX_ONLY,
> + WCN36XX_HAL_TX_RX,
> + WCN36XX_HAL_TX_DEFAULT,
> + WCN36XX_HAL_DONOT_USE_KEY_DIRECTION = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +enum ani_wep_type {
> + WCN36XX_HAL_WEP_STATIC,
> + WCN36XX_HAL_WEP_DYNAMIC,
> + WCN36XX_HAL_WEP_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +enum wcn36xx_hal_link_state {
> +
> + WCN36XX_HAL_LINK_IDLE_STATE = 0,
> + WCN36XX_HAL_LINK_PREASSOC_STATE = 1,
> + WCN36XX_HAL_LINK_POSTASSOC_STATE = 2,
> + WCN36XX_HAL_LINK_AP_STATE = 3,
> + WCN36XX_HAL_LINK_IBSS_STATE = 4,
> +
> + /* BT-AMP Case */
> + WCN36XX_HAL_LINK_BTAMP_PREASSOC_STATE = 5,
> + WCN36XX_HAL_LINK_BTAMP_POSTASSOC_STATE = 6,
> + WCN36XX_HAL_LINK_BTAMP_AP_STATE = 7,
> + WCN36XX_HAL_LINK_BTAMP_STA_STATE = 8,
> +
> + /* Reserved for HAL Internal Use */
> + WCN36XX_HAL_LINK_LEARN_STATE = 9,
> + WCN36XX_HAL_LINK_SCAN_STATE = 10,
> + WCN36XX_HAL_LINK_FINISH_SCAN_STATE = 11,
> + WCN36XX_HAL_LINK_INIT_CAL_STATE = 12,
> + WCN36XX_HAL_LINK_FINISH_CAL_STATE = 13,
> + WCN36XX_HAL_LINK_LISTEN_STATE = 14,
> +
> + WCN36XX_HAL_LINK_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +enum wcn36xx_hal_stats_mask {
> + HAL_SUMMARY_STATS_INFO = 0x00000001,
> + HAL_GLOBAL_CLASS_A_STATS_INFO = 0x00000002,
> + HAL_GLOBAL_CLASS_B_STATS_INFO = 0x00000004,
> + HAL_GLOBAL_CLASS_C_STATS_INFO = 0x00000008,
> + HAL_GLOBAL_CLASS_D_STATS_INFO = 0x00000010,
> + HAL_PER_STA_STATS_INFO = 0x00000020
> +};
> +
> +/* BT-AMP events type */
> +enum bt_amp_event_type {
> + BTAMP_EVENT_CONNECTION_START,
> + BTAMP_EVENT_CONNECTION_STOP,
> + BTAMP_EVENT_CONNECTION_TERMINATED,
> +
> + /* This and beyond are invalid values */
> + BTAMP_EVENT_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
> +};
> +
> +/* PE Statistics */
> +enum pe_stats_mask {
> + PE_SUMMARY_STATS_INFO = 0x00000001,
> + PE_GLOBAL_CLASS_A_STATS_INFO = 0x00000002,
> + PE_GLOBAL_CLASS_B_STATS_INFO = 0x00000004,
> + PE_GLOBAL_CLASS_C_STATS_INFO = 0x00000008,
> + PE_GLOBAL_CLASS_D_STATS_INFO = 0x00000010,
> + PE_PER_STA_STATS_INFO = 0x00000020,
> +
> + /* This and beyond are invalid values */
> + PE_STATS_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +/*
> + * Configuration Parameter IDs
> + */
> +#define WCN36XX_HAL_CFG_STA_ID 0
> +#define WCN36XX_HAL_CFG_CURRENT_TX_ANTENNA 1
> +#define WCN36XX_HAL_CFG_CURRENT_RX_ANTENNA 2
> +#define WCN36XX_HAL_CFG_LOW_GAIN_OVERRIDE 3
> +#define WCN36XX_HAL_CFG_POWER_STATE_PER_CHAIN 4
> +#define WCN36XX_HAL_CFG_CAL_PERIOD 5
> +#define WCN36XX_HAL_CFG_CAL_CONTROL 6
> +#define WCN36XX_HAL_CFG_PROXIMITY 7
> +#define WCN36XX_HAL_CFG_NETWORK_DENSITY 8
> +#define WCN36XX_HAL_CFG_MAX_MEDIUM_TIME 9
> +#define WCN36XX_HAL_CFG_MAX_MPDUS_IN_AMPDU 10
> +#define WCN36XX_HAL_CFG_RTS_THRESHOLD 11
> +#define WCN36XX_HAL_CFG_SHORT_RETRY_LIMIT 12
> +#define WCN36XX_HAL_CFG_LONG_RETRY_LIMIT 13
> +#define WCN36XX_HAL_CFG_FRAGMENTATION_THRESHOLD 14
> +#define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_ZERO 15
> +#define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_ONE 16
> +#define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_TWO 17
> +#define WCN36XX_HAL_CFG_FIXED_RATE 18
> +#define WCN36XX_HAL_CFG_RETRYRATE_POLICY 19
> +#define WCN36XX_HAL_CFG_RETRYRATE_SECONDARY 20
> +#define WCN36XX_HAL_CFG_RETRYRATE_TERTIARY 21
> +#define WCN36XX_HAL_CFG_FORCE_POLICY_PROTECTION 22
> +#define WCN36XX_HAL_CFG_FIXED_RATE_MULTICAST_24GHZ 23
> +#define WCN36XX_HAL_CFG_FIXED_RATE_MULTICAST_5GHZ 24
> +#define WCN36XX_HAL_CFG_DEFAULT_RATE_INDEX_24GHZ 25
> +#define WCN36XX_HAL_CFG_DEFAULT_RATE_INDEX_5GHZ 26
> +#define WCN36XX_HAL_CFG_MAX_BA_SESSIONS 27
> +#define WCN36XX_HAL_CFG_PS_DATA_INACTIVITY_TIMEOUT 28
> +#define WCN36XX_HAL_CFG_PS_ENABLE_BCN_FILTER 29
> +#define WCN36XX_HAL_CFG_PS_ENABLE_RSSI_MONITOR 30
> +#define WCN36XX_HAL_CFG_NUM_BEACON_PER_RSSI_AVERAGE 31
> +#define WCN36XX_HAL_CFG_STATS_PERIOD 32
> +#define WCN36XX_HAL_CFG_CFP_MAX_DURATION 33
> +#define WCN36XX_HAL_CFG_FRAME_TRANS_ENABLED 34
> +#define WCN36XX_HAL_CFG_DTIM_PERIOD 35
> +#define WCN36XX_HAL_CFG_EDCA_WMM_ACBK 36
> +#define WCN36XX_HAL_CFG_EDCA_WMM_ACBE 37
> +#define WCN36XX_HAL_CFG_EDCA_WMM_ACVO 38
> +#define WCN36XX_HAL_CFG_EDCA_WMM_ACVI 39
> +#define WCN36XX_HAL_CFG_BA_THRESHOLD_HIGH 40
> +#define WCN36XX_HAL_CFG_MAX_BA_BUFFERS 41
> +#define WCN36XX_HAL_CFG_RPE_POLLING_THRESHOLD 42
> +#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG 43
> +#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG 44
> +#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG 45
> +#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG 46
> +#define WCN36XX_HAL_CFG_NO_OF_ONCHIP_REORDER_SESSIONS 47
> +#define WCN36XX_HAL_CFG_PS_LISTEN_INTERVAL 48
> +#define WCN36XX_HAL_CFG_PS_HEART_BEAT_THRESHOLD 49
> +#define WCN36XX_HAL_CFG_PS_NTH_BEACON_FILTER 50
> +#define WCN36XX_HAL_CFG_PS_MAX_PS_POLL 51
> +#define WCN36XX_HAL_CFG_PS_MIN_RSSI_THRESHOLD 52
> +#define WCN36XX_HAL_CFG_PS_RSSI_FILTER_PERIOD 53
> +#define WCN36XX_HAL_CFG_PS_BROADCAST_FRAME_FILTER_ENABLE 54
> +#define WCN36XX_HAL_CFG_PS_IGNORE_DTIM 55
> +#define WCN36XX_HAL_CFG_PS_ENABLE_BCN_EARLY_TERM 56
> +#define WCN36XX_HAL_CFG_DYNAMIC_PS_POLL_VALUE 57
> +#define WCN36XX_HAL_CFG_PS_NULLDATA_AP_RESP_TIMEOUT 58
> +#define WCN36XX_HAL_CFG_TELE_BCN_WAKEUP_EN 59
> +#define WCN36XX_HAL_CFG_TELE_BCN_TRANS_LI 60
> +#define WCN36XX_HAL_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS 61
> +#define WCN36XX_HAL_CFG_TELE_BCN_MAX_LI 62
> +#define WCN36XX_HAL_CFG_TELE_BCN_MAX_LI_IDLE_BCNS 63
> +#define WCN36XX_HAL_CFG_TX_PWR_CTRL_ENABLE 64
> +#define WCN36XX_HAL_CFG_VALID_RADAR_CHANNEL_LIST 65
> +#define WCN36XX_HAL_CFG_TX_POWER_24_20 66
> +#define WCN36XX_HAL_CFG_TX_POWER_24_40 67
> +#define WCN36XX_HAL_CFG_TX_POWER_50_20 68
> +#define WCN36XX_HAL_CFG_TX_POWER_50_40 69
> +#define WCN36XX_HAL_CFG_MCAST_BCAST_FILTER_SETTING 70
> +#define WCN36XX_HAL_CFG_BCN_EARLY_TERM_WAKEUP_INTERVAL 71
> +#define WCN36XX_HAL_CFG_MAX_TX_POWER_2_4 72
> +#define WCN36XX_HAL_CFG_MAX_TX_POWER_5 73
> +#define WCN36XX_HAL_CFG_INFRA_STA_KEEP_ALIVE_PERIOD 74
> +#define WCN36XX_HAL_CFG_ENABLE_CLOSE_LOOP 75
> +#define WCN36XX_HAL_CFG_BTC_EXECUTION_MODE 76
> +#define WCN36XX_HAL_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK 77
> +#define WCN36XX_HAL_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS 78
> +#define WCN36XX_HAL_CFG_PS_TX_INACTIVITY_TIMEOUT 79
> +#define WCN36XX_HAL_CFG_WCNSS_API_VERSION 80
> +#define WCN36XX_HAL_CFG_AP_KEEPALIVE_TIMEOUT 81
> +#define WCN36XX_HAL_CFG_GO_KEEPALIVE_TIMEOUT 82
> +#define WCN36XX_HAL_CFG_ENABLE_MC_ADDR_LIST 83
> +#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_INQ_BT 84
> +#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_PAGE_BT 85
> +#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_CONN_BT 86
> +#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_LE_BT 87
> +#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_INQ_WLAN 88
> +#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_PAGE_WLAN 89
> +#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_CONN_WLAN 90
> +#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_LE_WLAN 91
> +#define WCN36XX_HAL_CFG_BTC_DYN_MAX_LEN_BT 92
> +#define WCN36XX_HAL_CFG_BTC_DYN_MAX_LEN_WLAN 93
> +#define WCN36XX_HAL_CFG_BTC_MAX_SCO_BLOCK_PERC 94
> +#define WCN36XX_HAL_CFG_BTC_DHCP_PROT_ON_A2DP 95
> +#define WCN36XX_HAL_CFG_BTC_DHCP_PROT_ON_SCO 96
> +#define WCN36XX_HAL_CFG_ENABLE_UNICAST_FILTER 97
> +#define WCN36XX_HAL_CFG_MAX_ASSOC_LIMIT 98
> +#define WCN36XX_HAL_CFG_ENABLE_LPWR_IMG_TRANSITION 99
> +#define WCN36XX_HAL_CFG_ENABLE_MCC_ADAPTIVE_SCHEDULER 100
> +#define WCN36XX_HAL_CFG_ENABLE_DETECT_PS_SUPPORT 101
> +#define WCN36XX_HAL_CFG_AP_LINK_MONITOR_TIMEOUT 102
> +#define WCN36XX_HAL_CFG_BTC_DWELL_TIME_MULTIPLIER 103
> +#define WCN36XX_HAL_CFG_ENABLE_TDLS_OXYGEN_MODE 104
> +#define WCN36XX_HAL_CFG_MAX_PARAMS 105
> +
> +/* Message definitons - All the messages below need to be packed */
> +
> +/* Definition for HAL API Version. */
> +struct wcnss_wlan_version {
> + u8 revision;
> + u8 version;
> + u8 minor;
> + u8 major;
> +} __packed;
> +
> +/* Definition for Encryption Keys */
> +struct wcn36xx_hal_keys {
> + u8 id;
> +
> + /* 0 for multicast */
> + u8 unicast;
> +
> + enum ani_key_direction direction;
> +
> + /* Usage is unknown */
> + u8 rsc[WLAN_MAX_KEY_RSC_LEN];
> +
> + /* =1 for authenticator,=0 for supplicant */
> + u8 pae_role;
> +
> + u16 length;
> + u8 key[WCN36XX_HAL_MAC_MAX_KEY_LENGTH];
> +} __packed;
> +
> +/*
> + * set_sta_key_params Moving here since it is shared by
> + * configbss/setstakey msgs
> + */
> +struct wcn36xx_hal_set_sta_key_params {
> + /* STA Index */
> + u16 sta_index;
> +
> + /* Encryption Type used with peer */
> + enum ani_ed_type enc_type;
> +
> + /* STATIC/DYNAMIC - valid only for WEP */
> + enum ani_wep_type wep_type;
> +
> + /* Default WEP key, valid only for static WEP, must between 0 and 3. */
> + u8 def_wep_idx;
> +
> + /* valid only for non-static WEP encyrptions */
> + struct wcn36xx_hal_keys key[WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS];
> +
> + /*
> + * Control for Replay Count, 1= Single TID based replay count on Tx
> + * 0 = Per TID based replay count on TX
> + */
> + u8 single_tid_rc;
> +
> +} __packed;
> +
> +/* 4-byte control message header used by HAL*/
> +struct wcn36xx_hal_msg_header {
> + enum wcn36xx_hal_host_msg_type msg_type:16;
> + enum wcn36xx_hal_host_msg_version msg_version:16;
> + u32 len;
> +} __packed;
> +
> +/* Config format required by HAL for each CFG item*/
> +struct wcn36xx_hal_cfg {
> + /* Cfg Id. The Id required by HAL is exported by HAL
> + * in shared header file between UMAC and HAL.*/
> + u16 id;
> +
> + /* Length of the Cfg. This parameter is used to go to next cfg
> + * in the TLV format.*/
> + u16 len;
> +
> + /* Padding bytes for unaligned address's */
> + u16 pad_bytes;
> +
> + /* Reserve bytes for making cfgVal to align address */
> + u16 reserve;
> +
> + /* Following the uCfgLen field there should be a 'uCfgLen' bytes
> + * containing the uCfgValue ; u8 uCfgValue[uCfgLen] */
> +} __packed;
> +
> +struct wcn36xx_hal_mac_start_parameters {
> + /* Drive Type - Production or FTM etc */
> + enum driver_type type;
> +
> + /* Length of the config buffer */
> + u32 len;
> +
> + /* Following this there is a TLV formatted buffer of length
> + * "len" bytes containing all config values.
> + * The TLV is expected to be formatted like this:
> + * 0 15 31 31+CFG_LEN-1 length-1
> + * | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......|
> + */
> +} __packed;
> +
> +struct wcn36xx_hal_mac_start_req_msg {
> + /* config buffer must start in TLV format just here */
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_mac_start_parameters params;
> +} __packed;
> +
> +struct wcn36xx_hal_mac_start_rsp_params {
> + /* success or failure */
> + u16 status;
> +
> + /* Max number of STA supported by the device */
> + u8 stations;
> +
> + /* Max number of BSS supported by the device */
> + u8 bssids;
> +
> + /* API Version */
> + struct wcnss_wlan_version version;
> +
> + /* CRM build information */
> + u8 crm_version[WCN36XX_HAL_VERSION_LENGTH];
> +
> + /* hardware/chipset/misc version information */
> + u8 wlan_version[WCN36XX_HAL_VERSION_LENGTH];
> +
> +} __packed;
> +
> +struct wcn36xx_hal_mac_start_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_mac_start_rsp_params start_rsp_params;
> +} __packed;
> +
> +struct wcn36xx_hal_mac_stop_req_params {
> + /* The reason for which the device is being stopped */
> + enum wcn36xx_hal_stop_type reason;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_mac_stop_req_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_mac_stop_req_params stop_req_params;
> +} __packed;
> +
> +struct wcn36xx_hal_mac_stop_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +} __packed;
> +
> +struct wcn36xx_hal_update_cfg_req_msg {
> + /*
> + * Note: The length specified in tHalUpdateCfgReqMsg messages should be
> + * header.msgLen = sizeof(tHalUpdateCfgReqMsg) + uConfigBufferLen
> + */
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Length of the config buffer. Allows UMAC to update multiple CFGs */
> + u32 len;
> +
> + /*
> + * Following this there is a TLV formatted buffer of length
> + * "uConfigBufferLen" bytes containing all config values.
> + * The TLV is expected to be formatted like this:
> + * 0 15 31 31+CFG_LEN-1 length-1
> + * | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......|
> + */
> +
> +} __packed;
> +
> +struct wcn36xx_hal_update_cfg_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> +} __packed;
> +
> +/* Frame control field format (2 bytes) */
> +struct wcn36xx_hal_mac_frame_ctl {
> +
> +#ifndef ANI_LITTLE_BIT_ENDIAN
> +
> + u8 subType:4;
> + u8 type:2;
> + u8 protVer:2;
> +
> + u8 order:1;
> + u8 wep:1;
> + u8 moreData:1;
> + u8 powerMgmt:1;
> + u8 retry:1;
> + u8 moreFrag:1;
> + u8 fromDS:1;
> + u8 toDS:1;
> +
> +#else
> +
> + u8 protVer:2;
> + u8 type:2;
> + u8 subType:4;
> +
> + u8 toDS:1;
> + u8 fromDS:1;
> + u8 moreFrag:1;
> + u8 retry:1;
> + u8 powerMgmt:1;
> + u8 moreData:1;
> + u8 wep:1;
> + u8 order:1;
> +
> +#endif
> +
> +};
> +
> +/* Sequence control field */
> +struct wcn36xx_hal_mac_seq_ctl {
> + u8 fragNum:4;
> + u8 seqNumLo:4;
> + u8 seqNumHi:8;
> +};
> +
> +/* Management header format */
> +struct wcn36xx_hal_mac_mgmt_hdr {
> + struct wcn36xx_hal_mac_frame_ctl fc;
> + u8 durationLo;
> + u8 durationHi;
> + u8 da[6];
> + u8 sa[6];
> + u8 bssId[6];
> + struct wcn36xx_hal_mac_seq_ctl seqControl;
> +};
> +
> +/* FIXME: pronto v1 apparently has 4 */
> +#define WCN36XX_HAL_NUM_BSSID 2
> +
> +/* Scan Entry to hold active BSS idx's */
> +struct wcn36xx_hal_scan_entry {
> + u8 bss_index[WCN36XX_HAL_NUM_BSSID];
> + u8 active_bss_count;
> +};
> +
> +struct wcn36xx_hal_init_scan_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* LEARN - AP Role
> + SCAN - STA Role */
> + enum wcn36xx_hal_sys_mode mode;
> +
> + /* BSSID of the BSS */
> + u8 bssid[ETH_ALEN];
> +
> + /* Whether BSS needs to be notified */
> + u8 notify;
> +
> + /* Kind of frame to be used for notifying the BSS (Data Null, QoS
> + * Null, or CTS to Self). Must always be a valid frame type. */
> + u8 frame_type;
> +
> + /* UMAC has the option of passing the MAC frame to be used for
> + * notifying the BSS. If non-zero, HAL will use the MAC frame
> + * buffer pointed to by macMgmtHdr. If zero, HAL will generate the
> + * appropriate MAC frame based on frameType. */
> + u8 frame_len;
> +
> + /* Following the framelength there is a MAC frame buffer if
> + * frameLength is non-zero. */
> + struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
> +
> + /* Entry to hold number of active BSS idx's */
> + struct wcn36xx_hal_scan_entry scan_entry;
> +};
> +
> +struct wcn36xx_hal_init_scan_con_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* LEARN - AP Role
> + SCAN - STA Role */
> + enum wcn36xx_hal_sys_mode mode;
> +
> + /* BSSID of the BSS */
> + u8 bssid[ETH_ALEN];
> +
> + /* Whether BSS needs to be notified */
> + u8 notify;
> +
> + /* Kind of frame to be used for notifying the BSS (Data Null, QoS
> + * Null, or CTS to Self). Must always be a valid frame type. */
> + u8 frame_type;
> +
> + /* UMAC has the option of passing the MAC frame to be used for
> + * notifying the BSS. If non-zero, HAL will use the MAC frame
> + * buffer pointed to by macMgmtHdr. If zero, HAL will generate the
> + * appropriate MAC frame based on frameType. */
> + u8 frame_length;
> +
> + /* Following the framelength there is a MAC frame buffer if
> + * frameLength is non-zero. */
> + struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
> +
> + /* Entry to hold number of active BSS idx's */
> + struct wcn36xx_hal_scan_entry scan_entry;
> +
> + /* Single NoA usage in Scanning */
> + u8 use_noa;
> +
> + /* Indicates the scan duration (in ms) */
> + u16 scan_duration;
> +
> +};
> +
> +struct wcn36xx_hal_init_scan_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_start_scan_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Indicates the channel to scan */
> + u8 scan_channel;
> +} __packed;
> +
> +struct wcn36xx_hal_start_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + u32 start_tsf[2];
> + u8 tx_mgmt_power;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_end_scan_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Indicates the channel to stop scanning. Not used really. But
> + * retained for symmetry with "start Scan" message. It can also
> + * help in error check if needed. */
> + u8 scan_channel;
> +} __packed;
> +
> +struct wcn36xx_hal_end_scan_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +} __packed;
> +
> +struct wcn36xx_hal_finish_scan_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Identifies the operational state of the AP/STA
> + * LEARN - AP Role SCAN - STA Role */
> + enum wcn36xx_hal_sys_mode mode;
> +
> + /* Operating channel to tune to. */
> + u8 oper_channel;
> +
> + /* Channel Bonding state If 20/40 MHz is operational, this will
> + * indicate the 40 MHz extension channel in combination with the
> + * control channel */
> + enum phy_chan_bond_state cb_state;
> +
> + /* BSSID of the BSS */
> + u8 bssid[ETH_ALEN];
> +
> + /* Whether BSS needs to be notified */
> + u8 notify;
> +
> + /* Kind of frame to be used for notifying the BSS (Data Null, QoS
> + * Null, or CTS to Self). Must always be a valid frame type. */
> + u8 frame_type;
> +
> + /* UMAC has the option of passing the MAC frame to be used for
> + * notifying the BSS. If non-zero, HAL will use the MAC frame
> + * buffer pointed to by macMgmtHdr. If zero, HAL will generate the
> + * appropriate MAC frame based on frameType. */
> + u8 frame_length;
> +
> + /* Following the framelength there is a MAC frame buffer if
> + * frameLength is non-zero. */
> + struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
> +
> + /* Entry to hold number of active BSS idx's */
> + struct wcn36xx_hal_scan_entry scan_entry;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_finish_scan_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> +} __packed;
> +
> +enum wcn36xx_hal_rate_index {
> + HW_RATE_INDEX_1MBPS = 0x82,
> + HW_RATE_INDEX_2MBPS = 0x84,
> + HW_RATE_INDEX_5_5MBPS = 0x8B,
> + HW_RATE_INDEX_6MBPS = 0x0C,
> + HW_RATE_INDEX_9MBPS = 0x12,
> + HW_RATE_INDEX_11MBPS = 0x96,
> + HW_RATE_INDEX_12MBPS = 0x18,
> + HW_RATE_INDEX_18MBPS = 0x24,
> + HW_RATE_INDEX_24MBPS = 0x30,
> + HW_RATE_INDEX_36MBPS = 0x48,
> + HW_RATE_INDEX_48MBPS = 0x60,
> + HW_RATE_INDEX_54MBPS = 0x6C
> +};
> +
> +struct wcn36xx_hal_supported_rates {
> + /*
> + * For Self STA Entry: this represents Self Mode.
> + * For Peer Stations, this represents the mode of the peer.
> + * On Station:
> + *
> + * --this mode is updated when PE adds the Self Entry.
> + *
> + * -- OR when PE sends 'ADD_BSS' message and station context in BSS
> + * is used to indicate the mode of the AP.
> + *
> + * ON AP:
> + *
> + * -- this mode is updated when PE sends 'ADD_BSS' and Sta entry
> + * for that BSS is used to indicate the self mode of the AP.
> + *
> + * -- OR when a station is associated, PE sends 'ADD_STA' message
> + * with this mode updated.
> + */
> +
> + enum sta_rate_mode op_rate_mode;
> +
> + /* 11b, 11a and aniLegacyRates are IE rates which gives rate in
> + * unit of 500Kbps */
> + u16 dsss_rates[WCN36XX_HAL_NUM_DSSS_RATES];
> + u16 ofdm_rates[WCN36XX_HAL_NUM_OFDM_RATES];
> + u16 legacy_rates[WCN36XX_HAL_NUM_POLARIS_RATES];
> + u16 reserved;
> +
> + /* Taurus only supports 26 Titan Rates(no ESF/concat Rates will be
> + * supported) First 26 bits are reserved for those Titan rates and
> + * the last 4 bits(bit28-31) for Taurus, 2(bit26-27) bits are
> + * reserved. */
> + /* Titan and Taurus Rates */
> + u32 enhanced_rate_bitmap;
> +
> + /*
> + * 0-76 bits used, remaining reserved
> + * bits 0-15 and 32 should be set.
> + */
> + u8 supported_mcs_set[WCN36XX_HAL_MAC_MAX_SUPPORTED_MCS_SET];
> +
> + /*
> + * RX Highest Supported Data Rate defines the highest data
> + * rate that the STA is able to receive, in unites of 1Mbps.
> + * This value is derived from "Supported MCS Set field" inside
> + * the HT capability element.
> + */
> + u16 rx_highest_data_rate;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_config_sta_params {
> + /* BSSID of STA */
> + u8 bssid[ETH_ALEN];
> +
> + /* ASSOC ID, as assigned by UMAC */
> + u16 aid;
> +
> + /* STA entry Type: 0 - Self, 1 - Other/Peer, 2 - BSSID, 3 - BCAST */
> + u8 type;
> +
> + /* Short Preamble Supported. */
> + u8 short_preamble_supported;
> +
> + /* MAC Address of STA */
> + u8 mac[ETH_ALEN];
> +
> + /* Listen interval of the STA */
> + u16 listen_interval;
> +
> + /* Support for 11e/WMM */
> + u8 wmm_enabled;
> +
> + /* 11n HT capable STA */
> + u8 ht_capable;
> +
> + /* TX Width Set: 0 - 20 MHz only, 1 - 20/40 MHz */
> + u8 tx_channel_width_set;
> +
> + /* RIFS mode 0 - NA, 1 - Allowed */
> + u8 rifs_mode;
> +
> + /* L-SIG TXOP Protection mechanism
> + 0 - No Support, 1 - Supported
> + SG - there is global field */
> + u8 lsig_txop_protection;
> +
> + /* Max Ampdu Size supported by STA. TPE programming.
> + 0 : 8k , 1 : 16k, 2 : 32k, 3 : 64k */
> + u8 max_ampdu_size;
> +
> + /* Max Ampdu density. Used by RA. 3 : 0~7 : 2^(11nAMPDUdensity -4) */
> + u8 max_ampdu_density;
> +
> + /* Max AMSDU size 1 : 3839 bytes, 0 : 7935 bytes */
> + u8 max_amsdu_size;
> +
> + /* Short GI support for 40Mhz packets */
> + u8 sgi_40mhz;
> +
> + /* Short GI support for 20Mhz packets */
> + u8 sgi_20Mhz;
> +
> + /* TODO move this parameter to the end for 3680 */
> + /* These rates are the intersection of peer and self capabilities. */
> + struct wcn36xx_hal_supported_rates supported_rates;
> +
> + /* Robust Management Frame (RMF) enabled/disabled */
> + u8 rmf;
> +
> + /* The unicast encryption type in the association */
> + u32 encrypt_type;
> +
> + /* HAL should update the existing STA entry, if this flag is set. UMAC
> + will set this flag in case of RE-ASSOC, where we want to reuse the
> + old STA ID. 0 = Add, 1 = Update */
> + u8 action;
> +
> + /* U-APSD Flags: 1b per AC. Encoded as follows:
> + b7 b6 b5 b4 b3 b2 b1 b0 =
> + X X X X BE BK VI VO */
> + u8 uapsd;
> +
> + /* Max SP Length */
> + u8 max_sp_len;
> +
> + /* 11n Green Field preamble support
> + 0 - Not supported, 1 - Supported */
> + u8 green_field_capable;
> +
> + /* MIMO Power Save mode */
> + enum wcn36xx_hal_ht_mimo_state mimo_ps;
> +
> + /* Delayed BA Support */
> + u8 delayed_ba_support;
> +
> + /* Max AMPDU duration in 32us */
> + u8 max_ampdu_duration;
> +
> + /* HT STA should set it to 1 if it is enabled in BSS. HT STA should
> + * set it to 0 if AP does not support it. This indication is sent
> + * to HAL and HAL uses this flag to pickup up appropriate 40Mhz
> + * rates. */
> + u8 dsss_cck_mode_40mhz;
> +
> + /* Valid STA Idx when action=Update. Set to 0xFF when invalid!
> + * Retained for backward compalibity with existing HAL code */
> + u8 sta_index;
> +
> + /* BSSID of BSS to which station is associated. Set to 0xFF when
> + * invalid. Retained for backward compalibity with existing HAL
> + * code */
> + u8 bssid_index;
> +
> + u8 p2p;
> +
> + /* TODO add this parameter for 3680. */
> + /* Reserved to align next field on a dword boundary */
> + /* u8 reserved; */
> +} __packed;
> +
> +struct wcn36xx_hal_config_sta_req_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_config_sta_params sta_params;
> +} __packed;
> +
> +struct wcn36xx_hal_config_sta_params_v1 {
> + /* BSSID of STA */
> + u8 bssid[ETH_ALEN];
> +
> + /* ASSOC ID, as assigned by UMAC */
> + u16 aid;
> +
> + /* STA entry Type: 0 - Self, 1 - Other/Peer, 2 - BSSID, 3 - BCAST */
> + u8 type;
> +
> + /* Short Preamble Supported. */
> + u8 short_preamble_supported;
> +
> + /* MAC Address of STA */
> + u8 mac[ETH_ALEN];
> +
> + /* Listen interval of the STA */
> + u16 listen_interval;
> +
> + /* Support for 11e/WMM */
> + u8 wmm_enabled;
> +
> + /* 11n HT capable STA */
> + u8 ht_capable;
> +
> + /* TX Width Set: 0 - 20 MHz only, 1 - 20/40 MHz */
> + u8 tx_channel_width_set;
> +
> + /* RIFS mode 0 - NA, 1 - Allowed */
> + u8 rifs_mode;
> +
> + /* L-SIG TXOP Protection mechanism
> + 0 - No Support, 1 - Supported
> + SG - there is global field */
> + u8 lsig_txop_protection;
> +
> + /* Max Ampdu Size supported by STA. TPE programming.
> + 0 : 8k , 1 : 16k, 2 : 32k, 3 : 64k */
> + u8 max_ampdu_size;
> +
> + /* Max Ampdu density. Used by RA. 3 : 0~7 : 2^(11nAMPDUdensity -4) */
> + u8 max_ampdu_density;
> +
> + /* Max AMSDU size 1 : 3839 bytes, 0 : 7935 bytes */
> + u8 max_amsdu_size;
> +
> + /* Short GI support for 40Mhz packets */
> + u8 sgi_40mhz;
> +
> + /* Short GI support for 20Mhz packets */
> + u8 sgi_20Mhz;
> +
> + /* Robust Management Frame (RMF) enabled/disabled */
> + u8 rmf;
> +
> + /* The unicast encryption type in the association */
> + u32 encrypt_type;
> +
> + /* HAL should update the existing STA entry, if this flag is set. UMAC
> + will set this flag in case of RE-ASSOC, where we want to reuse the
> + old STA ID. 0 = Add, 1 = Update */
> + u8 action;
> +
> + /* U-APSD Flags: 1b per AC. Encoded as follows:
> + b7 b6 b5 b4 b3 b2 b1 b0 =
> + X X X X BE BK VI VO */
> + u8 uapsd;
> +
> + /* Max SP Length */
> + u8 max_sp_len;
> +
> + /* 11n Green Field preamble support
> + 0 - Not supported, 1 - Supported */
> + u8 green_field_capable;
> +
> + /* MIMO Power Save mode */
> + enum wcn36xx_hal_ht_mimo_state mimo_ps;
> +
> + /* Delayed BA Support */
> + u8 delayed_ba_support;
> +
> + /* Max AMPDU duration in 32us */
> + u8 max_ampdu_duration;
> +
> + /* HT STA should set it to 1 if it is enabled in BSS. HT STA should
> + * set it to 0 if AP does not support it. This indication is sent
> + * to HAL and HAL uses this flag to pickup up appropriate 40Mhz
> + * rates. */
> + u8 dsss_cck_mode_40mhz;
> +
> + /* Valid STA Idx when action=Update. Set to 0xFF when invalid!
> + * Retained for backward compalibity with existing HAL code */
> + u8 sta_index;
> +
> + /* BSSID of BSS to which station is associated. Set to 0xFF when
> + * invalid. Retained for backward compalibity with existing HAL
> + * code */
> + u8 bssid_index;
> +
> + u8 p2p;
> +
> + /* Reserved to align next field on a dword boundary */
> + u8 reserved;
> +
> + /* These rates are the intersection of peer and self capabilities. */
> + struct wcn36xx_hal_supported_rates supported_rates;
> +} __packed;
> +
> +struct wcn36xx_hal_config_sta_req_msg_v1 {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_config_sta_params_v1 sta_params;
> +} __packed;
> +
> +struct config_sta_rsp_params {
> + /* success or failure */
> + u32 status;
> +
> + /* Station index; valid only when 'status' field value SUCCESS */
> + u8 sta_index;
> +
> + /* BSSID Index of BSS to which the station is associated */
> + u8 bssid_index;
> +
> + /* DPU Index for PTK */
> + u8 dpu_index;
> +
> + /* DPU Index for GTK */
> + u8 bcast_dpu_index;
> +
> + /* DPU Index for IGTK */
> + u8 bcast_mgmt_dpu_idx;
> +
> + /* PTK DPU signature */
> + u8 uc_ucast_sig;
> +
> + /* GTK DPU isignature */
> + u8 uc_bcast_sig;
> +
> + /* IGTK DPU signature */
> + u8 uc_mgmt_sig;
> +
> + u8 p2p;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_config_sta_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + struct config_sta_rsp_params params;
> +} __packed;
> +
> +/* Delete STA Request message */
> +struct wcn36xx_hal_delete_sta_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Index of STA to delete */
> + u8 sta_index;
> +
> +} __packed;
> +
> +/* Delete STA Response message */
> +struct wcn36xx_hal_delete_sta_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + /* Index of STA deleted */
> + u8 sta_id;
> +} __packed;
> +
> +/* 12 Bytes long because this structure can be used to represent rate and
> + * extended rate set IEs. The parser assume this to be at least 12 */
> +struct wcn36xx_hal_rate_set {
> + u8 num_rates;
> + u8 rate[WCN36XX_HAL_MAC_RATESET_EID_MAX];
> +} __packed;
> +
> +/* access category record */
> +struct wcn36xx_hal_aci_aifsn {
> +#ifndef ANI_LITTLE_BIT_ENDIAN
> + u8 rsvd:1;
> + u8 aci:2;
> + u8 acm:1;
> + u8 aifsn:4;
> +#else
> + u8 aifsn:4;
> + u8 acm:1;
> + u8 aci:2;
> + u8 rsvd:1;
> +#endif
> +} __packed;
> +
> +/* contention window size */
> +struct wcn36xx_hal_mac_cw {
> +#ifndef ANI_LITTLE_BIT_ENDIAN
> + u8 max:4;
> + u8 min:4;
> +#else
> + u8 min:4;
> + u8 max:4;
> +#endif
> +} __packed;
> +
> +struct wcn36xx_hal_edca_param_record {
> + struct wcn36xx_hal_aci_aifsn aci;
> + struct wcn36xx_hal_mac_cw cw;
> + u16 txop_limit;
> +} __packed;
> +
> +struct wcn36xx_hal_mac_ssid {
> + u8 length;
> + u8 ssid[32];
> +} __packed;
> +
> +/* Concurrency role. These are generic IDs that identify the various roles
> + * in the software system. */
> +enum wcn36xx_hal_con_mode {
> + WCN36XX_HAL_STA_MODE = 0,
> +
> + /* to support softAp mode . This is misleading.
> + It means AP MODE only. */
> + WCN36XX_HAL_STA_SAP_MODE = 1,
> +
> + WCN36XX_HAL_P2P_CLIENT_MODE,
> + WCN36XX_HAL_P2P_GO_MODE,
> + WCN36XX_HAL_MONITOR_MODE,
> +};
> +
> +/* This is a bit pattern to be set for each mode
> + * bit 0 - sta mode
> + * bit 1 - ap mode
> + * bit 2 - p2p client mode
> + * bit 3 - p2p go mode */
> +enum wcn36xx_hal_concurrency_mode {
> + HAL_STA = 1,
> + HAL_SAP = 2,
> +
> + /* to support sta, softAp mode . This means STA+AP mode */
> + HAL_STA_SAP = 3,
> +
> + HAL_P2P_CLIENT = 4,
> + HAL_P2P_GO = 8,
> + HAL_MAX_CONCURRENCY_PERSONA = 4
> +};
> +
> +struct wcn36xx_hal_config_bss_params {
> + /* BSSID */
> + u8 bssid[ETH_ALEN];
> +
> + /* Self Mac Address */
> + u8 self_mac_addr[ETH_ALEN];
> +
> + /* BSS type */
> + enum wcn36xx_hal_bss_type bss_type;
> +
> + /* Operational Mode: AP =0, STA = 1 */
> + u8 oper_mode;
> +
> + /* Network Type */
> + enum wcn36xx_hal_nw_type nw_type;
> +
> + /* Used to classify PURE_11G/11G_MIXED to program MTU */
> + u8 short_slot_time_supported;
> +
> + /* Co-exist with 11a STA */
> + u8 lla_coexist;
> +
> + /* Co-exist with 11b STA */
> + u8 llb_coexist;
> +
> + /* Co-exist with 11g STA */
> + u8 llg_coexist;
> +
> + /* Coexistence with 11n STA */
> + u8 ht20_coexist;
> +
> + /* Non GF coexist flag */
> + u8 lln_non_gf_coexist;
> +
> + /* TXOP protection support */
> + u8 lsig_tx_op_protection_full_support;
> +
> + /* RIFS mode */
> + u8 rifs_mode;
> +
> + /* Beacon Interval in TU */
> + u16 beacon_interval;
> +
> + /* DTIM period */
> + u8 dtim_period;
> +
> + /* TX Width Set: 0 - 20 MHz only, 1 - 20/40 MHz */
> + u8 tx_channel_width_set;
> +
> + /* Operating channel */
> + u8 oper_channel;
> +
> + /* Extension channel for channel bonding */
> + u8 ext_channel;
> +
> + /* Reserved to align next field on a dword boundary */
> + u8 reserved;
> +
> + /* TODO move sta to the end for 3680 */
> + /* Context of the station being added in HW
> + * Add a STA entry for "itself" -
> + *
> + * On AP - Add the AP itself in an "STA context"
> + *
> + * On STA - Add the AP to which this STA is joining in an
> + * "STA context"
> + */
> + struct wcn36xx_hal_config_sta_params sta;
> + /* SSID of the BSS */
> + struct wcn36xx_hal_mac_ssid ssid;
> +
> + /* HAL should update the existing BSS entry, if this flag is set.
> + * UMAC will set this flag in case of reassoc, where we want to
> + * resue the the old BSSID and still return success 0 = Add, 1 =
> + * Update */
> + u8 action;
> +
> + /* MAC Rate Set */
> + struct wcn36xx_hal_rate_set rateset;
> +
> + /* Enable/Disable HT capabilities of the BSS */
> + u8 ht;
> +
> + /* Enable/Disable OBSS protection */
> + u8 obss_prot_enabled;
> +
> + /* RMF enabled/disabled */
> + u8 rmf;
> +
> + /* HT Operating Mode operating mode of the 802.11n STA */
> + enum wcn36xx_hal_ht_operating_mode ht_oper_mode;
> +
> + /* Dual CTS Protection: 0 - Unused, 1 - Used */
> + u8 dual_cts_protection;
> +
> + /* Probe Response Max retries */
> + u8 max_probe_resp_retry_limit;
> +
> + /* To Enable Hidden ssid */
> + u8 hidden_ssid;
> +
> + /* To Enable Disable FW Proxy Probe Resp */
> + u8 proxy_probe_resp;
> +
> + /* Boolean to indicate if EDCA params are valid. UMAC might not
> + * have valid EDCA params or might not desire to apply EDCA params
> + * during config BSS. 0 implies Not Valid ; Non-Zero implies
> + * valid */
> + u8 edca_params_valid;
> +
> + /* EDCA Parameters for Best Effort Access Category */
> + struct wcn36xx_hal_edca_param_record acbe;
> +
> + /* EDCA Parameters forBackground Access Category */
> + struct wcn36xx_hal_edca_param_record acbk;
> +
> + /* EDCA Parameters for Video Access Category */
> + struct wcn36xx_hal_edca_param_record acvi;
> +
> + /* EDCA Parameters for Voice Access Category */
> + struct wcn36xx_hal_edca_param_record acvo;
> +
> + /* Ext Bss Config Msg if set */
> + u8 ext_set_sta_key_param_valid;
> +
> + /* SetStaKeyParams for ext bss msg */
> + struct wcn36xx_hal_set_sta_key_params ext_set_sta_key_param;
> +
> + /* Persona for the BSS can be STA,AP,GO,CLIENT value same as enum
> + * wcn36xx_hal_con_mode */
> + u8 wcn36xx_hal_persona;
> +
> + u8 spectrum_mgt_enable;
> +
> + /* HAL fills in the tx power used for mgmt frames in txMgmtPower */
> + s8 tx_mgmt_power;
> +
> + /* maxTxPower has max power to be used after applying the power
> + * constraint if any */
> + s8 max_tx_power;
> +} __packed;
> +
> +struct wcn36xx_hal_config_bss_req_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_config_bss_params bss_params;
> +} __packed;
> +
> +struct wcn36xx_hal_config_bss_params_v1 {
> + /* BSSID */
> + u8 bssid[ETH_ALEN];
> +
> + /* Self Mac Address */
> + u8 self_mac_addr[ETH_ALEN];
> +
> + /* BSS type */
> + enum wcn36xx_hal_bss_type bss_type;
> +
> + /* Operational Mode: AP =0, STA = 1 */
> + u8 oper_mode;
> +
> + /* Network Type */
> + enum wcn36xx_hal_nw_type nw_type;
> +
> + /* Used to classify PURE_11G/11G_MIXED to program MTU */
> + u8 short_slot_time_supported;
> +
> + /* Co-exist with 11a STA */
> + u8 lla_coexist;
> +
> + /* Co-exist with 11b STA */
> + u8 llb_coexist;
> +
> + /* Co-exist with 11g STA */
> + u8 llg_coexist;
> +
> + /* Coexistence with 11n STA */
> + u8 ht20_coexist;
> +
> + /* Non GF coexist flag */
> + u8 lln_non_gf_coexist;
> +
> + /* TXOP protection support */
> + u8 lsig_tx_op_protection_full_support;
> +
> + /* RIFS mode */
> + u8 rifs_mode;
> +
> + /* Beacon Interval in TU */
> + u16 beacon_interval;
> +
> + /* DTIM period */
> + u8 dtim_period;
> +
> + /* TX Width Set: 0 - 20 MHz only, 1 - 20/40 MHz */
> + u8 tx_channel_width_set;
> +
> + /* Operating channel */
> + u8 oper_channel;
> +
> + /* Extension channel for channel bonding */
> + u8 ext_channel;
> +
> + /* Reserved to align next field on a dword boundary */
> + u8 reserved;
> +
> + /* SSID of the BSS */
> + struct wcn36xx_hal_mac_ssid ssid;
> +
> + /* HAL should update the existing BSS entry, if this flag is set.
> + * UMAC will set this flag in case of reassoc, where we want to
> + * resue the the old BSSID and still return success 0 = Add, 1 =
> + * Update */
> + u8 action;
> +
> + /* MAC Rate Set */
> + struct wcn36xx_hal_rate_set rateset;
> +
> + /* Enable/Disable HT capabilities of the BSS */
> + u8 ht;
> +
> + /* Enable/Disable OBSS protection */
> + u8 obss_prot_enabled;
> +
> + /* RMF enabled/disabled */
> + u8 rmf;
> +
> + /* HT Operating Mode operating mode of the 802.11n STA */
> + enum wcn36xx_hal_ht_operating_mode ht_oper_mode;
> +
> + /* Dual CTS Protection: 0 - Unused, 1 - Used */
> + u8 dual_cts_protection;
> +
> + /* Probe Response Max retries */
> + u8 max_probe_resp_retry_limit;
> +
> + /* To Enable Hidden ssid */
> + u8 hidden_ssid;
> +
> + /* To Enable Disable FW Proxy Probe Resp */
> + u8 proxy_probe_resp;
> +
> + /* Boolean to indicate if EDCA params are valid. UMAC might not
> + * have valid EDCA params or might not desire to apply EDCA params
> + * during config BSS. 0 implies Not Valid ; Non-Zero implies
> + * valid */
> + u8 edca_params_valid;
> +
> + /* EDCA Parameters for Best Effort Access Category */
> + struct wcn36xx_hal_edca_param_record acbe;
> +
> + /* EDCA Parameters forBackground Access Category */
> + struct wcn36xx_hal_edca_param_record acbk;
> +
> + /* EDCA Parameters for Video Access Category */
> + struct wcn36xx_hal_edca_param_record acvi;
> +
> + /* EDCA Parameters for Voice Access Category */
> + struct wcn36xx_hal_edca_param_record acvo;
> +
> + /* Ext Bss Config Msg if set */
> + u8 ext_set_sta_key_param_valid;
> +
> + /* SetStaKeyParams for ext bss msg */
> + struct wcn36xx_hal_set_sta_key_params ext_set_sta_key_param;
> +
> + /* Persona for the BSS can be STA,AP,GO,CLIENT value same as enum
> + * wcn36xx_hal_con_mode */
> + u8 wcn36xx_hal_persona;
> +
> + u8 spectrum_mgt_enable;
> +
> + /* HAL fills in the tx power used for mgmt frames in txMgmtPower */
> + s8 tx_mgmt_power;
> +
> + /* maxTxPower has max power to be used after applying the power
> + * constraint if any */
> + s8 max_tx_power;
> +
> + /* Context of the station being added in HW
> + * Add a STA entry for "itself" -
> + *
> + * On AP - Add the AP itself in an "STA context"
> + *
> + * On STA - Add the AP to which this STA is joining in an
> + * "STA context"
> + */
> + struct wcn36xx_hal_config_sta_params_v1 sta;
> +} __packed;
> +
> +struct wcn36xx_hal_config_bss_req_msg_v1 {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_config_bss_params_v1 bss_params;
> +} __packed;
> +
> +struct wcn36xx_hal_config_bss_rsp_params {
> + /* Success or Failure */
> + u32 status;
> +
> + /* BSS index allocated by HAL */
> + u8 bss_index;
> +
> + /* DPU descriptor index for PTK */
> + u8 dpu_desc_index;
> +
> + /* PTK DPU signature */
> + u8 ucast_dpu_signature;
> +
> + /* DPU descriptor index for GTK */
> + u8 bcast_dpu_desc_indx;
> +
> + /* GTK DPU signature */
> + u8 bcast_dpu_signature;
> +
> + /* DPU descriptor for IGTK */
> + u8 mgmt_dpu_desc_index;
> +
> + /* IGTK DPU signature */
> + u8 mgmt_dpu_signature;
> +
> + /* Station Index for BSS entry */
> + u8 bss_sta_index;
> +
> + /* Self station index for this BSS */
> + u8 bss_self_sta_index;
> +
> + /* Bcast station for buffering bcast frames in AP role */
> + u8 bss_bcast_sta_idx;
> +
> + /* MAC Address of STA(PEER/SELF) in staContext of configBSSReq */
> + u8 mac[ETH_ALEN];
> +
> + /* HAL fills in the tx power used for mgmt frames in this field. */
> + s8 tx_mgmt_power;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_config_bss_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_config_bss_rsp_params bss_rsp_params;
> +} __packed;
> +
> +struct wcn36xx_hal_delete_bss_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* BSS index to be deleted */
> + u8 bss_index;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_delete_bss_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Success or Failure */
> + u32 status;
> +
> + /* BSS index that has been deleted */
> + u8 bss_index;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_join_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Indicates the BSSID to which STA is going to associate */
> + u8 bssid[ETH_ALEN];
> +
> + /* Indicates the channel to switch to. */
> + u8 channel;
> +
> + /* Self STA MAC */
> + u8 self_sta_mac_addr[ETH_ALEN];
> +
> + /* Local power constraint */
> + u8 local_power_constraint;
> +
> + /* Secondary channel offset */
> + enum phy_chan_bond_state secondary_channel_offset;
> +
> + /* link State */
> + enum wcn36xx_hal_link_state link_state;
> +
> + /* Max TX power */
> + s8 max_tx_power;
> +} __packed;
> +
> +struct wcn36xx_hal_join_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + /* HAL fills in the tx power used for mgmt frames in this field */
> + u8 tx_mgmt_power;
> +} __packed;
> +
> +struct post_assoc_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + struct wcn36xx_hal_config_sta_params sta_params;
> + struct wcn36xx_hal_config_bss_params bss_params;
> +};
> +
> +struct post_assoc_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct config_sta_rsp_params sta_rsp_params;
> + struct wcn36xx_hal_config_bss_rsp_params bss_rsp_params;
> +};
> +
> +/* This is used to create a set of WEP keys for a given BSS. */
> +struct wcn36xx_hal_set_bss_key_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* BSS Index of the BSS */
> + u8 bss_idx;
> +
> + /* Encryption Type used with peer */
> + enum ani_ed_type enc_type;
> +
> + /* Number of keys */
> + u8 num_keys;
> +
> + /* Array of keys. */
> + struct wcn36xx_hal_keys keys[WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS];
> +
> + /* Control for Replay Count, 1= Single TID based replay count on Tx
> + * 0 = Per TID based replay count on TX */
> + u8 single_tid_rc;
> +} __packed;
> +
> +/* tagged version of set bss key */
> +struct wcn36xx_hal_set_bss_key_req_msg_tagged {
> + struct wcn36xx_hal_set_bss_key_req_msg Msg;
> + u32 tag;
> +} __packed;
> +
> +struct wcn36xx_hal_set_bss_key_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +} __packed;
> +
> +/*
> + * This is used configure the key information on a given station.
> + * When the sec_type is WEP40 or WEP104, the def_wep_idx is used to locate
> + * a preconfigured key from a BSS the station assoicated with; otherwise
> + * a new key descriptor is created based on the key field.
> + */
> +struct wcn36xx_hal_set_sta_key_req_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_set_sta_key_params set_sta_key_params;
> +} __packed;
> +
> +struct wcn36xx_hal_set_sta_key_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +} __packed;
> +
> +struct wcn36xx_hal_remove_bss_key_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* BSS Index of the BSS */
> + u8 bss_idx;
> +
> + /* Encryption Type used with peer */
> + enum ani_ed_type enc_type;
> +
> + /* Key Id */
> + u8 key_id;
> +
> + /* STATIC/DYNAMIC. Used in Nullifying in Key Descriptors for
> + * Static/Dynamic keys */
> + enum ani_wep_type wep_type;
> +} __packed;
> +
> +struct wcn36xx_hal_remove_bss_key_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +} __packed;
> +
> +/*
> + * This is used by PE to Remove the key information on a given station.
> + */
> +struct wcn36xx_hal_remove_sta_key_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* STA Index */
> + u16 sta_idx;
> +
> + /* Encryption Type used with peer */
> + enum ani_ed_type enc_type;
> +
> + /* Key Id */
> + u8 key_id;
> +
> + /* Whether to invalidate the Broadcast key or Unicast key. In case
> + * of WEP, the same key is used for both broadcast and unicast. */
> + u8 unicast;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_remove_sta_key_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /*success or failure */
> + u32 status;
> +
> +} __packed;
> +
> +#ifdef FEATURE_OEM_DATA_SUPPORT
> +
> +#ifndef OEM_DATA_REQ_SIZE
> +#define OEM_DATA_REQ_SIZE 134
> +#endif
> +
> +#ifndef OEM_DATA_RSP_SIZE
> +#define OEM_DATA_RSP_SIZE 1968
> +#endif
> +
> +struct start_oem_data_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u32 status;
> + tSirMacAddr self_mac_addr;
> + u8 oem_data_req[OEM_DATA_REQ_SIZE];
> +
> +};
> +
> +struct start_oem_data_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 oem_data_rsp[OEM_DATA_RSP_SIZE];
> +};
> +
> +#endif
> +
> +struct wcn36xx_hal_switch_channel_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Channel number */
> + u8 channel_number;
> +
> + /* Local power constraint */
> + u8 local_power_constraint;
> +
> + /* Secondary channel offset */
> + enum phy_chan_bond_state secondary_channel_offset;
> +
> + /* HAL fills in the tx power used for mgmt frames in this field. */
> + u8 tx_mgmt_power;
> +
> + /* Max TX power */
> + u8 max_tx_power;
> +
> + /* Self STA MAC */
> + u8 self_sta_mac_addr[ETH_ALEN];
> +
> + /* VO WIFI comment: BSSID needed to identify session. As the
> + * request has power constraints, this should be applied only to
> + * that session Since MTU timing and EDCA are sessionized, this
> + * struct needs to be sessionized and bssid needs to be out of the
> + * VOWifi feature flag V IMP: Keep bssId field at the end of this
> + * msg. It is used to mantain backward compatbility by way of
> + * ignoring if using new host/old FW or old host/new FW since it is
> + * at the end of this struct
> + */
> + u8 bssid[ETH_ALEN];
> +} __packed;
> +
> +struct wcn36xx_hal_switch_channel_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Status */
> + u32 status;
> +
> + /* Channel number - same as in request */
> + u8 channel_number;
> +
> + /* HAL fills in the tx power used for mgmt frames in this field */
> + u8 tx_mgmt_power;
> +
> + /* BSSID needed to identify session - same as in request */
> + u8 bssid[ETH_ALEN];
> +
> +} __packed;
> +
> +struct update_edca_params_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /*BSS Index */
> + u16 bss_index;
> +
> + /* Best Effort */
> + struct wcn36xx_hal_edca_param_record acbe;
> +
> + /* Background */
> + struct wcn36xx_hal_edca_param_record acbk;
> +
> + /* Video */
> + struct wcn36xx_hal_edca_param_record acvi;
> +
> + /* Voice */
> + struct wcn36xx_hal_edca_param_record acvo;
> +};
> +
> +struct update_edca_params_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct dpu_stats_params {
> + /* Index of STA to which the statistics */
> + u16 sta_index;
> +
> + /* Encryption mode */
> + u8 enc_mode;
> +
> + /* status */
> + u32 status;
> +
> + /* Statistics */
> + u32 send_blocks;
> + u32 recv_blocks;
> + u32 replays;
> + u8 mic_error_cnt;
> + u32 prot_excl_cnt;
> + u16 format_err_cnt;
> + u16 un_decryptable_cnt;
> + u32 decrypt_err_cnt;
> + u32 decrypt_ok_cnt;
> +};
> +
> +struct wcn36xx_hal_stats_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Valid STA Idx for per STA stats request */
> + u32 sta_id;
> +
> + /* Categories of stats requested as specified in eHalStatsMask */
> + u32 stats_mask;
> +};
> +
> +struct ani_summary_stats_info {
> + /* Total number of packets(per AC) that were successfully
> + * transmitted with retries */
> + u32 retry_cnt[4];
> +
> + /* The number of MSDU packets and MMPDU frames per AC that the
> + * 802.11 station successfully transmitted after more than one
> + * retransmission attempt */
> + u32 multiple_retry_cnt[4];
> +
> + /* Total number of packets(per AC) that were successfully
> + * transmitted (with and without retries, including multi-cast,
> + * broadcast) */
> + u32 tx_frm_cnt[4];
> +
> + /* Total number of packets that were successfully received (after
> + * appropriate filter rules including multi-cast, broadcast) */
> + u32 rx_frm_cnt;
> +
> + /* Total number of duplicate frames received successfully */
> + u32 frm_dup_cnt;
> +
> + /* Total number packets(per AC) failed to transmit */
> + u32 fail_cnt[4];
> +
> + /* Total number of RTS/CTS sequence failures for transmission of a
> + * packet */
> + u32 rts_fail_cnt;
> +
> + /* Total number packets failed transmit because of no ACK from the
> + * remote entity */
> + u32 ack_fail_cnt;
> +
> + /* Total number of RTS/CTS sequence success for transmission of a
> + * packet */
> + u32 rts_succ_cnt;
> +
> + /* The sum of the receive error count and dropped-receive-buffer
> + * error count. HAL will provide this as a sum of (FCS error) +
> + * (Fail get BD/PDU in HW) */
> + u32 rx_discard_cnt;
> +
> + /*
> + * The receive error count. HAL will provide the RxP FCS error
> + * global counter. */
> + u32 rx_error_cnt;
> +
> + /* The sum of the transmit-directed byte count, transmit-multicast
> + * byte count and transmit-broadcast byte count. HAL will sum TPE
> + * UC/MC/BCAST global counters to provide this. */
> + u32 tx_byte_cnt;
> +};
> +
> +/* defines tx_rate_flags */
> +enum tx_rate_info {
> + /* Legacy rates */
> + HAL_TX_RATE_LEGACY = 0x1,
> +
> + /* HT20 rates */
> + HAL_TX_RATE_HT20 = 0x2,
> +
> + /* HT40 rates */
> + HAL_TX_RATE_HT40 = 0x4,
> +
> + /* Rate with Short guard interval */
> + HAL_TX_RATE_SGI = 0x8,
> +
> + /* Rate with Long guard interval */
> + HAL_TX_RATE_LGI = 0x10
> +};
> +
> +struct ani_global_class_a_stats_info {
> + /* The number of MPDU frames received by the 802.11 station for
> + * MSDU packets or MMPDU frames */
> + u32 rx_frag_cnt;
> +
> + /* The number of MPDU frames received by the 802.11 station for
> + * MSDU packets or MMPDU frames when a promiscuous packet filter
> + * was enabled */
> + u32 promiscuous_rx_frag_cnt;
> +
> + /* The receiver input sensitivity referenced to a FER of 8% at an
> + * MPDU length of 1024 bytes at the antenna connector. Each element
> + * of the array shall correspond to a supported rate and the order
> + * shall be the same as the supporteRates parameter. */
> + u32 rx_input_sensitivity;
> +
> + /* The maximum transmit power in dBm upto one decimal. for eg: if
> + * it is 10.5dBm, the value would be 105 */
> + u32 max_pwr;
> +
> + /* Number of times the receiver failed to synchronize with the
> + * incoming signal after detecting the sync in the preamble of the
> + * transmitted PLCP protocol data unit. */
> + u32 sync_fail_cnt;
> +
> + /* Legacy transmit rate, in units of 500 kbit/sec, for the most
> + * recently transmitted frame */
> + u32 tx_rate;
> +
> + /* mcs index for HT20 and HT40 rates */
> + u32 mcs_index;
> +
> + /* to differentiate between HT20 and HT40 rates; short and long
> + * guard interval */
> + u32 tx_rate_flags;
> +};
> +
> +struct ani_global_security_stats {
> + /* The number of unencrypted received MPDU frames that the MAC
> + * layer discarded when the IEEE 802.11 dot11ExcludeUnencrypted
> + * management information base (MIB) object is enabled */
> + u32 rx_wep_unencrypted_frm_cnt;
> +
> + /* The number of received MSDU packets that that the 802.11 station
> + * discarded because of MIC failures */
> + u32 rx_mic_fail_cnt;
> +
> + /* The number of encrypted MPDU frames that the 802.11 station
> + * failed to decrypt because of a TKIP ICV error */
> + u32 tkip_icv_err;
> +
> + /* The number of received MPDU frames that the 802.11 discarded
> + * because of an invalid AES-CCMP format */
> + u32 aes_ccmp_format_err;
> +
> + /* The number of received MPDU frames that the 802.11 station
> + * discarded because of the AES-CCMP replay protection procedure */
> + u32 aes_ccmp_replay_cnt;
> +
> + /* The number of received MPDU frames that the 802.11 station
> + * discarded because of errors detected by the AES-CCMP decryption
> + * algorithm */
> + u32 aes_ccmp_decrpt_err;
> +
> + /* The number of encrypted MPDU frames received for which a WEP
> + * decryption key was not available on the 802.11 station */
> + u32 wep_undecryptable_cnt;
> +
> + /* The number of encrypted MPDU frames that the 802.11 station
> + * failed to decrypt because of a WEP ICV error */
> + u32 wep_icv_err;
> +
> + /* The number of received encrypted packets that the 802.11 station
> + * successfully decrypted */
> + u32 rx_decrypt_succ_cnt;
> +
> + /* The number of encrypted packets that the 802.11 station failed
> + * to decrypt */
> + u32 rx_decrypt_fail_cnt;
> +};
> +
> +struct ani_global_class_b_stats_info {
> + struct ani_global_security_stats uc_stats;
> + struct ani_global_security_stats mc_bc_stats;
> +};
> +
> +struct ani_global_class_c_stats_info {
> + /* This counter shall be incremented for a received A-MSDU frame
> + * with the stations MAC address in the address 1 field or an
> + * A-MSDU frame with a group address in the address 1 field */
> + u32 rx_amsdu_cnt;
> +
> + /* This counter shall be incremented when the MAC receives an AMPDU
> + * from the PHY */
> + u32 rx_ampdu_cnt;
> +
> + /* This counter shall be incremented when a Frame is transmitted
> + * only on the primary channel */
> + u32 tx_20_frm_cnt;
> +
> + /* This counter shall be incremented when a Frame is received only
> + * on the primary channel */
> + u32 rx_20_frm_cnt;
> +
> + /* This counter shall be incremented by the number of MPDUs
> + * received in the A-MPDU when an A-MPDU is received */
> + u32 rx_mpdu_in_ampdu_cnt;
> +
> + /* This counter shall be incremented when an MPDU delimiter has a
> + * CRC error when this is the first CRC error in the received AMPDU
> + * or when the previous delimiter has been decoded correctly */
> + u32 ampdu_delimiter_crc_err;
> +};
> +
> +struct ani_per_sta_stats_info {
> + /* The number of MPDU frames that the 802.11 station transmitted
> + * and acknowledged through a received 802.11 ACK frame */
> + u32 tx_frag_cnt[4];
> +
> + /* This counter shall be incremented when an A-MPDU is transmitted */
> + u32 tx_ampdu_cnt;
> +
> + /* This counter shall increment by the number of MPDUs in the AMPDU
> + * when an A-MPDU is transmitted */
> + u32 tx_mpdu_in_ampdu_cnt;
> +};
> +
> +struct wcn36xx_hal_stats_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Success or Failure */
> + u32 status;
> +
> + /* STA Idx */
> + u32 sta_index;
> +
> + /* Categories of STATS being returned as per eHalStatsMask */
> + u32 stats_mask;
> +
> + /* message type is same as the request type */
> + u16 msg_type;
> +
> + /* length of the entire request, includes the pStatsBuf length too */
> + u16 msg_len;
> +};
> +
> +struct wcn36xx_hal_set_link_state_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 bssid[ETH_ALEN];
> + enum wcn36xx_hal_link_state state;
> + u8 self_mac_addr[ETH_ALEN];
> +
> +} __packed;
> +
> +struct set_link_state_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +/* TSPEC Params */
> +struct wcn36xx_hal_ts_info_tfc {
> +#ifndef ANI_LITTLE_BIT_ENDIAN
> + u16 ackPolicy:2;
> + u16 userPrio:3;
> + u16 psb:1;
> + u16 aggregation:1;
> + u16 accessPolicy:2;
> + u16 direction:2;
> + u16 tsid:4;
> + u16 trafficType:1;
> +#else
> + u16 trafficType:1;
> + u16 tsid:4;
> + u16 direction:2;
> + u16 accessPolicy:2;
> + u16 aggregation:1;
> + u16 psb:1;
> + u16 userPrio:3;
> + u16 ackPolicy:2;
> +#endif
> +};
> +
> +/* Flag to schedule the traffic type */
> +struct wcn36xx_hal_ts_info_sch {
> +#ifndef ANI_LITTLE_BIT_ENDIAN
> + u8 rsvd:7;
> + u8 schedule:1;
> +#else
> + u8 schedule:1;
> + u8 rsvd:7;
> +#endif
> +};
> +
> +/* Traffic and scheduling info */
> +struct wcn36xx_hal_ts_info {
> + struct wcn36xx_hal_ts_info_tfc traffic;
> + struct wcn36xx_hal_ts_info_sch schedule;
> +};
> +
> +/* Information elements */
> +struct wcn36xx_hal_tspec_ie {
> + u8 type;
> + u8 length;
> + struct wcn36xx_hal_ts_info ts_info;
> + u16 nom_msdu_size;
> + u16 max_msdu_size;
> + u32 min_svc_interval;
> + u32 max_svc_interval;
> + u32 inact_interval;
> + u32 suspend_interval;
> + u32 svc_start_time;
> + u32 min_data_rate;
> + u32 mean_data_rate;
> + u32 peak_data_rate;
> + u32 max_burst_sz;
> + u32 delay_bound;
> + u32 min_phy_rate;
> + u16 surplus_bw;
> + u16 medium_time;
> +};
> +
> +struct add_ts_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Station Index */
> + u16 sta_index;
> +
> + /* TSPEC handler uniquely identifying a TSPEC for a STA in a BSS */
> + u16 tspec_index;
> +
> + /* To program TPE with required parameters */
> + struct wcn36xx_hal_tspec_ie tspec;
> +
> + /* U-APSD Flags: 1b per AC. Encoded as follows:
> + b7 b6 b5 b4 b3 b2 b1 b0 =
> + X X X X BE BK VI VO */
> + u8 uapsd;
> +
> + /* These parameters are for all the access categories */
> +
> + /* Service Interval */
> + u32 service_interval[WCN36XX_HAL_MAX_AC];
> +
> + /* Suspend Interval */
> + u32 suspend_interval[WCN36XX_HAL_MAX_AC];
> +
> + /* Delay Interval */
> + u32 delay_interval[WCN36XX_HAL_MAX_AC];
> +};
> +
> +struct add_rs_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct del_ts_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Station Index */
> + u16 sta_index;
> +
> + /* TSPEC identifier uniquely identifying a TSPEC for a STA in a BSS */
> + u16 tspec_index;
> +
> + /* To lookup station id using the mac address */
> + u8 bssid[ETH_ALEN];
> +};
> +
> +struct del_ts_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +/* End of TSpec Parameters */
> +
> +/* Start of BLOCK ACK related Parameters */
> +
> +struct wcn36xx_hal_add_ba_session_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Station Index */
> + u16 sta_index;
> +
> + /* Peer MAC Address */
> + u8 mac_addr[ETH_ALEN];
> +
> + /* ADDBA Action Frame dialog token
> + HAL will not interpret this object */
> + u8 dialog_token;
> +
> + /* TID for which the BA is being setup
> + This identifies the TC or TS of interest */
> + u8 tid;
> +
> + /* 0 - Delayed BA (Not supported)
> + 1 - Immediate BA */
> + u8 policy;
> +
> + /* Indicates the number of buffers for this TID (baTID)
> + NOTE - This is the requested buffer size. When this
> + is processed by HAL and subsequently by HDD, it is
> + possible that HDD may change this buffer size. Any
> + change in the buffer size should be noted by PE and
> + advertized appropriately in the ADDBA response */
> + u16 buffer_size;
> +
> + /* BA timeout in TU's 0 means no timeout will occur */
> + u16 timeout;
> +
> + /* b0..b3 - Fragment Number - Always set to 0
> + b4..b15 - Starting Sequence Number of first MSDU
> + for which this BA is setup */
> + u16 ssn;
> +
> + /* ADDBA direction
> + 1 - Originator
> + 0 - Recipient */
> + u8 direction;
> +} __packed;
> +
> +struct wcn36xx_hal_add_ba_session_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + /* Dialog token */
> + u8 dialog_token;
> +
> + /* TID for which the BA session has been setup */
> + u8 ba_tid;
> +
> + /* BA Buffer Size allocated for the current BA session */
> + u8 ba_buffer_size;
> +
> + u8 ba_session_id;
> +
> + /* Reordering Window buffer */
> + u8 win_size;
> +
> + /* Station Index to id the sta */
> + u8 sta_index;
> +
> + /* Starting Sequence Number */
> + u16 ssn;
> +} __packed;
> +
> +struct wcn36xx_hal_add_ba_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Session Id */
> + u8 session_id;
> +
> + /* Reorder Window Size */
> + u8 win_size;
> +/* Old FW 1.2.2.4 does not support this*/
> +#ifdef FEATURE_ON_CHIP_REORDERING
> + u8 reordering_done_on_chip;
> +#endif
> +} __packed;
> +
> +struct wcn36xx_hal_add_ba_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + /* Dialog token */
> + u8 dialog_token;
> +} __packed;
> +
> +struct add_ba_info {
> + u16 ba_enable:1;
> + u16 starting_seq_num:12;
> + u16 reserved:3;
> +};
> +
> +struct wcn36xx_hal_trigger_ba_rsp_candidate {
> + u8 sta_addr[ETH_ALEN];
> + struct add_ba_info ba_info[STACFG_MAX_TC];
> +} __packed;
> +
> +struct wcn36xx_hal_trigget_ba_req_candidate {
> + u8 sta_index;
> + u8 tid_bitmap;
> +} __packed;
> +
> +struct wcn36xx_hal_trigger_ba_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Session Id */
> + u8 session_id;
> +
> + /* baCandidateCnt is followed by trigger BA
> + * Candidate List(tTriggerBaCandidate)
> + */
> + u16 candidate_cnt;
> +
> +} __packed;
> +
> +struct wcn36xx_hal_trigger_ba_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* TO SUPPORT BT-AMP */
> + u8 bssid[ETH_ALEN];
> +
> + /* success or failure */
> + u32 status;
> +
> + /* baCandidateCnt is followed by trigger BA
> + * Rsp Candidate List(tTriggerRspBaCandidate)
> + */
> + u16 candidate_cnt;
> +} __packed;
> +
> +struct wcn36xx_hal_del_ba_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Station Index */
> + u16 sta_index;
> +
> + /* TID for which the BA session is being deleted */
> + u8 tid;
> +
> + /* DELBA direction
> + 1 - Originator
> + 0 - Recipient */
> + u8 direction;
> +} __packed;
> +
> +struct wcn36xx_hal_del_ba_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +} __packed;
> +
> +struct tsm_stats_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Traffic Id */
> + u8 tid;
> +
> + u8 bssid[ETH_ALEN];
> +};
> +
> +struct tsm_stats_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /*success or failure */
> + u32 status;
> +
> + /* Uplink Packet Queue delay */
> + u16 uplink_pkt_queue_delay;
> +
> + /* Uplink Packet Queue delay histogram */
> + u16 uplink_pkt_queue_delay_hist[4];
> +
> + /* Uplink Packet Transmit delay */
> + u32 uplink_pkt_tx_delay;
> +
> + /* Uplink Packet loss */
> + u16 uplink_pkt_loss;
> +
> + /* Uplink Packet count */
> + u16 uplink_pkt_count;
> +
> + /* Roaming count */
> + u8 roaming_count;
> +
> + /* Roaming Delay */
> + u16 roaming_delay;
> +};
> +
> +struct set_key_done_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /*bssid of the keys */
> + u8 bssidx;
> + u8 enc_type;
> +};
> +
> +struct wcn36xx_hal_nv_img_download_req_msg {
> + /* Note: The length specified in wcn36xx_hal_nv_img_download_req_msg
> + * messages should be
> + * header.len = sizeof(wcn36xx_hal_nv_img_download_req_msg) +
> + * nv_img_buffer_size */
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Fragment sequence number of the NV Image. Note that NV Image
> + * might not fit into one message due to size limitation of the SMD
> + * channel FIFO. UMAC can hence choose to chop the NV blob into
> + * multiple fragments starting with seqeunce number 0, 1, 2 etc.
> + * The last fragment MUST be indicated by marking the
> + * isLastFragment field to 1. Note that all the NV blobs would be
> + * concatenated together by HAL without any padding bytes in
> + * between.*/
> + u16 frag_number;
> +
> + /* Is this the last fragment? When set to 1 it indicates that no
> + * more fragments will be sent by UMAC and HAL can concatenate all
> + * the NV blobs rcvd & proceed with the parsing. HAL would generate
> + * a WCN36XX_HAL_DOWNLOAD_NV_RSP to the WCN36XX_HAL_DOWNLOAD_NV_REQ
> + * after it receives each fragment */
> + u16 last_fragment;
> +
> + /* NV Image size (number of bytes) */
> + u32 nv_img_buffer_size;
> +
> + /* Following the 'nv_img_buffer_size', there should be
> + * nv_img_buffer_size bytes of NV Image i.e.
> + * u8[nv_img_buffer_size] */
> +} __packed;
> +
> +struct wcn36xx_hal_nv_img_download_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Success or Failure. HAL would generate a
> + * WCN36XX_HAL_DOWNLOAD_NV_RSP after each fragment */
> + u32 status;
> +} __packed;
> +
> +struct wcn36xx_hal_nv_store_ind {
> + /* Note: The length specified in tHalNvStoreInd messages should be
> + * header.msgLen = sizeof(tHalNvStoreInd) + nvBlobSize */
> + struct wcn36xx_hal_msg_header header;
> +
> + /* NV Item */
> + u32 table_id;
> +
> + /* Size of NV Blob */
> + u32 nv_blob_size;
> +
> + /* Following the 'nvBlobSize', there should be nvBlobSize bytes of
> + * NV blob i.e. u8[nvBlobSize] */
> +};
> +
> +/* End of Block Ack Related Parameters */
> +
> +#define WCN36XX_HAL_CIPHER_SEQ_CTR_SIZE 6
> +
> +/* Definition for MIC failure indication MAC reports this each time a MIC
> + * failure occures on Rx TKIP packet
> + */
> +struct mic_failure_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 bssid[ETH_ALEN];
> +
> + /* address used to compute MIC */
> + u8 src_addr[ETH_ALEN];
> +
> + /* transmitter address */
> + u8 ta_addr[ETH_ALEN];
> +
> + u8 dst_addr[ETH_ALEN];
> +
> + u8 multicast;
> +
> + /* first byte of IV */
> + u8 iv1;
> +
> + /* second byte of IV */
> + u8 key_id;
> +
> + /* sequence number */
> + u8 tsc[WCN36XX_HAL_CIPHER_SEQ_CTR_SIZE];
> +
> + /* receive address */
> + u8 rx_addr[ETH_ALEN];
> +};
> +
> +struct update_vht_op_mode_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u16 op_mode;
> + u16 sta_id;
> +};
> +
> +struct update_vht_op_mode_params_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u32 status;
> +};
> +
> +struct update_beacon_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 bss_index;
> +
> + /* shortPreamble mode. HAL should update all the STA rates when it
> + * receives this message */
> + u8 short_preamble;
> +
> + /* short Slot time. */
> + u8 short_slot_time;
> +
> + /* Beacon Interval */
> + u16 beacon_interval;
> +
> + /* Protection related */
> + u8 lla_coexist;
> + u8 llb_coexist;
> + u8 llg_coexist;
> + u8 ht20_coexist;
> + u8 lln_non_gf_coexist;
> + u8 lsig_tx_op_protection_full_support;
> + u8 rifs_mode;
> +
> + u16 param_change_bitmap;
> +};
> +
> +struct update_beacon_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_send_beacon_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* length of the template. */
> + u32 beacon_length;
> +
> + /* Beacon data. */
> + u8 beacon[BEACON_TEMPLATE_SIZE];
> +
> + u8 bssid[ETH_ALEN];
> +
> + /* TIM IE offset from the beginning of the template. */
> + u32 tim_ie_offset;
> +
> + /* P2P IE offset from the begining of the template */
> + u16 p2p_ie_offset;
> +} __packed;
> +
> +struct send_beacon_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> + u32 status;
> +} __packed;
> +
> +struct enable_radar_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 bssid[ETH_ALEN];
> + u8 channel;
> +};
> +
> +struct enable_radar_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Link Parameters */
> + u8 bssid[ETH_ALEN];
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct radar_detect_intr_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 radar_det_channel;
> +};
> +
> +struct radar_detect_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* channel number in which the RADAR detected */
> + u8 channel_number;
> +
> + /* RADAR pulse width in usecond */
> + u16 radar_pulse_width;
> +
> + /* Number of RADAR pulses */
> + u16 num_radar_pulse;
> +};
> +
> +struct wcn36xx_hal_get_tpc_report_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 sta[ETH_ALEN];
> + u8 dialog_token;
> + u8 txpower;
> +};
> +
> +struct wcn36xx_hal_get_tpc_report_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_send_probe_resp_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 probe_resp_template[BEACON_TEMPLATE_SIZE];
> + u32 probe_resp_template_len;
> + u32 proxy_probe_req_valid_ie_bmap[8];
> + u8 bssid[ETH_ALEN];
> +};
> +
> +struct send_probe_resp_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct send_unknown_frame_rx_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_delete_sta_context_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u16 aid;
> + u16 sta_id;
> +
> + /* TO SUPPORT BT-AMP */
> + u8 bssid[ETH_ALEN];
> +
> + /* HAL copies bssid from the sta table. */
> + u8 addr2[ETH_ALEN];
> +
> + /* To unify the keepalive / unknown A2 / tim-based disa */
> + u16 reason_code;
> +} __packed;
> +
> +struct indicate_del_sta {
> + struct wcn36xx_hal_msg_header header;
> + u8 aid;
> + u8 sta_index;
> + u8 bss_index;
> + u8 reason_code;
> + u32 status;
> +};
> +
> +struct bt_amp_event_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + enum bt_amp_event_type btAmpEventType;
> +};
> +
> +struct bt_amp_event_rsp {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct tl_hal_flush_ac_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Station Index. originates from HAL */
> + u8 sta_id;
> +
> + /* TID for which the transmit queue is being flushed */
> + u8 tid;
> +};
> +
> +struct tl_hal_flush_ac_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Station Index. originates from HAL */
> + u8 sta_id;
> +
> + /* TID for which the transmit queue is being flushed */
> + u8 tid;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_enter_imps_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +};
> +
> +struct wcn36xx_hal_exit_imps_req {
> + struct wcn36xx_hal_msg_header header;
> +};
> +
> +struct wcn36xx_hal_enter_bmps_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 bss_index;
> +
> + /* TBTT value derived from the last beacon */
> +#ifndef BUILD_QWPTTSTATIC
> + u64 tbtt;
> +#endif
> + u8 dtim_count;
> +
> + /* DTIM period given to HAL during association may not be valid, if
> + * association is based on ProbeRsp instead of beacon. */
> + u8 dtim_period;
> +
> + /* For CCX and 11R Roaming */
> + u32 rssi_filter_period;
> +
> + u32 num_beacon_per_rssi_average;
> + u8 rssi_filter_enable;
> +} __packed;
> +
> +struct wcn36xx_hal_exit_bmps_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 send_data_null;
> + u8 bss_index;
> +} __packed;
> +
> +struct wcn36xx_hal_missed_beacon_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 bss_index;
> +} __packed;
> +
> +/* Beacon Filtering data structures */
> +
> +/* The above structure would be followed by multiple of below mentioned
> + * structure
> + */
> +struct beacon_filter_ie {
> + u8 element_id;
> + u8 check_ie_presence;
> + u8 offset;
> + u8 value;
> + u8 bitmask;
> + u8 ref;
> +};
> +
> +struct wcn36xx_hal_add_bcn_filter_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u16 capability_info;
> + u16 capability_mask;
> + u16 beacon_interval;
> + u16 ie_num;
> + u8 bss_index;
> + u8 reserved;
> +};
> +
> +struct wcn36xx_hal_rem_bcn_filter_req {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 ie_Count;
> + u8 rem_ie_id[1];
> +};
> +
> +#define WCN36XX_HAL_IPV4_ARP_REPLY_OFFLOAD 0
> +#define WCN36XX_HAL_IPV6_NEIGHBOR_DISCOVERY_OFFLOAD 1
> +#define WCN36XX_HAL_IPV6_NS_OFFLOAD 2
> +#define WCN36XX_HAL_IPV6_ADDR_LEN 16
> +#define WCN36XX_HAL_OFFLOAD_DISABLE 0
> +#define WCN36XX_HAL_OFFLOAD_ENABLE 1
> +#define WCN36XX_HAL_OFFLOAD_BCAST_FILTER_ENABLE 0x2
> +#define WCN36XX_HAL_OFFLOAD_ARP_AND_BCAST_FILTER_ENABLE \
> + (HAL_OFFLOAD_ENABLE|HAL_OFFLOAD_BCAST_FILTER_ENABLE)
> +
> +struct wcn36xx_hal_ns_offload_params {
> + u8 src_ipv6_addr[WCN36XX_HAL_IPV6_ADDR_LEN];
> + u8 self_ipv6_addr[WCN36XX_HAL_IPV6_ADDR_LEN];
> +
> + /* Only support 2 possible Network Advertisement IPv6 address */
> + u8 target_ipv6_addr1[WCN36XX_HAL_IPV6_ADDR_LEN];
> + u8 target_ipv6_addr2[WCN36XX_HAL_IPV6_ADDR_LEN];
> +
> + u8 self_addr[ETH_ALEN];
> + u8 src_ipv6_addr_valid:1;
> + u8 target_ipv6_addr1_valid:1;
> + u8 target_ipv6_addr2_valid:1;
> + u8 reserved1:5;
> +
> + /* make it DWORD aligned */
> + u8 reserved2;
> +
> + /* slot index for this offload */
> + u32 slot_index;
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_host_offload_req {
> + u8 offload_Type;
> +
> + /* enable or disable */
> + u8 enable;
> +
> + union {
> + u8 host_ipv4_addr[4];
> + u8 host_ipv6_addr[WCN36XX_HAL_IPV6_ADDR_LEN];
> + } u;
> +};
> +
> +struct wcn36xx_hal_host_offload_req_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_host_offload_req host_offload_params;
> + struct wcn36xx_hal_ns_offload_params ns_offload_params;
> +};
> +
> +/* Packet Types. */
> +#define WCN36XX_HAL_KEEP_ALIVE_NULL_PKT 1
> +#define WCN36XX_HAL_KEEP_ALIVE_UNSOLICIT_ARP_RSP 2
> +
> +/* Enable or disable keep alive */
> +#define WCN36XX_HAL_KEEP_ALIVE_DISABLE 0
> +#define WCN36XX_HAL_KEEP_ALIVE_ENABLE 1
> +#define WCN36XX_KEEP_ALIVE_TIME_PERIOD 30 /* unit: s */
> +
> +/* Keep Alive request. */
> +struct wcn36xx_hal_keep_alive_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 packet_type;
> + u32 time_period;
> + u8 host_ipv4_addr[WCN36XX_HAL_IPV4_ADDR_LEN];
> + u8 dest_ipv4_addr[WCN36XX_HAL_IPV4_ADDR_LEN];
> + u8 dest_addr[ETH_ALEN];
> + u8 bss_index;
> +} __packed;
> +
> +struct wcn36xx_hal_rssi_threshold_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + s8 threshold1:8;
> + s8 threshold2:8;
> + s8 threshold3:8;
> + u8 thres1_pos_notify:1;
> + u8 thres1_neg_notify:1;
> + u8 thres2_pos_notify:1;
> + u8 thres2_neg_notify:1;
> + u8 thres3_pos_notify:1;
> + u8 thres3_neg_notify:1;
> + u8 reserved10:2;
> +};
> +
> +struct wcn36xx_hal_enter_uapsd_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 bk_delivery:1;
> + u8 be_delivery:1;
> + u8 vi_delivery:1;
> + u8 vo_delivery:1;
> + u8 bk_trigger:1;
> + u8 be_trigger:1;
> + u8 vi_trigger:1;
> + u8 vo_trigger:1;
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_exit_uapsd_req_msg {
> + struct wcn36xx_hal_msg_header header;
> + u8 bss_index;
> +};
> +
> +#define WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE 128
> +#define WCN36XX_HAL_WOWL_BCAST_MAX_NUM_PATTERNS 16
> +
> +struct wcn36xx_hal_wowl_add_bcast_ptrn_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Pattern ID */
> + u8 id;
> +
> + /* Pattern byte offset from beginning of the 802.11 packet to start
> + * of the wake-up pattern */
> + u8 byte_Offset;
> +
> + /* Non-Zero Pattern size */
> + u8 size;
> +
> + /* Pattern */
> + u8 pattern[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
> +
> + /* Non-zero pattern mask size */
> + u8 mask_size;
> +
> + /* Pattern mask */
> + u8 mask[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
> +
> + /* Extra pattern */
> + u8 extra[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
> +
> + /* Extra pattern mask */
> + u8 mask_extra[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
> +
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_wow_del_bcast_ptrn_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Pattern ID of the wakeup pattern to be deleted */
> + u8 id;
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_wowl_enter_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Enables/disables magic packet filtering */
> + u8 magic_packet_enable;
> +
> + /* Magic pattern */
> + u8 magic_pattern[ETH_ALEN];
> +
> + /* Enables/disables packet pattern filtering in firmware. Enabling
> + * this flag enables broadcast pattern matching in Firmware. If
> + * unicast pattern matching is also desired,
> + * ucUcastPatternFilteringEnable flag must be set tot true as well
> + */
> + u8 pattern_filtering_enable;
> +
> + /* Enables/disables unicast packet pattern filtering. This flag
> + * specifies whether we want to do pattern match on unicast packets
> + * as well and not just broadcast packets. This flag has no effect
> + * if the ucPatternFilteringEnable (main controlling flag) is set
> + * to false
> + */
> + u8 ucast_pattern_filtering_enable;
> +
> + /* This configuration is valid only when magicPktEnable=1. It
> + * requests hardware to wake up when it receives the Channel Switch
> + * Action Frame.
> + */
> + u8 wow_channel_switch_receive;
> +
> + /* This configuration is valid only when magicPktEnable=1. It
> + * requests hardware to wake up when it receives the
> + * Deauthentication Frame.
> + */
> + u8 wow_deauth_receive;
> +
> + /* This configuration is valid only when magicPktEnable=1. It
> + * requests hardware to wake up when it receives the Disassociation
> + * Frame.
> + */
> + u8 wow_disassoc_receive;
> +
> + /* This configuration is valid only when magicPktEnable=1. It
> + * requests hardware to wake up when it has missed consecutive
> + * beacons. This is a hardware register configuration (NOT a
> + * firmware configuration).
> + */
> + u8 wow_max_missed_beacons;
> +
> + /* This configuration is valid only when magicPktEnable=1. This is
> + * a timeout value in units of microsec. It requests hardware to
> + * unconditionally wake up after it has stayed in WoWLAN mode for
> + * some time. Set 0 to disable this feature.
> + */
> + u8 wow_max_sleep;
> +
> + /* This configuration directs the WoW packet filtering to look for
> + * EAP-ID requests embedded in EAPOL frames and use this as a wake
> + * source.
> + */
> + u8 wow_eap_id_request_enable;
> +
> + /* This configuration directs the WoW packet filtering to look for
> + * EAPOL-4WAY requests and use this as a wake source.
> + */
> + u8 wow_eapol_4way_enable;
> +
> + /* This configuration allows a host wakeup on an network scan
> + * offload match.
> + */
> + u8 wow_net_scan_offload_match;
> +
> + /* This configuration allows a host wakeup on any GTK rekeying
> + * error.
> + */
> + u8 wow_gtk_rekey_error;
> +
> + /* This configuration allows a host wakeup on BSS connection loss.
> + */
> + u8 wow_bss_connection_loss;
> +
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_wowl_exit_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_get_rssi_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +};
> +
> +struct wcn36xx_hal_get_roam_rssi_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Valid STA Idx for per STA stats request */
> + u32 sta_id;
> +};
> +
> +struct wcn36xx_hal_set_uapsd_ac_params_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* STA index */
> + u8 sta_idx;
> +
> + /* Access Category */
> + u8 ac;
> +
> + /* User Priority */
> + u8 up;
> +
> + /* Service Interval */
> + u32 service_interval;
> +
> + /* Suspend Interval */
> + u32 suspend_interval;
> +
> + /* Delay Interval */
> + u32 delay_interval;
> +};
> +
> +struct wcn36xx_hal_configure_rxp_filter_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 set_mcst_bcst_filter_setting;
> + u8 set_mcst_bcst_filter;
> +};
> +
> +struct wcn36xx_hal_enter_imps_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_exit_imps_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_enter_bmps_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + u8 bss_index;
> +} __packed;
> +
> +struct wcn36xx_hal_exit_bmps_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + u8 bss_index;
> +} __packed;
> +
> +struct wcn36xx_hal_enter_uapsd_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_exit_uapsd_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_rssi_notification_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u32 rssi_thres1_pos_cross:1;
> + u32 rssi_thres1_neg_cross:1;
> + u32 rssi_thres2_pos_cross:1;
> + u32 rssi_thres2_neg_cross:1;
> + u32 rssi_thres3_pos_cross:1;
> + u32 rssi_thres3_neg_cross:1;
> + u32 avg_rssi:8;
> + u32 reserved:18;
> +
> +};
> +
> +struct wcn36xx_hal_get_rssio_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> + s8 rssi;
> +
> +};
> +
> +struct wcn36xx_hal_get_roam_rssi_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + u8 sta_id;
> + s8 rssi;
> +};
> +
> +struct wcn36xx_hal_wowl_enter_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_wowl_exit_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_add_bcn_filter_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_rem_bcn_filter_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_add_wowl_bcast_ptrn_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_del_wowl_bcast_ptrn_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_host_offload_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_keep_alive_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_set_rssi_thresh_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_set_uapsd_ac_params_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_configure_rxp_filter_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct set_max_tx_pwr_req {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* BSSID is needed to identify which session issued this request.
> + * As the request has power constraints, this should be applied
> + * only to that session */
> + u8 bssid[ETH_ALEN];
> +
> + u8 self_addr[ETH_ALEN];
> +
> + /* In request, power == MaxTx power to be used. */
> + u8 power;
> +};
> +
> +struct set_max_tx_pwr_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* power == tx power used for management frames */
> + u8 power;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct set_tx_pwr_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* TX Power in milli watts */
> + u32 tx_power;
> +
> + u8 bss_index;
> +};
> +
> +struct set_tx_pwr_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct get_tx_pwr_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 sta_id;
> +};
> +
> +struct get_tx_pwr_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + /* TX Power in milli watts */
> + u32 tx_power;
> +};
> +
> +struct set_p2p_gonoa_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 opp_ps;
> + u32 ct_window;
> + u8 count;
> + u32 duration;
> + u32 interval;
> + u32 single_noa_duration;
> + u8 ps_selection;
> +};
> +
> +struct set_p2p_gonoa_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_add_sta_self_req {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 self_addr[ETH_ALEN];
> + u32 status;
> +} __packed;
> +
> +struct wcn36xx_hal_add_sta_self_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + /* Self STA Index */
> + u8 self_sta_index;
> +
> + /* DPU Index (IGTK, PTK, GTK all same) */
> + u8 dpu_index;
> +
> + /* DPU Signature */
> + u8 dpu_signature;
> +} __packed;
> +
> +struct wcn36xx_hal_del_sta_self_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 self_addr[ETH_ALEN];
> +} __packed;
> +
> +struct wcn36xx_hal_del_sta_self_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /*success or failure */
> + u32 status;
> +
> + u8 self_addr[ETH_ALEN];
> +} __packed;
> +
> +struct aggr_add_ts_req {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Station Index */
> + u16 sta_idx;
> +
> + /* TSPEC handler uniquely identifying a TSPEC for a STA in a BSS.
> + * This will carry the bitmap with the bit positions representing
> + * different AC.s */
> + u16 tspec_index;
> +
> + /* Tspec info per AC To program TPE with required parameters */
> + struct wcn36xx_hal_tspec_ie tspec[WCN36XX_HAL_MAX_AC];
> +
> + /* U-APSD Flags: 1b per AC. Encoded as follows:
> + b7 b6 b5 b4 b3 b2 b1 b0 =
> + X X X X BE BK VI VO */
> + u8 uapsd;
> +
> + /* These parameters are for all the access categories */
> +
> + /* Service Interval */
> + u32 service_interval[WCN36XX_HAL_MAX_AC];
> +
> + /* Suspend Interval */
> + u32 suspend_interval[WCN36XX_HAL_MAX_AC];
> +
> + /* Delay Interval */
> + u32 delay_interval[WCN36XX_HAL_MAX_AC];
> +};
> +
> +struct aggr_add_ts_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status0;
> +
> + /* FIXME PRIMA for future use for 11R */
> + u32 status1;
> +};
> +
> +struct wcn36xx_hal_configure_apps_cpu_wakeup_state_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 is_apps_cpu_awake;
> +};
> +
> +struct wcn36xx_hal_configure_apps_cpu_wakeup_state_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_dump_cmd_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u32 arg1;
> + u32 arg2;
> + u32 arg3;
> + u32 arg4;
> + u32 arg5;
> +} __packed;
> +
> +struct wcn36xx_hal_dump_cmd_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + /* Length of the responce message */
> + u32 rsp_length;
> +
> + /* FIXME: Currently considering the the responce will be less than
> + * 100bytes */
> + u8 rsp_buffer[DUMPCMD_RSP_BUFFER];
> +} __packed;
> +
> +#define WLAN_COEX_IND_DATA_SIZE (4)
> +#define WLAN_COEX_IND_TYPE_DISABLE_HB_MONITOR (0)
> +#define WLAN_COEX_IND_TYPE_ENABLE_HB_MONITOR (1)
> +
> +struct coex_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Coex Indication Type */
> + u32 type;
> +
> + /* Coex Indication Data */
> + u32 data[WLAN_COEX_IND_DATA_SIZE];
> +};
> +
> +struct wcn36xx_hal_tx_compl_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Tx Complete Indication Success or Failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_wlan_host_suspend_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u32 configured_mcst_bcst_filter_setting;
> + u32 active_session_count;
> +};
> +
> +struct wcn36xx_hal_wlan_exclude_unencrpted_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 dot11_exclude_unencrypted;
> + u8 bssid[ETH_ALEN];
> +};
> +
> +struct noa_attr_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 index;
> + u8 opp_ps_flag;
> + u16 ctwin;
> +
> + u16 noa1_interval_count;
> + u16 bss_index;
> + u32 noa1_duration;
> + u32 noa1_interval;
> + u32 noa1_starttime;
> +
> + u16 noa2_interval_count;
> + u16 reserved2;
> + u32 noa2_duration;
> + u32 noa2_interval;
> + u32 noa2_start_time;
> +
> + u32 status;
> +};
> +
> +struct noa_start_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u32 status;
> + u32 bss_index;
> +};
> +
> +struct wcn36xx_hal_wlan_host_resume_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 configured_mcst_bcst_filter_setting;
> +};
> +
> +struct wcn36xx_hal_host_resume_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +struct wcn36xx_hal_del_ba_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u16 sta_idx;
> +
> + /* Peer MAC Address, whose BA session has timed out */
> + u8 peer_addr[ETH_ALEN];
> +
> + /* TID for which a BA session timeout is being triggered */
> + u8 ba_tid;
> +
> + /* DELBA direction
> + * 1 - Originator
> + * 0 - Recipient
> + */
> + u8 direction;
> +
> + u32 reason_code;
> +
> + /* TO SUPPORT BT-AMP */
> + u8 bssid[ETH_ALEN];
> +};
> +
> +/* PNO Messages */
> +
> +/* Max number of channels that a network can be found on */
> +#define WCN36XX_HAL_PNO_MAX_NETW_CHANNELS 26
> +
> +/* Max number of channels that a network can be found on */
> +#define WCN36XX_HAL_PNO_MAX_NETW_CHANNELS_EX 60
> +
> +/* Maximum numbers of networks supported by PNO */
> +#define WCN36XX_HAL_PNO_MAX_SUPP_NETWORKS 16
> +
> +/* The number of scan time intervals that can be programmed into PNO */
> +#define WCN36XX_HAL_PNO_MAX_SCAN_TIMERS 10
> +
> +/* Maximum size of the probe template */
> +#define WCN36XX_HAL_PNO_MAX_PROBE_SIZE 450
> +
> +/* Type of PNO enabling:
> + *
> + * Immediate - scanning will start immediately and PNO procedure will be
> + * repeated based on timer
> + *
> + * Suspend - scanning will start at suspend
> + *
> + * Resume - scanning will start on system resume
> + */
> +enum pno_mode {
> + PNO_MODE_IMMEDIATE,
> + PNO_MODE_ON_SUSPEND,
> + PNO_MODE_ON_RESUME,
> + PNO_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +/* Authentication type */
> +enum auth_type {
> + AUTH_TYPE_ANY = 0,
> + AUTH_TYPE_OPEN_SYSTEM = 1,
> +
> + /* Upper layer authentication types */
> + AUTH_TYPE_WPA = 2,
> + AUTH_TYPE_WPA_PSK = 3,
> +
> + AUTH_TYPE_RSN = 4,
> + AUTH_TYPE_RSN_PSK = 5,
> + AUTH_TYPE_FT_RSN = 6,
> + AUTH_TYPE_FT_RSN_PSK = 7,
> + AUTH_TYPE_WAPI_WAI_CERTIFICATE = 8,
> + AUTH_TYPE_WAPI_WAI_PSK = 9,
> +
> + AUTH_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +/* Encryption type */
> +enum ed_type {
> + ED_ANY = 0,
> + ED_NONE = 1,
> + ED_WEP = 2,
> + ED_TKIP = 3,
> + ED_CCMP = 4,
> + ED_WPI = 5,
> +
> + ED_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +/* SSID broadcast type */
> +enum ssid_bcast_type {
> + BCAST_UNKNOWN = 0,
> + BCAST_NORMAL = 1,
> + BCAST_HIDDEN = 2,
> +
> + BCAST_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
> +};
> +
> +/* The network description for which PNO will have to look for */
> +struct network_type {
> + /* SSID of the BSS */
> + struct wcn36xx_hal_mac_ssid ssid;
> +
> + /* Authentication type for the network */
> + enum auth_type authentication;
> +
> + /* Encryption type for the network */
> + enum ed_type encryption;
> +
> + /* Indicate the channel on which the Network can be found 0 - if
> + * all channels */
> + u8 channel_count;
> + u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS];
> +
> + /* Indicates the RSSI threshold for the network to be considered */
> + u8 rssi_threshold;
> +};
> +
> +struct scan_timer {
> + /* How much it should wait */
> + u32 value;
> +
> + /* How many times it should repeat that wait value 0 - keep using
> + * this timer until PNO is disabled */
> + u32 repeat;
> +
> + /* e.g: 2 3 4 0 - it will wait 2s between consecutive scans for 3
> + * times - after that it will wait 4s between consecutive scans
> + * until disabled */
> +};
> +
> +/* The network parameters to be sent to the PNO algorithm */
> +struct scan_timers_type {
> + /* set to 0 if you wish for PNO to use its default telescopic timer */
> + u8 count;
> +
> + /* A set value represents the amount of time that PNO will wait
> + * between two consecutive scan procedures If the desired is for a
> + * uniform timer that fires always at the exact same interval - one
> + * single value is to be set If there is a desire for a more
> + * complex - telescopic like timer multiple values can be set -
> + * once PNO reaches the end of the array it will continue scanning
> + * at intervals presented by the last value */
> + struct scan_timer values[WCN36XX_HAL_PNO_MAX_SCAN_TIMERS];
> +};
> +
> +/* Preferred network list request */
> +struct set_pref_netw_list_req {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Enable PNO */
> + u32 enable;
> +
> + /* Immediate, On Suspend, On Resume */
> + enum pno_mode mode;
> +
> + /* Number of networks sent for PNO */
> + u32 networks_count;
> +
> + /* The networks that PNO needs to look for */
> + struct network_type networks[WCN36XX_HAL_PNO_MAX_SUPP_NETWORKS];
> +
> + /* The scan timers required for PNO */
> + struct scan_timers_type scan_timers;
> +
> + /* Probe template for 2.4GHz band */
> + u16 band_24g_probe_size;
> + u8 band_24g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
> +
> + /* Probe template for 5GHz band */
> + u16 band_5g_probe_size;
> + u8 band_5g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
> +};
> +
> +/* The network description for which PNO will have to look for */
> +struct network_type_new {
> + /* SSID of the BSS */
> + struct wcn36xx_hal_mac_ssid ssid;
> +
> + /* Authentication type for the network */
> + enum auth_type authentication;
> +
> + /* Encryption type for the network */
> + enum ed_type encryption;
> +
> + /* SSID broadcast type, normal, hidden or unknown */
> + enum ssid_bcast_type bcast_network_type;
> +
> + /* Indicate the channel on which the Network can be found 0 - if
> + * all channels */
> + u8 channel_count;
> + u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS];
> +
> + /* Indicates the RSSI threshold for the network to be considered */
> + u8 rssi_threshold;
> +};
> +
> +/* Preferred network list request new */
> +struct set_pref_netw_list_req_new {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Enable PNO */
> + u32 enable;
> +
> + /* Immediate, On Suspend, On Resume */
> + enum pno_mode mode;
> +
> + /* Number of networks sent for PNO */
> + u32 networks_count;
> +
> + /* The networks that PNO needs to look for */
> + struct network_type_new networks[WCN36XX_HAL_PNO_MAX_SUPP_NETWORKS];
> +
> + /* The scan timers required for PNO */
> + struct scan_timers_type scan_timers;
> +
> + /* Probe template for 2.4GHz band */
> + u16 band_24g_probe_size;
> + u8 band_24g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
> +
> + /* Probe template for 5GHz band */
> + u16 band_5g_probe_size;
> + u8 band_5g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
> +};
> +
> +/* Preferred network list response */
> +struct set_pref_netw_list_resp {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* status of the request - just to indicate that PNO has
> + * acknowledged the request and will start scanning */
> + u32 status;
> +};
> +
> +/* Preferred network found indication */
> +struct pref_netw_found_ind {
> +
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Network that was found with the highest RSSI */
> + struct wcn36xx_hal_mac_ssid ssid;
> +
> + /* Indicates the RSSI */
> + u8 rssi;
> +};
> +
> +/* RSSI Filter request */
> +struct set_rssi_filter_req {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* RSSI Threshold */
> + u8 rssi_threshold;
> +};
> +
> +/* Set RSSI filter resp */
> +struct set_rssi_filter_resp {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* status of the request */
> + u32 status;
> +};
> +
> +/* Update scan params - sent from host to PNO to be used during PNO
> + * scanningx */
> +struct wcn36xx_hal_update_scan_params_req {
> +
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Host setting for 11d */
> + u8 dot11d_enabled;
> +
> + /* Lets PNO know that host has determined the regulatory domain */
> + u8 dot11d_resolved;
> +
> + /* Channels on which PNO is allowed to scan */
> + u8 channel_count;
> + u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS];
> +
> + /* Minimum channel time */
> + u16 active_min_ch_time;
> +
> + /* Maximum channel time */
> + u16 active_max_ch_time;
> +
> + /* Minimum channel time */
> + u16 passive_min_ch_time;
> +
> + /* Maximum channel time */
> + u16 passive_max_ch_time;
> +
> + /* Cb State */
> + enum phy_chan_bond_state state;
> +} __packed;
> +
> +/* Update scan params - sent from host to PNO to be used during PNO
> + * scanningx */
> +struct update_scan_params_req_ex {
> +
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Host setting for 11d */
> + u8 dot11d_enabled;
> +
> + /* Lets PNO know that host has determined the regulatory domain */
> + u8 dot11d_resolved;
> +
> + /* Channels on which PNO is allowed to scan */
> + u8 channel_count;
> + u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS_EX];
> +
> + /* Minimum channel time */
> + u16 active_min_ch_time;
> +
> + /* Maximum channel time */
> + u16 active_max_ch_time;
> +
> + /* Minimum channel time */
> + u16 passive_min_ch_time;
> +
> + /* Maximum channel time */
> + u16 passive_max_ch_time;
> +
> + /* Cb State */
> + enum phy_chan_bond_state state;
> +};
> +
> +/* Update scan params - sent from host to PNO to be used during PNO
> + * scanningx */
> +struct wcn36xx_hal_update_scan_params_resp {
> +
> + struct wcn36xx_hal_msg_header header;
> +
> + /* status of the request */
> + u32 status;
> +} __packed;
> +
> +struct wcn36xx_hal_set_tx_per_tracking_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* 0: disable, 1:enable */
> + u8 tx_per_tracking_enable;
> +
> + /* Check period, unit is sec. */
> + u8 tx_per_tracking_period;
> +
> + /* (Fail TX packet)/(Total TX packet) ratio, the unit is 10%. */
> + u8 tx_per_tracking_ratio;
> +
> + /* A watermark of check number, once the tx packet exceed this
> + * number, we do the check, default is 5 */
> + u32 tx_per_tracking_watermark;
> +};
> +
> +struct wcn36xx_hal_set_tx_per_tracking_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> +};
> +
> +struct tx_per_hit_ind_msg {
> + struct wcn36xx_hal_msg_header header;
> +};
> +
> +/* Packet Filtering Definitions Begin */
> +#define WCN36XX_HAL_PROTOCOL_DATA_LEN 8
> +#define WCN36XX_HAL_MAX_NUM_MULTICAST_ADDRESS 240
> +#define WCN36XX_HAL_MAX_NUM_FILTERS 20
> +#define WCN36XX_HAL_MAX_CMP_PER_FILTER 10
> +
> +enum wcn36xx_hal_receive_packet_filter_type {
> + HAL_RCV_FILTER_TYPE_INVALID,
> + HAL_RCV_FILTER_TYPE_FILTER_PKT,
> + HAL_RCV_FILTER_TYPE_BUFFER_PKT,
> + HAL_RCV_FILTER_TYPE_MAX_ENUM_SIZE
> +};
> +
> +enum wcn36xx_hal_rcv_pkt_flt_protocol_type {
> + HAL_FILTER_PROTO_TYPE_INVALID,
> + HAL_FILTER_PROTO_TYPE_MAC,
> + HAL_FILTER_PROTO_TYPE_ARP,
> + HAL_FILTER_PROTO_TYPE_IPV4,
> + HAL_FILTER_PROTO_TYPE_IPV6,
> + HAL_FILTER_PROTO_TYPE_UDP,
> + HAL_FILTER_PROTO_TYPE_MAX
> +};
> +
> +enum wcn36xx_hal_rcv_pkt_flt_cmp_flag_type {
> + HAL_FILTER_CMP_TYPE_INVALID,
> + HAL_FILTER_CMP_TYPE_EQUAL,
> + HAL_FILTER_CMP_TYPE_MASK_EQUAL,
> + HAL_FILTER_CMP_TYPE_NOT_EQUAL,
> + HAL_FILTER_CMP_TYPE_MAX
> +};
> +
> +struct wcn36xx_hal_rcv_pkt_filter_params {
> + u8 protocol_layer;
> + u8 cmp_flag;
> +
> + /* Length of the data to compare */
> + u16 data_length;
> +
> + /* from start of the respective frame header */
> + u8 data_offset;
> +
> + /* Reserved field */
> + u8 reserved;
> +
> + /* Data to compare */
> + u8 compare_data[WCN36XX_HAL_PROTOCOL_DATA_LEN];
> +
> + /* Mask to be applied on the received packet data before compare */
> + u8 data_mask[WCN36XX_HAL_PROTOCOL_DATA_LEN];
> +};
> +
> +struct wcn36xx_hal_sessionized_rcv_pkt_filter_cfg_type {
> + u8 id;
> + u8 type;
> + u8 params_count;
> + u32 coleasce_time;
> + u8 bss_index;
> + struct wcn36xx_hal_rcv_pkt_filter_params params[1];
> +};
> +
> +struct wcn36xx_hal_set_rcv_pkt_filter_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 id;
> + u8 type;
> + u8 params_count;
> + u32 coalesce_time;
> + struct wcn36xx_hal_rcv_pkt_filter_params params[1];
> +};
> +
> +struct wcn36xx_hal_rcv_flt_mc_addr_list_type {
> + /* from start of the respective frame header */
> + u8 data_offset;
> +
> + u32 mc_addr_count;
> + u8 mc_addr[ETH_ALEN][WCN36XX_HAL_MAX_NUM_MULTICAST_ADDRESS];
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_set_pkt_filter_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_rcv_flt_pkt_match_cnt_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_rcv_flt_pkt_match_cnt {
> + u8 id;
> + u32 match_cnt;
> +};
> +
> +struct wcn36xx_hal_rcv_flt_pkt_match_cnt_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Success or Failure */
> + u32 status;
> +
> + u32 match_count;
> + struct wcn36xx_hal_rcv_flt_pkt_match_cnt
> + matches[WCN36XX_HAL_MAX_NUM_FILTERS];
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_rcv_flt_pkt_clear_param {
> + /* only valid for response message */
> + u32 status;
> + u8 id;
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_rcv_flt_pkt_clear_req_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_rcv_flt_pkt_clear_param param;
> +};
> +
> +struct wcn36xx_hal_rcv_flt_pkt_clear_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_rcv_flt_pkt_clear_param param;
> +};
> +
> +struct wcn36xx_hal_rcv_flt_pkt_set_mc_list_req_msg {
> + struct wcn36xx_hal_msg_header header;
> + struct wcn36xx_hal_rcv_flt_mc_addr_list_type mc_addr_list;
> +};
> +
> +struct wcn36xx_hal_rcv_flt_pkt_set_mc_list_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> + u32 status;
> + u8 bss_index;
> +};
> +
> +/* Packet Filtering Definitions End */
> +
> +struct set_power_params_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Ignore DTIM */
> + u32 ignore_dtim;
> +
> + /* DTIM Period */
> + u32 dtim_period;
> +
> + /* Listen Interval */
> + u32 listen_interval;
> +
> + /* Broadcast Multicast Filter */
> + u32 bcast_mcast_filter;
> +
> + /* Beacon Early Termination */
> + u32 enable_bet;
> +
> + /* Beacon Early Termination Interval */
> + u32 bet_interval;
> +};
> +
> +struct set_power_params_resp {
> +
> + struct wcn36xx_hal_msg_header header;
> +
> + /* status of the request */
> + u32 status;
> +};
> +
> +/* Capability bitmap exchange definitions and macros starts */
> +
> +enum place_holder_in_cap_bitmap {
> + MCC = 0,
> + P2P = 1,
> + DOT11AC = 2,
> + SLM_SESSIONIZATION = 3,
> + DOT11AC_OPMODE = 4,
> + SAP32STA = 5,
> + TDLS = 6,
> + P2P_GO_NOA_DECOUPLE_INIT_SCAN = 7,
> + WLANACTIVE_OFFLOAD = 8,
> + BEACON_OFFLOAD = 9,
> + SCAN_OFFLOAD = 10,
> + ROAM_OFFLOAD = 11,
> + BCN_MISS_OFFLOAD = 12,
> + STA_POWERSAVE = 13,
> + STA_ADVANCED_PWRSAVE = 14,
> + AP_UAPSD = 15,
> + AP_DFS = 16,
> + BLOCKACK = 17,
> + PHY_ERR = 18,
> + BCN_FILTER = 19,
> + RTT = 20,
> + RATECTRL = 21,
> + WOW = 22,
> + MAX_FEATURE_SUPPORTED = 128,
> +};
> +
> +struct wcn36xx_hal_feat_caps_msg {
> +
> + struct wcn36xx_hal_msg_header header;
> +
> + u32 feat_caps[4];
> +} __packed;
> +
> +/* status codes to help debug rekey failures */
> +enum gtk_rekey_status {
> + WCN36XX_HAL_GTK_REKEY_STATUS_SUCCESS = 0,
> +
> + /* rekey detected, but not handled */
> + WCN36XX_HAL_GTK_REKEY_STATUS_NOT_HANDLED = 1,
> +
> + /* MIC check error on M1 */
> + WCN36XX_HAL_GTK_REKEY_STATUS_MIC_ERROR = 2,
> +
> + /* decryption error on M1 */
> + WCN36XX_HAL_GTK_REKEY_STATUS_DECRYPT_ERROR = 3,
> +
> + /* M1 replay detected */
> + WCN36XX_HAL_GTK_REKEY_STATUS_REPLAY_ERROR = 4,
> +
> + /* missing GTK key descriptor in M1 */
> + WCN36XX_HAL_GTK_REKEY_STATUS_MISSING_KDE = 5,
> +
> + /* missing iGTK key descriptor in M1 */
> + WCN36XX_HAL_GTK_REKEY_STATUS_MISSING_IGTK_KDE = 6,
> +
> + /* key installation error */
> + WCN36XX_HAL_GTK_REKEY_STATUS_INSTALL_ERROR = 7,
> +
> + /* iGTK key installation error */
> + WCN36XX_HAL_GTK_REKEY_STATUS_IGTK_INSTALL_ERROR = 8,
> +
> + /* GTK rekey M2 response TX error */
> + WCN36XX_HAL_GTK_REKEY_STATUS_RESP_TX_ERROR = 9,
> +
> + /* non-specific general error */
> + WCN36XX_HAL_GTK_REKEY_STATUS_GEN_ERROR = 255
> +};
> +
> +/* wake reason types */
> +enum wake_reason_type {
> + WCN36XX_HAL_WAKE_REASON_NONE = 0,
> +
> + /* magic packet match */
> + WCN36XX_HAL_WAKE_REASON_MAGIC_PACKET = 1,
> +
> + /* host defined pattern match */
> + WCN36XX_HAL_WAKE_REASON_PATTERN_MATCH = 2,
> +
> + /* EAP-ID frame detected */
> + WCN36XX_HAL_WAKE_REASON_EAPID_PACKET = 3,
> +
> + /* start of EAPOL 4-way handshake detected */
> + WCN36XX_HAL_WAKE_REASON_EAPOL4WAY_PACKET = 4,
> +
> + /* network scan offload match */
> + WCN36XX_HAL_WAKE_REASON_NETSCAN_OFFL_MATCH = 5,
> +
> + /* GTK rekey status wakeup (see status) */
> + WCN36XX_HAL_WAKE_REASON_GTK_REKEY_STATUS = 6,
> +
> + /* BSS connection lost */
> + WCN36XX_HAL_WAKE_REASON_BSS_CONN_LOST = 7,
> +};
> +
> +/*
> + Wake Packet which is saved at tWakeReasonParams.DataStart
> + This data is sent for any wake reasons that involve a packet-based wakeup :
> +
> + WCN36XX_HAL_WAKE_REASON_TYPE_MAGIC_PACKET
> + WCN36XX_HAL_WAKE_REASON_TYPE_PATTERN_MATCH
> + WCN36XX_HAL_WAKE_REASON_TYPE_EAPID_PACKET
> + WCN36XX_HAL_WAKE_REASON_TYPE_EAPOL4WAY_PACKET
> + WCN36XX_HAL_WAKE_REASON_TYPE_GTK_REKEY_STATUS
> +
> + The information is provided to the host for auditing and debug purposes
> +
> +*/
> +
> +/* Wake reason indication */
> +struct wcn36xx_hal_wake_reason_ind {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* see tWakeReasonType */
> + u32 reason;
> +
> + /* argument specific to the reason type */
> + u32 reason_arg;
> +
> + /* length of optional data stored in this message, in case HAL
> + * truncates the data (i.e. data packets) this length will be less
> + * than the actual length */
> + u32 stored_data_len;
> +
> + /* actual length of data */
> + u32 actual_data_len;
> +
> + /* variable length start of data (length == storedDataLen) see
> + * specific wake type */
> + u8 data_start[1];
> +
> + u32 bss_index:8;
> + u32 reserved:24;
> +};
> +
> +#define WCN36XX_HAL_GTK_KEK_BYTES 16
> +#define WCN36XX_HAL_GTK_KCK_BYTES 16
> +
> +#define WCN36XX_HAL_GTK_OFFLOAD_FLAGS_DISABLE (1 << 0)
> +
> +#define GTK_SET_BSS_KEY_TAG 0x1234AA55
> +
> +struct wcn36xx_hal_gtk_offload_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* optional flags */
> + u32 flags;
> +
> + /* Key confirmation key */
> + u8 kck[WCN36XX_HAL_GTK_KCK_BYTES];
> +
> + /* key encryption key */
> + u8 kek[WCN36XX_HAL_GTK_KEK_BYTES];
> +
> + /* replay counter */
> + u64 key_replay_counter;
> +
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_gtk_offload_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_gtk_offload_get_info_req_msg {
> + struct wcn36xx_hal_msg_header header;
> + u8 bss_index;
> +};
> +
> +struct wcn36xx_hal_gtk_offload_get_info_rsp_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +
> + /* last rekey status when the rekey was offloaded */
> + u32 last_rekey_status;
> +
> + /* current replay counter value */
> + u64 key_replay_counter;
> +
> + /* total rekey attempts */
> + u32 total_rekey_count;
> +
> + /* successful GTK rekeys */
> + u32 gtk_rekey_count;
> +
> + /* successful iGTK rekeys */
> + u32 igtk_rekey_count;
> +
> + u8 bss_index;
> +};
> +
> +struct dhcp_info {
> + /* Indicates the device mode which indicates about the DHCP activity */
> + u8 device_mode;
> +
> + u8 addr[ETH_ALEN];
> +};
> +
> +struct dhcp_ind_status {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* success or failure */
> + u32 status;
> +};
> +
> +/*
> + * Thermal Mitigation mode of operation.
> + *
> + * WCN36XX_HAL_THERMAL_MITIGATION_MODE_0 - Based on AMPDU disabling aggregation
> + *
> + * WCN36XX_HAL_THERMAL_MITIGATION_MODE_1 - Based on AMPDU disabling aggregation
> + * and reducing transmit power
> + *
> + * WCN36XX_HAL_THERMAL_MITIGATION_MODE_2 - Not supported */
> +enum wcn36xx_hal_thermal_mitigation_mode_type {
> + HAL_THERMAL_MITIGATION_MODE_INVALID = -1,
> + HAL_THERMAL_MITIGATION_MODE_0,
> + HAL_THERMAL_MITIGATION_MODE_1,
> + HAL_THERMAL_MITIGATION_MODE_2,
> + HAL_THERMAL_MITIGATION_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
> +};
> +
> +
> +/*
> + * Thermal Mitigation level.
> + * Note the levels are incremental i.e WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_2 =
> + * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_0 +
> + * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_1
> + *
> + * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_0 - lowest level of thermal mitigation.
> + * This level indicates normal mode of operation
> + *
> + * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_1 - 1st level of thermal mitigation
> + *
> + * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_2 - 2nd level of thermal mitigation
> + *
> + * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_3 - 3rd level of thermal mitigation
> + *
> + * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_4 - 4th level of thermal mitigation
> + */
> +enum wcn36xx_hal_thermal_mitigation_level_type {
> + HAL_THERMAL_MITIGATION_LEVEL_INVALID = -1,
> + HAL_THERMAL_MITIGATION_LEVEL_0,
> + HAL_THERMAL_MITIGATION_LEVEL_1,
> + HAL_THERMAL_MITIGATION_LEVEL_2,
> + HAL_THERMAL_MITIGATION_LEVEL_3,
> + HAL_THERMAL_MITIGATION_LEVEL_4,
> + HAL_THERMAL_MITIGATION_LEVEL_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
> +};
> +
> +
> +/* WCN36XX_HAL_SET_THERMAL_MITIGATION_REQ */
> +struct set_thermal_mitigation_req_msg {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Thermal Mitigation Operation Mode */
> + enum wcn36xx_hal_thermal_mitigation_mode_type mode;
> +
> + /* Thermal Mitigation Level */
> + enum wcn36xx_hal_thermal_mitigation_level_type level;
> +};
> +
> +struct set_thermal_mitigation_resp {
> +
> + struct wcn36xx_hal_msg_header header;
> +
> + /* status of the request */
> + u32 status;
> +};
> +
> +/* Per STA Class B Statistics. Class B statistics are STA TX/RX stats
> + * provided to FW from Host via periodic messages */
> +struct stats_class_b_ind {
> + struct wcn36xx_hal_msg_header header;
> +
> + /* Duration over which this stats was collected */
> + u32 duration;
> +
> + /* Per STA Stats */
> +
> + /* TX stats */
> + u32 tx_bytes_pushed;
> + u32 tx_packets_pushed;
> +
> + /* RX stats */
> + u32 rx_bytes_rcvd;
> + u32 rx_packets_rcvd;
> + u32 rx_time_total;
> +};
> +
> +#endif /* _HAL_H_ */
> diff --git a/drivers/net/wireless/ath/wcn36xx/main.c b/drivers/net/wireless/ath/wcn36xx/main.c
> new file mode 100644
> index 0000000..727270d
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/main.c
> @@ -0,0 +1,1029 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> +
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include "wcn36xx.h"
> +
> +unsigned int debug_mask;
> +module_param(debug_mask, uint, 0644);
> +MODULE_PARM_DESC(debug_mask, "Debugging mask");
> +
> +#define CHAN2G(_freq, _idx) { \
> + .band = IEEE80211_BAND_2GHZ, \
> + .center_freq = (_freq), \
> + .hw_value = (_idx), \
> + .max_power = 25, \
> +}
> +
> +#define CHAN5G(_freq, _idx) { \
> + .band = IEEE80211_BAND_5GHZ, \
> + .center_freq = (_freq), \
> + .hw_value = (_idx), \
> + .max_power = 25, \
> +}
> +
> +/* The wcn firmware expects channel values to matching
> + * their mnemonic values. So use these for .hw_value. */
> +static struct ieee80211_channel wcn_2ghz_channels[] = {
> + CHAN2G(2412, 1), /* Channel 1 */
> + CHAN2G(2417, 2), /* Channel 2 */
> + CHAN2G(2422, 3), /* Channel 3 */
> + CHAN2G(2427, 4), /* Channel 4 */
> + CHAN2G(2432, 5), /* Channel 5 */
> + CHAN2G(2437, 6), /* Channel 6 */
> + CHAN2G(2442, 7), /* Channel 7 */
> + CHAN2G(2447, 8), /* Channel 8 */
> + CHAN2G(2452, 9), /* Channel 9 */
> + CHAN2G(2457, 10), /* Channel 10 */
> + CHAN2G(2462, 11), /* Channel 11 */
> + CHAN2G(2467, 12), /* Channel 12 */
> + CHAN2G(2472, 13), /* Channel 13 */
> + CHAN2G(2484, 14) /* Channel 14 */
> +
> +};
> +
> +static struct ieee80211_channel wcn_5ghz_channels[] = {
> + CHAN5G(5180, 36),
> + CHAN5G(5200, 40),
> + CHAN5G(5220, 44),
> + CHAN5G(5240, 48),
> + CHAN5G(5260, 52),
> + CHAN5G(5280, 56),
> + CHAN5G(5300, 60),
> + CHAN5G(5320, 64),
> + CHAN5G(5500, 100),
> + CHAN5G(5520, 104),
> + CHAN5G(5540, 108),
> + CHAN5G(5560, 112),
> + CHAN5G(5580, 116),
> + CHAN5G(5600, 120),
> + CHAN5G(5620, 124),
> + CHAN5G(5640, 128),
> + CHAN5G(5660, 132),
> + CHAN5G(5700, 140),
> + CHAN5G(5745, 149),
> + CHAN5G(5765, 153),
> + CHAN5G(5785, 157),
> + CHAN5G(5805, 161),
> + CHAN5G(5825, 165)
> +};
> +
> +#define RATE(_bitrate, _hw_rate, _flags) { \
> + .bitrate = (_bitrate), \
> + .flags = (_flags), \
> + .hw_value = (_hw_rate), \
> + .hw_value_short = (_hw_rate) \
> +}
> +
> +static struct ieee80211_rate wcn_2ghz_rates[] = {
> + RATE(10, HW_RATE_INDEX_1MBPS, 0),
> + RATE(20, HW_RATE_INDEX_2MBPS, IEEE80211_RATE_SHORT_PREAMBLE),
> + RATE(55, HW_RATE_INDEX_5_5MBPS, IEEE80211_RATE_SHORT_PREAMBLE),
> + RATE(110, HW_RATE_INDEX_11MBPS, IEEE80211_RATE_SHORT_PREAMBLE),
> + RATE(60, HW_RATE_INDEX_6MBPS, 0),
> + RATE(90, HW_RATE_INDEX_9MBPS, 0),
> + RATE(120, HW_RATE_INDEX_12MBPS, 0),
> + RATE(180, HW_RATE_INDEX_18MBPS, 0),
> + RATE(240, HW_RATE_INDEX_24MBPS, 0),
> + RATE(360, HW_RATE_INDEX_36MBPS, 0),
> + RATE(480, HW_RATE_INDEX_48MBPS, 0),
> + RATE(540, HW_RATE_INDEX_54MBPS, 0)
> +};
> +
> +static struct ieee80211_rate wcn_5ghz_rates[] = {
> + RATE(60, HW_RATE_INDEX_6MBPS, 0),
> + RATE(90, HW_RATE_INDEX_9MBPS, 0),
> + RATE(120, HW_RATE_INDEX_12MBPS, 0),
> + RATE(180, HW_RATE_INDEX_18MBPS, 0),
> + RATE(240, HW_RATE_INDEX_24MBPS, 0),
> + RATE(360, HW_RATE_INDEX_36MBPS, 0),
> + RATE(480, HW_RATE_INDEX_48MBPS, 0),
> + RATE(540, HW_RATE_INDEX_54MBPS, 0)
> +};
> +
> +static struct ieee80211_supported_band wcn_band_2ghz = {
> + .channels = wcn_2ghz_channels,
> + .n_channels = ARRAY_SIZE(wcn_2ghz_channels),
> + .bitrates = wcn_2ghz_rates,
> + .n_bitrates = ARRAY_SIZE(wcn_2ghz_rates),
> + .ht_cap = {
> + .cap = IEEE80211_HT_CAP_GRN_FLD |
> + IEEE80211_HT_CAP_SGI_20 |
> + IEEE80211_HT_CAP_DSSSCCK40 |
> + IEEE80211_HT_CAP_LSIG_TXOP_PROT,
> + .ht_supported = true,
> + .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K,
> + .ampdu_density = IEEE80211_HT_MPDU_DENSITY_16,
> + .mcs = {
> + .rx_mask = { 0xff, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
> + .rx_highest = cpu_to_le16(72),
> + .tx_params = IEEE80211_HT_MCS_TX_DEFINED,
> + }
> + }
> +};
> +
> +static struct ieee80211_supported_band wcn_band_5ghz = {
> + .channels = wcn_5ghz_channels,
> + .n_channels = ARRAY_SIZE(wcn_5ghz_channels),
> + .bitrates = wcn_5ghz_rates,
> + .n_bitrates = ARRAY_SIZE(wcn_5ghz_rates),
> + .ht_cap = {
> + .cap = IEEE80211_HT_CAP_GRN_FLD |
> + IEEE80211_HT_CAP_SGI_20 |
> + IEEE80211_HT_CAP_DSSSCCK40 |
> + IEEE80211_HT_CAP_LSIG_TXOP_PROT |
> + IEEE80211_HT_CAP_SGI_40 |
> + IEEE80211_HT_CAP_SUP_WIDTH_20_40,
> + .ht_supported = true,
> + .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K,
> + .ampdu_density = IEEE80211_HT_MPDU_DENSITY_16,
> + .mcs = {
> + .rx_mask = { 0xff, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
> + .rx_highest = cpu_to_le16(72),
> + .tx_params = IEEE80211_HT_MCS_TX_DEFINED,
> + }
> + }
> +};
> +
> +#ifdef CONFIG_PM
> +
> +static const struct wiphy_wowlan_support wowlan_support = {
> + .flags = WIPHY_WOWLAN_ANY
> +};
> +
> +#endif
> +
> +static inline u8 get_sta_index(struct ieee80211_vif *vif,
> + struct wcn36xx_sta *sta_priv)
> +{
> + return NL80211_IFTYPE_STATION == vif->type ?
> + sta_priv->bss_sta_index :
> + sta_priv->sta_index;
> +}
> +
> +static int wcn36xx_start(struct ieee80211_hw *hw)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + int ret;
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac start\n");
> +
> + /* SMD initialization */
> + ret = wcn36xx_smd_open(wcn);
> + if (ret) {
> + wcn36xx_err("Failed to open smd channel: %d\n", ret);
> + goto out_err;
> + }
> +
> + /* Allocate memory pools for Mgmt BD headers and Data BD headers */
> + ret = wcn36xx_dxe_allocate_mem_pools(wcn);
> + if (ret) {
> + wcn36xx_err("Failed to alloc DXE mempool: %d\n", ret);
> + goto out_smd_close;
> + }
> +
> + ret = wcn36xx_dxe_alloc_ctl_blks(wcn);
> + if (ret) {
> + wcn36xx_err("Failed to alloc DXE ctl blocks: %d\n", ret);
> + goto out_free_dxe_pool;
> + }
> +
> + /* Maximum SMD message size is 4k */
> + wcn->smd_buf = kmalloc(WCN36XX_SMD_BUF_SIZE, GFP_KERNEL);
> + if (!wcn->smd_buf) {
> + wcn36xx_err("Failed to allocate smd buf\n");
> + ret = -ENOMEM;
> + goto out_free_dxe_ctl;
> + }
> +
> + ret = wcn36xx_smd_load_nv(wcn);
> + if (ret) {
> + wcn36xx_err("Failed to push NV to chip\n");
> + goto out_free_smd_buf;
> + }
> +
> + ret = wcn36xx_smd_start(wcn);
> + if (ret) {
> + wcn36xx_err("Failed to start chip\n");
> + goto out_free_smd_buf;
> + }
> +
> + /* DMA channel initialization */
> + ret = wcn36xx_dxe_init(wcn);
> + if (ret) {
> + wcn36xx_err("DXE init failed\n");
> + goto out_smd_stop;
> + }
> +
> + wcn36xx_pmc_init(wcn);
> + wcn36xx_debugfs_init(wcn);
> +
> + if (!wcn36xx_is_fw_version(wcn, 1, 2, 2, 24)) {
> + ret = wcn36xx_smd_feature_caps_exchange(wcn);
> + if (ret)
> + wcn36xx_warn("Exchange feature caps failed\n");
> + }
> +
> + return 0;
> +
> +out_smd_stop:
> + wcn36xx_smd_stop(wcn);
> +out_free_smd_buf:
> + kfree(wcn->smd_buf);
> +out_free_dxe_pool:
> + wcn36xx_dxe_free_mem_pools(wcn);
> +out_free_dxe_ctl:
> + wcn36xx_dxe_free_ctl_blks(wcn);
> +out_smd_close:
> + wcn36xx_smd_close(wcn);
> +out_err:
> + return ret;
> +}
> +
> +static void wcn36xx_stop(struct ieee80211_hw *hw)
> +{
> + struct wcn36xx *wcn = hw->priv;
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac stop\n");
> +
> + wcn36xx_debugfs_exit(wcn);
> + wcn36xx_smd_stop(wcn);
> + wcn36xx_dxe_deinit(wcn);
> + wcn36xx_smd_close(wcn);
> +
> + wcn36xx_dxe_free_mem_pools(wcn);
> + wcn36xx_dxe_free_ctl_blks(wcn);
> +
> + kfree(wcn->smd_buf);
> +}
> +
> +static int wcn36xx_config(struct ieee80211_hw *hw, u32 changed)
> +{
> + struct wcn36xx *wcn = hw->priv;
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac config changed 0x%08x\n", changed);
> +
> + if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
> + int ch = WCN36XX_HW_CHANNEL(wcn);
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "wcn36xx_config channel switch=%d\n",
> + ch);
> + wcn36xx_smd_switch_channel(wcn, ch);
> + }
> +
> + return 0;
> +}
> +
> +#define WCN36XX_SUPPORTED_FILTERS (0)
> +
> +static void wcn36xx_configure_filter(struct ieee80211_hw *hw,
> + unsigned int changed,
> + unsigned int *total, u64 multicast)
> +{
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac configure filter\n");
> +
> + *total &= WCN36XX_SUPPORTED_FILTERS;
> +}
> +
> +static void wcn36xx_tx(struct ieee80211_hw *hw,
> + struct ieee80211_tx_control *control,
> + struct sk_buff *skb)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + struct wcn36xx_sta *sta_priv = NULL;
> +
> + if (control->sta)
> + sta_priv = (struct wcn36xx_sta *)control->sta->drv_priv;
> +
> + if (wcn36xx_start_tx(wcn, sta_priv, skb))
> + ieee80211_free_txskb(wcn->hw, skb);
> +}
> +
> +static int wcn36xx_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
> + struct ieee80211_vif *vif,
> + struct ieee80211_sta *sta,
> + struct ieee80211_key_conf *key_conf)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + struct wcn36xx_sta *sta_priv = NULL;
> + int ret = 0;
> + u8 key[WLAN_MAX_KEY_LEN];
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac80211 set key\n");
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "Key: cmd=0x%x algo:0x%x, id:%d, len:%d flags 0x%x\n",
> + cmd, key_conf->cipher, key_conf->keyidx,
> + key_conf->keylen, key_conf->flags);
> + wcn36xx_dbg_dump(WCN36XX_DBG_MAC, "KEY: ",
> + key_conf->key,
> + key_conf->keylen);
> + sta_priv = sta ? (struct wcn36xx_sta *)sta->drv_priv : wcn->sta;
> +
> + switch (key_conf->cipher) {
> + case WLAN_CIPHER_SUITE_WEP40:
> + wcn->encrypt_type = WCN36XX_HAL_ED_WEP40;
> + break;
> + case WLAN_CIPHER_SUITE_WEP104:
> + wcn->encrypt_type = WCN36XX_HAL_ED_WEP40;
> + break;
> + case WLAN_CIPHER_SUITE_CCMP:
> + wcn->encrypt_type = WCN36XX_HAL_ED_CCMP;
> + break;
> + case WLAN_CIPHER_SUITE_TKIP:
> + wcn->encrypt_type = WCN36XX_HAL_ED_TKIP;
> + break;
> + default:
> + wcn36xx_err("Unsupported key type 0x%x\n",
> + key_conf->cipher);
> + ret = -EOPNOTSUPP;
> + goto out;
> + }
> +
> + switch (cmd) {
> + case SET_KEY:
> + if (WCN36XX_HAL_ED_TKIP == wcn->encrypt_type) {
> + /*
> + * Supplicant is sending key in the wrong order:
> + * Temporal Key (16 b) - TX MIC (8 b) - RX MIC (8 b)
> + * but HW expects it to be in the order as described in
> + * IEEE 802.11 spec (see chapter 11.7) like this:
> + * Temporal Key (16 b) - RX MIC (8 b) - TX MIC (8 b)
> + */
> + memcpy(key, key_conf->key, 16);
> + memcpy(key + 16, key_conf->key + 24, 8);
> + memcpy(key + 24, key_conf->key + 16, 8);
> + } else {
> + memcpy(key, key_conf->key, key_conf->keylen);
> + }
> +
> + if (IEEE80211_KEY_FLAG_PAIRWISE & key_conf->flags) {
> + sta_priv->is_data_encrypted = true;
> + /* Reconfigure bss with encrypt_type */
> + if (NL80211_IFTYPE_STATION == vif->type)
> + wcn36xx_smd_config_bss(wcn,
> + vif,
> + sta,
> + sta->addr,
> + true);
> +
> + wcn36xx_smd_set_stakey(wcn,
> + wcn->encrypt_type,
> + key_conf->keyidx,
> + key_conf->keylen,
> + key,
> + get_sta_index(vif, sta_priv));
> + } else {
> + wcn36xx_smd_set_bsskey(wcn,
> + wcn->encrypt_type,
> + key_conf->keyidx,
> + key_conf->keylen,
> + key);
> + if ((WLAN_CIPHER_SUITE_WEP40 == key_conf->cipher) ||
> + (WLAN_CIPHER_SUITE_WEP104 == key_conf->cipher)) {
> + sta_priv->is_data_encrypted = true;
> + wcn36xx_smd_set_stakey(wcn,
> + wcn->encrypt_type,
> + key_conf->keyidx,
> + key_conf->keylen,
> + key,
> + get_sta_index(vif, sta_priv));
> + }
> + }
> + break;
> + case DISABLE_KEY:
> + if (!(IEEE80211_KEY_FLAG_PAIRWISE & key_conf->flags)) {
> + wcn36xx_smd_remove_bsskey(wcn,
> + wcn->encrypt_type,
> + key_conf->keyidx);
> + } else {
> + sta_priv->is_data_encrypted = false;
> + /* do not remove key if disassociated */
> + if (wcn->aid)
> + wcn36xx_smd_remove_stakey(wcn,
> + wcn->encrypt_type,
> + key_conf->keyidx,
> + get_sta_index(vif, sta_priv));
> + }
> + break;
> + default:
> + wcn36xx_err("Unsupported key cmd 0x%x\n", cmd);
> + ret = -EOPNOTSUPP;
> + goto out;
> + break;
> + }
> +
> +out:
> + return ret;
> +}
> +
> +static void wcn36xx_sw_scan_start(struct ieee80211_hw *hw)
> +{
> + struct wcn36xx *wcn = hw->priv;
> +
> + wcn36xx_smd_init_scan(wcn);
> + wcn36xx_smd_start_scan(wcn);
> +}
> +
> +static void wcn36xx_sw_scan_complete(struct ieee80211_hw *hw)
> +{
> + struct wcn36xx *wcn = hw->priv;
> +
> + wcn36xx_smd_end_scan(wcn);
> + wcn36xx_smd_finish_scan(wcn);
> +}
> +
> +static void wcn36xx_update_allowed_rates(struct wcn36xx *wcn,
> + struct ieee80211_sta *sta)
> +{
> + int i, size;
> + u16 *rates_table;
> + u32 rates = sta->supp_rates[wcn->hw->conf.chandef.chan->band];
> +
> + memset(&wcn->supported_rates, 0, sizeof(wcn->supported_rates));
> + wcn->supported_rates.op_rate_mode = STA_11n;
> +
> + size = ARRAY_SIZE(wcn->supported_rates.dsss_rates);
> + rates_table = wcn->supported_rates.dsss_rates;
> + if (wcn->hw->conf.chandef.chan->band == IEEE80211_BAND_2GHZ) {
> + for (i = 0; i < size; i++) {
> + if (rates & 0x01) {
> + rates_table[i] = wcn_2ghz_rates[i].hw_value;
> + rates = rates >> 1;
> + }
> + }
> + }
> +
> + size = ARRAY_SIZE(wcn->supported_rates.ofdm_rates);
> + rates_table = wcn->supported_rates.ofdm_rates;
> + for (i = 0; i < size; i++) {
> + if (rates & 0x01) {
> + rates_table[i] = wcn_5ghz_rates[i].hw_value;
> + rates = rates >> 1;
> + }
> + }
> +
> + if (sta->ht_cap.ht_supported) {
> + memcpy(wcn->supported_rates.supported_mcs_set,
> + sta->ht_cap.mcs.rx_mask,
> + sizeof(sta->ht_cap.mcs.rx_mask));
> + BUILD_BUG_ON(sizeof(sta->ht_cap.mcs.rx_mask) >
> + sizeof(wcn->supported_rates.supported_mcs_set));
> + }
> +}
> +
> +static void wcn36xx_bss_info_changed(struct ieee80211_hw *hw,
> + struct ieee80211_vif *vif,
> + struct ieee80211_bss_conf *bss_conf,
> + u32 changed)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + struct sk_buff *skb = NULL;
> + u16 tim_off, tim_len;
> + enum wcn36xx_hal_link_state link_state;
> +
> + wcn->current_vif = (struct wcn36xx_vif *)vif->drv_priv;
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac bss info changed vif %p changed 0x%08x\n",
> + vif, changed);
> +
> + if (changed & BSS_CHANGED_BEACON_INFO) {
> + wcn36xx_dbg(WCN36XX_DBG_MAC,
> + "mac bss changed dtim period %d\n",
> + bss_conf->dtim_period);
> +
> + wcn->dtim_period = bss_conf->dtim_period;
> + }
> +
> + if (changed & BSS_CHANGED_BSSID) {
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac bss changed_bssid %pM\n",
> + bss_conf->bssid);
> +
> + if (!is_zero_ether_addr(bss_conf->bssid)) {
> + wcn->is_joining = true;
> + wcn->current_vif->bss_index = 0xff;
> + wcn36xx_smd_join(wcn, bss_conf->bssid,
> + vif->addr, WCN36XX_HW_CHANNEL(wcn));
> + wcn36xx_smd_config_bss(wcn, vif, NULL,
> + bss_conf->bssid, false);
> + } else {
> + wcn->is_joining = false;
> + wcn36xx_smd_delete_bss(wcn);
> + }
> + }
> +
> + if (changed & BSS_CHANGED_SSID) {
> + wcn36xx_dbg(WCN36XX_DBG_MAC,
> + "mac bss changed ssid\n");
> + wcn36xx_dbg_dump(WCN36XX_DBG_MAC, "ssid ",
> + bss_conf->ssid, bss_conf->ssid_len);
> +
> + wcn->ssid.length = bss_conf->ssid_len;
> + memcpy(&wcn->ssid.ssid, bss_conf->ssid, bss_conf->ssid_len);
> + }
> +
> + if (changed & BSS_CHANGED_ASSOC) {
> + wcn->is_joining = false;
> + if (bss_conf->assoc) {
> + struct ieee80211_sta *sta;
> + struct wcn36xx_sta *sta_priv;
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC,
> + "mac assoc bss %pM vif %pM AID=%d\n",
> + bss_conf->bssid,
> + vif->addr,
> + bss_conf->aid);
> +
> + wcn->aid = bss_conf->aid;
> +
> + rcu_read_lock();
> + sta = ieee80211_find_sta(vif, bss_conf->bssid);
> + if (!sta) {
> + wcn36xx_err("sta %pM is not found\n",
> + bss_conf->bssid);
> + rcu_read_unlock();
> + goto out;
> + }
> + sta_priv = (struct wcn36xx_sta *)sta->drv_priv;
> +
> + wcn36xx_update_allowed_rates(wcn, sta);
> +
> + wcn36xx_smd_set_link_st(wcn, bss_conf->bssid,
> + vif->addr,
> + WCN36XX_HAL_LINK_POSTASSOC_STATE);
> + wcn->sta = sta_priv;
> + wcn36xx_smd_config_bss(wcn, vif, sta,
> + bss_conf->bssid,
> + true);
> + rcu_read_unlock();
> + } else {
> + wcn36xx_dbg(WCN36XX_DBG_MAC,
> + "disassociated bss %pM vif %pM AID=%d\n",
> + bss_conf->bssid,
> + vif->addr,
> + bss_conf->aid);
> + wcn->aid = 0;
> + wcn36xx_smd_set_link_st(wcn,
> + bss_conf->bssid,
> + vif->addr,
> + WCN36XX_HAL_LINK_IDLE_STATE);
> + }
> + }
> +
> + if (changed & BSS_CHANGED_AP_PROBE_RESP) {
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac bss changed ap probe resp\n");
> + skb = ieee80211_proberesp_get(hw, vif);
> + if (!skb) {
> + wcn36xx_err("failed to alloc probereq skb\n");
> + goto out;
> + }
> +
> + wcn36xx_smd_update_proberesp_tmpl(wcn, skb);
> + dev_kfree_skb(skb);
> + }
> +
> + if (changed & BSS_CHANGED_BEACON_ENABLED) {
> + wcn36xx_dbg(WCN36XX_DBG_MAC,
> + "mac bss changed beacon enabled %d\n",
> + bss_conf->enable_beacon);
> +
> + if (bss_conf->enable_beacon) {
> + wcn->current_vif->bss_index = 0xff;
> + wcn36xx_smd_config_bss(wcn, vif, NULL,
> + wcn->addresses.addr, false);
> + skb = ieee80211_beacon_get_tim(hw, vif, &tim_off,
> + &tim_len);
> + if (!skb) {
> + wcn36xx_err("failed to alloc beacon skb\n");
> + goto out;
> + }
> + wcn36xx_smd_send_beacon(wcn, skb, tim_off, 0);
> + dev_kfree_skb(skb);
> +
> + if (vif->type == NL80211_IFTYPE_ADHOC ||
> + vif->type == NL80211_IFTYPE_MESH_POINT)
> + link_state = WCN36XX_HAL_LINK_IBSS_STATE;
> + else
> + link_state = WCN36XX_HAL_LINK_AP_STATE;
> +
> + wcn36xx_smd_set_link_st(wcn, vif->addr, vif->addr,
> + link_state);
> + } else {
> + wcn36xx_smd_set_link_st(wcn, vif->addr, vif->addr,
> + WCN36XX_HAL_LINK_IDLE_STATE);
> + wcn36xx_smd_delete_bss(wcn);
> + }
> + }
> +out:
> + return;
> +}
> +
> +/* this is required when using IEEE80211_HW_HAS_RATE_CONTROL */
> +static int wcn36xx_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac set RTS threshold %d\n", value);
> +
> + wcn36xx_smd_update_cfg(wcn, WCN36XX_HAL_CFG_RTS_THRESHOLD, value);
> + return 0;
> +}
> +
> +static void wcn36xx_remove_interface(struct ieee80211_hw *hw,
> + struct ieee80211_vif *vif)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac remove interface vif %p\n", vif);
> + wcn36xx_smd_delete_sta_self(wcn, vif->addr);
> +}
> +
> +static int wcn36xx_add_interface(struct ieee80211_hw *hw,
> + struct ieee80211_vif *vif)
> +{
> + struct wcn36xx *wcn = hw->priv;
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac add interface vif %p type %d\n",
> + vif, vif->type);
> +
> + wcn->current_vif = (struct wcn36xx_vif *)vif->drv_priv;
> +
> + if (!(NL80211_IFTYPE_STATION == vif->type ||
> + NL80211_IFTYPE_AP == vif->type ||
> + NL80211_IFTYPE_ADHOC == vif->type ||
> + NL80211_IFTYPE_MESH_POINT == vif->type)) {
> + wcn36xx_warn("Unsupported interface type requested: %d\n",
> + vif->type);
> + return -EOPNOTSUPP;
> + }
> +
> + wcn36xx_smd_add_sta_self(wcn, vif->addr);
> +
> + return 0;
> +}
> +
> +static int wcn36xx_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
> + struct ieee80211_sta *sta)
> +{
> + struct wcn36xx *wcn = hw->priv;
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac sta add vif %p sta %pM\n",
> + vif, sta->addr);
> +
> + wcn->sta = (struct wcn36xx_sta *)sta->drv_priv;
> + wcn->aid = sta->aid;
> + wcn36xx_smd_config_sta(wcn, vif, sta);
> +
> + return 0;
> +}
> +
> +static int wcn36xx_sta_remove(struct ieee80211_hw *hw,
> + struct ieee80211_vif *vif,
> + struct ieee80211_sta *sta)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + struct wcn36xx_sta *sta_priv = (struct wcn36xx_sta *)sta->drv_priv;
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac sta remove vif %p sta %pM index %d\n",
> + vif, sta->addr, sta_priv->sta_index);
> +
> + wcn36xx_smd_delete_sta(wcn, sta_priv->sta_index);
> +
> + return 0;
> +}
> +
> +#ifdef CONFIG_PM
> +
> +static int wcn36xx_suspend(struct ieee80211_hw *hw, struct cfg80211_wowlan *wow)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
> + struct ieee80211_vif,
> + drv_priv);
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac suspend\n");
> +
> + mutex_lock(&wcn->pm_mutex);
> +
> + /* Enter BMPS only in connected state */
> + if ((wcn->aid > 0) &&
> + (wcn->pw_state != WCN36XX_BMPS) &&
> + (NL80211_IFTYPE_STATION == vif->type))
> + wcn36xx_pmc_enter_bmps_state(wcn, vif->bss_conf.sync_tsf);
> +
> + wcn->is_suspended = true;
> + wcn->is_con_lost_pending = false;
> +
> + mutex_unlock(&wcn->pm_mutex);
> +
> + return 0;
> +}
> +
> +static int wcn36xx_resume(struct ieee80211_hw *hw)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
> + struct ieee80211_vif,
> + drv_priv);
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac resume\n");
> +
> + wcn->is_suspended = false;
> +
> + if (wcn->pw_state == WCN36XX_BMPS)
> + wcn36xx_pmc_exit_bmps_state(wcn);
> +
> + if (wcn->is_con_lost_pending) {
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "report connection lost\n");
> + ieee80211_connection_loss(vif);
> + }
> +
> + return 0;
> +}
> +
> +#endif
> +
> +static int wcn36xx_ampdu_action(struct ieee80211_hw *hw,
> + struct ieee80211_vif *vif,
> + enum ieee80211_ampdu_mlme_action action,
> + struct ieee80211_sta *sta, u16 tid, u16 *ssn,
> + u8 buf_size)
> +{
> + struct wcn36xx *wcn = hw->priv;
> + struct wcn36xx_sta *sta_priv = NULL;
> +
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "mac ampdu action action %d tid %d\n",
> + action, tid);
> +
> + sta_priv = (struct wcn36xx_sta *)sta->drv_priv;
> +
> + switch (action) {
> + case IEEE80211_AMPDU_RX_START:
> + sta_priv->tid = tid;
> + wcn36xx_smd_add_ba_session(wcn, sta, tid, ssn, 0,
> + get_sta_index(vif, sta_priv));
> + wcn36xx_smd_add_ba(wcn);
> + wcn36xx_smd_trigger_ba(wcn, get_sta_index(vif, sta_priv));
> + ieee80211_start_tx_ba_session(sta, tid, 0);
> + break;
> + case IEEE80211_AMPDU_RX_STOP:
> + wcn36xx_smd_del_ba(wcn, tid, get_sta_index(vif, sta_priv));
> + break;
> + case IEEE80211_AMPDU_TX_START:
> + ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
> + break;
> + case IEEE80211_AMPDU_TX_OPERATIONAL:
> + wcn36xx_smd_add_ba_session(wcn, sta, tid, ssn, 1,
> + get_sta_index(vif, sta_priv));
> + break;
> + case IEEE80211_AMPDU_TX_STOP_FLUSH:
> + case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
> + case IEEE80211_AMPDU_TX_STOP_CONT:
> + ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
> + break;
> + default:
> + wcn36xx_err("Unknown AMPDU action\n");
> + }
> +
> + return 0;
> +}
> +
> +static const struct ieee80211_ops wcn36xx_ops = {
> + .start = wcn36xx_start,
> + .stop = wcn36xx_stop,
> + .add_interface = wcn36xx_add_interface,
> + .remove_interface = wcn36xx_remove_interface,
> +#ifdef CONFIG_PM
> + .suspend = wcn36xx_suspend,
> + .resume = wcn36xx_resume,
> +#endif
> + .config = wcn36xx_config,
> + .configure_filter = wcn36xx_configure_filter,
> + .tx = wcn36xx_tx,
> + .set_key = wcn36xx_set_key,
> + .sw_scan_start = wcn36xx_sw_scan_start,
> + .sw_scan_complete = wcn36xx_sw_scan_complete,
> + .bss_info_changed = wcn36xx_bss_info_changed,
> + .set_rts_threshold = wcn36xx_set_rts_threshold,
> + .sta_add = wcn36xx_sta_add,
> + .sta_remove = wcn36xx_sta_remove,
> + .ampdu_action = wcn36xx_ampdu_action,
> +};
> +
> +static int wcn36xx_init_ieee80211(struct wcn36xx *wcn)
> +{
> + int ret = 0;
> +
> + static const u32 cipher_suites[] = {
> + WLAN_CIPHER_SUITE_WEP40,
> + WLAN_CIPHER_SUITE_WEP104,
> + WLAN_CIPHER_SUITE_TKIP,
> + WLAN_CIPHER_SUITE_CCMP,
> + };
> +
> + wcn->hw->flags = IEEE80211_HW_SIGNAL_DBM |
> + IEEE80211_HW_HAS_RATE_CONTROL |
> + IEEE80211_HW_SUPPORTS_PS |
> + IEEE80211_HW_CONNECTION_MONITOR |
> + IEEE80211_HW_AMPDU_AGGREGATION |
> + IEEE80211_HW_TIMING_BEACON_ONLY;
> +
> + wcn->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
> + BIT(NL80211_IFTYPE_AP) |
> + BIT(NL80211_IFTYPE_ADHOC) |
> + BIT(NL80211_IFTYPE_MESH_POINT);
> +
> + wcn->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wcn_band_2ghz;
> + wcn->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &wcn_band_5ghz;
> +
> + wcn->hw->wiphy->cipher_suites = cipher_suites;
> + wcn->hw->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites);
> +
> + wcn->hw->wiphy->flags |= WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD;
> +
> +#ifdef CONFIG_PM
> + wcn->hw->wiphy->wowlan = &wowlan_support;
> +#endif
> +
> + wcn->hw->wiphy->n_addresses = 1;
> + wcn->hw->wiphy->addresses = &wcn->addresses;
> +
> + wcn->hw->max_listen_interval = 200;
> +
> + wcn->hw->queues = 4;
> +
> + SET_IEEE80211_DEV(wcn->hw, wcn->dev);
> +
> + wcn->hw->sta_data_size = sizeof(struct wcn36xx_sta);
> + wcn->hw->vif_data_size = sizeof(struct wcn36xx_vif);
> +
> + return ret;
> +}
> +
> +static int wcn36xx_platform_get_resources(struct wcn36xx *wcn,
> + struct platform_device *pdev)
> +{
> + struct resource *res;
> + /* Set TX IRQ */
> + res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
> + "wcnss_wlantx_irq");
> + if (!res) {
> + wcn36xx_err("failed to get tx_irq\n");
> + return -ENOENT;
> + }
> + wcn->tx_irq = res->start;
> +
> + /* Set RX IRQ */
> + res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
> + "wcnss_wlanrx_irq");
> + if (!res) {
> + wcn36xx_err("failed to get rx_irq\n");
> + return -ENOENT;
> + }
> + wcn->rx_irq = res->start;
> +
> + /* Map the memory */
> + res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
> + "wcnss_mmio");
> + if (!res) {
> + wcn36xx_err("failed to get mmio\n");
> + return -ENOENT;
> + }
> + wcn->mmio = ioremap(res->start, resource_size(res));
> + if (!wcn->mmio) {
> + wcn36xx_err("failed to map io memory\n");
> + return -ENOMEM;
> + }
> + return 0;
> +}
> +
> +static int wcn36xx_probe(struct platform_device *pdev)
> +{
> + struct ieee80211_hw *hw;
> + struct wcn36xx *wcn;
> + int ret;
> + u16 ofdm_rates[WCN36XX_HAL_NUM_OFDM_RATES] = {
> + HW_RATE_INDEX_6MBPS,
> + HW_RATE_INDEX_9MBPS,
> + HW_RATE_INDEX_12MBPS,
> + HW_RATE_INDEX_18MBPS,
> + HW_RATE_INDEX_24MBPS,
> + HW_RATE_INDEX_36MBPS,
> + HW_RATE_INDEX_48MBPS,
> + HW_RATE_INDEX_54MBPS
> + };
> + u16 dsss_rates[WCN36XX_HAL_NUM_DSSS_RATES] = {
> + HW_RATE_INDEX_1MBPS,
> + HW_RATE_INDEX_2MBPS,
> + HW_RATE_INDEX_5_5MBPS,
> + HW_RATE_INDEX_11MBPS
> + };
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "platform probe\n");
> +
> + hw = ieee80211_alloc_hw(sizeof(struct wcn36xx), &wcn36xx_ops);
> + if (!hw) {
> + wcn36xx_err("failed to alloc hw\n");
> + ret = -ENOMEM;
> + goto out_err;
> + }
> + platform_set_drvdata(pdev, hw);
> + wcn = hw->priv;
> + wcn->hw = hw;
> + wcn->dev = &pdev->dev;
> + wcn->ctrl_ops = pdev->dev.platform_data;
> +
> + mutex_init(&wcn->pm_mutex);
> + mutex_init(&wcn->smd_mutex);
> +
> + /* Configuring supported rates */
> + wcn->supported_rates.op_rate_mode = STA_11n;
> + memcpy(wcn->supported_rates.dsss_rates, dsss_rates,
> + sizeof(*dsss_rates) * WCN36XX_HAL_NUM_DSSS_RATES);
> + memcpy(wcn->supported_rates.ofdm_rates, ofdm_rates,
> + sizeof(*ofdm_rates) * WCN36XX_HAL_NUM_OFDM_RATES);
> + wcn->supported_rates.supported_mcs_set[0] = 0xFF;
> +
> + if (!wcn->ctrl_ops->get_hw_mac(wcn->addresses.addr)) {
> + wcn36xx_info("mac address: %pM\n", wcn->addresses.addr);
> + SET_IEEE80211_PERM_ADDR(wcn->hw, wcn->addresses.addr);
> + }
> +
> + ret = wcn36xx_platform_get_resources(wcn, pdev);
> + if (ret)
> + goto out_wq;
> +
> + wcn36xx_init_ieee80211(wcn);
> + ret = ieee80211_register_hw(wcn->hw);
> + if (ret)
> + goto out_unmap;
> +
> + return 0;
> +
> +out_unmap:
> + iounmap(wcn->mmio);
> +out_wq:
> + ieee80211_free_hw(hw);
> +out_err:
> + return ret;
> +}
> +static int wcn36xx_remove(struct platform_device *pdev)
> +{
> + struct ieee80211_hw *hw = platform_get_drvdata(pdev);
> + struct wcn36xx *wcn = hw->priv;
> + wcn36xx_dbg(WCN36XX_DBG_MAC, "platform remove\n");
> +
> + mutex_destroy(&wcn->pm_mutex);
> + mutex_destroy(&wcn->smd_mutex);
> +
> + ieee80211_unregister_hw(hw);
> + iounmap(wcn->mmio);
> + ieee80211_free_hw(hw);
> +
> + return 0;
> +}
> +static const struct platform_device_id wcn36xx_platform_id_table[] = {
> + {
> + .name = "wcn36xx",
> + .driver_data = 0
> + },
> + {}
> +};
> +MODULE_DEVICE_TABLE(platform, wcn36xx_platform_id_table);
> +
> +static struct platform_driver wcn36xx_driver = {
> + .probe = wcn36xx_probe,
> + .remove = wcn36xx_remove,
> + .driver = {
> + .name = "wcn36xx",
> + .owner = THIS_MODULE,
> + },
> + .id_table = wcn36xx_platform_id_table,
> +};
> +
> +static int __init wcn36xx_init(void)
> +{
> + platform_driver_register(&wcn36xx_driver);
> + return 0;
> +}
> +module_init(wcn36xx_init);
> +
> +static void __exit wcn36xx_exit(void)
> +{
> + platform_driver_unregister(&wcn36xx_driver);
> +}
> +module_exit(wcn36xx_exit);
> +
> +MODULE_LICENSE("Dual BSD/GPL");
> +MODULE_AUTHOR("Eugene Krasnikov k.eugene.e@gmail.com");
> +MODULE_FIRMWARE(WLAN_NV_FILE);
> diff --git a/drivers/net/wireless/ath/wcn36xx/pmc.c b/drivers/net/wireless/ath/wcn36xx/pmc.c
> new file mode 100644
> index 0000000..f72096e
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/pmc.c
> @@ -0,0 +1,46 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> +
> +#include "wcn36xx.h"
> +
> +int wcn36xx_pmc_init(struct wcn36xx *wcn)
> +{
> + wcn->pw_state = WCN36XX_FULL_POWER;
> + return 0;
> +}
> +
> +int wcn36xx_pmc_enter_bmps_state(struct wcn36xx *wcn, u64 tsf)
> +{
> + /* TODO: Make sure the TX chain clean */
> + wcn36xx_smd_enter_bmps(wcn, tsf);
> + wcn->pw_state = WCN36XX_BMPS;
> + return 0;
> +}
> +
> +int wcn36xx_pmc_exit_bmps_state(struct wcn36xx *wcn)
> +{
> + wcn36xx_smd_exit_bmps(wcn);
> + wcn->pw_state = WCN36XX_FULL_POWER;
> + return 0;
> +}
> +
> +int wcn36xx_enable_keep_alive_null_packet(struct wcn36xx *wcn)
> +{
> + wcn36xx_dbg(WCN36XX_DBG_PMC, "%s\n", __func__);
> + return wcn36xx_smd_keep_alive_req(wcn, WCN36XX_HAL_KEEP_ALIVE_NULL_PKT);
> +}
> diff --git a/drivers/net/wireless/ath/wcn36xx/pmc.h b/drivers/net/wireless/ath/wcn36xx/pmc.h
> new file mode 100644
> index 0000000..b00d425
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/pmc.h
> @@ -0,0 +1,32 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#ifndef _WCN36XX_PMC_H_
> +#define _WCN36XX_PMC_H_
> +
> +struct wcn36xx;
> +
> +enum wcn36xx_power_state {
> + WCN36XX_FULL_POWER,
> + WCN36XX_BMPS
> +};
> +
> +int wcn36xx_pmc_init(struct wcn36xx *wcn);
> +int wcn36xx_pmc_enter_bmps_state(struct wcn36xx *wcn, u64 tbtt);
> +int wcn36xx_pmc_exit_bmps_state(struct wcn36xx *wcn);
> +int wcn36xx_enable_keep_alive_null_packet(struct wcn36xx *wcn);
> +int wcn36xx_enable_keep_alive_null_packet(struct wcn36xx *wcn);
> +#endif /* _WCN36XX_PMC_H_ */
> diff --git a/drivers/net/wireless/ath/wcn36xx/smd.c b/drivers/net/wireless/ath/wcn36xx/smd.c
> new file mode 100644
> index 0000000..380da13
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/smd.c
> @@ -0,0 +1,1529 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> +
> +#include <linux/etherdevice.h>
> +#include <linux/firmware.h>
> +#include <linux/bitops.h>
> +#include "smd.h"
> +
> +static int put_cfg_tlv_u32(struct wcn36xx *wcn, size_t *len, u32 id, u32 value)
> +{
> + struct wcn36xx_hal_cfg *entry;
> + u32 *val;
> +
> + if (*len + sizeof(*entry) + sizeof(u32) >= WCN36XX_SMD_BUF_SIZE) {
> + wcn36xx_err("Not enough room for TLV entry\n");
> + return -ENOMEM;
> + }
> +
> + entry = (struct wcn36xx_hal_cfg *) (wcn->smd_buf + *len);
> + entry->id = id;
> + entry->len = sizeof(u32);
> + entry->pad_bytes = 0;
> + entry->reserve = 0;
> +
> + val = (u32 *) (entry + 1);
> + *val = value;
> +
> + *len += sizeof(*entry) + sizeof(u32);
> +
> + return 0;
> +}
> +
> +static void wcn36xx_smd_set_bss_nw_type(struct wcn36xx *wcn,
> + struct ieee80211_sta *sta,
> + struct wcn36xx_hal_config_bss_params *bss_params)
> +{
> + if (IEEE80211_BAND_5GHZ == WCN36XX_BAND(wcn))
> + bss_params->nw_type = WCN36XX_HAL_11A_NW_TYPE;
> + else if (sta && sta->ht_cap.ht_supported)
> + bss_params->nw_type = WCN36XX_HAL_11N_NW_TYPE;
> + else if (sta && (sta->supp_rates[IEEE80211_BAND_2GHZ] & 0x7f))
> + bss_params->nw_type = WCN36XX_HAL_11G_NW_TYPE;
> + else
> + bss_params->nw_type = WCN36XX_HAL_11B_NW_TYPE;
> +}
> +
> +static void wcn36xx_smd_set_bss_ht_params(struct ieee80211_vif *vif,
> + struct ieee80211_sta *sta,
> + struct wcn36xx_hal_config_bss_params *bss_params)
> +{
> + if (sta && sta->ht_cap.ht_supported) {
> + unsigned long caps = sta->ht_cap.cap;
> + bss_params->ht = sta->ht_cap.ht_supported;
> + bss_params->tx_channel_width_set =
> + test_bit(IEEE80211_HT_CAP_SUP_WIDTH_20_40, &caps);
> + bss_params->lsig_tx_op_protection_full_support =
> + test_bit(IEEE80211_HT_CAP_LSIG_TXOP_PROT, &caps);
> +
> + bss_params->ht_oper_mode = vif->bss_conf.ht_operation_mode;
> + bss_params->lln_non_gf_coexist =
> + !!(vif->bss_conf.ht_operation_mode &
> + IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
> + /* IEEE80211_HT_STBC_PARAM_DUAL_CTS_PROT */
> + bss_params->dual_cts_protection = 0;
> + /* IEEE80211_HT_OP_MODE_PROTECTION_20MHZ */
> + bss_params->ht20_coexist = 0;
> + }
> +}
> +
> +static void wcn36xx_smd_set_sta_ht_params(struct ieee80211_sta *sta,
> + struct wcn36xx_hal_config_sta_params *sta_params)
> +{
> + if (sta->ht_cap.ht_supported) {
> + unsigned long caps = sta->ht_cap.cap;
> + sta_params->ht_capable = sta->ht_cap.ht_supported;
> + sta_params->tx_channel_width_set =
> + test_bit(IEEE80211_HT_CAP_SUP_WIDTH_20_40, &caps);
> + sta_params->lsig_txop_protection =
> + test_bit(IEEE80211_HT_CAP_LSIG_TXOP_PROT, &caps);
> +
> + sta_params->max_ampdu_size = sta->ht_cap.ampdu_factor;
> + sta_params->max_ampdu_density = sta->ht_cap.ampdu_density;
> + sta_params->max_amsdu_size =
> + test_bit(IEEE80211_HT_CAP_MAX_AMSDU, &caps);
> + sta_params->sgi_20Mhz =
> + test_bit(IEEE80211_HT_CAP_SGI_20, &caps);
> + sta_params->sgi_40mhz =
> + test_bit(IEEE80211_HT_CAP_SGI_40, &caps);
> + sta_params->green_field_capable =
> + test_bit(IEEE80211_HT_CAP_GRN_FLD, &caps);
> + sta_params->delayed_ba_support =
> + test_bit(IEEE80211_HT_CAP_DELAY_BA, &caps);
> + sta_params->dsss_cck_mode_40mhz =
> + test_bit(IEEE80211_HT_CAP_DSSSCCK40, &caps);
> + }
> +}
> +
> +static void wcn36xx_smd_set_sta_params(struct wcn36xx *wcn,
> + struct ieee80211_vif *vif,
> + struct ieee80211_sta *sta,
> + struct wcn36xx_hal_config_sta_params *sta_params)
> +{
> + if (vif->type == NL80211_IFTYPE_ADHOC ||
> + vif->type == NL80211_IFTYPE_AP ||
> + vif->type == NL80211_IFTYPE_MESH_POINT) {
> + sta_params->type = 1;
> + sta_params->sta_index = 0xFF;
> + } else {
> + sta_params->type = 0;
> + sta_params->sta_index = 1;
> + }
> +
> + sta_params->aid = wcn->aid;
> + sta_params->listen_interval = WCN36XX_LISTEN_INTERVAL(wcn);
> +
> + /*
> + * In STA mode ieee80211_sta contains bssid and ieee80211_vif
> + * contains our mac address. In AP mode we are bssid so vif
> + * contains bssid and ieee80211_sta contains mac.
> + */
> + if (NL80211_IFTYPE_STATION == vif->type)
> + memcpy(&sta_params->mac, vif->addr, ETH_ALEN);
> + else
> + memcpy(&sta_params->bssid, vif->addr, ETH_ALEN);
> +
> + sta_params->encrypt_type = wcn->encrypt_type;
> + sta_params->short_preamble_supported =
> + !(WCN36XX_FLAGS(wcn) &
> + IEEE80211_HW_2GHZ_SHORT_PREAMBLE_INCAPABLE);
> +
> + sta_params->rifs_mode = 0;
> + sta_params->rmf = 0;
> + sta_params->action = 0;
> + sta_params->uapsd = 0;
> + sta_params->mimo_ps = WCN36XX_HAL_HT_MIMO_PS_STATIC;
> + sta_params->max_ampdu_duration = 0;
> + sta_params->bssid_index = wcn->current_vif->bss_index;
> + sta_params->p2p = 0;
> +
> + memcpy(&sta_params->supported_rates, &wcn->supported_rates,
> + sizeof(wcn->supported_rates));
> +
> + if (sta) {
> + if (NL80211_IFTYPE_STATION == vif->type)
> + memcpy(&sta_params->bssid, sta->addr, ETH_ALEN);
> + else
> + memcpy(&sta_params->mac, sta->addr, ETH_ALEN);
> + sta_params->wmm_enabled = sta->wme;
> + sta_params->max_sp_len = sta->max_sp;
> + wcn36xx_smd_set_sta_ht_params(sta, sta_params);
> + }
> +}
> +
> +static int wcn36xx_smd_send_and_wait(struct wcn36xx *wcn, size_t len)
> +{
> + int ret;
> + wcn36xx_dbg_dump(WCN36XX_DBG_SMD_DUMP, "SMD >>> ", wcn->smd_buf, len);
> +
> + ret = wcn->ctrl_ops->tx(wcn->smd_buf, len);
> + mutex_unlock(&wcn->smd_mutex);
> + return ret;
> +}
> +
> +#define INIT_HAL_MSG(msg_body, type) \
> + do { \
> + memset(&msg_body, 0, sizeof(msg_body)); \
> + msg_body.header.msg_type = type; \
> + msg_body.header.msg_version = WCN36XX_HAL_MSG_VERSION0; \
> + msg_body.header.len = sizeof(msg_body); \
> + } while (0) \
> +
> +#define PREPARE_HAL_BUF(send_buf, msg_body) \
> + do { \
> + struct wcn36xx *__wcn = \
> + container_of(&send_buf, \
> + struct wcn36xx, smd_buf); \
> + mutex_lock(&__wcn->smd_mutex); \
> + memset(send_buf, 0, msg_body.header.len); \
> + memcpy(send_buf, &msg_body, sizeof(msg_body)); \
> + } while (0) \
> +
> +static int wcn36xx_smd_rsp_status_check(void *buf, size_t len)
> +{
> + struct wcn36xx_fw_msg_status_rsp *rsp;
> +
> + if (len < sizeof(struct wcn36xx_hal_msg_header) +
> + sizeof(struct wcn36xx_fw_msg_status_rsp))
> + return -EIO;
> +
> + rsp = (struct wcn36xx_fw_msg_status_rsp *)
> + (buf + sizeof(struct wcn36xx_hal_msg_header));
> +
> + if (WCN36XX_FW_MSG_RESULT_SUCCESS != rsp->status)
> + return -EIO;
> +
> + return 0;
> +}
> +
> +int wcn36xx_smd_load_nv(struct wcn36xx *wcn)
> +{
> + const struct firmware *nv;
> + struct nv_data *nv_d;
> + struct wcn36xx_hal_nv_img_download_req_msg msg_body;
> + int fw_bytes_left;
> + int ret;
> + u16 fm_offset = 0;
> +
> + ret = request_firmware(&nv, WLAN_NV_FILE, wcn->dev);
> + if (ret) {
> + wcn36xx_err("Failed to load nv file %s: %d\n",
> + WLAN_NV_FILE, ret);
> + goto out_free_nv;
> + }
> +
> + nv_d = (struct nv_data *)nv->data;
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_DOWNLOAD_NV_REQ);
> +
> + msg_body.header.len += WCN36XX_NV_FRAGMENT_SIZE;
> +
> + msg_body.frag_number = 0;
> +
> + do {
> + fw_bytes_left = nv->size - fm_offset - 4;
> + if (fw_bytes_left > WCN36XX_NV_FRAGMENT_SIZE) {
> + msg_body.last_fragment = 0;
> + msg_body.nv_img_buffer_size = WCN36XX_NV_FRAGMENT_SIZE;
> + } else {
> + msg_body.last_fragment = 1;
> + msg_body.nv_img_buffer_size = fw_bytes_left;
> +
> + /* Do not forget update general message len */
> + msg_body.header.len = sizeof(msg_body) + fw_bytes_left;
> +
> + }
> + /* smd_buf must be protected with mutex */
> + mutex_lock(&wcn->smd_mutex);
> +
> + /* Add load NV request message header */
> + memcpy(wcn->smd_buf, &msg_body, sizeof(msg_body));
> +
> + /* Add NV body itself */
> + memcpy(wcn->smd_buf + sizeof(msg_body),
> + &nv_d->table + fm_offset,
> + msg_body.nv_img_buffer_size);
> +
> + ret = wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> + if (ret)
> + return ret;
> +
> + msg_body.frag_number++;
> + fm_offset += WCN36XX_NV_FRAGMENT_SIZE;
> +
> + } while (msg_body.last_fragment != 1);
> +
> +out_free_nv:
> + release_firmware(nv);
> +
> + return ret;
> +}
> +
> +int wcn36xx_smd_start(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_mac_start_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_START_REQ);
> +
> + msg_body.params.type = DRIVER_TYPE_PRODUCTION;
> + msg_body.params.len = 0;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL, "hal start type %d\n",
> + msg_body.params.type);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +static int wcn36xx_smd_start_rsp(struct wcn36xx *wcn, void *buf, size_t len)
> +{
> + struct wcn36xx_hal_mac_start_rsp_msg *rsp;
> +
> + if (len < sizeof(*rsp))
> + return -EIO;
> +
> + rsp = (struct wcn36xx_hal_mac_start_rsp_msg *)buf;
> +
> + if (WCN36XX_FW_MSG_RESULT_SUCCESS != rsp->start_rsp_params.status)
> + return -EIO;
> +
> + memcpy(wcn->crm_version, rsp->start_rsp_params.crm_version,
> + WCN36XX_HAL_VERSION_LENGTH);
> + memcpy(wcn->wlan_version, rsp->start_rsp_params.wlan_version,
> + WCN36XX_HAL_VERSION_LENGTH);
> +
> + /* null terminate the strings, just in case */
> + wcn->crm_version[WCN36XX_HAL_VERSION_LENGTH] = '\0';
> + wcn->wlan_version[WCN36XX_HAL_VERSION_LENGTH] = '\0';
> +
> + wcn->fw_revision = rsp->start_rsp_params.version.revision;
> + wcn->fw_version = rsp->start_rsp_params.version.version;
> + wcn->fw_minor = rsp->start_rsp_params.version.minor;
> + wcn->fw_major = rsp->start_rsp_params.version.major;
> +
> + wcn36xx_info("firmware WLAN version '%s' and CRM version '%s'\n",
> + wcn->wlan_version, wcn->crm_version);
> +
> + wcn36xx_info("firmware API %u.%u.%u.%u, %u stations, %u bssids\n",
> + wcn->fw_major, wcn->fw_minor,
> + wcn->fw_version, wcn->fw_revision,
> + rsp->start_rsp_params.stations,
> + rsp->start_rsp_params.bssids);
> +
> + return 0;
> +}
> +
> +int wcn36xx_smd_stop(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_mac_stop_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_STOP_REQ);
> +
> + msg_body.stop_req_params.reason = HAL_STOP_TYPE_RF_KILL;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_init_scan(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_init_scan_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_INIT_SCAN_REQ);
> +
> + msg_body.mode = HAL_SYS_MODE_SCAN;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL, "hal init scan mode %d\n", msg_body.mode);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_start_scan(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_start_scan_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_START_SCAN_REQ);
> +
> + msg_body.scan_channel = WCN36XX_HW_CHANNEL(wcn);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL, "hal start scan channel %d\n",
> + msg_body.scan_channel);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_end_scan(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_end_scan_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_END_SCAN_REQ);
> +
> + msg_body.scan_channel = WCN36XX_HW_CHANNEL(wcn);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL, "hal end scan channel %d\n",
> + msg_body.scan_channel);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_finish_scan(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_finish_scan_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_FINISH_SCAN_REQ);
> +
> + msg_body.mode = HAL_SYS_MODE_SCAN;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL, "hal finish scan mode %d\n",
> + msg_body.mode);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_switch_channel(struct wcn36xx *wcn, int ch)
> +{
> + struct wcn36xx_hal_switch_channel_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_CH_SWITCH_REQ);
> +
> + msg_body.channel_number = (u8)ch;
> + msg_body.tx_mgmt_power = 0xbf;
> + msg_body.max_tx_power = 0xbf;
> + memcpy(msg_body.self_sta_mac_addr, wcn->addresses.addr, ETH_ALEN);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +static void wcn36xx_smd_switch_channel_rsp(void *buf, size_t len)
> +{
> + struct wcn36xx_hal_switch_channel_rsp_msg *rsp;
> + rsp = (struct wcn36xx_hal_switch_channel_rsp_msg *)buf;
> + wcn36xx_dbg(WCN36XX_DBG_HAL, "channel switched to: %d, status: %d\n",
> + rsp->channel_number, rsp->status);
> +}
> +
> +int wcn36xx_smd_update_scan_params(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_update_scan_params_req msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_UPDATE_SCAN_PARAM_REQ);
> +
> + msg_body.dot11d_enabled = 0;
> + msg_body.dot11d_resolved = 0;
> + msg_body.channel_count = 26;
> + msg_body.active_min_ch_time = 60;
> + msg_body.active_max_ch_time = 120;
> + msg_body.passive_min_ch_time = 60;
> + msg_body.passive_max_ch_time = 110;
> + msg_body.state = 0;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal update scan params channel_count %d\n",
> + msg_body.channel_count);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +static int wcn36xx_smd_update_scan_params_rsp(void *buf, size_t len)
> +{
> + struct wcn36xx_hal_update_scan_params_resp *rsp;
> +
> + rsp = (struct wcn36xx_hal_update_scan_params_resp *)buf;
> +
> + /* Remove the PNO version bit */
> + rsp->status &= (~(WCN36XX_FW_MSG_PNO_VERSION_MASK));
> +
> + if (WCN36XX_FW_MSG_RESULT_SUCCESS != rsp->status) {
> + wcn36xx_warn("error response from update scan\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +int wcn36xx_smd_add_sta_self(struct wcn36xx *wcn, u8 *addr)
> +{
> + struct wcn36xx_hal_add_sta_self_req msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_ADD_STA_SELF_REQ);
> +
> + memcpy(&msg_body.self_addr, addr, ETH_ALEN);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal add sta self self_addr %pM status %d\n",
> + msg_body.self_addr, msg_body.status);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +static int wcn36xx_smd_add_sta_self_rsp(struct wcn36xx *wcn,
> + void *buf,
> + size_t len)
> +{
> + struct wcn36xx_hal_add_sta_self_rsp_msg *rsp;
> +
> + if (len < sizeof(*rsp))
> + return -EINVAL;
> +
> + rsp = (struct wcn36xx_hal_add_sta_self_rsp_msg *)buf;
> +
> + if (rsp->status != WCN36XX_FW_MSG_RESULT_SUCCESS) {
> + wcn36xx_warn("hal add sta self failure: %d\n",
> + rsp->status);
> + return -EIO;
> + }
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal add sta self status %d self_sta_index %d dpu_index %d\n",
> + rsp->status, rsp->self_sta_index, rsp->dpu_index);
> +
> + wcn->current_vif->self_sta_index = rsp->self_sta_index;
> + wcn->current_vif->self_dpu_desc_index = rsp->dpu_index;
> +
> + return 0;
> +}
> +
> +int wcn36xx_smd_delete_sta_self(struct wcn36xx *wcn, u8 *addr)
> +{
> + struct wcn36xx_hal_del_sta_self_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_DEL_STA_SELF_REQ);
> +
> + memcpy(&msg_body.self_addr, addr, ETH_ALEN);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_delete_sta(struct wcn36xx *wcn, u8 sta_index)
> +{
> + struct wcn36xx_hal_delete_sta_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_DELETE_STA_REQ);
> +
> + msg_body.sta_index = sta_index;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal delete sta sta_index %d\n",
> + msg_body.sta_index);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +
> +}
> +
> +int wcn36xx_smd_join(struct wcn36xx *wcn, const u8 *bssid, u8 *vif, u8 ch)
> +{
> + struct wcn36xx_hal_join_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_JOIN_REQ);
> +
> + memcpy(&msg_body.bssid, bssid, ETH_ALEN);
> + memcpy(&msg_body.self_sta_mac_addr, vif, ETH_ALEN);
> + msg_body.channel = ch;
> +
> + if (conf_is_ht40_minus(&wcn->hw->conf))
> + msg_body.secondary_channel_offset =
> + PHY_DOUBLE_CHANNEL_HIGH_PRIMARY;
> + else if (conf_is_ht40_plus(&wcn->hw->conf))
> + msg_body.secondary_channel_offset =
> + PHY_DOUBLE_CHANNEL_LOW_PRIMARY;
> + else
> + msg_body.secondary_channel_offset =
> + PHY_SINGLE_CHANNEL_CENTERED;
> +
> + msg_body.link_state = WCN36XX_HAL_LINK_PREASSOC_STATE;
> +
> + msg_body.max_tx_power = 0xbf;
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal join req bssid %pM self_sta_mac_addr %pM channel %d link_state %d\n",
> + msg_body.bssid, msg_body.self_sta_mac_addr,
> + msg_body.channel, msg_body.link_state);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_set_link_st(struct wcn36xx *wcn, const u8 *bssid,
> + const u8 *sta_mac,
> + enum wcn36xx_hal_link_state state)
> +{
> + struct wcn36xx_hal_set_link_state_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_SET_LINK_ST_REQ);
> +
> + memcpy(&msg_body.bssid, bssid, ETH_ALEN);
> + memcpy(&msg_body.self_mac_addr, sta_mac, ETH_ALEN);
> + msg_body.state = state;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal set link state bssid %pM self_mac_addr %pM state %d\n",
> + msg_body.bssid, msg_body.self_mac_addr, msg_body.state);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +static void wcn36xx_smd_convert_sta_to_v1(struct wcn36xx *wcn,
> + const struct wcn36xx_hal_config_sta_params *orig,
> + struct wcn36xx_hal_config_sta_params_v1 *v1)
> +{
> + /* convert orig to v1 format */
> + memcpy(&v1->bssid, orig->bssid, ETH_ALEN);
> + memcpy(&v1->mac, orig->mac, ETH_ALEN);
> + v1->aid = orig->aid;
> + v1->type = orig->type;
> + v1->listen_interval = orig->listen_interval;
> + v1->ht_capable = orig->ht_capable;
> +
> + v1->max_ampdu_size = orig->max_ampdu_size;
> + v1->max_ampdu_density = orig->max_ampdu_density;
> + v1->sgi_40mhz = orig->sgi_40mhz;
> + v1->sgi_20Mhz = orig->sgi_20Mhz;
> +
> + memcpy(&v1->supported_rates, &orig->supported_rates,
> + sizeof(orig->supported_rates));
> + v1->sta_index = orig->sta_index;
> +}
> +
> +static int wcn36xx_smd_config_sta_v1(struct wcn36xx *wcn,
> + const struct wcn36xx_hal_config_sta_req_msg *orig)
> +{
> + struct wcn36xx_hal_config_sta_req_msg_v1 msg_body;
> + struct wcn36xx_hal_config_sta_params_v1 *sta = &msg_body.sta_params;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_CONFIG_STA_REQ);
> +
> + wcn36xx_smd_convert_sta_to_v1(wcn, &orig->sta_params,
> + &msg_body.sta_params);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal config sta v1 action %d sta_index %d bssid_index %d bssid %pM type %d mac %pM aid %d\n",
> + sta->action, sta->sta_index, sta->bssid_index,
> + sta->bssid, sta->type, sta->mac, sta->aid);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_config_sta(struct wcn36xx *wcn, struct ieee80211_vif *vif,
> + struct ieee80211_sta *sta)
> +{
> + struct wcn36xx_hal_config_sta_req_msg msg;
> + struct wcn36xx_hal_config_sta_params *sta_params;
> +
> + INIT_HAL_MSG(msg, WCN36XX_HAL_CONFIG_STA_REQ);
> +
> + sta_params = &msg.sta_params;
> +
> + wcn36xx_smd_set_sta_params(wcn, vif, sta, sta_params);
> +
> + if (!wcn36xx_is_fw_version(wcn, 1, 2, 2, 24))
> + return wcn36xx_smd_config_sta_v1(wcn, &msg);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal config sta action %d sta_index %d bssid_index %d bssid %pM type %d mac %pM aid %d\n",
> + sta_params->action, sta_params->sta_index,
> + sta_params->bssid_index, sta_params->bssid,
> + sta_params->type, sta_params->mac, sta_params->aid);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg.header.len);
> +}
> +
> +static int wcn36xx_smd_config_sta_rsp(struct wcn36xx *wcn, void *buf,
> + size_t len)
> +{
> + struct wcn36xx_hal_config_sta_rsp_msg *rsp;
> + struct config_sta_rsp_params *params;
> +
> + if (len < sizeof(*rsp))
> + return -EINVAL;
> +
> + rsp = (struct wcn36xx_hal_config_sta_rsp_msg *)buf;
> + params = &rsp->params;
> +
> + if (params->status != WCN36XX_FW_MSG_RESULT_SUCCESS) {
> + wcn36xx_warn("hal config sta response failure: %d\n",
> + params->status);
> + return -EIO;
> + }
> +
> + if (wcn->sta) {
> + wcn->sta->sta_index = params->sta_index;
> + wcn->sta->dpu_desc_index = params->dpu_index;
> + wcn->sta = NULL;
> + }
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal config sta rsp status %d sta_index %d bssid_index %d p2p %d\n",
> + params->status, params->sta_index, params->bssid_index,
> + params->p2p);
> +
> + return 0;
> +}
> +
> +static int wcn36xx_smd_join_rsp(void *buf, size_t len)
> +{
> + struct wcn36xx_hal_join_rsp_msg *rsp;
> +
> + if (wcn36xx_smd_rsp_status_check(buf, len))
> + return -EIO;
> +
> + rsp = (struct wcn36xx_hal_join_rsp_msg *)buf;
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal rsp join status %d tx_mgmt_power %d\n",
> + rsp->status, rsp->tx_mgmt_power);
> +
> + return 0;
> +}
> +
> +static int wcn36xx_smd_config_bss_v1(struct wcn36xx *wcn,
> + const struct wcn36xx_hal_config_bss_req_msg *orig)
> +{
> + struct wcn36xx_hal_config_bss_req_msg_v1 msg_body;
> + struct wcn36xx_hal_config_bss_params_v1 *bss = &msg_body.bss_params;
> + struct wcn36xx_hal_config_sta_params_v1 *sta = &bss->sta;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_CONFIG_BSS_REQ);
> +
> + /* convert orig to v1 */
> + memcpy(&msg_body.bss_params.bssid,
> + &orig->bss_params.bssid, ETH_ALEN);
> + memcpy(&msg_body.bss_params.self_mac_addr,
> + &orig->bss_params.self_mac_addr, ETH_ALEN);
> +
> + msg_body.bss_params.bss_type = orig->bss_params.bss_type;
> + msg_body.bss_params.oper_mode = orig->bss_params.oper_mode;
> + msg_body.bss_params.nw_type = orig->bss_params.nw_type;
> +
> + msg_body.bss_params.short_slot_time_supported =
> + orig->bss_params.short_slot_time_supported;
> + msg_body.bss_params.lla_coexist = orig->bss_params.lla_coexist;
> + msg_body.bss_params.llb_coexist = orig->bss_params.llb_coexist;
> + msg_body.bss_params.llg_coexist = orig->bss_params.llg_coexist;
> + msg_body.bss_params.ht20_coexist = orig->bss_params.ht20_coexist;
> + msg_body.bss_params.lln_non_gf_coexist =
> + orig->bss_params.lln_non_gf_coexist;
> +
> + msg_body.bss_params.lsig_tx_op_protection_full_support =
> + orig->bss_params.lsig_tx_op_protection_full_support;
> + msg_body.bss_params.rifs_mode = orig->bss_params.rifs_mode;
> + msg_body.bss_params.beacon_interval = orig->bss_params.beacon_interval;
> + msg_body.bss_params.dtim_period = orig->bss_params.dtim_period;
> + msg_body.bss_params.tx_channel_width_set =
> + orig->bss_params.tx_channel_width_set;
> + msg_body.bss_params.oper_channel = orig->bss_params.oper_channel;
> + msg_body.bss_params.ext_channel = orig->bss_params.ext_channel;
> +
> + msg_body.bss_params.reserved = orig->bss_params.reserved;
> +
> + memcpy(&msg_body.bss_params.ssid,
> + &orig->bss_params.ssid,
> + sizeof(orig->bss_params.ssid));
> +
> + msg_body.bss_params.action = orig->bss_params.action;
> + msg_body.bss_params.rateset = orig->bss_params.rateset;
> + msg_body.bss_params.ht = orig->bss_params.ht;
> + msg_body.bss_params.obss_prot_enabled =
> + orig->bss_params.obss_prot_enabled;
> + msg_body.bss_params.rmf = orig->bss_params.rmf;
> + msg_body.bss_params.ht_oper_mode = orig->bss_params.ht_oper_mode;
> + msg_body.bss_params.dual_cts_protection =
> + orig->bss_params.dual_cts_protection;
> +
> + msg_body.bss_params.max_probe_resp_retry_limit =
> + orig->bss_params.max_probe_resp_retry_limit;
> + msg_body.bss_params.hidden_ssid = orig->bss_params.hidden_ssid;
> + msg_body.bss_params.proxy_probe_resp =
> + orig->bss_params.proxy_probe_resp;
> + msg_body.bss_params.edca_params_valid =
> + orig->bss_params.edca_params_valid;
> +
> + memcpy(&msg_body.bss_params.acbe,
> + &orig->bss_params.acbe,
> + sizeof(orig->bss_params.acbe));
> + memcpy(&msg_body.bss_params.acbk,
> + &orig->bss_params.acbk,
> + sizeof(orig->bss_params.acbk));
> + memcpy(&msg_body.bss_params.acvi,
> + &orig->bss_params.acvi,
> + sizeof(orig->bss_params.acvi));
> + memcpy(&msg_body.bss_params.acvo,
> + &orig->bss_params.acvo,
> + sizeof(orig->bss_params.acvo));
> +
> + msg_body.bss_params.ext_set_sta_key_param_valid =
> + orig->bss_params.ext_set_sta_key_param_valid;
> +
> + memcpy(&msg_body.bss_params.ext_set_sta_key_param,
> + &orig->bss_params.ext_set_sta_key_param,
> + sizeof(orig->bss_params.acvo));
> +
> + msg_body.bss_params.wcn36xx_hal_persona =
> + orig->bss_params.wcn36xx_hal_persona;
> + msg_body.bss_params.spectrum_mgt_enable =
> + orig->bss_params.spectrum_mgt_enable;
> + msg_body.bss_params.tx_mgmt_power = orig->bss_params.tx_mgmt_power;
> + msg_body.bss_params.max_tx_power = orig->bss_params.max_tx_power;
> +
> + wcn36xx_smd_convert_sta_to_v1(wcn, &orig->bss_params.sta,
> + &msg_body.bss_params.sta);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal config bss v1 bssid %pM self_mac_addr %pM bss_type %d oper_mode %d nw_type %d\n",
> + bss->bssid, bss->self_mac_addr, bss->bss_type,
> + bss->oper_mode, bss->nw_type);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "- sta bssid %pM action %d sta_index %d bssid_index %d aid %d type %d mac %pM\n",
> + sta->bssid, sta->action, sta->sta_index,
> + sta->bssid_index, sta->aid, sta->type, sta->mac);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_config_bss(struct wcn36xx *wcn, struct ieee80211_vif *vif,
> + struct ieee80211_sta *sta, const u8 *bssid,
> + bool update)
> +{
> + struct wcn36xx_hal_config_bss_req_msg msg;
> + struct wcn36xx_hal_config_bss_params *bss;
> + struct wcn36xx_hal_config_sta_params *sta_params;
> +
> + INIT_HAL_MSG(msg, WCN36XX_HAL_CONFIG_BSS_REQ);
> +
> + bss = &msg.bss_params;
> + sta_params = &bss->sta;
> +
> + WARN_ON(is_zero_ether_addr(bssid));
> +
> + memcpy(&bss->bssid, bssid, ETH_ALEN);
> +
> + memcpy(&bss->self_mac_addr, &wcn->addresses, ETH_ALEN);
> +
> + if (vif->type == NL80211_IFTYPE_STATION) {
> + bss->bss_type = WCN36XX_HAL_INFRASTRUCTURE_MODE;
> +
> + /* STA */
> + bss->oper_mode = 1;
> + bss->wcn36xx_hal_persona = WCN36XX_HAL_STA_MODE;
> + } else if (vif->type == NL80211_IFTYPE_AP) {
> + bss->bss_type = WCN36XX_HAL_INFRA_AP_MODE;
> +
> + /* AP */
> + bss->oper_mode = 0;
> + bss->wcn36xx_hal_persona = WCN36XX_HAL_STA_SAP_MODE;
> + } else if (vif->type == NL80211_IFTYPE_ADHOC ||
> + vif->type == NL80211_IFTYPE_MESH_POINT) {
> + bss->bss_type = WCN36XX_HAL_IBSS_MODE;
> +
> + /* STA */
> + bss->oper_mode = 1;
> + } else {
> + wcn36xx_warn("Unknown type for bss config: %d\n", vif->type);
> + }
> +
> + if (vif->type == NL80211_IFTYPE_STATION)
> + wcn36xx_smd_set_bss_nw_type(wcn, sta, bss);
> + else
> + bss->nw_type = WCN36XX_HAL_11N_NW_TYPE;
> +
> + bss->short_slot_time_supported = vif->bss_conf.use_short_slot;
> + bss->lla_coexist = 0;
> + bss->llb_coexist = 0;
> + bss->llg_coexist = 0;
> + bss->rifs_mode = 0;
> + bss->beacon_interval = vif->bss_conf.beacon_int;
> + bss->dtim_period = wcn->dtim_period;
> +
> + wcn36xx_smd_set_bss_ht_params(vif, sta, bss);
> +
> + bss->oper_channel = WCN36XX_HW_CHANNEL(wcn);
> +
> + if (conf_is_ht40_minus(&wcn->hw->conf))
> + bss->ext_channel = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
> + else if (conf_is_ht40_plus(&wcn->hw->conf))
> + bss->ext_channel = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
> + else
> + bss->ext_channel = IEEE80211_HT_PARAM_CHA_SEC_NONE;
> +
> + bss->reserved = 0;
> + wcn36xx_smd_set_sta_params(wcn, vif, sta, sta_params);
> +
> + /* wcn->ssid is only valid in AP and IBSS mode */
> + bss->ssid.length = wcn->ssid.length;
> + memcpy(bss->ssid.ssid, wcn->ssid.ssid, wcn->ssid.length);
> +
> + bss->obss_prot_enabled = 0;
> + bss->rmf = 0;
> + bss->max_probe_resp_retry_limit = 0;
> + bss->hidden_ssid = vif->bss_conf.hidden_ssid;
> + bss->proxy_probe_resp = 0;
> + bss->edca_params_valid = 0;
> +
> + /* FIXME: set acbe, acbk, acvi and acvo */
> +
> + bss->ext_set_sta_key_param_valid = 0;
> +
> + /* FIXME: set ext_set_sta_key_param */
> +
> + bss->spectrum_mgt_enable = 0;
> + bss->tx_mgmt_power = 0;
> + bss->max_tx_power = WCN36XX_MAX_POWER(wcn);
> +
> + bss->action = update;
> +
> + if (!wcn36xx_is_fw_version(wcn, 1, 2, 2, 24))
> + return wcn36xx_smd_config_bss_v1(wcn, &msg);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal config bss bssid %pM self_mac_addr %pM bss_type %d oper_mode %d nw_type %d\n",
> + bss->bssid, bss->self_mac_addr, bss->bss_type,
> + bss->oper_mode, bss->nw_type);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "- sta bssid %pM action %d sta_index %d bssid_index %d aid %d type %d mac %pM\n",
> + sta_params->bssid, sta_params->action,
> + sta_params->sta_index, sta_params->bssid_index,
> + sta_params->aid, sta_params->type,
> + sta_params->mac);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg.header.len);
> +}
> +
> +static int wcn36xx_smd_config_bss_rsp(struct wcn36xx *wcn,
> + void *buf,
> + size_t len)
> +{
> + struct wcn36xx_hal_config_bss_rsp_msg *rsp;
> + struct wcn36xx_hal_config_bss_rsp_params *params;
> +
> + if (len < sizeof(*rsp))
> + return -EINVAL;
> +
> + rsp = (struct wcn36xx_hal_config_bss_rsp_msg *)buf;
> + params = &rsp->bss_rsp_params;
> +
> + if (params->status != WCN36XX_FW_MSG_RESULT_SUCCESS) {
> + wcn36xx_warn("hal config bss response failure: %d\n",
> + params->status);
> + return -EIO;
> + }
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal config bss rsp status %d bss_idx %d dpu_desc_index %d"
> + " sta_idx %d self_idx %d bcast_idx %d mac %pM"
> + " power %d ucast_dpu_signature %d\n",
> + params->status, params->bss_index, params->dpu_desc_index,
> + params->bss_sta_index, params->bss_self_sta_index,
> + params->bss_bcast_sta_idx, params->mac,
> + params->tx_mgmt_power, params->ucast_dpu_signature);
> +
> + wcn->current_vif->bss_index = params->bss_index;
> +
> + if (wcn->sta) {
> + wcn->sta->bss_sta_index = params->bss_sta_index;
> + wcn->sta->bss_dpu_desc_index = params->dpu_desc_index;
> + }
> +
> + wcn->current_vif->ucast_dpu_signature = params->ucast_dpu_signature;
> +
> + return 0;
> +}
> +
> +int wcn36xx_smd_delete_bss(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_delete_bss_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_DELETE_BSS_REQ);
> +
> + msg_body.bss_index = wcn->current_vif->bss_index;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL, "hal delete bss %d\n", msg_body.bss_index);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_send_beacon(struct wcn36xx *wcn, struct sk_buff *skb_beacon,
> + u16 tim_off, u16 p2p_off)
> +{
> + struct wcn36xx_hal_send_beacon_req_msg msg_body;
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_SEND_BEACON_REQ);
> +
> + /* TODO need to find out why this is needed? */
> + msg_body.beacon_length = skb_beacon->len + 6;
> +
> + if (BEACON_TEMPLATE_SIZE > msg_body.beacon_length) {
> + memcpy(&msg_body.beacon, &skb_beacon->len, sizeof(u32));
> + memcpy(&(msg_body.beacon[4]), skb_beacon->data,
> + skb_beacon->len);
> + } else {
> + wcn36xx_err("Beacon is to big: beacon size=%d\n",
> + msg_body.beacon_length);
> + return -ENOMEM;
> + }
> + memcpy(&msg_body.bssid, &wcn->addresses, ETH_ALEN);
> +
> + /* TODO need to find out why this is needed? */
> + msg_body.tim_ie_offset = tim_off+4;
> + msg_body.p2p_ie_offset = p2p_off;
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal send beacon beacon_length %d\n",
> + msg_body.beacon_length);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_update_proberesp_tmpl(struct wcn36xx *wcn, struct sk_buff *skb)
> +{
> + struct wcn36xx_hal_send_probe_resp_req_msg msg;
> +
> + INIT_HAL_MSG(msg, WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_REQ);
> +
> + if (skb->len > BEACON_TEMPLATE_SIZE) {
> + wcn36xx_warn("probe response template is too big: %d\n",
> + skb->len);
> + return -E2BIG;
> + }
> +
> + msg.probe_resp_template_len = skb->len;
> + memcpy(&msg.probe_resp_template, skb->data, skb->len);
> +
> + memcpy(&msg.bssid, &wcn->addresses, ETH_ALEN);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg);
> +
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "hal update probe rsp len %d bssid %pM\n",
> + msg.probe_resp_template_len, msg.bssid);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg.header.len);
> +}
> +
> +int wcn36xx_smd_set_stakey(struct wcn36xx *wcn,
> + enum ani_ed_type enc_type,
> + u8 keyidx,
> + u8 keylen,
> + u8 *key,
> + u8 sta_index)
> +{
> + struct wcn36xx_hal_set_sta_key_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_SET_STAKEY_REQ);
> +
> + msg_body.set_sta_key_params.sta_index = sta_index;
> + msg_body.set_sta_key_params.enc_type = enc_type;
> +
> + msg_body.set_sta_key_params.key[0].id = keyidx;
> + msg_body.set_sta_key_params.key[0].unicast = 1;
> + msg_body.set_sta_key_params.key[0].direction = WCN36XX_HAL_TX_RX;
> + msg_body.set_sta_key_params.key[0].pae_role = 0;
> + msg_body.set_sta_key_params.key[0].length = keylen;
> + memcpy(msg_body.set_sta_key_params.key[0].key, key, keylen);
> + msg_body.set_sta_key_params.single_tid_rc = 1;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_set_bsskey(struct wcn36xx *wcn,
> + enum ani_ed_type enc_type,
> + u8 keyidx,
> + u8 keylen,
> + u8 *key)
> +{
> + struct wcn36xx_hal_set_bss_key_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_SET_BSSKEY_REQ);
> + msg_body.bss_idx = 0;
> + msg_body.enc_type = enc_type;
> + msg_body.num_keys = 1;
> + msg_body.keys[0].id = keyidx;
> + msg_body.keys[0].unicast = 0;
> + msg_body.keys[0].direction = WCN36XX_HAL_RX_ONLY;
> + msg_body.keys[0].pae_role = 0;
> + msg_body.keys[0].length = keylen;
> + memcpy(msg_body.keys[0].key, key, keylen);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_remove_stakey(struct wcn36xx *wcn,
> + enum ani_ed_type enc_type,
> + u8 keyidx,
> + u8 sta_index)
> +{
> + struct wcn36xx_hal_remove_sta_key_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_RMV_STAKEY_REQ);
> +
> + msg_body.sta_idx = sta_index;
> + msg_body.enc_type = enc_type;
> + msg_body.key_id = keyidx;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_remove_bsskey(struct wcn36xx *wcn,
> + enum ani_ed_type enc_type,
> + u8 keyidx)
> +{
> + struct wcn36xx_hal_remove_bss_key_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_RMV_BSSKEY_REQ);
> + msg_body.bss_idx = 0;
> + msg_body.enc_type = enc_type;
> + msg_body.key_id = keyidx;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_enter_bmps(struct wcn36xx *wcn, u64 tbtt)
> +{
> + struct wcn36xx_hal_enter_bmps_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_ENTER_BMPS_REQ);
> +
> + msg_body.bss_index = wcn->current_vif->bss_index;
> + msg_body.tbtt = tbtt;
> + msg_body.dtim_period = wcn->dtim_period;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_exit_bmps(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_enter_bmps_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_EXIT_BMPS_REQ);
> +
> + msg_body.bss_index = wcn->current_vif->bss_index;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +/* Notice: This function should be called after associated, or else it
> + * will be invalid
> + */
> +int wcn36xx_smd_keep_alive_req(struct wcn36xx *wcn, int packet_type)
> +{
> + struct wcn36xx_hal_keep_alive_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_KEEP_ALIVE_REQ);
> +
> + if (packet_type == WCN36XX_HAL_KEEP_ALIVE_NULL_PKT) {
> + msg_body.bss_index = wcn->current_vif->bss_index;
> + msg_body.packet_type = WCN36XX_HAL_KEEP_ALIVE_NULL_PKT;
> + msg_body.time_period = WCN36XX_KEEP_ALIVE_TIME_PERIOD;
> + } else if (packet_type == WCN36XX_HAL_KEEP_ALIVE_UNSOLICIT_ARP_RSP) {
> + /* TODO: it also support ARP response type */
> + } else {
> + wcn36xx_warn("unknow keep alive packet type %d\n", packet_type);
> + return -EINVAL;
> + }
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_dump_cmd_req(struct wcn36xx *wcn, u32 arg1, u32 arg2,
> + u32 arg3, u32 arg4, u32 arg5)
> +{
> + struct wcn36xx_hal_dump_cmd_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_DUMP_COMMAND_REQ);
> +
> + msg_body.arg1 = arg1;
> + msg_body.arg2 = arg2;
> + msg_body.arg3 = arg3;
> + msg_body.arg4 = arg4;
> + msg_body.arg5 = arg5;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +static inline void set_feat_caps(u32 *bitmap,
> + enum place_holder_in_cap_bitmap cap)
> +{
> + int arr_idx, bit_idx;
> +
> + if (cap < 0 || cap > 127) {
> + wcn36xx_warn("error cap idx %d\n", cap);
> + return;
> + }
> +
> + arr_idx = cap / 32;
> + bit_idx = cap % 32;
> + bitmap[arr_idx] |= (1 << bit_idx);
> +}
> +
> +static inline int get_feat_caps(u32 *bitmap,
> + enum place_holder_in_cap_bitmap cap)
> +{
> + int arr_idx, bit_idx;
> + int ret = 0;
> +
> + if (cap < 0 || cap > 127) {
> + wcn36xx_warn("error cap idx %d\n", cap);
> + return -EINVAL;
> + }
> +
> + arr_idx = cap / 32;
> + bit_idx = cap % 32;
> + ret = (bitmap[arr_idx] & (1 << bit_idx)) ? 1 : 0;
> + return ret;
> +}
> +
> +static inline void clear_feat_caps(u32 *bitmap,
> + enum place_holder_in_cap_bitmap cap)
> +{
> + int arr_idx, bit_idx;
> +
> + if (cap < 0 || cap > 127) {
> + wcn36xx_warn("error cap idx %d\n", cap);
> + return;
> + }
> +
> + arr_idx = cap / 32;
> + bit_idx = cap % 32;
> + bitmap[arr_idx] &= ~(1 << bit_idx);
> +}
> +
> +int wcn36xx_smd_feature_caps_exchange(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_feat_caps_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_REQ);
> +
> + set_feat_caps(msg_body.feat_caps, STA_POWERSAVE);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +/* FW sends its capability bitmap as a response */
> +int wcn36xx_smd_feature_caps_exchange_rsp(void *buf, size_t len)
> +{
> + /* TODO: print the caps of rsp for comapre */
> + if (wcn36xx_smd_rsp_status_check(buf, len)) {
> + wcn36xx_warn("error response for caps exchange\n");
> + return -EIO;
> + }
> +
> + return 0;
> +}
> +
> +int wcn36xx_smd_add_ba_session(struct wcn36xx *wcn,
> + struct ieee80211_sta *sta,
> + u16 tid,
> + u16 *ssn,
> + u8 direction,
> + u8 sta_index)
> +{
> + struct wcn36xx_hal_add_ba_session_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_ADD_BA_SESSION_REQ);
> +
> + msg_body.sta_index = sta_index;
> + memcpy(&msg_body.mac_addr, sta->addr, ETH_ALEN);
> + msg_body.dialog_token = 0x10;
> + msg_body.tid = tid;
> +
> + /* Immediate BA because Delayed BA is not supported */
> + msg_body.policy = 1;
> + msg_body.buffer_size = WCN36XX_AGGR_BUFFER_SIZE;
> + msg_body.timeout = 0;
> + if (ssn)
> + msg_body.ssn = *ssn;
> + msg_body.direction = direction;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_add_ba(struct wcn36xx *wcn)
> +{
> + struct wcn36xx_hal_add_ba_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_ADD_BA_REQ);
> +
> + msg_body.session_id = 0;
> + msg_body.win_size = WCN36XX_AGGR_BUFFER_SIZE;
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_del_ba(struct wcn36xx *wcn, u16 tid, u8 sta_index)
> +{
> + struct wcn36xx_hal_del_ba_req_msg msg_body;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_DEL_BA_REQ);
> +
> + msg_body.sta_index = sta_index;
> + msg_body.tid = tid;
> + msg_body.direction = 0;
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +int wcn36xx_smd_trigger_ba(struct wcn36xx *wcn, u8 sta_index)
> +{
> + struct wcn36xx_hal_trigger_ba_req_msg msg_body;
> + struct wcn36xx_hal_trigget_ba_req_candidate *candidate;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_TRIGGER_BA_REQ);
> +
> + msg_body.session_id = 0;
> + msg_body.candidate_cnt = 1;
> + msg_body.header.len += sizeof(*candidate);
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + candidate = (struct wcn36xx_hal_trigget_ba_req_candidate *)
> + (wcn->smd_buf + sizeof(msg_body));
> + candidate->sta_index = sta_index;
> + candidate->tid_bitmap = 1;
> +
> + return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
> +}
> +
> +static int wcn36xx_smd_tx_compl_ind(struct wcn36xx *wcn, void *buf, size_t len)
> +{
> + struct wcn36xx_hal_tx_compl_ind_msg *rsp = buf;
> +
> + if (len != sizeof(*rsp)) {
> + wcn36xx_warn("Bad TX complete indication\n");
> + return -EIO;
> + }
> +
> + wcn36xx_dxe_tx_ack_ind(wcn, rsp->status);
> +
> + return 0;
> +}
> +
> +static int wcn36xx_smd_missed_beacon_ind(struct wcn36xx *wcn,
> + void *buf,
> + size_t len)
> +{
> + struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
> + struct ieee80211_vif,
> + drv_priv);
> +
> + mutex_lock(&wcn->pm_mutex);
> +
> + /*
> + * In suspended state mac80211 is still sleeping and that means we
> + * cannot notify it about connection lost. Wait until resume and
> + * then notify mac80211 about it.
> + */
> + if (wcn->is_suspended) {
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "postpone connection lost notification\n");
> + wcn->is_con_lost_pending = true;
> + } else {
> + wcn36xx_dbg(WCN36XX_DBG_HAL, "beacon missed\n");
> + ieee80211_connection_loss(vif);
> + }
> +
> + mutex_unlock(&wcn->pm_mutex);
> +
> + return 0;
> +}
> +
> +static int wcn36xx_smd_delete_sta_context_ind(struct wcn36xx *wcn,
> + void *buf,
> + size_t len)
> +{
> + struct wcn36xx_hal_delete_sta_context_ind_msg *rsp = buf;
> + struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
> + struct ieee80211_vif,
> + drv_priv);
> + struct ieee80211_sta *sta;
> +
> + if (len != sizeof(*rsp)) {
> + wcn36xx_warn("Bad delete sta indication\n");
> + return -EIO;
> + }
> +
> +
> + rcu_read_lock();
> +
> + sta = ieee80211_find_sta(vif, rsp->addr2);
> + if (sta) {
> + wcn36xx_dbg(WCN36XX_DBG_HAL,
> + "delete station indication %pM\n", rsp->addr2);
> + ieee80211_report_low_ack(sta, 0);
> + }
> +
> + rcu_read_unlock();
> +
> + return 0;
> +}
> +
> +int wcn36xx_smd_update_cfg(struct wcn36xx *wcn, u32 cfg_id, u32 value)
> +{
> + struct wcn36xx_hal_update_cfg_req_msg msg_body, *body;
> + size_t len;
> +
> + INIT_HAL_MSG(msg_body, WCN36XX_HAL_UPDATE_CFG_REQ);
> +
> + PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
> +
> + body = (struct wcn36xx_hal_update_cfg_req_msg *) wcn->smd_buf;
> + len = msg_body.header.len;
> +
> + put_cfg_tlv_u32(wcn, &len, cfg_id, value);
> + body->header.len = len;
> + body->len = len - sizeof(*body);
> +
> + return wcn36xx_smd_send_and_wait(wcn, len);
> +}
> +static void wcn36xx_smd_rsp_process(struct wcn36xx *wcn, void *buf, size_t len)
> +{
> + struct wcn36xx_hal_msg_header *msg_header = buf;
> +
> + wcn36xx_dbg_dump(WCN36XX_DBG_SMD_DUMP, "SMD <<< ", buf, len);
> +
> + switch (msg_header->msg_type) {
> + case WCN36XX_HAL_START_RSP:
> + wcn36xx_smd_start_rsp(wcn, buf, len);
> + break;
> + case WCN36XX_HAL_CONFIG_STA_RSP:
> + wcn36xx_smd_config_sta_rsp(wcn, buf, len);
> + break;
> + case WCN36XX_HAL_CONFIG_BSS_RSP:
> + wcn36xx_smd_config_bss_rsp(wcn, buf, len);
> + break;
> + case WCN36XX_HAL_ADD_STA_SELF_RSP:
> + wcn36xx_smd_add_sta_self_rsp(wcn, buf, len);
> + break;
> + case WCN36XX_HAL_STOP_RSP:
> + case WCN36XX_HAL_DEL_STA_SELF_RSP:
> + case WCN36XX_HAL_DELETE_STA_RSP:
> + case WCN36XX_HAL_INIT_SCAN_RSP:
> + case WCN36XX_HAL_START_SCAN_RSP:
> + case WCN36XX_HAL_END_SCAN_RSP:
> + case WCN36XX_HAL_FINISH_SCAN_RSP:
> + case WCN36XX_HAL_DOWNLOAD_NV_RSP:
> + case WCN36XX_HAL_DELETE_BSS_RSP:
> + case WCN36XX_HAL_SEND_BEACON_RSP:
> + case WCN36XX_HAL_SET_LINK_ST_RSP:
> + case WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_RSP:
> + case WCN36XX_HAL_SET_BSSKEY_RSP:
> + case WCN36XX_HAL_SET_STAKEY_RSP:
> + case WCN36XX_HAL_RMV_STAKEY_RSP:
> + case WCN36XX_HAL_RMV_BSSKEY_RSP:
> + case WCN36XX_HAL_ENTER_BMPS_RSP:
> + case WCN36XX_HAL_EXIT_BMPS_RSP:
> + case WCN36XX_HAL_KEEP_ALIVE_RSP:
> + case WCN36XX_HAL_DUMP_COMMAND_RSP:
> + case WCN36XX_HAL_ADD_BA_SESSION_RSP:
> + case WCN36XX_HAL_ADD_BA_RSP:
> + case WCN36XX_HAL_DEL_BA_RSP:
> + case WCN36XX_HAL_TRIGGER_BA_RSP:
> + case WCN36XX_HAL_UPDATE_CFG_RSP:
> + if (wcn36xx_smd_rsp_status_check(buf, len)) {
> + wcn36xx_warn("error response from hal request %d\n",
> + msg_header->msg_type);
> + }
> + break;
> + case WCN36XX_HAL_JOIN_RSP:
> + wcn36xx_smd_join_rsp(buf, len);
> + break;
> + case WCN36XX_HAL_UPDATE_SCAN_PARAM_RSP:
> + wcn36xx_smd_update_scan_params_rsp(buf, len);
> + break;
> + case WCN36XX_HAL_CH_SWITCH_RSP:
> + wcn36xx_smd_switch_channel_rsp(buf, len);
> + break;
> + case WCN36XX_HAL_OTA_TX_COMPL_IND:
> + wcn36xx_smd_tx_compl_ind(wcn, buf, len);
> + break;
> + case WCN36XX_HAL_MISSED_BEACON_IND:
> + wcn36xx_smd_missed_beacon_ind(wcn, buf, len);
> + break;
> + case WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_RSP:
> + wcn36xx_smd_feature_caps_exchange_rsp(buf, len);
> + break;
> + case WCN36XX_HAL_DELETE_STA_CONTEXT_IND:
> + wcn36xx_smd_delete_sta_context_ind(wcn, buf, len);
> + break;
> + default:
> + wcn36xx_err("SMD_EVENT (%d) not supported\n",
> + msg_header->msg_type);
> + }
> +}
> +
> +int wcn36xx_smd_open(struct wcn36xx *wcn)
> +{
> + return wcn->ctrl_ops->open(wcn, wcn36xx_smd_rsp_process);
> +}
> +
> +void wcn36xx_smd_close(struct wcn36xx *wcn)
> +{
> + wcn->ctrl_ops->close();
> +}
> diff --git a/drivers/net/wireless/ath/wcn36xx/smd.h b/drivers/net/wireless/ath/wcn36xx/smd.h
> new file mode 100644
> index 0000000..5ea54d2
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/smd.h
> @@ -0,0 +1,121 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#ifndef _SMD_H_
> +#define _SMD_H_
> +
> +#include "wcn36xx.h"
> +
> +/* Max shared size is 4k but we take less.*/
> +#define WCN36XX_NV_FRAGMENT_SIZE 3072
> +
> +#define WCN36XX_SMD_BUF_SIZE 4096
> +
> +#define SMD_MSG_TIMEOUT 200
> +#define WCN36XX_SMSM_WLAN_TX_ENABLE 0x00000400
> +#define WCN36XX_SMSM_WLAN_TX_RINGS_EMPTY 0x00000200
> +/* The PNO version info be contained in the rsp msg */
> +#define WCN36XX_FW_MSG_PNO_VERSION_MASK 0x8000
> +
> +enum wcn36xx_fw_msg_result {
> + WCN36XX_FW_MSG_RESULT_SUCCESS = 0,
> + WCN36XX_FW_MSG_RESULT_SUCCESS_SYNC = 1,
> +
> + WCN36XX_FW_MSG_RESULT_MEM_FAIL = 5,
> +};
> +
> +/******************************/
> +/* SMD requests and responses */
> +/******************************/
> +struct wcn36xx_fw_msg_status_rsp {
> + u32 status;
> +} __packed;
> +
> +struct wcn36xx;
> +
> +int wcn36xx_smd_open(struct wcn36xx *wcn);
> +void wcn36xx_smd_close(struct wcn36xx *wcn);
> +
> +int wcn36xx_smd_load_nv(struct wcn36xx *wcn);
> +int wcn36xx_smd_start(struct wcn36xx *wcn);
> +int wcn36xx_smd_stop(struct wcn36xx *wcn);
> +int wcn36xx_smd_init_scan(struct wcn36xx *wcn);
> +int wcn36xx_smd_start_scan(struct wcn36xx *wcn);
> +int wcn36xx_smd_end_scan(struct wcn36xx *wcn);
> +int wcn36xx_smd_finish_scan(struct wcn36xx *wcn);
> +int wcn36xx_smd_update_scan_params(struct wcn36xx *wcn);
> +int wcn36xx_smd_add_sta_self(struct wcn36xx *wcn, u8 *addr);
> +int wcn36xx_smd_delete_sta_self(struct wcn36xx *wcn, u8 *addr);
> +int wcn36xx_smd_delete_sta(struct wcn36xx *wcn, u8 sta_index);
> +int wcn36xx_smd_join(struct wcn36xx *wcn, const u8 *bssid, u8 *vif, u8 ch);
> +int wcn36xx_smd_set_link_st(struct wcn36xx *wcn, const u8 *bssid,
> + const u8 *sta_mac,
> + enum wcn36xx_hal_link_state state);
> +int wcn36xx_smd_config_bss(struct wcn36xx *wcn, struct ieee80211_vif *vif,
> + struct ieee80211_sta *sta, const u8 *bssid,
> + bool update);
> +int wcn36xx_smd_delete_bss(struct wcn36xx *wcn);
> +int wcn36xx_smd_config_sta(struct wcn36xx *wcn, struct ieee80211_vif *vif,
> + struct ieee80211_sta *sta);
> +int wcn36xx_smd_send_beacon(struct wcn36xx *wcn, struct sk_buff *skb_beacon,
> + u16 tim_off, u16 p2p_off);
> +int wcn36xx_smd_switch_channel(struct wcn36xx *wcn, int ch);
> +int wcn36xx_smd_update_proberesp_tmpl(struct wcn36xx *wcn, struct sk_buff *skb);
> +int wcn36xx_smd_set_stakey(struct wcn36xx *wcn,
> + enum ani_ed_type enc_type,
> + u8 keyidx,
> + u8 keylen,
> + u8 *key,
> + u8 sta_index);
> +int wcn36xx_smd_set_bsskey(struct wcn36xx *wcn,
> + enum ani_ed_type enc_type,
> + u8 keyidx,
> + u8 keylen,
> + u8 *key);
> +int wcn36xx_smd_remove_stakey(struct wcn36xx *wcn,
> + enum ani_ed_type enc_type,
> + u8 keyidx,
> + u8 sta_index);
> +int wcn36xx_smd_remove_bsskey(struct wcn36xx *wcn,
> + enum ani_ed_type enc_type,
> + u8 keyidx);
> +int wcn36xx_smd_enter_bmps(struct wcn36xx *wcn, u64 tbtt);
> +int wcn36xx_smd_exit_bmps(struct wcn36xx *wcn);
> +int wcn36xx_smd_keep_alive_req(struct wcn36xx *wcn, int packet_type);
> +int wcn36xx_smd_dump_cmd_req(struct wcn36xx *wcn, u32 arg1, u32 arg2,
> + u32 arg3, u32 arg4, u32 arg5);
> +int wcn36xx_smd_feature_caps_exchange(struct wcn36xx *wcn);
> +
> +int wcn36xx_smd_add_ba_session(struct wcn36xx *wcn,
> + struct ieee80211_sta *sta,
> + u16 tid,
> + u16 *ssn,
> + u8 direction,
> + u8 sta_index);
> +int wcn36xx_smd_add_ba(struct wcn36xx *wcn);
> +int wcn36xx_smd_del_ba(struct wcn36xx *wcn, u16 tid, u8 sta_index);
> +int wcn36xx_smd_trigger_ba(struct wcn36xx *wcn, u8 sta_index);
> +
> +int wcn36xx_smd_update_cfg(struct wcn36xx *wcn, u32 cfg_id, u32 value);
> +/* WCN36XX configuration parameters */
> +struct wcn36xx_fw_cfg {
> + u16 id;
> + u16 len;
> + u16 pad_bytes;
> + u16 reserved;
> + u8 *val;
> +};
> +#endif /* _SMD_H_ */
> diff --git a/drivers/net/wireless/ath/wcn36xx/txrx.c b/drivers/net/wireless/ath/wcn36xx/txrx.c
> new file mode 100644
> index 0000000..f49ec20
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/txrx.c
> @@ -0,0 +1,256 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
> +
> +#include "txrx.h"
> +
> +static inline int get_rssi0(struct wcn36xx_rx_bd *bd)
> +{
> + return 100 - ((bd->phy_stat0 >> 24) & 0xff);
> +}
> +
> +int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
> +{
> + struct ieee80211_rx_status status;
> + struct ieee80211_hdr *hdr;
> + struct wcn36xx_rx_bd *bd;
> + u16 fc, sn;
> +
> + /*
> + * All fields must be 0, otherwise it can lead to
> + * unexpected consequences.
> + */
> + memset(&status, 0, sizeof(status));
> +
> + bd = (struct wcn36xx_rx_bd *)skb->data;
> + buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32));
> + wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP,
> + "BD <<< ", (char *)bd,
> + sizeof(struct wcn36xx_rx_bd));
> +
> + skb_put(skb, bd->pdu.mpdu_header_off + bd->pdu.mpdu_len);
> + skb_pull(skb, bd->pdu.mpdu_header_off);
> +
> + status.mactime = 10;
> + status.freq = WCN36XX_CENTER_FREQ(wcn);
> + status.band = WCN36XX_BAND(wcn);
> + status.signal = -get_rssi0(bd);
> + status.antenna = 1;
> + status.rate_idx = 1;
> + status.flag = 0;
> + status.rx_flags = 0;
> + status.flag |= RX_FLAG_IV_STRIPPED |
> + RX_FLAG_MMIC_STRIPPED |
> + RX_FLAG_DECRYPTED;
> +
> + wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x status->vendor_radiotap_len=%x\n",
> + status.flag, status.vendor_radiotap_len);
> +
> + memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
> +
> + hdr = (struct ieee80211_hdr *) skb->data;
> + fc = __le16_to_cpu(hdr->frame_control);
> + sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl));
> +
> + if (ieee80211_is_beacon(hdr->frame_control)) {
> + wcn36xx_dbg(WCN36XX_DBG_BEACON, "beacon skb %p len %d fc %04x sn %d\n",
> + skb, skb->len, fc, sn);
> + wcn36xx_dbg_dump(WCN36XX_DBG_BEACON_DUMP, "SKB <<< ",
> + (char *)skb->data, skb->len);
> + } else {
> + wcn36xx_dbg(WCN36XX_DBG_RX, "rx skb %p len %d fc %04x sn %d\n",
> + skb, skb->len, fc, sn);
> + wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, "SKB <<< ",
> + (char *)skb->data, skb->len);
> + }
> +
> + ieee80211_rx_irqsafe(wcn->hw, skb);
> +
> + return 0;
> +}
> +
> +static void wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd *bd,
> + u32 mpdu_header_len,
> + u32 len,
> + u16 tid)
> +{
> + bd->pdu.mpdu_header_len = mpdu_header_len;
> + bd->pdu.mpdu_header_off = sizeof(*bd);
> + bd->pdu.mpdu_data_off = bd->pdu.mpdu_header_len +
> + bd->pdu.mpdu_header_off;
> + bd->pdu.mpdu_len = len;
> + bd->pdu.tid = tid;
> +}
> +
> +static void wcn36xx_set_tx_data(struct wcn36xx_tx_bd *bd,
> + struct wcn36xx *wcn,
> + struct wcn36xx_sta *sta_priv,
> + struct ieee80211_hdr *hdr,
> + bool bcast)
> +{
> + struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
> + struct ieee80211_vif,
> + drv_priv);
> + bd->bd_rate = WCN36XX_BD_RATE_DATA;
> + bd->dpu_sign = wcn->current_vif->ucast_dpu_signature;
> +
> + /*
> + * For not unicast frames mac80211 will not set sta pointer so use
> + * self_sta_index instead.
> + */
> + if (sta_priv) {
> + if (vif->type == NL80211_IFTYPE_STATION) {
> + bd->sta_index = sta_priv->bss_sta_index;
> + bd->dpu_desc_idx = sta_priv->bss_dpu_desc_index;
> + } else if (vif->type == NL80211_IFTYPE_AP ||
> + vif->type == NL80211_IFTYPE_ADHOC ||
> + vif->type == NL80211_IFTYPE_MESH_POINT) {
> + bd->sta_index = sta_priv->sta_index;
> + bd->dpu_desc_idx = sta_priv->dpu_desc_index;
> + }
> + } else {
> + bd->sta_index = wcn->current_vif->self_sta_index;
> + bd->dpu_desc_idx = wcn->current_vif->self_dpu_desc_index;
> + }
> +
> + if (ieee80211_is_nullfunc(hdr->frame_control) ||
> + (sta_priv && !sta_priv->is_data_encrypted))
> + bd->dpu_ne = 1;
> +
> + if (bcast) {
> + bd->ub = 1;
> + bd->ack_policy = 1;
> + }
> +}
> +
> +static void wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd *bd,
> + struct wcn36xx *wcn,
> + struct ieee80211_hdr *hdr,
> + bool bcast)
> +{
> + bd->sta_index = wcn->current_vif->self_sta_index;
> + bd->dpu_desc_idx = wcn->current_vif->self_dpu_desc_index;
> + bd->dpu_ne = 1;
> +
> + /* default rate for unicast */
> + if (ieee80211_is_mgmt(hdr->frame_control))
> + bd->bd_rate = (WCN36XX_BAND(wcn) == IEEE80211_BAND_5GHZ) ?
> + WCN36XX_BD_RATE_CTRL :
> + WCN36XX_BD_RATE_MGMT;
> + else if (ieee80211_is_ctl(hdr->frame_control))
> + bd->bd_rate = WCN36XX_BD_RATE_CTRL;
> + else
> + wcn36xx_warn("frame control type unknown\n");
> +
> + /*
> + * In joining state trick hardware that probe is sent as
> + * unicast even if address is broadcast.
> + */
> + if (wcn->is_joining &&
> + ieee80211_is_probe_req(hdr->frame_control))
> + bcast = false;
> +
> + if (bcast) {
> + /* broadcast */
> + bd->ub = 1;
> + /* No ack needed not unicast */
> + bd->ack_policy = 1;
> + bd->queue_id = WCN36XX_TX_B_WQ_ID;
> + } else
> + bd->queue_id = WCN36XX_TX_U_WQ_ID;
> +}
> +
> +int wcn36xx_start_tx(struct wcn36xx *wcn,
> + struct wcn36xx_sta *sta_priv,
> + struct sk_buff *skb)
> +{
> + struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
> + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
> + unsigned long flags;
> + bool is_low = ieee80211_is_data(hdr->frame_control);
> + bool bcast = is_broadcast_ether_addr(hdr->addr1) ||
> + is_multicast_ether_addr(hdr->addr1);
> + struct wcn36xx_tx_bd *bd = wcn36xx_dxe_get_next_bd(wcn, is_low);
> +
> + if (!bd) {
> + /*
> + * TX DXE are used in pairs. One for the BD and one for the
> + * actual frame. The BD DXE's has a preallocated buffer while
> + * the skb ones does not. If this isn't true something is really
> + * wierd. TODO: Recover from this situation
> + */
> +
> + wcn36xx_err("bd address may not be NULL for BD DXE\n");
> + return -EINVAL;
> + }
> +
> + memset(bd, 0, sizeof(*bd));
> +
> + wcn36xx_dbg(WCN36XX_DBG_TX,
> + "tx skb %p len %d fc %04x sn %d %s %s\n",
> + skb, skb->len, __le16_to_cpu(hdr->frame_control),
> + IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)),
> + is_low ? "low" : "high", bcast ? "bcast" : "ucast");
> +
> + wcn36xx_dbg_dump(WCN36XX_DBG_TX_DUMP, "", skb->data, skb->len);
> +
> + bd->dpu_rf = WCN36XX_BMU_WQ_TX;
> +
> + bd->tx_comp = info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS;
> + if (bd->tx_comp) {
> + wcn36xx_dbg(WCN36XX_DBG_DXE, "TX_ACK status requested\n");
> + spin_lock_irqsave(&wcn->dxe_lock, flags);
> + if (wcn->tx_ack_skb) {
> + spin_unlock_irqrestore(&wcn->dxe_lock, flags);
> + wcn36xx_warn("tx_ack_skb already set\n");
> + return -EINVAL;
> + }
> +
> + wcn->tx_ack_skb = skb;
> + spin_unlock_irqrestore(&wcn->dxe_lock, flags);
> +
> + /* Only one at a time is supported by fw. Stop the TX queues
> + * until the ack status gets back.
> + *
> + * TODO: Add watchdog in case FW does not answer
> + */
> + ieee80211_stop_queues(wcn->hw);
> + }
> +
> + /* Data frames served first*/
> + if (is_low) {
> + wcn36xx_set_tx_data(bd, wcn, sta_priv, hdr, bcast);
> + wcn36xx_set_tx_pdu(bd,
> + ieee80211_is_data_qos(hdr->frame_control) ?
> + sizeof(struct ieee80211_qos_hdr) :
> + sizeof(struct ieee80211_hdr_3addr),
> + skb->len, sta_priv ? sta_priv->tid : 0);
> + } else {
> + /* MGMT and CTRL frames are handeld here*/
> + wcn36xx_set_tx_mgmt(bd, wcn, hdr, bcast);
> + wcn36xx_set_tx_pdu(bd,
> + ieee80211_is_data_qos(hdr->frame_control) ?
> + sizeof(struct ieee80211_qos_hdr) :
> + sizeof(struct ieee80211_hdr_3addr),
> + skb->len, WCN36XX_TID);
> + }
> +
> + buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32));
> + bd->tx_bd_sign = 0xbdbdbdbd;
> +
> + return wcn36xx_dxe_tx_frame(wcn, skb, is_low);
> +}
> diff --git a/drivers/net/wireless/ath/wcn36xx/txrx.h b/drivers/net/wireless/ath/wcn36xx/txrx.h
> new file mode 100644
> index 0000000..bbfbcf8
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/txrx.h
> @@ -0,0 +1,160 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#ifndef _TXRX_H_
> +#define _TXRX_H_
> +
> +#include <linux/etherdevice.h>
> +#include "wcn36xx.h"
> +
> +/* TODO describe all properties */
> +#define WCN36XX_802_11_HEADER_LEN 24
> +#define WCN36XX_BMU_WQ_TX 25
> +#define WCN36XX_TID 7
> +/* broadcast wq ID */
> +#define WCN36XX_TX_B_WQ_ID 0xA
> +#define WCN36XX_TX_U_WQ_ID 0x9
> +/* bd_rate */
> +#define WCN36XX_BD_RATE_DATA 0
> +#define WCN36XX_BD_RATE_MGMT 2
> +#define WCN36XX_BD_RATE_CTRL 3
> +
> +struct wcn36xx_pdu {
> + u32 dpu_fb:8;
> + u32 adu_fb:8;
> + u32 pdu_id:16;
> +
> + /* 0x04*/
> + u32 tail_pdu_idx:16;
> + u32 head_pdu_idx:16;
> +
> + /* 0x08*/
> + u32 pdu_count:7;
> + u32 mpdu_data_off:9;
> + u32 mpdu_header_off:8;
> + u32 mpdu_header_len:8;
> +
> + /* 0x0c*/
> + u32 reserved4:8;
> + u32 tid:4;
> + u32 reserved3:4;
> + u32 mpdu_len:16;
> +};
> +
> +struct wcn36xx_rx_bd {
> + u32 bdt:2;
> + u32 ft:1;
> + u32 dpu_ne:1;
> + u32 rx_key_id:3;
> + u32 ub:1;
> + u32 rmf:1;
> + u32 uma_bypass:1;
> + u32 csr11:1;
> + u32 reserved0:1;
> + u32 scan_learn:1;
> + u32 rx_ch:4;
> + u32 rtsf:1;
> + u32 bsf:1;
> + u32 a2hf:1;
> + u32 st_auf:1;
> + u32 dpu_sign:3;
> + u32 dpu_rf:8;
> +
> + struct wcn36xx_pdu pdu;
> +
> + /* 0x14*/
> + u32 addr3:8;
> + u32 addr2:8;
> + u32 addr1:8;
> + u32 dpu_desc_idx:8;
> +
> + /* 0x18*/
> + u32 rxp_flags:23;
> + u32 rate_id:9;
> +
> + u32 phy_stat0;
> + u32 phy_stat1;
> +
> + /* 0x24 */
> + u32 rx_times;
> +
> + u32 pmi_cmd[6];
> +
> + /* 0x40 */
> + u32 reserved7:4;
> + u32 reorder_slot_id:6;
> + u32 reorder_fwd_id:6;
> + u32 reserved6:12;
> + u32 reorder_code:4;
> +
> + /* 0x44 */
> + u32 exp_seq_num:12;
> + u32 cur_seq_num:12;
> + u32 fr_type_subtype:8;
> +
> + /* 0x48 */
> + u32 msdu_size:16;
> + u32 sub_fr_id:4;
> + u32 proc_order:4;
> + u32 reserved9:4;
> + u32 aef:1;
> + u32 lsf:1;
> + u32 esf:1;
> + u32 asf:1;
> +};
> +
> +struct wcn36xx_tx_bd {
> + u32 bdt:2;
> + u32 ft:1;
> + u32 dpu_ne:1;
> + u32 fw_tx_comp:1;
> + u32 tx_comp:1;
> + u32 reserved1:1;
> + u32 ub:1;
> + u32 rmf:1;
> + u32 reserved0:12;
> + u32 dpu_sign:3;
> + u32 dpu_rf:8;
> +
> + struct wcn36xx_pdu pdu;
> +
> + /* 0x14*/
> + u32 reserved5:7;
> + u32 queue_id:5;
> + u32 bd_rate:2;
> + u32 ack_policy:2;
> + u32 sta_index:8;
> + u32 dpu_desc_idx:8;
> +
> + u32 tx_bd_sign;
> + u32 reserved6;
> + u32 dxe_start_time;
> + u32 dxe_end_time;
> +
> + /*u32 tcp_udp_start_off:10;
> + u32 header_cks:16;
> + u32 reserved7:6;*/
> +};
> +
> +struct wcn36xx_sta;
> +struct wcn36xx;
> +
> +int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb);
> +int wcn36xx_start_tx(struct wcn36xx *wcn,
> + struct wcn36xx_sta *sta_priv,
> + struct sk_buff *skb);
> +
> +#endif /* _TXRX_H_ */
> diff --git a/drivers/net/wireless/ath/wcn36xx/wcn36xx.h b/drivers/net/wireless/ath/wcn36xx/wcn36xx.h
> new file mode 100644
> index 0000000..61f579d
> --- /dev/null
> +++ b/drivers/net/wireless/ath/wcn36xx/wcn36xx.h
> @@ -0,0 +1,236 @@
> +/*
> + * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
> + *
> + * Permission to use, copy, modify, and/or distribute this software for any
> + * purpose with or without fee is hereby granted, provided that the above
> + * copyright notice and this permission notice appear in all copies.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
> + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
> + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
> + * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
> + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
> + * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
> + * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
> + */
> +
> +#ifndef _WCN36XX_H_
> +#define _WCN36XX_H_
> +
> +#include <linux/completion.h>
> +#include <linux/printk.h>
> +#include <linux/spinlock.h>
> +#include <net/mac80211.h>
> +
> +#include "hal.h"
> +#include "smd.h"
> +#include "txrx.h"
> +#include "dxe.h"
> +#include "pmc.h"
> +#include "debug.h"
> +
> +#define WLAN_NV_FILE "wlan/prima/WCNSS_qcom_wlan_nv.bin"
> +#define WCN36XX_AGGR_BUFFER_SIZE 64
> +
> +extern unsigned int debug_mask;
> +
> +enum wcn36xx_debug_mask {
> + WCN36XX_DBG_DXE = 0x00000001,
> + WCN36XX_DBG_DXE_DUMP = 0x00000002,
> + WCN36XX_DBG_SMD = 0x00000004,
> + WCN36XX_DBG_SMD_DUMP = 0x00000008,
> + WCN36XX_DBG_RX = 0x00000010,
> + WCN36XX_DBG_RX_DUMP = 0x00000020,
> + WCN36XX_DBG_TX = 0x00000040,
> + WCN36XX_DBG_TX_DUMP = 0x00000080,
> + WCN36XX_DBG_HAL = 0x00000100,
> + WCN36XX_DBG_HAL_DUMP = 0x00000200,
> + WCN36XX_DBG_MAC = 0x00000400,
> + WCN36XX_DBG_BEACON = 0x00000800,
> + WCN36XX_DBG_BEACON_DUMP = 0x00001000,
> + WCN36XX_DBG_PMC = 0x00002000,
> + WCN36XX_DBG_PMC_DUMP = 0x00004000,
> + WCN36XX_DBG_ANY = 0xffffffff,
> +};
> +
> +#define wcn36xx_err(fmt, arg...) \
> + printk(KERN_ERR pr_fmt("ERROR " fmt), ##arg);
> +
> +#define wcn36xx_warn(fmt, arg...) \
> + printk(KERN_WARNING pr_fmt("WARNING " fmt), ##arg)
> +
> +#define wcn36xx_info(fmt, arg...) \
> + printk(KERN_INFO pr_fmt(fmt), ##arg)
> +
> +#define wcn36xx_dbg(mask, fmt, arg...) do { \
> + if (debug_mask & mask) \
> + printk(KERN_DEBUG pr_fmt(fmt), ##arg); \
> +} while (0)
> +
> +#define wcn36xx_dbg_dump(mask, prefix_str, buf, len) do { \
> + if (debug_mask & mask) \
> + print_hex_dump(KERN_DEBUG, pr_fmt(prefix_str), \
> + DUMP_PREFIX_OFFSET, 32, 1, \
> + buf, len, false); \
> +} while (0)
> +
> +#define WCN36XX_HW_CHANNEL(__wcn) (__wcn->hw->conf.chandef.chan->hw_value)
> +#define WCN36XX_BAND(__wcn) (__wcn->hw->conf.chandef.chan->band)
> +#define WCN36XX_CENTER_FREQ(__wcn) (__wcn->hw->conf.chandef.chan->center_freq)
> +#define WCN36XX_LISTEN_INTERVAL(__wcn) (__wcn->hw->conf.listen_interval)
> +#define WCN36XX_FLAGS(__wcn) (__wcn->hw->flags)
> +#define WCN36XX_MAX_POWER(__wcn) (__wcn->hw->conf.chandef.chan->max_power)
> +
> +static inline void buff_to_be(u32 *buf, size_t len)
> +{
> + int i;
> + for (i = 0; i < len; i++)
> + buf[i] = cpu_to_be32(buf[i]);
> +}
> +
> +struct nv_data {
> + int is_valid;
> + u8 table;
> +};
> +
> +/* Interface for platform control path
> + *
> + * @open: hook must be called when wcn36xx wants to open control channel.
> + * @tx: sends a buffer.
> + */
> +struct wcn36xx_platform_ctrl_ops {
> + int (*open)(void *drv_priv, void *rsp_cb);
> + void (*close)(void);
> + int (*tx)(char *buf, size_t len);
> + int (*get_hw_mac)(u8 *addr);
> + int (*smsm_change_state)(u32 clear_mask, u32 set_mask);
> +};
> +
> +/**
> + * struct wcn36xx_vif - holds VIF related fields
> + *
> + * @bss_index: bss_index is initially set to 0xFF. bss_index is received from
> + * HW after first config_bss call and must be used in delete_bss and
> + * enter/exit_bmps.
> + */
> +struct wcn36xx_vif {
> + u8 bss_index;
> + u8 ucast_dpu_signature;
> + /* Returned from WCN36XX_HAL_ADD_STA_SELF_RSP */
> + u8 self_sta_index;
> + u8 self_dpu_desc_index;
> +};
> +
> +/**
> + * struct wcn36xx_sta - holds STA related fields
> + *
> + * @tid: traffic ID that is used during AMPDU and in TX BD.
> + * @sta_index: STA index is returned from HW after config_sta call and is
> + * used in both SMD channel and TX BD.
> + * @dpu_desc_index: DPU descriptor index is returned from HW after config_sta
> + * call and is used in TX BD.
> + * @bss_sta_index: STA index is returned from HW after config_bss call and is
> + * used in both SMD channel and TX BD. See table bellow when it is used.
> + * @bss_dpu_desc_index: DPU descriptor index is returned from HW after
> + * config_bss call and is used in TX BD.
> + * ______________________________________________
> + * | | STA | AP |
> + * |______________|_____________|_______________|
> + * | TX BD |bss_sta_index| sta_index |
> + * |______________|_____________|_______________|
> + * |all SMD calls |bss_sta_index| sta_index |
> + * |______________|_____________|_______________|
> + * |smd_delete_sta| sta_index | sta_index |
> + * |______________|_____________|_______________|
> + */
> +struct wcn36xx_sta {
> + u16 tid;
> + u8 sta_index;
> + u8 dpu_desc_index;
> + u8 bss_sta_index;
> + u8 bss_dpu_desc_index;
> + bool is_data_encrypted;
> +};
> +struct wcn36xx_dxe_ch;
> +struct wcn36xx {
> + struct ieee80211_hw *hw;
> + struct device *dev;
> + struct mac_address addresses;
> + struct wcn36xx_hal_mac_ssid ssid;
> + u16 aid;
> + struct wcn36xx_vif *current_vif;
> + struct wcn36xx_sta *sta;
> + u8 dtim_period;
> + enum ani_ed_type encrypt_type;
> +
> + /* WoW related*/
> + struct mutex pm_mutex;
> + bool is_suspended;
> + bool is_con_lost_pending;
> +
> + u8 fw_revision;
> + u8 fw_version;
> + u8 fw_minor;
> + u8 fw_major;
> +
> + /* extra byte for the NULL termination */
> + u8 crm_version[WCN36XX_HAL_VERSION_LENGTH + 1];
> + u8 wlan_version[WCN36XX_HAL_VERSION_LENGTH + 1];
> +
> + /* IRQs */
> + int tx_irq;
> + int rx_irq;
> + void __iomem *mmio;
> +
> + /* Rates */
> + struct wcn36xx_hal_supported_rates supported_rates;
> +
> + struct wcn36xx_platform_ctrl_ops *ctrl_ops;
> + /*
> + * smd_buf must be protected with smd_mutex to garantee
> + * that all messages are sent one after another
> + */
> + u8 *smd_buf;
> + struct mutex smd_mutex;
> +
> + bool is_joining;
> +
> + /* DXE channels */
> + struct wcn36xx_dxe_ch dxe_tx_l_ch; /* TX low */
> + struct wcn36xx_dxe_ch dxe_tx_h_ch; /* TX high */
> + struct wcn36xx_dxe_ch dxe_rx_l_ch; /* RX low */
> + struct wcn36xx_dxe_ch dxe_rx_h_ch; /* RX high */
> +
> + /* For synchronization of DXE resources from BH, IRQ and WQ contexts */
> + spinlock_t dxe_lock;
> + bool queues_stopped;
> +
> + /* Memory pools */
> + struct wcn36xx_dxe_mem_pool mgmt_mem_pool;
> + struct wcn36xx_dxe_mem_pool data_mem_pool;
> +
> + struct sk_buff *tx_ack_skb;
> +
> + /* Power management */
> + enum wcn36xx_power_state pw_state;
> +
> +#ifdef CONFIG_WCN36XX_DEBUGFS
> + /* Debug file system entry */
> + struct wcn36xx_dfs_entry dfs;
> +#endif /* CONFIG_WCN36XX_DEBUGFS */
> +
> +};
> +
> +static inline bool wcn36xx_is_fw_version(struct wcn36xx *wcn,
> + u8 major,
> + u8 minor,
> + u8 version,
> + u8 revision)
> +{
> + return (wcn->fw_major == major &&
> + wcn->fw_minor == minor &&
> + wcn->fw_version == version &&
> + wcn->fw_revision == revision);
> +}
> +
> +#endif /* _WCN36XX_H_ */
> --
> 1.8.2.2
>
--
Best regards,
Eugene
^ permalink raw reply
* [PATCH] wcn36xx: mac80211 driver for Qualcomm WCN3660/WCN3680 hardware
From: Eugene Krasnikov @ 2013-09-02 10:38 UTC (permalink / raw)
To: linville; +Cc: linux-wireless, wcn36xx, Eugene Krasnikov
This is a mac80211 driver for Qualcomm WCN3660/WCN3680 devices. So
far WCN3660/WCN3680 is available only on MSM platform.
Firmware can be found here:
https://github.com/AOKP/vendor_sony/find/jb-mr1
Wiki page is available here:
http://wireless.kernel.org/en/users/Drivers/wcn36xx
A lot people made a contribution to this driver. Here is the list in
alphabetical order:
Eugene Krasnikov <k.eugene.e@gmail.com>
Kalle Valo <kvalo@qca.qualcomm.com>
Olof Johansson <dev@skyshaper.net>
Pontus Fuchs <pontus.fuchs@gmail.com>
Yanbo Li <yanbol@qti.qualcomm.com>
Signed-off-by: Eugene Krasnikov <k.eugene.e@gmail.com>
---
MAINTAINERS | 8 +
drivers/net/wireless/ath/Kconfig | 1 +
drivers/net/wireless/ath/Makefile | 1 +
drivers/net/wireless/ath/wcn36xx/Kconfig | 16 +
drivers/net/wireless/ath/wcn36xx/Makefile | 7 +
drivers/net/wireless/ath/wcn36xx/debug.c | 166 +
drivers/net/wireless/ath/wcn36xx/debug.h | 49 +
drivers/net/wireless/ath/wcn36xx/dxe.c | 804 +++++
drivers/net/wireless/ath/wcn36xx/dxe.h | 281 ++
drivers/net/wireless/ath/wcn36xx/hal.h | 4657 ++++++++++++++++++++++++++++
drivers/net/wireless/ath/wcn36xx/main.c | 1029 ++++++
drivers/net/wireless/ath/wcn36xx/pmc.c | 46 +
drivers/net/wireless/ath/wcn36xx/pmc.h | 32 +
drivers/net/wireless/ath/wcn36xx/smd.c | 1529 +++++++++
drivers/net/wireless/ath/wcn36xx/smd.h | 121 +
drivers/net/wireless/ath/wcn36xx/txrx.c | 256 ++
drivers/net/wireless/ath/wcn36xx/txrx.h | 160 +
drivers/net/wireless/ath/wcn36xx/wcn36xx.h | 236 ++
18 files changed, 9399 insertions(+)
create mode 100644 drivers/net/wireless/ath/wcn36xx/Kconfig
create mode 100644 drivers/net/wireless/ath/wcn36xx/Makefile
create mode 100644 drivers/net/wireless/ath/wcn36xx/debug.c
create mode 100644 drivers/net/wireless/ath/wcn36xx/debug.h
create mode 100644 drivers/net/wireless/ath/wcn36xx/dxe.c
create mode 100644 drivers/net/wireless/ath/wcn36xx/dxe.h
create mode 100644 drivers/net/wireless/ath/wcn36xx/hal.h
create mode 100644 drivers/net/wireless/ath/wcn36xx/main.c
create mode 100644 drivers/net/wireless/ath/wcn36xx/pmc.c
create mode 100644 drivers/net/wireless/ath/wcn36xx/pmc.h
create mode 100644 drivers/net/wireless/ath/wcn36xx/smd.c
create mode 100644 drivers/net/wireless/ath/wcn36xx/smd.h
create mode 100644 drivers/net/wireless/ath/wcn36xx/txrx.c
create mode 100644 drivers/net/wireless/ath/wcn36xx/txrx.h
create mode 100644 drivers/net/wireless/ath/wcn36xx/wcn36xx.h
diff --git a/MAINTAINERS b/MAINTAINERS
index 2116b9a..01c705e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -6733,6 +6733,14 @@ L: linux-hexagon@vger.kernel.org
S: Supported
F: arch/hexagon/
+QUALCOMM WCN36XX WIRELESS DRIVER
+M: Eugene Krasnikov <k.eugene.e@gmail.com>
+L: wcn36xx@lists.infradead.org
+W: http://wireless.kernel.org/en/users/Drivers/wcn36xx
+T: git git://github.com/KrasnikovEugene/wcn36xx.git
+S: Supported
+F: drivers/net/wireless/ath/wcn36xx/
+
QUICKCAM PARALLEL PORT WEBCAMS
M: Hans Verkuil <hverkuil@xs4all.nl>
L: linux-media@vger.kernel.org
diff --git a/drivers/net/wireless/ath/Kconfig b/drivers/net/wireless/ath/Kconfig
index 1abf1d4..ba81d62 100644
--- a/drivers/net/wireless/ath/Kconfig
+++ b/drivers/net/wireless/ath/Kconfig
@@ -32,5 +32,6 @@ source "drivers/net/wireless/ath/ath6kl/Kconfig"
source "drivers/net/wireless/ath/ar5523/Kconfig"
source "drivers/net/wireless/ath/wil6210/Kconfig"
source "drivers/net/wireless/ath/ath10k/Kconfig"
+source "drivers/net/wireless/ath/wcn36xx/Kconfig"
endif
diff --git a/drivers/net/wireless/ath/Makefile b/drivers/net/wireless/ath/Makefile
index fb05cfd..363b056 100644
--- a/drivers/net/wireless/ath/Makefile
+++ b/drivers/net/wireless/ath/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_ATH6KL) += ath6kl/
obj-$(CONFIG_AR5523) += ar5523/
obj-$(CONFIG_WIL6210) += wil6210/
obj-$(CONFIG_ATH10K) += ath10k/
+obj-$(CONFIG_WCN36XX) += wcn36xx/
obj-$(CONFIG_ATH_COMMON) += ath.o
diff --git a/drivers/net/wireless/ath/wcn36xx/Kconfig b/drivers/net/wireless/ath/wcn36xx/Kconfig
new file mode 100644
index 0000000..591ebae
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/Kconfig
@@ -0,0 +1,16 @@
+config WCN36XX
+ tristate "Qualcomm Atheros WCN3660/3680 support"
+ depends on MAC80211 && HAS_DMA
+ ---help---
+ This module adds support for wireless adapters based on
+ Qualcomm Atheros WCN3660 and WCN3680 mobile chipsets.
+
+ If you choose to build a module, it'll be called wcn36xx.
+
+config WCN36XX_DEBUGFS
+ bool "WCN36XX debugfs support"
+ depends on WCN36XX
+ ---help---
+ Enabled debugfs support
+
+ If unsure, say Y to make it easier to debug problems.
diff --git a/drivers/net/wireless/ath/wcn36xx/Makefile b/drivers/net/wireless/ath/wcn36xx/Makefile
new file mode 100644
index 0000000..24ca549
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/Makefile
@@ -0,0 +1,7 @@
+obj-$(CONFIG_WCN36XX) := wcn36xx.o
+wcn36xx-y += main.o \
+ dxe.o \
+ txrx.o \
+ smd.o \
+ pmc.o \
+ debug.o
diff --git a/drivers/net/wireless/ath/wcn36xx/debug.c b/drivers/net/wireless/ath/wcn36xx/debug.c
new file mode 100644
index 0000000..91508f3
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/debug.c
@@ -0,0 +1,166 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/debugfs.h>
+#include <linux/uaccess.h>
+#include "wcn36xx.h"
+#include "debug.h"
+#include "pmc.h"
+
+#ifdef CONFIG_WCN36XX_DEBUGFS
+
+static int wcn36xx_debugfs_open(struct inode *inode, struct file *file)
+{
+ file->private_data = inode->i_private;
+
+ return 0;
+}
+
+static ssize_t read_file_bool_bmps(struct file *file, char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ struct wcn36xx *wcn = file->private_data;
+ char buf[3];
+
+ if (wcn->pw_state == WCN36XX_BMPS)
+ buf[0] = '1';
+ else
+ buf[0] = '0';
+
+ buf[1] = '\n';
+ buf[2] = 0x00;
+
+ return simple_read_from_buffer(user_buf, count, ppos, buf, 2);
+}
+
+static ssize_t write_file_bool_bmps(struct file *file,
+ const char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ struct wcn36xx *wcn = file->private_data;
+ struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
+ struct ieee80211_vif,
+ drv_priv);
+ char buf[32];
+ int buf_size;
+
+ buf_size = min(count, (sizeof(buf)-1));
+ if (copy_from_user(buf, user_buf, buf_size))
+ return -EFAULT;
+
+ switch (buf[0]) {
+ case 'y':
+ case 'Y':
+ case '1':
+ wcn36xx_enable_keep_alive_null_packet(wcn);
+ wcn36xx_pmc_enter_bmps_state(wcn, vif->bss_conf.sync_tsf);
+ break;
+ case 'n':
+ case 'N':
+ case '0':
+ wcn36xx_pmc_exit_bmps_state(wcn);
+ break;
+ }
+
+ return count;
+}
+
+static const struct file_operations fops_wcn36xx_bmps = {
+ .open = wcn36xx_debugfs_open,
+ .read = read_file_bool_bmps,
+ .write = write_file_bool_bmps,
+};
+
+static ssize_t write_file_dump(struct file *file,
+ const char __user *user_buf,
+ size_t count, loff_t *ppos)
+{
+ struct wcn36xx *wcn = file->private_data;
+ char buf[255], *tmp;
+ int buf_size;
+ u32 arg[WCN36xx_MAX_DUMP_ARGS];
+ int i;
+
+ memset(buf, 0, sizeof(buf));
+ memset(arg, 0, sizeof(arg));
+
+ buf_size = min(count, (sizeof(buf) - 1));
+ if (copy_from_user(buf, user_buf, buf_size))
+ return -EFAULT;
+
+ tmp = buf;
+
+ for (i = 0; i < WCN36xx_MAX_DUMP_ARGS; i++) {
+ char *begin;
+ begin = strsep(&tmp, " ");
+ if (begin == NULL)
+ break;
+
+ if (kstrtoul(begin, 0, (unsigned long *)(arg + i)) != 0)
+ break;
+ }
+
+ wcn36xx_info("DUMP args is %d %d %d %d %d\n", arg[0], arg[1], arg[2],
+ arg[3], arg[4]);
+ wcn36xx_smd_dump_cmd_req(wcn, arg[0], arg[1], arg[2], arg[3], arg[4]);
+
+ return count;
+}
+
+static const struct file_operations fops_wcn36xx_dump = {
+ .open = wcn36xx_debugfs_open,
+ .write = write_file_dump,
+};
+
+#define ADD_FILE(name, mode, fop, priv_data) \
+ do { \
+ struct dentry *d; \
+ d = debugfs_create_file(__stringify(name), \
+ mode, dfs->rootdir, \
+ priv_data, fop); \
+ dfs->file_##name.dentry = d; \
+ if (IS_ERR(d)) { \
+ wcn36xx_warn("Create the debugfs entry failed");\
+ dfs->file_##name.dentry = NULL; \
+ } \
+ } while (0)
+
+
+void wcn36xx_debugfs_init(struct wcn36xx *wcn)
+{
+ struct wcn36xx_dfs_entry *dfs = &wcn->dfs;
+
+ dfs->rootdir = debugfs_create_dir(KBUILD_MODNAME,
+ wcn->hw->wiphy->debugfsdir);
+ if (IS_ERR(dfs->rootdir)) {
+ wcn36xx_warn("Create the debugfs failed\n");
+ dfs->rootdir = NULL;
+ }
+
+ ADD_FILE(bmps_switcher, S_IRUSR | S_IWUSR,
+ &fops_wcn36xx_bmps, wcn);
+ ADD_FILE(dump, S_IWUSR, &fops_wcn36xx_dump, wcn);
+}
+
+void wcn36xx_debugfs_exit(struct wcn36xx *wcn)
+{
+ struct wcn36xx_dfs_entry *dfs = &wcn->dfs;
+ debugfs_remove_recursive(dfs->rootdir);
+}
+
+#endif /* CONFIG_WCN36XX_DEBUGFS */
diff --git a/drivers/net/wireless/ath/wcn36xx/debug.h b/drivers/net/wireless/ath/wcn36xx/debug.h
new file mode 100644
index 0000000..46307aa
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/debug.h
@@ -0,0 +1,49 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _WCN36XX_DEBUG_H_
+#define _WCN36XX_DEBUG_H_
+
+#include <linux/kernel.h>
+
+#define WCN36xx_MAX_DUMP_ARGS 5
+
+#ifdef CONFIG_WCN36XX_DEBUGFS
+struct wcn36xx_dfs_file {
+ struct dentry *dentry;
+ u32 value;
+};
+
+struct wcn36xx_dfs_entry {
+ struct dentry *rootdir;
+ struct wcn36xx_dfs_file file_bmps_switcher;
+ struct wcn36xx_dfs_file file_dump;
+};
+
+void wcn36xx_debugfs_init(struct wcn36xx *wcn);
+void wcn36xx_debugfs_exit(struct wcn36xx *wcn);
+
+#else
+static inline void wcn36xx_debugfs_init(struct wcn36xx *wcn)
+{
+}
+static inline void wcn36xx_debugfs_exit(struct wcn36xx *wcn)
+{
+}
+
+#endif /* CONFIG_WCN36XX_DEBUGFS */
+
+#endif /* _WCN36XX_DEBUG_H_ */
diff --git a/drivers/net/wireless/ath/wcn36xx/dxe.c b/drivers/net/wireless/ath/wcn36xx/dxe.c
new file mode 100644
index 0000000..db1f413
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/dxe.c
@@ -0,0 +1,804 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/* DXE - DMA transfer engine
+ * we have 2 channels(High prio and Low prio) for TX and 2 channels for RX.
+ * through low channels data packets are transfered
+ * through high channels managment packets are transfered
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/interrupt.h>
+#include "wcn36xx.h"
+#include "txrx.h"
+
+void *wcn36xx_dxe_get_next_bd(struct wcn36xx *wcn, bool is_low)
+{
+ struct wcn36xx_dxe_ch *ch = is_low ?
+ &wcn->dxe_tx_l_ch :
+ &wcn->dxe_tx_h_ch;
+
+ return ch->head_blk_ctl->bd_cpu_addr;
+}
+
+static void wcn36xx_dxe_write_register(struct wcn36xx *wcn, int addr, int data)
+{
+ wcn36xx_dbg(WCN36XX_DBG_DXE,
+ "wcn36xx_dxe_write_register: addr=%x, data=%x\n",
+ addr, data);
+
+ writel(data, wcn->mmio + addr);
+}
+
+static void wcn36xx_dxe_read_register(struct wcn36xx *wcn, int addr, int *data)
+{
+ *data = readl(wcn->mmio + addr);
+
+ wcn36xx_dbg(WCN36XX_DBG_DXE,
+ "wcn36xx_dxe_read_register: addr=%x, data=%x\n",
+ addr, *data);
+}
+
+static void wcn36xx_dxe_free_ctl_block(struct wcn36xx_dxe_ch *ch)
+{
+ struct wcn36xx_dxe_ctl *ctl = ch->head_blk_ctl, *next;
+ int i;
+
+ for (i = 0; i < ch->desc_num && ctl; i++) {
+ next = ctl->next;
+ kfree(ctl);
+ ctl = next;
+ }
+}
+
+static int wcn36xx_dxe_allocate_ctl_block(struct wcn36xx_dxe_ch *ch)
+{
+ struct wcn36xx_dxe_ctl *prev_ctl = NULL;
+ struct wcn36xx_dxe_ctl *cur_ctl = NULL;
+ int i;
+
+ for (i = 0; i < ch->desc_num; i++) {
+ cur_ctl = kzalloc(sizeof(*cur_ctl), GFP_KERNEL);
+ if (!cur_ctl)
+ goto out_fail;
+
+ cur_ctl->ctl_blk_order = i;
+ if (i == 0) {
+ ch->head_blk_ctl = cur_ctl;
+ ch->tail_blk_ctl = cur_ctl;
+ } else if (ch->desc_num - 1 == i) {
+ prev_ctl->next = cur_ctl;
+ cur_ctl->next = ch->head_blk_ctl;
+ } else {
+ prev_ctl->next = cur_ctl;
+ }
+ prev_ctl = cur_ctl;
+ }
+
+ return 0;
+
+out_fail:
+ wcn36xx_dxe_free_ctl_block(ch);
+ return -ENOMEM;
+}
+
+int wcn36xx_dxe_alloc_ctl_blks(struct wcn36xx *wcn)
+{
+ int ret;
+
+ wcn->dxe_tx_l_ch.ch_type = WCN36XX_DXE_CH_TX_L;
+ wcn->dxe_tx_h_ch.ch_type = WCN36XX_DXE_CH_TX_H;
+ wcn->dxe_rx_l_ch.ch_type = WCN36XX_DXE_CH_RX_L;
+ wcn->dxe_rx_h_ch.ch_type = WCN36XX_DXE_CH_RX_H;
+
+ wcn->dxe_tx_l_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_TX_L;
+ wcn->dxe_tx_h_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_TX_H;
+ wcn->dxe_rx_l_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_RX_L;
+ wcn->dxe_rx_h_ch.desc_num = WCN36XX_DXE_CH_DESC_NUMB_RX_H;
+
+ wcn->dxe_tx_l_ch.dxe_wq = WCN36XX_DXE_WQ_TX_L;
+ wcn->dxe_tx_h_ch.dxe_wq = WCN36XX_DXE_WQ_TX_H;
+
+ wcn->dxe_tx_l_ch.ctrl_bd = WCN36XX_DXE_CTRL_TX_L_BD;
+ wcn->dxe_tx_h_ch.ctrl_bd = WCN36XX_DXE_CTRL_TX_H_BD;
+
+ wcn->dxe_tx_l_ch.ctrl_skb = WCN36XX_DXE_CTRL_TX_L_SKB;
+ wcn->dxe_tx_h_ch.ctrl_skb = WCN36XX_DXE_CTRL_TX_H_SKB;
+
+ wcn->dxe_tx_l_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_L;
+ wcn->dxe_tx_h_ch.reg_ctrl = WCN36XX_DXE_REG_CTL_TX_H;
+
+ wcn->dxe_tx_l_ch.def_ctrl = WCN36XX_DXE_CH_DEFAULT_CTL_TX_L;
+ wcn->dxe_tx_h_ch.def_ctrl = WCN36XX_DXE_CH_DEFAULT_CTL_TX_H;
+
+ /* DXE control block allocation */
+ ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_tx_l_ch);
+ if (ret)
+ goto out_err;
+ ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_tx_h_ch);
+ if (ret)
+ goto out_err;
+ ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_rx_l_ch);
+ if (ret)
+ goto out_err;
+ ret = wcn36xx_dxe_allocate_ctl_block(&wcn->dxe_rx_h_ch);
+ if (ret)
+ goto out_err;
+
+ /* Initialize SMSM state Clear TX Enable RING EMPTY STATE */
+ ret = wcn->ctrl_ops->smsm_change_state(
+ WCN36XX_SMSM_WLAN_TX_ENABLE,
+ WCN36XX_SMSM_WLAN_TX_RINGS_EMPTY);
+
+ return 0;
+
+out_err:
+ wcn36xx_err("Failed to allocate DXE control blocks\n");
+ wcn36xx_dxe_free_ctl_blks(wcn);
+ return -ENOMEM;
+}
+
+void wcn36xx_dxe_free_ctl_blks(struct wcn36xx *wcn)
+{
+ wcn36xx_dxe_free_ctl_block(&wcn->dxe_tx_l_ch);
+ wcn36xx_dxe_free_ctl_block(&wcn->dxe_tx_h_ch);
+ wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_l_ch);
+ wcn36xx_dxe_free_ctl_block(&wcn->dxe_rx_h_ch);
+}
+
+static int wcn36xx_dxe_init_descs(struct wcn36xx_dxe_ch *wcn_ch)
+{
+ struct wcn36xx_dxe_desc *cur_dxe = NULL;
+ struct wcn36xx_dxe_desc *prev_dxe = NULL;
+ struct wcn36xx_dxe_ctl *cur_ctl = NULL;
+ size_t size;
+ int i;
+
+ size = wcn_ch->desc_num * sizeof(struct wcn36xx_dxe_desc);
+ wcn_ch->cpu_addr = dma_alloc_coherent(NULL, size, &wcn_ch->dma_addr,
+ GFP_KERNEL);
+ if (!wcn_ch->cpu_addr)
+ return -ENOMEM;
+
+ memset(wcn_ch->cpu_addr, 0, size);
+
+ cur_dxe = (struct wcn36xx_dxe_desc *)wcn_ch->cpu_addr;
+ cur_ctl = wcn_ch->head_blk_ctl;
+
+ for (i = 0; i < wcn_ch->desc_num; i++) {
+ cur_ctl->desc = cur_dxe;
+ cur_ctl->desc_phy_addr = wcn_ch->dma_addr +
+ i * sizeof(struct wcn36xx_dxe_desc);
+
+ switch (wcn_ch->ch_type) {
+ case WCN36XX_DXE_CH_TX_L:
+ cur_dxe->ctrl = WCN36XX_DXE_CTRL_TX_L;
+ cur_dxe->dst_addr_l = WCN36XX_DXE_WQ_TX_L;
+ break;
+ case WCN36XX_DXE_CH_TX_H:
+ cur_dxe->ctrl = WCN36XX_DXE_CTRL_TX_H;
+ cur_dxe->dst_addr_l = WCN36XX_DXE_WQ_TX_H;
+ break;
+ case WCN36XX_DXE_CH_RX_L:
+ cur_dxe->ctrl = WCN36XX_DXE_CTRL_RX_L;
+ cur_dxe->src_addr_l = WCN36XX_DXE_WQ_RX_L;
+ break;
+ case WCN36XX_DXE_CH_RX_H:
+ cur_dxe->ctrl = WCN36XX_DXE_CTRL_RX_H;
+ cur_dxe->src_addr_l = WCN36XX_DXE_WQ_RX_H;
+ break;
+ }
+ if (0 == i) {
+ cur_dxe->phy_next_l = 0;
+ } else if ((0 < i) && (i < wcn_ch->desc_num - 1)) {
+ prev_dxe->phy_next_l =
+ cur_ctl->desc_phy_addr;
+ } else if (i == (wcn_ch->desc_num - 1)) {
+ prev_dxe->phy_next_l =
+ cur_ctl->desc_phy_addr;
+ cur_dxe->phy_next_l =
+ wcn_ch->head_blk_ctl->desc_phy_addr;
+ }
+ cur_ctl = cur_ctl->next;
+ prev_dxe = cur_dxe;
+ cur_dxe++;
+ }
+
+ return 0;
+}
+
+static void wcn36xx_dxe_init_tx_bd(struct wcn36xx_dxe_ch *ch,
+ struct wcn36xx_dxe_mem_pool *pool)
+{
+ int i, chunk_size = pool->chunk_size;
+ dma_addr_t bd_phy_addr = pool->phy_addr;
+ void *bd_cpu_addr = pool->virt_addr;
+ struct wcn36xx_dxe_ctl *cur = ch->head_blk_ctl;
+
+ for (i = 0; i < ch->desc_num; i++) {
+ /* Only every second dxe needs a bd pointer,
+ the other will point to the skb data */
+ if (!(i & 1)) {
+ cur->bd_phy_addr = bd_phy_addr;
+ cur->bd_cpu_addr = bd_cpu_addr;
+ bd_phy_addr += chunk_size;
+ bd_cpu_addr += chunk_size;
+ } else {
+ cur->bd_phy_addr = 0;
+ cur->bd_cpu_addr = NULL;
+ }
+ cur = cur->next;
+ }
+}
+
+static int wcn36xx_dxe_enable_ch_int(struct wcn36xx *wcn, u16 wcn_ch)
+{
+ int reg_data = 0;
+
+ wcn36xx_dxe_read_register(wcn,
+ WCN36XX_DXE_INT_MASK_REG,
+ ®_data);
+
+ reg_data |= wcn_ch;
+
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_INT_MASK_REG,
+ (int)reg_data);
+ return 0;
+}
+
+static int wcn36xx_dxe_fill_skb(struct wcn36xx_dxe_ctl *ctl)
+{
+ struct wcn36xx_dxe_desc *dxe = ctl->desc;
+ struct sk_buff *skb;
+
+ skb = alloc_skb(WCN36XX_PKT_SIZE, GFP_ATOMIC);
+ if (skb == NULL)
+ return -ENOMEM;
+
+ dxe->dst_addr_l = dma_map_single(NULL,
+ skb_tail_pointer(skb),
+ WCN36XX_PKT_SIZE,
+ DMA_FROM_DEVICE);
+ ctl->skb = skb;
+
+ return 0;
+}
+
+static int wcn36xx_dxe_ch_alloc_skb(struct wcn36xx *wcn,
+ struct wcn36xx_dxe_ch *wcn_ch)
+{
+ int i;
+ struct wcn36xx_dxe_ctl *cur_ctl = NULL;
+
+ cur_ctl = wcn_ch->head_blk_ctl;
+
+ for (i = 0; i < wcn_ch->desc_num; i++) {
+ wcn36xx_dxe_fill_skb(cur_ctl);
+ cur_ctl = cur_ctl->next;
+ }
+
+ return 0;
+}
+
+static void wcn36xx_dxe_ch_free_skbs(struct wcn36xx *wcn,
+ struct wcn36xx_dxe_ch *wcn_ch)
+{
+ struct wcn36xx_dxe_ctl *cur = wcn_ch->head_blk_ctl;
+ int i;
+
+ for (i = 0; i < wcn_ch->desc_num; i++) {
+ kfree_skb(cur->skb);
+ cur = cur->next;
+ }
+}
+
+void wcn36xx_dxe_tx_ack_ind(struct wcn36xx *wcn, u32 status)
+{
+ struct ieee80211_tx_info *info;
+ struct sk_buff *skb;
+ unsigned long flags;
+
+ spin_lock_irqsave(&wcn->dxe_lock, flags);
+ skb = wcn->tx_ack_skb;
+ wcn->tx_ack_skb = NULL;
+ spin_unlock_irqrestore(&wcn->dxe_lock, flags);
+
+ if (!skb) {
+ wcn36xx_warn("Spurious TX complete indication\n");
+ return;
+ }
+
+ info = IEEE80211_SKB_CB(skb);
+
+ if (status == 1)
+ info->flags |= IEEE80211_TX_STAT_ACK;
+
+ wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ack status: %d\n", status);
+
+ ieee80211_tx_status_irqsafe(wcn->hw, skb);
+ ieee80211_wake_queues(wcn->hw);
+}
+
+static void reap_tx_dxes(struct wcn36xx *wcn, struct wcn36xx_dxe_ch *ch)
+{
+ struct wcn36xx_dxe_ctl *ctl = ch->tail_blk_ctl;
+ struct ieee80211_tx_info *info;
+ unsigned long flags;
+
+ /*
+ * Make at least one loop of do-while because in case ring is
+ * completely full head and tail are pointing to the same element
+ * and while-do will not make any cycles.
+ */
+ do {
+ if (ctl->skb) {
+ dma_unmap_single(NULL, ctl->desc->src_addr_l,
+ ctl->skb->len, DMA_TO_DEVICE);
+ info = IEEE80211_SKB_CB(ctl->skb);
+ if (!(info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS)) {
+ /* Keep frame until TX status comes */
+ ieee80211_free_txskb(wcn->hw, ctl->skb);
+ }
+ spin_lock_irqsave(&ctl->skb_lock, flags);
+ if (wcn->queues_stopped) {
+ wcn->queues_stopped = false;
+ ieee80211_wake_queues(wcn->hw);
+ }
+ spin_unlock_irqrestore(&ctl->skb_lock, flags);
+
+ ctl->skb = NULL;
+ }
+ ctl = ctl->next;
+ } while (ctl != ch->head_blk_ctl &&
+ !(ctl->desc->ctrl & WCN36XX_DXE_CTRL_VALID_MASK));
+
+ ch->tail_blk_ctl = ctl;
+}
+
+static irqreturn_t wcn36xx_irq_tx_complete(int irq, void *dev)
+{
+ struct wcn36xx *wcn = (struct wcn36xx *)dev;
+ int int_src, int_reason;
+
+ wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src);
+
+ if (int_src & WCN36XX_INT_MASK_CHAN_TX_H) {
+ wcn36xx_dxe_read_register(wcn,
+ WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H,
+ &int_reason);
+
+ /* TODO: Check int_reason */
+
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_0_INT_CLR,
+ WCN36XX_INT_MASK_CHAN_TX_H);
+
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_ED_CLR,
+ WCN36XX_INT_MASK_CHAN_TX_H);
+ wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ready high\n");
+ reap_tx_dxes(wcn, &wcn->dxe_tx_h_ch);
+ }
+
+ if (int_src & WCN36XX_INT_MASK_CHAN_TX_L) {
+ wcn36xx_dxe_read_register(wcn,
+ WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L,
+ &int_reason);
+ /* TODO: Check int_reason */
+
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_0_INT_CLR,
+ WCN36XX_INT_MASK_CHAN_TX_L);
+
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_ED_CLR,
+ WCN36XX_INT_MASK_CHAN_TX_L);
+ wcn36xx_dbg(WCN36XX_DBG_DXE, "dxe tx ready low\n");
+ reap_tx_dxes(wcn, &wcn->dxe_tx_l_ch);
+ }
+
+ return IRQ_HANDLED;
+}
+
+static irqreturn_t wcn36xx_irq_rx_ready(int irq, void *dev)
+{
+ struct wcn36xx *wcn = (struct wcn36xx *)dev;
+
+ disable_irq_nosync(wcn->rx_irq);
+ wcn36xx_dxe_rx_frame(wcn);
+ enable_irq(wcn->rx_irq);
+ return IRQ_HANDLED;
+}
+
+static int wcn36xx_dxe_request_irqs(struct wcn36xx *wcn)
+{
+ int ret;
+
+ ret = request_irq(wcn->tx_irq, wcn36xx_irq_tx_complete,
+ IRQF_TRIGGER_HIGH, "wcn36xx_tx", wcn);
+ if (ret) {
+ wcn36xx_err("failed to alloc tx irq\n");
+ goto out_err;
+ }
+
+ ret = request_irq(wcn->rx_irq, wcn36xx_irq_rx_ready, IRQF_TRIGGER_HIGH,
+ "wcn36xx_rx", wcn);
+ if (ret) {
+ wcn36xx_err("failed to alloc rx irq\n");
+ goto out_txirq;
+ }
+
+ enable_irq_wake(wcn->rx_irq);
+
+ return 0;
+
+out_txirq:
+ free_irq(wcn->tx_irq, wcn);
+out_err:
+ return ret;
+
+}
+
+static int wcn36xx_rx_handle_packets(struct wcn36xx *wcn,
+ struct wcn36xx_dxe_ch *ch)
+{
+ struct wcn36xx_dxe_ctl *ctl = ch->head_blk_ctl;
+ struct wcn36xx_dxe_desc *dxe = ctl->desc;
+ dma_addr_t dma_addr;
+ struct sk_buff *skb;
+
+ while (!(dxe->ctrl & WCN36XX_DXE_CTRL_VALID_MASK)) {
+ skb = ctl->skb;
+ dma_addr = dxe->dst_addr_l;
+ wcn36xx_dxe_fill_skb(ctl);
+
+ switch (ch->ch_type) {
+ case WCN36XX_DXE_CH_RX_L:
+ dxe->ctrl = WCN36XX_DXE_CTRL_RX_L;
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_ENCH_ADDR,
+ WCN36XX_DXE_INT_CH1_MASK);
+ break;
+ case WCN36XX_DXE_CH_RX_H:
+ dxe->ctrl = WCN36XX_DXE_CTRL_RX_H;
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_ENCH_ADDR,
+ WCN36XX_DXE_INT_CH3_MASK);
+ break;
+ default:
+ wcn36xx_warn("Unknown channel\n");
+ }
+
+ dma_unmap_single(NULL, dma_addr, WCN36XX_PKT_SIZE,
+ DMA_FROM_DEVICE);
+ wcn36xx_rx_skb(wcn, skb);
+ ctl = ctl->next;
+ dxe = ctl->desc;
+ }
+
+ ch->head_blk_ctl = ctl;
+
+ return 0;
+}
+
+void wcn36xx_dxe_rx_frame(struct wcn36xx *wcn)
+{
+ int int_src;
+
+ wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_INT_SRC_RAW_REG, &int_src);
+
+ /* RX_LOW_PRI */
+ if (int_src & WCN36XX_DXE_INT_CH1_MASK) {
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,
+ WCN36XX_DXE_INT_CH1_MASK);
+ wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_l_ch));
+ }
+
+ /* RX_HIGH_PRI */
+ if (int_src & WCN36XX_DXE_INT_CH3_MASK) {
+ /* Clean up all the INT within this channel */
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_0_INT_CLR,
+ WCN36XX_DXE_INT_CH3_MASK);
+ wcn36xx_rx_handle_packets(wcn, &(wcn->dxe_rx_h_ch));
+ }
+
+ if (!int_src)
+ wcn36xx_warn("No DXE interrupt pending\n");
+}
+
+int wcn36xx_dxe_allocate_mem_pools(struct wcn36xx *wcn)
+{
+ size_t s;
+ void *cpu_addr;
+
+ /* Allocate BD headers for MGMT frames */
+
+ /* Where this come from ask QC */
+ wcn->mgmt_mem_pool.chunk_size = WCN36XX_BD_CHUNK_SIZE +
+ 16 - (WCN36XX_BD_CHUNK_SIZE % 8);
+
+ s = wcn->mgmt_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_H;
+ cpu_addr = dma_alloc_coherent(NULL, s, &wcn->mgmt_mem_pool.phy_addr,
+ GFP_KERNEL);
+ if (!cpu_addr)
+ goto out_err;
+
+ wcn->mgmt_mem_pool.virt_addr = cpu_addr;
+ memset(cpu_addr, 0, s);
+
+ /* Allocate BD headers for DATA frames */
+
+ /* Where this come from ask QC */
+ wcn->data_mem_pool.chunk_size = WCN36XX_BD_CHUNK_SIZE +
+ 16 - (WCN36XX_BD_CHUNK_SIZE % 8);
+
+ s = wcn->data_mem_pool.chunk_size * WCN36XX_DXE_CH_DESC_NUMB_TX_L;
+ cpu_addr = dma_alloc_coherent(NULL, s, &wcn->data_mem_pool.phy_addr,
+ GFP_KERNEL);
+ if (!cpu_addr)
+ goto out_err;
+
+ wcn->data_mem_pool.virt_addr = cpu_addr;
+ memset(cpu_addr, 0, s);
+
+ return 0;
+
+out_err:
+ wcn36xx_dxe_free_mem_pools(wcn);
+ wcn36xx_err("Failed to allocate BD mempool\n");
+ return -ENOMEM;
+}
+
+void wcn36xx_dxe_free_mem_pools(struct wcn36xx *wcn)
+{
+ if (wcn->mgmt_mem_pool.virt_addr)
+ dma_free_coherent(NULL, wcn->mgmt_mem_pool.chunk_size *
+ WCN36XX_DXE_CH_DESC_NUMB_TX_H,
+ wcn->mgmt_mem_pool.virt_addr,
+ wcn->mgmt_mem_pool.phy_addr);
+
+ if (wcn->data_mem_pool.virt_addr) {
+ dma_free_coherent(NULL, wcn->data_mem_pool.chunk_size *
+ WCN36XX_DXE_CH_DESC_NUMB_TX_L,
+ wcn->data_mem_pool.virt_addr,
+ wcn->data_mem_pool.phy_addr);
+ }
+}
+
+int wcn36xx_dxe_tx_frame(struct wcn36xx *wcn,
+ struct sk_buff *skb,
+ bool is_low)
+{
+ struct wcn36xx_dxe_ctl *ctl = NULL;
+ struct wcn36xx_dxe_desc *desc = NULL;
+ struct wcn36xx_dxe_ch *ch = NULL;
+ unsigned long flags;
+
+ ch = is_low ? &wcn->dxe_tx_l_ch : &wcn->dxe_tx_h_ch;
+
+ ctl = ch->head_blk_ctl;
+
+ spin_lock_irqsave(&ctl->next->skb_lock, flags);
+
+ /*
+ * If skb is not null that means that we reached the tail of the ring
+ * hence ring is full. Stop queues to let mac80211 back off until ring
+ * has an empty slot again.
+ */
+ if (NULL != ctl->next->skb) {
+ ieee80211_stop_queues(wcn->hw);
+ wcn->queues_stopped = true;
+ spin_unlock_irqrestore(&ctl->next->skb_lock, flags);
+ return -EBUSY;
+ }
+ spin_unlock_irqrestore(&ctl->next->skb_lock, flags);
+
+ ctl->skb = NULL;
+ desc = ctl->desc;
+
+ /* Set source address of the BD we send */
+ desc->src_addr_l = ctl->bd_phy_addr;
+
+ desc->dst_addr_l = ch->dxe_wq;
+ desc->fr_len = sizeof(struct wcn36xx_tx_bd);
+ desc->ctrl = ch->ctrl_bd;
+
+ wcn36xx_dbg(WCN36XX_DBG_DXE, "DXE TX\n");
+
+ wcn36xx_dbg_dump(WCN36XX_DBG_DXE_DUMP, "DESC1 >>> ",
+ (char *)desc, sizeof(*desc));
+ wcn36xx_dbg_dump(WCN36XX_DBG_DXE_DUMP,
+ "BD >>> ", (char *)ctl->bd_cpu_addr,
+ sizeof(struct wcn36xx_tx_bd));
+
+ /* Set source address of the SKB we send */
+ ctl = ctl->next;
+ ctl->skb = skb;
+ desc = ctl->desc;
+ if (ctl->bd_cpu_addr) {
+ wcn36xx_err("bd_cpu_addr cannot be NULL for skb DXE\n");
+ return -EINVAL;
+ }
+
+ desc->src_addr_l = dma_map_single(NULL,
+ ctl->skb->data,
+ ctl->skb->len,
+ DMA_TO_DEVICE);
+
+ desc->dst_addr_l = ch->dxe_wq;
+ desc->fr_len = ctl->skb->len;
+
+ /* set dxe descriptor to VALID */
+ desc->ctrl = ch->ctrl_skb;
+
+ wcn36xx_dbg_dump(WCN36XX_DBG_DXE_DUMP, "DESC2 >>> ",
+ (char *)desc, sizeof(*desc));
+ wcn36xx_dbg_dump(WCN36XX_DBG_DXE_DUMP, "SKB >>> ",
+ (char *)ctl->skb->data, ctl->skb->len);
+
+ /* Move the head of the ring to the next empty descriptor */
+ ch->head_blk_ctl = ctl->next;
+
+ /*
+ * When connected and trying to send data frame chip can be in sleep
+ * mode and writing to the register will not wake up the chip. Instead
+ * notify chip about new frame through SMSM bus.
+ */
+ if (wcn->pw_state == WCN36XX_BMPS) {
+ wcn->ctrl_ops->smsm_change_state(
+ 0,
+ WCN36XX_SMSM_WLAN_TX_ENABLE);
+ } else {
+ /* indicate End Of Packet and generate interrupt on descriptor
+ * done.
+ */
+ wcn36xx_dxe_write_register(wcn,
+ ch->reg_ctrl, ch->def_ctrl);
+ }
+
+ return 0;
+}
+
+int wcn36xx_dxe_init(struct wcn36xx *wcn)
+{
+ int reg_data = 0, ret;
+
+ reg_data = WCN36XX_DXE_REG_RESET;
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CSR_RESET, reg_data);
+
+ /* Setting interrupt path */
+ reg_data = WCN36XX_DXE_CCU_INT;
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_REG_CCU_INT, reg_data);
+
+ /***************************************/
+ /* Init descriptors for TX LOW channel */
+ /***************************************/
+ wcn36xx_dxe_init_descs(&wcn->dxe_tx_l_ch);
+ wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_l_ch, &wcn->data_mem_pool);
+
+ /* Write channel head to a NEXT register */
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_L,
+ wcn->dxe_tx_l_ch.head_blk_ctl->desc_phy_addr);
+
+ /* Program DMA destination addr for TX LOW */
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_CH_DEST_ADDR_TX_L,
+ WCN36XX_DXE_WQ_TX_L);
+
+ wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data);
+ wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_L);
+
+ /***************************************/
+ /* Init descriptors for TX HIGH channel */
+ /***************************************/
+ wcn36xx_dxe_init_descs(&wcn->dxe_tx_h_ch);
+ wcn36xx_dxe_init_tx_bd(&wcn->dxe_tx_h_ch, &wcn->mgmt_mem_pool);
+
+ /* Write channel head to a NEXT register */
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_H,
+ wcn->dxe_tx_h_ch.head_blk_ctl->desc_phy_addr);
+
+ /* Program DMA destination addr for TX HIGH */
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_CH_DEST_ADDR_TX_H,
+ WCN36XX_DXE_WQ_TX_H);
+
+ wcn36xx_dxe_read_register(wcn, WCN36XX_DXE_REG_CH_EN, ®_data);
+
+ /* Enable channel interrupts */
+ wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_TX_H);
+
+ /***************************************/
+ /* Init descriptors for RX LOW channel */
+ /***************************************/
+ wcn36xx_dxe_init_descs(&wcn->dxe_rx_l_ch);
+
+ /* For RX we need to preallocated buffers */
+ wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_l_ch);
+
+ /* Write channel head to a NEXT register */
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_L,
+ wcn->dxe_rx_l_ch.head_blk_ctl->desc_phy_addr);
+
+ /* Write DMA source address */
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_CH_SRC_ADDR_RX_L,
+ WCN36XX_DXE_WQ_RX_L);
+
+ /* Program preallocated destination address */
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_CH_DEST_ADDR_RX_L,
+ wcn->dxe_rx_l_ch.head_blk_ctl->desc->phy_next_l);
+
+ /* Enable default control registers */
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_REG_CTL_RX_L,
+ WCN36XX_DXE_CH_DEFAULT_CTL_RX_L);
+
+ /* Enable channel interrupts */
+ wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_L);
+
+ /***************************************/
+ /* Init descriptors for RX HIGH channel */
+ /***************************************/
+ wcn36xx_dxe_init_descs(&wcn->dxe_rx_h_ch);
+
+ /* For RX we need to prealocat buffers */
+ wcn36xx_dxe_ch_alloc_skb(wcn, &wcn->dxe_rx_h_ch);
+
+ /* Write chanel head to a NEXT register */
+ wcn36xx_dxe_write_register(wcn, WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_H,
+ wcn->dxe_rx_h_ch.head_blk_ctl->desc_phy_addr);
+
+ /* Write DMA source address */
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_CH_SRC_ADDR_RX_H,
+ WCN36XX_DXE_WQ_RX_H);
+
+ /* Program preallocated destination address */
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_CH_DEST_ADDR_RX_H,
+ wcn->dxe_rx_h_ch.head_blk_ctl->desc->phy_next_l);
+
+ /* Enable default control registers */
+ wcn36xx_dxe_write_register(wcn,
+ WCN36XX_DXE_REG_CTL_RX_H,
+ WCN36XX_DXE_CH_DEFAULT_CTL_RX_H);
+
+ /* Enable channel interrupts */
+ wcn36xx_dxe_enable_ch_int(wcn, WCN36XX_INT_MASK_CHAN_RX_H);
+
+ ret = wcn36xx_dxe_request_irqs(wcn);
+ if (ret < 0)
+ goto out_err;
+
+ return 0;
+
+out_err:
+ return ret;
+}
+
+void wcn36xx_dxe_deinit(struct wcn36xx *wcn)
+{
+ free_irq(wcn->tx_irq, wcn);
+ free_irq(wcn->rx_irq, wcn);
+
+ if (wcn->tx_ack_skb) {
+ ieee80211_tx_status_irqsafe(wcn->hw, wcn->tx_ack_skb);
+ wcn->tx_ack_skb = NULL;
+ }
+
+ wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_l_ch);
+ wcn36xx_dxe_ch_free_skbs(wcn, &wcn->dxe_rx_h_ch);
+}
diff --git a/drivers/net/wireless/ath/wcn36xx/dxe.h b/drivers/net/wireless/ath/wcn36xx/dxe.h
new file mode 100644
index 0000000..38e458e
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/dxe.h
@@ -0,0 +1,281 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _DXE_H_
+#define _DXE_H_
+
+#include "wcn36xx.h"
+
+/*
+TX_LOW = DMA0
+TX_HIGH = DMA4
+RX_LOW = DMA1
+RX_HIGH = DMA3
+H2H_TEST_RX_TX = DMA2
+*/
+
+/* DXE registers */
+#define WCN36XX_DXE_MEM_BASE 0x03000000
+#define WCN36XX_DXE_MEM_REG 0x202000
+
+#define WCN36XX_DXE_CCU_INT 0xA0011
+#define WCN36XX_DXE_REG_CCU_INT 0x200b10
+
+/* TODO This must calculated properly but not hardcoded */
+#define WCN36XX_DXE_CTRL_TX_L 0x328a44
+#define WCN36XX_DXE_CTRL_TX_H 0x32ce44
+#define WCN36XX_DXE_CTRL_RX_L 0x12ad2f
+#define WCN36XX_DXE_CTRL_RX_H 0x12d12f
+#define WCN36XX_DXE_CTRL_TX_H_BD 0x30ce45
+#define WCN36XX_DXE_CTRL_TX_H_SKB 0x32ce4d
+#define WCN36XX_DXE_CTRL_TX_L_BD 0x308a45
+#define WCN36XX_DXE_CTRL_TX_L_SKB 0x328a4d
+
+/* TODO This must calculated properly but not hardcoded */
+#define WCN36XX_DXE_WQ_TX_L 0x17
+#define WCN36XX_DXE_WQ_TX_H 0x17
+#define WCN36XX_DXE_WQ_RX_L 0xB
+#define WCN36XX_DXE_WQ_RX_H 0x4
+
+/* DXE descriptor control filed */
+#define WCN36XX_DXE_CTRL_VALID_MASK (0x00000001)
+
+/* TODO This must calculated properly but not hardcoded */
+/* DXE default control register values */
+#define WCN36XX_DXE_CH_DEFAULT_CTL_RX_L 0x847EAD2F
+#define WCN36XX_DXE_CH_DEFAULT_CTL_RX_H 0x84FED12F
+#define WCN36XX_DXE_CH_DEFAULT_CTL_TX_H 0x853ECF4D
+#define WCN36XX_DXE_CH_DEFAULT_CTL_TX_L 0x843e8b4d
+
+/* Common DXE registers */
+#define WCN36XX_DXE_MEM_CSR (WCN36XX_DXE_MEM_REG + 0x00)
+#define WCN36XX_DXE_REG_CSR_RESET (WCN36XX_DXE_MEM_REG + 0x00)
+#define WCN36XX_DXE_ENCH_ADDR (WCN36XX_DXE_MEM_REG + 0x04)
+#define WCN36XX_DXE_REG_CH_EN (WCN36XX_DXE_MEM_REG + 0x08)
+#define WCN36XX_DXE_REG_CH_DONE (WCN36XX_DXE_MEM_REG + 0x0C)
+#define WCN36XX_DXE_REG_CH_ERR (WCN36XX_DXE_MEM_REG + 0x10)
+#define WCN36XX_DXE_INT_MASK_REG (WCN36XX_DXE_MEM_REG + 0x18)
+#define WCN36XX_DXE_INT_SRC_RAW_REG (WCN36XX_DXE_MEM_REG + 0x20)
+ /* #define WCN36XX_DXE_INT_CH6_MASK 0x00000040 */
+ /* #define WCN36XX_DXE_INT_CH5_MASK 0x00000020 */
+ #define WCN36XX_DXE_INT_CH4_MASK 0x00000010
+ #define WCN36XX_DXE_INT_CH3_MASK 0x00000008
+ /* #define WCN36XX_DXE_INT_CH2_MASK 0x00000004 */
+ #define WCN36XX_DXE_INT_CH1_MASK 0x00000002
+ #define WCN36XX_DXE_INT_CH0_MASK 0x00000001
+#define WCN36XX_DXE_0_INT_CLR (WCN36XX_DXE_MEM_REG + 0x30)
+#define WCN36XX_DXE_0_INT_ED_CLR (WCN36XX_DXE_MEM_REG + 0x34)
+#define WCN36XX_DXE_0_INT_DONE_CLR (WCN36XX_DXE_MEM_REG + 0x38)
+#define WCN36XX_DXE_0_INT_ERR_CLR (WCN36XX_DXE_MEM_REG + 0x3C)
+
+#define WCN36XX_DXE_0_CH0_STATUS (WCN36XX_DXE_MEM_REG + 0x404)
+#define WCN36XX_DXE_0_CH1_STATUS (WCN36XX_DXE_MEM_REG + 0x444)
+#define WCN36XX_DXE_0_CH2_STATUS (WCN36XX_DXE_MEM_REG + 0x484)
+#define WCN36XX_DXE_0_CH3_STATUS (WCN36XX_DXE_MEM_REG + 0x4C4)
+#define WCN36XX_DXE_0_CH4_STATUS (WCN36XX_DXE_MEM_REG + 0x504)
+
+#define WCN36XX_DXE_REG_RESET 0x5c89
+
+/* Temporary BMU Workqueue 4 */
+#define WCN36XX_DXE_BMU_WQ_RX_LOW 0xB
+#define WCN36XX_DXE_BMU_WQ_RX_HIGH 0x4
+/* DMA channel offset */
+#define WCN36XX_DXE_TX_LOW_OFFSET 0x400
+#define WCN36XX_DXE_TX_HIGH_OFFSET 0x500
+#define WCN36XX_DXE_RX_LOW_OFFSET 0x440
+#define WCN36XX_DXE_RX_HIGH_OFFSET 0x4C0
+
+/* Address of the next DXE descriptor */
+#define WCN36XX_DXE_CH_NEXT_DESC_ADDR 0x001C
+#define WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_L (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_TX_LOW_OFFSET + \
+ WCN36XX_DXE_CH_NEXT_DESC_ADDR)
+#define WCN36XX_DXE_CH_NEXT_DESC_ADDR_TX_H (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_TX_HIGH_OFFSET + \
+ WCN36XX_DXE_CH_NEXT_DESC_ADDR)
+#define WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_L (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_LOW_OFFSET + \
+ WCN36XX_DXE_CH_NEXT_DESC_ADDR)
+#define WCN36XX_DXE_CH_NEXT_DESC_ADDR_RX_H (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_HIGH_OFFSET + \
+ WCN36XX_DXE_CH_NEXT_DESC_ADDR)
+
+/* DXE Descriptor source address */
+#define WCN36XX_DXE_CH_SRC_ADDR 0x000C
+#define WCN36XX_DXE_CH_SRC_ADDR_RX_L (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_LOW_OFFSET + \
+ WCN36XX_DXE_CH_SRC_ADDR)
+#define WCN36XX_DXE_CH_SRC_ADDR_RX_H (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_HIGH_OFFSET + \
+ WCN36XX_DXE_CH_SRC_ADDR)
+
+/* DXE Descriptor address destination address */
+#define WCN36XX_DXE_CH_DEST_ADDR 0x0014
+#define WCN36XX_DXE_CH_DEST_ADDR_TX_L (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_TX_LOW_OFFSET + \
+ WCN36XX_DXE_CH_DEST_ADDR)
+#define WCN36XX_DXE_CH_DEST_ADDR_TX_H (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_TX_HIGH_OFFSET + \
+ WCN36XX_DXE_CH_DEST_ADDR)
+#define WCN36XX_DXE_CH_DEST_ADDR_RX_L (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_LOW_OFFSET + \
+ WCN36XX_DXE_CH_DEST_ADDR)
+#define WCN36XX_DXE_CH_DEST_ADDR_RX_H (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_HIGH_OFFSET + \
+ WCN36XX_DXE_CH_DEST_ADDR)
+
+/* Interrupt status */
+#define WCN36XX_DXE_CH_STATUS_REG_ADDR 0x0004
+#define WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_L (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_TX_LOW_OFFSET + \
+ WCN36XX_DXE_CH_STATUS_REG_ADDR)
+#define WCN36XX_DXE_CH_STATUS_REG_ADDR_TX_H (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_TX_HIGH_OFFSET + \
+ WCN36XX_DXE_CH_STATUS_REG_ADDR)
+#define WCN36XX_DXE_CH_STATUS_REG_ADDR_RX_L (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_LOW_OFFSET + \
+ WCN36XX_DXE_CH_STATUS_REG_ADDR)
+#define WCN36XX_DXE_CH_STATUS_REG_ADDR_RX_H (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_HIGH_OFFSET + \
+ WCN36XX_DXE_CH_STATUS_REG_ADDR)
+
+
+/* DXE default control register */
+#define WCN36XX_DXE_REG_CTL_RX_L (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_LOW_OFFSET)
+#define WCN36XX_DXE_REG_CTL_RX_H (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_RX_HIGH_OFFSET)
+#define WCN36XX_DXE_REG_CTL_TX_H (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_TX_HIGH_OFFSET)
+#define WCN36XX_DXE_REG_CTL_TX_L (WCN36XX_DXE_MEM_REG + \
+ WCN36XX_DXE_TX_LOW_OFFSET)
+
+#define WCN36XX_SMSM_WLAN_TX_ENABLE 0x00000400
+#define WCN36XX_SMSM_WLAN_TX_RINGS_EMPTY 0x00000200
+
+
+/* Interrupt control channel mask */
+#define WCN36XX_INT_MASK_CHAN_TX_L 0x00000001
+#define WCN36XX_INT_MASK_CHAN_RX_L 0x00000002
+#define WCN36XX_INT_MASK_CHAN_RX_H 0x00000008
+#define WCN36XX_INT_MASK_CHAN_TX_H 0x00000010
+
+#define WCN36XX_BD_CHUNK_SIZE 128
+
+#define WCN36XX_PKT_SIZE 0xF20
+enum wcn36xx_dxe_ch_type {
+ WCN36XX_DXE_CH_TX_L,
+ WCN36XX_DXE_CH_TX_H,
+ WCN36XX_DXE_CH_RX_L,
+ WCN36XX_DXE_CH_RX_H
+};
+
+/* amount of descriptors per channel */
+enum wcn36xx_dxe_ch_desc_num {
+ WCN36XX_DXE_CH_DESC_NUMB_TX_L = 128,
+ WCN36XX_DXE_CH_DESC_NUMB_TX_H = 10,
+ WCN36XX_DXE_CH_DESC_NUMB_RX_L = 512,
+ WCN36XX_DXE_CH_DESC_NUMB_RX_H = 40
+};
+
+/**
+ * struct wcn36xx_dxe_desc - describes descriptor of one DXE buffer
+ *
+ * @ctrl: is a union that consists of following bits:
+ * union {
+ * u32 valid :1; //0 = DMA stop, 1 = DMA continue with this
+ * //descriptor
+ * u32 transfer_type :2; //0 = Host to Host space
+ * u32 eop :1; //End of Packet
+ * u32 bd_handling :1; //if transferType = Host to BMU, then 0
+ * // means first 128 bytes contain BD, and 1
+ * // means create new empty BD
+ * u32 siq :1; // SIQ
+ * u32 diq :1; // DIQ
+ * u32 pdu_rel :1; //0 = don't release BD and PDUs when done,
+ * // 1 = release them
+ * u32 bthld_sel :4; //BMU Threshold Select
+ * u32 prio :3; //Specifies the priority level to use for
+ * // the transfer
+ * u32 stop_channel :1; //1 = DMA stops processing further, channel
+ * //requires re-enabling after this
+ * u32 intr :1; //Interrupt on Descriptor Done
+ * u32 rsvd :1; //reserved
+ * u32 size :14;//14 bits used - ignored for BMU transfers,
+ * //only used for host to host transfers?
+ * } ctrl;
+ */
+struct wcn36xx_dxe_desc {
+ u32 ctrl;
+ u32 fr_len;
+
+ u32 src_addr_l;
+ u32 dst_addr_l;
+ u32 phy_next_l;
+ u32 src_addr_h;
+ u32 dst_addr_h;
+ u32 phy_next_h;
+} __packed;
+
+/* DXE Control block */
+struct wcn36xx_dxe_ctl {
+ struct wcn36xx_dxe_ctl *next;
+ struct wcn36xx_dxe_desc *desc;
+ unsigned int desc_phy_addr;
+ int ctl_blk_order;
+ struct sk_buff *skb;
+ spinlock_t skb_lock;
+ void *bd_cpu_addr;
+ dma_addr_t bd_phy_addr;
+};
+
+struct wcn36xx_dxe_ch {
+ enum wcn36xx_dxe_ch_type ch_type;
+ void *cpu_addr;
+ dma_addr_t dma_addr;
+ enum wcn36xx_dxe_ch_desc_num desc_num;
+ /* DXE control block ring */
+ struct wcn36xx_dxe_ctl *head_blk_ctl;
+ struct wcn36xx_dxe_ctl *tail_blk_ctl;
+
+ /* DXE channel specific configs */
+ u32 dxe_wq;
+ u32 ctrl_bd;
+ u32 ctrl_skb;
+ u32 reg_ctrl;
+ u32 def_ctrl;
+};
+
+/* Memory Pool for BD headers */
+struct wcn36xx_dxe_mem_pool {
+ int chunk_size;
+ void *virt_addr;
+ dma_addr_t phy_addr;
+};
+int wcn36xx_dxe_allocate_mem_pools(struct wcn36xx *wcn);
+void wcn36xx_dxe_free_mem_pools(struct wcn36xx *wcn);
+void wcn36xx_dxe_rx_frame(struct wcn36xx *wcn);
+int wcn36xx_dxe_alloc_ctl_blks(struct wcn36xx *wcn);
+void wcn36xx_dxe_free_ctl_blks(struct wcn36xx *wcn);
+int wcn36xx_dxe_init(struct wcn36xx *wcn);
+void wcn36xx_dxe_deinit(struct wcn36xx *wcn);
+int wcn36xx_dxe_init_channels(struct wcn36xx *wcn);
+int wcn36xx_dxe_tx_frame(struct wcn36xx *wcn,
+ struct sk_buff *skb,
+ bool is_low);
+void wcn36xx_dxe_tx_ack_ind(struct wcn36xx *wcn, u32 status);
+void *wcn36xx_dxe_get_next_bd(struct wcn36xx *wcn, bool is_low);
+#endif /* _DXE_H_ */
diff --git a/drivers/net/wireless/ath/wcn36xx/hal.h b/drivers/net/wireless/ath/wcn36xx/hal.h
new file mode 100644
index 0000000..56da0dc
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/hal.h
@@ -0,0 +1,4657 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _HAL_H_
+#define _HAL_H_
+
+/*---------------------------------------------------------------------------
+ API VERSIONING INFORMATION
+
+ The RIVA API is versioned as MAJOR.MINOR.VERSION.REVISION
+ The MAJOR is incremented for major product/architecture changes
+ (and then MINOR/VERSION/REVISION are zeroed)
+ The MINOR is incremented for minor product/architecture changes
+ (and then VERSION/REVISION are zeroed)
+ The VERSION is incremented if a significant API change occurs
+ (and then REVISION is zeroed)
+ The REVISION is incremented if an insignificant API change occurs
+ or if a new API is added
+ All values are in the range 0..255 (ie they are 8-bit values)
+ ---------------------------------------------------------------------------*/
+#define WCN36XX_HAL_VER_MAJOR 1
+#define WCN36XX_HAL_VER_MINOR 4
+#define WCN36XX_HAL_VER_VERSION 1
+#define WCN36XX_HAL_VER_REVISION 2
+
+/* This is to force compiler to use the maximum of an int ( 4 bytes ) */
+#define WCN36XX_HAL_MAX_ENUM_SIZE 0x7FFFFFFF
+#define WCN36XX_HAL_MSG_TYPE_MAX_ENUM_SIZE 0x7FFF
+
+/* Max no. of transmit categories */
+#define STACFG_MAX_TC 8
+
+/* The maximum value of access category */
+#define WCN36XX_HAL_MAX_AC 4
+
+#define WCN36XX_HAL_IPV4_ADDR_LEN 4
+
+#define WALN_HAL_STA_INVALID_IDX 0xFF
+#define WCN36XX_HAL_BSS_INVALID_IDX 0xFF
+
+/* Default Beacon template size */
+#define BEACON_TEMPLATE_SIZE 0x180
+
+/* Param Change Bitmap sent to HAL */
+#define PARAM_BCN_INTERVAL_CHANGED (1 << 0)
+#define PARAM_SHORT_PREAMBLE_CHANGED (1 << 1)
+#define PARAM_SHORT_SLOT_TIME_CHANGED (1 << 2)
+#define PARAM_llACOEXIST_CHANGED (1 << 3)
+#define PARAM_llBCOEXIST_CHANGED (1 << 4)
+#define PARAM_llGCOEXIST_CHANGED (1 << 5)
+#define PARAM_HT20MHZCOEXIST_CHANGED (1<<6)
+#define PARAM_NON_GF_DEVICES_PRESENT_CHANGED (1<<7)
+#define PARAM_RIFS_MODE_CHANGED (1<<8)
+#define PARAM_LSIG_TXOP_FULL_SUPPORT_CHANGED (1<<9)
+#define PARAM_OBSS_MODE_CHANGED (1<<10)
+#define PARAM_BEACON_UPDATE_MASK \
+ (PARAM_BCN_INTERVAL_CHANGED | \
+ PARAM_SHORT_PREAMBLE_CHANGED | \
+ PARAM_SHORT_SLOT_TIME_CHANGED | \
+ PARAM_llACOEXIST_CHANGED | \
+ PARAM_llBCOEXIST_CHANGED | \
+ PARAM_llGCOEXIST_CHANGED | \
+ PARAM_HT20MHZCOEXIST_CHANGED | \
+ PARAM_NON_GF_DEVICES_PRESENT_CHANGED | \
+ PARAM_RIFS_MODE_CHANGED | \
+ PARAM_LSIG_TXOP_FULL_SUPPORT_CHANGED | \
+ PARAM_OBSS_MODE_CHANGED)
+
+/* dump command response Buffer size */
+#define DUMPCMD_RSP_BUFFER 100
+
+/* version string max length (including NULL) */
+#define WCN36XX_HAL_VERSION_LENGTH 64
+
+/* message types for messages exchanged between WDI and HAL */
+enum wcn36xx_hal_host_msg_type {
+ /* Init/De-Init */
+ WCN36XX_HAL_START_REQ = 0,
+ WCN36XX_HAL_START_RSP = 1,
+ WCN36XX_HAL_STOP_REQ = 2,
+ WCN36XX_HAL_STOP_RSP = 3,
+
+ /* Scan */
+ WCN36XX_HAL_INIT_SCAN_REQ = 4,
+ WCN36XX_HAL_INIT_SCAN_RSP = 5,
+ WCN36XX_HAL_START_SCAN_REQ = 6,
+ WCN36XX_HAL_START_SCAN_RSP = 7,
+ WCN36XX_HAL_END_SCAN_REQ = 8,
+ WCN36XX_HAL_END_SCAN_RSP = 9,
+ WCN36XX_HAL_FINISH_SCAN_REQ = 10,
+ WCN36XX_HAL_FINISH_SCAN_RSP = 11,
+
+ /* HW STA configuration/deconfiguration */
+ WCN36XX_HAL_CONFIG_STA_REQ = 12,
+ WCN36XX_HAL_CONFIG_STA_RSP = 13,
+ WCN36XX_HAL_DELETE_STA_REQ = 14,
+ WCN36XX_HAL_DELETE_STA_RSP = 15,
+ WCN36XX_HAL_CONFIG_BSS_REQ = 16,
+ WCN36XX_HAL_CONFIG_BSS_RSP = 17,
+ WCN36XX_HAL_DELETE_BSS_REQ = 18,
+ WCN36XX_HAL_DELETE_BSS_RSP = 19,
+
+ /* Infra STA asscoiation */
+ WCN36XX_HAL_JOIN_REQ = 20,
+ WCN36XX_HAL_JOIN_RSP = 21,
+ WCN36XX_HAL_POST_ASSOC_REQ = 22,
+ WCN36XX_HAL_POST_ASSOC_RSP = 23,
+
+ /* Security */
+ WCN36XX_HAL_SET_BSSKEY_REQ = 24,
+ WCN36XX_HAL_SET_BSSKEY_RSP = 25,
+ WCN36XX_HAL_SET_STAKEY_REQ = 26,
+ WCN36XX_HAL_SET_STAKEY_RSP = 27,
+ WCN36XX_HAL_RMV_BSSKEY_REQ = 28,
+ WCN36XX_HAL_RMV_BSSKEY_RSP = 29,
+ WCN36XX_HAL_RMV_STAKEY_REQ = 30,
+ WCN36XX_HAL_RMV_STAKEY_RSP = 31,
+
+ /* Qos Related */
+ WCN36XX_HAL_ADD_TS_REQ = 32,
+ WCN36XX_HAL_ADD_TS_RSP = 33,
+ WCN36XX_HAL_DEL_TS_REQ = 34,
+ WCN36XX_HAL_DEL_TS_RSP = 35,
+ WCN36XX_HAL_UPD_EDCA_PARAMS_REQ = 36,
+ WCN36XX_HAL_UPD_EDCA_PARAMS_RSP = 37,
+ WCN36XX_HAL_ADD_BA_REQ = 38,
+ WCN36XX_HAL_ADD_BA_RSP = 39,
+ WCN36XX_HAL_DEL_BA_REQ = 40,
+ WCN36XX_HAL_DEL_BA_RSP = 41,
+
+ WCN36XX_HAL_CH_SWITCH_REQ = 42,
+ WCN36XX_HAL_CH_SWITCH_RSP = 43,
+ WCN36XX_HAL_SET_LINK_ST_REQ = 44,
+ WCN36XX_HAL_SET_LINK_ST_RSP = 45,
+ WCN36XX_HAL_GET_STATS_REQ = 46,
+ WCN36XX_HAL_GET_STATS_RSP = 47,
+ WCN36XX_HAL_UPDATE_CFG_REQ = 48,
+ WCN36XX_HAL_UPDATE_CFG_RSP = 49,
+
+ WCN36XX_HAL_MISSED_BEACON_IND = 50,
+ WCN36XX_HAL_UNKNOWN_ADDR2_FRAME_RX_IND = 51,
+ WCN36XX_HAL_MIC_FAILURE_IND = 52,
+ WCN36XX_HAL_FATAL_ERROR_IND = 53,
+ WCN36XX_HAL_SET_KEYDONE_MSG = 54,
+
+ /* NV Interface */
+ WCN36XX_HAL_DOWNLOAD_NV_REQ = 55,
+ WCN36XX_HAL_DOWNLOAD_NV_RSP = 56,
+
+ WCN36XX_HAL_ADD_BA_SESSION_REQ = 57,
+ WCN36XX_HAL_ADD_BA_SESSION_RSP = 58,
+ WCN36XX_HAL_TRIGGER_BA_REQ = 59,
+ WCN36XX_HAL_TRIGGER_BA_RSP = 60,
+ WCN36XX_HAL_UPDATE_BEACON_REQ = 61,
+ WCN36XX_HAL_UPDATE_BEACON_RSP = 62,
+ WCN36XX_HAL_SEND_BEACON_REQ = 63,
+ WCN36XX_HAL_SEND_BEACON_RSP = 64,
+
+ WCN36XX_HAL_SET_BCASTKEY_REQ = 65,
+ WCN36XX_HAL_SET_BCASTKEY_RSP = 66,
+ WCN36XX_HAL_DELETE_STA_CONTEXT_IND = 67,
+ WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_REQ = 68,
+ WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_RSP = 69,
+
+ /* PTT interface support */
+ WCN36XX_HAL_PROCESS_PTT_REQ = 70,
+ WCN36XX_HAL_PROCESS_PTT_RSP = 71,
+
+ /* BTAMP related events */
+ WCN36XX_HAL_SIGNAL_BTAMP_EVENT_REQ = 72,
+ WCN36XX_HAL_SIGNAL_BTAMP_EVENT_RSP = 73,
+ WCN36XX_HAL_TL_HAL_FLUSH_AC_REQ = 74,
+ WCN36XX_HAL_TL_HAL_FLUSH_AC_RSP = 75,
+
+ WCN36XX_HAL_ENTER_IMPS_REQ = 76,
+ WCN36XX_HAL_EXIT_IMPS_REQ = 77,
+ WCN36XX_HAL_ENTER_BMPS_REQ = 78,
+ WCN36XX_HAL_EXIT_BMPS_REQ = 79,
+ WCN36XX_HAL_ENTER_UAPSD_REQ = 80,
+ WCN36XX_HAL_EXIT_UAPSD_REQ = 81,
+ WCN36XX_HAL_UPDATE_UAPSD_PARAM_REQ = 82,
+ WCN36XX_HAL_CONFIGURE_RXP_FILTER_REQ = 83,
+ WCN36XX_HAL_ADD_BCN_FILTER_REQ = 84,
+ WCN36XX_HAL_REM_BCN_FILTER_REQ = 85,
+ WCN36XX_HAL_ADD_WOWL_BCAST_PTRN = 86,
+ WCN36XX_HAL_DEL_WOWL_BCAST_PTRN = 87,
+ WCN36XX_HAL_ENTER_WOWL_REQ = 88,
+ WCN36XX_HAL_EXIT_WOWL_REQ = 89,
+ WCN36XX_HAL_HOST_OFFLOAD_REQ = 90,
+ WCN36XX_HAL_SET_RSSI_THRESH_REQ = 91,
+ WCN36XX_HAL_GET_RSSI_REQ = 92,
+ WCN36XX_HAL_SET_UAPSD_AC_PARAMS_REQ = 93,
+ WCN36XX_HAL_CONFIGURE_APPS_CPU_WAKEUP_STATE_REQ = 94,
+
+ WCN36XX_HAL_ENTER_IMPS_RSP = 95,
+ WCN36XX_HAL_EXIT_IMPS_RSP = 96,
+ WCN36XX_HAL_ENTER_BMPS_RSP = 97,
+ WCN36XX_HAL_EXIT_BMPS_RSP = 98,
+ WCN36XX_HAL_ENTER_UAPSD_RSP = 99,
+ WCN36XX_HAL_EXIT_UAPSD_RSP = 100,
+ WCN36XX_HAL_SET_UAPSD_AC_PARAMS_RSP = 101,
+ WCN36XX_HAL_UPDATE_UAPSD_PARAM_RSP = 102,
+ WCN36XX_HAL_CONFIGURE_RXP_FILTER_RSP = 103,
+ WCN36XX_HAL_ADD_BCN_FILTER_RSP = 104,
+ WCN36XX_HAL_REM_BCN_FILTER_RSP = 105,
+ WCN36XX_HAL_SET_RSSI_THRESH_RSP = 106,
+ WCN36XX_HAL_HOST_OFFLOAD_RSP = 107,
+ WCN36XX_HAL_ADD_WOWL_BCAST_PTRN_RSP = 108,
+ WCN36XX_HAL_DEL_WOWL_BCAST_PTRN_RSP = 109,
+ WCN36XX_HAL_ENTER_WOWL_RSP = 110,
+ WCN36XX_HAL_EXIT_WOWL_RSP = 111,
+ WCN36XX_HAL_RSSI_NOTIFICATION_IND = 112,
+ WCN36XX_HAL_GET_RSSI_RSP = 113,
+ WCN36XX_HAL_CONFIGURE_APPS_CPU_WAKEUP_STATE_RSP = 114,
+
+ /* 11k related events */
+ WCN36XX_HAL_SET_MAX_TX_POWER_REQ = 115,
+ WCN36XX_HAL_SET_MAX_TX_POWER_RSP = 116,
+
+ /* 11R related msgs */
+ WCN36XX_HAL_AGGR_ADD_TS_REQ = 117,
+ WCN36XX_HAL_AGGR_ADD_TS_RSP = 118,
+
+ /* P2P WLAN_FEATURE_P2P */
+ WCN36XX_HAL_SET_P2P_GONOA_REQ = 119,
+ WCN36XX_HAL_SET_P2P_GONOA_RSP = 120,
+
+ /* WLAN Dump commands */
+ WCN36XX_HAL_DUMP_COMMAND_REQ = 121,
+ WCN36XX_HAL_DUMP_COMMAND_RSP = 122,
+
+ /* OEM_DATA FEATURE SUPPORT */
+ WCN36XX_HAL_START_OEM_DATA_REQ = 123,
+ WCN36XX_HAL_START_OEM_DATA_RSP = 124,
+
+ /* ADD SELF STA REQ and RSP */
+ WCN36XX_HAL_ADD_STA_SELF_REQ = 125,
+ WCN36XX_HAL_ADD_STA_SELF_RSP = 126,
+
+ /* DEL SELF STA SUPPORT */
+ WCN36XX_HAL_DEL_STA_SELF_REQ = 127,
+ WCN36XX_HAL_DEL_STA_SELF_RSP = 128,
+
+ /* Coex Indication */
+ WCN36XX_HAL_COEX_IND = 129,
+
+ /* Tx Complete Indication */
+ WCN36XX_HAL_OTA_TX_COMPL_IND = 130,
+
+ /* Host Suspend/resume messages */
+ WCN36XX_HAL_HOST_SUSPEND_IND = 131,
+ WCN36XX_HAL_HOST_RESUME_REQ = 132,
+ WCN36XX_HAL_HOST_RESUME_RSP = 133,
+
+ WCN36XX_HAL_SET_TX_POWER_REQ = 134,
+ WCN36XX_HAL_SET_TX_POWER_RSP = 135,
+ WCN36XX_HAL_GET_TX_POWER_REQ = 136,
+ WCN36XX_HAL_GET_TX_POWER_RSP = 137,
+
+ WCN36XX_HAL_P2P_NOA_ATTR_IND = 138,
+
+ WCN36XX_HAL_ENABLE_RADAR_DETECT_REQ = 139,
+ WCN36XX_HAL_ENABLE_RADAR_DETECT_RSP = 140,
+ WCN36XX_HAL_GET_TPC_REPORT_REQ = 141,
+ WCN36XX_HAL_GET_TPC_REPORT_RSP = 142,
+ WCN36XX_HAL_RADAR_DETECT_IND = 143,
+ WCN36XX_HAL_RADAR_DETECT_INTR_IND = 144,
+ WCN36XX_HAL_KEEP_ALIVE_REQ = 145,
+ WCN36XX_HAL_KEEP_ALIVE_RSP = 146,
+
+ /* PNO messages */
+ WCN36XX_HAL_SET_PREF_NETWORK_REQ = 147,
+ WCN36XX_HAL_SET_PREF_NETWORK_RSP = 148,
+ WCN36XX_HAL_SET_RSSI_FILTER_REQ = 149,
+ WCN36XX_HAL_SET_RSSI_FILTER_RSP = 150,
+ WCN36XX_HAL_UPDATE_SCAN_PARAM_REQ = 151,
+ WCN36XX_HAL_UPDATE_SCAN_PARAM_RSP = 152,
+ WCN36XX_HAL_PREF_NETW_FOUND_IND = 153,
+
+ WCN36XX_HAL_SET_TX_PER_TRACKING_REQ = 154,
+ WCN36XX_HAL_SET_TX_PER_TRACKING_RSP = 155,
+ WCN36XX_HAL_TX_PER_HIT_IND = 156,
+
+ WCN36XX_HAL_8023_MULTICAST_LIST_REQ = 157,
+ WCN36XX_HAL_8023_MULTICAST_LIST_RSP = 158,
+
+ WCN36XX_HAL_SET_PACKET_FILTER_REQ = 159,
+ WCN36XX_HAL_SET_PACKET_FILTER_RSP = 160,
+ WCN36XX_HAL_PACKET_FILTER_MATCH_COUNT_REQ = 161,
+ WCN36XX_HAL_PACKET_FILTER_MATCH_COUNT_RSP = 162,
+ WCN36XX_HAL_CLEAR_PACKET_FILTER_REQ = 163,
+ WCN36XX_HAL_CLEAR_PACKET_FILTER_RSP = 164,
+
+ /*
+ * This is temp fix. Should be removed once Host and Riva code is
+ * in sync.
+ */
+ WCN36XX_HAL_INIT_SCAN_CON_REQ = 165,
+
+ WCN36XX_HAL_SET_POWER_PARAMS_REQ = 166,
+ WCN36XX_HAL_SET_POWER_PARAMS_RSP = 167,
+
+ WCN36XX_HAL_TSM_STATS_REQ = 168,
+ WCN36XX_HAL_TSM_STATS_RSP = 169,
+
+ /* wake reason indication (WOW) */
+ WCN36XX_HAL_WAKE_REASON_IND = 170,
+
+ /* GTK offload support */
+ WCN36XX_HAL_GTK_OFFLOAD_REQ = 171,
+ WCN36XX_HAL_GTK_OFFLOAD_RSP = 172,
+ WCN36XX_HAL_GTK_OFFLOAD_GETINFO_REQ = 173,
+ WCN36XX_HAL_GTK_OFFLOAD_GETINFO_RSP = 174,
+
+ WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_REQ = 175,
+ WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_RSP = 176,
+ WCN36XX_HAL_EXCLUDE_UNENCRYPTED_IND = 177,
+
+ WCN36XX_HAL_SET_THERMAL_MITIGATION_REQ = 178,
+ WCN36XX_HAL_SET_THERMAL_MITIGATION_RSP = 179,
+
+ WCN36XX_HAL_UPDATE_VHT_OP_MODE_REQ = 182,
+ WCN36XX_HAL_UPDATE_VHT_OP_MODE_RSP = 183,
+
+ WCN36XX_HAL_P2P_NOA_START_IND = 184,
+
+ WCN36XX_HAL_GET_ROAM_RSSI_REQ = 185,
+ WCN36XX_HAL_GET_ROAM_RSSI_RSP = 186,
+
+ WCN36XX_HAL_CLASS_B_STATS_IND = 187,
+ WCN36XX_HAL_DEL_BA_IND = 188,
+ WCN36XX_HAL_DHCP_START_IND = 189,
+ WCN36XX_HAL_DHCP_STOP_IND = 190,
+
+ WCN36XX_HAL_MSG_MAX = WCN36XX_HAL_MSG_TYPE_MAX_ENUM_SIZE
+};
+
+/* Enumeration for Version */
+enum wcn36xx_hal_host_msg_version {
+ WCN36XX_HAL_MSG_VERSION0 = 0,
+ WCN36XX_HAL_MSG_VERSION1 = 1,
+ /* define as 2 bytes data */
+ WCN36XX_HAL_MSG_WCNSS_CTRL_VERSION = 0x7FFF,
+ WCN36XX_HAL_MSG_VERSION_MAX_FIELD = WCN36XX_HAL_MSG_WCNSS_CTRL_VERSION
+};
+
+enum driver_type {
+ DRIVER_TYPE_PRODUCTION = 0,
+ DRIVER_TYPE_MFG = 1,
+ DRIVER_TYPE_DVT = 2,
+ DRIVER_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+enum wcn36xx_hal_stop_type {
+ HAL_STOP_TYPE_SYS_RESET,
+ HAL_STOP_TYPE_SYS_DEEP_SLEEP,
+ HAL_STOP_TYPE_RF_KILL,
+ HAL_STOP_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+enum wcn36xx_hal_sys_mode {
+ HAL_SYS_MODE_NORMAL,
+ HAL_SYS_MODE_LEARN,
+ HAL_SYS_MODE_SCAN,
+ HAL_SYS_MODE_PROMISC,
+ HAL_SYS_MODE_SUSPEND_LINK,
+ HAL_SYS_MODE_ROAM_SCAN,
+ HAL_SYS_MODE_ROAM_SUSPEND_LINK,
+ HAL_SYS_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+enum phy_chan_bond_state {
+ /* 20MHz IF bandwidth centered on IF carrier */
+ PHY_SINGLE_CHANNEL_CENTERED = 0,
+
+ /* 40MHz IF bandwidth with lower 20MHz supporting the primary channel */
+ PHY_DOUBLE_CHANNEL_LOW_PRIMARY = 1,
+
+ /* 40MHz IF bandwidth centered on IF carrier */
+ PHY_DOUBLE_CHANNEL_CENTERED = 2,
+
+ /* 40MHz IF bandwidth with higher 20MHz supporting the primary ch */
+ PHY_DOUBLE_CHANNEL_HIGH_PRIMARY = 3,
+
+ /* 20/40MHZ offset LOW 40/80MHZ offset CENTERED */
+ PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_CENTERED = 4,
+
+ /* 20/40MHZ offset CENTERED 40/80MHZ offset CENTERED */
+ PHY_QUADRUPLE_CHANNEL_20MHZ_CENTERED_40MHZ_CENTERED = 5,
+
+ /* 20/40MHZ offset HIGH 40/80MHZ offset CENTERED */
+ PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_CENTERED = 6,
+
+ /* 20/40MHZ offset LOW 40/80MHZ offset LOW */
+ PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_LOW = 7,
+
+ /* 20/40MHZ offset HIGH 40/80MHZ offset LOW */
+ PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_LOW = 8,
+
+ /* 20/40MHZ offset LOW 40/80MHZ offset HIGH */
+ PHY_QUADRUPLE_CHANNEL_20MHZ_LOW_40MHZ_HIGH = 9,
+
+ /* 20/40MHZ offset-HIGH 40/80MHZ offset HIGH */
+ PHY_QUADRUPLE_CHANNEL_20MHZ_HIGH_40MHZ_HIGH = 10,
+
+ PHY_CHANNEL_BONDING_STATE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+/* Spatial Multiplexing(SM) Power Save mode */
+enum wcn36xx_hal_ht_mimo_state {
+ /* Static SM Power Save mode */
+ WCN36XX_HAL_HT_MIMO_PS_STATIC = 0,
+
+ /* Dynamic SM Power Save mode */
+ WCN36XX_HAL_HT_MIMO_PS_DYNAMIC = 1,
+
+ /* reserved */
+ WCN36XX_HAL_HT_MIMO_PS_NA = 2,
+
+ /* SM Power Save disabled */
+ WCN36XX_HAL_HT_MIMO_PS_NO_LIMIT = 3,
+
+ WCN36XX_HAL_HT_MIMO_PS_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+/* each station added has a rate mode which specifies the sta attributes */
+enum sta_rate_mode {
+ STA_TAURUS = 0,
+ STA_TITAN,
+ STA_POLARIS,
+ STA_11b,
+ STA_11bg,
+ STA_11a,
+ STA_11n,
+ STA_11ac,
+ STA_INVALID_RATE_MODE = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+/* 1,2,5.5,11 */
+#define WCN36XX_HAL_NUM_DSSS_RATES 4
+
+/* 6,9,12,18,24,36,48,54 */
+#define WCN36XX_HAL_NUM_OFDM_RATES 8
+
+/* 72,96,108 */
+#define WCN36XX_HAL_NUM_POLARIS_RATES 3
+
+#define WCN36XX_HAL_MAC_MAX_SUPPORTED_MCS_SET 16
+
+enum wcn36xx_hal_bss_type {
+ WCN36XX_HAL_INFRASTRUCTURE_MODE,
+
+ /* Added for softAP support */
+ WCN36XX_HAL_INFRA_AP_MODE,
+
+ WCN36XX_HAL_IBSS_MODE,
+
+ /* Added for BT-AMP support */
+ WCN36XX_HAL_BTAMP_STA_MODE,
+
+ /* Added for BT-AMP support */
+ WCN36XX_HAL_BTAMP_AP_MODE,
+
+ WCN36XX_HAL_AUTO_MODE,
+
+ WCN36XX_HAL_DONOT_USE_BSS_TYPE = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+enum wcn36xx_hal_nw_type {
+ WCN36XX_HAL_11A_NW_TYPE,
+ WCN36XX_HAL_11B_NW_TYPE,
+ WCN36XX_HAL_11G_NW_TYPE,
+ WCN36XX_HAL_11N_NW_TYPE,
+ WCN36XX_HAL_DONOT_USE_NW_TYPE = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+#define WCN36XX_HAL_MAC_RATESET_EID_MAX 12
+
+enum wcn36xx_hal_ht_operating_mode {
+ /* No Protection */
+ WCN36XX_HAL_HT_OP_MODE_PURE,
+
+ /* Overlap Legacy device present, protection is optional */
+ WCN36XX_HAL_HT_OP_MODE_OVERLAP_LEGACY,
+
+ /* No legacy device, but 20 MHz HT present */
+ WCN36XX_HAL_HT_OP_MODE_NO_LEGACY_20MHZ_HT,
+
+ /* Protection is required */
+ WCN36XX_HAL_HT_OP_MODE_MIXED,
+
+ WCN36XX_HAL_HT_OP_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+/* Encryption type enum used with peer */
+enum ani_ed_type {
+ WCN36XX_HAL_ED_NONE,
+ WCN36XX_HAL_ED_WEP40,
+ WCN36XX_HAL_ED_WEP104,
+ WCN36XX_HAL_ED_TKIP,
+ WCN36XX_HAL_ED_CCMP,
+ WCN36XX_HAL_ED_WPI,
+ WCN36XX_HAL_ED_AES_128_CMAC,
+ WCN36XX_HAL_ED_NOT_IMPLEMENTED = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+#define WLAN_MAX_KEY_RSC_LEN 16
+#define WLAN_WAPI_KEY_RSC_LEN 16
+
+/* MAX key length when ULA is used */
+#define WCN36XX_HAL_MAC_MAX_KEY_LENGTH 32
+#define WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS 4
+
+/*
+ * Enum to specify whether key is used for TX only, RX only or both.
+ */
+enum ani_key_direction {
+ WCN36XX_HAL_TX_ONLY,
+ WCN36XX_HAL_RX_ONLY,
+ WCN36XX_HAL_TX_RX,
+ WCN36XX_HAL_TX_DEFAULT,
+ WCN36XX_HAL_DONOT_USE_KEY_DIRECTION = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+enum ani_wep_type {
+ WCN36XX_HAL_WEP_STATIC,
+ WCN36XX_HAL_WEP_DYNAMIC,
+ WCN36XX_HAL_WEP_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+enum wcn36xx_hal_link_state {
+
+ WCN36XX_HAL_LINK_IDLE_STATE = 0,
+ WCN36XX_HAL_LINK_PREASSOC_STATE = 1,
+ WCN36XX_HAL_LINK_POSTASSOC_STATE = 2,
+ WCN36XX_HAL_LINK_AP_STATE = 3,
+ WCN36XX_HAL_LINK_IBSS_STATE = 4,
+
+ /* BT-AMP Case */
+ WCN36XX_HAL_LINK_BTAMP_PREASSOC_STATE = 5,
+ WCN36XX_HAL_LINK_BTAMP_POSTASSOC_STATE = 6,
+ WCN36XX_HAL_LINK_BTAMP_AP_STATE = 7,
+ WCN36XX_HAL_LINK_BTAMP_STA_STATE = 8,
+
+ /* Reserved for HAL Internal Use */
+ WCN36XX_HAL_LINK_LEARN_STATE = 9,
+ WCN36XX_HAL_LINK_SCAN_STATE = 10,
+ WCN36XX_HAL_LINK_FINISH_SCAN_STATE = 11,
+ WCN36XX_HAL_LINK_INIT_CAL_STATE = 12,
+ WCN36XX_HAL_LINK_FINISH_CAL_STATE = 13,
+ WCN36XX_HAL_LINK_LISTEN_STATE = 14,
+
+ WCN36XX_HAL_LINK_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+enum wcn36xx_hal_stats_mask {
+ HAL_SUMMARY_STATS_INFO = 0x00000001,
+ HAL_GLOBAL_CLASS_A_STATS_INFO = 0x00000002,
+ HAL_GLOBAL_CLASS_B_STATS_INFO = 0x00000004,
+ HAL_GLOBAL_CLASS_C_STATS_INFO = 0x00000008,
+ HAL_GLOBAL_CLASS_D_STATS_INFO = 0x00000010,
+ HAL_PER_STA_STATS_INFO = 0x00000020
+};
+
+/* BT-AMP events type */
+enum bt_amp_event_type {
+ BTAMP_EVENT_CONNECTION_START,
+ BTAMP_EVENT_CONNECTION_STOP,
+ BTAMP_EVENT_CONNECTION_TERMINATED,
+
+ /* This and beyond are invalid values */
+ BTAMP_EVENT_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
+};
+
+/* PE Statistics */
+enum pe_stats_mask {
+ PE_SUMMARY_STATS_INFO = 0x00000001,
+ PE_GLOBAL_CLASS_A_STATS_INFO = 0x00000002,
+ PE_GLOBAL_CLASS_B_STATS_INFO = 0x00000004,
+ PE_GLOBAL_CLASS_C_STATS_INFO = 0x00000008,
+ PE_GLOBAL_CLASS_D_STATS_INFO = 0x00000010,
+ PE_PER_STA_STATS_INFO = 0x00000020,
+
+ /* This and beyond are invalid values */
+ PE_STATS_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+/*
+ * Configuration Parameter IDs
+ */
+#define WCN36XX_HAL_CFG_STA_ID 0
+#define WCN36XX_HAL_CFG_CURRENT_TX_ANTENNA 1
+#define WCN36XX_HAL_CFG_CURRENT_RX_ANTENNA 2
+#define WCN36XX_HAL_CFG_LOW_GAIN_OVERRIDE 3
+#define WCN36XX_HAL_CFG_POWER_STATE_PER_CHAIN 4
+#define WCN36XX_HAL_CFG_CAL_PERIOD 5
+#define WCN36XX_HAL_CFG_CAL_CONTROL 6
+#define WCN36XX_HAL_CFG_PROXIMITY 7
+#define WCN36XX_HAL_CFG_NETWORK_DENSITY 8
+#define WCN36XX_HAL_CFG_MAX_MEDIUM_TIME 9
+#define WCN36XX_HAL_CFG_MAX_MPDUS_IN_AMPDU 10
+#define WCN36XX_HAL_CFG_RTS_THRESHOLD 11
+#define WCN36XX_HAL_CFG_SHORT_RETRY_LIMIT 12
+#define WCN36XX_HAL_CFG_LONG_RETRY_LIMIT 13
+#define WCN36XX_HAL_CFG_FRAGMENTATION_THRESHOLD 14
+#define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_ZERO 15
+#define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_ONE 16
+#define WCN36XX_HAL_CFG_DYNAMIC_THRESHOLD_TWO 17
+#define WCN36XX_HAL_CFG_FIXED_RATE 18
+#define WCN36XX_HAL_CFG_RETRYRATE_POLICY 19
+#define WCN36XX_HAL_CFG_RETRYRATE_SECONDARY 20
+#define WCN36XX_HAL_CFG_RETRYRATE_TERTIARY 21
+#define WCN36XX_HAL_CFG_FORCE_POLICY_PROTECTION 22
+#define WCN36XX_HAL_CFG_FIXED_RATE_MULTICAST_24GHZ 23
+#define WCN36XX_HAL_CFG_FIXED_RATE_MULTICAST_5GHZ 24
+#define WCN36XX_HAL_CFG_DEFAULT_RATE_INDEX_24GHZ 25
+#define WCN36XX_HAL_CFG_DEFAULT_RATE_INDEX_5GHZ 26
+#define WCN36XX_HAL_CFG_MAX_BA_SESSIONS 27
+#define WCN36XX_HAL_CFG_PS_DATA_INACTIVITY_TIMEOUT 28
+#define WCN36XX_HAL_CFG_PS_ENABLE_BCN_FILTER 29
+#define WCN36XX_HAL_CFG_PS_ENABLE_RSSI_MONITOR 30
+#define WCN36XX_HAL_CFG_NUM_BEACON_PER_RSSI_AVERAGE 31
+#define WCN36XX_HAL_CFG_STATS_PERIOD 32
+#define WCN36XX_HAL_CFG_CFP_MAX_DURATION 33
+#define WCN36XX_HAL_CFG_FRAME_TRANS_ENABLED 34
+#define WCN36XX_HAL_CFG_DTIM_PERIOD 35
+#define WCN36XX_HAL_CFG_EDCA_WMM_ACBK 36
+#define WCN36XX_HAL_CFG_EDCA_WMM_ACBE 37
+#define WCN36XX_HAL_CFG_EDCA_WMM_ACVO 38
+#define WCN36XX_HAL_CFG_EDCA_WMM_ACVI 39
+#define WCN36XX_HAL_CFG_BA_THRESHOLD_HIGH 40
+#define WCN36XX_HAL_CFG_MAX_BA_BUFFERS 41
+#define WCN36XX_HAL_CFG_RPE_POLLING_THRESHOLD 42
+#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC0_REG 43
+#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC1_REG 44
+#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC2_REG 45
+#define WCN36XX_HAL_CFG_RPE_AGING_THRESHOLD_FOR_AC3_REG 46
+#define WCN36XX_HAL_CFG_NO_OF_ONCHIP_REORDER_SESSIONS 47
+#define WCN36XX_HAL_CFG_PS_LISTEN_INTERVAL 48
+#define WCN36XX_HAL_CFG_PS_HEART_BEAT_THRESHOLD 49
+#define WCN36XX_HAL_CFG_PS_NTH_BEACON_FILTER 50
+#define WCN36XX_HAL_CFG_PS_MAX_PS_POLL 51
+#define WCN36XX_HAL_CFG_PS_MIN_RSSI_THRESHOLD 52
+#define WCN36XX_HAL_CFG_PS_RSSI_FILTER_PERIOD 53
+#define WCN36XX_HAL_CFG_PS_BROADCAST_FRAME_FILTER_ENABLE 54
+#define WCN36XX_HAL_CFG_PS_IGNORE_DTIM 55
+#define WCN36XX_HAL_CFG_PS_ENABLE_BCN_EARLY_TERM 56
+#define WCN36XX_HAL_CFG_DYNAMIC_PS_POLL_VALUE 57
+#define WCN36XX_HAL_CFG_PS_NULLDATA_AP_RESP_TIMEOUT 58
+#define WCN36XX_HAL_CFG_TELE_BCN_WAKEUP_EN 59
+#define WCN36XX_HAL_CFG_TELE_BCN_TRANS_LI 60
+#define WCN36XX_HAL_CFG_TELE_BCN_TRANS_LI_IDLE_BCNS 61
+#define WCN36XX_HAL_CFG_TELE_BCN_MAX_LI 62
+#define WCN36XX_HAL_CFG_TELE_BCN_MAX_LI_IDLE_BCNS 63
+#define WCN36XX_HAL_CFG_TX_PWR_CTRL_ENABLE 64
+#define WCN36XX_HAL_CFG_VALID_RADAR_CHANNEL_LIST 65
+#define WCN36XX_HAL_CFG_TX_POWER_24_20 66
+#define WCN36XX_HAL_CFG_TX_POWER_24_40 67
+#define WCN36XX_HAL_CFG_TX_POWER_50_20 68
+#define WCN36XX_HAL_CFG_TX_POWER_50_40 69
+#define WCN36XX_HAL_CFG_MCAST_BCAST_FILTER_SETTING 70
+#define WCN36XX_HAL_CFG_BCN_EARLY_TERM_WAKEUP_INTERVAL 71
+#define WCN36XX_HAL_CFG_MAX_TX_POWER_2_4 72
+#define WCN36XX_HAL_CFG_MAX_TX_POWER_5 73
+#define WCN36XX_HAL_CFG_INFRA_STA_KEEP_ALIVE_PERIOD 74
+#define WCN36XX_HAL_CFG_ENABLE_CLOSE_LOOP 75
+#define WCN36XX_HAL_CFG_BTC_EXECUTION_MODE 76
+#define WCN36XX_HAL_CFG_BTC_DHCP_BT_SLOTS_TO_BLOCK 77
+#define WCN36XX_HAL_CFG_BTC_A2DP_DHCP_BT_SUB_INTERVALS 78
+#define WCN36XX_HAL_CFG_PS_TX_INACTIVITY_TIMEOUT 79
+#define WCN36XX_HAL_CFG_WCNSS_API_VERSION 80
+#define WCN36XX_HAL_CFG_AP_KEEPALIVE_TIMEOUT 81
+#define WCN36XX_HAL_CFG_GO_KEEPALIVE_TIMEOUT 82
+#define WCN36XX_HAL_CFG_ENABLE_MC_ADDR_LIST 83
+#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_INQ_BT 84
+#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_PAGE_BT 85
+#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_CONN_BT 86
+#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_LE_BT 87
+#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_INQ_WLAN 88
+#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_PAGE_WLAN 89
+#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_CONN_WLAN 90
+#define WCN36XX_HAL_CFG_BTC_STATIC_LEN_LE_WLAN 91
+#define WCN36XX_HAL_CFG_BTC_DYN_MAX_LEN_BT 92
+#define WCN36XX_HAL_CFG_BTC_DYN_MAX_LEN_WLAN 93
+#define WCN36XX_HAL_CFG_BTC_MAX_SCO_BLOCK_PERC 94
+#define WCN36XX_HAL_CFG_BTC_DHCP_PROT_ON_A2DP 95
+#define WCN36XX_HAL_CFG_BTC_DHCP_PROT_ON_SCO 96
+#define WCN36XX_HAL_CFG_ENABLE_UNICAST_FILTER 97
+#define WCN36XX_HAL_CFG_MAX_ASSOC_LIMIT 98
+#define WCN36XX_HAL_CFG_ENABLE_LPWR_IMG_TRANSITION 99
+#define WCN36XX_HAL_CFG_ENABLE_MCC_ADAPTIVE_SCHEDULER 100
+#define WCN36XX_HAL_CFG_ENABLE_DETECT_PS_SUPPORT 101
+#define WCN36XX_HAL_CFG_AP_LINK_MONITOR_TIMEOUT 102
+#define WCN36XX_HAL_CFG_BTC_DWELL_TIME_MULTIPLIER 103
+#define WCN36XX_HAL_CFG_ENABLE_TDLS_OXYGEN_MODE 104
+#define WCN36XX_HAL_CFG_MAX_PARAMS 105
+
+/* Message definitons - All the messages below need to be packed */
+
+/* Definition for HAL API Version. */
+struct wcnss_wlan_version {
+ u8 revision;
+ u8 version;
+ u8 minor;
+ u8 major;
+} __packed;
+
+/* Definition for Encryption Keys */
+struct wcn36xx_hal_keys {
+ u8 id;
+
+ /* 0 for multicast */
+ u8 unicast;
+
+ enum ani_key_direction direction;
+
+ /* Usage is unknown */
+ u8 rsc[WLAN_MAX_KEY_RSC_LEN];
+
+ /* =1 for authenticator,=0 for supplicant */
+ u8 pae_role;
+
+ u16 length;
+ u8 key[WCN36XX_HAL_MAC_MAX_KEY_LENGTH];
+} __packed;
+
+/*
+ * set_sta_key_params Moving here since it is shared by
+ * configbss/setstakey msgs
+ */
+struct wcn36xx_hal_set_sta_key_params {
+ /* STA Index */
+ u16 sta_index;
+
+ /* Encryption Type used with peer */
+ enum ani_ed_type enc_type;
+
+ /* STATIC/DYNAMIC - valid only for WEP */
+ enum ani_wep_type wep_type;
+
+ /* Default WEP key, valid only for static WEP, must between 0 and 3. */
+ u8 def_wep_idx;
+
+ /* valid only for non-static WEP encyrptions */
+ struct wcn36xx_hal_keys key[WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS];
+
+ /*
+ * Control for Replay Count, 1= Single TID based replay count on Tx
+ * 0 = Per TID based replay count on TX
+ */
+ u8 single_tid_rc;
+
+} __packed;
+
+/* 4-byte control message header used by HAL*/
+struct wcn36xx_hal_msg_header {
+ enum wcn36xx_hal_host_msg_type msg_type:16;
+ enum wcn36xx_hal_host_msg_version msg_version:16;
+ u32 len;
+} __packed;
+
+/* Config format required by HAL for each CFG item*/
+struct wcn36xx_hal_cfg {
+ /* Cfg Id. The Id required by HAL is exported by HAL
+ * in shared header file between UMAC and HAL.*/
+ u16 id;
+
+ /* Length of the Cfg. This parameter is used to go to next cfg
+ * in the TLV format.*/
+ u16 len;
+
+ /* Padding bytes for unaligned address's */
+ u16 pad_bytes;
+
+ /* Reserve bytes for making cfgVal to align address */
+ u16 reserve;
+
+ /* Following the uCfgLen field there should be a 'uCfgLen' bytes
+ * containing the uCfgValue ; u8 uCfgValue[uCfgLen] */
+} __packed;
+
+struct wcn36xx_hal_mac_start_parameters {
+ /* Drive Type - Production or FTM etc */
+ enum driver_type type;
+
+ /* Length of the config buffer */
+ u32 len;
+
+ /* Following this there is a TLV formatted buffer of length
+ * "len" bytes containing all config values.
+ * The TLV is expected to be formatted like this:
+ * 0 15 31 31+CFG_LEN-1 length-1
+ * | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......|
+ */
+} __packed;
+
+struct wcn36xx_hal_mac_start_req_msg {
+ /* config buffer must start in TLV format just here */
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_mac_start_parameters params;
+} __packed;
+
+struct wcn36xx_hal_mac_start_rsp_params {
+ /* success or failure */
+ u16 status;
+
+ /* Max number of STA supported by the device */
+ u8 stations;
+
+ /* Max number of BSS supported by the device */
+ u8 bssids;
+
+ /* API Version */
+ struct wcnss_wlan_version version;
+
+ /* CRM build information */
+ u8 crm_version[WCN36XX_HAL_VERSION_LENGTH];
+
+ /* hardware/chipset/misc version information */
+ u8 wlan_version[WCN36XX_HAL_VERSION_LENGTH];
+
+} __packed;
+
+struct wcn36xx_hal_mac_start_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_mac_start_rsp_params start_rsp_params;
+} __packed;
+
+struct wcn36xx_hal_mac_stop_req_params {
+ /* The reason for which the device is being stopped */
+ enum wcn36xx_hal_stop_type reason;
+
+} __packed;
+
+struct wcn36xx_hal_mac_stop_req_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_mac_stop_req_params stop_req_params;
+} __packed;
+
+struct wcn36xx_hal_mac_stop_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+} __packed;
+
+struct wcn36xx_hal_update_cfg_req_msg {
+ /*
+ * Note: The length specified in tHalUpdateCfgReqMsg messages should be
+ * header.msgLen = sizeof(tHalUpdateCfgReqMsg) + uConfigBufferLen
+ */
+ struct wcn36xx_hal_msg_header header;
+
+ /* Length of the config buffer. Allows UMAC to update multiple CFGs */
+ u32 len;
+
+ /*
+ * Following this there is a TLV formatted buffer of length
+ * "uConfigBufferLen" bytes containing all config values.
+ * The TLV is expected to be formatted like this:
+ * 0 15 31 31+CFG_LEN-1 length-1
+ * | CFG_ID | CFG_LEN | CFG_BODY | CFG_ID |......|
+ */
+
+} __packed;
+
+struct wcn36xx_hal_update_cfg_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+} __packed;
+
+/* Frame control field format (2 bytes) */
+struct wcn36xx_hal_mac_frame_ctl {
+
+#ifndef ANI_LITTLE_BIT_ENDIAN
+
+ u8 subType:4;
+ u8 type:2;
+ u8 protVer:2;
+
+ u8 order:1;
+ u8 wep:1;
+ u8 moreData:1;
+ u8 powerMgmt:1;
+ u8 retry:1;
+ u8 moreFrag:1;
+ u8 fromDS:1;
+ u8 toDS:1;
+
+#else
+
+ u8 protVer:2;
+ u8 type:2;
+ u8 subType:4;
+
+ u8 toDS:1;
+ u8 fromDS:1;
+ u8 moreFrag:1;
+ u8 retry:1;
+ u8 powerMgmt:1;
+ u8 moreData:1;
+ u8 wep:1;
+ u8 order:1;
+
+#endif
+
+};
+
+/* Sequence control field */
+struct wcn36xx_hal_mac_seq_ctl {
+ u8 fragNum:4;
+ u8 seqNumLo:4;
+ u8 seqNumHi:8;
+};
+
+/* Management header format */
+struct wcn36xx_hal_mac_mgmt_hdr {
+ struct wcn36xx_hal_mac_frame_ctl fc;
+ u8 durationLo;
+ u8 durationHi;
+ u8 da[6];
+ u8 sa[6];
+ u8 bssId[6];
+ struct wcn36xx_hal_mac_seq_ctl seqControl;
+};
+
+/* FIXME: pronto v1 apparently has 4 */
+#define WCN36XX_HAL_NUM_BSSID 2
+
+/* Scan Entry to hold active BSS idx's */
+struct wcn36xx_hal_scan_entry {
+ u8 bss_index[WCN36XX_HAL_NUM_BSSID];
+ u8 active_bss_count;
+};
+
+struct wcn36xx_hal_init_scan_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* LEARN - AP Role
+ SCAN - STA Role */
+ enum wcn36xx_hal_sys_mode mode;
+
+ /* BSSID of the BSS */
+ u8 bssid[ETH_ALEN];
+
+ /* Whether BSS needs to be notified */
+ u8 notify;
+
+ /* Kind of frame to be used for notifying the BSS (Data Null, QoS
+ * Null, or CTS to Self). Must always be a valid frame type. */
+ u8 frame_type;
+
+ /* UMAC has the option of passing the MAC frame to be used for
+ * notifying the BSS. If non-zero, HAL will use the MAC frame
+ * buffer pointed to by macMgmtHdr. If zero, HAL will generate the
+ * appropriate MAC frame based on frameType. */
+ u8 frame_len;
+
+ /* Following the framelength there is a MAC frame buffer if
+ * frameLength is non-zero. */
+ struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
+
+ /* Entry to hold number of active BSS idx's */
+ struct wcn36xx_hal_scan_entry scan_entry;
+};
+
+struct wcn36xx_hal_init_scan_con_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* LEARN - AP Role
+ SCAN - STA Role */
+ enum wcn36xx_hal_sys_mode mode;
+
+ /* BSSID of the BSS */
+ u8 bssid[ETH_ALEN];
+
+ /* Whether BSS needs to be notified */
+ u8 notify;
+
+ /* Kind of frame to be used for notifying the BSS (Data Null, QoS
+ * Null, or CTS to Self). Must always be a valid frame type. */
+ u8 frame_type;
+
+ /* UMAC has the option of passing the MAC frame to be used for
+ * notifying the BSS. If non-zero, HAL will use the MAC frame
+ * buffer pointed to by macMgmtHdr. If zero, HAL will generate the
+ * appropriate MAC frame based on frameType. */
+ u8 frame_length;
+
+ /* Following the framelength there is a MAC frame buffer if
+ * frameLength is non-zero. */
+ struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
+
+ /* Entry to hold number of active BSS idx's */
+ struct wcn36xx_hal_scan_entry scan_entry;
+
+ /* Single NoA usage in Scanning */
+ u8 use_noa;
+
+ /* Indicates the scan duration (in ms) */
+ u16 scan_duration;
+
+};
+
+struct wcn36xx_hal_init_scan_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+} __packed;
+
+struct wcn36xx_hal_start_scan_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Indicates the channel to scan */
+ u8 scan_channel;
+} __packed;
+
+struct wcn36xx_hal_start_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ u32 start_tsf[2];
+ u8 tx_mgmt_power;
+
+} __packed;
+
+struct wcn36xx_hal_end_scan_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Indicates the channel to stop scanning. Not used really. But
+ * retained for symmetry with "start Scan" message. It can also
+ * help in error check if needed. */
+ u8 scan_channel;
+} __packed;
+
+struct wcn36xx_hal_end_scan_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+} __packed;
+
+struct wcn36xx_hal_finish_scan_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Identifies the operational state of the AP/STA
+ * LEARN - AP Role SCAN - STA Role */
+ enum wcn36xx_hal_sys_mode mode;
+
+ /* Operating channel to tune to. */
+ u8 oper_channel;
+
+ /* Channel Bonding state If 20/40 MHz is operational, this will
+ * indicate the 40 MHz extension channel in combination with the
+ * control channel */
+ enum phy_chan_bond_state cb_state;
+
+ /* BSSID of the BSS */
+ u8 bssid[ETH_ALEN];
+
+ /* Whether BSS needs to be notified */
+ u8 notify;
+
+ /* Kind of frame to be used for notifying the BSS (Data Null, QoS
+ * Null, or CTS to Self). Must always be a valid frame type. */
+ u8 frame_type;
+
+ /* UMAC has the option of passing the MAC frame to be used for
+ * notifying the BSS. If non-zero, HAL will use the MAC frame
+ * buffer pointed to by macMgmtHdr. If zero, HAL will generate the
+ * appropriate MAC frame based on frameType. */
+ u8 frame_length;
+
+ /* Following the framelength there is a MAC frame buffer if
+ * frameLength is non-zero. */
+ struct wcn36xx_hal_mac_mgmt_hdr mac_mgmt_hdr;
+
+ /* Entry to hold number of active BSS idx's */
+ struct wcn36xx_hal_scan_entry scan_entry;
+
+} __packed;
+
+struct wcn36xx_hal_finish_scan_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+} __packed;
+
+enum wcn36xx_hal_rate_index {
+ HW_RATE_INDEX_1MBPS = 0x82,
+ HW_RATE_INDEX_2MBPS = 0x84,
+ HW_RATE_INDEX_5_5MBPS = 0x8B,
+ HW_RATE_INDEX_6MBPS = 0x0C,
+ HW_RATE_INDEX_9MBPS = 0x12,
+ HW_RATE_INDEX_11MBPS = 0x96,
+ HW_RATE_INDEX_12MBPS = 0x18,
+ HW_RATE_INDEX_18MBPS = 0x24,
+ HW_RATE_INDEX_24MBPS = 0x30,
+ HW_RATE_INDEX_36MBPS = 0x48,
+ HW_RATE_INDEX_48MBPS = 0x60,
+ HW_RATE_INDEX_54MBPS = 0x6C
+};
+
+struct wcn36xx_hal_supported_rates {
+ /*
+ * For Self STA Entry: this represents Self Mode.
+ * For Peer Stations, this represents the mode of the peer.
+ * On Station:
+ *
+ * --this mode is updated when PE adds the Self Entry.
+ *
+ * -- OR when PE sends 'ADD_BSS' message and station context in BSS
+ * is used to indicate the mode of the AP.
+ *
+ * ON AP:
+ *
+ * -- this mode is updated when PE sends 'ADD_BSS' and Sta entry
+ * for that BSS is used to indicate the self mode of the AP.
+ *
+ * -- OR when a station is associated, PE sends 'ADD_STA' message
+ * with this mode updated.
+ */
+
+ enum sta_rate_mode op_rate_mode;
+
+ /* 11b, 11a and aniLegacyRates are IE rates which gives rate in
+ * unit of 500Kbps */
+ u16 dsss_rates[WCN36XX_HAL_NUM_DSSS_RATES];
+ u16 ofdm_rates[WCN36XX_HAL_NUM_OFDM_RATES];
+ u16 legacy_rates[WCN36XX_HAL_NUM_POLARIS_RATES];
+ u16 reserved;
+
+ /* Taurus only supports 26 Titan Rates(no ESF/concat Rates will be
+ * supported) First 26 bits are reserved for those Titan rates and
+ * the last 4 bits(bit28-31) for Taurus, 2(bit26-27) bits are
+ * reserved. */
+ /* Titan and Taurus Rates */
+ u32 enhanced_rate_bitmap;
+
+ /*
+ * 0-76 bits used, remaining reserved
+ * bits 0-15 and 32 should be set.
+ */
+ u8 supported_mcs_set[WCN36XX_HAL_MAC_MAX_SUPPORTED_MCS_SET];
+
+ /*
+ * RX Highest Supported Data Rate defines the highest data
+ * rate that the STA is able to receive, in unites of 1Mbps.
+ * This value is derived from "Supported MCS Set field" inside
+ * the HT capability element.
+ */
+ u16 rx_highest_data_rate;
+
+} __packed;
+
+struct wcn36xx_hal_config_sta_params {
+ /* BSSID of STA */
+ u8 bssid[ETH_ALEN];
+
+ /* ASSOC ID, as assigned by UMAC */
+ u16 aid;
+
+ /* STA entry Type: 0 - Self, 1 - Other/Peer, 2 - BSSID, 3 - BCAST */
+ u8 type;
+
+ /* Short Preamble Supported. */
+ u8 short_preamble_supported;
+
+ /* MAC Address of STA */
+ u8 mac[ETH_ALEN];
+
+ /* Listen interval of the STA */
+ u16 listen_interval;
+
+ /* Support for 11e/WMM */
+ u8 wmm_enabled;
+
+ /* 11n HT capable STA */
+ u8 ht_capable;
+
+ /* TX Width Set: 0 - 20 MHz only, 1 - 20/40 MHz */
+ u8 tx_channel_width_set;
+
+ /* RIFS mode 0 - NA, 1 - Allowed */
+ u8 rifs_mode;
+
+ /* L-SIG TXOP Protection mechanism
+ 0 - No Support, 1 - Supported
+ SG - there is global field */
+ u8 lsig_txop_protection;
+
+ /* Max Ampdu Size supported by STA. TPE programming.
+ 0 : 8k , 1 : 16k, 2 : 32k, 3 : 64k */
+ u8 max_ampdu_size;
+
+ /* Max Ampdu density. Used by RA. 3 : 0~7 : 2^(11nAMPDUdensity -4) */
+ u8 max_ampdu_density;
+
+ /* Max AMSDU size 1 : 3839 bytes, 0 : 7935 bytes */
+ u8 max_amsdu_size;
+
+ /* Short GI support for 40Mhz packets */
+ u8 sgi_40mhz;
+
+ /* Short GI support for 20Mhz packets */
+ u8 sgi_20Mhz;
+
+ /* TODO move this parameter to the end for 3680 */
+ /* These rates are the intersection of peer and self capabilities. */
+ struct wcn36xx_hal_supported_rates supported_rates;
+
+ /* Robust Management Frame (RMF) enabled/disabled */
+ u8 rmf;
+
+ /* The unicast encryption type in the association */
+ u32 encrypt_type;
+
+ /* HAL should update the existing STA entry, if this flag is set. UMAC
+ will set this flag in case of RE-ASSOC, where we want to reuse the
+ old STA ID. 0 = Add, 1 = Update */
+ u8 action;
+
+ /* U-APSD Flags: 1b per AC. Encoded as follows:
+ b7 b6 b5 b4 b3 b2 b1 b0 =
+ X X X X BE BK VI VO */
+ u8 uapsd;
+
+ /* Max SP Length */
+ u8 max_sp_len;
+
+ /* 11n Green Field preamble support
+ 0 - Not supported, 1 - Supported */
+ u8 green_field_capable;
+
+ /* MIMO Power Save mode */
+ enum wcn36xx_hal_ht_mimo_state mimo_ps;
+
+ /* Delayed BA Support */
+ u8 delayed_ba_support;
+
+ /* Max AMPDU duration in 32us */
+ u8 max_ampdu_duration;
+
+ /* HT STA should set it to 1 if it is enabled in BSS. HT STA should
+ * set it to 0 if AP does not support it. This indication is sent
+ * to HAL and HAL uses this flag to pickup up appropriate 40Mhz
+ * rates. */
+ u8 dsss_cck_mode_40mhz;
+
+ /* Valid STA Idx when action=Update. Set to 0xFF when invalid!
+ * Retained for backward compalibity with existing HAL code */
+ u8 sta_index;
+
+ /* BSSID of BSS to which station is associated. Set to 0xFF when
+ * invalid. Retained for backward compalibity with existing HAL
+ * code */
+ u8 bssid_index;
+
+ u8 p2p;
+
+ /* TODO add this parameter for 3680. */
+ /* Reserved to align next field on a dword boundary */
+ /* u8 reserved; */
+} __packed;
+
+struct wcn36xx_hal_config_sta_req_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_config_sta_params sta_params;
+} __packed;
+
+struct wcn36xx_hal_config_sta_params_v1 {
+ /* BSSID of STA */
+ u8 bssid[ETH_ALEN];
+
+ /* ASSOC ID, as assigned by UMAC */
+ u16 aid;
+
+ /* STA entry Type: 0 - Self, 1 - Other/Peer, 2 - BSSID, 3 - BCAST */
+ u8 type;
+
+ /* Short Preamble Supported. */
+ u8 short_preamble_supported;
+
+ /* MAC Address of STA */
+ u8 mac[ETH_ALEN];
+
+ /* Listen interval of the STA */
+ u16 listen_interval;
+
+ /* Support for 11e/WMM */
+ u8 wmm_enabled;
+
+ /* 11n HT capable STA */
+ u8 ht_capable;
+
+ /* TX Width Set: 0 - 20 MHz only, 1 - 20/40 MHz */
+ u8 tx_channel_width_set;
+
+ /* RIFS mode 0 - NA, 1 - Allowed */
+ u8 rifs_mode;
+
+ /* L-SIG TXOP Protection mechanism
+ 0 - No Support, 1 - Supported
+ SG - there is global field */
+ u8 lsig_txop_protection;
+
+ /* Max Ampdu Size supported by STA. TPE programming.
+ 0 : 8k , 1 : 16k, 2 : 32k, 3 : 64k */
+ u8 max_ampdu_size;
+
+ /* Max Ampdu density. Used by RA. 3 : 0~7 : 2^(11nAMPDUdensity -4) */
+ u8 max_ampdu_density;
+
+ /* Max AMSDU size 1 : 3839 bytes, 0 : 7935 bytes */
+ u8 max_amsdu_size;
+
+ /* Short GI support for 40Mhz packets */
+ u8 sgi_40mhz;
+
+ /* Short GI support for 20Mhz packets */
+ u8 sgi_20Mhz;
+
+ /* Robust Management Frame (RMF) enabled/disabled */
+ u8 rmf;
+
+ /* The unicast encryption type in the association */
+ u32 encrypt_type;
+
+ /* HAL should update the existing STA entry, if this flag is set. UMAC
+ will set this flag in case of RE-ASSOC, where we want to reuse the
+ old STA ID. 0 = Add, 1 = Update */
+ u8 action;
+
+ /* U-APSD Flags: 1b per AC. Encoded as follows:
+ b7 b6 b5 b4 b3 b2 b1 b0 =
+ X X X X BE BK VI VO */
+ u8 uapsd;
+
+ /* Max SP Length */
+ u8 max_sp_len;
+
+ /* 11n Green Field preamble support
+ 0 - Not supported, 1 - Supported */
+ u8 green_field_capable;
+
+ /* MIMO Power Save mode */
+ enum wcn36xx_hal_ht_mimo_state mimo_ps;
+
+ /* Delayed BA Support */
+ u8 delayed_ba_support;
+
+ /* Max AMPDU duration in 32us */
+ u8 max_ampdu_duration;
+
+ /* HT STA should set it to 1 if it is enabled in BSS. HT STA should
+ * set it to 0 if AP does not support it. This indication is sent
+ * to HAL and HAL uses this flag to pickup up appropriate 40Mhz
+ * rates. */
+ u8 dsss_cck_mode_40mhz;
+
+ /* Valid STA Idx when action=Update. Set to 0xFF when invalid!
+ * Retained for backward compalibity with existing HAL code */
+ u8 sta_index;
+
+ /* BSSID of BSS to which station is associated. Set to 0xFF when
+ * invalid. Retained for backward compalibity with existing HAL
+ * code */
+ u8 bssid_index;
+
+ u8 p2p;
+
+ /* Reserved to align next field on a dword boundary */
+ u8 reserved;
+
+ /* These rates are the intersection of peer and self capabilities. */
+ struct wcn36xx_hal_supported_rates supported_rates;
+} __packed;
+
+struct wcn36xx_hal_config_sta_req_msg_v1 {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_config_sta_params_v1 sta_params;
+} __packed;
+
+struct config_sta_rsp_params {
+ /* success or failure */
+ u32 status;
+
+ /* Station index; valid only when 'status' field value SUCCESS */
+ u8 sta_index;
+
+ /* BSSID Index of BSS to which the station is associated */
+ u8 bssid_index;
+
+ /* DPU Index for PTK */
+ u8 dpu_index;
+
+ /* DPU Index for GTK */
+ u8 bcast_dpu_index;
+
+ /* DPU Index for IGTK */
+ u8 bcast_mgmt_dpu_idx;
+
+ /* PTK DPU signature */
+ u8 uc_ucast_sig;
+
+ /* GTK DPU isignature */
+ u8 uc_bcast_sig;
+
+ /* IGTK DPU signature */
+ u8 uc_mgmt_sig;
+
+ u8 p2p;
+
+} __packed;
+
+struct wcn36xx_hal_config_sta_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ struct config_sta_rsp_params params;
+} __packed;
+
+/* Delete STA Request message */
+struct wcn36xx_hal_delete_sta_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Index of STA to delete */
+ u8 sta_index;
+
+} __packed;
+
+/* Delete STA Response message */
+struct wcn36xx_hal_delete_sta_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ /* Index of STA deleted */
+ u8 sta_id;
+} __packed;
+
+/* 12 Bytes long because this structure can be used to represent rate and
+ * extended rate set IEs. The parser assume this to be at least 12 */
+struct wcn36xx_hal_rate_set {
+ u8 num_rates;
+ u8 rate[WCN36XX_HAL_MAC_RATESET_EID_MAX];
+} __packed;
+
+/* access category record */
+struct wcn36xx_hal_aci_aifsn {
+#ifndef ANI_LITTLE_BIT_ENDIAN
+ u8 rsvd:1;
+ u8 aci:2;
+ u8 acm:1;
+ u8 aifsn:4;
+#else
+ u8 aifsn:4;
+ u8 acm:1;
+ u8 aci:2;
+ u8 rsvd:1;
+#endif
+} __packed;
+
+/* contention window size */
+struct wcn36xx_hal_mac_cw {
+#ifndef ANI_LITTLE_BIT_ENDIAN
+ u8 max:4;
+ u8 min:4;
+#else
+ u8 min:4;
+ u8 max:4;
+#endif
+} __packed;
+
+struct wcn36xx_hal_edca_param_record {
+ struct wcn36xx_hal_aci_aifsn aci;
+ struct wcn36xx_hal_mac_cw cw;
+ u16 txop_limit;
+} __packed;
+
+struct wcn36xx_hal_mac_ssid {
+ u8 length;
+ u8 ssid[32];
+} __packed;
+
+/* Concurrency role. These are generic IDs that identify the various roles
+ * in the software system. */
+enum wcn36xx_hal_con_mode {
+ WCN36XX_HAL_STA_MODE = 0,
+
+ /* to support softAp mode . This is misleading.
+ It means AP MODE only. */
+ WCN36XX_HAL_STA_SAP_MODE = 1,
+
+ WCN36XX_HAL_P2P_CLIENT_MODE,
+ WCN36XX_HAL_P2P_GO_MODE,
+ WCN36XX_HAL_MONITOR_MODE,
+};
+
+/* This is a bit pattern to be set for each mode
+ * bit 0 - sta mode
+ * bit 1 - ap mode
+ * bit 2 - p2p client mode
+ * bit 3 - p2p go mode */
+enum wcn36xx_hal_concurrency_mode {
+ HAL_STA = 1,
+ HAL_SAP = 2,
+
+ /* to support sta, softAp mode . This means STA+AP mode */
+ HAL_STA_SAP = 3,
+
+ HAL_P2P_CLIENT = 4,
+ HAL_P2P_GO = 8,
+ HAL_MAX_CONCURRENCY_PERSONA = 4
+};
+
+struct wcn36xx_hal_config_bss_params {
+ /* BSSID */
+ u8 bssid[ETH_ALEN];
+
+ /* Self Mac Address */
+ u8 self_mac_addr[ETH_ALEN];
+
+ /* BSS type */
+ enum wcn36xx_hal_bss_type bss_type;
+
+ /* Operational Mode: AP =0, STA = 1 */
+ u8 oper_mode;
+
+ /* Network Type */
+ enum wcn36xx_hal_nw_type nw_type;
+
+ /* Used to classify PURE_11G/11G_MIXED to program MTU */
+ u8 short_slot_time_supported;
+
+ /* Co-exist with 11a STA */
+ u8 lla_coexist;
+
+ /* Co-exist with 11b STA */
+ u8 llb_coexist;
+
+ /* Co-exist with 11g STA */
+ u8 llg_coexist;
+
+ /* Coexistence with 11n STA */
+ u8 ht20_coexist;
+
+ /* Non GF coexist flag */
+ u8 lln_non_gf_coexist;
+
+ /* TXOP protection support */
+ u8 lsig_tx_op_protection_full_support;
+
+ /* RIFS mode */
+ u8 rifs_mode;
+
+ /* Beacon Interval in TU */
+ u16 beacon_interval;
+
+ /* DTIM period */
+ u8 dtim_period;
+
+ /* TX Width Set: 0 - 20 MHz only, 1 - 20/40 MHz */
+ u8 tx_channel_width_set;
+
+ /* Operating channel */
+ u8 oper_channel;
+
+ /* Extension channel for channel bonding */
+ u8 ext_channel;
+
+ /* Reserved to align next field on a dword boundary */
+ u8 reserved;
+
+ /* TODO move sta to the end for 3680 */
+ /* Context of the station being added in HW
+ * Add a STA entry for "itself" -
+ *
+ * On AP - Add the AP itself in an "STA context"
+ *
+ * On STA - Add the AP to which this STA is joining in an
+ * "STA context"
+ */
+ struct wcn36xx_hal_config_sta_params sta;
+ /* SSID of the BSS */
+ struct wcn36xx_hal_mac_ssid ssid;
+
+ /* HAL should update the existing BSS entry, if this flag is set.
+ * UMAC will set this flag in case of reassoc, where we want to
+ * resue the the old BSSID and still return success 0 = Add, 1 =
+ * Update */
+ u8 action;
+
+ /* MAC Rate Set */
+ struct wcn36xx_hal_rate_set rateset;
+
+ /* Enable/Disable HT capabilities of the BSS */
+ u8 ht;
+
+ /* Enable/Disable OBSS protection */
+ u8 obss_prot_enabled;
+
+ /* RMF enabled/disabled */
+ u8 rmf;
+
+ /* HT Operating Mode operating mode of the 802.11n STA */
+ enum wcn36xx_hal_ht_operating_mode ht_oper_mode;
+
+ /* Dual CTS Protection: 0 - Unused, 1 - Used */
+ u8 dual_cts_protection;
+
+ /* Probe Response Max retries */
+ u8 max_probe_resp_retry_limit;
+
+ /* To Enable Hidden ssid */
+ u8 hidden_ssid;
+
+ /* To Enable Disable FW Proxy Probe Resp */
+ u8 proxy_probe_resp;
+
+ /* Boolean to indicate if EDCA params are valid. UMAC might not
+ * have valid EDCA params or might not desire to apply EDCA params
+ * during config BSS. 0 implies Not Valid ; Non-Zero implies
+ * valid */
+ u8 edca_params_valid;
+
+ /* EDCA Parameters for Best Effort Access Category */
+ struct wcn36xx_hal_edca_param_record acbe;
+
+ /* EDCA Parameters forBackground Access Category */
+ struct wcn36xx_hal_edca_param_record acbk;
+
+ /* EDCA Parameters for Video Access Category */
+ struct wcn36xx_hal_edca_param_record acvi;
+
+ /* EDCA Parameters for Voice Access Category */
+ struct wcn36xx_hal_edca_param_record acvo;
+
+ /* Ext Bss Config Msg if set */
+ u8 ext_set_sta_key_param_valid;
+
+ /* SetStaKeyParams for ext bss msg */
+ struct wcn36xx_hal_set_sta_key_params ext_set_sta_key_param;
+
+ /* Persona for the BSS can be STA,AP,GO,CLIENT value same as enum
+ * wcn36xx_hal_con_mode */
+ u8 wcn36xx_hal_persona;
+
+ u8 spectrum_mgt_enable;
+
+ /* HAL fills in the tx power used for mgmt frames in txMgmtPower */
+ s8 tx_mgmt_power;
+
+ /* maxTxPower has max power to be used after applying the power
+ * constraint if any */
+ s8 max_tx_power;
+} __packed;
+
+struct wcn36xx_hal_config_bss_req_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_config_bss_params bss_params;
+} __packed;
+
+struct wcn36xx_hal_config_bss_params_v1 {
+ /* BSSID */
+ u8 bssid[ETH_ALEN];
+
+ /* Self Mac Address */
+ u8 self_mac_addr[ETH_ALEN];
+
+ /* BSS type */
+ enum wcn36xx_hal_bss_type bss_type;
+
+ /* Operational Mode: AP =0, STA = 1 */
+ u8 oper_mode;
+
+ /* Network Type */
+ enum wcn36xx_hal_nw_type nw_type;
+
+ /* Used to classify PURE_11G/11G_MIXED to program MTU */
+ u8 short_slot_time_supported;
+
+ /* Co-exist with 11a STA */
+ u8 lla_coexist;
+
+ /* Co-exist with 11b STA */
+ u8 llb_coexist;
+
+ /* Co-exist with 11g STA */
+ u8 llg_coexist;
+
+ /* Coexistence with 11n STA */
+ u8 ht20_coexist;
+
+ /* Non GF coexist flag */
+ u8 lln_non_gf_coexist;
+
+ /* TXOP protection support */
+ u8 lsig_tx_op_protection_full_support;
+
+ /* RIFS mode */
+ u8 rifs_mode;
+
+ /* Beacon Interval in TU */
+ u16 beacon_interval;
+
+ /* DTIM period */
+ u8 dtim_period;
+
+ /* TX Width Set: 0 - 20 MHz only, 1 - 20/40 MHz */
+ u8 tx_channel_width_set;
+
+ /* Operating channel */
+ u8 oper_channel;
+
+ /* Extension channel for channel bonding */
+ u8 ext_channel;
+
+ /* Reserved to align next field on a dword boundary */
+ u8 reserved;
+
+ /* SSID of the BSS */
+ struct wcn36xx_hal_mac_ssid ssid;
+
+ /* HAL should update the existing BSS entry, if this flag is set.
+ * UMAC will set this flag in case of reassoc, where we want to
+ * resue the the old BSSID and still return success 0 = Add, 1 =
+ * Update */
+ u8 action;
+
+ /* MAC Rate Set */
+ struct wcn36xx_hal_rate_set rateset;
+
+ /* Enable/Disable HT capabilities of the BSS */
+ u8 ht;
+
+ /* Enable/Disable OBSS protection */
+ u8 obss_prot_enabled;
+
+ /* RMF enabled/disabled */
+ u8 rmf;
+
+ /* HT Operating Mode operating mode of the 802.11n STA */
+ enum wcn36xx_hal_ht_operating_mode ht_oper_mode;
+
+ /* Dual CTS Protection: 0 - Unused, 1 - Used */
+ u8 dual_cts_protection;
+
+ /* Probe Response Max retries */
+ u8 max_probe_resp_retry_limit;
+
+ /* To Enable Hidden ssid */
+ u8 hidden_ssid;
+
+ /* To Enable Disable FW Proxy Probe Resp */
+ u8 proxy_probe_resp;
+
+ /* Boolean to indicate if EDCA params are valid. UMAC might not
+ * have valid EDCA params or might not desire to apply EDCA params
+ * during config BSS. 0 implies Not Valid ; Non-Zero implies
+ * valid */
+ u8 edca_params_valid;
+
+ /* EDCA Parameters for Best Effort Access Category */
+ struct wcn36xx_hal_edca_param_record acbe;
+
+ /* EDCA Parameters forBackground Access Category */
+ struct wcn36xx_hal_edca_param_record acbk;
+
+ /* EDCA Parameters for Video Access Category */
+ struct wcn36xx_hal_edca_param_record acvi;
+
+ /* EDCA Parameters for Voice Access Category */
+ struct wcn36xx_hal_edca_param_record acvo;
+
+ /* Ext Bss Config Msg if set */
+ u8 ext_set_sta_key_param_valid;
+
+ /* SetStaKeyParams for ext bss msg */
+ struct wcn36xx_hal_set_sta_key_params ext_set_sta_key_param;
+
+ /* Persona for the BSS can be STA,AP,GO,CLIENT value same as enum
+ * wcn36xx_hal_con_mode */
+ u8 wcn36xx_hal_persona;
+
+ u8 spectrum_mgt_enable;
+
+ /* HAL fills in the tx power used for mgmt frames in txMgmtPower */
+ s8 tx_mgmt_power;
+
+ /* maxTxPower has max power to be used after applying the power
+ * constraint if any */
+ s8 max_tx_power;
+
+ /* Context of the station being added in HW
+ * Add a STA entry for "itself" -
+ *
+ * On AP - Add the AP itself in an "STA context"
+ *
+ * On STA - Add the AP to which this STA is joining in an
+ * "STA context"
+ */
+ struct wcn36xx_hal_config_sta_params_v1 sta;
+} __packed;
+
+struct wcn36xx_hal_config_bss_req_msg_v1 {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_config_bss_params_v1 bss_params;
+} __packed;
+
+struct wcn36xx_hal_config_bss_rsp_params {
+ /* Success or Failure */
+ u32 status;
+
+ /* BSS index allocated by HAL */
+ u8 bss_index;
+
+ /* DPU descriptor index for PTK */
+ u8 dpu_desc_index;
+
+ /* PTK DPU signature */
+ u8 ucast_dpu_signature;
+
+ /* DPU descriptor index for GTK */
+ u8 bcast_dpu_desc_indx;
+
+ /* GTK DPU signature */
+ u8 bcast_dpu_signature;
+
+ /* DPU descriptor for IGTK */
+ u8 mgmt_dpu_desc_index;
+
+ /* IGTK DPU signature */
+ u8 mgmt_dpu_signature;
+
+ /* Station Index for BSS entry */
+ u8 bss_sta_index;
+
+ /* Self station index for this BSS */
+ u8 bss_self_sta_index;
+
+ /* Bcast station for buffering bcast frames in AP role */
+ u8 bss_bcast_sta_idx;
+
+ /* MAC Address of STA(PEER/SELF) in staContext of configBSSReq */
+ u8 mac[ETH_ALEN];
+
+ /* HAL fills in the tx power used for mgmt frames in this field. */
+ s8 tx_mgmt_power;
+
+} __packed;
+
+struct wcn36xx_hal_config_bss_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_config_bss_rsp_params bss_rsp_params;
+} __packed;
+
+struct wcn36xx_hal_delete_bss_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* BSS index to be deleted */
+ u8 bss_index;
+
+} __packed;
+
+struct wcn36xx_hal_delete_bss_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Success or Failure */
+ u32 status;
+
+ /* BSS index that has been deleted */
+ u8 bss_index;
+
+} __packed;
+
+struct wcn36xx_hal_join_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Indicates the BSSID to which STA is going to associate */
+ u8 bssid[ETH_ALEN];
+
+ /* Indicates the channel to switch to. */
+ u8 channel;
+
+ /* Self STA MAC */
+ u8 self_sta_mac_addr[ETH_ALEN];
+
+ /* Local power constraint */
+ u8 local_power_constraint;
+
+ /* Secondary channel offset */
+ enum phy_chan_bond_state secondary_channel_offset;
+
+ /* link State */
+ enum wcn36xx_hal_link_state link_state;
+
+ /* Max TX power */
+ s8 max_tx_power;
+} __packed;
+
+struct wcn36xx_hal_join_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ /* HAL fills in the tx power used for mgmt frames in this field */
+ u8 tx_mgmt_power;
+} __packed;
+
+struct post_assoc_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ struct wcn36xx_hal_config_sta_params sta_params;
+ struct wcn36xx_hal_config_bss_params bss_params;
+};
+
+struct post_assoc_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct config_sta_rsp_params sta_rsp_params;
+ struct wcn36xx_hal_config_bss_rsp_params bss_rsp_params;
+};
+
+/* This is used to create a set of WEP keys for a given BSS. */
+struct wcn36xx_hal_set_bss_key_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* BSS Index of the BSS */
+ u8 bss_idx;
+
+ /* Encryption Type used with peer */
+ enum ani_ed_type enc_type;
+
+ /* Number of keys */
+ u8 num_keys;
+
+ /* Array of keys. */
+ struct wcn36xx_hal_keys keys[WCN36XX_HAL_MAC_MAX_NUM_OF_DEFAULT_KEYS];
+
+ /* Control for Replay Count, 1= Single TID based replay count on Tx
+ * 0 = Per TID based replay count on TX */
+ u8 single_tid_rc;
+} __packed;
+
+/* tagged version of set bss key */
+struct wcn36xx_hal_set_bss_key_req_msg_tagged {
+ struct wcn36xx_hal_set_bss_key_req_msg Msg;
+ u32 tag;
+} __packed;
+
+struct wcn36xx_hal_set_bss_key_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+} __packed;
+
+/*
+ * This is used configure the key information on a given station.
+ * When the sec_type is WEP40 or WEP104, the def_wep_idx is used to locate
+ * a preconfigured key from a BSS the station assoicated with; otherwise
+ * a new key descriptor is created based on the key field.
+ */
+struct wcn36xx_hal_set_sta_key_req_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_set_sta_key_params set_sta_key_params;
+} __packed;
+
+struct wcn36xx_hal_set_sta_key_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+} __packed;
+
+struct wcn36xx_hal_remove_bss_key_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* BSS Index of the BSS */
+ u8 bss_idx;
+
+ /* Encryption Type used with peer */
+ enum ani_ed_type enc_type;
+
+ /* Key Id */
+ u8 key_id;
+
+ /* STATIC/DYNAMIC. Used in Nullifying in Key Descriptors for
+ * Static/Dynamic keys */
+ enum ani_wep_type wep_type;
+} __packed;
+
+struct wcn36xx_hal_remove_bss_key_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+} __packed;
+
+/*
+ * This is used by PE to Remove the key information on a given station.
+ */
+struct wcn36xx_hal_remove_sta_key_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* STA Index */
+ u16 sta_idx;
+
+ /* Encryption Type used with peer */
+ enum ani_ed_type enc_type;
+
+ /* Key Id */
+ u8 key_id;
+
+ /* Whether to invalidate the Broadcast key or Unicast key. In case
+ * of WEP, the same key is used for both broadcast and unicast. */
+ u8 unicast;
+
+} __packed;
+
+struct wcn36xx_hal_remove_sta_key_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /*success or failure */
+ u32 status;
+
+} __packed;
+
+#ifdef FEATURE_OEM_DATA_SUPPORT
+
+#ifndef OEM_DATA_REQ_SIZE
+#define OEM_DATA_REQ_SIZE 134
+#endif
+
+#ifndef OEM_DATA_RSP_SIZE
+#define OEM_DATA_RSP_SIZE 1968
+#endif
+
+struct start_oem_data_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u32 status;
+ tSirMacAddr self_mac_addr;
+ u8 oem_data_req[OEM_DATA_REQ_SIZE];
+
+};
+
+struct start_oem_data_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 oem_data_rsp[OEM_DATA_RSP_SIZE];
+};
+
+#endif
+
+struct wcn36xx_hal_switch_channel_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Channel number */
+ u8 channel_number;
+
+ /* Local power constraint */
+ u8 local_power_constraint;
+
+ /* Secondary channel offset */
+ enum phy_chan_bond_state secondary_channel_offset;
+
+ /* HAL fills in the tx power used for mgmt frames in this field. */
+ u8 tx_mgmt_power;
+
+ /* Max TX power */
+ u8 max_tx_power;
+
+ /* Self STA MAC */
+ u8 self_sta_mac_addr[ETH_ALEN];
+
+ /* VO WIFI comment: BSSID needed to identify session. As the
+ * request has power constraints, this should be applied only to
+ * that session Since MTU timing and EDCA are sessionized, this
+ * struct needs to be sessionized and bssid needs to be out of the
+ * VOWifi feature flag V IMP: Keep bssId field at the end of this
+ * msg. It is used to mantain backward compatbility by way of
+ * ignoring if using new host/old FW or old host/new FW since it is
+ * at the end of this struct
+ */
+ u8 bssid[ETH_ALEN];
+} __packed;
+
+struct wcn36xx_hal_switch_channel_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Status */
+ u32 status;
+
+ /* Channel number - same as in request */
+ u8 channel_number;
+
+ /* HAL fills in the tx power used for mgmt frames in this field */
+ u8 tx_mgmt_power;
+
+ /* BSSID needed to identify session - same as in request */
+ u8 bssid[ETH_ALEN];
+
+} __packed;
+
+struct update_edca_params_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /*BSS Index */
+ u16 bss_index;
+
+ /* Best Effort */
+ struct wcn36xx_hal_edca_param_record acbe;
+
+ /* Background */
+ struct wcn36xx_hal_edca_param_record acbk;
+
+ /* Video */
+ struct wcn36xx_hal_edca_param_record acvi;
+
+ /* Voice */
+ struct wcn36xx_hal_edca_param_record acvo;
+};
+
+struct update_edca_params_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct dpu_stats_params {
+ /* Index of STA to which the statistics */
+ u16 sta_index;
+
+ /* Encryption mode */
+ u8 enc_mode;
+
+ /* status */
+ u32 status;
+
+ /* Statistics */
+ u32 send_blocks;
+ u32 recv_blocks;
+ u32 replays;
+ u8 mic_error_cnt;
+ u32 prot_excl_cnt;
+ u16 format_err_cnt;
+ u16 un_decryptable_cnt;
+ u32 decrypt_err_cnt;
+ u32 decrypt_ok_cnt;
+};
+
+struct wcn36xx_hal_stats_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Valid STA Idx for per STA stats request */
+ u32 sta_id;
+
+ /* Categories of stats requested as specified in eHalStatsMask */
+ u32 stats_mask;
+};
+
+struct ani_summary_stats_info {
+ /* Total number of packets(per AC) that were successfully
+ * transmitted with retries */
+ u32 retry_cnt[4];
+
+ /* The number of MSDU packets and MMPDU frames per AC that the
+ * 802.11 station successfully transmitted after more than one
+ * retransmission attempt */
+ u32 multiple_retry_cnt[4];
+
+ /* Total number of packets(per AC) that were successfully
+ * transmitted (with and without retries, including multi-cast,
+ * broadcast) */
+ u32 tx_frm_cnt[4];
+
+ /* Total number of packets that were successfully received (after
+ * appropriate filter rules including multi-cast, broadcast) */
+ u32 rx_frm_cnt;
+
+ /* Total number of duplicate frames received successfully */
+ u32 frm_dup_cnt;
+
+ /* Total number packets(per AC) failed to transmit */
+ u32 fail_cnt[4];
+
+ /* Total number of RTS/CTS sequence failures for transmission of a
+ * packet */
+ u32 rts_fail_cnt;
+
+ /* Total number packets failed transmit because of no ACK from the
+ * remote entity */
+ u32 ack_fail_cnt;
+
+ /* Total number of RTS/CTS sequence success for transmission of a
+ * packet */
+ u32 rts_succ_cnt;
+
+ /* The sum of the receive error count and dropped-receive-buffer
+ * error count. HAL will provide this as a sum of (FCS error) +
+ * (Fail get BD/PDU in HW) */
+ u32 rx_discard_cnt;
+
+ /*
+ * The receive error count. HAL will provide the RxP FCS error
+ * global counter. */
+ u32 rx_error_cnt;
+
+ /* The sum of the transmit-directed byte count, transmit-multicast
+ * byte count and transmit-broadcast byte count. HAL will sum TPE
+ * UC/MC/BCAST global counters to provide this. */
+ u32 tx_byte_cnt;
+};
+
+/* defines tx_rate_flags */
+enum tx_rate_info {
+ /* Legacy rates */
+ HAL_TX_RATE_LEGACY = 0x1,
+
+ /* HT20 rates */
+ HAL_TX_RATE_HT20 = 0x2,
+
+ /* HT40 rates */
+ HAL_TX_RATE_HT40 = 0x4,
+
+ /* Rate with Short guard interval */
+ HAL_TX_RATE_SGI = 0x8,
+
+ /* Rate with Long guard interval */
+ HAL_TX_RATE_LGI = 0x10
+};
+
+struct ani_global_class_a_stats_info {
+ /* The number of MPDU frames received by the 802.11 station for
+ * MSDU packets or MMPDU frames */
+ u32 rx_frag_cnt;
+
+ /* The number of MPDU frames received by the 802.11 station for
+ * MSDU packets or MMPDU frames when a promiscuous packet filter
+ * was enabled */
+ u32 promiscuous_rx_frag_cnt;
+
+ /* The receiver input sensitivity referenced to a FER of 8% at an
+ * MPDU length of 1024 bytes at the antenna connector. Each element
+ * of the array shall correspond to a supported rate and the order
+ * shall be the same as the supporteRates parameter. */
+ u32 rx_input_sensitivity;
+
+ /* The maximum transmit power in dBm upto one decimal. for eg: if
+ * it is 10.5dBm, the value would be 105 */
+ u32 max_pwr;
+
+ /* Number of times the receiver failed to synchronize with the
+ * incoming signal after detecting the sync in the preamble of the
+ * transmitted PLCP protocol data unit. */
+ u32 sync_fail_cnt;
+
+ /* Legacy transmit rate, in units of 500 kbit/sec, for the most
+ * recently transmitted frame */
+ u32 tx_rate;
+
+ /* mcs index for HT20 and HT40 rates */
+ u32 mcs_index;
+
+ /* to differentiate between HT20 and HT40 rates; short and long
+ * guard interval */
+ u32 tx_rate_flags;
+};
+
+struct ani_global_security_stats {
+ /* The number of unencrypted received MPDU frames that the MAC
+ * layer discarded when the IEEE 802.11 dot11ExcludeUnencrypted
+ * management information base (MIB) object is enabled */
+ u32 rx_wep_unencrypted_frm_cnt;
+
+ /* The number of received MSDU packets that that the 802.11 station
+ * discarded because of MIC failures */
+ u32 rx_mic_fail_cnt;
+
+ /* The number of encrypted MPDU frames that the 802.11 station
+ * failed to decrypt because of a TKIP ICV error */
+ u32 tkip_icv_err;
+
+ /* The number of received MPDU frames that the 802.11 discarded
+ * because of an invalid AES-CCMP format */
+ u32 aes_ccmp_format_err;
+
+ /* The number of received MPDU frames that the 802.11 station
+ * discarded because of the AES-CCMP replay protection procedure */
+ u32 aes_ccmp_replay_cnt;
+
+ /* The number of received MPDU frames that the 802.11 station
+ * discarded because of errors detected by the AES-CCMP decryption
+ * algorithm */
+ u32 aes_ccmp_decrpt_err;
+
+ /* The number of encrypted MPDU frames received for which a WEP
+ * decryption key was not available on the 802.11 station */
+ u32 wep_undecryptable_cnt;
+
+ /* The number of encrypted MPDU frames that the 802.11 station
+ * failed to decrypt because of a WEP ICV error */
+ u32 wep_icv_err;
+
+ /* The number of received encrypted packets that the 802.11 station
+ * successfully decrypted */
+ u32 rx_decrypt_succ_cnt;
+
+ /* The number of encrypted packets that the 802.11 station failed
+ * to decrypt */
+ u32 rx_decrypt_fail_cnt;
+};
+
+struct ani_global_class_b_stats_info {
+ struct ani_global_security_stats uc_stats;
+ struct ani_global_security_stats mc_bc_stats;
+};
+
+struct ani_global_class_c_stats_info {
+ /* This counter shall be incremented for a received A-MSDU frame
+ * with the stations MAC address in the address 1 field or an
+ * A-MSDU frame with a group address in the address 1 field */
+ u32 rx_amsdu_cnt;
+
+ /* This counter shall be incremented when the MAC receives an AMPDU
+ * from the PHY */
+ u32 rx_ampdu_cnt;
+
+ /* This counter shall be incremented when a Frame is transmitted
+ * only on the primary channel */
+ u32 tx_20_frm_cnt;
+
+ /* This counter shall be incremented when a Frame is received only
+ * on the primary channel */
+ u32 rx_20_frm_cnt;
+
+ /* This counter shall be incremented by the number of MPDUs
+ * received in the A-MPDU when an A-MPDU is received */
+ u32 rx_mpdu_in_ampdu_cnt;
+
+ /* This counter shall be incremented when an MPDU delimiter has a
+ * CRC error when this is the first CRC error in the received AMPDU
+ * or when the previous delimiter has been decoded correctly */
+ u32 ampdu_delimiter_crc_err;
+};
+
+struct ani_per_sta_stats_info {
+ /* The number of MPDU frames that the 802.11 station transmitted
+ * and acknowledged through a received 802.11 ACK frame */
+ u32 tx_frag_cnt[4];
+
+ /* This counter shall be incremented when an A-MPDU is transmitted */
+ u32 tx_ampdu_cnt;
+
+ /* This counter shall increment by the number of MPDUs in the AMPDU
+ * when an A-MPDU is transmitted */
+ u32 tx_mpdu_in_ampdu_cnt;
+};
+
+struct wcn36xx_hal_stats_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Success or Failure */
+ u32 status;
+
+ /* STA Idx */
+ u32 sta_index;
+
+ /* Categories of STATS being returned as per eHalStatsMask */
+ u32 stats_mask;
+
+ /* message type is same as the request type */
+ u16 msg_type;
+
+ /* length of the entire request, includes the pStatsBuf length too */
+ u16 msg_len;
+};
+
+struct wcn36xx_hal_set_link_state_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 bssid[ETH_ALEN];
+ enum wcn36xx_hal_link_state state;
+ u8 self_mac_addr[ETH_ALEN];
+
+} __packed;
+
+struct set_link_state_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+/* TSPEC Params */
+struct wcn36xx_hal_ts_info_tfc {
+#ifndef ANI_LITTLE_BIT_ENDIAN
+ u16 ackPolicy:2;
+ u16 userPrio:3;
+ u16 psb:1;
+ u16 aggregation:1;
+ u16 accessPolicy:2;
+ u16 direction:2;
+ u16 tsid:4;
+ u16 trafficType:1;
+#else
+ u16 trafficType:1;
+ u16 tsid:4;
+ u16 direction:2;
+ u16 accessPolicy:2;
+ u16 aggregation:1;
+ u16 psb:1;
+ u16 userPrio:3;
+ u16 ackPolicy:2;
+#endif
+};
+
+/* Flag to schedule the traffic type */
+struct wcn36xx_hal_ts_info_sch {
+#ifndef ANI_LITTLE_BIT_ENDIAN
+ u8 rsvd:7;
+ u8 schedule:1;
+#else
+ u8 schedule:1;
+ u8 rsvd:7;
+#endif
+};
+
+/* Traffic and scheduling info */
+struct wcn36xx_hal_ts_info {
+ struct wcn36xx_hal_ts_info_tfc traffic;
+ struct wcn36xx_hal_ts_info_sch schedule;
+};
+
+/* Information elements */
+struct wcn36xx_hal_tspec_ie {
+ u8 type;
+ u8 length;
+ struct wcn36xx_hal_ts_info ts_info;
+ u16 nom_msdu_size;
+ u16 max_msdu_size;
+ u32 min_svc_interval;
+ u32 max_svc_interval;
+ u32 inact_interval;
+ u32 suspend_interval;
+ u32 svc_start_time;
+ u32 min_data_rate;
+ u32 mean_data_rate;
+ u32 peak_data_rate;
+ u32 max_burst_sz;
+ u32 delay_bound;
+ u32 min_phy_rate;
+ u16 surplus_bw;
+ u16 medium_time;
+};
+
+struct add_ts_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Station Index */
+ u16 sta_index;
+
+ /* TSPEC handler uniquely identifying a TSPEC for a STA in a BSS */
+ u16 tspec_index;
+
+ /* To program TPE with required parameters */
+ struct wcn36xx_hal_tspec_ie tspec;
+
+ /* U-APSD Flags: 1b per AC. Encoded as follows:
+ b7 b6 b5 b4 b3 b2 b1 b0 =
+ X X X X BE BK VI VO */
+ u8 uapsd;
+
+ /* These parameters are for all the access categories */
+
+ /* Service Interval */
+ u32 service_interval[WCN36XX_HAL_MAX_AC];
+
+ /* Suspend Interval */
+ u32 suspend_interval[WCN36XX_HAL_MAX_AC];
+
+ /* Delay Interval */
+ u32 delay_interval[WCN36XX_HAL_MAX_AC];
+};
+
+struct add_rs_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct del_ts_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Station Index */
+ u16 sta_index;
+
+ /* TSPEC identifier uniquely identifying a TSPEC for a STA in a BSS */
+ u16 tspec_index;
+
+ /* To lookup station id using the mac address */
+ u8 bssid[ETH_ALEN];
+};
+
+struct del_ts_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+/* End of TSpec Parameters */
+
+/* Start of BLOCK ACK related Parameters */
+
+struct wcn36xx_hal_add_ba_session_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Station Index */
+ u16 sta_index;
+
+ /* Peer MAC Address */
+ u8 mac_addr[ETH_ALEN];
+
+ /* ADDBA Action Frame dialog token
+ HAL will not interpret this object */
+ u8 dialog_token;
+
+ /* TID for which the BA is being setup
+ This identifies the TC or TS of interest */
+ u8 tid;
+
+ /* 0 - Delayed BA (Not supported)
+ 1 - Immediate BA */
+ u8 policy;
+
+ /* Indicates the number of buffers for this TID (baTID)
+ NOTE - This is the requested buffer size. When this
+ is processed by HAL and subsequently by HDD, it is
+ possible that HDD may change this buffer size. Any
+ change in the buffer size should be noted by PE and
+ advertized appropriately in the ADDBA response */
+ u16 buffer_size;
+
+ /* BA timeout in TU's 0 means no timeout will occur */
+ u16 timeout;
+
+ /* b0..b3 - Fragment Number - Always set to 0
+ b4..b15 - Starting Sequence Number of first MSDU
+ for which this BA is setup */
+ u16 ssn;
+
+ /* ADDBA direction
+ 1 - Originator
+ 0 - Recipient */
+ u8 direction;
+} __packed;
+
+struct wcn36xx_hal_add_ba_session_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ /* Dialog token */
+ u8 dialog_token;
+
+ /* TID for which the BA session has been setup */
+ u8 ba_tid;
+
+ /* BA Buffer Size allocated for the current BA session */
+ u8 ba_buffer_size;
+
+ u8 ba_session_id;
+
+ /* Reordering Window buffer */
+ u8 win_size;
+
+ /* Station Index to id the sta */
+ u8 sta_index;
+
+ /* Starting Sequence Number */
+ u16 ssn;
+} __packed;
+
+struct wcn36xx_hal_add_ba_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Session Id */
+ u8 session_id;
+
+ /* Reorder Window Size */
+ u8 win_size;
+/* Old FW 1.2.2.4 does not support this*/
+#ifdef FEATURE_ON_CHIP_REORDERING
+ u8 reordering_done_on_chip;
+#endif
+} __packed;
+
+struct wcn36xx_hal_add_ba_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ /* Dialog token */
+ u8 dialog_token;
+} __packed;
+
+struct add_ba_info {
+ u16 ba_enable:1;
+ u16 starting_seq_num:12;
+ u16 reserved:3;
+};
+
+struct wcn36xx_hal_trigger_ba_rsp_candidate {
+ u8 sta_addr[ETH_ALEN];
+ struct add_ba_info ba_info[STACFG_MAX_TC];
+} __packed;
+
+struct wcn36xx_hal_trigget_ba_req_candidate {
+ u8 sta_index;
+ u8 tid_bitmap;
+} __packed;
+
+struct wcn36xx_hal_trigger_ba_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Session Id */
+ u8 session_id;
+
+ /* baCandidateCnt is followed by trigger BA
+ * Candidate List(tTriggerBaCandidate)
+ */
+ u16 candidate_cnt;
+
+} __packed;
+
+struct wcn36xx_hal_trigger_ba_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* TO SUPPORT BT-AMP */
+ u8 bssid[ETH_ALEN];
+
+ /* success or failure */
+ u32 status;
+
+ /* baCandidateCnt is followed by trigger BA
+ * Rsp Candidate List(tTriggerRspBaCandidate)
+ */
+ u16 candidate_cnt;
+} __packed;
+
+struct wcn36xx_hal_del_ba_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Station Index */
+ u16 sta_index;
+
+ /* TID for which the BA session is being deleted */
+ u8 tid;
+
+ /* DELBA direction
+ 1 - Originator
+ 0 - Recipient */
+ u8 direction;
+} __packed;
+
+struct wcn36xx_hal_del_ba_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+} __packed;
+
+struct tsm_stats_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Traffic Id */
+ u8 tid;
+
+ u8 bssid[ETH_ALEN];
+};
+
+struct tsm_stats_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /*success or failure */
+ u32 status;
+
+ /* Uplink Packet Queue delay */
+ u16 uplink_pkt_queue_delay;
+
+ /* Uplink Packet Queue delay histogram */
+ u16 uplink_pkt_queue_delay_hist[4];
+
+ /* Uplink Packet Transmit delay */
+ u32 uplink_pkt_tx_delay;
+
+ /* Uplink Packet loss */
+ u16 uplink_pkt_loss;
+
+ /* Uplink Packet count */
+ u16 uplink_pkt_count;
+
+ /* Roaming count */
+ u8 roaming_count;
+
+ /* Roaming Delay */
+ u16 roaming_delay;
+};
+
+struct set_key_done_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /*bssid of the keys */
+ u8 bssidx;
+ u8 enc_type;
+};
+
+struct wcn36xx_hal_nv_img_download_req_msg {
+ /* Note: The length specified in wcn36xx_hal_nv_img_download_req_msg
+ * messages should be
+ * header.len = sizeof(wcn36xx_hal_nv_img_download_req_msg) +
+ * nv_img_buffer_size */
+ struct wcn36xx_hal_msg_header header;
+
+ /* Fragment sequence number of the NV Image. Note that NV Image
+ * might not fit into one message due to size limitation of the SMD
+ * channel FIFO. UMAC can hence choose to chop the NV blob into
+ * multiple fragments starting with seqeunce number 0, 1, 2 etc.
+ * The last fragment MUST be indicated by marking the
+ * isLastFragment field to 1. Note that all the NV blobs would be
+ * concatenated together by HAL without any padding bytes in
+ * between.*/
+ u16 frag_number;
+
+ /* Is this the last fragment? When set to 1 it indicates that no
+ * more fragments will be sent by UMAC and HAL can concatenate all
+ * the NV blobs rcvd & proceed with the parsing. HAL would generate
+ * a WCN36XX_HAL_DOWNLOAD_NV_RSP to the WCN36XX_HAL_DOWNLOAD_NV_REQ
+ * after it receives each fragment */
+ u16 last_fragment;
+
+ /* NV Image size (number of bytes) */
+ u32 nv_img_buffer_size;
+
+ /* Following the 'nv_img_buffer_size', there should be
+ * nv_img_buffer_size bytes of NV Image i.e.
+ * u8[nv_img_buffer_size] */
+} __packed;
+
+struct wcn36xx_hal_nv_img_download_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Success or Failure. HAL would generate a
+ * WCN36XX_HAL_DOWNLOAD_NV_RSP after each fragment */
+ u32 status;
+} __packed;
+
+struct wcn36xx_hal_nv_store_ind {
+ /* Note: The length specified in tHalNvStoreInd messages should be
+ * header.msgLen = sizeof(tHalNvStoreInd) + nvBlobSize */
+ struct wcn36xx_hal_msg_header header;
+
+ /* NV Item */
+ u32 table_id;
+
+ /* Size of NV Blob */
+ u32 nv_blob_size;
+
+ /* Following the 'nvBlobSize', there should be nvBlobSize bytes of
+ * NV blob i.e. u8[nvBlobSize] */
+};
+
+/* End of Block Ack Related Parameters */
+
+#define WCN36XX_HAL_CIPHER_SEQ_CTR_SIZE 6
+
+/* Definition for MIC failure indication MAC reports this each time a MIC
+ * failure occures on Rx TKIP packet
+ */
+struct mic_failure_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 bssid[ETH_ALEN];
+
+ /* address used to compute MIC */
+ u8 src_addr[ETH_ALEN];
+
+ /* transmitter address */
+ u8 ta_addr[ETH_ALEN];
+
+ u8 dst_addr[ETH_ALEN];
+
+ u8 multicast;
+
+ /* first byte of IV */
+ u8 iv1;
+
+ /* second byte of IV */
+ u8 key_id;
+
+ /* sequence number */
+ u8 tsc[WCN36XX_HAL_CIPHER_SEQ_CTR_SIZE];
+
+ /* receive address */
+ u8 rx_addr[ETH_ALEN];
+};
+
+struct update_vht_op_mode_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u16 op_mode;
+ u16 sta_id;
+};
+
+struct update_vht_op_mode_params_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u32 status;
+};
+
+struct update_beacon_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 bss_index;
+
+ /* shortPreamble mode. HAL should update all the STA rates when it
+ * receives this message */
+ u8 short_preamble;
+
+ /* short Slot time. */
+ u8 short_slot_time;
+
+ /* Beacon Interval */
+ u16 beacon_interval;
+
+ /* Protection related */
+ u8 lla_coexist;
+ u8 llb_coexist;
+ u8 llg_coexist;
+ u8 ht20_coexist;
+ u8 lln_non_gf_coexist;
+ u8 lsig_tx_op_protection_full_support;
+ u8 rifs_mode;
+
+ u16 param_change_bitmap;
+};
+
+struct update_beacon_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+ u32 status;
+};
+
+struct wcn36xx_hal_send_beacon_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* length of the template. */
+ u32 beacon_length;
+
+ /* Beacon data. */
+ u8 beacon[BEACON_TEMPLATE_SIZE];
+
+ u8 bssid[ETH_ALEN];
+
+ /* TIM IE offset from the beginning of the template. */
+ u32 tim_ie_offset;
+
+ /* P2P IE offset from the begining of the template */
+ u16 p2p_ie_offset;
+} __packed;
+
+struct send_beacon_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+ u32 status;
+} __packed;
+
+struct enable_radar_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 bssid[ETH_ALEN];
+ u8 channel;
+};
+
+struct enable_radar_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Link Parameters */
+ u8 bssid[ETH_ALEN];
+
+ /* success or failure */
+ u32 status;
+};
+
+struct radar_detect_intr_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 radar_det_channel;
+};
+
+struct radar_detect_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* channel number in which the RADAR detected */
+ u8 channel_number;
+
+ /* RADAR pulse width in usecond */
+ u16 radar_pulse_width;
+
+ /* Number of RADAR pulses */
+ u16 num_radar_pulse;
+};
+
+struct wcn36xx_hal_get_tpc_report_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 sta[ETH_ALEN];
+ u8 dialog_token;
+ u8 txpower;
+};
+
+struct wcn36xx_hal_get_tpc_report_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_send_probe_resp_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 probe_resp_template[BEACON_TEMPLATE_SIZE];
+ u32 probe_resp_template_len;
+ u32 proxy_probe_req_valid_ie_bmap[8];
+ u8 bssid[ETH_ALEN];
+};
+
+struct send_probe_resp_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct send_unknown_frame_rx_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_delete_sta_context_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u16 aid;
+ u16 sta_id;
+
+ /* TO SUPPORT BT-AMP */
+ u8 bssid[ETH_ALEN];
+
+ /* HAL copies bssid from the sta table. */
+ u8 addr2[ETH_ALEN];
+
+ /* To unify the keepalive / unknown A2 / tim-based disa */
+ u16 reason_code;
+} __packed;
+
+struct indicate_del_sta {
+ struct wcn36xx_hal_msg_header header;
+ u8 aid;
+ u8 sta_index;
+ u8 bss_index;
+ u8 reason_code;
+ u32 status;
+};
+
+struct bt_amp_event_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ enum bt_amp_event_type btAmpEventType;
+};
+
+struct bt_amp_event_rsp {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct tl_hal_flush_ac_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Station Index. originates from HAL */
+ u8 sta_id;
+
+ /* TID for which the transmit queue is being flushed */
+ u8 tid;
+};
+
+struct tl_hal_flush_ac_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Station Index. originates from HAL */
+ u8 sta_id;
+
+ /* TID for which the transmit queue is being flushed */
+ u8 tid;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_enter_imps_req_msg {
+ struct wcn36xx_hal_msg_header header;
+};
+
+struct wcn36xx_hal_exit_imps_req {
+ struct wcn36xx_hal_msg_header header;
+};
+
+struct wcn36xx_hal_enter_bmps_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 bss_index;
+
+ /* TBTT value derived from the last beacon */
+#ifndef BUILD_QWPTTSTATIC
+ u64 tbtt;
+#endif
+ u8 dtim_count;
+
+ /* DTIM period given to HAL during association may not be valid, if
+ * association is based on ProbeRsp instead of beacon. */
+ u8 dtim_period;
+
+ /* For CCX and 11R Roaming */
+ u32 rssi_filter_period;
+
+ u32 num_beacon_per_rssi_average;
+ u8 rssi_filter_enable;
+} __packed;
+
+struct wcn36xx_hal_exit_bmps_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 send_data_null;
+ u8 bss_index;
+} __packed;
+
+struct wcn36xx_hal_missed_beacon_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 bss_index;
+} __packed;
+
+/* Beacon Filtering data structures */
+
+/* The above structure would be followed by multiple of below mentioned
+ * structure
+ */
+struct beacon_filter_ie {
+ u8 element_id;
+ u8 check_ie_presence;
+ u8 offset;
+ u8 value;
+ u8 bitmask;
+ u8 ref;
+};
+
+struct wcn36xx_hal_add_bcn_filter_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u16 capability_info;
+ u16 capability_mask;
+ u16 beacon_interval;
+ u16 ie_num;
+ u8 bss_index;
+ u8 reserved;
+};
+
+struct wcn36xx_hal_rem_bcn_filter_req {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 ie_Count;
+ u8 rem_ie_id[1];
+};
+
+#define WCN36XX_HAL_IPV4_ARP_REPLY_OFFLOAD 0
+#define WCN36XX_HAL_IPV6_NEIGHBOR_DISCOVERY_OFFLOAD 1
+#define WCN36XX_HAL_IPV6_NS_OFFLOAD 2
+#define WCN36XX_HAL_IPV6_ADDR_LEN 16
+#define WCN36XX_HAL_OFFLOAD_DISABLE 0
+#define WCN36XX_HAL_OFFLOAD_ENABLE 1
+#define WCN36XX_HAL_OFFLOAD_BCAST_FILTER_ENABLE 0x2
+#define WCN36XX_HAL_OFFLOAD_ARP_AND_BCAST_FILTER_ENABLE \
+ (HAL_OFFLOAD_ENABLE|HAL_OFFLOAD_BCAST_FILTER_ENABLE)
+
+struct wcn36xx_hal_ns_offload_params {
+ u8 src_ipv6_addr[WCN36XX_HAL_IPV6_ADDR_LEN];
+ u8 self_ipv6_addr[WCN36XX_HAL_IPV6_ADDR_LEN];
+
+ /* Only support 2 possible Network Advertisement IPv6 address */
+ u8 target_ipv6_addr1[WCN36XX_HAL_IPV6_ADDR_LEN];
+ u8 target_ipv6_addr2[WCN36XX_HAL_IPV6_ADDR_LEN];
+
+ u8 self_addr[ETH_ALEN];
+ u8 src_ipv6_addr_valid:1;
+ u8 target_ipv6_addr1_valid:1;
+ u8 target_ipv6_addr2_valid:1;
+ u8 reserved1:5;
+
+ /* make it DWORD aligned */
+ u8 reserved2;
+
+ /* slot index for this offload */
+ u32 slot_index;
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_host_offload_req {
+ u8 offload_Type;
+
+ /* enable or disable */
+ u8 enable;
+
+ union {
+ u8 host_ipv4_addr[4];
+ u8 host_ipv6_addr[WCN36XX_HAL_IPV6_ADDR_LEN];
+ } u;
+};
+
+struct wcn36xx_hal_host_offload_req_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_host_offload_req host_offload_params;
+ struct wcn36xx_hal_ns_offload_params ns_offload_params;
+};
+
+/* Packet Types. */
+#define WCN36XX_HAL_KEEP_ALIVE_NULL_PKT 1
+#define WCN36XX_HAL_KEEP_ALIVE_UNSOLICIT_ARP_RSP 2
+
+/* Enable or disable keep alive */
+#define WCN36XX_HAL_KEEP_ALIVE_DISABLE 0
+#define WCN36XX_HAL_KEEP_ALIVE_ENABLE 1
+#define WCN36XX_KEEP_ALIVE_TIME_PERIOD 30 /* unit: s */
+
+/* Keep Alive request. */
+struct wcn36xx_hal_keep_alive_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 packet_type;
+ u32 time_period;
+ u8 host_ipv4_addr[WCN36XX_HAL_IPV4_ADDR_LEN];
+ u8 dest_ipv4_addr[WCN36XX_HAL_IPV4_ADDR_LEN];
+ u8 dest_addr[ETH_ALEN];
+ u8 bss_index;
+} __packed;
+
+struct wcn36xx_hal_rssi_threshold_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ s8 threshold1:8;
+ s8 threshold2:8;
+ s8 threshold3:8;
+ u8 thres1_pos_notify:1;
+ u8 thres1_neg_notify:1;
+ u8 thres2_pos_notify:1;
+ u8 thres2_neg_notify:1;
+ u8 thres3_pos_notify:1;
+ u8 thres3_neg_notify:1;
+ u8 reserved10:2;
+};
+
+struct wcn36xx_hal_enter_uapsd_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 bk_delivery:1;
+ u8 be_delivery:1;
+ u8 vi_delivery:1;
+ u8 vo_delivery:1;
+ u8 bk_trigger:1;
+ u8 be_trigger:1;
+ u8 vi_trigger:1;
+ u8 vo_trigger:1;
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_exit_uapsd_req_msg {
+ struct wcn36xx_hal_msg_header header;
+ u8 bss_index;
+};
+
+#define WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE 128
+#define WCN36XX_HAL_WOWL_BCAST_MAX_NUM_PATTERNS 16
+
+struct wcn36xx_hal_wowl_add_bcast_ptrn_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Pattern ID */
+ u8 id;
+
+ /* Pattern byte offset from beginning of the 802.11 packet to start
+ * of the wake-up pattern */
+ u8 byte_Offset;
+
+ /* Non-Zero Pattern size */
+ u8 size;
+
+ /* Pattern */
+ u8 pattern[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
+
+ /* Non-zero pattern mask size */
+ u8 mask_size;
+
+ /* Pattern mask */
+ u8 mask[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
+
+ /* Extra pattern */
+ u8 extra[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
+
+ /* Extra pattern mask */
+ u8 mask_extra[WCN36XX_HAL_WOWL_BCAST_PATTERN_MAX_SIZE];
+
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_wow_del_bcast_ptrn_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Pattern ID of the wakeup pattern to be deleted */
+ u8 id;
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_wowl_enter_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Enables/disables magic packet filtering */
+ u8 magic_packet_enable;
+
+ /* Magic pattern */
+ u8 magic_pattern[ETH_ALEN];
+
+ /* Enables/disables packet pattern filtering in firmware. Enabling
+ * this flag enables broadcast pattern matching in Firmware. If
+ * unicast pattern matching is also desired,
+ * ucUcastPatternFilteringEnable flag must be set tot true as well
+ */
+ u8 pattern_filtering_enable;
+
+ /* Enables/disables unicast packet pattern filtering. This flag
+ * specifies whether we want to do pattern match on unicast packets
+ * as well and not just broadcast packets. This flag has no effect
+ * if the ucPatternFilteringEnable (main controlling flag) is set
+ * to false
+ */
+ u8 ucast_pattern_filtering_enable;
+
+ /* This configuration is valid only when magicPktEnable=1. It
+ * requests hardware to wake up when it receives the Channel Switch
+ * Action Frame.
+ */
+ u8 wow_channel_switch_receive;
+
+ /* This configuration is valid only when magicPktEnable=1. It
+ * requests hardware to wake up when it receives the
+ * Deauthentication Frame.
+ */
+ u8 wow_deauth_receive;
+
+ /* This configuration is valid only when magicPktEnable=1. It
+ * requests hardware to wake up when it receives the Disassociation
+ * Frame.
+ */
+ u8 wow_disassoc_receive;
+
+ /* This configuration is valid only when magicPktEnable=1. It
+ * requests hardware to wake up when it has missed consecutive
+ * beacons. This is a hardware register configuration (NOT a
+ * firmware configuration).
+ */
+ u8 wow_max_missed_beacons;
+
+ /* This configuration is valid only when magicPktEnable=1. This is
+ * a timeout value in units of microsec. It requests hardware to
+ * unconditionally wake up after it has stayed in WoWLAN mode for
+ * some time. Set 0 to disable this feature.
+ */
+ u8 wow_max_sleep;
+
+ /* This configuration directs the WoW packet filtering to look for
+ * EAP-ID requests embedded in EAPOL frames and use this as a wake
+ * source.
+ */
+ u8 wow_eap_id_request_enable;
+
+ /* This configuration directs the WoW packet filtering to look for
+ * EAPOL-4WAY requests and use this as a wake source.
+ */
+ u8 wow_eapol_4way_enable;
+
+ /* This configuration allows a host wakeup on an network scan
+ * offload match.
+ */
+ u8 wow_net_scan_offload_match;
+
+ /* This configuration allows a host wakeup on any GTK rekeying
+ * error.
+ */
+ u8 wow_gtk_rekey_error;
+
+ /* This configuration allows a host wakeup on BSS connection loss.
+ */
+ u8 wow_bss_connection_loss;
+
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_wowl_exit_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_get_rssi_req_msg {
+ struct wcn36xx_hal_msg_header header;
+};
+
+struct wcn36xx_hal_get_roam_rssi_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Valid STA Idx for per STA stats request */
+ u32 sta_id;
+};
+
+struct wcn36xx_hal_set_uapsd_ac_params_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* STA index */
+ u8 sta_idx;
+
+ /* Access Category */
+ u8 ac;
+
+ /* User Priority */
+ u8 up;
+
+ /* Service Interval */
+ u32 service_interval;
+
+ /* Suspend Interval */
+ u32 suspend_interval;
+
+ /* Delay Interval */
+ u32 delay_interval;
+};
+
+struct wcn36xx_hal_configure_rxp_filter_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 set_mcst_bcst_filter_setting;
+ u8 set_mcst_bcst_filter;
+};
+
+struct wcn36xx_hal_enter_imps_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_exit_imps_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_enter_bmps_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ u8 bss_index;
+} __packed;
+
+struct wcn36xx_hal_exit_bmps_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ u8 bss_index;
+} __packed;
+
+struct wcn36xx_hal_enter_uapsd_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_exit_uapsd_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_rssi_notification_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u32 rssi_thres1_pos_cross:1;
+ u32 rssi_thres1_neg_cross:1;
+ u32 rssi_thres2_pos_cross:1;
+ u32 rssi_thres2_neg_cross:1;
+ u32 rssi_thres3_pos_cross:1;
+ u32 rssi_thres3_neg_cross:1;
+ u32 avg_rssi:8;
+ u32 reserved:18;
+
+};
+
+struct wcn36xx_hal_get_rssio_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+ s8 rssi;
+
+};
+
+struct wcn36xx_hal_get_roam_rssi_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ u8 sta_id;
+ s8 rssi;
+};
+
+struct wcn36xx_hal_wowl_enter_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_wowl_exit_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_add_bcn_filter_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_rem_bcn_filter_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_add_wowl_bcast_ptrn_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_del_wowl_bcast_ptrn_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_host_offload_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_keep_alive_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_set_rssi_thresh_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_set_uapsd_ac_params_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_configure_rxp_filter_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct set_max_tx_pwr_req {
+ struct wcn36xx_hal_msg_header header;
+
+ /* BSSID is needed to identify which session issued this request.
+ * As the request has power constraints, this should be applied
+ * only to that session */
+ u8 bssid[ETH_ALEN];
+
+ u8 self_addr[ETH_ALEN];
+
+ /* In request, power == MaxTx power to be used. */
+ u8 power;
+};
+
+struct set_max_tx_pwr_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* power == tx power used for management frames */
+ u8 power;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct set_tx_pwr_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* TX Power in milli watts */
+ u32 tx_power;
+
+ u8 bss_index;
+};
+
+struct set_tx_pwr_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct get_tx_pwr_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 sta_id;
+};
+
+struct get_tx_pwr_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ /* TX Power in milli watts */
+ u32 tx_power;
+};
+
+struct set_p2p_gonoa_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 opp_ps;
+ u32 ct_window;
+ u8 count;
+ u32 duration;
+ u32 interval;
+ u32 single_noa_duration;
+ u8 ps_selection;
+};
+
+struct set_p2p_gonoa_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_add_sta_self_req {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 self_addr[ETH_ALEN];
+ u32 status;
+} __packed;
+
+struct wcn36xx_hal_add_sta_self_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ /* Self STA Index */
+ u8 self_sta_index;
+
+ /* DPU Index (IGTK, PTK, GTK all same) */
+ u8 dpu_index;
+
+ /* DPU Signature */
+ u8 dpu_signature;
+} __packed;
+
+struct wcn36xx_hal_del_sta_self_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 self_addr[ETH_ALEN];
+} __packed;
+
+struct wcn36xx_hal_del_sta_self_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /*success or failure */
+ u32 status;
+
+ u8 self_addr[ETH_ALEN];
+} __packed;
+
+struct aggr_add_ts_req {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Station Index */
+ u16 sta_idx;
+
+ /* TSPEC handler uniquely identifying a TSPEC for a STA in a BSS.
+ * This will carry the bitmap with the bit positions representing
+ * different AC.s */
+ u16 tspec_index;
+
+ /* Tspec info per AC To program TPE with required parameters */
+ struct wcn36xx_hal_tspec_ie tspec[WCN36XX_HAL_MAX_AC];
+
+ /* U-APSD Flags: 1b per AC. Encoded as follows:
+ b7 b6 b5 b4 b3 b2 b1 b0 =
+ X X X X BE BK VI VO */
+ u8 uapsd;
+
+ /* These parameters are for all the access categories */
+
+ /* Service Interval */
+ u32 service_interval[WCN36XX_HAL_MAX_AC];
+
+ /* Suspend Interval */
+ u32 suspend_interval[WCN36XX_HAL_MAX_AC];
+
+ /* Delay Interval */
+ u32 delay_interval[WCN36XX_HAL_MAX_AC];
+};
+
+struct aggr_add_ts_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status0;
+
+ /* FIXME PRIMA for future use for 11R */
+ u32 status1;
+};
+
+struct wcn36xx_hal_configure_apps_cpu_wakeup_state_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 is_apps_cpu_awake;
+};
+
+struct wcn36xx_hal_configure_apps_cpu_wakeup_state_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_dump_cmd_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u32 arg1;
+ u32 arg2;
+ u32 arg3;
+ u32 arg4;
+ u32 arg5;
+} __packed;
+
+struct wcn36xx_hal_dump_cmd_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ /* Length of the responce message */
+ u32 rsp_length;
+
+ /* FIXME: Currently considering the the responce will be less than
+ * 100bytes */
+ u8 rsp_buffer[DUMPCMD_RSP_BUFFER];
+} __packed;
+
+#define WLAN_COEX_IND_DATA_SIZE (4)
+#define WLAN_COEX_IND_TYPE_DISABLE_HB_MONITOR (0)
+#define WLAN_COEX_IND_TYPE_ENABLE_HB_MONITOR (1)
+
+struct coex_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Coex Indication Type */
+ u32 type;
+
+ /* Coex Indication Data */
+ u32 data[WLAN_COEX_IND_DATA_SIZE];
+};
+
+struct wcn36xx_hal_tx_compl_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Tx Complete Indication Success or Failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_wlan_host_suspend_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u32 configured_mcst_bcst_filter_setting;
+ u32 active_session_count;
+};
+
+struct wcn36xx_hal_wlan_exclude_unencrpted_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 dot11_exclude_unencrypted;
+ u8 bssid[ETH_ALEN];
+};
+
+struct noa_attr_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 index;
+ u8 opp_ps_flag;
+ u16 ctwin;
+
+ u16 noa1_interval_count;
+ u16 bss_index;
+ u32 noa1_duration;
+ u32 noa1_interval;
+ u32 noa1_starttime;
+
+ u16 noa2_interval_count;
+ u16 reserved2;
+ u32 noa2_duration;
+ u32 noa2_interval;
+ u32 noa2_start_time;
+
+ u32 status;
+};
+
+struct noa_start_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u32 status;
+ u32 bss_index;
+};
+
+struct wcn36xx_hal_wlan_host_resume_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 configured_mcst_bcst_filter_setting;
+};
+
+struct wcn36xx_hal_host_resume_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+struct wcn36xx_hal_del_ba_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u16 sta_idx;
+
+ /* Peer MAC Address, whose BA session has timed out */
+ u8 peer_addr[ETH_ALEN];
+
+ /* TID for which a BA session timeout is being triggered */
+ u8 ba_tid;
+
+ /* DELBA direction
+ * 1 - Originator
+ * 0 - Recipient
+ */
+ u8 direction;
+
+ u32 reason_code;
+
+ /* TO SUPPORT BT-AMP */
+ u8 bssid[ETH_ALEN];
+};
+
+/* PNO Messages */
+
+/* Max number of channels that a network can be found on */
+#define WCN36XX_HAL_PNO_MAX_NETW_CHANNELS 26
+
+/* Max number of channels that a network can be found on */
+#define WCN36XX_HAL_PNO_MAX_NETW_CHANNELS_EX 60
+
+/* Maximum numbers of networks supported by PNO */
+#define WCN36XX_HAL_PNO_MAX_SUPP_NETWORKS 16
+
+/* The number of scan time intervals that can be programmed into PNO */
+#define WCN36XX_HAL_PNO_MAX_SCAN_TIMERS 10
+
+/* Maximum size of the probe template */
+#define WCN36XX_HAL_PNO_MAX_PROBE_SIZE 450
+
+/* Type of PNO enabling:
+ *
+ * Immediate - scanning will start immediately and PNO procedure will be
+ * repeated based on timer
+ *
+ * Suspend - scanning will start at suspend
+ *
+ * Resume - scanning will start on system resume
+ */
+enum pno_mode {
+ PNO_MODE_IMMEDIATE,
+ PNO_MODE_ON_SUSPEND,
+ PNO_MODE_ON_RESUME,
+ PNO_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+/* Authentication type */
+enum auth_type {
+ AUTH_TYPE_ANY = 0,
+ AUTH_TYPE_OPEN_SYSTEM = 1,
+
+ /* Upper layer authentication types */
+ AUTH_TYPE_WPA = 2,
+ AUTH_TYPE_WPA_PSK = 3,
+
+ AUTH_TYPE_RSN = 4,
+ AUTH_TYPE_RSN_PSK = 5,
+ AUTH_TYPE_FT_RSN = 6,
+ AUTH_TYPE_FT_RSN_PSK = 7,
+ AUTH_TYPE_WAPI_WAI_CERTIFICATE = 8,
+ AUTH_TYPE_WAPI_WAI_PSK = 9,
+
+ AUTH_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+/* Encryption type */
+enum ed_type {
+ ED_ANY = 0,
+ ED_NONE = 1,
+ ED_WEP = 2,
+ ED_TKIP = 3,
+ ED_CCMP = 4,
+ ED_WPI = 5,
+
+ ED_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+/* SSID broadcast type */
+enum ssid_bcast_type {
+ BCAST_UNKNOWN = 0,
+ BCAST_NORMAL = 1,
+ BCAST_HIDDEN = 2,
+
+ BCAST_TYPE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE
+};
+
+/* The network description for which PNO will have to look for */
+struct network_type {
+ /* SSID of the BSS */
+ struct wcn36xx_hal_mac_ssid ssid;
+
+ /* Authentication type for the network */
+ enum auth_type authentication;
+
+ /* Encryption type for the network */
+ enum ed_type encryption;
+
+ /* Indicate the channel on which the Network can be found 0 - if
+ * all channels */
+ u8 channel_count;
+ u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS];
+
+ /* Indicates the RSSI threshold for the network to be considered */
+ u8 rssi_threshold;
+};
+
+struct scan_timer {
+ /* How much it should wait */
+ u32 value;
+
+ /* How many times it should repeat that wait value 0 - keep using
+ * this timer until PNO is disabled */
+ u32 repeat;
+
+ /* e.g: 2 3 4 0 - it will wait 2s between consecutive scans for 3
+ * times - after that it will wait 4s between consecutive scans
+ * until disabled */
+};
+
+/* The network parameters to be sent to the PNO algorithm */
+struct scan_timers_type {
+ /* set to 0 if you wish for PNO to use its default telescopic timer */
+ u8 count;
+
+ /* A set value represents the amount of time that PNO will wait
+ * between two consecutive scan procedures If the desired is for a
+ * uniform timer that fires always at the exact same interval - one
+ * single value is to be set If there is a desire for a more
+ * complex - telescopic like timer multiple values can be set -
+ * once PNO reaches the end of the array it will continue scanning
+ * at intervals presented by the last value */
+ struct scan_timer values[WCN36XX_HAL_PNO_MAX_SCAN_TIMERS];
+};
+
+/* Preferred network list request */
+struct set_pref_netw_list_req {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Enable PNO */
+ u32 enable;
+
+ /* Immediate, On Suspend, On Resume */
+ enum pno_mode mode;
+
+ /* Number of networks sent for PNO */
+ u32 networks_count;
+
+ /* The networks that PNO needs to look for */
+ struct network_type networks[WCN36XX_HAL_PNO_MAX_SUPP_NETWORKS];
+
+ /* The scan timers required for PNO */
+ struct scan_timers_type scan_timers;
+
+ /* Probe template for 2.4GHz band */
+ u16 band_24g_probe_size;
+ u8 band_24g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
+
+ /* Probe template for 5GHz band */
+ u16 band_5g_probe_size;
+ u8 band_5g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
+};
+
+/* The network description for which PNO will have to look for */
+struct network_type_new {
+ /* SSID of the BSS */
+ struct wcn36xx_hal_mac_ssid ssid;
+
+ /* Authentication type for the network */
+ enum auth_type authentication;
+
+ /* Encryption type for the network */
+ enum ed_type encryption;
+
+ /* SSID broadcast type, normal, hidden or unknown */
+ enum ssid_bcast_type bcast_network_type;
+
+ /* Indicate the channel on which the Network can be found 0 - if
+ * all channels */
+ u8 channel_count;
+ u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS];
+
+ /* Indicates the RSSI threshold for the network to be considered */
+ u8 rssi_threshold;
+};
+
+/* Preferred network list request new */
+struct set_pref_netw_list_req_new {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Enable PNO */
+ u32 enable;
+
+ /* Immediate, On Suspend, On Resume */
+ enum pno_mode mode;
+
+ /* Number of networks sent for PNO */
+ u32 networks_count;
+
+ /* The networks that PNO needs to look for */
+ struct network_type_new networks[WCN36XX_HAL_PNO_MAX_SUPP_NETWORKS];
+
+ /* The scan timers required for PNO */
+ struct scan_timers_type scan_timers;
+
+ /* Probe template for 2.4GHz band */
+ u16 band_24g_probe_size;
+ u8 band_24g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
+
+ /* Probe template for 5GHz band */
+ u16 band_5g_probe_size;
+ u8 band_5g_probe_template[WCN36XX_HAL_PNO_MAX_PROBE_SIZE];
+};
+
+/* Preferred network list response */
+struct set_pref_netw_list_resp {
+ struct wcn36xx_hal_msg_header header;
+
+ /* status of the request - just to indicate that PNO has
+ * acknowledged the request and will start scanning */
+ u32 status;
+};
+
+/* Preferred network found indication */
+struct pref_netw_found_ind {
+
+ struct wcn36xx_hal_msg_header header;
+
+ /* Network that was found with the highest RSSI */
+ struct wcn36xx_hal_mac_ssid ssid;
+
+ /* Indicates the RSSI */
+ u8 rssi;
+};
+
+/* RSSI Filter request */
+struct set_rssi_filter_req {
+ struct wcn36xx_hal_msg_header header;
+
+ /* RSSI Threshold */
+ u8 rssi_threshold;
+};
+
+/* Set RSSI filter resp */
+struct set_rssi_filter_resp {
+ struct wcn36xx_hal_msg_header header;
+
+ /* status of the request */
+ u32 status;
+};
+
+/* Update scan params - sent from host to PNO to be used during PNO
+ * scanningx */
+struct wcn36xx_hal_update_scan_params_req {
+
+ struct wcn36xx_hal_msg_header header;
+
+ /* Host setting for 11d */
+ u8 dot11d_enabled;
+
+ /* Lets PNO know that host has determined the regulatory domain */
+ u8 dot11d_resolved;
+
+ /* Channels on which PNO is allowed to scan */
+ u8 channel_count;
+ u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS];
+
+ /* Minimum channel time */
+ u16 active_min_ch_time;
+
+ /* Maximum channel time */
+ u16 active_max_ch_time;
+
+ /* Minimum channel time */
+ u16 passive_min_ch_time;
+
+ /* Maximum channel time */
+ u16 passive_max_ch_time;
+
+ /* Cb State */
+ enum phy_chan_bond_state state;
+} __packed;
+
+/* Update scan params - sent from host to PNO to be used during PNO
+ * scanningx */
+struct update_scan_params_req_ex {
+
+ struct wcn36xx_hal_msg_header header;
+
+ /* Host setting for 11d */
+ u8 dot11d_enabled;
+
+ /* Lets PNO know that host has determined the regulatory domain */
+ u8 dot11d_resolved;
+
+ /* Channels on which PNO is allowed to scan */
+ u8 channel_count;
+ u8 channels[WCN36XX_HAL_PNO_MAX_NETW_CHANNELS_EX];
+
+ /* Minimum channel time */
+ u16 active_min_ch_time;
+
+ /* Maximum channel time */
+ u16 active_max_ch_time;
+
+ /* Minimum channel time */
+ u16 passive_min_ch_time;
+
+ /* Maximum channel time */
+ u16 passive_max_ch_time;
+
+ /* Cb State */
+ enum phy_chan_bond_state state;
+};
+
+/* Update scan params - sent from host to PNO to be used during PNO
+ * scanningx */
+struct wcn36xx_hal_update_scan_params_resp {
+
+ struct wcn36xx_hal_msg_header header;
+
+ /* status of the request */
+ u32 status;
+} __packed;
+
+struct wcn36xx_hal_set_tx_per_tracking_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* 0: disable, 1:enable */
+ u8 tx_per_tracking_enable;
+
+ /* Check period, unit is sec. */
+ u8 tx_per_tracking_period;
+
+ /* (Fail TX packet)/(Total TX packet) ratio, the unit is 10%. */
+ u8 tx_per_tracking_ratio;
+
+ /* A watermark of check number, once the tx packet exceed this
+ * number, we do the check, default is 5 */
+ u32 tx_per_tracking_watermark;
+};
+
+struct wcn36xx_hal_set_tx_per_tracking_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+};
+
+struct tx_per_hit_ind_msg {
+ struct wcn36xx_hal_msg_header header;
+};
+
+/* Packet Filtering Definitions Begin */
+#define WCN36XX_HAL_PROTOCOL_DATA_LEN 8
+#define WCN36XX_HAL_MAX_NUM_MULTICAST_ADDRESS 240
+#define WCN36XX_HAL_MAX_NUM_FILTERS 20
+#define WCN36XX_HAL_MAX_CMP_PER_FILTER 10
+
+enum wcn36xx_hal_receive_packet_filter_type {
+ HAL_RCV_FILTER_TYPE_INVALID,
+ HAL_RCV_FILTER_TYPE_FILTER_PKT,
+ HAL_RCV_FILTER_TYPE_BUFFER_PKT,
+ HAL_RCV_FILTER_TYPE_MAX_ENUM_SIZE
+};
+
+enum wcn36xx_hal_rcv_pkt_flt_protocol_type {
+ HAL_FILTER_PROTO_TYPE_INVALID,
+ HAL_FILTER_PROTO_TYPE_MAC,
+ HAL_FILTER_PROTO_TYPE_ARP,
+ HAL_FILTER_PROTO_TYPE_IPV4,
+ HAL_FILTER_PROTO_TYPE_IPV6,
+ HAL_FILTER_PROTO_TYPE_UDP,
+ HAL_FILTER_PROTO_TYPE_MAX
+};
+
+enum wcn36xx_hal_rcv_pkt_flt_cmp_flag_type {
+ HAL_FILTER_CMP_TYPE_INVALID,
+ HAL_FILTER_CMP_TYPE_EQUAL,
+ HAL_FILTER_CMP_TYPE_MASK_EQUAL,
+ HAL_FILTER_CMP_TYPE_NOT_EQUAL,
+ HAL_FILTER_CMP_TYPE_MAX
+};
+
+struct wcn36xx_hal_rcv_pkt_filter_params {
+ u8 protocol_layer;
+ u8 cmp_flag;
+
+ /* Length of the data to compare */
+ u16 data_length;
+
+ /* from start of the respective frame header */
+ u8 data_offset;
+
+ /* Reserved field */
+ u8 reserved;
+
+ /* Data to compare */
+ u8 compare_data[WCN36XX_HAL_PROTOCOL_DATA_LEN];
+
+ /* Mask to be applied on the received packet data before compare */
+ u8 data_mask[WCN36XX_HAL_PROTOCOL_DATA_LEN];
+};
+
+struct wcn36xx_hal_sessionized_rcv_pkt_filter_cfg_type {
+ u8 id;
+ u8 type;
+ u8 params_count;
+ u32 coleasce_time;
+ u8 bss_index;
+ struct wcn36xx_hal_rcv_pkt_filter_params params[1];
+};
+
+struct wcn36xx_hal_set_rcv_pkt_filter_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 id;
+ u8 type;
+ u8 params_count;
+ u32 coalesce_time;
+ struct wcn36xx_hal_rcv_pkt_filter_params params[1];
+};
+
+struct wcn36xx_hal_rcv_flt_mc_addr_list_type {
+ /* from start of the respective frame header */
+ u8 data_offset;
+
+ u32 mc_addr_count;
+ u8 mc_addr[ETH_ALEN][WCN36XX_HAL_MAX_NUM_MULTICAST_ADDRESS];
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_set_pkt_filter_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_rcv_flt_pkt_match_cnt_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_rcv_flt_pkt_match_cnt {
+ u8 id;
+ u32 match_cnt;
+};
+
+struct wcn36xx_hal_rcv_flt_pkt_match_cnt_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Success or Failure */
+ u32 status;
+
+ u32 match_count;
+ struct wcn36xx_hal_rcv_flt_pkt_match_cnt
+ matches[WCN36XX_HAL_MAX_NUM_FILTERS];
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_rcv_flt_pkt_clear_param {
+ /* only valid for response message */
+ u32 status;
+ u8 id;
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_rcv_flt_pkt_clear_req_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_rcv_flt_pkt_clear_param param;
+};
+
+struct wcn36xx_hal_rcv_flt_pkt_clear_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_rcv_flt_pkt_clear_param param;
+};
+
+struct wcn36xx_hal_rcv_flt_pkt_set_mc_list_req_msg {
+ struct wcn36xx_hal_msg_header header;
+ struct wcn36xx_hal_rcv_flt_mc_addr_list_type mc_addr_list;
+};
+
+struct wcn36xx_hal_rcv_flt_pkt_set_mc_list_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+ u32 status;
+ u8 bss_index;
+};
+
+/* Packet Filtering Definitions End */
+
+struct set_power_params_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Ignore DTIM */
+ u32 ignore_dtim;
+
+ /* DTIM Period */
+ u32 dtim_period;
+
+ /* Listen Interval */
+ u32 listen_interval;
+
+ /* Broadcast Multicast Filter */
+ u32 bcast_mcast_filter;
+
+ /* Beacon Early Termination */
+ u32 enable_bet;
+
+ /* Beacon Early Termination Interval */
+ u32 bet_interval;
+};
+
+struct set_power_params_resp {
+
+ struct wcn36xx_hal_msg_header header;
+
+ /* status of the request */
+ u32 status;
+};
+
+/* Capability bitmap exchange definitions and macros starts */
+
+enum place_holder_in_cap_bitmap {
+ MCC = 0,
+ P2P = 1,
+ DOT11AC = 2,
+ SLM_SESSIONIZATION = 3,
+ DOT11AC_OPMODE = 4,
+ SAP32STA = 5,
+ TDLS = 6,
+ P2P_GO_NOA_DECOUPLE_INIT_SCAN = 7,
+ WLANACTIVE_OFFLOAD = 8,
+ BEACON_OFFLOAD = 9,
+ SCAN_OFFLOAD = 10,
+ ROAM_OFFLOAD = 11,
+ BCN_MISS_OFFLOAD = 12,
+ STA_POWERSAVE = 13,
+ STA_ADVANCED_PWRSAVE = 14,
+ AP_UAPSD = 15,
+ AP_DFS = 16,
+ BLOCKACK = 17,
+ PHY_ERR = 18,
+ BCN_FILTER = 19,
+ RTT = 20,
+ RATECTRL = 21,
+ WOW = 22,
+ MAX_FEATURE_SUPPORTED = 128,
+};
+
+struct wcn36xx_hal_feat_caps_msg {
+
+ struct wcn36xx_hal_msg_header header;
+
+ u32 feat_caps[4];
+} __packed;
+
+/* status codes to help debug rekey failures */
+enum gtk_rekey_status {
+ WCN36XX_HAL_GTK_REKEY_STATUS_SUCCESS = 0,
+
+ /* rekey detected, but not handled */
+ WCN36XX_HAL_GTK_REKEY_STATUS_NOT_HANDLED = 1,
+
+ /* MIC check error on M1 */
+ WCN36XX_HAL_GTK_REKEY_STATUS_MIC_ERROR = 2,
+
+ /* decryption error on M1 */
+ WCN36XX_HAL_GTK_REKEY_STATUS_DECRYPT_ERROR = 3,
+
+ /* M1 replay detected */
+ WCN36XX_HAL_GTK_REKEY_STATUS_REPLAY_ERROR = 4,
+
+ /* missing GTK key descriptor in M1 */
+ WCN36XX_HAL_GTK_REKEY_STATUS_MISSING_KDE = 5,
+
+ /* missing iGTK key descriptor in M1 */
+ WCN36XX_HAL_GTK_REKEY_STATUS_MISSING_IGTK_KDE = 6,
+
+ /* key installation error */
+ WCN36XX_HAL_GTK_REKEY_STATUS_INSTALL_ERROR = 7,
+
+ /* iGTK key installation error */
+ WCN36XX_HAL_GTK_REKEY_STATUS_IGTK_INSTALL_ERROR = 8,
+
+ /* GTK rekey M2 response TX error */
+ WCN36XX_HAL_GTK_REKEY_STATUS_RESP_TX_ERROR = 9,
+
+ /* non-specific general error */
+ WCN36XX_HAL_GTK_REKEY_STATUS_GEN_ERROR = 255
+};
+
+/* wake reason types */
+enum wake_reason_type {
+ WCN36XX_HAL_WAKE_REASON_NONE = 0,
+
+ /* magic packet match */
+ WCN36XX_HAL_WAKE_REASON_MAGIC_PACKET = 1,
+
+ /* host defined pattern match */
+ WCN36XX_HAL_WAKE_REASON_PATTERN_MATCH = 2,
+
+ /* EAP-ID frame detected */
+ WCN36XX_HAL_WAKE_REASON_EAPID_PACKET = 3,
+
+ /* start of EAPOL 4-way handshake detected */
+ WCN36XX_HAL_WAKE_REASON_EAPOL4WAY_PACKET = 4,
+
+ /* network scan offload match */
+ WCN36XX_HAL_WAKE_REASON_NETSCAN_OFFL_MATCH = 5,
+
+ /* GTK rekey status wakeup (see status) */
+ WCN36XX_HAL_WAKE_REASON_GTK_REKEY_STATUS = 6,
+
+ /* BSS connection lost */
+ WCN36XX_HAL_WAKE_REASON_BSS_CONN_LOST = 7,
+};
+
+/*
+ Wake Packet which is saved at tWakeReasonParams.DataStart
+ This data is sent for any wake reasons that involve a packet-based wakeup :
+
+ WCN36XX_HAL_WAKE_REASON_TYPE_MAGIC_PACKET
+ WCN36XX_HAL_WAKE_REASON_TYPE_PATTERN_MATCH
+ WCN36XX_HAL_WAKE_REASON_TYPE_EAPID_PACKET
+ WCN36XX_HAL_WAKE_REASON_TYPE_EAPOL4WAY_PACKET
+ WCN36XX_HAL_WAKE_REASON_TYPE_GTK_REKEY_STATUS
+
+ The information is provided to the host for auditing and debug purposes
+
+*/
+
+/* Wake reason indication */
+struct wcn36xx_hal_wake_reason_ind {
+ struct wcn36xx_hal_msg_header header;
+
+ /* see tWakeReasonType */
+ u32 reason;
+
+ /* argument specific to the reason type */
+ u32 reason_arg;
+
+ /* length of optional data stored in this message, in case HAL
+ * truncates the data (i.e. data packets) this length will be less
+ * than the actual length */
+ u32 stored_data_len;
+
+ /* actual length of data */
+ u32 actual_data_len;
+
+ /* variable length start of data (length == storedDataLen) see
+ * specific wake type */
+ u8 data_start[1];
+
+ u32 bss_index:8;
+ u32 reserved:24;
+};
+
+#define WCN36XX_HAL_GTK_KEK_BYTES 16
+#define WCN36XX_HAL_GTK_KCK_BYTES 16
+
+#define WCN36XX_HAL_GTK_OFFLOAD_FLAGS_DISABLE (1 << 0)
+
+#define GTK_SET_BSS_KEY_TAG 0x1234AA55
+
+struct wcn36xx_hal_gtk_offload_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* optional flags */
+ u32 flags;
+
+ /* Key confirmation key */
+ u8 kck[WCN36XX_HAL_GTK_KCK_BYTES];
+
+ /* key encryption key */
+ u8 kek[WCN36XX_HAL_GTK_KEK_BYTES];
+
+ /* replay counter */
+ u64 key_replay_counter;
+
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_gtk_offload_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_gtk_offload_get_info_req_msg {
+ struct wcn36xx_hal_msg_header header;
+ u8 bss_index;
+};
+
+struct wcn36xx_hal_gtk_offload_get_info_rsp_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+
+ /* last rekey status when the rekey was offloaded */
+ u32 last_rekey_status;
+
+ /* current replay counter value */
+ u64 key_replay_counter;
+
+ /* total rekey attempts */
+ u32 total_rekey_count;
+
+ /* successful GTK rekeys */
+ u32 gtk_rekey_count;
+
+ /* successful iGTK rekeys */
+ u32 igtk_rekey_count;
+
+ u8 bss_index;
+};
+
+struct dhcp_info {
+ /* Indicates the device mode which indicates about the DHCP activity */
+ u8 device_mode;
+
+ u8 addr[ETH_ALEN];
+};
+
+struct dhcp_ind_status {
+ struct wcn36xx_hal_msg_header header;
+
+ /* success or failure */
+ u32 status;
+};
+
+/*
+ * Thermal Mitigation mode of operation.
+ *
+ * WCN36XX_HAL_THERMAL_MITIGATION_MODE_0 - Based on AMPDU disabling aggregation
+ *
+ * WCN36XX_HAL_THERMAL_MITIGATION_MODE_1 - Based on AMPDU disabling aggregation
+ * and reducing transmit power
+ *
+ * WCN36XX_HAL_THERMAL_MITIGATION_MODE_2 - Not supported */
+enum wcn36xx_hal_thermal_mitigation_mode_type {
+ HAL_THERMAL_MITIGATION_MODE_INVALID = -1,
+ HAL_THERMAL_MITIGATION_MODE_0,
+ HAL_THERMAL_MITIGATION_MODE_1,
+ HAL_THERMAL_MITIGATION_MODE_2,
+ HAL_THERMAL_MITIGATION_MODE_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
+};
+
+
+/*
+ * Thermal Mitigation level.
+ * Note the levels are incremental i.e WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_2 =
+ * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_0 +
+ * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_1
+ *
+ * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_0 - lowest level of thermal mitigation.
+ * This level indicates normal mode of operation
+ *
+ * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_1 - 1st level of thermal mitigation
+ *
+ * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_2 - 2nd level of thermal mitigation
+ *
+ * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_3 - 3rd level of thermal mitigation
+ *
+ * WCN36XX_HAL_THERMAL_MITIGATION_LEVEL_4 - 4th level of thermal mitigation
+ */
+enum wcn36xx_hal_thermal_mitigation_level_type {
+ HAL_THERMAL_MITIGATION_LEVEL_INVALID = -1,
+ HAL_THERMAL_MITIGATION_LEVEL_0,
+ HAL_THERMAL_MITIGATION_LEVEL_1,
+ HAL_THERMAL_MITIGATION_LEVEL_2,
+ HAL_THERMAL_MITIGATION_LEVEL_3,
+ HAL_THERMAL_MITIGATION_LEVEL_4,
+ HAL_THERMAL_MITIGATION_LEVEL_MAX = WCN36XX_HAL_MAX_ENUM_SIZE,
+};
+
+
+/* WCN36XX_HAL_SET_THERMAL_MITIGATION_REQ */
+struct set_thermal_mitigation_req_msg {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Thermal Mitigation Operation Mode */
+ enum wcn36xx_hal_thermal_mitigation_mode_type mode;
+
+ /* Thermal Mitigation Level */
+ enum wcn36xx_hal_thermal_mitigation_level_type level;
+};
+
+struct set_thermal_mitigation_resp {
+
+ struct wcn36xx_hal_msg_header header;
+
+ /* status of the request */
+ u32 status;
+};
+
+/* Per STA Class B Statistics. Class B statistics are STA TX/RX stats
+ * provided to FW from Host via periodic messages */
+struct stats_class_b_ind {
+ struct wcn36xx_hal_msg_header header;
+
+ /* Duration over which this stats was collected */
+ u32 duration;
+
+ /* Per STA Stats */
+
+ /* TX stats */
+ u32 tx_bytes_pushed;
+ u32 tx_packets_pushed;
+
+ /* RX stats */
+ u32 rx_bytes_rcvd;
+ u32 rx_packets_rcvd;
+ u32 rx_time_total;
+};
+
+#endif /* _HAL_H_ */
diff --git a/drivers/net/wireless/ath/wcn36xx/main.c b/drivers/net/wireless/ath/wcn36xx/main.c
new file mode 100644
index 0000000..727270d
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/main.c
@@ -0,0 +1,1029 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include "wcn36xx.h"
+
+unsigned int debug_mask;
+module_param(debug_mask, uint, 0644);
+MODULE_PARM_DESC(debug_mask, "Debugging mask");
+
+#define CHAN2G(_freq, _idx) { \
+ .band = IEEE80211_BAND_2GHZ, \
+ .center_freq = (_freq), \
+ .hw_value = (_idx), \
+ .max_power = 25, \
+}
+
+#define CHAN5G(_freq, _idx) { \
+ .band = IEEE80211_BAND_5GHZ, \
+ .center_freq = (_freq), \
+ .hw_value = (_idx), \
+ .max_power = 25, \
+}
+
+/* The wcn firmware expects channel values to matching
+ * their mnemonic values. So use these for .hw_value. */
+static struct ieee80211_channel wcn_2ghz_channels[] = {
+ CHAN2G(2412, 1), /* Channel 1 */
+ CHAN2G(2417, 2), /* Channel 2 */
+ CHAN2G(2422, 3), /* Channel 3 */
+ CHAN2G(2427, 4), /* Channel 4 */
+ CHAN2G(2432, 5), /* Channel 5 */
+ CHAN2G(2437, 6), /* Channel 6 */
+ CHAN2G(2442, 7), /* Channel 7 */
+ CHAN2G(2447, 8), /* Channel 8 */
+ CHAN2G(2452, 9), /* Channel 9 */
+ CHAN2G(2457, 10), /* Channel 10 */
+ CHAN2G(2462, 11), /* Channel 11 */
+ CHAN2G(2467, 12), /* Channel 12 */
+ CHAN2G(2472, 13), /* Channel 13 */
+ CHAN2G(2484, 14) /* Channel 14 */
+
+};
+
+static struct ieee80211_channel wcn_5ghz_channels[] = {
+ CHAN5G(5180, 36),
+ CHAN5G(5200, 40),
+ CHAN5G(5220, 44),
+ CHAN5G(5240, 48),
+ CHAN5G(5260, 52),
+ CHAN5G(5280, 56),
+ CHAN5G(5300, 60),
+ CHAN5G(5320, 64),
+ CHAN5G(5500, 100),
+ CHAN5G(5520, 104),
+ CHAN5G(5540, 108),
+ CHAN5G(5560, 112),
+ CHAN5G(5580, 116),
+ CHAN5G(5600, 120),
+ CHAN5G(5620, 124),
+ CHAN5G(5640, 128),
+ CHAN5G(5660, 132),
+ CHAN5G(5700, 140),
+ CHAN5G(5745, 149),
+ CHAN5G(5765, 153),
+ CHAN5G(5785, 157),
+ CHAN5G(5805, 161),
+ CHAN5G(5825, 165)
+};
+
+#define RATE(_bitrate, _hw_rate, _flags) { \
+ .bitrate = (_bitrate), \
+ .flags = (_flags), \
+ .hw_value = (_hw_rate), \
+ .hw_value_short = (_hw_rate) \
+}
+
+static struct ieee80211_rate wcn_2ghz_rates[] = {
+ RATE(10, HW_RATE_INDEX_1MBPS, 0),
+ RATE(20, HW_RATE_INDEX_2MBPS, IEEE80211_RATE_SHORT_PREAMBLE),
+ RATE(55, HW_RATE_INDEX_5_5MBPS, IEEE80211_RATE_SHORT_PREAMBLE),
+ RATE(110, HW_RATE_INDEX_11MBPS, IEEE80211_RATE_SHORT_PREAMBLE),
+ RATE(60, HW_RATE_INDEX_6MBPS, 0),
+ RATE(90, HW_RATE_INDEX_9MBPS, 0),
+ RATE(120, HW_RATE_INDEX_12MBPS, 0),
+ RATE(180, HW_RATE_INDEX_18MBPS, 0),
+ RATE(240, HW_RATE_INDEX_24MBPS, 0),
+ RATE(360, HW_RATE_INDEX_36MBPS, 0),
+ RATE(480, HW_RATE_INDEX_48MBPS, 0),
+ RATE(540, HW_RATE_INDEX_54MBPS, 0)
+};
+
+static struct ieee80211_rate wcn_5ghz_rates[] = {
+ RATE(60, HW_RATE_INDEX_6MBPS, 0),
+ RATE(90, HW_RATE_INDEX_9MBPS, 0),
+ RATE(120, HW_RATE_INDEX_12MBPS, 0),
+ RATE(180, HW_RATE_INDEX_18MBPS, 0),
+ RATE(240, HW_RATE_INDEX_24MBPS, 0),
+ RATE(360, HW_RATE_INDEX_36MBPS, 0),
+ RATE(480, HW_RATE_INDEX_48MBPS, 0),
+ RATE(540, HW_RATE_INDEX_54MBPS, 0)
+};
+
+static struct ieee80211_supported_band wcn_band_2ghz = {
+ .channels = wcn_2ghz_channels,
+ .n_channels = ARRAY_SIZE(wcn_2ghz_channels),
+ .bitrates = wcn_2ghz_rates,
+ .n_bitrates = ARRAY_SIZE(wcn_2ghz_rates),
+ .ht_cap = {
+ .cap = IEEE80211_HT_CAP_GRN_FLD |
+ IEEE80211_HT_CAP_SGI_20 |
+ IEEE80211_HT_CAP_DSSSCCK40 |
+ IEEE80211_HT_CAP_LSIG_TXOP_PROT,
+ .ht_supported = true,
+ .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K,
+ .ampdu_density = IEEE80211_HT_MPDU_DENSITY_16,
+ .mcs = {
+ .rx_mask = { 0xff, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
+ .rx_highest = cpu_to_le16(72),
+ .tx_params = IEEE80211_HT_MCS_TX_DEFINED,
+ }
+ }
+};
+
+static struct ieee80211_supported_band wcn_band_5ghz = {
+ .channels = wcn_5ghz_channels,
+ .n_channels = ARRAY_SIZE(wcn_5ghz_channels),
+ .bitrates = wcn_5ghz_rates,
+ .n_bitrates = ARRAY_SIZE(wcn_5ghz_rates),
+ .ht_cap = {
+ .cap = IEEE80211_HT_CAP_GRN_FLD |
+ IEEE80211_HT_CAP_SGI_20 |
+ IEEE80211_HT_CAP_DSSSCCK40 |
+ IEEE80211_HT_CAP_LSIG_TXOP_PROT |
+ IEEE80211_HT_CAP_SGI_40 |
+ IEEE80211_HT_CAP_SUP_WIDTH_20_40,
+ .ht_supported = true,
+ .ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K,
+ .ampdu_density = IEEE80211_HT_MPDU_DENSITY_16,
+ .mcs = {
+ .rx_mask = { 0xff, 0, 0, 0, 0, 0, 0, 0, 0, 0, },
+ .rx_highest = cpu_to_le16(72),
+ .tx_params = IEEE80211_HT_MCS_TX_DEFINED,
+ }
+ }
+};
+
+#ifdef CONFIG_PM
+
+static const struct wiphy_wowlan_support wowlan_support = {
+ .flags = WIPHY_WOWLAN_ANY
+};
+
+#endif
+
+static inline u8 get_sta_index(struct ieee80211_vif *vif,
+ struct wcn36xx_sta *sta_priv)
+{
+ return NL80211_IFTYPE_STATION == vif->type ?
+ sta_priv->bss_sta_index :
+ sta_priv->sta_index;
+}
+
+static int wcn36xx_start(struct ieee80211_hw *hw)
+{
+ struct wcn36xx *wcn = hw->priv;
+ int ret;
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac start\n");
+
+ /* SMD initialization */
+ ret = wcn36xx_smd_open(wcn);
+ if (ret) {
+ wcn36xx_err("Failed to open smd channel: %d\n", ret);
+ goto out_err;
+ }
+
+ /* Allocate memory pools for Mgmt BD headers and Data BD headers */
+ ret = wcn36xx_dxe_allocate_mem_pools(wcn);
+ if (ret) {
+ wcn36xx_err("Failed to alloc DXE mempool: %d\n", ret);
+ goto out_smd_close;
+ }
+
+ ret = wcn36xx_dxe_alloc_ctl_blks(wcn);
+ if (ret) {
+ wcn36xx_err("Failed to alloc DXE ctl blocks: %d\n", ret);
+ goto out_free_dxe_pool;
+ }
+
+ /* Maximum SMD message size is 4k */
+ wcn->smd_buf = kmalloc(WCN36XX_SMD_BUF_SIZE, GFP_KERNEL);
+ if (!wcn->smd_buf) {
+ wcn36xx_err("Failed to allocate smd buf\n");
+ ret = -ENOMEM;
+ goto out_free_dxe_ctl;
+ }
+
+ ret = wcn36xx_smd_load_nv(wcn);
+ if (ret) {
+ wcn36xx_err("Failed to push NV to chip\n");
+ goto out_free_smd_buf;
+ }
+
+ ret = wcn36xx_smd_start(wcn);
+ if (ret) {
+ wcn36xx_err("Failed to start chip\n");
+ goto out_free_smd_buf;
+ }
+
+ /* DMA channel initialization */
+ ret = wcn36xx_dxe_init(wcn);
+ if (ret) {
+ wcn36xx_err("DXE init failed\n");
+ goto out_smd_stop;
+ }
+
+ wcn36xx_pmc_init(wcn);
+ wcn36xx_debugfs_init(wcn);
+
+ if (!wcn36xx_is_fw_version(wcn, 1, 2, 2, 24)) {
+ ret = wcn36xx_smd_feature_caps_exchange(wcn);
+ if (ret)
+ wcn36xx_warn("Exchange feature caps failed\n");
+ }
+
+ return 0;
+
+out_smd_stop:
+ wcn36xx_smd_stop(wcn);
+out_free_smd_buf:
+ kfree(wcn->smd_buf);
+out_free_dxe_pool:
+ wcn36xx_dxe_free_mem_pools(wcn);
+out_free_dxe_ctl:
+ wcn36xx_dxe_free_ctl_blks(wcn);
+out_smd_close:
+ wcn36xx_smd_close(wcn);
+out_err:
+ return ret;
+}
+
+static void wcn36xx_stop(struct ieee80211_hw *hw)
+{
+ struct wcn36xx *wcn = hw->priv;
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac stop\n");
+
+ wcn36xx_debugfs_exit(wcn);
+ wcn36xx_smd_stop(wcn);
+ wcn36xx_dxe_deinit(wcn);
+ wcn36xx_smd_close(wcn);
+
+ wcn36xx_dxe_free_mem_pools(wcn);
+ wcn36xx_dxe_free_ctl_blks(wcn);
+
+ kfree(wcn->smd_buf);
+}
+
+static int wcn36xx_config(struct ieee80211_hw *hw, u32 changed)
+{
+ struct wcn36xx *wcn = hw->priv;
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac config changed 0x%08x\n", changed);
+
+ if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
+ int ch = WCN36XX_HW_CHANNEL(wcn);
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "wcn36xx_config channel switch=%d\n",
+ ch);
+ wcn36xx_smd_switch_channel(wcn, ch);
+ }
+
+ return 0;
+}
+
+#define WCN36XX_SUPPORTED_FILTERS (0)
+
+static void wcn36xx_configure_filter(struct ieee80211_hw *hw,
+ unsigned int changed,
+ unsigned int *total, u64 multicast)
+{
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac configure filter\n");
+
+ *total &= WCN36XX_SUPPORTED_FILTERS;
+}
+
+static void wcn36xx_tx(struct ieee80211_hw *hw,
+ struct ieee80211_tx_control *control,
+ struct sk_buff *skb)
+{
+ struct wcn36xx *wcn = hw->priv;
+ struct wcn36xx_sta *sta_priv = NULL;
+
+ if (control->sta)
+ sta_priv = (struct wcn36xx_sta *)control->sta->drv_priv;
+
+ if (wcn36xx_start_tx(wcn, sta_priv, skb))
+ ieee80211_free_txskb(wcn->hw, skb);
+}
+
+static int wcn36xx_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta,
+ struct ieee80211_key_conf *key_conf)
+{
+ struct wcn36xx *wcn = hw->priv;
+ struct wcn36xx_sta *sta_priv = NULL;
+ int ret = 0;
+ u8 key[WLAN_MAX_KEY_LEN];
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac80211 set key\n");
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "Key: cmd=0x%x algo:0x%x, id:%d, len:%d flags 0x%x\n",
+ cmd, key_conf->cipher, key_conf->keyidx,
+ key_conf->keylen, key_conf->flags);
+ wcn36xx_dbg_dump(WCN36XX_DBG_MAC, "KEY: ",
+ key_conf->key,
+ key_conf->keylen);
+ sta_priv = sta ? (struct wcn36xx_sta *)sta->drv_priv : wcn->sta;
+
+ switch (key_conf->cipher) {
+ case WLAN_CIPHER_SUITE_WEP40:
+ wcn->encrypt_type = WCN36XX_HAL_ED_WEP40;
+ break;
+ case WLAN_CIPHER_SUITE_WEP104:
+ wcn->encrypt_type = WCN36XX_HAL_ED_WEP40;
+ break;
+ case WLAN_CIPHER_SUITE_CCMP:
+ wcn->encrypt_type = WCN36XX_HAL_ED_CCMP;
+ break;
+ case WLAN_CIPHER_SUITE_TKIP:
+ wcn->encrypt_type = WCN36XX_HAL_ED_TKIP;
+ break;
+ default:
+ wcn36xx_err("Unsupported key type 0x%x\n",
+ key_conf->cipher);
+ ret = -EOPNOTSUPP;
+ goto out;
+ }
+
+ switch (cmd) {
+ case SET_KEY:
+ if (WCN36XX_HAL_ED_TKIP == wcn->encrypt_type) {
+ /*
+ * Supplicant is sending key in the wrong order:
+ * Temporal Key (16 b) - TX MIC (8 b) - RX MIC (8 b)
+ * but HW expects it to be in the order as described in
+ * IEEE 802.11 spec (see chapter 11.7) like this:
+ * Temporal Key (16 b) - RX MIC (8 b) - TX MIC (8 b)
+ */
+ memcpy(key, key_conf->key, 16);
+ memcpy(key + 16, key_conf->key + 24, 8);
+ memcpy(key + 24, key_conf->key + 16, 8);
+ } else {
+ memcpy(key, key_conf->key, key_conf->keylen);
+ }
+
+ if (IEEE80211_KEY_FLAG_PAIRWISE & key_conf->flags) {
+ sta_priv->is_data_encrypted = true;
+ /* Reconfigure bss with encrypt_type */
+ if (NL80211_IFTYPE_STATION == vif->type)
+ wcn36xx_smd_config_bss(wcn,
+ vif,
+ sta,
+ sta->addr,
+ true);
+
+ wcn36xx_smd_set_stakey(wcn,
+ wcn->encrypt_type,
+ key_conf->keyidx,
+ key_conf->keylen,
+ key,
+ get_sta_index(vif, sta_priv));
+ } else {
+ wcn36xx_smd_set_bsskey(wcn,
+ wcn->encrypt_type,
+ key_conf->keyidx,
+ key_conf->keylen,
+ key);
+ if ((WLAN_CIPHER_SUITE_WEP40 == key_conf->cipher) ||
+ (WLAN_CIPHER_SUITE_WEP104 == key_conf->cipher)) {
+ sta_priv->is_data_encrypted = true;
+ wcn36xx_smd_set_stakey(wcn,
+ wcn->encrypt_type,
+ key_conf->keyidx,
+ key_conf->keylen,
+ key,
+ get_sta_index(vif, sta_priv));
+ }
+ }
+ break;
+ case DISABLE_KEY:
+ if (!(IEEE80211_KEY_FLAG_PAIRWISE & key_conf->flags)) {
+ wcn36xx_smd_remove_bsskey(wcn,
+ wcn->encrypt_type,
+ key_conf->keyidx);
+ } else {
+ sta_priv->is_data_encrypted = false;
+ /* do not remove key if disassociated */
+ if (wcn->aid)
+ wcn36xx_smd_remove_stakey(wcn,
+ wcn->encrypt_type,
+ key_conf->keyidx,
+ get_sta_index(vif, sta_priv));
+ }
+ break;
+ default:
+ wcn36xx_err("Unsupported key cmd 0x%x\n", cmd);
+ ret = -EOPNOTSUPP;
+ goto out;
+ break;
+ }
+
+out:
+ return ret;
+}
+
+static void wcn36xx_sw_scan_start(struct ieee80211_hw *hw)
+{
+ struct wcn36xx *wcn = hw->priv;
+
+ wcn36xx_smd_init_scan(wcn);
+ wcn36xx_smd_start_scan(wcn);
+}
+
+static void wcn36xx_sw_scan_complete(struct ieee80211_hw *hw)
+{
+ struct wcn36xx *wcn = hw->priv;
+
+ wcn36xx_smd_end_scan(wcn);
+ wcn36xx_smd_finish_scan(wcn);
+}
+
+static void wcn36xx_update_allowed_rates(struct wcn36xx *wcn,
+ struct ieee80211_sta *sta)
+{
+ int i, size;
+ u16 *rates_table;
+ u32 rates = sta->supp_rates[wcn->hw->conf.chandef.chan->band];
+
+ memset(&wcn->supported_rates, 0, sizeof(wcn->supported_rates));
+ wcn->supported_rates.op_rate_mode = STA_11n;
+
+ size = ARRAY_SIZE(wcn->supported_rates.dsss_rates);
+ rates_table = wcn->supported_rates.dsss_rates;
+ if (wcn->hw->conf.chandef.chan->band == IEEE80211_BAND_2GHZ) {
+ for (i = 0; i < size; i++) {
+ if (rates & 0x01) {
+ rates_table[i] = wcn_2ghz_rates[i].hw_value;
+ rates = rates >> 1;
+ }
+ }
+ }
+
+ size = ARRAY_SIZE(wcn->supported_rates.ofdm_rates);
+ rates_table = wcn->supported_rates.ofdm_rates;
+ for (i = 0; i < size; i++) {
+ if (rates & 0x01) {
+ rates_table[i] = wcn_5ghz_rates[i].hw_value;
+ rates = rates >> 1;
+ }
+ }
+
+ if (sta->ht_cap.ht_supported) {
+ memcpy(wcn->supported_rates.supported_mcs_set,
+ sta->ht_cap.mcs.rx_mask,
+ sizeof(sta->ht_cap.mcs.rx_mask));
+ BUILD_BUG_ON(sizeof(sta->ht_cap.mcs.rx_mask) >
+ sizeof(wcn->supported_rates.supported_mcs_set));
+ }
+}
+
+static void wcn36xx_bss_info_changed(struct ieee80211_hw *hw,
+ struct ieee80211_vif *vif,
+ struct ieee80211_bss_conf *bss_conf,
+ u32 changed)
+{
+ struct wcn36xx *wcn = hw->priv;
+ struct sk_buff *skb = NULL;
+ u16 tim_off, tim_len;
+ enum wcn36xx_hal_link_state link_state;
+
+ wcn->current_vif = (struct wcn36xx_vif *)vif->drv_priv;
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac bss info changed vif %p changed 0x%08x\n",
+ vif, changed);
+
+ if (changed & BSS_CHANGED_BEACON_INFO) {
+ wcn36xx_dbg(WCN36XX_DBG_MAC,
+ "mac bss changed dtim period %d\n",
+ bss_conf->dtim_period);
+
+ wcn->dtim_period = bss_conf->dtim_period;
+ }
+
+ if (changed & BSS_CHANGED_BSSID) {
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac bss changed_bssid %pM\n",
+ bss_conf->bssid);
+
+ if (!is_zero_ether_addr(bss_conf->bssid)) {
+ wcn->is_joining = true;
+ wcn->current_vif->bss_index = 0xff;
+ wcn36xx_smd_join(wcn, bss_conf->bssid,
+ vif->addr, WCN36XX_HW_CHANNEL(wcn));
+ wcn36xx_smd_config_bss(wcn, vif, NULL,
+ bss_conf->bssid, false);
+ } else {
+ wcn->is_joining = false;
+ wcn36xx_smd_delete_bss(wcn);
+ }
+ }
+
+ if (changed & BSS_CHANGED_SSID) {
+ wcn36xx_dbg(WCN36XX_DBG_MAC,
+ "mac bss changed ssid\n");
+ wcn36xx_dbg_dump(WCN36XX_DBG_MAC, "ssid ",
+ bss_conf->ssid, bss_conf->ssid_len);
+
+ wcn->ssid.length = bss_conf->ssid_len;
+ memcpy(&wcn->ssid.ssid, bss_conf->ssid, bss_conf->ssid_len);
+ }
+
+ if (changed & BSS_CHANGED_ASSOC) {
+ wcn->is_joining = false;
+ if (bss_conf->assoc) {
+ struct ieee80211_sta *sta;
+ struct wcn36xx_sta *sta_priv;
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC,
+ "mac assoc bss %pM vif %pM AID=%d\n",
+ bss_conf->bssid,
+ vif->addr,
+ bss_conf->aid);
+
+ wcn->aid = bss_conf->aid;
+
+ rcu_read_lock();
+ sta = ieee80211_find_sta(vif, bss_conf->bssid);
+ if (!sta) {
+ wcn36xx_err("sta %pM is not found\n",
+ bss_conf->bssid);
+ rcu_read_unlock();
+ goto out;
+ }
+ sta_priv = (struct wcn36xx_sta *)sta->drv_priv;
+
+ wcn36xx_update_allowed_rates(wcn, sta);
+
+ wcn36xx_smd_set_link_st(wcn, bss_conf->bssid,
+ vif->addr,
+ WCN36XX_HAL_LINK_POSTASSOC_STATE);
+ wcn->sta = sta_priv;
+ wcn36xx_smd_config_bss(wcn, vif, sta,
+ bss_conf->bssid,
+ true);
+ rcu_read_unlock();
+ } else {
+ wcn36xx_dbg(WCN36XX_DBG_MAC,
+ "disassociated bss %pM vif %pM AID=%d\n",
+ bss_conf->bssid,
+ vif->addr,
+ bss_conf->aid);
+ wcn->aid = 0;
+ wcn36xx_smd_set_link_st(wcn,
+ bss_conf->bssid,
+ vif->addr,
+ WCN36XX_HAL_LINK_IDLE_STATE);
+ }
+ }
+
+ if (changed & BSS_CHANGED_AP_PROBE_RESP) {
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac bss changed ap probe resp\n");
+ skb = ieee80211_proberesp_get(hw, vif);
+ if (!skb) {
+ wcn36xx_err("failed to alloc probereq skb\n");
+ goto out;
+ }
+
+ wcn36xx_smd_update_proberesp_tmpl(wcn, skb);
+ dev_kfree_skb(skb);
+ }
+
+ if (changed & BSS_CHANGED_BEACON_ENABLED) {
+ wcn36xx_dbg(WCN36XX_DBG_MAC,
+ "mac bss changed beacon enabled %d\n",
+ bss_conf->enable_beacon);
+
+ if (bss_conf->enable_beacon) {
+ wcn->current_vif->bss_index = 0xff;
+ wcn36xx_smd_config_bss(wcn, vif, NULL,
+ wcn->addresses.addr, false);
+ skb = ieee80211_beacon_get_tim(hw, vif, &tim_off,
+ &tim_len);
+ if (!skb) {
+ wcn36xx_err("failed to alloc beacon skb\n");
+ goto out;
+ }
+ wcn36xx_smd_send_beacon(wcn, skb, tim_off, 0);
+ dev_kfree_skb(skb);
+
+ if (vif->type == NL80211_IFTYPE_ADHOC ||
+ vif->type == NL80211_IFTYPE_MESH_POINT)
+ link_state = WCN36XX_HAL_LINK_IBSS_STATE;
+ else
+ link_state = WCN36XX_HAL_LINK_AP_STATE;
+
+ wcn36xx_smd_set_link_st(wcn, vif->addr, vif->addr,
+ link_state);
+ } else {
+ wcn36xx_smd_set_link_st(wcn, vif->addr, vif->addr,
+ WCN36XX_HAL_LINK_IDLE_STATE);
+ wcn36xx_smd_delete_bss(wcn);
+ }
+ }
+out:
+ return;
+}
+
+/* this is required when using IEEE80211_HW_HAS_RATE_CONTROL */
+static int wcn36xx_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
+{
+ struct wcn36xx *wcn = hw->priv;
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac set RTS threshold %d\n", value);
+
+ wcn36xx_smd_update_cfg(wcn, WCN36XX_HAL_CFG_RTS_THRESHOLD, value);
+ return 0;
+}
+
+static void wcn36xx_remove_interface(struct ieee80211_hw *hw,
+ struct ieee80211_vif *vif)
+{
+ struct wcn36xx *wcn = hw->priv;
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac remove interface vif %p\n", vif);
+ wcn36xx_smd_delete_sta_self(wcn, vif->addr);
+}
+
+static int wcn36xx_add_interface(struct ieee80211_hw *hw,
+ struct ieee80211_vif *vif)
+{
+ struct wcn36xx *wcn = hw->priv;
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac add interface vif %p type %d\n",
+ vif, vif->type);
+
+ wcn->current_vif = (struct wcn36xx_vif *)vif->drv_priv;
+
+ if (!(NL80211_IFTYPE_STATION == vif->type ||
+ NL80211_IFTYPE_AP == vif->type ||
+ NL80211_IFTYPE_ADHOC == vif->type ||
+ NL80211_IFTYPE_MESH_POINT == vif->type)) {
+ wcn36xx_warn("Unsupported interface type requested: %d\n",
+ vif->type);
+ return -EOPNOTSUPP;
+ }
+
+ wcn36xx_smd_add_sta_self(wcn, vif->addr);
+
+ return 0;
+}
+
+static int wcn36xx_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
+{
+ struct wcn36xx *wcn = hw->priv;
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac sta add vif %p sta %pM\n",
+ vif, sta->addr);
+
+ wcn->sta = (struct wcn36xx_sta *)sta->drv_priv;
+ wcn->aid = sta->aid;
+ wcn36xx_smd_config_sta(wcn, vif, sta);
+
+ return 0;
+}
+
+static int wcn36xx_sta_remove(struct ieee80211_hw *hw,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
+{
+ struct wcn36xx *wcn = hw->priv;
+ struct wcn36xx_sta *sta_priv = (struct wcn36xx_sta *)sta->drv_priv;
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac sta remove vif %p sta %pM index %d\n",
+ vif, sta->addr, sta_priv->sta_index);
+
+ wcn36xx_smd_delete_sta(wcn, sta_priv->sta_index);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+
+static int wcn36xx_suspend(struct ieee80211_hw *hw, struct cfg80211_wowlan *wow)
+{
+ struct wcn36xx *wcn = hw->priv;
+ struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
+ struct ieee80211_vif,
+ drv_priv);
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac suspend\n");
+
+ mutex_lock(&wcn->pm_mutex);
+
+ /* Enter BMPS only in connected state */
+ if ((wcn->aid > 0) &&
+ (wcn->pw_state != WCN36XX_BMPS) &&
+ (NL80211_IFTYPE_STATION == vif->type))
+ wcn36xx_pmc_enter_bmps_state(wcn, vif->bss_conf.sync_tsf);
+
+ wcn->is_suspended = true;
+ wcn->is_con_lost_pending = false;
+
+ mutex_unlock(&wcn->pm_mutex);
+
+ return 0;
+}
+
+static int wcn36xx_resume(struct ieee80211_hw *hw)
+{
+ struct wcn36xx *wcn = hw->priv;
+ struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
+ struct ieee80211_vif,
+ drv_priv);
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac resume\n");
+
+ wcn->is_suspended = false;
+
+ if (wcn->pw_state == WCN36XX_BMPS)
+ wcn36xx_pmc_exit_bmps_state(wcn);
+
+ if (wcn->is_con_lost_pending) {
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "report connection lost\n");
+ ieee80211_connection_loss(vif);
+ }
+
+ return 0;
+}
+
+#endif
+
+static int wcn36xx_ampdu_action(struct ieee80211_hw *hw,
+ struct ieee80211_vif *vif,
+ enum ieee80211_ampdu_mlme_action action,
+ struct ieee80211_sta *sta, u16 tid, u16 *ssn,
+ u8 buf_size)
+{
+ struct wcn36xx *wcn = hw->priv;
+ struct wcn36xx_sta *sta_priv = NULL;
+
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "mac ampdu action action %d tid %d\n",
+ action, tid);
+
+ sta_priv = (struct wcn36xx_sta *)sta->drv_priv;
+
+ switch (action) {
+ case IEEE80211_AMPDU_RX_START:
+ sta_priv->tid = tid;
+ wcn36xx_smd_add_ba_session(wcn, sta, tid, ssn, 0,
+ get_sta_index(vif, sta_priv));
+ wcn36xx_smd_add_ba(wcn);
+ wcn36xx_smd_trigger_ba(wcn, get_sta_index(vif, sta_priv));
+ ieee80211_start_tx_ba_session(sta, tid, 0);
+ break;
+ case IEEE80211_AMPDU_RX_STOP:
+ wcn36xx_smd_del_ba(wcn, tid, get_sta_index(vif, sta_priv));
+ break;
+ case IEEE80211_AMPDU_TX_START:
+ ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
+ break;
+ case IEEE80211_AMPDU_TX_OPERATIONAL:
+ wcn36xx_smd_add_ba_session(wcn, sta, tid, ssn, 1,
+ get_sta_index(vif, sta_priv));
+ break;
+ case IEEE80211_AMPDU_TX_STOP_FLUSH:
+ case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
+ case IEEE80211_AMPDU_TX_STOP_CONT:
+ ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
+ break;
+ default:
+ wcn36xx_err("Unknown AMPDU action\n");
+ }
+
+ return 0;
+}
+
+static const struct ieee80211_ops wcn36xx_ops = {
+ .start = wcn36xx_start,
+ .stop = wcn36xx_stop,
+ .add_interface = wcn36xx_add_interface,
+ .remove_interface = wcn36xx_remove_interface,
+#ifdef CONFIG_PM
+ .suspend = wcn36xx_suspend,
+ .resume = wcn36xx_resume,
+#endif
+ .config = wcn36xx_config,
+ .configure_filter = wcn36xx_configure_filter,
+ .tx = wcn36xx_tx,
+ .set_key = wcn36xx_set_key,
+ .sw_scan_start = wcn36xx_sw_scan_start,
+ .sw_scan_complete = wcn36xx_sw_scan_complete,
+ .bss_info_changed = wcn36xx_bss_info_changed,
+ .set_rts_threshold = wcn36xx_set_rts_threshold,
+ .sta_add = wcn36xx_sta_add,
+ .sta_remove = wcn36xx_sta_remove,
+ .ampdu_action = wcn36xx_ampdu_action,
+};
+
+static int wcn36xx_init_ieee80211(struct wcn36xx *wcn)
+{
+ int ret = 0;
+
+ static const u32 cipher_suites[] = {
+ WLAN_CIPHER_SUITE_WEP40,
+ WLAN_CIPHER_SUITE_WEP104,
+ WLAN_CIPHER_SUITE_TKIP,
+ WLAN_CIPHER_SUITE_CCMP,
+ };
+
+ wcn->hw->flags = IEEE80211_HW_SIGNAL_DBM |
+ IEEE80211_HW_HAS_RATE_CONTROL |
+ IEEE80211_HW_SUPPORTS_PS |
+ IEEE80211_HW_CONNECTION_MONITOR |
+ IEEE80211_HW_AMPDU_AGGREGATION |
+ IEEE80211_HW_TIMING_BEACON_ONLY;
+
+ wcn->hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
+ BIT(NL80211_IFTYPE_AP) |
+ BIT(NL80211_IFTYPE_ADHOC) |
+ BIT(NL80211_IFTYPE_MESH_POINT);
+
+ wcn->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &wcn_band_2ghz;
+ wcn->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &wcn_band_5ghz;
+
+ wcn->hw->wiphy->cipher_suites = cipher_suites;
+ wcn->hw->wiphy->n_cipher_suites = ARRAY_SIZE(cipher_suites);
+
+ wcn->hw->wiphy->flags |= WIPHY_FLAG_AP_PROBE_RESP_OFFLOAD;
+
+#ifdef CONFIG_PM
+ wcn->hw->wiphy->wowlan = &wowlan_support;
+#endif
+
+ wcn->hw->wiphy->n_addresses = 1;
+ wcn->hw->wiphy->addresses = &wcn->addresses;
+
+ wcn->hw->max_listen_interval = 200;
+
+ wcn->hw->queues = 4;
+
+ SET_IEEE80211_DEV(wcn->hw, wcn->dev);
+
+ wcn->hw->sta_data_size = sizeof(struct wcn36xx_sta);
+ wcn->hw->vif_data_size = sizeof(struct wcn36xx_vif);
+
+ return ret;
+}
+
+static int wcn36xx_platform_get_resources(struct wcn36xx *wcn,
+ struct platform_device *pdev)
+{
+ struct resource *res;
+ /* Set TX IRQ */
+ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
+ "wcnss_wlantx_irq");
+ if (!res) {
+ wcn36xx_err("failed to get tx_irq\n");
+ return -ENOENT;
+ }
+ wcn->tx_irq = res->start;
+
+ /* Set RX IRQ */
+ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
+ "wcnss_wlanrx_irq");
+ if (!res) {
+ wcn36xx_err("failed to get rx_irq\n");
+ return -ENOENT;
+ }
+ wcn->rx_irq = res->start;
+
+ /* Map the memory */
+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
+ "wcnss_mmio");
+ if (!res) {
+ wcn36xx_err("failed to get mmio\n");
+ return -ENOENT;
+ }
+ wcn->mmio = ioremap(res->start, resource_size(res));
+ if (!wcn->mmio) {
+ wcn36xx_err("failed to map io memory\n");
+ return -ENOMEM;
+ }
+ return 0;
+}
+
+static int wcn36xx_probe(struct platform_device *pdev)
+{
+ struct ieee80211_hw *hw;
+ struct wcn36xx *wcn;
+ int ret;
+ u16 ofdm_rates[WCN36XX_HAL_NUM_OFDM_RATES] = {
+ HW_RATE_INDEX_6MBPS,
+ HW_RATE_INDEX_9MBPS,
+ HW_RATE_INDEX_12MBPS,
+ HW_RATE_INDEX_18MBPS,
+ HW_RATE_INDEX_24MBPS,
+ HW_RATE_INDEX_36MBPS,
+ HW_RATE_INDEX_48MBPS,
+ HW_RATE_INDEX_54MBPS
+ };
+ u16 dsss_rates[WCN36XX_HAL_NUM_DSSS_RATES] = {
+ HW_RATE_INDEX_1MBPS,
+ HW_RATE_INDEX_2MBPS,
+ HW_RATE_INDEX_5_5MBPS,
+ HW_RATE_INDEX_11MBPS
+ };
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "platform probe\n");
+
+ hw = ieee80211_alloc_hw(sizeof(struct wcn36xx), &wcn36xx_ops);
+ if (!hw) {
+ wcn36xx_err("failed to alloc hw\n");
+ ret = -ENOMEM;
+ goto out_err;
+ }
+ platform_set_drvdata(pdev, hw);
+ wcn = hw->priv;
+ wcn->hw = hw;
+ wcn->dev = &pdev->dev;
+ wcn->ctrl_ops = pdev->dev.platform_data;
+
+ mutex_init(&wcn->pm_mutex);
+ mutex_init(&wcn->smd_mutex);
+
+ /* Configuring supported rates */
+ wcn->supported_rates.op_rate_mode = STA_11n;
+ memcpy(wcn->supported_rates.dsss_rates, dsss_rates,
+ sizeof(*dsss_rates) * WCN36XX_HAL_NUM_DSSS_RATES);
+ memcpy(wcn->supported_rates.ofdm_rates, ofdm_rates,
+ sizeof(*ofdm_rates) * WCN36XX_HAL_NUM_OFDM_RATES);
+ wcn->supported_rates.supported_mcs_set[0] = 0xFF;
+
+ if (!wcn->ctrl_ops->get_hw_mac(wcn->addresses.addr)) {
+ wcn36xx_info("mac address: %pM\n", wcn->addresses.addr);
+ SET_IEEE80211_PERM_ADDR(wcn->hw, wcn->addresses.addr);
+ }
+
+ ret = wcn36xx_platform_get_resources(wcn, pdev);
+ if (ret)
+ goto out_wq;
+
+ wcn36xx_init_ieee80211(wcn);
+ ret = ieee80211_register_hw(wcn->hw);
+ if (ret)
+ goto out_unmap;
+
+ return 0;
+
+out_unmap:
+ iounmap(wcn->mmio);
+out_wq:
+ ieee80211_free_hw(hw);
+out_err:
+ return ret;
+}
+static int wcn36xx_remove(struct platform_device *pdev)
+{
+ struct ieee80211_hw *hw = platform_get_drvdata(pdev);
+ struct wcn36xx *wcn = hw->priv;
+ wcn36xx_dbg(WCN36XX_DBG_MAC, "platform remove\n");
+
+ mutex_destroy(&wcn->pm_mutex);
+ mutex_destroy(&wcn->smd_mutex);
+
+ ieee80211_unregister_hw(hw);
+ iounmap(wcn->mmio);
+ ieee80211_free_hw(hw);
+
+ return 0;
+}
+static const struct platform_device_id wcn36xx_platform_id_table[] = {
+ {
+ .name = "wcn36xx",
+ .driver_data = 0
+ },
+ {}
+};
+MODULE_DEVICE_TABLE(platform, wcn36xx_platform_id_table);
+
+static struct platform_driver wcn36xx_driver = {
+ .probe = wcn36xx_probe,
+ .remove = wcn36xx_remove,
+ .driver = {
+ .name = "wcn36xx",
+ .owner = THIS_MODULE,
+ },
+ .id_table = wcn36xx_platform_id_table,
+};
+
+static int __init wcn36xx_init(void)
+{
+ platform_driver_register(&wcn36xx_driver);
+ return 0;
+}
+module_init(wcn36xx_init);
+
+static void __exit wcn36xx_exit(void)
+{
+ platform_driver_unregister(&wcn36xx_driver);
+}
+module_exit(wcn36xx_exit);
+
+MODULE_LICENSE("Dual BSD/GPL");
+MODULE_AUTHOR("Eugene Krasnikov k.eugene.e@gmail.com");
+MODULE_FIRMWARE(WLAN_NV_FILE);
diff --git a/drivers/net/wireless/ath/wcn36xx/pmc.c b/drivers/net/wireless/ath/wcn36xx/pmc.c
new file mode 100644
index 0000000..f72096e
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/pmc.c
@@ -0,0 +1,46 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include "wcn36xx.h"
+
+int wcn36xx_pmc_init(struct wcn36xx *wcn)
+{
+ wcn->pw_state = WCN36XX_FULL_POWER;
+ return 0;
+}
+
+int wcn36xx_pmc_enter_bmps_state(struct wcn36xx *wcn, u64 tsf)
+{
+ /* TODO: Make sure the TX chain clean */
+ wcn36xx_smd_enter_bmps(wcn, tsf);
+ wcn->pw_state = WCN36XX_BMPS;
+ return 0;
+}
+
+int wcn36xx_pmc_exit_bmps_state(struct wcn36xx *wcn)
+{
+ wcn36xx_smd_exit_bmps(wcn);
+ wcn->pw_state = WCN36XX_FULL_POWER;
+ return 0;
+}
+
+int wcn36xx_enable_keep_alive_null_packet(struct wcn36xx *wcn)
+{
+ wcn36xx_dbg(WCN36XX_DBG_PMC, "%s\n", __func__);
+ return wcn36xx_smd_keep_alive_req(wcn, WCN36XX_HAL_KEEP_ALIVE_NULL_PKT);
+}
diff --git a/drivers/net/wireless/ath/wcn36xx/pmc.h b/drivers/net/wireless/ath/wcn36xx/pmc.h
new file mode 100644
index 0000000..b00d425
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/pmc.h
@@ -0,0 +1,32 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _WCN36XX_PMC_H_
+#define _WCN36XX_PMC_H_
+
+struct wcn36xx;
+
+enum wcn36xx_power_state {
+ WCN36XX_FULL_POWER,
+ WCN36XX_BMPS
+};
+
+int wcn36xx_pmc_init(struct wcn36xx *wcn);
+int wcn36xx_pmc_enter_bmps_state(struct wcn36xx *wcn, u64 tbtt);
+int wcn36xx_pmc_exit_bmps_state(struct wcn36xx *wcn);
+int wcn36xx_enable_keep_alive_null_packet(struct wcn36xx *wcn);
+int wcn36xx_enable_keep_alive_null_packet(struct wcn36xx *wcn);
+#endif /* _WCN36XX_PMC_H_ */
diff --git a/drivers/net/wireless/ath/wcn36xx/smd.c b/drivers/net/wireless/ath/wcn36xx/smd.c
new file mode 100644
index 0000000..380da13
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/smd.c
@@ -0,0 +1,1529 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include <linux/etherdevice.h>
+#include <linux/firmware.h>
+#include <linux/bitops.h>
+#include "smd.h"
+
+static int put_cfg_tlv_u32(struct wcn36xx *wcn, size_t *len, u32 id, u32 value)
+{
+ struct wcn36xx_hal_cfg *entry;
+ u32 *val;
+
+ if (*len + sizeof(*entry) + sizeof(u32) >= WCN36XX_SMD_BUF_SIZE) {
+ wcn36xx_err("Not enough room for TLV entry\n");
+ return -ENOMEM;
+ }
+
+ entry = (struct wcn36xx_hal_cfg *) (wcn->smd_buf + *len);
+ entry->id = id;
+ entry->len = sizeof(u32);
+ entry->pad_bytes = 0;
+ entry->reserve = 0;
+
+ val = (u32 *) (entry + 1);
+ *val = value;
+
+ *len += sizeof(*entry) + sizeof(u32);
+
+ return 0;
+}
+
+static void wcn36xx_smd_set_bss_nw_type(struct wcn36xx *wcn,
+ struct ieee80211_sta *sta,
+ struct wcn36xx_hal_config_bss_params *bss_params)
+{
+ if (IEEE80211_BAND_5GHZ == WCN36XX_BAND(wcn))
+ bss_params->nw_type = WCN36XX_HAL_11A_NW_TYPE;
+ else if (sta && sta->ht_cap.ht_supported)
+ bss_params->nw_type = WCN36XX_HAL_11N_NW_TYPE;
+ else if (sta && (sta->supp_rates[IEEE80211_BAND_2GHZ] & 0x7f))
+ bss_params->nw_type = WCN36XX_HAL_11G_NW_TYPE;
+ else
+ bss_params->nw_type = WCN36XX_HAL_11B_NW_TYPE;
+}
+
+static void wcn36xx_smd_set_bss_ht_params(struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta,
+ struct wcn36xx_hal_config_bss_params *bss_params)
+{
+ if (sta && sta->ht_cap.ht_supported) {
+ unsigned long caps = sta->ht_cap.cap;
+ bss_params->ht = sta->ht_cap.ht_supported;
+ bss_params->tx_channel_width_set =
+ test_bit(IEEE80211_HT_CAP_SUP_WIDTH_20_40, &caps);
+ bss_params->lsig_tx_op_protection_full_support =
+ test_bit(IEEE80211_HT_CAP_LSIG_TXOP_PROT, &caps);
+
+ bss_params->ht_oper_mode = vif->bss_conf.ht_operation_mode;
+ bss_params->lln_non_gf_coexist =
+ !!(vif->bss_conf.ht_operation_mode &
+ IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
+ /* IEEE80211_HT_STBC_PARAM_DUAL_CTS_PROT */
+ bss_params->dual_cts_protection = 0;
+ /* IEEE80211_HT_OP_MODE_PROTECTION_20MHZ */
+ bss_params->ht20_coexist = 0;
+ }
+}
+
+static void wcn36xx_smd_set_sta_ht_params(struct ieee80211_sta *sta,
+ struct wcn36xx_hal_config_sta_params *sta_params)
+{
+ if (sta->ht_cap.ht_supported) {
+ unsigned long caps = sta->ht_cap.cap;
+ sta_params->ht_capable = sta->ht_cap.ht_supported;
+ sta_params->tx_channel_width_set =
+ test_bit(IEEE80211_HT_CAP_SUP_WIDTH_20_40, &caps);
+ sta_params->lsig_txop_protection =
+ test_bit(IEEE80211_HT_CAP_LSIG_TXOP_PROT, &caps);
+
+ sta_params->max_ampdu_size = sta->ht_cap.ampdu_factor;
+ sta_params->max_ampdu_density = sta->ht_cap.ampdu_density;
+ sta_params->max_amsdu_size =
+ test_bit(IEEE80211_HT_CAP_MAX_AMSDU, &caps);
+ sta_params->sgi_20Mhz =
+ test_bit(IEEE80211_HT_CAP_SGI_20, &caps);
+ sta_params->sgi_40mhz =
+ test_bit(IEEE80211_HT_CAP_SGI_40, &caps);
+ sta_params->green_field_capable =
+ test_bit(IEEE80211_HT_CAP_GRN_FLD, &caps);
+ sta_params->delayed_ba_support =
+ test_bit(IEEE80211_HT_CAP_DELAY_BA, &caps);
+ sta_params->dsss_cck_mode_40mhz =
+ test_bit(IEEE80211_HT_CAP_DSSSCCK40, &caps);
+ }
+}
+
+static void wcn36xx_smd_set_sta_params(struct wcn36xx *wcn,
+ struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta,
+ struct wcn36xx_hal_config_sta_params *sta_params)
+{
+ if (vif->type == NL80211_IFTYPE_ADHOC ||
+ vif->type == NL80211_IFTYPE_AP ||
+ vif->type == NL80211_IFTYPE_MESH_POINT) {
+ sta_params->type = 1;
+ sta_params->sta_index = 0xFF;
+ } else {
+ sta_params->type = 0;
+ sta_params->sta_index = 1;
+ }
+
+ sta_params->aid = wcn->aid;
+ sta_params->listen_interval = WCN36XX_LISTEN_INTERVAL(wcn);
+
+ /*
+ * In STA mode ieee80211_sta contains bssid and ieee80211_vif
+ * contains our mac address. In AP mode we are bssid so vif
+ * contains bssid and ieee80211_sta contains mac.
+ */
+ if (NL80211_IFTYPE_STATION == vif->type)
+ memcpy(&sta_params->mac, vif->addr, ETH_ALEN);
+ else
+ memcpy(&sta_params->bssid, vif->addr, ETH_ALEN);
+
+ sta_params->encrypt_type = wcn->encrypt_type;
+ sta_params->short_preamble_supported =
+ !(WCN36XX_FLAGS(wcn) &
+ IEEE80211_HW_2GHZ_SHORT_PREAMBLE_INCAPABLE);
+
+ sta_params->rifs_mode = 0;
+ sta_params->rmf = 0;
+ sta_params->action = 0;
+ sta_params->uapsd = 0;
+ sta_params->mimo_ps = WCN36XX_HAL_HT_MIMO_PS_STATIC;
+ sta_params->max_ampdu_duration = 0;
+ sta_params->bssid_index = wcn->current_vif->bss_index;
+ sta_params->p2p = 0;
+
+ memcpy(&sta_params->supported_rates, &wcn->supported_rates,
+ sizeof(wcn->supported_rates));
+
+ if (sta) {
+ if (NL80211_IFTYPE_STATION == vif->type)
+ memcpy(&sta_params->bssid, sta->addr, ETH_ALEN);
+ else
+ memcpy(&sta_params->mac, sta->addr, ETH_ALEN);
+ sta_params->wmm_enabled = sta->wme;
+ sta_params->max_sp_len = sta->max_sp;
+ wcn36xx_smd_set_sta_ht_params(sta, sta_params);
+ }
+}
+
+static int wcn36xx_smd_send_and_wait(struct wcn36xx *wcn, size_t len)
+{
+ int ret;
+ wcn36xx_dbg_dump(WCN36XX_DBG_SMD_DUMP, "SMD >>> ", wcn->smd_buf, len);
+
+ ret = wcn->ctrl_ops->tx(wcn->smd_buf, len);
+ mutex_unlock(&wcn->smd_mutex);
+ return ret;
+}
+
+#define INIT_HAL_MSG(msg_body, type) \
+ do { \
+ memset(&msg_body, 0, sizeof(msg_body)); \
+ msg_body.header.msg_type = type; \
+ msg_body.header.msg_version = WCN36XX_HAL_MSG_VERSION0; \
+ msg_body.header.len = sizeof(msg_body); \
+ } while (0) \
+
+#define PREPARE_HAL_BUF(send_buf, msg_body) \
+ do { \
+ struct wcn36xx *__wcn = \
+ container_of(&send_buf, \
+ struct wcn36xx, smd_buf); \
+ mutex_lock(&__wcn->smd_mutex); \
+ memset(send_buf, 0, msg_body.header.len); \
+ memcpy(send_buf, &msg_body, sizeof(msg_body)); \
+ } while (0) \
+
+static int wcn36xx_smd_rsp_status_check(void *buf, size_t len)
+{
+ struct wcn36xx_fw_msg_status_rsp *rsp;
+
+ if (len < sizeof(struct wcn36xx_hal_msg_header) +
+ sizeof(struct wcn36xx_fw_msg_status_rsp))
+ return -EIO;
+
+ rsp = (struct wcn36xx_fw_msg_status_rsp *)
+ (buf + sizeof(struct wcn36xx_hal_msg_header));
+
+ if (WCN36XX_FW_MSG_RESULT_SUCCESS != rsp->status)
+ return -EIO;
+
+ return 0;
+}
+
+int wcn36xx_smd_load_nv(struct wcn36xx *wcn)
+{
+ const struct firmware *nv;
+ struct nv_data *nv_d;
+ struct wcn36xx_hal_nv_img_download_req_msg msg_body;
+ int fw_bytes_left;
+ int ret;
+ u16 fm_offset = 0;
+
+ ret = request_firmware(&nv, WLAN_NV_FILE, wcn->dev);
+ if (ret) {
+ wcn36xx_err("Failed to load nv file %s: %d\n",
+ WLAN_NV_FILE, ret);
+ goto out_free_nv;
+ }
+
+ nv_d = (struct nv_data *)nv->data;
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_DOWNLOAD_NV_REQ);
+
+ msg_body.header.len += WCN36XX_NV_FRAGMENT_SIZE;
+
+ msg_body.frag_number = 0;
+
+ do {
+ fw_bytes_left = nv->size - fm_offset - 4;
+ if (fw_bytes_left > WCN36XX_NV_FRAGMENT_SIZE) {
+ msg_body.last_fragment = 0;
+ msg_body.nv_img_buffer_size = WCN36XX_NV_FRAGMENT_SIZE;
+ } else {
+ msg_body.last_fragment = 1;
+ msg_body.nv_img_buffer_size = fw_bytes_left;
+
+ /* Do not forget update general message len */
+ msg_body.header.len = sizeof(msg_body) + fw_bytes_left;
+
+ }
+ /* smd_buf must be protected with mutex */
+ mutex_lock(&wcn->smd_mutex);
+
+ /* Add load NV request message header */
+ memcpy(wcn->smd_buf, &msg_body, sizeof(msg_body));
+
+ /* Add NV body itself */
+ memcpy(wcn->smd_buf + sizeof(msg_body),
+ &nv_d->table + fm_offset,
+ msg_body.nv_img_buffer_size);
+
+ ret = wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+ if (ret)
+ return ret;
+
+ msg_body.frag_number++;
+ fm_offset += WCN36XX_NV_FRAGMENT_SIZE;
+
+ } while (msg_body.last_fragment != 1);
+
+out_free_nv:
+ release_firmware(nv);
+
+ return ret;
+}
+
+int wcn36xx_smd_start(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_mac_start_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_START_REQ);
+
+ msg_body.params.type = DRIVER_TYPE_PRODUCTION;
+ msg_body.params.len = 0;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL, "hal start type %d\n",
+ msg_body.params.type);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+static int wcn36xx_smd_start_rsp(struct wcn36xx *wcn, void *buf, size_t len)
+{
+ struct wcn36xx_hal_mac_start_rsp_msg *rsp;
+
+ if (len < sizeof(*rsp))
+ return -EIO;
+
+ rsp = (struct wcn36xx_hal_mac_start_rsp_msg *)buf;
+
+ if (WCN36XX_FW_MSG_RESULT_SUCCESS != rsp->start_rsp_params.status)
+ return -EIO;
+
+ memcpy(wcn->crm_version, rsp->start_rsp_params.crm_version,
+ WCN36XX_HAL_VERSION_LENGTH);
+ memcpy(wcn->wlan_version, rsp->start_rsp_params.wlan_version,
+ WCN36XX_HAL_VERSION_LENGTH);
+
+ /* null terminate the strings, just in case */
+ wcn->crm_version[WCN36XX_HAL_VERSION_LENGTH] = '\0';
+ wcn->wlan_version[WCN36XX_HAL_VERSION_LENGTH] = '\0';
+
+ wcn->fw_revision = rsp->start_rsp_params.version.revision;
+ wcn->fw_version = rsp->start_rsp_params.version.version;
+ wcn->fw_minor = rsp->start_rsp_params.version.minor;
+ wcn->fw_major = rsp->start_rsp_params.version.major;
+
+ wcn36xx_info("firmware WLAN version '%s' and CRM version '%s'\n",
+ wcn->wlan_version, wcn->crm_version);
+
+ wcn36xx_info("firmware API %u.%u.%u.%u, %u stations, %u bssids\n",
+ wcn->fw_major, wcn->fw_minor,
+ wcn->fw_version, wcn->fw_revision,
+ rsp->start_rsp_params.stations,
+ rsp->start_rsp_params.bssids);
+
+ return 0;
+}
+
+int wcn36xx_smd_stop(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_mac_stop_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_STOP_REQ);
+
+ msg_body.stop_req_params.reason = HAL_STOP_TYPE_RF_KILL;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_init_scan(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_init_scan_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_INIT_SCAN_REQ);
+
+ msg_body.mode = HAL_SYS_MODE_SCAN;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL, "hal init scan mode %d\n", msg_body.mode);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_start_scan(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_start_scan_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_START_SCAN_REQ);
+
+ msg_body.scan_channel = WCN36XX_HW_CHANNEL(wcn);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL, "hal start scan channel %d\n",
+ msg_body.scan_channel);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_end_scan(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_end_scan_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_END_SCAN_REQ);
+
+ msg_body.scan_channel = WCN36XX_HW_CHANNEL(wcn);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL, "hal end scan channel %d\n",
+ msg_body.scan_channel);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_finish_scan(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_finish_scan_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_FINISH_SCAN_REQ);
+
+ msg_body.mode = HAL_SYS_MODE_SCAN;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL, "hal finish scan mode %d\n",
+ msg_body.mode);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_switch_channel(struct wcn36xx *wcn, int ch)
+{
+ struct wcn36xx_hal_switch_channel_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_CH_SWITCH_REQ);
+
+ msg_body.channel_number = (u8)ch;
+ msg_body.tx_mgmt_power = 0xbf;
+ msg_body.max_tx_power = 0xbf;
+ memcpy(msg_body.self_sta_mac_addr, wcn->addresses.addr, ETH_ALEN);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+static void wcn36xx_smd_switch_channel_rsp(void *buf, size_t len)
+{
+ struct wcn36xx_hal_switch_channel_rsp_msg *rsp;
+ rsp = (struct wcn36xx_hal_switch_channel_rsp_msg *)buf;
+ wcn36xx_dbg(WCN36XX_DBG_HAL, "channel switched to: %d, status: %d\n",
+ rsp->channel_number, rsp->status);
+}
+
+int wcn36xx_smd_update_scan_params(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_update_scan_params_req msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_UPDATE_SCAN_PARAM_REQ);
+
+ msg_body.dot11d_enabled = 0;
+ msg_body.dot11d_resolved = 0;
+ msg_body.channel_count = 26;
+ msg_body.active_min_ch_time = 60;
+ msg_body.active_max_ch_time = 120;
+ msg_body.passive_min_ch_time = 60;
+ msg_body.passive_max_ch_time = 110;
+ msg_body.state = 0;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal update scan params channel_count %d\n",
+ msg_body.channel_count);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+static int wcn36xx_smd_update_scan_params_rsp(void *buf, size_t len)
+{
+ struct wcn36xx_hal_update_scan_params_resp *rsp;
+
+ rsp = (struct wcn36xx_hal_update_scan_params_resp *)buf;
+
+ /* Remove the PNO version bit */
+ rsp->status &= (~(WCN36XX_FW_MSG_PNO_VERSION_MASK));
+
+ if (WCN36XX_FW_MSG_RESULT_SUCCESS != rsp->status) {
+ wcn36xx_warn("error response from update scan\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int wcn36xx_smd_add_sta_self(struct wcn36xx *wcn, u8 *addr)
+{
+ struct wcn36xx_hal_add_sta_self_req msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_ADD_STA_SELF_REQ);
+
+ memcpy(&msg_body.self_addr, addr, ETH_ALEN);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal add sta self self_addr %pM status %d\n",
+ msg_body.self_addr, msg_body.status);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+static int wcn36xx_smd_add_sta_self_rsp(struct wcn36xx *wcn,
+ void *buf,
+ size_t len)
+{
+ struct wcn36xx_hal_add_sta_self_rsp_msg *rsp;
+
+ if (len < sizeof(*rsp))
+ return -EINVAL;
+
+ rsp = (struct wcn36xx_hal_add_sta_self_rsp_msg *)buf;
+
+ if (rsp->status != WCN36XX_FW_MSG_RESULT_SUCCESS) {
+ wcn36xx_warn("hal add sta self failure: %d\n",
+ rsp->status);
+ return -EIO;
+ }
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal add sta self status %d self_sta_index %d dpu_index %d\n",
+ rsp->status, rsp->self_sta_index, rsp->dpu_index);
+
+ wcn->current_vif->self_sta_index = rsp->self_sta_index;
+ wcn->current_vif->self_dpu_desc_index = rsp->dpu_index;
+
+ return 0;
+}
+
+int wcn36xx_smd_delete_sta_self(struct wcn36xx *wcn, u8 *addr)
+{
+ struct wcn36xx_hal_del_sta_self_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_DEL_STA_SELF_REQ);
+
+ memcpy(&msg_body.self_addr, addr, ETH_ALEN);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_delete_sta(struct wcn36xx *wcn, u8 sta_index)
+{
+ struct wcn36xx_hal_delete_sta_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_DELETE_STA_REQ);
+
+ msg_body.sta_index = sta_index;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal delete sta sta_index %d\n",
+ msg_body.sta_index);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+
+}
+
+int wcn36xx_smd_join(struct wcn36xx *wcn, const u8 *bssid, u8 *vif, u8 ch)
+{
+ struct wcn36xx_hal_join_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_JOIN_REQ);
+
+ memcpy(&msg_body.bssid, bssid, ETH_ALEN);
+ memcpy(&msg_body.self_sta_mac_addr, vif, ETH_ALEN);
+ msg_body.channel = ch;
+
+ if (conf_is_ht40_minus(&wcn->hw->conf))
+ msg_body.secondary_channel_offset =
+ PHY_DOUBLE_CHANNEL_HIGH_PRIMARY;
+ else if (conf_is_ht40_plus(&wcn->hw->conf))
+ msg_body.secondary_channel_offset =
+ PHY_DOUBLE_CHANNEL_LOW_PRIMARY;
+ else
+ msg_body.secondary_channel_offset =
+ PHY_SINGLE_CHANNEL_CENTERED;
+
+ msg_body.link_state = WCN36XX_HAL_LINK_PREASSOC_STATE;
+
+ msg_body.max_tx_power = 0xbf;
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal join req bssid %pM self_sta_mac_addr %pM channel %d link_state %d\n",
+ msg_body.bssid, msg_body.self_sta_mac_addr,
+ msg_body.channel, msg_body.link_state);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_set_link_st(struct wcn36xx *wcn, const u8 *bssid,
+ const u8 *sta_mac,
+ enum wcn36xx_hal_link_state state)
+{
+ struct wcn36xx_hal_set_link_state_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_SET_LINK_ST_REQ);
+
+ memcpy(&msg_body.bssid, bssid, ETH_ALEN);
+ memcpy(&msg_body.self_mac_addr, sta_mac, ETH_ALEN);
+ msg_body.state = state;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal set link state bssid %pM self_mac_addr %pM state %d\n",
+ msg_body.bssid, msg_body.self_mac_addr, msg_body.state);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+static void wcn36xx_smd_convert_sta_to_v1(struct wcn36xx *wcn,
+ const struct wcn36xx_hal_config_sta_params *orig,
+ struct wcn36xx_hal_config_sta_params_v1 *v1)
+{
+ /* convert orig to v1 format */
+ memcpy(&v1->bssid, orig->bssid, ETH_ALEN);
+ memcpy(&v1->mac, orig->mac, ETH_ALEN);
+ v1->aid = orig->aid;
+ v1->type = orig->type;
+ v1->listen_interval = orig->listen_interval;
+ v1->ht_capable = orig->ht_capable;
+
+ v1->max_ampdu_size = orig->max_ampdu_size;
+ v1->max_ampdu_density = orig->max_ampdu_density;
+ v1->sgi_40mhz = orig->sgi_40mhz;
+ v1->sgi_20Mhz = orig->sgi_20Mhz;
+
+ memcpy(&v1->supported_rates, &orig->supported_rates,
+ sizeof(orig->supported_rates));
+ v1->sta_index = orig->sta_index;
+}
+
+static int wcn36xx_smd_config_sta_v1(struct wcn36xx *wcn,
+ const struct wcn36xx_hal_config_sta_req_msg *orig)
+{
+ struct wcn36xx_hal_config_sta_req_msg_v1 msg_body;
+ struct wcn36xx_hal_config_sta_params_v1 *sta = &msg_body.sta_params;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_CONFIG_STA_REQ);
+
+ wcn36xx_smd_convert_sta_to_v1(wcn, &orig->sta_params,
+ &msg_body.sta_params);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal config sta v1 action %d sta_index %d bssid_index %d bssid %pM type %d mac %pM aid %d\n",
+ sta->action, sta->sta_index, sta->bssid_index,
+ sta->bssid, sta->type, sta->mac, sta->aid);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_config_sta(struct wcn36xx *wcn, struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta)
+{
+ struct wcn36xx_hal_config_sta_req_msg msg;
+ struct wcn36xx_hal_config_sta_params *sta_params;
+
+ INIT_HAL_MSG(msg, WCN36XX_HAL_CONFIG_STA_REQ);
+
+ sta_params = &msg.sta_params;
+
+ wcn36xx_smd_set_sta_params(wcn, vif, sta, sta_params);
+
+ if (!wcn36xx_is_fw_version(wcn, 1, 2, 2, 24))
+ return wcn36xx_smd_config_sta_v1(wcn, &msg);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal config sta action %d sta_index %d bssid_index %d bssid %pM type %d mac %pM aid %d\n",
+ sta_params->action, sta_params->sta_index,
+ sta_params->bssid_index, sta_params->bssid,
+ sta_params->type, sta_params->mac, sta_params->aid);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg.header.len);
+}
+
+static int wcn36xx_smd_config_sta_rsp(struct wcn36xx *wcn, void *buf,
+ size_t len)
+{
+ struct wcn36xx_hal_config_sta_rsp_msg *rsp;
+ struct config_sta_rsp_params *params;
+
+ if (len < sizeof(*rsp))
+ return -EINVAL;
+
+ rsp = (struct wcn36xx_hal_config_sta_rsp_msg *)buf;
+ params = &rsp->params;
+
+ if (params->status != WCN36XX_FW_MSG_RESULT_SUCCESS) {
+ wcn36xx_warn("hal config sta response failure: %d\n",
+ params->status);
+ return -EIO;
+ }
+
+ if (wcn->sta) {
+ wcn->sta->sta_index = params->sta_index;
+ wcn->sta->dpu_desc_index = params->dpu_index;
+ wcn->sta = NULL;
+ }
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal config sta rsp status %d sta_index %d bssid_index %d p2p %d\n",
+ params->status, params->sta_index, params->bssid_index,
+ params->p2p);
+
+ return 0;
+}
+
+static int wcn36xx_smd_join_rsp(void *buf, size_t len)
+{
+ struct wcn36xx_hal_join_rsp_msg *rsp;
+
+ if (wcn36xx_smd_rsp_status_check(buf, len))
+ return -EIO;
+
+ rsp = (struct wcn36xx_hal_join_rsp_msg *)buf;
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal rsp join status %d tx_mgmt_power %d\n",
+ rsp->status, rsp->tx_mgmt_power);
+
+ return 0;
+}
+
+static int wcn36xx_smd_config_bss_v1(struct wcn36xx *wcn,
+ const struct wcn36xx_hal_config_bss_req_msg *orig)
+{
+ struct wcn36xx_hal_config_bss_req_msg_v1 msg_body;
+ struct wcn36xx_hal_config_bss_params_v1 *bss = &msg_body.bss_params;
+ struct wcn36xx_hal_config_sta_params_v1 *sta = &bss->sta;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_CONFIG_BSS_REQ);
+
+ /* convert orig to v1 */
+ memcpy(&msg_body.bss_params.bssid,
+ &orig->bss_params.bssid, ETH_ALEN);
+ memcpy(&msg_body.bss_params.self_mac_addr,
+ &orig->bss_params.self_mac_addr, ETH_ALEN);
+
+ msg_body.bss_params.bss_type = orig->bss_params.bss_type;
+ msg_body.bss_params.oper_mode = orig->bss_params.oper_mode;
+ msg_body.bss_params.nw_type = orig->bss_params.nw_type;
+
+ msg_body.bss_params.short_slot_time_supported =
+ orig->bss_params.short_slot_time_supported;
+ msg_body.bss_params.lla_coexist = orig->bss_params.lla_coexist;
+ msg_body.bss_params.llb_coexist = orig->bss_params.llb_coexist;
+ msg_body.bss_params.llg_coexist = orig->bss_params.llg_coexist;
+ msg_body.bss_params.ht20_coexist = orig->bss_params.ht20_coexist;
+ msg_body.bss_params.lln_non_gf_coexist =
+ orig->bss_params.lln_non_gf_coexist;
+
+ msg_body.bss_params.lsig_tx_op_protection_full_support =
+ orig->bss_params.lsig_tx_op_protection_full_support;
+ msg_body.bss_params.rifs_mode = orig->bss_params.rifs_mode;
+ msg_body.bss_params.beacon_interval = orig->bss_params.beacon_interval;
+ msg_body.bss_params.dtim_period = orig->bss_params.dtim_period;
+ msg_body.bss_params.tx_channel_width_set =
+ orig->bss_params.tx_channel_width_set;
+ msg_body.bss_params.oper_channel = orig->bss_params.oper_channel;
+ msg_body.bss_params.ext_channel = orig->bss_params.ext_channel;
+
+ msg_body.bss_params.reserved = orig->bss_params.reserved;
+
+ memcpy(&msg_body.bss_params.ssid,
+ &orig->bss_params.ssid,
+ sizeof(orig->bss_params.ssid));
+
+ msg_body.bss_params.action = orig->bss_params.action;
+ msg_body.bss_params.rateset = orig->bss_params.rateset;
+ msg_body.bss_params.ht = orig->bss_params.ht;
+ msg_body.bss_params.obss_prot_enabled =
+ orig->bss_params.obss_prot_enabled;
+ msg_body.bss_params.rmf = orig->bss_params.rmf;
+ msg_body.bss_params.ht_oper_mode = orig->bss_params.ht_oper_mode;
+ msg_body.bss_params.dual_cts_protection =
+ orig->bss_params.dual_cts_protection;
+
+ msg_body.bss_params.max_probe_resp_retry_limit =
+ orig->bss_params.max_probe_resp_retry_limit;
+ msg_body.bss_params.hidden_ssid = orig->bss_params.hidden_ssid;
+ msg_body.bss_params.proxy_probe_resp =
+ orig->bss_params.proxy_probe_resp;
+ msg_body.bss_params.edca_params_valid =
+ orig->bss_params.edca_params_valid;
+
+ memcpy(&msg_body.bss_params.acbe,
+ &orig->bss_params.acbe,
+ sizeof(orig->bss_params.acbe));
+ memcpy(&msg_body.bss_params.acbk,
+ &orig->bss_params.acbk,
+ sizeof(orig->bss_params.acbk));
+ memcpy(&msg_body.bss_params.acvi,
+ &orig->bss_params.acvi,
+ sizeof(orig->bss_params.acvi));
+ memcpy(&msg_body.bss_params.acvo,
+ &orig->bss_params.acvo,
+ sizeof(orig->bss_params.acvo));
+
+ msg_body.bss_params.ext_set_sta_key_param_valid =
+ orig->bss_params.ext_set_sta_key_param_valid;
+
+ memcpy(&msg_body.bss_params.ext_set_sta_key_param,
+ &orig->bss_params.ext_set_sta_key_param,
+ sizeof(orig->bss_params.acvo));
+
+ msg_body.bss_params.wcn36xx_hal_persona =
+ orig->bss_params.wcn36xx_hal_persona;
+ msg_body.bss_params.spectrum_mgt_enable =
+ orig->bss_params.spectrum_mgt_enable;
+ msg_body.bss_params.tx_mgmt_power = orig->bss_params.tx_mgmt_power;
+ msg_body.bss_params.max_tx_power = orig->bss_params.max_tx_power;
+
+ wcn36xx_smd_convert_sta_to_v1(wcn, &orig->bss_params.sta,
+ &msg_body.bss_params.sta);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal config bss v1 bssid %pM self_mac_addr %pM bss_type %d oper_mode %d nw_type %d\n",
+ bss->bssid, bss->self_mac_addr, bss->bss_type,
+ bss->oper_mode, bss->nw_type);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "- sta bssid %pM action %d sta_index %d bssid_index %d aid %d type %d mac %pM\n",
+ sta->bssid, sta->action, sta->sta_index,
+ sta->bssid_index, sta->aid, sta->type, sta->mac);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_config_bss(struct wcn36xx *wcn, struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta, const u8 *bssid,
+ bool update)
+{
+ struct wcn36xx_hal_config_bss_req_msg msg;
+ struct wcn36xx_hal_config_bss_params *bss;
+ struct wcn36xx_hal_config_sta_params *sta_params;
+
+ INIT_HAL_MSG(msg, WCN36XX_HAL_CONFIG_BSS_REQ);
+
+ bss = &msg.bss_params;
+ sta_params = &bss->sta;
+
+ WARN_ON(is_zero_ether_addr(bssid));
+
+ memcpy(&bss->bssid, bssid, ETH_ALEN);
+
+ memcpy(&bss->self_mac_addr, &wcn->addresses, ETH_ALEN);
+
+ if (vif->type == NL80211_IFTYPE_STATION) {
+ bss->bss_type = WCN36XX_HAL_INFRASTRUCTURE_MODE;
+
+ /* STA */
+ bss->oper_mode = 1;
+ bss->wcn36xx_hal_persona = WCN36XX_HAL_STA_MODE;
+ } else if (vif->type == NL80211_IFTYPE_AP) {
+ bss->bss_type = WCN36XX_HAL_INFRA_AP_MODE;
+
+ /* AP */
+ bss->oper_mode = 0;
+ bss->wcn36xx_hal_persona = WCN36XX_HAL_STA_SAP_MODE;
+ } else if (vif->type == NL80211_IFTYPE_ADHOC ||
+ vif->type == NL80211_IFTYPE_MESH_POINT) {
+ bss->bss_type = WCN36XX_HAL_IBSS_MODE;
+
+ /* STA */
+ bss->oper_mode = 1;
+ } else {
+ wcn36xx_warn("Unknown type for bss config: %d\n", vif->type);
+ }
+
+ if (vif->type == NL80211_IFTYPE_STATION)
+ wcn36xx_smd_set_bss_nw_type(wcn, sta, bss);
+ else
+ bss->nw_type = WCN36XX_HAL_11N_NW_TYPE;
+
+ bss->short_slot_time_supported = vif->bss_conf.use_short_slot;
+ bss->lla_coexist = 0;
+ bss->llb_coexist = 0;
+ bss->llg_coexist = 0;
+ bss->rifs_mode = 0;
+ bss->beacon_interval = vif->bss_conf.beacon_int;
+ bss->dtim_period = wcn->dtim_period;
+
+ wcn36xx_smd_set_bss_ht_params(vif, sta, bss);
+
+ bss->oper_channel = WCN36XX_HW_CHANNEL(wcn);
+
+ if (conf_is_ht40_minus(&wcn->hw->conf))
+ bss->ext_channel = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
+ else if (conf_is_ht40_plus(&wcn->hw->conf))
+ bss->ext_channel = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
+ else
+ bss->ext_channel = IEEE80211_HT_PARAM_CHA_SEC_NONE;
+
+ bss->reserved = 0;
+ wcn36xx_smd_set_sta_params(wcn, vif, sta, sta_params);
+
+ /* wcn->ssid is only valid in AP and IBSS mode */
+ bss->ssid.length = wcn->ssid.length;
+ memcpy(bss->ssid.ssid, wcn->ssid.ssid, wcn->ssid.length);
+
+ bss->obss_prot_enabled = 0;
+ bss->rmf = 0;
+ bss->max_probe_resp_retry_limit = 0;
+ bss->hidden_ssid = vif->bss_conf.hidden_ssid;
+ bss->proxy_probe_resp = 0;
+ bss->edca_params_valid = 0;
+
+ /* FIXME: set acbe, acbk, acvi and acvo */
+
+ bss->ext_set_sta_key_param_valid = 0;
+
+ /* FIXME: set ext_set_sta_key_param */
+
+ bss->spectrum_mgt_enable = 0;
+ bss->tx_mgmt_power = 0;
+ bss->max_tx_power = WCN36XX_MAX_POWER(wcn);
+
+ bss->action = update;
+
+ if (!wcn36xx_is_fw_version(wcn, 1, 2, 2, 24))
+ return wcn36xx_smd_config_bss_v1(wcn, &msg);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal config bss bssid %pM self_mac_addr %pM bss_type %d oper_mode %d nw_type %d\n",
+ bss->bssid, bss->self_mac_addr, bss->bss_type,
+ bss->oper_mode, bss->nw_type);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "- sta bssid %pM action %d sta_index %d bssid_index %d aid %d type %d mac %pM\n",
+ sta_params->bssid, sta_params->action,
+ sta_params->sta_index, sta_params->bssid_index,
+ sta_params->aid, sta_params->type,
+ sta_params->mac);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg.header.len);
+}
+
+static int wcn36xx_smd_config_bss_rsp(struct wcn36xx *wcn,
+ void *buf,
+ size_t len)
+{
+ struct wcn36xx_hal_config_bss_rsp_msg *rsp;
+ struct wcn36xx_hal_config_bss_rsp_params *params;
+
+ if (len < sizeof(*rsp))
+ return -EINVAL;
+
+ rsp = (struct wcn36xx_hal_config_bss_rsp_msg *)buf;
+ params = &rsp->bss_rsp_params;
+
+ if (params->status != WCN36XX_FW_MSG_RESULT_SUCCESS) {
+ wcn36xx_warn("hal config bss response failure: %d\n",
+ params->status);
+ return -EIO;
+ }
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal config bss rsp status %d bss_idx %d dpu_desc_index %d"
+ " sta_idx %d self_idx %d bcast_idx %d mac %pM"
+ " power %d ucast_dpu_signature %d\n",
+ params->status, params->bss_index, params->dpu_desc_index,
+ params->bss_sta_index, params->bss_self_sta_index,
+ params->bss_bcast_sta_idx, params->mac,
+ params->tx_mgmt_power, params->ucast_dpu_signature);
+
+ wcn->current_vif->bss_index = params->bss_index;
+
+ if (wcn->sta) {
+ wcn->sta->bss_sta_index = params->bss_sta_index;
+ wcn->sta->bss_dpu_desc_index = params->dpu_desc_index;
+ }
+
+ wcn->current_vif->ucast_dpu_signature = params->ucast_dpu_signature;
+
+ return 0;
+}
+
+int wcn36xx_smd_delete_bss(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_delete_bss_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_DELETE_BSS_REQ);
+
+ msg_body.bss_index = wcn->current_vif->bss_index;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL, "hal delete bss %d\n", msg_body.bss_index);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_send_beacon(struct wcn36xx *wcn, struct sk_buff *skb_beacon,
+ u16 tim_off, u16 p2p_off)
+{
+ struct wcn36xx_hal_send_beacon_req_msg msg_body;
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_SEND_BEACON_REQ);
+
+ /* TODO need to find out why this is needed? */
+ msg_body.beacon_length = skb_beacon->len + 6;
+
+ if (BEACON_TEMPLATE_SIZE > msg_body.beacon_length) {
+ memcpy(&msg_body.beacon, &skb_beacon->len, sizeof(u32));
+ memcpy(&(msg_body.beacon[4]), skb_beacon->data,
+ skb_beacon->len);
+ } else {
+ wcn36xx_err("Beacon is to big: beacon size=%d\n",
+ msg_body.beacon_length);
+ return -ENOMEM;
+ }
+ memcpy(&msg_body.bssid, &wcn->addresses, ETH_ALEN);
+
+ /* TODO need to find out why this is needed? */
+ msg_body.tim_ie_offset = tim_off+4;
+ msg_body.p2p_ie_offset = p2p_off;
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal send beacon beacon_length %d\n",
+ msg_body.beacon_length);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_update_proberesp_tmpl(struct wcn36xx *wcn, struct sk_buff *skb)
+{
+ struct wcn36xx_hal_send_probe_resp_req_msg msg;
+
+ INIT_HAL_MSG(msg, WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_REQ);
+
+ if (skb->len > BEACON_TEMPLATE_SIZE) {
+ wcn36xx_warn("probe response template is too big: %d\n",
+ skb->len);
+ return -E2BIG;
+ }
+
+ msg.probe_resp_template_len = skb->len;
+ memcpy(&msg.probe_resp_template, skb->data, skb->len);
+
+ memcpy(&msg.bssid, &wcn->addresses, ETH_ALEN);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg);
+
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "hal update probe rsp len %d bssid %pM\n",
+ msg.probe_resp_template_len, msg.bssid);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg.header.len);
+}
+
+int wcn36xx_smd_set_stakey(struct wcn36xx *wcn,
+ enum ani_ed_type enc_type,
+ u8 keyidx,
+ u8 keylen,
+ u8 *key,
+ u8 sta_index)
+{
+ struct wcn36xx_hal_set_sta_key_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_SET_STAKEY_REQ);
+
+ msg_body.set_sta_key_params.sta_index = sta_index;
+ msg_body.set_sta_key_params.enc_type = enc_type;
+
+ msg_body.set_sta_key_params.key[0].id = keyidx;
+ msg_body.set_sta_key_params.key[0].unicast = 1;
+ msg_body.set_sta_key_params.key[0].direction = WCN36XX_HAL_TX_RX;
+ msg_body.set_sta_key_params.key[0].pae_role = 0;
+ msg_body.set_sta_key_params.key[0].length = keylen;
+ memcpy(msg_body.set_sta_key_params.key[0].key, key, keylen);
+ msg_body.set_sta_key_params.single_tid_rc = 1;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_set_bsskey(struct wcn36xx *wcn,
+ enum ani_ed_type enc_type,
+ u8 keyidx,
+ u8 keylen,
+ u8 *key)
+{
+ struct wcn36xx_hal_set_bss_key_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_SET_BSSKEY_REQ);
+ msg_body.bss_idx = 0;
+ msg_body.enc_type = enc_type;
+ msg_body.num_keys = 1;
+ msg_body.keys[0].id = keyidx;
+ msg_body.keys[0].unicast = 0;
+ msg_body.keys[0].direction = WCN36XX_HAL_RX_ONLY;
+ msg_body.keys[0].pae_role = 0;
+ msg_body.keys[0].length = keylen;
+ memcpy(msg_body.keys[0].key, key, keylen);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_remove_stakey(struct wcn36xx *wcn,
+ enum ani_ed_type enc_type,
+ u8 keyidx,
+ u8 sta_index)
+{
+ struct wcn36xx_hal_remove_sta_key_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_RMV_STAKEY_REQ);
+
+ msg_body.sta_idx = sta_index;
+ msg_body.enc_type = enc_type;
+ msg_body.key_id = keyidx;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_remove_bsskey(struct wcn36xx *wcn,
+ enum ani_ed_type enc_type,
+ u8 keyidx)
+{
+ struct wcn36xx_hal_remove_bss_key_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_RMV_BSSKEY_REQ);
+ msg_body.bss_idx = 0;
+ msg_body.enc_type = enc_type;
+ msg_body.key_id = keyidx;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_enter_bmps(struct wcn36xx *wcn, u64 tbtt)
+{
+ struct wcn36xx_hal_enter_bmps_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_ENTER_BMPS_REQ);
+
+ msg_body.bss_index = wcn->current_vif->bss_index;
+ msg_body.tbtt = tbtt;
+ msg_body.dtim_period = wcn->dtim_period;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_exit_bmps(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_enter_bmps_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_EXIT_BMPS_REQ);
+
+ msg_body.bss_index = wcn->current_vif->bss_index;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+/* Notice: This function should be called after associated, or else it
+ * will be invalid
+ */
+int wcn36xx_smd_keep_alive_req(struct wcn36xx *wcn, int packet_type)
+{
+ struct wcn36xx_hal_keep_alive_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_KEEP_ALIVE_REQ);
+
+ if (packet_type == WCN36XX_HAL_KEEP_ALIVE_NULL_PKT) {
+ msg_body.bss_index = wcn->current_vif->bss_index;
+ msg_body.packet_type = WCN36XX_HAL_KEEP_ALIVE_NULL_PKT;
+ msg_body.time_period = WCN36XX_KEEP_ALIVE_TIME_PERIOD;
+ } else if (packet_type == WCN36XX_HAL_KEEP_ALIVE_UNSOLICIT_ARP_RSP) {
+ /* TODO: it also support ARP response type */
+ } else {
+ wcn36xx_warn("unknow keep alive packet type %d\n", packet_type);
+ return -EINVAL;
+ }
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_dump_cmd_req(struct wcn36xx *wcn, u32 arg1, u32 arg2,
+ u32 arg3, u32 arg4, u32 arg5)
+{
+ struct wcn36xx_hal_dump_cmd_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_DUMP_COMMAND_REQ);
+
+ msg_body.arg1 = arg1;
+ msg_body.arg2 = arg2;
+ msg_body.arg3 = arg3;
+ msg_body.arg4 = arg4;
+ msg_body.arg5 = arg5;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+static inline void set_feat_caps(u32 *bitmap,
+ enum place_holder_in_cap_bitmap cap)
+{
+ int arr_idx, bit_idx;
+
+ if (cap < 0 || cap > 127) {
+ wcn36xx_warn("error cap idx %d\n", cap);
+ return;
+ }
+
+ arr_idx = cap / 32;
+ bit_idx = cap % 32;
+ bitmap[arr_idx] |= (1 << bit_idx);
+}
+
+static inline int get_feat_caps(u32 *bitmap,
+ enum place_holder_in_cap_bitmap cap)
+{
+ int arr_idx, bit_idx;
+ int ret = 0;
+
+ if (cap < 0 || cap > 127) {
+ wcn36xx_warn("error cap idx %d\n", cap);
+ return -EINVAL;
+ }
+
+ arr_idx = cap / 32;
+ bit_idx = cap % 32;
+ ret = (bitmap[arr_idx] & (1 << bit_idx)) ? 1 : 0;
+ return ret;
+}
+
+static inline void clear_feat_caps(u32 *bitmap,
+ enum place_holder_in_cap_bitmap cap)
+{
+ int arr_idx, bit_idx;
+
+ if (cap < 0 || cap > 127) {
+ wcn36xx_warn("error cap idx %d\n", cap);
+ return;
+ }
+
+ arr_idx = cap / 32;
+ bit_idx = cap % 32;
+ bitmap[arr_idx] &= ~(1 << bit_idx);
+}
+
+int wcn36xx_smd_feature_caps_exchange(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_feat_caps_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_REQ);
+
+ set_feat_caps(msg_body.feat_caps, STA_POWERSAVE);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+/* FW sends its capability bitmap as a response */
+int wcn36xx_smd_feature_caps_exchange_rsp(void *buf, size_t len)
+{
+ /* TODO: print the caps of rsp for comapre */
+ if (wcn36xx_smd_rsp_status_check(buf, len)) {
+ wcn36xx_warn("error response for caps exchange\n");
+ return -EIO;
+ }
+
+ return 0;
+}
+
+int wcn36xx_smd_add_ba_session(struct wcn36xx *wcn,
+ struct ieee80211_sta *sta,
+ u16 tid,
+ u16 *ssn,
+ u8 direction,
+ u8 sta_index)
+{
+ struct wcn36xx_hal_add_ba_session_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_ADD_BA_SESSION_REQ);
+
+ msg_body.sta_index = sta_index;
+ memcpy(&msg_body.mac_addr, sta->addr, ETH_ALEN);
+ msg_body.dialog_token = 0x10;
+ msg_body.tid = tid;
+
+ /* Immediate BA because Delayed BA is not supported */
+ msg_body.policy = 1;
+ msg_body.buffer_size = WCN36XX_AGGR_BUFFER_SIZE;
+ msg_body.timeout = 0;
+ if (ssn)
+ msg_body.ssn = *ssn;
+ msg_body.direction = direction;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_add_ba(struct wcn36xx *wcn)
+{
+ struct wcn36xx_hal_add_ba_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_ADD_BA_REQ);
+
+ msg_body.session_id = 0;
+ msg_body.win_size = WCN36XX_AGGR_BUFFER_SIZE;
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_del_ba(struct wcn36xx *wcn, u16 tid, u8 sta_index)
+{
+ struct wcn36xx_hal_del_ba_req_msg msg_body;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_DEL_BA_REQ);
+
+ msg_body.sta_index = sta_index;
+ msg_body.tid = tid;
+ msg_body.direction = 0;
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+int wcn36xx_smd_trigger_ba(struct wcn36xx *wcn, u8 sta_index)
+{
+ struct wcn36xx_hal_trigger_ba_req_msg msg_body;
+ struct wcn36xx_hal_trigget_ba_req_candidate *candidate;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_TRIGGER_BA_REQ);
+
+ msg_body.session_id = 0;
+ msg_body.candidate_cnt = 1;
+ msg_body.header.len += sizeof(*candidate);
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ candidate = (struct wcn36xx_hal_trigget_ba_req_candidate *)
+ (wcn->smd_buf + sizeof(msg_body));
+ candidate->sta_index = sta_index;
+ candidate->tid_bitmap = 1;
+
+ return wcn36xx_smd_send_and_wait(wcn, msg_body.header.len);
+}
+
+static int wcn36xx_smd_tx_compl_ind(struct wcn36xx *wcn, void *buf, size_t len)
+{
+ struct wcn36xx_hal_tx_compl_ind_msg *rsp = buf;
+
+ if (len != sizeof(*rsp)) {
+ wcn36xx_warn("Bad TX complete indication\n");
+ return -EIO;
+ }
+
+ wcn36xx_dxe_tx_ack_ind(wcn, rsp->status);
+
+ return 0;
+}
+
+static int wcn36xx_smd_missed_beacon_ind(struct wcn36xx *wcn,
+ void *buf,
+ size_t len)
+{
+ struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
+ struct ieee80211_vif,
+ drv_priv);
+
+ mutex_lock(&wcn->pm_mutex);
+
+ /*
+ * In suspended state mac80211 is still sleeping and that means we
+ * cannot notify it about connection lost. Wait until resume and
+ * then notify mac80211 about it.
+ */
+ if (wcn->is_suspended) {
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "postpone connection lost notification\n");
+ wcn->is_con_lost_pending = true;
+ } else {
+ wcn36xx_dbg(WCN36XX_DBG_HAL, "beacon missed\n");
+ ieee80211_connection_loss(vif);
+ }
+
+ mutex_unlock(&wcn->pm_mutex);
+
+ return 0;
+}
+
+static int wcn36xx_smd_delete_sta_context_ind(struct wcn36xx *wcn,
+ void *buf,
+ size_t len)
+{
+ struct wcn36xx_hal_delete_sta_context_ind_msg *rsp = buf;
+ struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
+ struct ieee80211_vif,
+ drv_priv);
+ struct ieee80211_sta *sta;
+
+ if (len != sizeof(*rsp)) {
+ wcn36xx_warn("Bad delete sta indication\n");
+ return -EIO;
+ }
+
+
+ rcu_read_lock();
+
+ sta = ieee80211_find_sta(vif, rsp->addr2);
+ if (sta) {
+ wcn36xx_dbg(WCN36XX_DBG_HAL,
+ "delete station indication %pM\n", rsp->addr2);
+ ieee80211_report_low_ack(sta, 0);
+ }
+
+ rcu_read_unlock();
+
+ return 0;
+}
+
+int wcn36xx_smd_update_cfg(struct wcn36xx *wcn, u32 cfg_id, u32 value)
+{
+ struct wcn36xx_hal_update_cfg_req_msg msg_body, *body;
+ size_t len;
+
+ INIT_HAL_MSG(msg_body, WCN36XX_HAL_UPDATE_CFG_REQ);
+
+ PREPARE_HAL_BUF(wcn->smd_buf, msg_body);
+
+ body = (struct wcn36xx_hal_update_cfg_req_msg *) wcn->smd_buf;
+ len = msg_body.header.len;
+
+ put_cfg_tlv_u32(wcn, &len, cfg_id, value);
+ body->header.len = len;
+ body->len = len - sizeof(*body);
+
+ return wcn36xx_smd_send_and_wait(wcn, len);
+}
+static void wcn36xx_smd_rsp_process(struct wcn36xx *wcn, void *buf, size_t len)
+{
+ struct wcn36xx_hal_msg_header *msg_header = buf;
+
+ wcn36xx_dbg_dump(WCN36XX_DBG_SMD_DUMP, "SMD <<< ", buf, len);
+
+ switch (msg_header->msg_type) {
+ case WCN36XX_HAL_START_RSP:
+ wcn36xx_smd_start_rsp(wcn, buf, len);
+ break;
+ case WCN36XX_HAL_CONFIG_STA_RSP:
+ wcn36xx_smd_config_sta_rsp(wcn, buf, len);
+ break;
+ case WCN36XX_HAL_CONFIG_BSS_RSP:
+ wcn36xx_smd_config_bss_rsp(wcn, buf, len);
+ break;
+ case WCN36XX_HAL_ADD_STA_SELF_RSP:
+ wcn36xx_smd_add_sta_self_rsp(wcn, buf, len);
+ break;
+ case WCN36XX_HAL_STOP_RSP:
+ case WCN36XX_HAL_DEL_STA_SELF_RSP:
+ case WCN36XX_HAL_DELETE_STA_RSP:
+ case WCN36XX_HAL_INIT_SCAN_RSP:
+ case WCN36XX_HAL_START_SCAN_RSP:
+ case WCN36XX_HAL_END_SCAN_RSP:
+ case WCN36XX_HAL_FINISH_SCAN_RSP:
+ case WCN36XX_HAL_DOWNLOAD_NV_RSP:
+ case WCN36XX_HAL_DELETE_BSS_RSP:
+ case WCN36XX_HAL_SEND_BEACON_RSP:
+ case WCN36XX_HAL_SET_LINK_ST_RSP:
+ case WCN36XX_HAL_UPDATE_PROBE_RSP_TEMPLATE_RSP:
+ case WCN36XX_HAL_SET_BSSKEY_RSP:
+ case WCN36XX_HAL_SET_STAKEY_RSP:
+ case WCN36XX_HAL_RMV_STAKEY_RSP:
+ case WCN36XX_HAL_RMV_BSSKEY_RSP:
+ case WCN36XX_HAL_ENTER_BMPS_RSP:
+ case WCN36XX_HAL_EXIT_BMPS_RSP:
+ case WCN36XX_HAL_KEEP_ALIVE_RSP:
+ case WCN36XX_HAL_DUMP_COMMAND_RSP:
+ case WCN36XX_HAL_ADD_BA_SESSION_RSP:
+ case WCN36XX_HAL_ADD_BA_RSP:
+ case WCN36XX_HAL_DEL_BA_RSP:
+ case WCN36XX_HAL_TRIGGER_BA_RSP:
+ case WCN36XX_HAL_UPDATE_CFG_RSP:
+ if (wcn36xx_smd_rsp_status_check(buf, len)) {
+ wcn36xx_warn("error response from hal request %d\n",
+ msg_header->msg_type);
+ }
+ break;
+ case WCN36XX_HAL_JOIN_RSP:
+ wcn36xx_smd_join_rsp(buf, len);
+ break;
+ case WCN36XX_HAL_UPDATE_SCAN_PARAM_RSP:
+ wcn36xx_smd_update_scan_params_rsp(buf, len);
+ break;
+ case WCN36XX_HAL_CH_SWITCH_RSP:
+ wcn36xx_smd_switch_channel_rsp(buf, len);
+ break;
+ case WCN36XX_HAL_OTA_TX_COMPL_IND:
+ wcn36xx_smd_tx_compl_ind(wcn, buf, len);
+ break;
+ case WCN36XX_HAL_MISSED_BEACON_IND:
+ wcn36xx_smd_missed_beacon_ind(wcn, buf, len);
+ break;
+ case WCN36XX_HAL_FEATURE_CAPS_EXCHANGE_RSP:
+ wcn36xx_smd_feature_caps_exchange_rsp(buf, len);
+ break;
+ case WCN36XX_HAL_DELETE_STA_CONTEXT_IND:
+ wcn36xx_smd_delete_sta_context_ind(wcn, buf, len);
+ break;
+ default:
+ wcn36xx_err("SMD_EVENT (%d) not supported\n",
+ msg_header->msg_type);
+ }
+}
+
+int wcn36xx_smd_open(struct wcn36xx *wcn)
+{
+ return wcn->ctrl_ops->open(wcn, wcn36xx_smd_rsp_process);
+}
+
+void wcn36xx_smd_close(struct wcn36xx *wcn)
+{
+ wcn->ctrl_ops->close();
+}
diff --git a/drivers/net/wireless/ath/wcn36xx/smd.h b/drivers/net/wireless/ath/wcn36xx/smd.h
new file mode 100644
index 0000000..5ea54d2
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/smd.h
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _SMD_H_
+#define _SMD_H_
+
+#include "wcn36xx.h"
+
+/* Max shared size is 4k but we take less.*/
+#define WCN36XX_NV_FRAGMENT_SIZE 3072
+
+#define WCN36XX_SMD_BUF_SIZE 4096
+
+#define SMD_MSG_TIMEOUT 200
+#define WCN36XX_SMSM_WLAN_TX_ENABLE 0x00000400
+#define WCN36XX_SMSM_WLAN_TX_RINGS_EMPTY 0x00000200
+/* The PNO version info be contained in the rsp msg */
+#define WCN36XX_FW_MSG_PNO_VERSION_MASK 0x8000
+
+enum wcn36xx_fw_msg_result {
+ WCN36XX_FW_MSG_RESULT_SUCCESS = 0,
+ WCN36XX_FW_MSG_RESULT_SUCCESS_SYNC = 1,
+
+ WCN36XX_FW_MSG_RESULT_MEM_FAIL = 5,
+};
+
+/******************************/
+/* SMD requests and responses */
+/******************************/
+struct wcn36xx_fw_msg_status_rsp {
+ u32 status;
+} __packed;
+
+struct wcn36xx;
+
+int wcn36xx_smd_open(struct wcn36xx *wcn);
+void wcn36xx_smd_close(struct wcn36xx *wcn);
+
+int wcn36xx_smd_load_nv(struct wcn36xx *wcn);
+int wcn36xx_smd_start(struct wcn36xx *wcn);
+int wcn36xx_smd_stop(struct wcn36xx *wcn);
+int wcn36xx_smd_init_scan(struct wcn36xx *wcn);
+int wcn36xx_smd_start_scan(struct wcn36xx *wcn);
+int wcn36xx_smd_end_scan(struct wcn36xx *wcn);
+int wcn36xx_smd_finish_scan(struct wcn36xx *wcn);
+int wcn36xx_smd_update_scan_params(struct wcn36xx *wcn);
+int wcn36xx_smd_add_sta_self(struct wcn36xx *wcn, u8 *addr);
+int wcn36xx_smd_delete_sta_self(struct wcn36xx *wcn, u8 *addr);
+int wcn36xx_smd_delete_sta(struct wcn36xx *wcn, u8 sta_index);
+int wcn36xx_smd_join(struct wcn36xx *wcn, const u8 *bssid, u8 *vif, u8 ch);
+int wcn36xx_smd_set_link_st(struct wcn36xx *wcn, const u8 *bssid,
+ const u8 *sta_mac,
+ enum wcn36xx_hal_link_state state);
+int wcn36xx_smd_config_bss(struct wcn36xx *wcn, struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta, const u8 *bssid,
+ bool update);
+int wcn36xx_smd_delete_bss(struct wcn36xx *wcn);
+int wcn36xx_smd_config_sta(struct wcn36xx *wcn, struct ieee80211_vif *vif,
+ struct ieee80211_sta *sta);
+int wcn36xx_smd_send_beacon(struct wcn36xx *wcn, struct sk_buff *skb_beacon,
+ u16 tim_off, u16 p2p_off);
+int wcn36xx_smd_switch_channel(struct wcn36xx *wcn, int ch);
+int wcn36xx_smd_update_proberesp_tmpl(struct wcn36xx *wcn, struct sk_buff *skb);
+int wcn36xx_smd_set_stakey(struct wcn36xx *wcn,
+ enum ani_ed_type enc_type,
+ u8 keyidx,
+ u8 keylen,
+ u8 *key,
+ u8 sta_index);
+int wcn36xx_smd_set_bsskey(struct wcn36xx *wcn,
+ enum ani_ed_type enc_type,
+ u8 keyidx,
+ u8 keylen,
+ u8 *key);
+int wcn36xx_smd_remove_stakey(struct wcn36xx *wcn,
+ enum ani_ed_type enc_type,
+ u8 keyidx,
+ u8 sta_index);
+int wcn36xx_smd_remove_bsskey(struct wcn36xx *wcn,
+ enum ani_ed_type enc_type,
+ u8 keyidx);
+int wcn36xx_smd_enter_bmps(struct wcn36xx *wcn, u64 tbtt);
+int wcn36xx_smd_exit_bmps(struct wcn36xx *wcn);
+int wcn36xx_smd_keep_alive_req(struct wcn36xx *wcn, int packet_type);
+int wcn36xx_smd_dump_cmd_req(struct wcn36xx *wcn, u32 arg1, u32 arg2,
+ u32 arg3, u32 arg4, u32 arg5);
+int wcn36xx_smd_feature_caps_exchange(struct wcn36xx *wcn);
+
+int wcn36xx_smd_add_ba_session(struct wcn36xx *wcn,
+ struct ieee80211_sta *sta,
+ u16 tid,
+ u16 *ssn,
+ u8 direction,
+ u8 sta_index);
+int wcn36xx_smd_add_ba(struct wcn36xx *wcn);
+int wcn36xx_smd_del_ba(struct wcn36xx *wcn, u16 tid, u8 sta_index);
+int wcn36xx_smd_trigger_ba(struct wcn36xx *wcn, u8 sta_index);
+
+int wcn36xx_smd_update_cfg(struct wcn36xx *wcn, u32 cfg_id, u32 value);
+/* WCN36XX configuration parameters */
+struct wcn36xx_fw_cfg {
+ u16 id;
+ u16 len;
+ u16 pad_bytes;
+ u16 reserved;
+ u8 *val;
+};
+#endif /* _SMD_H_ */
diff --git a/drivers/net/wireless/ath/wcn36xx/txrx.c b/drivers/net/wireless/ath/wcn36xx/txrx.c
new file mode 100644
index 0000000..f49ec20
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/txrx.c
@@ -0,0 +1,256 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+
+#include "txrx.h"
+
+static inline int get_rssi0(struct wcn36xx_rx_bd *bd)
+{
+ return 100 - ((bd->phy_stat0 >> 24) & 0xff);
+}
+
+int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
+{
+ struct ieee80211_rx_status status;
+ struct ieee80211_hdr *hdr;
+ struct wcn36xx_rx_bd *bd;
+ u16 fc, sn;
+
+ /*
+ * All fields must be 0, otherwise it can lead to
+ * unexpected consequences.
+ */
+ memset(&status, 0, sizeof(status));
+
+ bd = (struct wcn36xx_rx_bd *)skb->data;
+ buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32));
+ wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP,
+ "BD <<< ", (char *)bd,
+ sizeof(struct wcn36xx_rx_bd));
+
+ skb_put(skb, bd->pdu.mpdu_header_off + bd->pdu.mpdu_len);
+ skb_pull(skb, bd->pdu.mpdu_header_off);
+
+ status.mactime = 10;
+ status.freq = WCN36XX_CENTER_FREQ(wcn);
+ status.band = WCN36XX_BAND(wcn);
+ status.signal = -get_rssi0(bd);
+ status.antenna = 1;
+ status.rate_idx = 1;
+ status.flag = 0;
+ status.rx_flags = 0;
+ status.flag |= RX_FLAG_IV_STRIPPED |
+ RX_FLAG_MMIC_STRIPPED |
+ RX_FLAG_DECRYPTED;
+
+ wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x status->vendor_radiotap_len=%x\n",
+ status.flag, status.vendor_radiotap_len);
+
+ memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
+
+ hdr = (struct ieee80211_hdr *) skb->data;
+ fc = __le16_to_cpu(hdr->frame_control);
+ sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl));
+
+ if (ieee80211_is_beacon(hdr->frame_control)) {
+ wcn36xx_dbg(WCN36XX_DBG_BEACON, "beacon skb %p len %d fc %04x sn %d\n",
+ skb, skb->len, fc, sn);
+ wcn36xx_dbg_dump(WCN36XX_DBG_BEACON_DUMP, "SKB <<< ",
+ (char *)skb->data, skb->len);
+ } else {
+ wcn36xx_dbg(WCN36XX_DBG_RX, "rx skb %p len %d fc %04x sn %d\n",
+ skb, skb->len, fc, sn);
+ wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, "SKB <<< ",
+ (char *)skb->data, skb->len);
+ }
+
+ ieee80211_rx_irqsafe(wcn->hw, skb);
+
+ return 0;
+}
+
+static void wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd *bd,
+ u32 mpdu_header_len,
+ u32 len,
+ u16 tid)
+{
+ bd->pdu.mpdu_header_len = mpdu_header_len;
+ bd->pdu.mpdu_header_off = sizeof(*bd);
+ bd->pdu.mpdu_data_off = bd->pdu.mpdu_header_len +
+ bd->pdu.mpdu_header_off;
+ bd->pdu.mpdu_len = len;
+ bd->pdu.tid = tid;
+}
+
+static void wcn36xx_set_tx_data(struct wcn36xx_tx_bd *bd,
+ struct wcn36xx *wcn,
+ struct wcn36xx_sta *sta_priv,
+ struct ieee80211_hdr *hdr,
+ bool bcast)
+{
+ struct ieee80211_vif *vif = container_of((void *)wcn->current_vif,
+ struct ieee80211_vif,
+ drv_priv);
+ bd->bd_rate = WCN36XX_BD_RATE_DATA;
+ bd->dpu_sign = wcn->current_vif->ucast_dpu_signature;
+
+ /*
+ * For not unicast frames mac80211 will not set sta pointer so use
+ * self_sta_index instead.
+ */
+ if (sta_priv) {
+ if (vif->type == NL80211_IFTYPE_STATION) {
+ bd->sta_index = sta_priv->bss_sta_index;
+ bd->dpu_desc_idx = sta_priv->bss_dpu_desc_index;
+ } else if (vif->type == NL80211_IFTYPE_AP ||
+ vif->type == NL80211_IFTYPE_ADHOC ||
+ vif->type == NL80211_IFTYPE_MESH_POINT) {
+ bd->sta_index = sta_priv->sta_index;
+ bd->dpu_desc_idx = sta_priv->dpu_desc_index;
+ }
+ } else {
+ bd->sta_index = wcn->current_vif->self_sta_index;
+ bd->dpu_desc_idx = wcn->current_vif->self_dpu_desc_index;
+ }
+
+ if (ieee80211_is_nullfunc(hdr->frame_control) ||
+ (sta_priv && !sta_priv->is_data_encrypted))
+ bd->dpu_ne = 1;
+
+ if (bcast) {
+ bd->ub = 1;
+ bd->ack_policy = 1;
+ }
+}
+
+static void wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd *bd,
+ struct wcn36xx *wcn,
+ struct ieee80211_hdr *hdr,
+ bool bcast)
+{
+ bd->sta_index = wcn->current_vif->self_sta_index;
+ bd->dpu_desc_idx = wcn->current_vif->self_dpu_desc_index;
+ bd->dpu_ne = 1;
+
+ /* default rate for unicast */
+ if (ieee80211_is_mgmt(hdr->frame_control))
+ bd->bd_rate = (WCN36XX_BAND(wcn) == IEEE80211_BAND_5GHZ) ?
+ WCN36XX_BD_RATE_CTRL :
+ WCN36XX_BD_RATE_MGMT;
+ else if (ieee80211_is_ctl(hdr->frame_control))
+ bd->bd_rate = WCN36XX_BD_RATE_CTRL;
+ else
+ wcn36xx_warn("frame control type unknown\n");
+
+ /*
+ * In joining state trick hardware that probe is sent as
+ * unicast even if address is broadcast.
+ */
+ if (wcn->is_joining &&
+ ieee80211_is_probe_req(hdr->frame_control))
+ bcast = false;
+
+ if (bcast) {
+ /* broadcast */
+ bd->ub = 1;
+ /* No ack needed not unicast */
+ bd->ack_policy = 1;
+ bd->queue_id = WCN36XX_TX_B_WQ_ID;
+ } else
+ bd->queue_id = WCN36XX_TX_U_WQ_ID;
+}
+
+int wcn36xx_start_tx(struct wcn36xx *wcn,
+ struct wcn36xx_sta *sta_priv,
+ struct sk_buff *skb)
+{
+ struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
+ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
+ unsigned long flags;
+ bool is_low = ieee80211_is_data(hdr->frame_control);
+ bool bcast = is_broadcast_ether_addr(hdr->addr1) ||
+ is_multicast_ether_addr(hdr->addr1);
+ struct wcn36xx_tx_bd *bd = wcn36xx_dxe_get_next_bd(wcn, is_low);
+
+ if (!bd) {
+ /*
+ * TX DXE are used in pairs. One for the BD and one for the
+ * actual frame. The BD DXE's has a preallocated buffer while
+ * the skb ones does not. If this isn't true something is really
+ * wierd. TODO: Recover from this situation
+ */
+
+ wcn36xx_err("bd address may not be NULL for BD DXE\n");
+ return -EINVAL;
+ }
+
+ memset(bd, 0, sizeof(*bd));
+
+ wcn36xx_dbg(WCN36XX_DBG_TX,
+ "tx skb %p len %d fc %04x sn %d %s %s\n",
+ skb, skb->len, __le16_to_cpu(hdr->frame_control),
+ IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)),
+ is_low ? "low" : "high", bcast ? "bcast" : "ucast");
+
+ wcn36xx_dbg_dump(WCN36XX_DBG_TX_DUMP, "", skb->data, skb->len);
+
+ bd->dpu_rf = WCN36XX_BMU_WQ_TX;
+
+ bd->tx_comp = info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS;
+ if (bd->tx_comp) {
+ wcn36xx_dbg(WCN36XX_DBG_DXE, "TX_ACK status requested\n");
+ spin_lock_irqsave(&wcn->dxe_lock, flags);
+ if (wcn->tx_ack_skb) {
+ spin_unlock_irqrestore(&wcn->dxe_lock, flags);
+ wcn36xx_warn("tx_ack_skb already set\n");
+ return -EINVAL;
+ }
+
+ wcn->tx_ack_skb = skb;
+ spin_unlock_irqrestore(&wcn->dxe_lock, flags);
+
+ /* Only one at a time is supported by fw. Stop the TX queues
+ * until the ack status gets back.
+ *
+ * TODO: Add watchdog in case FW does not answer
+ */
+ ieee80211_stop_queues(wcn->hw);
+ }
+
+ /* Data frames served first*/
+ if (is_low) {
+ wcn36xx_set_tx_data(bd, wcn, sta_priv, hdr, bcast);
+ wcn36xx_set_tx_pdu(bd,
+ ieee80211_is_data_qos(hdr->frame_control) ?
+ sizeof(struct ieee80211_qos_hdr) :
+ sizeof(struct ieee80211_hdr_3addr),
+ skb->len, sta_priv ? sta_priv->tid : 0);
+ } else {
+ /* MGMT and CTRL frames are handeld here*/
+ wcn36xx_set_tx_mgmt(bd, wcn, hdr, bcast);
+ wcn36xx_set_tx_pdu(bd,
+ ieee80211_is_data_qos(hdr->frame_control) ?
+ sizeof(struct ieee80211_qos_hdr) :
+ sizeof(struct ieee80211_hdr_3addr),
+ skb->len, WCN36XX_TID);
+ }
+
+ buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32));
+ bd->tx_bd_sign = 0xbdbdbdbd;
+
+ return wcn36xx_dxe_tx_frame(wcn, skb, is_low);
+}
diff --git a/drivers/net/wireless/ath/wcn36xx/txrx.h b/drivers/net/wireless/ath/wcn36xx/txrx.h
new file mode 100644
index 0000000..bbfbcf8
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/txrx.h
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _TXRX_H_
+#define _TXRX_H_
+
+#include <linux/etherdevice.h>
+#include "wcn36xx.h"
+
+/* TODO describe all properties */
+#define WCN36XX_802_11_HEADER_LEN 24
+#define WCN36XX_BMU_WQ_TX 25
+#define WCN36XX_TID 7
+/* broadcast wq ID */
+#define WCN36XX_TX_B_WQ_ID 0xA
+#define WCN36XX_TX_U_WQ_ID 0x9
+/* bd_rate */
+#define WCN36XX_BD_RATE_DATA 0
+#define WCN36XX_BD_RATE_MGMT 2
+#define WCN36XX_BD_RATE_CTRL 3
+
+struct wcn36xx_pdu {
+ u32 dpu_fb:8;
+ u32 adu_fb:8;
+ u32 pdu_id:16;
+
+ /* 0x04*/
+ u32 tail_pdu_idx:16;
+ u32 head_pdu_idx:16;
+
+ /* 0x08*/
+ u32 pdu_count:7;
+ u32 mpdu_data_off:9;
+ u32 mpdu_header_off:8;
+ u32 mpdu_header_len:8;
+
+ /* 0x0c*/
+ u32 reserved4:8;
+ u32 tid:4;
+ u32 reserved3:4;
+ u32 mpdu_len:16;
+};
+
+struct wcn36xx_rx_bd {
+ u32 bdt:2;
+ u32 ft:1;
+ u32 dpu_ne:1;
+ u32 rx_key_id:3;
+ u32 ub:1;
+ u32 rmf:1;
+ u32 uma_bypass:1;
+ u32 csr11:1;
+ u32 reserved0:1;
+ u32 scan_learn:1;
+ u32 rx_ch:4;
+ u32 rtsf:1;
+ u32 bsf:1;
+ u32 a2hf:1;
+ u32 st_auf:1;
+ u32 dpu_sign:3;
+ u32 dpu_rf:8;
+
+ struct wcn36xx_pdu pdu;
+
+ /* 0x14*/
+ u32 addr3:8;
+ u32 addr2:8;
+ u32 addr1:8;
+ u32 dpu_desc_idx:8;
+
+ /* 0x18*/
+ u32 rxp_flags:23;
+ u32 rate_id:9;
+
+ u32 phy_stat0;
+ u32 phy_stat1;
+
+ /* 0x24 */
+ u32 rx_times;
+
+ u32 pmi_cmd[6];
+
+ /* 0x40 */
+ u32 reserved7:4;
+ u32 reorder_slot_id:6;
+ u32 reorder_fwd_id:6;
+ u32 reserved6:12;
+ u32 reorder_code:4;
+
+ /* 0x44 */
+ u32 exp_seq_num:12;
+ u32 cur_seq_num:12;
+ u32 fr_type_subtype:8;
+
+ /* 0x48 */
+ u32 msdu_size:16;
+ u32 sub_fr_id:4;
+ u32 proc_order:4;
+ u32 reserved9:4;
+ u32 aef:1;
+ u32 lsf:1;
+ u32 esf:1;
+ u32 asf:1;
+};
+
+struct wcn36xx_tx_bd {
+ u32 bdt:2;
+ u32 ft:1;
+ u32 dpu_ne:1;
+ u32 fw_tx_comp:1;
+ u32 tx_comp:1;
+ u32 reserved1:1;
+ u32 ub:1;
+ u32 rmf:1;
+ u32 reserved0:12;
+ u32 dpu_sign:3;
+ u32 dpu_rf:8;
+
+ struct wcn36xx_pdu pdu;
+
+ /* 0x14*/
+ u32 reserved5:7;
+ u32 queue_id:5;
+ u32 bd_rate:2;
+ u32 ack_policy:2;
+ u32 sta_index:8;
+ u32 dpu_desc_idx:8;
+
+ u32 tx_bd_sign;
+ u32 reserved6;
+ u32 dxe_start_time;
+ u32 dxe_end_time;
+
+ /*u32 tcp_udp_start_off:10;
+ u32 header_cks:16;
+ u32 reserved7:6;*/
+};
+
+struct wcn36xx_sta;
+struct wcn36xx;
+
+int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb);
+int wcn36xx_start_tx(struct wcn36xx *wcn,
+ struct wcn36xx_sta *sta_priv,
+ struct sk_buff *skb);
+
+#endif /* _TXRX_H_ */
diff --git a/drivers/net/wireless/ath/wcn36xx/wcn36xx.h b/drivers/net/wireless/ath/wcn36xx/wcn36xx.h
new file mode 100644
index 0000000..61f579d
--- /dev/null
+++ b/drivers/net/wireless/ath/wcn36xx/wcn36xx.h
@@ -0,0 +1,236 @@
+/*
+ * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
+ * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
+ * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+#ifndef _WCN36XX_H_
+#define _WCN36XX_H_
+
+#include <linux/completion.h>
+#include <linux/printk.h>
+#include <linux/spinlock.h>
+#include <net/mac80211.h>
+
+#include "hal.h"
+#include "smd.h"
+#include "txrx.h"
+#include "dxe.h"
+#include "pmc.h"
+#include "debug.h"
+
+#define WLAN_NV_FILE "wlan/prima/WCNSS_qcom_wlan_nv.bin"
+#define WCN36XX_AGGR_BUFFER_SIZE 64
+
+extern unsigned int debug_mask;
+
+enum wcn36xx_debug_mask {
+ WCN36XX_DBG_DXE = 0x00000001,
+ WCN36XX_DBG_DXE_DUMP = 0x00000002,
+ WCN36XX_DBG_SMD = 0x00000004,
+ WCN36XX_DBG_SMD_DUMP = 0x00000008,
+ WCN36XX_DBG_RX = 0x00000010,
+ WCN36XX_DBG_RX_DUMP = 0x00000020,
+ WCN36XX_DBG_TX = 0x00000040,
+ WCN36XX_DBG_TX_DUMP = 0x00000080,
+ WCN36XX_DBG_HAL = 0x00000100,
+ WCN36XX_DBG_HAL_DUMP = 0x00000200,
+ WCN36XX_DBG_MAC = 0x00000400,
+ WCN36XX_DBG_BEACON = 0x00000800,
+ WCN36XX_DBG_BEACON_DUMP = 0x00001000,
+ WCN36XX_DBG_PMC = 0x00002000,
+ WCN36XX_DBG_PMC_DUMP = 0x00004000,
+ WCN36XX_DBG_ANY = 0xffffffff,
+};
+
+#define wcn36xx_err(fmt, arg...) \
+ printk(KERN_ERR pr_fmt("ERROR " fmt), ##arg);
+
+#define wcn36xx_warn(fmt, arg...) \
+ printk(KERN_WARNING pr_fmt("WARNING " fmt), ##arg)
+
+#define wcn36xx_info(fmt, arg...) \
+ printk(KERN_INFO pr_fmt(fmt), ##arg)
+
+#define wcn36xx_dbg(mask, fmt, arg...) do { \
+ if (debug_mask & mask) \
+ printk(KERN_DEBUG pr_fmt(fmt), ##arg); \
+} while (0)
+
+#define wcn36xx_dbg_dump(mask, prefix_str, buf, len) do { \
+ if (debug_mask & mask) \
+ print_hex_dump(KERN_DEBUG, pr_fmt(prefix_str), \
+ DUMP_PREFIX_OFFSET, 32, 1, \
+ buf, len, false); \
+} while (0)
+
+#define WCN36XX_HW_CHANNEL(__wcn) (__wcn->hw->conf.chandef.chan->hw_value)
+#define WCN36XX_BAND(__wcn) (__wcn->hw->conf.chandef.chan->band)
+#define WCN36XX_CENTER_FREQ(__wcn) (__wcn->hw->conf.chandef.chan->center_freq)
+#define WCN36XX_LISTEN_INTERVAL(__wcn) (__wcn->hw->conf.listen_interval)
+#define WCN36XX_FLAGS(__wcn) (__wcn->hw->flags)
+#define WCN36XX_MAX_POWER(__wcn) (__wcn->hw->conf.chandef.chan->max_power)
+
+static inline void buff_to_be(u32 *buf, size_t len)
+{
+ int i;
+ for (i = 0; i < len; i++)
+ buf[i] = cpu_to_be32(buf[i]);
+}
+
+struct nv_data {
+ int is_valid;
+ u8 table;
+};
+
+/* Interface for platform control path
+ *
+ * @open: hook must be called when wcn36xx wants to open control channel.
+ * @tx: sends a buffer.
+ */
+struct wcn36xx_platform_ctrl_ops {
+ int (*open)(void *drv_priv, void *rsp_cb);
+ void (*close)(void);
+ int (*tx)(char *buf, size_t len);
+ int (*get_hw_mac)(u8 *addr);
+ int (*smsm_change_state)(u32 clear_mask, u32 set_mask);
+};
+
+/**
+ * struct wcn36xx_vif - holds VIF related fields
+ *
+ * @bss_index: bss_index is initially set to 0xFF. bss_index is received from
+ * HW after first config_bss call and must be used in delete_bss and
+ * enter/exit_bmps.
+ */
+struct wcn36xx_vif {
+ u8 bss_index;
+ u8 ucast_dpu_signature;
+ /* Returned from WCN36XX_HAL_ADD_STA_SELF_RSP */
+ u8 self_sta_index;
+ u8 self_dpu_desc_index;
+};
+
+/**
+ * struct wcn36xx_sta - holds STA related fields
+ *
+ * @tid: traffic ID that is used during AMPDU and in TX BD.
+ * @sta_index: STA index is returned from HW after config_sta call and is
+ * used in both SMD channel and TX BD.
+ * @dpu_desc_index: DPU descriptor index is returned from HW after config_sta
+ * call and is used in TX BD.
+ * @bss_sta_index: STA index is returned from HW after config_bss call and is
+ * used in both SMD channel and TX BD. See table bellow when it is used.
+ * @bss_dpu_desc_index: DPU descriptor index is returned from HW after
+ * config_bss call and is used in TX BD.
+ * ______________________________________________
+ * | | STA | AP |
+ * |______________|_____________|_______________|
+ * | TX BD |bss_sta_index| sta_index |
+ * |______________|_____________|_______________|
+ * |all SMD calls |bss_sta_index| sta_index |
+ * |______________|_____________|_______________|
+ * |smd_delete_sta| sta_index | sta_index |
+ * |______________|_____________|_______________|
+ */
+struct wcn36xx_sta {
+ u16 tid;
+ u8 sta_index;
+ u8 dpu_desc_index;
+ u8 bss_sta_index;
+ u8 bss_dpu_desc_index;
+ bool is_data_encrypted;
+};
+struct wcn36xx_dxe_ch;
+struct wcn36xx {
+ struct ieee80211_hw *hw;
+ struct device *dev;
+ struct mac_address addresses;
+ struct wcn36xx_hal_mac_ssid ssid;
+ u16 aid;
+ struct wcn36xx_vif *current_vif;
+ struct wcn36xx_sta *sta;
+ u8 dtim_period;
+ enum ani_ed_type encrypt_type;
+
+ /* WoW related*/
+ struct mutex pm_mutex;
+ bool is_suspended;
+ bool is_con_lost_pending;
+
+ u8 fw_revision;
+ u8 fw_version;
+ u8 fw_minor;
+ u8 fw_major;
+
+ /* extra byte for the NULL termination */
+ u8 crm_version[WCN36XX_HAL_VERSION_LENGTH + 1];
+ u8 wlan_version[WCN36XX_HAL_VERSION_LENGTH + 1];
+
+ /* IRQs */
+ int tx_irq;
+ int rx_irq;
+ void __iomem *mmio;
+
+ /* Rates */
+ struct wcn36xx_hal_supported_rates supported_rates;
+
+ struct wcn36xx_platform_ctrl_ops *ctrl_ops;
+ /*
+ * smd_buf must be protected with smd_mutex to garantee
+ * that all messages are sent one after another
+ */
+ u8 *smd_buf;
+ struct mutex smd_mutex;
+
+ bool is_joining;
+
+ /* DXE channels */
+ struct wcn36xx_dxe_ch dxe_tx_l_ch; /* TX low */
+ struct wcn36xx_dxe_ch dxe_tx_h_ch; /* TX high */
+ struct wcn36xx_dxe_ch dxe_rx_l_ch; /* RX low */
+ struct wcn36xx_dxe_ch dxe_rx_h_ch; /* RX high */
+
+ /* For synchronization of DXE resources from BH, IRQ and WQ contexts */
+ spinlock_t dxe_lock;
+ bool queues_stopped;
+
+ /* Memory pools */
+ struct wcn36xx_dxe_mem_pool mgmt_mem_pool;
+ struct wcn36xx_dxe_mem_pool data_mem_pool;
+
+ struct sk_buff *tx_ack_skb;
+
+ /* Power management */
+ enum wcn36xx_power_state pw_state;
+
+#ifdef CONFIG_WCN36XX_DEBUGFS
+ /* Debug file system entry */
+ struct wcn36xx_dfs_entry dfs;
+#endif /* CONFIG_WCN36XX_DEBUGFS */
+
+};
+
+static inline bool wcn36xx_is_fw_version(struct wcn36xx *wcn,
+ u8 major,
+ u8 minor,
+ u8 version,
+ u8 revision)
+{
+ return (wcn->fw_major == major &&
+ wcn->fw_minor == minor &&
+ wcn->fw_version == version &&
+ wcn->fw_revision == revision);
+}
+
+#endif /* _WCN36XX_H_ */
--
1.8.2.2
^ permalink raw reply related
* Re: [PATCH] cfg80211: fix potential deadlock regression
From: Maxime Bizon @ 2013-09-02 10:26 UTC (permalink / raw)
To: Johannes Berg; +Cc: linux-wireless
In-Reply-To: <1377865387.16256.15.camel@jlt4.sipsolutions.net>
On Fri, 2013-08-30 at 14:23 +0200, Johannes Berg wrote:
> I think this should be OK:
> http://p.sipsolutions.net/28cf9ed446845440.txt, can you try?
Works for me
Thanks
--
Maxime
^ permalink raw reply
* [brcmfmac] BUG: unable to handle kernel paging request at ffffffff82196446
From: Fengguang Wu @ 2013-09-02 10:23 UTC (permalink / raw)
To: fengguang.wu, Hante Meuleman
Cc: John W. Linville, linux-kernel, linux-wireless,
brcm80211-dev-list
[-- Attachment #1: Type: text/plain, Size: 6341 bytes --]
Greetings,
I got the below dmesg and the first bad commit is
commit 668761ac01d6f5a36b8e5a24d4e154550e2c4c3b
Author: Hante Meuleman <meuleman@broadcom.com>
Date: Fri Apr 12 10:55:55 2013 +0200
brcmfmac: define and use platform specific data for SDIO.
This patch adds support for platform specific data for SDIO
fullmac devices. Currently OOB interrupts are configured by Kconfig
BRCMFMAC_SDIO_OOB but that is now determined dynamically by checking
availibility of platform data.
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Reviewed-by: Arend Van Spriel <arend@broadcom.com>
Reviewed-by: Franky (Zhenhui) Lin <frankyl@broadcom.com>
Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
Reviewed-by: Piotr Haber <phaber@broadcom.com>
Signed-off-by: Hante Meuleman <meuleman@broadcom.com>
Signed-off-by: Arend van Spriel <arend@broadcom.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
[ 48.966342] Switched to clocksource tsc
[ 48.970002] kernel tried to execute NX-protected page - exploit attempt? (uid: 0)
[ 48.970851] BUG: unable to handle kernel paging request at ffffffff82196446
[ 48.970957] IP: [<ffffffff82196446>] classes_init+0x26/0x26
[ 48.970957] PGD 1e76067 PUD 1e77063 PMD f388063 PTE 8000000002196163
[ 48.970957] Oops: 0011 [#1]
[ 48.970957] CPU: 0 PID: 17 Comm: kworker/0:1 Not tainted 3.11.0-rc7-00444-gc52dd7f #23
[ 48.970957] Workqueue: events brcmf_driver_init
[ 48.970957] task: ffff8800001d2000 ti: ffff8800001d4000 task.ti: ffff8800001d4000
[ 48.970957] RIP: 0010:[<ffffffff82196446>] [<ffffffff82196446>] classes_init+0x26/0x26
[ 48.970957] RSP: 0000:ffff8800001d5d40 EFLAGS: 00000286
[ 48.970957] RAX: 0000000000000001 RBX: ffffffff820c5620 RCX: 0000000000000000
[ 48.970957] RDX: 0000000000000001 RSI: ffffffff816f7380 RDI: ffffffff820c56c0
[ 48.970957] RBP: ffff8800001d5d50 R08: ffff8800001d2508 R09: 0000000000000002
[ 48.970957] R10: 0000000000000000 R11: 0001f7ce298c5620 R12: ffff8800001c76b0
[ 48.970957] R13: ffffffff81e91d40 R14: 0000000000000000 R15: ffff88000e0ce300
[ 48.970957] FS: 0000000000000000(0000) GS:ffffffff81e84000(0000) knlGS:0000000000000000
[ 48.970957] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b
[ 48.970957] CR2: ffffffff82196446 CR3: 0000000001e75000 CR4: 00000000000006b0
[ 48.970957] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[ 48.970957] DR3: 0000000000000000 DR6: 0000000000000000 DR7: 0000000000000000
[ 48.970957] Stack:
[ 48.970957] ffffffff816f7df8 ffffffff820c5620 ffff8800001d5d60 ffffffff816eeec9
[ 48.970957] ffff8800001d5de0 ffffffff81073dc5 ffffffff81073d68 ffff8800001d5db8
[ 48.970957] 0000000000000086 ffffffff820c5620 ffffffff824f7fd0 0000000000000000
[ 48.970957] Call Trace:
[ 48.970957] [<ffffffff816f7df8>] ? brcmf_sdio_init+0x18/0x70
[ 48.970957] [<ffffffff816eeec9>] brcmf_driver_init+0x9/0x10
[ 48.970957] [<ffffffff81073dc5>] process_one_work+0x1d5/0x480
[ 48.970957] [<ffffffff81073d68>] ? process_one_work+0x178/0x480
[ 48.970957] [<ffffffff81074188>] worker_thread+0x118/0x3a0
[ 48.970957] [<ffffffff81074070>] ? process_one_work+0x480/0x480
[ 48.970957] [<ffffffff8107aa17>] kthread+0xe7/0xf0
[ 48.970957] [<ffffffff810829f7>] ? finish_task_switch.constprop.57+0x37/0xd0
[ 48.970957] [<ffffffff8107a930>] ? __kthread_parkme+0x80/0x80
[ 48.970957] [<ffffffff81a6923a>] ret_from_fork+0x7a/0xb0
[ 48.970957] [<ffffffff8107a930>] ? __kthread_parkme+0x80/0x80
[ 48.970957] Code: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc <cc> cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc
[ 48.970957] RIP [<ffffffff82196446>] classes_init+0x26/0x26
[ 48.970957] RSP <ffff8800001d5d40>
[ 48.970957] CR2: ffffffff82196446
[ 48.970957] ---[ end trace 62980817cd525f14 ]---
git bisect start v3.10 v3.9 --
git bisect bad 20b4fb485227404329e41ad15588afad3df23050 # 12:16 9- Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs
git bisect good 19b344efa35dbc253e2d10403dafe6aafda73c56 # 17:54 800+ Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/hid
git bisect bad 20074f357da4a637430aec2879c9d864c5d2c23c # 18:03 1- filter: fix va_list build error
git bisect good 953c96e0d85615d1ab1f100e525d376053294dc2 # 21:38 800+ tg3: Use bool not int
git bisect bad 4de41bef3e075dbc787f7c53b3562f23295f1d6d # 22:21 102- wil6210: Use cached copy of Tx descriptor
git bisect good e73dcfbf061b524fe9aaef56cf3c2e234a45ec19 # 01:19 800+ Bluetooth: hidp: fix sending output reports on intr channel
git bisect good c79490e1b5ebf35415147fe06f02d8e77ccfe6d4 # 07:18 800+ NFC: pn533: Avoid function declarations
git bisect bad 06d961a8e210035bff7e82f466107f9ab4a8fd94 # 07:49 55- mac80211/minstrel: use the new rate control API
git bisect good 97990a060e6757f48b931a3946b17c1c4362c3fb # 10:43 800+ nl80211: allow using wdev identifiers to get scan results
git bisect bad 31ed07dc1e83b7926ce8ee2215ea21599a215990 # 11:15 77- brcmfmac: remove ifidx variable from brcmf_fws_process_skb()
git bisect good 1e9ab4dd258ecbb0f1c377fd4dbe227cdb93d9bd # 14:16 800+ brcmfmac: setup SDIO reset behavior
git bisect bad 668761ac01d6f5a36b8e5a24d4e154550e2c4c3b # 15:03 38- brcmfmac: define and use platform specific data for SDIO.
git bisect good 369508c5656db290f09b32d213effeea6c1431b8 # 18:30 800+ brcmfmac: Add 43143 SDIO support.
git bisect good 979c29205ffa607c59ba2c9f9c083b967d356c97 # 19:54 800+ brcmfmac: Add drive strength programming for SDIO 43143.
git bisect good 979c29205ffa607c59ba2c9f9c083b967d356c97 # 05:19 2400+ brcmfmac: Add drive strength programming for SDIO 43143.
git bisect bad c52dd7f94c5d5386413cb95462ac802847fa5f3a # 05:20 0- Merge remote-tracking branch 'sound/for-linus' into devel-cairo-x86_64-201308281454
git bisect bad d9eda0fae1394ea1e1c59c94d4a120ad9c06e64a # 11:50 27- Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
git bisect bad 797c8d18e6804f054e68555e6cf827827b6a073c # 12:47 1- Add linux-next specific files for 20130830
Thanks,
Fengguang
[-- Attachment #2: dmesg-kvm-ant-9274-20130828152722-3.11.0-rc7-00444-gc52dd7f-23 --]
[-- Type: text/plain, Size: 55966 bytes --]
[ 0.000000] Linux version 3.11.0-rc7-00444-gc52dd7f (kbuild@cairo) (gcc version 4.8.1 (Debian 4.8.1-8) ) #23 Wed Aug 28 15:18:19 CST 2013
[ 0.000000] Command line: hung_task_panic=1 rcutree.rcu_cpu_stall_timeout=100 log_buf_len=8M ignore_loglevel debug sched_debug apic=debug dynamic_printk sysrq_always_enabled panic=10 prompt_ramdisk=0 console=ttyS0,115200 console=tty0 vga=normal root=/dev/ram0 rw link=/kernel-tests/run-queue/kvm/x86_64-randconfig-c3-0828/devel-cairo-x86_64-201308281454/.vmlinuz-c52dd7f94c5d5386413cb95462ac802847fa5f3a-20130828151901-4-ant branch=linux-devel/devel-cairo-x86_64-201308281454 noapic nolapic nohz=off BOOT_IMAGE=/kernel/x86_64-randconfig-c3-0828/c52dd7f94c5d5386413cb95462ac802847fa5f3a/vmlinuz-3.11.0-rc7-00444-gc52dd7f
[ 0.000000] KERNEL supported cpus:
[ 0.000000] Centaur CentaurHauls
[ 0.000000] CPU: vendor_id 'AuthenticAMD' unknown, using generic init.
[ 0.000000] CPU: Your system may be unstable.
[ 0.000000] e820: BIOS-provided physical RAM map:
[ 0.000000] BIOS-e820: [mem 0x0000000000000000-0x000000000009fbff] usable
[ 0.000000] BIOS-e820: [mem 0x000000000009fc00-0x000000000009ffff] reserved
[ 0.000000] BIOS-e820: [mem 0x00000000000f0000-0x00000000000fffff] reserved
[ 0.000000] BIOS-e820: [mem 0x0000000000100000-0x000000000fffdfff] usable
[ 0.000000] BIOS-e820: [mem 0x000000000fffe000-0x000000000fffffff] reserved
[ 0.000000] BIOS-e820: [mem 0x00000000fffc0000-0x00000000ffffffff] reserved
[ 0.000000] debug: ignoring loglevel setting.
[ 0.000000] NX (Execute Disable) protection: active
[ 0.000000] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved
[ 0.000000] e820: remove [mem 0x000a0000-0x000fffff] usable
[ 0.000000] e820: last_pfn = 0xfffe max_arch_pfn = 0x400000000
[ 0.000000] Scan for SMP in [mem 0x00000000-0x000003ff]
[ 0.000000] Scan for SMP in [mem 0x0009fc00-0x0009ffff]
[ 0.000000] Scan for SMP in [mem 0x000f0000-0x000fffff]
[ 0.000000] found SMP MP-table at [mem 0x000fdab0-0x000fdabf] mapped at [ffff8800000fdab0]
[ 0.000000] mpc: fdac0-fdbe4
[ 0.000000] Scanning 1 areas for low memory corruption
[ 0.000000] Base memory trampoline at [ffff880000099000] 99000 size 24576
[ 0.000000] init_memory_mapping: [mem 0x00000000-0x000fffff]
[ 0.000000] [mem 0x00000000-0x000fffff] page 4k
[ 0.000000] BRK [0x02bc5000, 0x02bc5fff] PGTABLE
[ 0.000000] BRK [0x02bc6000, 0x02bc6fff] PGTABLE
[ 0.000000] BRK [0x02bc7000, 0x02bc7fff] PGTABLE
[ 0.000000] init_memory_mapping: [mem 0x0e600000-0x0e7fffff]
[ 0.000000] [mem 0x0e600000-0x0e7fffff] page 2M
[ 0.000000] init_memory_mapping: [mem 0x0c000000-0x0e5fffff]
[ 0.000000] [mem 0x0c000000-0x0e5fffff] page 2M
[ 0.000000] init_memory_mapping: [mem 0x00100000-0x0bffffff]
[ 0.000000] [mem 0x00100000-0x001fffff] page 4k
[ 0.000000] [mem 0x00200000-0x0bffffff] page 2M
[ 0.000000] init_memory_mapping: [mem 0x0e800000-0x0fffdfff]
[ 0.000000] [mem 0x0e800000-0x0fdfffff] page 2M
[ 0.000000] [mem 0x0fe00000-0x0fffdfff] page 4k
[ 0.000000] BRK [0x02bc8000, 0x02bc8fff] PGTABLE
[ 0.000000] log_buf_len: 8388608
[ 0.000000] early log buf free: 127916(97%)
[ 0.000000] RAMDISK: [mem 0x0e8d6000-0x0ffeffff]
[ 0.000000] ACPI: RSDP 00000000000fd920 00014 (v00 BOCHS )
[ 0.000000] ACPI: RSDT 000000000fffe450 00034 (v01 BOCHS BXPCRSDT 00000001 BXPC 00000001)
[ 0.000000] ACPI: FACP 000000000fffff80 00074 (v01 BOCHS BXPCFACP 00000001 BXPC 00000001)
[ 0.000000] ACPI: DSDT 000000000fffe490 011A9 (v01 BXPC BXDSDT 00000001 INTL 20100528)
[ 0.000000] ACPI: FACS 000000000fffff40 00040
[ 0.000000] ACPI: SSDT 000000000ffff7a0 00796 (v01 BOCHS BXPCSSDT 00000001 BXPC 00000001)
[ 0.000000] ACPI: APIC 000000000ffff680 00080 (v01 BOCHS BXPCAPIC 00000001 BXPC 00000001)
[ 0.000000] ACPI: HPET 000000000ffff640 00038 (v01 BOCHS BXPCHPET 00000001 BXPC 00000001)
[ 0.000000] Zone ranges:
[ 0.000000] DMA32 [mem 0x00001000-0xffffffff]
[ 0.000000] Normal empty
[ 0.000000] Movable zone start for each node
[ 0.000000] Early memory node ranges
[ 0.000000] node 0: [mem 0x00001000-0x0009efff]
[ 0.000000] node 0: [mem 0x00100000-0x0fffdfff]
[ 0.000000] On node 0 totalpages: 65436
[ 0.000000] DMA32 zone: 896 pages used for memmap
[ 0.000000] DMA32 zone: 21 pages reserved
[ 0.000000] DMA32 zone: 65436 pages, LIFO batch:15
[ 0.000000] ACPI: PM-Timer IO Port: 0xb008
[ 0.000000] ACPI: HPET id: 0x8086a201 base: 0xfed00000
[ 0.000000] Intel MultiProcessor Specification v1.4
[ 0.000000] mpc: fdac0-fdbe4
[ 0.000000] MPTABLE: OEM ID: BOCHSCPU
[ 0.000000] MPTABLE: Product ID: 0.1
[ 0.000000] MPTABLE: APIC at: 0xFEE00000
[ 0.000000] mapped APIC to ffffffffff5fa000 ( fee00000)
[ 0.000000] Processor #0 (Bootup-CPU)
[ 0.000000] Processor #1
[ 0.000000] ACPI: NR_CPUS/possible_cpus limit of 1 reached. Processor 1/0x1 ignored.
[ 0.000000] Bus #0 is PCI
[ 0.000000] Bus #1 is ISA
[ 0.000000] IOAPIC[0]: apic_id 0, version 17, address 0xfec00000, GSI 0-23
[ 0.000000] Int: type 0, pol 1, trig 0, bus 00, IRQ 04, APIC ID 0, APIC INT 09
[ 0.000000] Int: type 0, pol 1, trig 0, bus 00, IRQ 0c, APIC ID 0, APIC INT 0b
[ 0.000000] Int: type 0, pol 1, trig 0, bus 00, IRQ 10, APIC ID 0, APIC INT 0b
[ 0.000000] Int: type 0, pol 1, trig 0, bus 00, IRQ 14, APIC ID 0, APIC INT 0a
[ 0.000000] Int: type 0, pol 1, trig 0, bus 00, IRQ 18, APIC ID 0, APIC INT 0a
[ 0.000000] Int: type 0, pol 1, trig 0, bus 00, IRQ 1c, APIC ID 0, APIC INT 0b
[ 0.000000] Int: type 0, pol 1, trig 0, bus 00, IRQ 20, APIC ID 0, APIC INT 0b
[ 0.000000] Int: type 0, pol 1, trig 0, bus 00, IRQ 24, APIC ID 0, APIC INT 0a
[ 0.000000] Int: type 0, pol 1, trig 0, bus 00, IRQ 28, APIC ID 0, APIC INT 0a
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 00, APIC ID 0, APIC INT 02
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 01, APIC ID 0, APIC INT 01
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 03, APIC ID 0, APIC INT 03
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 04, APIC ID 0, APIC INT 04
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 05, APIC ID 0, APIC INT 05
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 06, APIC ID 0, APIC INT 06
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 07, APIC ID 0, APIC INT 07
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 08, APIC ID 0, APIC INT 08
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 0c, APIC ID 0, APIC INT 0c
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 0d, APIC ID 0, APIC INT 0d
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 0e, APIC ID 0, APIC INT 0e
[ 0.000000] Int: type 0, pol 0, trig 0, bus 01, IRQ 0f, APIC ID 0, APIC INT 0f
[ 0.000000] Lint: type 3, pol 0, trig 0, bus 01, IRQ 00, APIC ID 0, APIC LINT 00
[ 0.000000] Lint: type 1, pol 0, trig 0, bus 01, IRQ 00, APIC ID ff, APIC LINT 01
[ 0.000000] Processors: 1
[ 0.000000] mapped IOAPIC to ffffffffff5f9000 (fec00000)
[ 0.000000] nr_irqs_gsi: 40
[ 0.000000] PM: Registered nosave memory: [mem 0x0009f000-0x0009ffff]
[ 0.000000] PM: Registered nosave memory: [mem 0x000a0000-0x000effff]
[ 0.000000] PM: Registered nosave memory: [mem 0x000f0000-0x000fffff]
[ 0.000000] e820: [mem 0x10000000-0xfffbffff] available for PCI devices
[ 0.000000] Booting paravirtualized kernel on bare hardware
[ 0.000000] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
[ 0.000000] pcpu-alloc: [0] 0
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on. Total pages: 64519
[ 0.000000] Kernel command line: hung_task_panic=1 rcutree.rcu_cpu_stall_timeout=100 log_buf_len=8M ignore_loglevel debug sched_debug apic=debug dynamic_printk sysrq_always_enabled panic=10 prompt_ramdisk=0 console=ttyS0,115200 console=tty0 vga=normal root=/dev/ram0 rw link=/kernel-tests/run-queue/kvm/x86_64-randconfig-c3-0828/devel-cairo-x86_64-201308281454/.vmlinuz-c52dd7f94c5d5386413cb95462ac802847fa5f3a-20130828151901-4-ant branch=linux-devel/devel-cairo-x86_64-201308281454 noapic nolapic nohz=off BOOT_IMAGE=/kernel/x86_64-randconfig-c3-0828/c52dd7f94c5d5386413cb95462ac802847fa5f3a/vmlinuz-3.11.0-rc7-00444-gc52dd7f
[ 0.000000] PID hash table entries: 1024 (order: 1, 8192 bytes)
[ 0.000000] Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
[ 0.000000] Inode-cache hash table entries: 16384 (order: 5, 131072 bytes)
[ 0.000000] Memory: 197308K/261744K available (10666K kernel code, 3112K rwdata, 4076K rodata, 692K init, 9872K bss, 64436K reserved)
[ 0.000000] NR_IRQS:4352 nr_irqs:256 16
[ 0.000000] console [ttyS0] enabled
[ 0.000000] Lock dependency validator: Copyright (c) 2006 Red Hat, Inc., Ingo Molnar
[ 0.000000] ... MAX_LOCKDEP_SUBCLASSES: 8
[ 0.000000] ... MAX_LOCK_DEPTH: 48
[ 0.000000] ... MAX_LOCKDEP_KEYS: 8191
[ 0.000000] ... CLASSHASH_SIZE: 4096
[ 0.000000] ... MAX_LOCKDEP_ENTRIES: 16384
[ 0.000000] ... MAX_LOCKDEP_CHAINS: 32768
[ 0.000000] ... CHAINHASH_SIZE: 16384
[ 0.000000] memory used by lock dependency info: 6335 kB
[ 0.000000] per task-struct memory footprint: 2688 bytes
[ 0.000000] ODEBUG: 6 of 6 active objects replaced
[ 0.000000] ODEBUG: selftest passed
[ 0.000000] hpet clockevent registered
[ 0.000000] tsc: Fast TSC calibration failed
[ 0.000000] tsc: Unable to calibrate against PIT
[ 0.000000] tsc: using HPET reference calibration
[ 0.000000] tsc: Detected 3192.026 MHz processor
[ 0.040865] Calibrating delay loop (skipped), value calculated using timer frequency.. 6384.05 BogoMIPS (lpj=12768104)
[ 0.045259] pid_max: default: 32768 minimum: 301
[ 0.051443] Mount-cache hash table entries: 256
[ 0.091557] Last level iTLB entries: 4KB 0, 2MB 0, 4MB 0
[ 0.091557] Last level dTLB entries: 4KB 0, 2MB 0, 4MB 0
[ 0.091557] tlb_flushall_shift: -1
[ 0.092312] CPU: AuthenticAMD QEMU Virtual CPU version 1.5.0 (fam: 06, model: 02, stepping: 03)
[ 0.122991] ACPI: Core revision 20130517
[ 0.393582] ACPI: All ACPI Tables successfully acquired
[ 0.394940] ACPI: setting ELCR to 0200 (from 0c00)
[ 0.425865] Performance Events:
[ 0.452314] Apic disabled
[ 0.456645] NMI watchdog: disabled (cpu0): hardware events not enabled
[ 0.502333] xor: measuring software checksum speed
[ 0.548394] prefetch64-sse: 276.000 MB/sec
[ 0.588173] generic_sse: 276.000 MB/sec
[ 0.588740] xor: using function: generic_sse (276.000 MB/sec)
[ 0.614678] regulator-dummy: no parameters
[ 0.624832] NET: Registered protocol family 16
[ 0.661425] ACPI: bus type PCI registered
[ 0.666914] PCI: Using configuration type 1 for base access
[ 1.050789] bio: create slab <bio-0> at 0
[ 1.136615] raid6: sse2x1 63 MB/s
[ 1.208782] raid6: sse2x2 48 MB/s
[ 1.280361] raid6: sse2x4 44 MB/s
[ 1.280930] raid6: using algorithm sse2x1 (63 MB/s)
[ 1.281610] raid6: using intx1 recovery algorithm
[ 1.305774] ACPI: Added _OSI(Module Device)
[ 1.306277] ACPI: Added _OSI(Processor Device)
[ 1.306705] ACPI: Added _OSI(3.0 _SCP Extensions)
[ 1.307129] ACPI: Added _OSI(Processor Aggregator Device)
[ 1.446959] ACPI: EC: Look up EC in DSDT
[ 1.977766] ACPI: Interpreter enabled
[ 1.979106] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S1_] (20130517/hwxface-571)
[ 1.980915] ACPI Exception: AE_NOT_FOUND, While evaluating Sleep State [\_S2_] (20130517/hwxface-571)
[ 1.986613] ACPI: (supports S0 S3 S4 S5)
[ 1.987382] ACPI: Using PIC for interrupt routing
[ 1.993825] PCI: Using host bridge windows from ACPI; if necessary, use "pci=nocrs" and report a bug
[ 2.733718] ACPI: PCI Root Bridge [PCI0] (domain 0000 [bus 00-ff])
[ 2.768750] PCI host bridge to bus 0000:00
[ 2.770282] pci_bus 0000:00: root bus resource [bus 00-ff]
[ 2.771380] pci_bus 0000:00: root bus resource [io 0x0000-0x0cf7]
[ 2.772162] pci_bus 0000:00: root bus resource [io 0x0d00-0xffff]
[ 2.772806] pci_bus 0000:00: root bus resource [mem 0x000a0000-0x000bffff]
[ 2.773374] pci_bus 0000:00: root bus resource [mem 0x80000000-0xfebfffff]
[ 2.777954] pci 0000:00:00.0: [8086:1237] type 00 class 0x060000
[ 2.800438] pci 0000:00:01.0: [8086:7000] type 00 class 0x060100
[ 2.808343] pci 0000:00:01.1: [8086:7010] type 00 class 0x010180
[ 2.820290] pci 0000:00:01.1: reg 0x20: [io 0xc1e0-0xc1ef]
[ 2.839385] pci 0000:00:01.3: [8086:7113] type 00 class 0x068000
[ 2.842421] pci 0000:00:01.3: quirk: [io 0xb000-0xb03f] claimed by PIIX4 ACPI
[ 2.843168] pci 0000:00:01.3: quirk: [io 0xb100-0xb10f] claimed by PIIX4 SMB
[ 2.862388] pci 0000:00:02.0: [1013:00b8] type 00 class 0x030000
[ 2.866313] pci 0000:00:02.0: reg 0x10: [mem 0xfc000000-0xfdffffff pref]
[ 2.872266] pci 0000:00:02.0: reg 0x14: [mem 0xfebe0000-0xfebe0fff]
[ 2.896253] pci 0000:00:02.0: reg 0x30: [mem 0xfebc0000-0xfebcffff pref]
[ 2.908284] pci 0000:00:03.0: [1af4:1000] type 00 class 0x020000
[ 2.912246] pci 0000:00:03.0: reg 0x10: [io 0xc1c0-0xc1df]
[ 2.918023] pci 0000:00:03.0: reg 0x14: [mem 0xfebe1000-0xfebe1fff]
[ 2.938107] pci 0000:00:03.0: reg 0x30: [mem 0xfebd0000-0xfebdffff pref]
[ 2.954150] pci 0000:00:04.0: [8086:100e] type 00 class 0x020000
[ 2.958073] pci 0000:00:04.0: reg 0x10: [mem 0xfeb80000-0xfeb9ffff]
[ 2.964200] pci 0000:00:04.0: reg 0x14: [io 0xc000-0xc03f]
[ 2.984245] pci 0000:00:04.0: reg 0x30: [mem 0xfeba0000-0xfebbffff pref]
[ 3.005403] pci 0000:00:05.0: [1af4:1001] type 00 class 0x010000
[ 3.010185] pci 0000:00:05.0: reg 0x10: [io 0xc040-0xc07f]
[ 3.014046] pci 0000:00:05.0: reg 0x14: [mem 0xfebe2000-0xfebe2fff]
[ 3.050516] pci 0000:00:06.0: [1af4:1001] type 00 class 0x010000
[ 3.056209] pci 0000:00:06.0: reg 0x10: [io 0xc080-0xc0bf]
[ 3.060212] pci 0000:00:06.0: reg 0x14: [mem 0xfebe3000-0xfebe3fff]
[ 3.101167] pci 0000:00:07.0: [1af4:1001] type 00 class 0x010000
[ 3.106181] pci 0000:00:07.0: reg 0x10: [io 0xc0c0-0xc0ff]
[ 3.112258] pci 0000:00:07.0: reg 0x14: [mem 0xfebe4000-0xfebe4fff]
[ 3.152223] pci 0000:00:08.0: [1af4:1001] type 00 class 0x010000
[ 3.156275] pci 0000:00:08.0: reg 0x10: [io 0xc100-0xc13f]
[ 3.161995] pci 0000:00:08.0: reg 0x14: [mem 0xfebe5000-0xfebe5fff]
[ 3.202190] pci 0000:00:09.0: [1af4:1001] type 00 class 0x010000
[ 3.206068] pci 0000:00:09.0: reg 0x10: [io 0xc140-0xc17f]
[ 3.212197] pci 0000:00:09.0: reg 0x14: [mem 0xfebe6000-0xfebe6fff]
[ 3.253827] pci 0000:00:0a.0: [1af4:1001] type 00 class 0x010000
[ 3.258133] pci 0000:00:0a.0: reg 0x10: [io 0xc180-0xc1bf]
[ 3.264273] pci 0000:00:0a.0: reg 0x14: [mem 0xfebe7000-0xfebe7fff]
[ 3.301872] pci 0000:00:0b.0: [8086:25ab] type 00 class 0x088000
[ 3.305255] pci 0000:00:0b.0: reg 0x10: [mem 0xfebe8000-0xfebe800f]
[ 3.336382] pci_bus 0000:00: on NUMA node 0
[ 3.337174] acpi PNP0A03:00: Unable to request _OSC control (_OSC support mask: 0x08)
[ 3.393671] ACPI: PCI Interrupt Link [LNKA] (IRQs 5 *10 11)
[ 3.406408] ACPI: PCI Interrupt Link [LNKB] (IRQs 5 *10 11)
[ 3.417195] ACPI: PCI Interrupt Link [LNKC] (IRQs 5 10 *11)
[ 3.428327] ACPI: PCI Interrupt Link [LNKD] (IRQs 5 10 *11)
[ 3.433390] ACPI: PCI Interrupt Link [LNKS] (IRQs *9)
[ 3.475207] ACPI: Enabled 16 GPEs in block 00 to 0F
[ 3.477109] ACPI: \_SB_.PCI0: notify handler is installed
[ 3.482107] Found 1 acpi root devices
[ 3.521478] vgaarb: device added: PCI:0000:00:02.0,decodes=io+mem,owns=io+mem,locks=none
[ 3.522614] vgaarb: loaded
[ 3.523031] vgaarb: bridge control possible 0000:00:02.0
[ 3.530059] tps65010: version 2 May 2005
[ 3.566484] tps65010: no chip?
[ 3.589352] SCSI subsystem initialized
[ 3.590243] ACPI: bus type ATA registered
[ 3.594443] libata version 3.00 loaded.
[ 3.601768] media: Linux media interface: v0.10
[ 3.603557] Linux video capture interface: v2.00
[ 3.608594] pps_core: LinuxPPS API ver. 1 registered
[ 3.609246] pps_core: Software ver. 5.3.6 - Copyright 2005-2007 Rodolfo Giometti <giometti@linux.it>
[ 3.610851] PTP clock support registered
[ 3.616650] EDAC MC: Ver: 3.0.0
[ 3.637542] Advanced Linux Sound Architecture Driver Initialized.
[ 3.638238] PCI: Using ACPI for IRQ routing
[ 3.639169] PCI: pci_cache_line_size set to 64 bytes
[ 3.642963] e820: reserve RAM buffer [mem 0x0009fc00-0x0009ffff]
[ 3.644839] e820: reserve RAM buffer [mem 0x0fffe000-0x0fffffff]
[ 3.698966] NET: Registered protocol family 23
[ 3.702170] NET: Registered protocol family 8
[ 3.704299] NET: Registered protocol family 20
[ 3.731345] cfg80211: Calling CRDA to update world regulatory domain
[ 3.773571] Switched to clocksource hpet
[ 3.776000] FS-Cache: Loaded
[ 3.776000] pnp: PnP ACPI init
[ 3.776000] ACPI: bus type PNP registered
[ 3.832897] pnp 00:00: Plug and Play ACPI device, IDs PNP0b00 (active)
[ 3.838511] pnp 00:01: Plug and Play ACPI device, IDs PNP0303 (active)
[ 3.860343] pnp 00:02: Plug and Play ACPI device, IDs PNP0f13 (active)
[ 3.873476] pnp 00:03: [dma 2]
[ 3.891057] pnp 00:03: Plug and Play ACPI device, IDs PNP0700 (active)
[ 3.910630] pnp 00:04: Plug and Play ACPI device, IDs PNP0400 (active)
[ 3.918024] pnp 00:05: Plug and Play ACPI device, IDs PNP0501 (active)
[ 3.974434] pnp 00:06: Plug and Play ACPI device, IDs PNP0103 (active)
[ 4.012167] pnp: PnP ACPI: found 7 devices
[ 4.012958] ACPI: bus type PNP unregistered
[ 4.080538] pci_bus 0000:00: resource 4 [io 0x0000-0x0cf7]
[ 4.081297] pci_bus 0000:00: resource 5 [io 0x0d00-0xffff]
[ 4.081956] pci_bus 0000:00: resource 6 [mem 0x000a0000-0x000bffff]
[ 4.083115] pci_bus 0000:00: resource 7 [mem 0x80000000-0xfebfffff]
[ 4.084530] NET: Registered protocol family 1
[ 4.085446] pci 0000:00:00.0: Limiting direct PCI/PCI transfers
[ 4.086251] pci 0000:00:01.0: PIIX3: Enabling Passive Release
[ 4.100585] pci 0000:00:01.0: Activating ISA DMA hang workarounds
[ 4.101801] pci 0000:00:02.0: Boot video device
[ 4.103454] PCI: CLS 0 bytes, default 64
[ 4.145245] Trying to unpack rootfs image as initramfs...
[ 34.195346] [sched_delayed] sched: RT throttling activated
[ 42.499381] Freeing initrd memory: 23656K (ffff88000e8d6000 - ffff88000fff0000)
[ 44.077069] DMA-API: preallocated 65536 debug entries
[ 44.077757] DMA-API: debugging enabled by kernel config
[ 44.097022] Scanning for low memory corruption every 60 seconds
[ 44.115975] cryptomgr_test (18) used greatest stack depth: 7000 bytes left
[ 44.183775] sha1_ssse3: Neither AVX nor SSSE3 is available/usable.
[ 44.184626] PCLMULQDQ-NI instructions are not detected.
[ 44.185317] sha256_ssse3: Neither AVX nor SSSE3 is available/usable.
[ 44.186124] sha512_ssse3: Neither AVX nor SSSE3 is available/usable.
[ 44.187382] AVX or AES-NI instructions are not detected.
[ 44.188086] AVX instructions are not detected.
[ 44.188687] AVX instructions are not detected.
[ 44.189280] AVX instructions are not detected.
[ 44.240391] Initializing RT-Tester: OK
[ 44.268286] HugeTLB registered 2 MB page size, pre-allocated 0 pages
[ 44.280087] VFS: Disk quotas dquot_6.5.2
[ 44.281141] Dquot-cache hash table entries: 512 (order 0, 4096 bytes)
[ 44.299210] squashfs: version 4.0 (2009/01/31) Phillip Lougher
[ 44.327397] EFS: 1.0a - http://aeschi.ch.eu.org/efs/
[ 44.330090] ROMFS MTD (C) 2007 Red Hat, Inc.
[ 44.331909] QNX4 filesystem 0.2.3 registered.
[ 44.332794] QNX6 filesystem 1.0.0 registered.
[ 44.333351] SGI XFS with ACLs, security attributes, realtime, large block/inode numbers, debug enabled
[ 44.348187] NILFS version 2 loaded
[ 44.348794] BeFS version: 0.9.3
[ 44.349635] OCFS2 1.5.0
[ 44.360488] ocfs2 stack glue: unable to register sysctl
[ 44.361477] ocfs2: Registered cluster interface o2cb
[ 44.362190] OCFS2 DLMFS 1.5.0
[ 44.365764] OCFS2 User DLM kernel interface loaded
[ 44.366440] OCFS2 Node Manager 1.5.0
[ 44.460539] OCFS2 DLM 1.5.0
[ 44.467500] bio: create slab <bio-1> at 1
[ 44.476321] Btrfs loaded
[ 44.476776] btrfs: selftest: Running btrfs free space cache tests
[ 44.477720] btrfs: selftest: Running extent only tests
[ 44.483770] btrfs: selftest: Running bitmap only tests
[ 44.489306] btrfs: selftest: Running bitmap and extent tests
[ 44.493639] btrfs: selftest: Free space cache tests finished
[ 44.509802] GFS2 installed
[ 44.516283] msgmni has been set to 431
[ 44.621745] NET: Registered protocol family 38
[ 44.623929] async_tx: api initialized (async)
[ 44.624926] Key type asymmetric registered
[ 44.625733] Asymmetric key parser 'x509' registered
[ 44.627876] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 250)
[ 44.629195] io scheduler noop registered
[ 44.629794] io scheduler deadline registered (default)
[ 44.716528] no IO addresses supplied
[ 44.721807] hgafb: HGA card not detected.
[ 44.723960] hgafb: probe of hgafb.0 failed with error -22
[ 44.753026] kworker/u2:0 (96) used greatest stack depth: 6592 bytes left
[ 44.761159] uvesafb: failed to execute /sbin/v86d
[ 44.761826] uvesafb: make sure that the v86d helper is installed and executable
[ 44.763471] uvesafb: Getting VBE info block failed (eax=0x4f00, err=-2)
[ 44.764455] uvesafb: vbe_init() failed with -22
[ 44.765544] uvesafb: probe of uvesafb.0 failed with error -22
[ 44.769744] ipmi message handler version 39.2
[ 44.772175] IPMI System Interface driver.
[ 44.776833] ipmi_si: Adding default-specified kcs state machine
[ 44.777967] ipmi_si: Trying default-specified kcs state machine at i/o address 0xca2, slave address 0x0, irq 0
[ 44.780654] ipmi_si: Interface detection failed
[ 44.783552] ipmi_si: Adding default-specified smic state machine
[ 44.784401] ipmi_si: Trying default-specified smic state machine at i/o address 0xca9, slave address 0x0, irq 0
[ 44.785865] ipmi_si: Interface detection failed
[ 44.787132] ipmi_si: Adding default-specified bt state machine
[ 44.787945] ipmi_si: Trying default-specified bt state machine at i/o address 0xe4, slave address 0x0, irq 0
[ 44.789754] ipmi_si: Interface detection failed
[ 44.795641] ipmi_si: Unable to find any System Interface(s)
[ 44.798000] IPMI Watchdog: driver initialized
[ 44.813226] input: Power Button as /devices/LNXSYSTM:00/LNXPWRBN:00/input/input0
[ 44.815269] ACPI: Power Button [PWRF]
[ 45.679728] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[ 45.713049] 00:05: ttyS0 at I/O 0x3f8 (irq = 4) is a 16550A
[ 45.748053] Non-volatile memory driver v1.3
[ 45.765803] ppdev: user-space parallel port driver
[ 45.767546] telclk_interrupt = 0xf non-mcpbl0010 hw.
[ 45.780392] [drm:drm_core_init] *ERROR* Cannot create /proc/dri
[ 45.988747] brd: module loaded
[ 46.015402] nbd: registered device at major 43
[ 46.212461] lkdtm: No crash points registered, enable through debugfs
[ 46.243236] Uniform Multi-Platform E-IDE driver
[ 46.246280] ide_generic: please use "probe_mask=0x3f" module parameter for probing all legacy ISA IDE ports
[ 46.248034] ide-gd driver 1.18
[ 46.249286] ide-cd driver 5.00
[ 46.261466] hp_sw: device handler registered
[ 46.262210] emc: device handler registered
[ 46.268763] SCSI Media Changer driver v0.25
[ 46.272567] osd: LOADED open-osd 0.2.1
[ 46.279919] HSI/SSI char device loaded
[ 46.308207] Floppy drive(s): fd0 is 1.44M
[ 46.314074] eql: Equalizer2002: Simon Janes (simon@ncm.com) and David S. Miller (davem@redhat.com)
[ 46.387582] libphy: Fixed MDIO Bus: probed
[ 46.404906] tun: Universal TUN/TAP device driver, 1.6
[ 46.405499] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
[ 46.408911] arcnet loaded.
[ 46.409432] arcnet: RFC1201 "standard" (`a') encapsulation support loaded.
[ 46.410235] arcnet: RFC1051 "simple standard" (`s') encapsulation support loaded.
[ 46.411529] arcnet: cap mode (`c') encapsulation support loaded.
[ 46.412654] arcnet: COM90xx chipset support
[ 46.744068] S3: No ARCnet cards found.
[ 46.745548] arcnet: COM90xx IO-mapped mode support (by David Woodhouse et el.)
[ 46.746268] E-mail me if you actually test this driver, please!
[ 46.747481] arc%d: No autoprobe for IO mapped cards; you must specify the base address!
[ 46.750271] arcnet: RIM I (entirely mem-mapped) support
[ 46.751440] E-mail me if you actually test the RIM I driver, please!
[ 46.752167] Given: node 00h, shmem 0h, irq 0
[ 46.752674] No autoprobe for RIM I; you must specify the shmem and irq!
[ 46.754095] YAM driver version 0.8 by F1OAT/F6FBB
[ 46.784442] AX.25: bpqether driver version 004
[ 46.785082] baycom_ser_fdx: (C) 1996-2000 Thomas Sailer, HB9JNX/AE4WA
[ 46.785082] baycom_ser_fdx: version 0.10
[ 46.821407] hdlcdrv: (C) 1996-2000 Thomas Sailer HB9JNX/AE4WA
[ 46.822121] hdlcdrv: version 0.8
[ 46.822546] baycom_ser_hdx: (C) 1996-2000 Thomas Sailer, HB9JNX/AE4WA
[ 46.822546] baycom_ser_hdx: version 0.10
[ 46.855930] baycom_par: (C) 1996-2000 Thomas Sailer, HB9JNX/AE4WA
[ 46.855930] baycom_par: version 0.9
[ 46.897296] PPP generic driver version 2.4.2
[ 46.904769] PPP MPPE Compression module registered
[ 46.905435] NET: Registered protocol family 24
[ 46.908913] airo(): Probing for PCI adapters
[ 46.911151] airo(): Finished probing for PCI adapters
[ 46.913889] Broadcom 43xx driver loaded [ Features: PML ]
[ 46.915513] Broadcom 43xx-legacy driver loaded [ Features: PLID ]
[ 46.923090] libertas_sdio: Libertas SDIO driver
[ 46.923776] libertas_sdio: Copyright Pierre Ossman
[ 46.925562] libertas_spi: Libertas SPI driver
[ 46.936391] i8042: PNP: PS/2 Controller [PNP0303:KBD,PNP0f13:MOU] at 0x60,0x64 irq 1,12
[ 46.953601] serio: i8042 KBD port at 0x60,0x64 irq 1
[ 46.955703] serio: i8042 AUX port at 0x60,0x64 irq 12
[ 46.957344] parkbd: no such parport
[ 46.968986] evbug: Connected device: input0 (Power Button at LNXPWRBN/button/input0)
[ 47.017887] input: PC Speaker as /devices/platform/pcspkr/input/input1
[ 47.020816] evbug: Connected device: input1 (PC Speaker at isa0061/input0)
[ 47.037521] lirc_dev: IR Remote Control driver registered, major 247
[ 47.039342] IR RC5(x) protocol handler initialized
[ 47.039884] IR JVC protocol handler initialized
[ 47.040308] IR SANYO protocol handler initialized
[ 47.040798] IR LIRC bridge handler initialized
[ 47.042230] Driver for 1-wire Dallas network protocol.
[ 47.080638] applesmc: supported laptop not found!
[ 47.081332] applesmc: driver init failed (ret=-19)!
[ 47.117564] pc87360: PC8736x not detected, module not inserted
[ 47.137647] md: linear personality registered for level -1
[ 47.138456] md: raid0 personality registered for level 0
[ 47.139762] md: raid1 personality registered for level 1
[ 47.140347] md: raid6 personality registered for level 6
[ 47.140997] md: raid5 personality registered for level 5
[ 47.141568] md: raid4 personality registered for level 4
[ 47.142216] md: multipath personality registered for level -4
[ 47.143391] md: faulty personality registered for level -5
[ 47.144566] cpuidle: using governor ladder
[ 47.145176] cpuidle: using governor menu
[ 47.146569] sdhci: Secure Digital Host Controller Interface driver
[ 47.147781] sdhci: Copyright(c) Pierre Ossman
[ 47.148319] wbsd: Winbond W83L51xD SD/MMC card interface driver
[ 47.149020] wbsd: Copyright(c) Pierre Ossman
[ 47.151873] sdhci-pltfm: SDHCI platform and OF driver helper
[ 47.180167] hidraw: raw HID events driver (C) Jiri Kosina
[ 47.218080] lirc_serial lirc_serial.0: port 03f8 already in use
[ 47.219475] lirc_serial lirc_serial.0: use 'setserial /dev/ttySX uart none'
[ 47.220303] lirc_serial lirc_serial.0: or compile the serial port driver as module and
[ 47.221122] lirc_serial lirc_serial.0: make sure this module is loaded first
[ 47.222440] lirc_serial: probe of lirc_serial.0 failed with error -16
[ 47.227547] platform lirc_serial.0: lirc_dev: driver lirc_serial registered at minor = 0
[ 47.228441] lirc_zilog: Zilog/Hauppauge IR driver initializing
[ 47.230098] lirc_zilog: initialization complete
[ 47.231601] panel: driver version 0.9.5 not yet registered
[ 47.280819] zram: Created 1 device(s) ...
[ 47.284086] logger: created 256K log 'log_main'
[ 47.286043] logger: created 256K log 'log_events'
[ 47.288655] logger: created 256K log 'log_radio'
[ 47.291376] logger: created 256K log 'log_system'
[ 47.293147] hdaps: supported laptop not found!
[ 47.293669] hdaps: driver init failed (ret=-19)!
[ 47.568139] no UART detected at 0x1
[ 47.612819] NET: Registered protocol family 26
[ 47.614330] GACT probability NOT on
[ 47.615872] Mirror/redirect action on
[ 47.626253] netem: version 1.3
[ 47.627639] u32 classifier
[ 47.628006] Actions configured
[ 47.632440] NET: Registered protocol family 17
[ 47.640782] NET: Registered protocol family 5
[ 47.676136] NET: Registered protocol family 6
[ 47.762447] NET: Registered protocol family 11
[ 47.765364] NET: Registered protocol family 3
[ 47.766454] lec:lane_module_init: lec.c: initialized
[ 47.767490] lib80211: common routines for IEEE802.11 drivers
[ 47.768543] lib80211_crypt: registered algorithm 'NULL'
[ 47.770170] lib80211_crypt: registered algorithm 'WEP'
[ 47.771438] lib80211_crypt: registered algorithm 'CCMP'
[ 47.772119] lib80211_crypt: registered algorithm 'TKIP'
[ 47.775643] 9pnet: Installing 9P2000 support
[ 47.777374] NET: Registered protocol family 36
[ 47.792934] batman_adv: B.A.T.M.A.N. advanced 2013.3.0 (compatibility version 14) loaded
[ 47.793913] openvswitch: Open vSwitch switching datapath
[ 47.808716]
[ 47.808716] printing PIC contents
[ 47.810369] ... PIC IMR: edb8
[ 47.810948] ... PIC IRR: 0001
[ 47.811975] ... PIC ISR: 0000
[ 47.812400] ... PIC ELCR: 0200
[ 47.827773] registered taskstats version 1
[ 47.862183] cryptomgr_probe (100) used greatest stack depth: 6216 bytes left
[ 47.865793] Key type trusted registered
[ 47.876048] Key type encrypted registered
[ 47.896241] raid6test: testing the 4-disk case...
[ 47.904279] raid6test: test_disks(0, 1): faila= 0(D) failb= 1(D) OK
[ 47.907217] raid6test: test_disks(0, 2): faila= 0(D) failb= 2(P) OK
[ 47.908896] raid6test: test_disks(0, 3): faila= 0(D) failb= 3(Q) OK
[ 47.912130] raid6test: test_disks(1, 2): faila= 1(D) failb= 2(P) OK
[ 47.913293] raid6test: test_disks(1, 3): faila= 1(D) failb= 3(Q) OK
[ 47.915321] raid6test: test_disks(2, 3): faila= 2(P) failb= 3(Q) OK
[ 47.918568] raid6test: testing the 5-disk case...
[ 47.923573] raid6test: test_disks(0, 1): faila= 0(D) failb= 1(D) OK
[ 47.925335] raid6test: test_disks(0, 2): faila= 0(D) failb= 2(D) OK
[ 47.927548] raid6test: test_disks(0, 3): faila= 0(D) failb= 3(P) OK
[ 47.929971] raid6test: test_disks(0, 4): faila= 0(D) failb= 4(Q) OK
[ 47.932285] raid6test: test_disks(1, 2): faila= 1(D) failb= 2(D) OK
[ 47.933972] raid6test: test_disks(1, 3): faila= 1(D) failb= 3(P) OK
[ 47.936051] raid6test: test_disks(1, 4): faila= 1(D) failb= 4(Q) OK
[ 47.937728] raid6test: test_disks(2, 3): faila= 2(D) failb= 3(P) OK
[ 47.940660] raid6test: test_disks(2, 4): faila= 2(D) failb= 4(Q) OK
[ 47.942122] raid6test: test_disks(3, 4): faila= 3(P) failb= 4(Q) OK
[ 47.947752] raid6test: testing the 11-disk case...
[ 47.956333] raid6test: test_disks(0, 1): faila= 0(D) failb= 1(D) OK
[ 47.958692] raid6test: test_disks(0, 2): faila= 0(D) failb= 2(D) OK
[ 47.963263] raid6test: test_disks(0, 3): faila= 0(D) failb= 3(D) OK
[ 47.965513] raid6test: test_disks(0, 4): faila= 0(D) failb= 4(D) OK
[ 47.968339] raid6test: test_disks(0, 5): faila= 0(D) failb= 5(D) OK
[ 47.972133] raid6test: test_disks(0, 6): faila= 0(D) failb= 6(D) OK
[ 47.974326] raid6test: test_disks(0, 7): faila= 0(D) failb= 7(D) OK
[ 47.977310] raid6test: test_disks(0, 8): faila= 0(D) failb= 8(D) OK
[ 47.980880] raid6test: test_disks(0, 9): faila= 0(D) failb= 9(P) OK
[ 47.983269] raid6test: test_disks(0, 10): faila= 0(D) failb= 10(Q) OK
[ 47.985584] raid6test: test_disks(1, 2): faila= 1(D) failb= 2(D) OK
[ 47.988597] raid6test: test_disks(1, 3): faila= 1(D) failb= 3(D) OK
[ 47.992511] raid6test: test_disks(1, 4): faila= 1(D) failb= 4(D) OK
[ 47.994417] raid6test: test_disks(1, 5): faila= 1(D) failb= 5(D) OK
[ 47.997194] raid6test: test_disks(1, 6): faila= 1(D) failb= 6(D) OK
[ 48.001119] raid6test: test_disks(1, 7): faila= 1(D) failb= 7(D) OK
[ 48.003971] raid6test: test_disks(1, 8): faila= 1(D) failb= 8(D) OK
[ 48.006181] raid6test: test_disks(1, 9): faila= 1(D) failb= 9(P) OK
[ 48.010014] raid6test: test_disks(1, 10): faila= 1(D) failb= 10(Q) OK
[ 48.012915] raid6test: test_disks(2, 3): faila= 2(D) failb= 3(D) OK
[ 48.015366] raid6test: test_disks(2, 4): faila= 2(D) failb= 4(D) OK
[ 48.017699] raid6test: test_disks(2, 5): faila= 2(D) failb= 5(D) OK
[ 48.021349] raid6test: test_disks(2, 6): faila= 2(D) failb= 6(D) OK
[ 48.024015] raid6test: test_disks(2, 7): faila= 2(D) failb= 7(D) OK
[ 48.026278] raid6test: test_disks(2, 8): faila= 2(D) failb= 8(D) OK
[ 48.029834] raid6test: test_disks(2, 9): faila= 2(D) failb= 9(P) OK
[ 48.032926] raid6test: test_disks(2, 10): faila= 2(D) failb= 10(Q) OK
[ 48.035064] raid6test: test_disks(3, 4): faila= 3(D) failb= 4(D) OK
[ 48.035064] raid6test: test_disks(3, 5): faila= 3(D) failb= 5(D) OK
[ 48.041422] raid6test: test_disks(3, 6): faila= 3(D) failb= 6(D) OK
[ 48.044919] raid6test: test_disks(3, 7): faila= 3(D) failb= 7(D) OK
[ 48.047949] raid6test: test_disks(3, 8): faila= 3(D) failb= 8(D) OK
[ 48.051663] raid6test: test_disks(3, 9): faila= 3(D) failb= 9(P) OK
[ 48.053804] raid6test: test_disks(3, 10): faila= 3(D) failb= 10(Q) OK
[ 48.056604] raid6test: test_disks(4, 5): faila= 4(D) failb= 5(D) OK
[ 48.060226] raid6test: test_disks(4, 6): faila= 4(D) failb= 6(D) OK
[ 48.062538] raid6test: test_disks(4, 7): faila= 4(D) failb= 7(D) OK
[ 48.065324] raid6test: test_disks(4, 8): faila= 4(D) failb= 8(D) OK
[ 48.068061] raid6test: test_disks(4, 9): faila= 4(D) failb= 9(P) OK
[ 48.071377] raid6test: test_disks(4, 10): faila= 4(D) failb= 10(Q) OK
[ 48.073681] raid6test: test_disks(5, 6): faila= 5(D) failb= 6(D) OK
[ 48.076637] raid6test: test_disks(5, 7): faila= 5(D) failb= 7(D) OK
[ 48.080143] raid6test: test_disks(5, 8): faila= 5(D) failb= 8(D) OK
[ 48.082385] raid6test: test_disks(5, 9): faila= 5(D) failb= 9(P) OK
[ 48.085101] raid6test: test_disks(5, 10): faila= 5(D) failb= 10(Q) OK
[ 48.087839] raid6test: test_disks(6, 7): faila= 6(D) failb= 7(D) OK
[ 48.091358] raid6test: test_disks(6, 8): faila= 6(D) failb= 8(D) OK
[ 48.093585] raid6test: test_disks(6, 9): faila= 6(D) failb= 9(P) OK
[ 48.096302] raid6test: test_disks(6, 10): faila= 6(D) failb= 10(Q) OK
[ 48.098796] raid6test: test_disks(7, 8): faila= 7(D) failb= 8(D) OK
[ 48.102261] raid6test: test_disks(7, 9): faila= 7(D) failb= 9(P) OK
[ 48.104864] raid6test: test_disks(7, 10): faila= 7(D) failb= 10(Q) OK
[ 48.107732] raid6test: test_disks(8, 9): faila= 8(D) failb= 9(P) OK
[ 48.110569] raid6test: test_disks(8, 10): faila= 8(D) failb= 10(Q) OK
[ 48.113240] raid6test: test_disks(9, 10): faila= 9(P) failb= 10(Q) OK
[ 48.127567] raid6test: testing the 12-disk case...
[ 48.130817] raid6test: test_disks(0, 1): faila= 0(D) failb= 1(D) OK
[ 48.133653] raid6test: test_disks(0, 2): faila= 0(D) failb= 2(D) OK
[ 48.136663] raid6test: test_disks(0, 3): faila= 0(D) failb= 3(D) OK
[ 48.140210] raid6test: test_disks(0, 4): faila= 0(D) failb= 4(D) OK
[ 48.142795] raid6test: test_disks(0, 5): faila= 0(D) failb= 5(D) OK
[ 48.145692] raid6test: test_disks(0, 6): faila= 0(D) failb= 6(D) OK
[ 48.148593] raid6test: test_disks(0, 7): faila= 0(D) failb= 7(D) OK
[ 48.152365] raid6test: test_disks(0, 8): faila= 0(D) failb= 8(D) OK
[ 48.155165] raid6test: test_disks(0, 9): faila= 0(D) failb= 9(D) OK
[ 48.157455] raid6test: test_disks(0, 10): faila= 0(D) failb= 10(P) OK
[ 48.161371] raid6test: test_disks(0, 11): faila= 0(D) failb= 11(Q) OK
[ 48.164324] raid6test: test_disks(1, 2): faila= 1(D) failb= 2(D) OK
[ 48.167253] raid6test: test_disks(1, 3): faila= 1(D) failb= 3(D) OK
[ 48.170332] raid6test: test_disks(1, 4): faila= 1(D) failb= 4(D) OK
[ 48.173208] raid6test: test_disks(1, 5): faila= 1(D) failb= 5(D) OK
[ 48.176240] raid6test: test_disks(1, 6): faila= 1(D) failb= 6(D) OK
[ 48.178806] raid6test: test_disks(1, 7): faila= 1(D) failb= 7(D) OK
[ 48.182297] raid6test: test_disks(1, 8): faila= 1(D) failb= 8(D) OK
[ 48.185245] raid6test: test_disks(1, 9): faila= 1(D) failb= 9(D) OK
[ 48.188106] raid6test: test_disks(1, 10): faila= 1(D) failb= 10(P) OK
[ 48.191675] raid6test: test_disks(1, 11): faila= 1(D) failb= 11(Q) OK
[ 48.194040] raid6test: test_disks(2, 3): faila= 2(D) failb= 3(D) OK
[ 48.196927] raid6test: test_disks(2, 4): faila= 2(D) failb= 4(D) OK
[ 48.200654] raid6test: test_disks(2, 5): faila= 2(D) failb= 5(D) OK
[ 48.203480] raid6test: test_disks(2, 6): faila= 2(D) failb= 6(D) OK
[ 48.205875] raid6test: test_disks(2, 7): faila= 2(D) failb= 7(D) OK
[ 48.208759] raid6test: test_disks(2, 8): faila= 2(D) failb= 8(D) OK
[ 48.212373] raid6test: test_disks(2, 9): faila= 2(D) failb= 9(D) OK
[ 48.215232] raid6test: test_disks(2, 10): faila= 2(D) failb= 10(P) OK
[ 48.217467] raid6test: test_disks(2, 11): faila= 2(D) failb= 11(Q) OK
[ 48.220998] raid6test: test_disks(3, 4): faila= 3(D) failb= 4(D) OK
[ 48.223919] raid6test: test_disks(3, 5): faila= 3(D) failb= 5(D) OK
[ 48.226271] raid6test: test_disks(3, 6): faila= 3(D) failb= 6(D) OK
[ 48.229802] raid6test: test_disks(3, 7): faila= 3(D) failb= 7(D) OK
[ 48.232884] raid6test: test_disks(3, 8): faila= 3(D) failb= 8(D) OK
[ 48.235704] raid6test: test_disks(3, 9): faila= 3(D) failb= 9(D) OK
[ 48.237977] raid6test: test_disks(3, 10): faila= 3(D) failb= 10(P) OK
[ 48.241698] raid6test: test_disks(3, 11): faila= 3(D) failb= 11(Q) OK
[ 48.244628] raid6test: test_disks(4, 5): faila= 4(D) failb= 5(D) OK
[ 48.247540] raid6test: test_disks(4, 6): faila= 4(D) failb= 6(D) OK
[ 48.250796] raid6test: test_disks(4, 7): faila= 4(D) failb= 7(D) OK
[ 48.253565] raid6test: test_disks(4, 8): faila= 4(D) failb= 8(D) OK
[ 48.256587] raid6test: test_disks(4, 9): faila= 4(D) failb= 9(D) OK
[ 48.260110] raid6test: test_disks(4, 10): faila= 4(D) failb= 10(P) OK
[ 48.262353] raid6test: test_disks(4, 11): faila= 4(D) failb= 11(Q) OK
[ 48.265320] raid6test: test_disks(5, 6): faila= 5(D) failb= 6(D) OK
[ 48.268121] raid6test: test_disks(5, 7): faila= 5(D) failb= 7(D) OK
[ 48.271901] raid6test: test_disks(5, 8): faila= 5(D) failb= 8(D) OK
[ 48.274253] raid6test: test_disks(5, 9): faila= 5(D) failb= 9(D) OK
[ 48.277111] raid6test: test_disks(5, 10): faila= 5(D) failb= 10(P) OK
[ 48.280743] raid6test: test_disks(5, 11): faila= 5(D) failb= 11(Q) OK
[ 48.283571] raid6test: test_disks(6, 7): faila= 6(D) failb= 7(D) OK
[ 48.285937] raid6test: test_disks(6, 8): faila= 6(D) failb= 8(D) OK
[ 48.289734] raid6test: test_disks(6, 9): faila= 6(D) failb= 9(D) OK
[ 48.292600] raid6test: test_disks(6, 10): faila= 6(D) failb= 10(P) OK
[ 48.295470] raid6test: test_disks(6, 11): faila= 6(D) failb= 11(Q) OK
[ 48.297901] raid6test: test_disks(7, 8): faila= 7(D) failb= 8(D) OK
[ 48.301581] raid6test: test_disks(7, 9): faila= 7(D) failb= 9(D) OK
[ 48.304603] raid6test: test_disks(7, 10): faila= 7(D) failb= 10(P) OK
[ 48.307411] raid6test: test_disks(7, 11): faila= 7(D) failb= 11(Q) OK
[ 48.310275] raid6test: test_disks(8, 9): faila= 8(D) failb= 9(D) OK
[ 48.312948] raid6test: test_disks(8, 10): faila= 8(D) failb= 10(P) OK
[ 48.315117] raid6test: test_disks(8, 11): faila= 8(D) failb= 11(Q) OK
[ 48.322103] raid6test: test_disks(9, 10): faila= 9(D) failb= 10(P) OK
[ 48.324751] raid6test: test_disks(9, 11): faila= 9(D) failb= 11(Q) OK
[ 48.327670] raid6test: test_disks(10, 11): faila= 10(P) failb= 11(Q) OK
[ 48.336174] raid6test: testing the 16-disk case...
[ 48.341133] raid6test: test_disks(0, 1): faila= 0(D) failb= 1(D) OK
[ 48.345115] raid6test: test_disks(0, 2): faila= 0(D) failb= 2(D) OK
[ 48.352994] raid6test: test_disks(0, 3): faila= 0(D) failb= 3(D) OK
[ 48.361017] raid6test: test_disks(0, 4): faila= 0(D) failb= 4(D) OK
[ 48.368053] raid6test: test_disks(0, 5): faila= 0(D) failb= 5(D) OK
[ 48.375922] raid6test: test_disks(0, 6): faila= 0(D) failb= 6(D) OK
[ 48.378506] raid6test: test_disks(0, 7): faila= 0(D) failb= 7(D) OK
[ 48.382380] raid6test: test_disks(0, 8): faila= 0(D) failb= 8(D) OK
[ 48.385644] raid6test: test_disks(0, 9): faila= 0(D) failb= 9(D) OK
[ 48.388857] raid6test: test_disks(0, 10): faila= 0(D) failb= 10(D) OK
[ 48.392422] raid6test: test_disks(0, 11): faila= 0(D) failb= 11(D) OK
[ 48.395404] raid6test: test_disks(0, 12): faila= 0(D) failb= 12(D) OK
[ 48.398040] raid6test: test_disks(0, 13): faila= 0(D) failb= 13(D) OK
[ 48.401870] raid6test: test_disks(0, 14): faila= 0(D) failb= 14(P) OK
[ 48.404709] raid6test: test_disks(0, 15): faila= 0(D) failb= 15(Q) OK
[ 48.407939] raid6test: test_disks(1, 2): faila= 1(D) failb= 2(D) OK
[ 48.411688] raid6test: test_disks(1, 3): faila= 1(D) failb= 3(D) OK
[ 48.414245] raid6test: test_disks(1, 4): faila= 1(D) failb= 4(D) OK
[ 48.417232] raid6test: test_disks(1, 5): faila= 1(D) failb= 5(D) OK
[ 48.420951] raid6test: test_disks(1, 6): faila= 1(D) failb= 6(D) OK
[ 48.423976] raid6test: test_disks(1, 7): faila= 1(D) failb= 7(D) OK
[ 48.426517] raid6test: test_disks(1, 8): faila= 1(D) failb= 8(D) OK
[ 48.430209] raid6test: test_disks(1, 9): faila= 1(D) failb= 9(D) OK
[ 48.433142] raid6test: test_disks(1, 10): faila= 1(D) failb= 10(D) OK
[ 48.436119] raid6test: test_disks(1, 11): faila= 1(D) failb= 11(D) OK
[ 48.439936] raid6test: test_disks(1, 12): faila= 1(D) failb= 12(D) OK
[ 48.442442] raid6test: test_disks(1, 13): faila= 1(D) failb= 13(D) OK
[ 48.445421] raid6test: test_disks(1, 14): faila= 1(D) failb= 14(P) OK
[ 48.448337] raid6test: test_disks(1, 15): faila= 1(D) failb= 15(Q) OK
[ 48.452238] raid6test: test_disks(2, 3): faila= 2(D) failb= 3(D) OK
[ 48.455142] raid6test: test_disks(2, 4): faila= 2(D) failb= 4(D) OK
[ 48.457730] raid6test: test_disks(2, 5): faila= 2(D) failb= 5(D) OK
[ 48.461587] raid6test: test_disks(2, 6): faila= 2(D) failb= 6(D) OK
[ 48.467737] raid6test: test_disks(2, 7): faila= 2(D) failb= 7(D) OK
[ 48.471344] raid6test: test_disks(2, 8): faila= 2(D) failb= 8(D) OK
[ 48.473941] raid6test: test_disks(2, 9): faila= 2(D) failb= 9(D) OK
[ 48.476910] raid6test: test_disks(2, 10): faila= 2(D) failb= 10(D) OK
[ 48.480572] raid6test: test_disks(2, 11): faila= 2(D) failb= 11(D) OK
[ 48.483582] raid6test: test_disks(2, 12): faila= 2(D) failb= 12(D) OK
[ 48.486057] raid6test: test_disks(2, 13): faila= 2(D) failb= 13(D) OK
[ 48.489680] raid6test: test_disks(2, 14): faila= 2(D) failb= 14(P) OK
[ 48.492546] raid6test: test_disks(2, 15): faila= 2(D) failb= 15(Q) OK
[ 48.495487] raid6test: test_disks(3, 4): faila= 3(D) failb= 4(D) OK
[ 48.498059] raid6test: test_disks(3, 5): faila= 3(D) failb= 5(D) OK
[ 48.502006] raid6test: test_disks(3, 6): faila= 3(D) failb= 6(D) OK
[ 48.505067] raid6test: test_disks(3, 7): faila= 3(D) failb= 7(D) OK
[ 48.508119] raid6test: test_disks(3, 8): faila= 3(D) failb= 8(D) OK
[ 48.511990] raid6test: test_disks(3, 9): faila= 3(D) failb= 9(D) OK
[ 48.514573] raid6test: test_disks(3, 10): faila= 3(D) failb= 10(D) OK
[ 48.517630] raid6test: test_disks(3, 11): faila= 3(D) failb= 11(D) OK
[ 48.521402] raid6test: test_disks(3, 12): faila= 3(D) failb= 12(D) OK
[ 48.524453] raid6test: test_disks(3, 13): faila= 3(D) failb= 13(D) OK
[ 48.527272] raid6test: test_disks(3, 14): faila= 3(D) failb= 14(P) OK
[ 48.530358] raid6test: test_disks(3, 15): faila= 3(D) failb= 15(Q) OK
[ 48.533378] raid6test: test_disks(4, 5): faila= 4(D) failb= 5(D) OK
[ 48.536166] raid6test: test_disks(4, 6): faila= 4(D) failb= 6(D) OK
[ 48.540446] raid6test: test_disks(4, 7): faila= 4(D) failb= 7(D) OK
[ 48.543809] raid6test: test_disks(4, 8): faila= 4(D) failb= 8(D) OK
[ 48.546761] raid6test: test_disks(4, 9): faila= 4(D) failb= 9(D) OK
[ 48.551004] raid6test: test_disks(4, 10): faila= 4(D) failb= 10(D) OK
[ 48.553875] raid6test: test_disks(4, 11): faila= 4(D) failb= 11(D) OK
[ 48.557241] raid6test: test_disks(4, 12): faila= 4(D) failb= 12(D) OK
[ 48.561220] raid6test: test_disks(4, 13): faila= 4(D) failb= 13(D) OK
[ 48.564493] raid6test: test_disks(4, 14): faila= 4(D) failb= 14(P) OK
[ 48.567650] raid6test: test_disks(4, 15): faila= 4(D) failb= 15(Q) OK
[ 48.571490] raid6test: test_disks(5, 6): faila= 5(D) failb= 6(D) OK
[ 48.574328] raid6test: test_disks(5, 7): faila= 5(D) failb= 7(D) OK
[ 48.577605] raid6test: test_disks(5, 8): faila= 5(D) failb= 8(D) OK
[ 48.581703] raid6test: test_disks(5, 9): faila= 5(D) failb= 9(D) OK
[ 48.584912] raid6test: test_disks(5, 10): faila= 5(D) failb= 10(D) OK
[ 48.588279] raid6test: test_disks(5, 11): faila= 5(D) failb= 11(D) OK
[ 48.592316] raid6test: test_disks(5, 12): faila= 5(D) failb= 12(D) OK
[ 48.595710] raid6test: test_disks(5, 13): faila= 5(D) failb= 13(D) OK
[ 48.598484] raid6test: test_disks(5, 14): faila= 5(D) failb= 14(P) OK
[ 48.602403] raid6test: test_disks(5, 15): faila= 5(D) failb= 15(Q) OK
[ 48.605695] raid6test: test_disks(6, 7): faila= 6(D) failb= 7(D) OK
[ 48.608924] raid6test: test_disks(6, 8): faila= 6(D) failb= 8(D) OK
[ 48.613266] raid6test: test_disks(6, 9): faila= 6(D) failb= 9(D) OK
[ 48.616179] raid6test: test_disks(6, 10): faila= 6(D) failb= 10(D) OK
[ 48.620582] raid6test: test_disks(6, 11): faila= 6(D) failb= 11(D) OK
[ 48.623806] raid6test: test_disks(6, 12): faila= 6(D) failb= 12(D) OK
[ 48.626755] raid6test: test_disks(6, 13): faila= 6(D) failb= 13(D) OK
[ 48.630536] raid6test: test_disks(6, 14): faila= 6(D) failb= 14(P) OK
[ 48.633696] raid6test: test_disks(6, 15): faila= 6(D) failb= 15(Q) OK
[ 48.637038] raid6test: test_disks(7, 8): faila= 7(D) failb= 8(D) OK
[ 48.640788] raid6test: test_disks(7, 9): faila= 7(D) failb= 9(D) OK
[ 48.643793] raid6test: test_disks(7, 10): faila= 7(D) failb= 10(D) OK
[ 48.646229] raid6test: test_disks(7, 11): faila= 7(D) failb= 11(D) OK
[ 48.649748] raid6test: test_disks(7, 12): faila= 7(D) failb= 12(D) OK
[ 48.652727] raid6test: test_disks(7, 13): faila= 7(D) failb= 13(D) OK
[ 48.655459] raid6test: test_disks(7, 14): faila= 7(D) failb= 14(P) OK
[ 48.657826] raid6test: test_disks(7, 15): faila= 7(D) failb= 15(Q) OK
[ 48.661757] raid6test: test_disks(8, 9): faila= 8(D) failb= 9(D) OK
[ 48.664564] raid6test: test_disks(8, 10): faila= 8(D) failb= 10(D) OK
[ 48.667426] raid6test: test_disks(8, 11): faila= 8(D) failb= 11(D) OK
[ 48.670506] raid6test: test_disks(8, 12): faila= 8(D) failb= 12(D) OK
[ 48.673460] raid6test: test_disks(8, 13): faila= 8(D) failb= 13(D) OK
[ 48.676298] raid6test: test_disks(8, 14): faila= 8(D) failb= 14(P) OK
[ 48.679725] raid6test: test_disks(8, 15): faila= 8(D) failb= 15(Q) OK
[ 48.682240] raid6test: test_disks(9, 10): faila= 9(D) failb= 10(D) OK
[ 48.685172] raid6test: test_disks(9, 11): faila= 9(D) failb= 11(D) OK
[ 48.688090] raid6test: test_disks(9, 12): faila= 9(D) failb= 12(D) OK
[ 48.691838] raid6test: test_disks(9, 13): faila= 9(D) failb= 13(D) OK
[ 48.694241] raid6test: test_disks(9, 14): faila= 9(D) failb= 14(P) OK
[ 48.697003] raid6test: test_disks(9, 15): faila= 9(D) failb= 15(Q) OK
[ 48.700849] raid6test: test_disks(10, 11): faila= 10(D) failb= 11(D) OK
[ 48.703847] raid6test: test_disks(10, 12): faila= 10(D) failb= 12(D) OK
[ 48.706295] raid6test: test_disks(10, 13): faila= 10(D) failb= 13(D) OK
[ 48.709886] raid6test: test_disks(10, 14): faila= 10(D) failb= 14(P) OK
[ 48.712760] raid6test: test_disks(10, 15): faila= 10(D) failb= 15(Q) OK
[ 48.715693] raid6test: test_disks(11, 12): faila= 11(D) failb= 12(D) OK
[ 48.718141] raid6test: test_disks(11, 13): faila= 11(D) failb= 13(D) OK
[ 48.721901] raid6test: test_disks(11, 14): faila= 11(D) failb= 14(P) OK
[ 48.724804] raid6test: test_disks(11, 15): faila= 11(D) failb= 15(Q) OK
[ 48.727643] raid6test: test_disks(12, 13): faila= 12(D) failb= 13(D) OK
[ 48.731510] raid6test: test_disks(12, 14): faila= 12(D) failb= 14(P) OK
[ 48.733966] raid6test: test_disks(12, 15): faila= 12(D) failb= 15(Q) OK
[ 48.736913] raid6test: test_disks(13, 14): faila= 13(D) failb= 14(P) OK
[ 48.740489] raid6test: test_disks(13, 15): faila= 13(D) failb= 15(Q) OK
[ 48.743170] raid6test: test_disks(14, 15): faila= 14(P) failb= 15(Q) OK
[ 48.743795] raid6test:
[ 48.744073] raid6test: complete (257 tests, 0 failures)
[ 48.783025] FDC 0 is a S82078B
[ 48.807053] hd: no drives specified - use hd=cyl,head,sectors on kernel command line
[ 48.816646] BIOS EDD facility v0.16 2004-Jun-25, 0 devices found
[ 48.817214] EDD information not available.
[ 48.824659] ALSA device list:
[ 48.825039] #0: Dummy 1
[ 48.825297] #1: Loopback 1
[ 48.825546] #2: Virtual MIDI Card 1
[ 48.963559] Freeing unused kernel memory: 692K (ffffffff82173000 - ffffffff82220000)
[ 48.966342] Switched to clocksource tsc
[ 48.970002] kernel tried to execute NX-protected page - exploit attempt? (uid: 0)
[ 48.970851] BUG: unable to handle kernel paging request at ffffffff82196446
[ 48.970957] IP: [<ffffffff82196446>] classes_init+0x26/0x26
[ 48.970957] PGD 1e76067 PUD 1e77063 PMD f388063 PTE 8000000002196163
[ 48.970957] Oops: 0011 [#1]
[ 48.970957] CPU: 0 PID: 17 Comm: kworker/0:1 Not tainted 3.11.0-rc7-00444-gc52dd7f #23
[ 48.970957] Workqueue: events brcmf_driver_init
[ 48.970957] task: ffff8800001d2000 ti: ffff8800001d4000 task.ti: ffff8800001d4000
[ 48.970957] RIP: 0010:[<ffffffff82196446>] [<ffffffff82196446>] classes_init+0x26/0x26
[ 48.970957] RSP: 0000:ffff8800001d5d40 EFLAGS: 00000286
[ 48.970957] RAX: 0000000000000001 RBX: ffffffff820c5620 RCX: 0000000000000000
[ 48.970957] RDX: 0000000000000001 RSI: ffffffff816f7380 RDI: ffffffff820c56c0
[ 48.970957] RBP: ffff8800001d5d50 R08: ffff8800001d2508 R09: 0000000000000002
[ 48.970957] R10: 0000000000000000 R11: 0001f7ce298c5620 R12: ffff8800001c76b0
[ 48.970957] R13: ffffffff81e91d40 R14: 0000000000000000 R15: ffff88000e0ce300
[ 48.970957] FS: 0000000000000000(0000) GS:ffffffff81e84000(0000) knlGS:0000000000000000
[ 48.970957] CS: 0010 DS: 0000 ES: 0000 CR0: 000000008005003b
[ 48.970957] CR2: ffffffff82196446 CR3: 0000000001e75000 CR4: 00000000000006b0
[ 48.970957] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
[ 48.970957] DR3: 0000000000000000 DR6: 0000000000000000 DR7: 0000000000000000
[ 48.970957] Stack:
[ 48.970957] ffffffff816f7df8 ffffffff820c5620 ffff8800001d5d60 ffffffff816eeec9
[ 48.970957] ffff8800001d5de0 ffffffff81073dc5 ffffffff81073d68 ffff8800001d5db8
[ 48.970957] 0000000000000086 ffffffff820c5620 ffffffff824f7fd0 0000000000000000
[ 48.970957] Call Trace:
[ 48.970957] [<ffffffff816f7df8>] ? brcmf_sdio_init+0x18/0x70
[ 48.970957] [<ffffffff816eeec9>] brcmf_driver_init+0x9/0x10
[ 48.970957] [<ffffffff81073dc5>] process_one_work+0x1d5/0x480
[ 48.970957] [<ffffffff81073d68>] ? process_one_work+0x178/0x480
[ 48.970957] [<ffffffff81074188>] worker_thread+0x118/0x3a0
[ 48.970957] [<ffffffff81074070>] ? process_one_work+0x480/0x480
[ 48.970957] [<ffffffff8107aa17>] kthread+0xe7/0xf0
[ 48.970957] [<ffffffff810829f7>] ? finish_task_switch.constprop.57+0x37/0xd0
[ 48.970957] [<ffffffff8107a930>] ? __kthread_parkme+0x80/0x80
[ 48.970957] [<ffffffff81a6923a>] ret_from_fork+0x7a/0xb0
[ 48.970957] [<ffffffff8107a930>] ? __kthread_parkme+0x80/0x80
[ 48.970957] Code: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc <cc> cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc
[ 48.970957] RIP [<ffffffff82196446>] classes_init+0x26/0x26
[ 48.970957] RSP <ffff8800001d5d40>
[ 48.970957] CR2: ffffffff82196446
[ 48.970957] ---[ end trace 62980817cd525f14 ]---
[ 48.970957] Kernel panic - not syncing: Fatal exception
[ 48.970957] Rebooting in 10 seconds..
BUG: kernel boot crashed
Elapsed time: 75
qemu-system-x86_64 -kernel /tmp//kernel/x86_64-randconfig-c3-0828/c52dd7f94c5d5386413cb95462ac802847fa5f3a/vmlinuz-3.11.0-rc7-00444-gc52dd7f-9274 -append 'hung_task_panic=1 rcutree.rcu_cpu_stall_timeout=100 log_buf_len=8M ignore_loglevel debug sched_debug apic=debug dynamic_printk sysrq_always_enabled panic=10 prompt_ramdisk=0 console=ttyS0,115200 console=tty0 vga=normal root=/dev/ram0 rw link=/kernel-tests/run-queue/kvm/x86_64-randconfig-c3-0828/devel-cairo-x86_64-201308281454/.vmlinuz-c52dd7f94c5d5386413cb95462ac802847fa5f3a-20130828151901-4-ant branch=linux-devel/devel-cairo-x86_64-201308281454 noapic nolapic nohz=off BOOT_IMAGE=/kernel/x86_64-randconfig-c3-0828/c52dd7f94c5d5386413cb95462ac802847fa5f3a/vmlinuz-3.11.0-rc7-00444-gc52dd7f' -initrd /kernel-tests/initrd/quantal-core-x86_64.cgz -m 256M -smp 2 -net nic,vlan=0,macaddr=00:00:00:00:00:00,model=virtio -net user,vlan=0,hostfwd=tcp::13370-:22 -net nic,vlan=1,model=e1000 -net user,vlan=1 -boot order=nc -no-reboot -watchdog i6300esb -drive file=/fs/sdc1/disk0-ant-9274,media=disk,if=virtio -drive file=/fs/sdc1/disk1-ant-9274,media=disk,if=virtio -drive file=/fs/sdc1/disk2-ant-9274,media=disk,if=virtio -drive file=/fs/sdc1/disk3-ant-9274,media=disk,if=virtio -drive file=/fs/sdc1/disk4-ant-9274,media=disk,if=virtio -drive file=/fs/sdc1/disk5-ant-9274,media=disk,if=virtio -pidfile /dev/shm/kboot/pid-ant-lkp-9274 -serial file:/dev/shm/kboot/serial-ant-lkp-9274 -daemonize -display none -monitor null
[-- Attachment #3: bisect-c52dd7f94c5d5386413cb95462ac802847fa5f3a-x86_64-randconfig-c3-0828-BUG:-unable-to-handle-kernel-paging-request-at-121954.log --]
[-- Type: application/octet-stream, Size: 58152 bytes --]
[-- Attachment #4: config-3.11.0-rc7-00444-gc52dd7f --]
[-- Type: text/plain, Size: 81977 bytes --]
#
# Automatically generated file; DO NOT EDIT.
# Linux/x86_64 3.11.0-rc7 Kernel Configuration
#
CONFIG_64BIT=y
CONFIG_X86_64=y
CONFIG_X86=y
CONFIG_INSTRUCTION_DECODER=y
CONFIG_OUTPUT_FORMAT="elf64-x86-64"
CONFIG_ARCH_DEFCONFIG="arch/x86/configs/x86_64_defconfig"
CONFIG_LOCKDEP_SUPPORT=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_MMU=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_GENERIC_ISA_DMA=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y
CONFIG_GENERIC_HWEIGHT=y
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_GENERIC_CALIBRATE_DELAY=y
CONFIG_ARCH_HAS_CPU_RELAX=y
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_ARCH_HAS_CPU_AUTOPROBE=y
CONFIG_HAVE_SETUP_PER_CPU_AREA=y
CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y
CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
CONFIG_ARCH_WANT_GENERAL_HUGETLB=y
CONFIG_ZONE_DMA32=y
CONFIG_AUDIT_ARCH=y
CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_HWEIGHT_CFLAGS="-fcall-saved-rdi -fcall-saved-rsi -fcall-saved-rdx -fcall-saved-rcx -fcall-saved-r8 -fcall-saved-r9 -fcall-saved-r10 -fcall-saved-r11"
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
CONFIG_IRQ_WORK=y
CONFIG_BUILDTIME_EXTABLE_SORT=y
#
# General setup
#
CONFIG_BROKEN_ON_SMP=y
CONFIG_INIT_ENV_ARG_LIMIT=32
CONFIG_CROSS_COMPILE=""
# CONFIG_COMPILE_TEST is not set
CONFIG_LOCALVERSION=""
CONFIG_LOCALVERSION_AUTO=y
CONFIG_HAVE_KERNEL_GZIP=y
CONFIG_HAVE_KERNEL_BZIP2=y
CONFIG_HAVE_KERNEL_LZMA=y
CONFIG_HAVE_KERNEL_XZ=y
CONFIG_HAVE_KERNEL_LZO=y
CONFIG_HAVE_KERNEL_LZ4=y
# CONFIG_KERNEL_GZIP is not set
# CONFIG_KERNEL_BZIP2 is not set
# CONFIG_KERNEL_LZMA is not set
# CONFIG_KERNEL_XZ is not set
CONFIG_KERNEL_LZO=y
# CONFIG_KERNEL_LZ4 is not set
CONFIG_DEFAULT_HOSTNAME="(none)"
CONFIG_SWAP=y
CONFIG_SYSVIPC=y
CONFIG_POSIX_MQUEUE=y
# CONFIG_FHANDLE is not set
# CONFIG_AUDIT is not set
CONFIG_HAVE_GENERIC_HARDIRQS=y
#
# IRQ subsystem
#
CONFIG_GENERIC_HARDIRQS=y
CONFIG_GENERIC_IRQ_PROBE=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_DEBUG=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_SPARSE_IRQ=y
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CLOCKEVENTS_MIN_ADJUST=y
CONFIG_GENERIC_CMOS_UPDATE=y
#
# Timers subsystem
#
CONFIG_TICK_ONESHOT=y
CONFIG_NO_HZ_COMMON=y
# CONFIG_HZ_PERIODIC is not set
CONFIG_NO_HZ_IDLE=y
CONFIG_NO_HZ=y
# CONFIG_HIGH_RES_TIMERS is not set
#
# CPU/Task time and stats accounting
#
# CONFIG_TICK_CPU_ACCOUNTING is not set
# CONFIG_VIRT_CPU_ACCOUNTING_GEN is not set
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_BSD_PROCESS_ACCT=y
# CONFIG_BSD_PROCESS_ACCT_V3 is not set
CONFIG_TASKSTATS=y
# CONFIG_TASK_DELAY_ACCT is not set
CONFIG_TASK_XACCT=y
CONFIG_TASK_IO_ACCOUNTING=y
#
# RCU Subsystem
#
CONFIG_TINY_RCU=y
# CONFIG_PREEMPT_RCU is not set
CONFIG_RCU_STALL_COMMON=y
# CONFIG_TREE_RCU_TRACE is not set
CONFIG_IKCONFIG=y
CONFIG_LOG_BUF_SHIFT=17
CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
CONFIG_ARCH_WANTS_PROT_NUMA_PROT_NONE=y
CONFIG_CHECKPOINT_RESTORE=y
# CONFIG_NAMESPACES is not set
# CONFIG_SCHED_AUTOGROUP is not set
# CONFIG_SYSFS_DEPRECATED is not set
CONFIG_RELAY=y
CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_RD_GZIP=y
# CONFIG_RD_BZIP2 is not set
CONFIG_RD_LZMA=y
# CONFIG_RD_XZ is not set
CONFIG_RD_LZO=y
# CONFIG_RD_LZ4 is not set
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_ANON_INODES=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_HAVE_PCSPKR_PLATFORM=y
CONFIG_EXPERT=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_PCSPKR_PLATFORM=y
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
# CONFIG_EPOLL is not set
# CONFIG_SIGNALFD is not set
# CONFIG_TIMERFD is not set
# CONFIG_EVENTFD is not set
CONFIG_SHMEM=y
CONFIG_AIO=y
CONFIG_PCI_QUIRKS=y
CONFIG_EMBEDDED=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_PERF_USE_VMALLOC=y
#
# Kernel Performance Events And Counters
#
CONFIG_PERF_EVENTS=y
CONFIG_DEBUG_PERF_USE_VMALLOC=y
# CONFIG_VM_EVENT_COUNTERS is not set
# CONFIG_COMPAT_BRK is not set
# CONFIG_SLAB is not set
# CONFIG_SLUB is not set
CONFIG_SLOB=y
CONFIG_PROFILING=y
# CONFIG_OPROFILE is not set
CONFIG_HAVE_OPROFILE=y
CONFIG_OPROFILE_NMI_TIMER=y
# CONFIG_JUMP_LABEL is not set
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_KPROBES_ON_FTRACE=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_DMA_ATTRS=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_MIXED_BREAKPOINTS_REGS=y
CONFIG_HAVE_USER_RETURN_NOTIFIER=y
CONFIG_HAVE_PERF_EVENTS_NMI=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_HAVE_CMPXCHG_LOCAL=y
CONFIG_HAVE_CMPXCHG_DOUBLE=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_HAVE_ARCH_SOFT_DIRTY=y
CONFIG_MODULES_USE_ELF_RELA=y
#
# GCOV-based kernel profiling
#
# CONFIG_GCOV_KERNEL is not set
# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=0
# CONFIG_MODULES is not set
CONFIG_BLOCK=y
CONFIG_BLK_DEV_BSG=y
CONFIG_BLK_DEV_BSGLIB=y
CONFIG_BLK_DEV_INTEGRITY=y
#
# Partition Types
#
# CONFIG_PARTITION_ADVANCED is not set
CONFIG_AMIGA_PARTITION=y
CONFIG_MSDOS_PARTITION=y
CONFIG_EFI_PARTITION=y
#
# IO Schedulers
#
CONFIG_IOSCHED_NOOP=y
CONFIG_IOSCHED_DEADLINE=y
# CONFIG_IOSCHED_CFQ is not set
CONFIG_DEFAULT_DEADLINE=y
# CONFIG_DEFAULT_NOOP is not set
CONFIG_DEFAULT_IOSCHED="deadline"
CONFIG_ASN1=y
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_FREEZER=y
#
# Processor type and features
#
# CONFIG_ZONE_DMA is not set
# CONFIG_SMP is not set
CONFIG_X86_MPPARSE=y
CONFIG_X86_EXTENDED_PLATFORM=y
# CONFIG_X86_INTEL_LPSS is not set
# CONFIG_SCHED_OMIT_FRAME_POINTER is not set
CONFIG_HYPERVISOR_GUEST=y
CONFIG_PARAVIRT=y
CONFIG_PARAVIRT_DEBUG=y
# CONFIG_XEN is not set
# CONFIG_XEN_PRIVILEGED_GUEST is not set
CONFIG_KVM_GUEST=y
CONFIG_PARAVIRT_TIME_ACCOUNTING=y
CONFIG_PARAVIRT_CLOCK=y
CONFIG_NO_BOOTMEM=y
CONFIG_MEMTEST=y
# CONFIG_MK8 is not set
# CONFIG_MPSC is not set
# CONFIG_MCORE2 is not set
# CONFIG_MATOM is not set
CONFIG_GENERIC_CPU=y
CONFIG_X86_INTERNODE_CACHE_SHIFT=6
CONFIG_X86_L1_CACHE_SHIFT=6
CONFIG_X86_TSC=y
CONFIG_X86_CMPXCHG64=y
CONFIG_X86_CMOV=y
CONFIG_X86_MINIMUM_CPU_FAMILY=64
CONFIG_X86_DEBUGCTLMSR=y
CONFIG_PROCESSOR_SELECT=y
# CONFIG_CPU_SUP_INTEL is not set
# CONFIG_CPU_SUP_AMD is not set
CONFIG_CPU_SUP_CENTAUR=y
CONFIG_HPET_TIMER=y
# CONFIG_DMI is not set
# CONFIG_CALGARY_IOMMU is not set
CONFIG_SWIOTLB=y
CONFIG_IOMMU_HELPER=y
CONFIG_NR_CPUS=1
CONFIG_PREEMPT_NONE=y
# CONFIG_PREEMPT_VOLUNTARY is not set
# CONFIG_PREEMPT is not set
CONFIG_PREEMPT_COUNT=y
CONFIG_X86_LOCAL_APIC=y
CONFIG_X86_IO_APIC=y
CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y
# CONFIG_X86_MCE is not set
CONFIG_I8K=y
# CONFIG_MICROCODE is not set
# CONFIG_MICROCODE_INTEL_EARLY is not set
# CONFIG_MICROCODE_AMD_EARLY is not set
CONFIG_X86_MSR=y
CONFIG_X86_CPUID=y
CONFIG_ARCH_PHYS_ADDR_T_64BIT=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
# CONFIG_DIRECT_GBPAGES is not set
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_SELECT_MEMORY_MODEL=y
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM=y
CONFIG_HAVE_MEMORY_PRESENT=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSEMEM_ALLOC_MEM_MAP_TOGETHER=y
# CONFIG_SPARSEMEM_VMEMMAP is not set
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
# CONFIG_MEMORY_HOTPLUG is not set
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_BALLOON_COMPACTION=y
CONFIG_COMPACTION=y
CONFIG_MIGRATION=y
CONFIG_PHYS_ADDR_T_64BIT=y
CONFIG_ZONE_DMA_FLAG=0
CONFIG_NEED_BOUNCE_POOL=y
CONFIG_VIRT_TO_BUS=y
CONFIG_KSM=y
CONFIG_DEFAULT_MMAP_MIN_ADDR=4096
# CONFIG_TRANSPARENT_HUGEPAGE is not set
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_NEED_PER_CPU_KM=y
# CONFIG_CLEANCACHE is not set
# CONFIG_FRONTSWAP is not set
# CONFIG_ZBUD is not set
# CONFIG_MEM_SOFT_DIRTY is not set
CONFIG_X86_CHECK_BIOS_CORRUPTION=y
CONFIG_X86_BOOTPARAM_MEMORY_CORRUPTION_CHECK=y
CONFIG_X86_RESERVE_LOW=64
# CONFIG_MTRR is not set
CONFIG_ARCH_RANDOM=y
CONFIG_X86_SMAP=y
# CONFIG_EFI is not set
# CONFIG_SECCOMP is not set
CONFIG_CC_STACKPROTECTOR=y
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_HZ_300 is not set
# CONFIG_HZ_1000 is not set
CONFIG_HZ=250
# CONFIG_SCHED_HRTICK is not set
# CONFIG_KEXEC is not set
# CONFIG_CRASH_DUMP is not set
CONFIG_PHYSICAL_START=0x1000000
# CONFIG_RELOCATABLE is not set
CONFIG_PHYSICAL_ALIGN=0x1000000
# CONFIG_CMDLINE_BOOL is not set
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
#
# Power management and ACPI options
#
CONFIG_ARCH_HIBERNATION_HEADER=y
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
CONFIG_HIBERNATE_CALLBACKS=y
CONFIG_HIBERNATION=y
CONFIG_PM_STD_PARTITION=""
CONFIG_PM_SLEEP=y
# CONFIG_PM_AUTOSLEEP is not set
CONFIG_PM_WAKELOCKS=y
CONFIG_PM_WAKELOCKS_LIMIT=100
# CONFIG_PM_WAKELOCKS_GC is not set
# CONFIG_PM_RUNTIME is not set
CONFIG_PM=y
# CONFIG_PM_DEBUG is not set
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_ACPI=y
CONFIG_ACPI_SLEEP=y
# CONFIG_ACPI_EC_DEBUGFS is not set
CONFIG_ACPI_AC=y
CONFIG_ACPI_BATTERY=y
CONFIG_ACPI_BUTTON=y
CONFIG_ACPI_FAN=y
# CONFIG_ACPI_DOCK is not set
CONFIG_ACPI_I2C=y
CONFIG_ACPI_PROCESSOR=y
# CONFIG_ACPI_IPMI is not set
# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set
CONFIG_ACPI_THERMAL=y
# CONFIG_ACPI_CUSTOM_DSDT is not set
# CONFIG_ACPI_INITRD_TABLE_OVERRIDE is not set
CONFIG_ACPI_BLACKLIST_YEAR=0
# CONFIG_ACPI_DEBUG is not set
# CONFIG_ACPI_PCI_SLOT is not set
CONFIG_X86_PM_TIMER=y
# CONFIG_ACPI_CONTAINER is not set
# CONFIG_ACPI_SBS is not set
# CONFIG_ACPI_HED is not set
# CONFIG_ACPI_CUSTOM_METHOD is not set
# CONFIG_ACPI_APEI is not set
# CONFIG_SFI is not set
#
# CPU Frequency scaling
#
# CONFIG_CPU_FREQ is not set
CONFIG_CPU_IDLE=y
# CONFIG_CPU_IDLE_MULTIPLE_DRIVERS is not set
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
# CONFIG_ARCH_NEEDS_CPU_IDLE_COUPLED is not set
#
# Memory power savings
#
CONFIG_I7300_IDLE_IOAT_CHANNEL=y
CONFIG_I7300_IDLE=y
#
# Bus options (PCI etc.)
#
CONFIG_PCI=y
CONFIG_PCI_DIRECT=y
# CONFIG_PCI_MMCONFIG is not set
CONFIG_PCI_DOMAINS=y
# CONFIG_PCI_CNB20LE_QUIRK is not set
# CONFIG_PCIEPORTBUS is not set
CONFIG_ARCH_SUPPORTS_MSI=y
# CONFIG_PCI_MSI is not set
# CONFIG_PCI_DEBUG is not set
# CONFIG_PCI_REALLOC_ENABLE_AUTO is not set
# CONFIG_PCI_STUB is not set
CONFIG_HT_IRQ=y
# CONFIG_PCI_IOV is not set
# CONFIG_PCI_PRI is not set
# CONFIG_PCI_PASID is not set
# CONFIG_PCI_IOAPIC is not set
CONFIG_PCI_LABEL=y
#
# PCI host controller drivers
#
CONFIG_ISA_DMA_API=y
CONFIG_PCCARD=y
CONFIG_PCMCIA=y
# CONFIG_PCMCIA_LOAD_CIS is not set
CONFIG_CARDBUS=y
#
# PC-card bridges
#
# CONFIG_YENTA is not set
# CONFIG_PD6729 is not set
# CONFIG_I82092 is not set
# CONFIG_HOTPLUG_PCI is not set
# CONFIG_RAPIDIO is not set
#
# Executable file formats / Emulations
#
CONFIG_BINFMT_ELF=y
CONFIG_ARCH_BINFMT_ELF_RANDOMIZE_PIE=y
# CONFIG_BINFMT_SCRIPT is not set
# CONFIG_HAVE_AOUT is not set
CONFIG_BINFMT_MISC=y
# CONFIG_COREDUMP is not set
# CONFIG_IA32_EMULATION is not set
CONFIG_HAVE_TEXT_POKE_SMP=y
CONFIG_X86_DEV_DMA_OPS=y
CONFIG_NET=y
#
# Networking options
#
CONFIG_PACKET=y
CONFIG_PACKET_DIAG=y
CONFIG_UNIX=y
CONFIG_UNIX_DIAG=y
# CONFIG_NET_KEY is not set
# CONFIG_INET is not set
CONFIG_NETWORK_SECMARK=y
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
# CONFIG_NETFILTER is not set
CONFIG_ATM=y
CONFIG_ATM_LANE=y
CONFIG_STP=y
CONFIG_BRIDGE=y
CONFIG_HAVE_NET_DSA=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_TAG_EDSA=y
CONFIG_NET_DSA_TAG_TRAILER=y
# CONFIG_VLAN_8021Q is not set
# CONFIG_DECNET is not set
CONFIG_LLC=y
CONFIG_LLC2=y
# CONFIG_IPX is not set
CONFIG_ATALK=y
# CONFIG_DEV_APPLETALK is not set
# CONFIG_X25 is not set
CONFIG_LAPB=y
# CONFIG_PHONET is not set
CONFIG_IEEE802154=y
# CONFIG_MAC802154 is not set
CONFIG_NET_SCHED=y
#
# Queueing/Scheduling
#
CONFIG_NET_SCH_CBQ=y
# CONFIG_NET_SCH_HTB is not set
CONFIG_NET_SCH_HFSC=y
CONFIG_NET_SCH_ATM=y
CONFIG_NET_SCH_PRIO=y
# CONFIG_NET_SCH_MULTIQ is not set
# CONFIG_NET_SCH_RED is not set
# CONFIG_NET_SCH_SFB is not set
CONFIG_NET_SCH_SFQ=y
CONFIG_NET_SCH_TEQL=y
CONFIG_NET_SCH_TBF=y
# CONFIG_NET_SCH_GRED is not set
CONFIG_NET_SCH_DSMARK=y
CONFIG_NET_SCH_NETEM=y
# CONFIG_NET_SCH_DRR is not set
CONFIG_NET_SCH_MQPRIO=y
CONFIG_NET_SCH_CHOKE=y
# CONFIG_NET_SCH_QFQ is not set
CONFIG_NET_SCH_CODEL=y
# CONFIG_NET_SCH_FQ_CODEL is not set
CONFIG_NET_SCH_INGRESS=y
CONFIG_NET_SCH_PLUG=y
#
# Classification
#
CONFIG_NET_CLS=y
CONFIG_NET_CLS_BASIC=y
# CONFIG_NET_CLS_TCINDEX is not set
CONFIG_NET_CLS_FW=y
CONFIG_NET_CLS_U32=y
# CONFIG_CLS_U32_PERF is not set
CONFIG_CLS_U32_MARK=y
CONFIG_NET_CLS_RSVP=y
CONFIG_NET_CLS_RSVP6=y
# CONFIG_NET_CLS_FLOW is not set
# CONFIG_NET_EMATCH is not set
CONFIG_NET_CLS_ACT=y
# CONFIG_NET_ACT_POLICE is not set
CONFIG_NET_ACT_GACT=y
# CONFIG_GACT_PROB is not set
CONFIG_NET_ACT_MIRRED=y
# CONFIG_NET_ACT_NAT is not set
# CONFIG_NET_ACT_PEDIT is not set
# CONFIG_NET_ACT_SIMP is not set
CONFIG_NET_ACT_SKBEDIT=y
# CONFIG_NET_CLS_IND is not set
CONFIG_NET_SCH_FIFO=y
CONFIG_DCB=y
# CONFIG_DNS_RESOLVER is not set
CONFIG_BATMAN_ADV=y
CONFIG_BATMAN_ADV_NC=y
# CONFIG_BATMAN_ADV_DEBUG is not set
CONFIG_OPENVSWITCH=y
CONFIG_VSOCKETS=y
CONFIG_NETLINK_MMAP=y
CONFIG_NETLINK_DIAG=y
# CONFIG_NET_MPLS_GSO is not set
CONFIG_NET_RX_BUSY_POLL=y
CONFIG_BQL=y
#
# Network testing
#
CONFIG_HAMRADIO=y
#
# Packet Radio protocols
#
CONFIG_AX25=y
CONFIG_AX25_DAMA_SLAVE=y
CONFIG_NETROM=y
CONFIG_ROSE=y
#
# AX.25 network device drivers
#
# CONFIG_MKISS is not set
# CONFIG_6PACK is not set
CONFIG_BPQETHER=y
CONFIG_BAYCOM_SER_FDX=y
CONFIG_BAYCOM_SER_HDX=y
CONFIG_BAYCOM_PAR=y
CONFIG_YAM=y
# CONFIG_CAN is not set
CONFIG_IRDA=y
#
# IrDA protocols
#
# CONFIG_IRLAN is not set
# CONFIG_IRNET is not set
# CONFIG_IRCOMM is not set
CONFIG_IRDA_ULTRA=y
#
# IrDA options
#
CONFIG_IRDA_CACHE_LAST_LSAP=y
# CONFIG_IRDA_FAST_RR is not set
# CONFIG_IRDA_DEBUG is not set
#
# Infrared-port device drivers
#
#
# SIR device drivers
#
# CONFIG_IRTTY_SIR is not set
#
# Dongle support
#
#
# FIR device drivers
#
CONFIG_NSC_FIR=y
# CONFIG_WINBOND_FIR is not set
CONFIG_SMC_IRCC_FIR=y
CONFIG_ALI_FIR=y
# CONFIG_VLSI_FIR is not set
# CONFIG_VIA_FIR is not set
# CONFIG_BT is not set
CONFIG_WIRELESS=y
CONFIG_WIRELESS_EXT=y
CONFIG_WEXT_CORE=y
CONFIG_WEXT_SPY=y
CONFIG_WEXT_PRIV=y
CONFIG_CFG80211=y
CONFIG_NL80211_TESTMODE=y
CONFIG_CFG80211_DEVELOPER_WARNINGS=y
CONFIG_CFG80211_REG_DEBUG=y
CONFIG_CFG80211_CERTIFICATION_ONUS=y
CONFIG_CFG80211_DEFAULT_PS=y
# CONFIG_CFG80211_DEBUGFS is not set
# CONFIG_CFG80211_INTERNAL_REGDB is not set
# CONFIG_CFG80211_WEXT is not set
CONFIG_LIB80211=y
CONFIG_LIB80211_CRYPT_WEP=y
CONFIG_LIB80211_CRYPT_CCMP=y
CONFIG_LIB80211_CRYPT_TKIP=y
CONFIG_LIB80211_DEBUG=y
CONFIG_MAC80211=y
CONFIG_MAC80211_HAS_RC=y
# CONFIG_MAC80211_RC_PID is not set
CONFIG_MAC80211_RC_MINSTREL=y
CONFIG_MAC80211_RC_MINSTREL_HT=y
CONFIG_MAC80211_RC_DEFAULT_MINSTREL=y
CONFIG_MAC80211_RC_DEFAULT="minstrel_ht"
CONFIG_MAC80211_MESH=y
CONFIG_MAC80211_LEDS=y
# CONFIG_MAC80211_DEBUGFS is not set
# CONFIG_MAC80211_MESSAGE_TRACING is not set
CONFIG_MAC80211_DEBUG_MENU=y
# CONFIG_MAC80211_NOINLINE is not set
CONFIG_MAC80211_VERBOSE_DEBUG=y
# CONFIG_MAC80211_MLME_DEBUG is not set
CONFIG_MAC80211_STA_DEBUG=y
CONFIG_MAC80211_HT_DEBUG=y
# CONFIG_MAC80211_IBSS_DEBUG is not set
CONFIG_MAC80211_PS_DEBUG=y
CONFIG_MAC80211_MPL_DEBUG=y
CONFIG_MAC80211_MPATH_DEBUG=y
CONFIG_MAC80211_MHWMP_DEBUG=y
CONFIG_MAC80211_MESH_SYNC_DEBUG=y
CONFIG_MAC80211_MESH_PS_DEBUG=y
CONFIG_MAC80211_TDLS_DEBUG=y
# CONFIG_WIMAX is not set
# CONFIG_RFKILL is not set
CONFIG_RFKILL_REGULATOR=y
CONFIG_NET_9P=y
# CONFIG_NET_9P_VIRTIO is not set
CONFIG_NET_9P_DEBUG=y
# CONFIG_CAIF is not set
# CONFIG_NFC is not set
CONFIG_HAVE_BPF_JIT=y
#
# Device Drivers
#
#
# Generic Driver Options
#
CONFIG_UEVENT_HELPER_PATH=""
# CONFIG_DEVTMPFS is not set
CONFIG_STANDALONE=y
CONFIG_PREVENT_FIRMWARE_BUILD=y
CONFIG_FW_LOADER=y
# CONFIG_FIRMWARE_IN_KERNEL is not set
CONFIG_EXTRA_FIRMWARE=""
CONFIG_FW_LOADER_USER_HELPER=y
# CONFIG_DEBUG_DRIVER is not set
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_GENERIC_CPU_DEVICES is not set
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_SPI=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_IRQ=y
CONFIG_DMA_SHARED_BUFFER=y
#
# Bus devices
#
CONFIG_CONNECTOR=y
CONFIG_PROC_EVENTS=y
# CONFIG_MTD is not set
CONFIG_PARPORT=y
# CONFIG_PARPORT_PC is not set
# CONFIG_PARPORT_GSC is not set
CONFIG_PARPORT_AX88796=y
CONFIG_PARPORT_1284=y
CONFIG_PARPORT_NOT_PC=y
CONFIG_PNP=y
CONFIG_PNP_DEBUG_MESSAGES=y
#
# Protocols
#
CONFIG_PNPACPI=y
CONFIG_BLK_DEV=y
CONFIG_BLK_DEV_FD=y
# CONFIG_BLK_DEV_PCIESSD_MTIP32XX is not set
# CONFIG_BLK_CPQ_DA is not set
# CONFIG_BLK_CPQ_CISS_DA is not set
# CONFIG_BLK_DEV_DAC960 is not set
# CONFIG_BLK_DEV_UMEM is not set
# CONFIG_BLK_DEV_COW_COMMON is not set
# CONFIG_BLK_DEV_LOOP is not set
#
# DRBD disabled because PROC_FS or INET not selected
#
CONFIG_BLK_DEV_NBD=y
# CONFIG_BLK_DEV_NVME is not set
# CONFIG_BLK_DEV_OSD is not set
# CONFIG_BLK_DEV_SX8 is not set
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_XIP=y
CONFIG_CDROM_PKTCDVD=y
CONFIG_CDROM_PKTCDVD_BUFFERS=8
# CONFIG_CDROM_PKTCDVD_WCACHE is not set
# CONFIG_ATA_OVER_ETH is not set
CONFIG_VIRTIO_BLK=y
CONFIG_BLK_DEV_HD=y
# CONFIG_BLK_DEV_RSXX is not set
#
# Misc devices
#
CONFIG_SENSORS_LIS3LV02D=y
CONFIG_AD525X_DPOT=y
# CONFIG_AD525X_DPOT_I2C is not set
CONFIG_AD525X_DPOT_SPI=y
# CONFIG_DUMMY_IRQ is not set
# CONFIG_IBM_ASM is not set
# CONFIG_PHANTOM is not set
# CONFIG_SGI_IOC4 is not set
# CONFIG_TIFM_CORE is not set
# CONFIG_ICS932S401 is not set
# CONFIG_ATMEL_SSC is not set
CONFIG_ENCLOSURE_SERVICES=y
# CONFIG_HP_ILO is not set
CONFIG_APDS9802ALS=y
CONFIG_ISL29003=y
CONFIG_ISL29020=y
CONFIG_SENSORS_TSL2550=y
CONFIG_SENSORS_BH1780=y
CONFIG_SENSORS_BH1770=y
CONFIG_SENSORS_APDS990X=y
CONFIG_HMC6352=y
CONFIG_DS1682=y
CONFIG_TI_DAC7512=y
# CONFIG_VMWARE_BALLOON is not set
CONFIG_BMP085=y
CONFIG_BMP085_I2C=y
CONFIG_BMP085_SPI=y
# CONFIG_PCH_PHUB is not set
CONFIG_USB_SWITCH_FSA9480=y
CONFIG_LATTICE_ECP3_CONFIG=y
# CONFIG_SRAM is not set
# CONFIG_C2PORT is not set
#
# EEPROM support
#
CONFIG_EEPROM_AT24=y
CONFIG_EEPROM_AT25=y
# CONFIG_EEPROM_LEGACY is not set
# CONFIG_EEPROM_MAX6875 is not set
# CONFIG_EEPROM_93CX6 is not set
# CONFIG_EEPROM_93XX46 is not set
# CONFIG_CB710_CORE is not set
#
# Texas Instruments shared transport line discipline
#
# CONFIG_TI_ST is not set
CONFIG_SENSORS_LIS3_I2C=y
#
# Altera FPGA firmware download module
#
# CONFIG_ALTERA_STAPL is not set
# CONFIG_VMWARE_VMCI is not set
CONFIG_HAVE_IDE=y
CONFIG_IDE=y
#
# Please see Documentation/ide/ide.txt for help/info on IDE drives
#
CONFIG_IDE_ATAPI=y
CONFIG_BLK_DEV_IDE_SATA=y
CONFIG_IDE_GD=y
CONFIG_IDE_GD_ATA=y
# CONFIG_IDE_GD_ATAPI is not set
CONFIG_BLK_DEV_IDECS=y
# CONFIG_BLK_DEV_DELKIN is not set
CONFIG_BLK_DEV_IDECD=y
CONFIG_BLK_DEV_IDECD_VERBOSE_ERRORS=y
CONFIG_BLK_DEV_IDETAPE=y
# CONFIG_BLK_DEV_IDEACPI is not set
# CONFIG_IDE_TASK_IOCTL is not set
#
# IDE chipset support/bugfixes
#
CONFIG_IDE_GENERIC=y
CONFIG_BLK_DEV_PLATFORM=y
# CONFIG_BLK_DEV_CMD640 is not set
# CONFIG_BLK_DEV_IDEPNP is not set
#
# PCI IDE chipsets support
#
# CONFIG_BLK_DEV_GENERIC is not set
# CONFIG_BLK_DEV_OPTI621 is not set
# CONFIG_BLK_DEV_RZ1000 is not set
# CONFIG_BLK_DEV_AEC62XX is not set
# CONFIG_BLK_DEV_ALI15X3 is not set
# CONFIG_BLK_DEV_AMD74XX is not set
# CONFIG_BLK_DEV_ATIIXP is not set
# CONFIG_BLK_DEV_CMD64X is not set
# CONFIG_BLK_DEV_TRIFLEX is not set
# CONFIG_BLK_DEV_CS5520 is not set
# CONFIG_BLK_DEV_CS5530 is not set
# CONFIG_BLK_DEV_HPT366 is not set
# CONFIG_BLK_DEV_JMICRON is not set
# CONFIG_BLK_DEV_SC1200 is not set
# CONFIG_BLK_DEV_PIIX is not set
# CONFIG_BLK_DEV_IT8172 is not set
# CONFIG_BLK_DEV_IT8213 is not set
# CONFIG_BLK_DEV_IT821X is not set
# CONFIG_BLK_DEV_NS87415 is not set
# CONFIG_BLK_DEV_PDC202XX_OLD is not set
# CONFIG_BLK_DEV_PDC202XX_NEW is not set
# CONFIG_BLK_DEV_SVWKS is not set
# CONFIG_BLK_DEV_SIIMAGE is not set
# CONFIG_BLK_DEV_SIS5513 is not set
# CONFIG_BLK_DEV_SLC90E66 is not set
# CONFIG_BLK_DEV_TRM290 is not set
# CONFIG_BLK_DEV_VIA82CXXX is not set
# CONFIG_BLK_DEV_TC86C001 is not set
# CONFIG_BLK_DEV_IDEDMA is not set
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
# CONFIG_RAID_ATTRS is not set
CONFIG_SCSI=y
CONFIG_SCSI_DMA=y
# CONFIG_SCSI_TGT is not set
CONFIG_SCSI_NETLINK=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=y
# CONFIG_CHR_DEV_ST is not set
# CONFIG_CHR_DEV_OSST is not set
CONFIG_BLK_DEV_SR=y
# CONFIG_BLK_DEV_SR_VENDOR is not set
CONFIG_CHR_DEV_SG=y
CONFIG_CHR_DEV_SCH=y
# CONFIG_SCSI_ENCLOSURE is not set
# CONFIG_SCSI_MULTI_LUN is not set
# CONFIG_SCSI_CONSTANTS is not set
CONFIG_SCSI_LOGGING=y
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_SCSI_FC_ATTRS=y
# CONFIG_SCSI_ISCSI_ATTRS is not set
CONFIG_SCSI_SAS_ATTRS=y
# CONFIG_SCSI_SAS_LIBSAS is not set
CONFIG_SCSI_SRP_ATTRS=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_SCSI_LOWLEVEL_PCMCIA=y
CONFIG_SCSI_DH=y
# CONFIG_SCSI_DH_RDAC is not set
CONFIG_SCSI_DH_HP_SW=y
CONFIG_SCSI_DH_EMC=y
# CONFIG_SCSI_DH_ALUA is not set
CONFIG_SCSI_OSD_INITIATOR=y
CONFIG_SCSI_OSD_ULD=y
CONFIG_SCSI_OSD_DPRINT_SENSE=1
CONFIG_SCSI_OSD_DEBUG=y
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
# CONFIG_ATA_VERBOSE_ERROR is not set
CONFIG_ATA_ACPI=y
# CONFIG_SATA_ZPODD is not set
# CONFIG_SATA_PMP is not set
#
# Controllers with non-SFF native interface
#
# CONFIG_SATA_AHCI is not set
# CONFIG_SATA_AHCI_PLATFORM is not set
# CONFIG_SATA_INIC162X is not set
# CONFIG_SATA_ACARD_AHCI is not set
# CONFIG_SATA_SIL24 is not set
# CONFIG_ATA_SFF is not set
CONFIG_MD=y
CONFIG_BLK_DEV_MD=y
CONFIG_MD_AUTODETECT=y
CONFIG_MD_LINEAR=y
CONFIG_MD_RAID0=y
CONFIG_MD_RAID1=y
# CONFIG_MD_RAID10 is not set
CONFIG_MD_RAID456=y
CONFIG_MD_MULTIPATH=y
CONFIG_MD_FAULTY=y
# CONFIG_BCACHE is not set
# CONFIG_BLK_DEV_DM is not set
# CONFIG_TARGET_CORE is not set
# CONFIG_FUSION is not set
#
# IEEE 1394 (FireWire) support
#
# CONFIG_FIREWIRE is not set
# CONFIG_FIREWIRE_NOSY is not set
# CONFIG_I2O is not set
# CONFIG_MACINTOSH_DRIVERS is not set
CONFIG_NETDEVICES=y
CONFIG_NET_CORE=y
CONFIG_DUMMY=y
CONFIG_EQUALIZER=y
# CONFIG_NET_FC is not set
CONFIG_IFB=y
CONFIG_NET_TEAM=y
CONFIG_NET_TEAM_MODE_BROADCAST=y
CONFIG_NET_TEAM_MODE_ROUNDROBIN=y
CONFIG_NET_TEAM_MODE_RANDOM=y
# CONFIG_NET_TEAM_MODE_ACTIVEBACKUP is not set
# CONFIG_NET_TEAM_MODE_LOADBALANCE is not set
# CONFIG_MACVLAN is not set
# CONFIG_NETCONSOLE is not set
# CONFIG_NETPOLL is not set
# CONFIG_NET_POLL_CONTROLLER is not set
CONFIG_TUN=y
# CONFIG_VETH is not set
CONFIG_VIRTIO_NET=y
# CONFIG_NLMON is not set
CONFIG_ARCNET=y
CONFIG_ARCNET_1201=y
CONFIG_ARCNET_1051=y
# CONFIG_ARCNET_RAW is not set
CONFIG_ARCNET_CAP=y
CONFIG_ARCNET_COM90xx=y
CONFIG_ARCNET_COM90xxIO=y
CONFIG_ARCNET_RIM_I=y
CONFIG_ARCNET_COM20020=y
# CONFIG_ARCNET_COM20020_PCI is not set
# CONFIG_ARCNET_COM20020_CS is not set
# CONFIG_ATM_DRIVERS is not set
#
# CAIF transport drivers
#
#
# Distributed Switch Architecture drivers
#
CONFIG_NET_DSA_MV88E6XXX=y
CONFIG_NET_DSA_MV88E6060=y
# CONFIG_NET_DSA_MV88E6XXX_NEED_PPU is not set
# CONFIG_NET_DSA_MV88E6131 is not set
CONFIG_NET_DSA_MV88E6123_61_65=y
# CONFIG_ETHERNET is not set
# CONFIG_FDDI is not set
# CONFIG_NET_SB1000 is not set
CONFIG_PHYLIB=y
#
# MII PHY device drivers
#
CONFIG_AT803X_PHY=y
CONFIG_AMD_PHY=y
CONFIG_MARVELL_PHY=y
CONFIG_DAVICOM_PHY=y
CONFIG_QSEMI_PHY=y
CONFIG_LXT_PHY=y
CONFIG_CICADA_PHY=y
CONFIG_VITESSE_PHY=y
CONFIG_SMSC_PHY=y
CONFIG_BROADCOM_PHY=y
# CONFIG_BCM87XX_PHY is not set
CONFIG_ICPLUS_PHY=y
CONFIG_REALTEK_PHY=y
CONFIG_NATIONAL_PHY=y
# CONFIG_STE10XP is not set
# CONFIG_LSI_ET1011C_PHY is not set
CONFIG_MICREL_PHY=y
CONFIG_FIXED_PHY=y
CONFIG_MDIO_BITBANG=y
# CONFIG_MDIO_GPIO is not set
# CONFIG_MICREL_KS8995MA is not set
CONFIG_PLIP=y
CONFIG_PPP=y
# CONFIG_PPP_BSDCOMP is not set
# CONFIG_PPP_DEFLATE is not set
CONFIG_PPP_FILTER=y
CONFIG_PPP_MPPE=y
CONFIG_PPP_MULTILINK=y
# CONFIG_PPPOATM is not set
CONFIG_PPPOE=y
# CONFIG_PPP_ASYNC is not set
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_SLIP is not set
CONFIG_SLHC=y
CONFIG_WLAN=y
CONFIG_PCMCIA_RAYCS=y
CONFIG_LIBERTAS_THINFIRM=y
CONFIG_LIBERTAS_THINFIRM_DEBUG=y
# CONFIG_AIRO is not set
# CONFIG_ATMEL is not set
CONFIG_AIRO_CS=y
CONFIG_PCMCIA_WL3501=y
# CONFIG_PRISM54 is not set
# CONFIG_RTL8180 is not set
# CONFIG_ADM8211 is not set
# CONFIG_MAC80211_HWSIM is not set
# CONFIG_MWL8K is not set
CONFIG_ATH_CARDS=y
CONFIG_ATH_DEBUG=y
# CONFIG_ATH5K is not set
# CONFIG_ATH5K_PCI is not set
# CONFIG_ATH9K is not set
# CONFIG_ATH6KL is not set
# CONFIG_WIL6210 is not set
# CONFIG_ATH10K is not set
CONFIG_B43=y
# CONFIG_B43_BCMA is not set
CONFIG_B43_SSB=y
CONFIG_B43_PCI_AUTOSELECT=y
CONFIG_B43_PCICORE_AUTOSELECT=y
CONFIG_B43_PCMCIA=y
# CONFIG_B43_SDIO is not set
CONFIG_B43_PIO=y
# CONFIG_B43_PHY_N is not set
CONFIG_B43_PHY_LP=y
CONFIG_B43_LEDS=y
CONFIG_B43_HWRNG=y
# CONFIG_B43_DEBUG is not set
CONFIG_B43LEGACY=y
CONFIG_B43LEGACY_PCI_AUTOSELECT=y
CONFIG_B43LEGACY_PCICORE_AUTOSELECT=y
CONFIG_B43LEGACY_LEDS=y
CONFIG_B43LEGACY_HWRNG=y
# CONFIG_B43LEGACY_DEBUG is not set
CONFIG_B43LEGACY_DMA=y
CONFIG_B43LEGACY_PIO=y
CONFIG_B43LEGACY_DMA_AND_PIO_MODE=y
# CONFIG_B43LEGACY_DMA_MODE is not set
# CONFIG_B43LEGACY_PIO_MODE is not set
CONFIG_BRCMUTIL=y
CONFIG_BRCMSMAC=y
CONFIG_BRCMFMAC=y
CONFIG_BRCMFMAC_SDIO=y
# CONFIG_BRCM_TRACING is not set
# CONFIG_BRCMDBG is not set
CONFIG_HOSTAP=y
# CONFIG_HOSTAP_FIRMWARE is not set
# CONFIG_HOSTAP_PLX is not set
# CONFIG_HOSTAP_PCI is not set
CONFIG_HOSTAP_CS=y
# CONFIG_IPW2100 is not set
# CONFIG_IWLWIFI is not set
# CONFIG_IWL4965 is not set
# CONFIG_IWL3945 is not set
CONFIG_LIBERTAS=y
# CONFIG_LIBERTAS_CS is not set
CONFIG_LIBERTAS_SDIO=y
CONFIG_LIBERTAS_SPI=y
CONFIG_LIBERTAS_DEBUG=y
CONFIG_LIBERTAS_MESH=y
CONFIG_P54_COMMON=y
# CONFIG_P54_PCI is not set
CONFIG_P54_SPI=y
CONFIG_P54_SPI_DEFAULT_EEPROM=y
CONFIG_P54_LEDS=y
CONFIG_RT2X00=y
# CONFIG_RT2400PCI is not set
# CONFIG_RT2500PCI is not set
# CONFIG_RT61PCI is not set
# CONFIG_RT2800PCI is not set
CONFIG_RTL_CARDS=y
# CONFIG_RTL8192CE is not set
# CONFIG_RTL8192SE is not set
# CONFIG_RTL8192DE is not set
# CONFIG_RTL8723AE is not set
# CONFIG_RTL8188EE is not set
# CONFIG_WL_TI is not set
CONFIG_MWIFIEX=y
CONFIG_MWIFIEX_SDIO=y
# CONFIG_MWIFIEX_PCIE is not set
# CONFIG_CW1200 is not set
#
# Enable WiMAX (Networking options) to see the WiMAX drivers
#
# CONFIG_WAN is not set
CONFIG_IEEE802154_DRIVERS=y
# CONFIG_IEEE802154_FAKEHARD is not set
# CONFIG_ISDN is not set
#
# Input device support
#
CONFIG_INPUT=y
CONFIG_INPUT_FF_MEMLESS=y
CONFIG_INPUT_POLLDEV=y
CONFIG_INPUT_SPARSEKMAP=y
CONFIG_INPUT_MATRIXKMAP=y
#
# Userland interfaces
#
# CONFIG_INPUT_MOUSEDEV is not set
CONFIG_INPUT_JOYDEV=y
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVBUG=y
#
# Input Device Drivers
#
CONFIG_INPUT_KEYBOARD=y
CONFIG_KEYBOARD_ADP5520=y
CONFIG_KEYBOARD_ADP5588=y
# CONFIG_KEYBOARD_ADP5589 is not set
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_QT1070 is not set
# CONFIG_KEYBOARD_QT2160 is not set
CONFIG_KEYBOARD_LKKBD=y
CONFIG_KEYBOARD_GPIO=y
# CONFIG_KEYBOARD_GPIO_POLLED is not set
# CONFIG_KEYBOARD_TCA6416 is not set
# CONFIG_KEYBOARD_TCA8418 is not set
CONFIG_KEYBOARD_MATRIX=y
# CONFIG_KEYBOARD_LM8323 is not set
CONFIG_KEYBOARD_LM8333=y
CONFIG_KEYBOARD_MAX7359=y
# CONFIG_KEYBOARD_MCS is not set
# CONFIG_KEYBOARD_MPR121 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_OPENCORES is not set
CONFIG_KEYBOARD_STOWAWAY=y
CONFIG_KEYBOARD_SUNKBD=y
CONFIG_KEYBOARD_STMPE=y
CONFIG_KEYBOARD_TWL4030=y
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_CROS_EC is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
CONFIG_INPUT_TABLET=y
# CONFIG_TABLET_USB_ACECAD is not set
# CONFIG_TABLET_USB_AIPTEK is not set
# CONFIG_TABLET_USB_HANWANG is not set
# CONFIG_TABLET_USB_KBTAB is not set
# CONFIG_TABLET_USB_WACOM is not set
CONFIG_INPUT_TOUCHSCREEN=y
CONFIG_TOUCHSCREEN_88PM860X=y
CONFIG_TOUCHSCREEN_ADS7846=y
CONFIG_TOUCHSCREEN_AD7877=y
CONFIG_TOUCHSCREEN_AD7879=y
CONFIG_TOUCHSCREEN_AD7879_I2C=y
# CONFIG_TOUCHSCREEN_AD7879_SPI is not set
# CONFIG_TOUCHSCREEN_ATMEL_MXT is not set
# CONFIG_TOUCHSCREEN_AUO_PIXCIR is not set
CONFIG_TOUCHSCREEN_BU21013=y
CONFIG_TOUCHSCREEN_CY8CTMG110=y
CONFIG_TOUCHSCREEN_CYTTSP_CORE=y
CONFIG_TOUCHSCREEN_CYTTSP_I2C=y
CONFIG_TOUCHSCREEN_CYTTSP_SPI=y
# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
CONFIG_TOUCHSCREEN_DA9034=y
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
# CONFIG_TOUCHSCREEN_EETI is not set
CONFIG_TOUCHSCREEN_FUJITSU=y
CONFIG_TOUCHSCREEN_ILI210X=y
# CONFIG_TOUCHSCREEN_GUNZE is not set
CONFIG_TOUCHSCREEN_ELO=y
# CONFIG_TOUCHSCREEN_WACOM_W8001 is not set
CONFIG_TOUCHSCREEN_WACOM_I2C=y
# CONFIG_TOUCHSCREEN_MAX11801 is not set
CONFIG_TOUCHSCREEN_MCS5000=y
CONFIG_TOUCHSCREEN_MMS114=y
CONFIG_TOUCHSCREEN_MTOUCH=y
CONFIG_TOUCHSCREEN_INEXIO=y
# CONFIG_TOUCHSCREEN_MK712 is not set
CONFIG_TOUCHSCREEN_PENMOUNT=y
CONFIG_TOUCHSCREEN_EDT_FT5X06=y
CONFIG_TOUCHSCREEN_TOUCHRIGHT=y
CONFIG_TOUCHSCREEN_TOUCHWIN=y
# CONFIG_TOUCHSCREEN_TI_AM335X_TSC is not set
# CONFIG_TOUCHSCREEN_PIXCIR is not set
CONFIG_TOUCHSCREEN_WM831X=y
# CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set
CONFIG_TOUCHSCREEN_MC13783=y
CONFIG_TOUCHSCREEN_TOUCHIT213=y
CONFIG_TOUCHSCREEN_TSC_SERIO=y
CONFIG_TOUCHSCREEN_TSC2005=y
# CONFIG_TOUCHSCREEN_TSC2007 is not set
CONFIG_TOUCHSCREEN_ST1232=y
# CONFIG_TOUCHSCREEN_STMPE is not set
CONFIG_TOUCHSCREEN_TPS6507X=y
CONFIG_INPUT_MISC=y
# CONFIG_INPUT_88PM860X_ONKEY is not set
CONFIG_INPUT_AD714X=y
CONFIG_INPUT_AD714X_I2C=y
CONFIG_INPUT_AD714X_SPI=y
# CONFIG_INPUT_ARIZONA_HAPTICS is not set
# CONFIG_INPUT_BMA150 is not set
CONFIG_INPUT_PCSPKR=y
CONFIG_INPUT_MAX8925_ONKEY=y
CONFIG_INPUT_MC13783_PWRBUTTON=y
CONFIG_INPUT_MMA8450=y
CONFIG_INPUT_MPU3050=y
# CONFIG_INPUT_APANEL is not set
CONFIG_INPUT_GP2A=y
CONFIG_INPUT_GPIO_TILT_POLLED=y
# CONFIG_INPUT_ATLAS_BTNS is not set
# CONFIG_INPUT_ATI_REMOTE2 is not set
# CONFIG_INPUT_KEYSPAN_REMOTE is not set
CONFIG_INPUT_KXTJ9=y
CONFIG_INPUT_KXTJ9_POLLED_MODE=y
# CONFIG_INPUT_POWERMATE is not set
# CONFIG_INPUT_YEALINK is not set
# CONFIG_INPUT_CM109 is not set
CONFIG_INPUT_RETU_PWRBUTTON=y
CONFIG_INPUT_TWL4030_PWRBUTTON=y
CONFIG_INPUT_TWL4030_VIBRA=y
CONFIG_INPUT_UINPUT=y
CONFIG_INPUT_PCF50633_PMU=y
# CONFIG_INPUT_PCF8574 is not set
# CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set
CONFIG_INPUT_DA9055_ONKEY=y
CONFIG_INPUT_WM831X_ON=y
CONFIG_INPUT_ADXL34X=y
# CONFIG_INPUT_ADXL34X_I2C is not set
# CONFIG_INPUT_ADXL34X_SPI is not set
CONFIG_INPUT_CMA3000=y
# CONFIG_INPUT_CMA3000_I2C is not set
#
# Hardware I/O ports
#
CONFIG_SERIO=y
CONFIG_SERIO_I8042=y
CONFIG_SERIO_SERPORT=y
CONFIG_SERIO_CT82C710=y
CONFIG_SERIO_PARKBD=y
# CONFIG_SERIO_PCIPS2 is not set
CONFIG_SERIO_LIBPS2=y
CONFIG_SERIO_RAW=y
CONFIG_SERIO_ALTERA_PS2=y
CONFIG_SERIO_PS2MULT=y
CONFIG_SERIO_ARC_PS2=y
CONFIG_GAMEPORT=y
# CONFIG_GAMEPORT_NS558 is not set
CONFIG_GAMEPORT_L4=y
# CONFIG_GAMEPORT_EMU10K1 is not set
# CONFIG_GAMEPORT_FM801 is not set
#
# Character devices
#
CONFIG_TTY=y
# CONFIG_VT is not set
CONFIG_UNIX98_PTYS=y
# CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
# CONFIG_N_GSM is not set
# CONFIG_TRACE_SINK is not set
# CONFIG_DEVKMEM is not set
#
# Serial drivers
#
CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_PNP=y
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_SERIAL_8250_DMA=y
CONFIG_SERIAL_8250_PCI=y
# CONFIG_SERIAL_8250_CS is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SERIAL_8250_DW is not set
#
# Non-8250 serial port support
#
# CONFIG_SERIAL_MAX3100 is not set
# CONFIG_SERIAL_MAX310X is not set
# CONFIG_SERIAL_MFD_HSU is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_SCCNXP is not set
# CONFIG_SERIAL_TIMBERDALE is not set
# CONFIG_SERIAL_ALTERA_JTAGUART is not set
# CONFIG_SERIAL_ALTERA_UART is not set
# CONFIG_SERIAL_IFX6X60 is not set
# CONFIG_SERIAL_PCH_UART is not set
# CONFIG_SERIAL_ARC is not set
# CONFIG_SERIAL_RP2 is not set
# CONFIG_SERIAL_FSL_LPUART is not set
# CONFIG_TTY_PRINTK is not set
# CONFIG_PRINTER is not set
CONFIG_PPDEV=y
# CONFIG_VIRTIO_CONSOLE is not set
CONFIG_IPMI_HANDLER=y
CONFIG_IPMI_PANIC_EVENT=y
CONFIG_IPMI_PANIC_STRING=y
# CONFIG_IPMI_DEVICE_INTERFACE is not set
CONFIG_IPMI_SI=y
CONFIG_IPMI_WATCHDOG=y
# CONFIG_IPMI_POWEROFF is not set
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_TIMERIOMEM=y
CONFIG_HW_RANDOM_INTEL=y
CONFIG_HW_RANDOM_AMD=y
# CONFIG_HW_RANDOM_VIA is not set
CONFIG_HW_RANDOM_VIRTIO=y
CONFIG_HW_RANDOM_TPM=y
CONFIG_NVRAM=y
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
#
# PCMCIA character devices
#
# CONFIG_SYNCLINK_CS is not set
CONFIG_CARDMAN_4000=y
CONFIG_CARDMAN_4040=y
# CONFIG_IPWIRELESS is not set
# CONFIG_MWAVE is not set
# CONFIG_RAW_DRIVER is not set
# CONFIG_HPET is not set
# CONFIG_HANGCHECK_TIMER is not set
CONFIG_TCG_TPM=y
CONFIG_TCG_TIS=y
CONFIG_TCG_TIS_I2C_INFINEON=y
CONFIG_TCG_NSC=y
# CONFIG_TCG_ATMEL is not set
# CONFIG_TCG_INFINEON is not set
CONFIG_TCG_ST33_I2C=y
CONFIG_TELCLOCK=y
CONFIG_DEVPORT=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
# CONFIG_I2C_COMPAT is not set
# CONFIG_I2C_CHARDEV is not set
CONFIG_I2C_MUX=y
#
# Multiplexer I2C Chip support
#
# CONFIG_I2C_MUX_GPIO is not set
# CONFIG_I2C_MUX_PCA9541 is not set
# CONFIG_I2C_MUX_PCA954x is not set
# CONFIG_I2C_HELPER_AUTO is not set
CONFIG_I2C_SMBUS=y
#
# I2C Algorithms
#
CONFIG_I2C_ALGOBIT=y
# CONFIG_I2C_ALGOPCF is not set
CONFIG_I2C_ALGOPCA=y
#
# I2C Hardware Bus support
#
#
# PC SMBus host controller drivers
#
# CONFIG_I2C_ALI1535 is not set
# CONFIG_I2C_ALI1563 is not set
# CONFIG_I2C_ALI15X3 is not set
# CONFIG_I2C_AMD756 is not set
# CONFIG_I2C_AMD8111 is not set
# CONFIG_I2C_I801 is not set
# CONFIG_I2C_ISCH is not set
# CONFIG_I2C_ISMT is not set
# CONFIG_I2C_PIIX4 is not set
# CONFIG_I2C_NFORCE2 is not set
# CONFIG_I2C_SIS5595 is not set
# CONFIG_I2C_SIS630 is not set
# CONFIG_I2C_SIS96X is not set
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
#
# ACPI drivers
#
# CONFIG_I2C_SCMI is not set
#
# I2C system bus drivers (mostly embedded / system-on-chip)
#
CONFIG_I2C_CBUS_GPIO=y
# CONFIG_I2C_DESIGNWARE_PCI is not set
# CONFIG_I2C_EG20T is not set
# CONFIG_I2C_GPIO is not set
# CONFIG_I2C_OCORES is not set
CONFIG_I2C_PCA_PLATFORM=y
# CONFIG_I2C_PXA_PCI is not set
CONFIG_I2C_SIMTEC=y
# CONFIG_I2C_XILINX is not set
#
# External I2C/SMBus adapter drivers
#
# CONFIG_I2C_PARPORT is not set
# CONFIG_I2C_PARPORT_LIGHT is not set
# CONFIG_I2C_TAOS_EVM is not set
#
# Other I2C/SMBus bus drivers
#
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
CONFIG_SPI=y
# CONFIG_SPI_DEBUG is not set
CONFIG_SPI_MASTER=y
#
# SPI Master Controller Drivers
#
CONFIG_SPI_ALTERA=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_BUTTERFLY=y
# CONFIG_SPI_GPIO is not set
CONFIG_SPI_LM70_LLP=y
CONFIG_SPI_OC_TINY=y
# CONFIG_SPI_PXA2XX is not set
# CONFIG_SPI_PXA2XX_PCI is not set
CONFIG_SPI_SC18IS602=y
# CONFIG_SPI_TOPCLIFF_PCH is not set
# CONFIG_SPI_XCOMM is not set
CONFIG_SPI_XILINX=y
CONFIG_SPI_DESIGNWARE=y
# CONFIG_SPI_DW_PCI is not set
#
# SPI Protocol Masters
#
CONFIG_SPI_SPIDEV=y
# CONFIG_SPI_TLE62X0 is not set
CONFIG_HSI=y
CONFIG_HSI_BOARDINFO=y
#
# HSI clients
#
CONFIG_HSI_CHAR=y
#
# PPS support
#
CONFIG_PPS=y
# CONFIG_PPS_DEBUG is not set
#
# PPS clients support
#
# CONFIG_PPS_CLIENT_KTIMER is not set
# CONFIG_PPS_CLIENT_LDISC is not set
# CONFIG_PPS_CLIENT_PARPORT is not set
# CONFIG_PPS_CLIENT_GPIO is not set
#
# PPS generators support
#
#
# PTP clock support
#
CONFIG_PTP_1588_CLOCK=y
#
# Enable PHYLIB and NETWORK_PHY_TIMESTAMPING to see the additional clocks.
#
CONFIG_PTP_1588_CLOCK_PCH=y
CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y
CONFIG_GPIO_DEVRES=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_ACPI=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_GPIO_SYSFS is not set
CONFIG_GPIO_DA9055=y
CONFIG_GPIO_MAX730X=y
#
# Memory mapped GPIO drivers:
#
# CONFIG_GPIO_GENERIC_PLATFORM is not set
CONFIG_GPIO_IT8761E=y
CONFIG_GPIO_TS5500=y
# CONFIG_GPIO_SCH is not set
# CONFIG_GPIO_ICH is not set
# CONFIG_GPIO_VX855 is not set
# CONFIG_GPIO_LYNXPOINT is not set
#
# I2C GPIO expanders:
#
CONFIG_GPIO_ARIZONA=y
CONFIG_GPIO_MAX7300=y
CONFIG_GPIO_MAX732X=y
# CONFIG_GPIO_MAX732X_IRQ is not set
CONFIG_GPIO_PCA953X=y
# CONFIG_GPIO_PCA953X_IRQ is not set
CONFIG_GPIO_PCF857X=y
# CONFIG_GPIO_SX150X is not set
# CONFIG_GPIO_STMPE is not set
CONFIG_GPIO_TWL4030=y
CONFIG_GPIO_WM831X=y
# CONFIG_GPIO_WM8350 is not set
# CONFIG_GPIO_WM8994 is not set
CONFIG_GPIO_ADP5520=y
# CONFIG_GPIO_ADP5588 is not set
#
# PCI GPIO expanders:
#
# CONFIG_GPIO_BT8XX is not set
# CONFIG_GPIO_AMD8111 is not set
# CONFIG_GPIO_LANGWELL is not set
# CONFIG_GPIO_PCH is not set
# CONFIG_GPIO_ML_IOH is not set
# CONFIG_GPIO_RDC321X is not set
#
# SPI GPIO expanders:
#
CONFIG_GPIO_MAX7301=y
CONFIG_GPIO_MCP23S08=y
# CONFIG_GPIO_MC33880 is not set
CONFIG_GPIO_74X164=y
#
# AC97 GPIO expanders:
#
#
# MODULbus GPIO expanders:
#
#
# USB GPIO expanders:
#
CONFIG_W1=y
# CONFIG_W1_CON is not set
#
# 1-wire Bus Masters
#
# CONFIG_W1_MASTER_MATROX is not set
# CONFIG_W1_MASTER_DS2482 is not set
# CONFIG_W1_MASTER_DS1WM is not set
CONFIG_W1_MASTER_GPIO=y
#
# 1-wire Slaves
#
CONFIG_W1_SLAVE_THERM=y
# CONFIG_W1_SLAVE_SMEM is not set
CONFIG_W1_SLAVE_DS2408=y
# CONFIG_W1_SLAVE_DS2408_READBACK is not set
# CONFIG_W1_SLAVE_DS2413 is not set
CONFIG_W1_SLAVE_DS2423=y
CONFIG_W1_SLAVE_DS2431=y
CONFIG_W1_SLAVE_DS2433=y
# CONFIG_W1_SLAVE_DS2433_CRC is not set
# CONFIG_W1_SLAVE_DS2760 is not set
CONFIG_W1_SLAVE_DS2780=y
CONFIG_W1_SLAVE_DS2781=y
# CONFIG_W1_SLAVE_DS28E04 is not set
CONFIG_W1_SLAVE_BQ27000=y
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
CONFIG_PDA_POWER=y
CONFIG_GENERIC_ADC_BATTERY=y
CONFIG_MAX8925_POWER=y
# CONFIG_WM831X_BACKUP is not set
CONFIG_WM831X_POWER=y
CONFIG_WM8350_POWER=y
# CONFIG_TEST_POWER is not set
# CONFIG_BATTERY_88PM860X is not set
CONFIG_BATTERY_DS2780=y
# CONFIG_BATTERY_DS2781 is not set
# CONFIG_BATTERY_DS2782 is not set
CONFIG_BATTERY_SBS=y
# CONFIG_BATTERY_BQ27x00 is not set
CONFIG_BATTERY_DA9030=y
CONFIG_BATTERY_MAX17040=y
CONFIG_BATTERY_MAX17042=y
CONFIG_CHARGER_PCF50633=y
CONFIG_CHARGER_MAX8903=y
CONFIG_CHARGER_TWL4030=y
# CONFIG_CHARGER_LP8727 is not set
# CONFIG_CHARGER_GPIO is not set
CONFIG_CHARGER_BQ2415X=y
# CONFIG_CHARGER_SMB347 is not set
CONFIG_CHARGER_TPS65090=y
# CONFIG_BATTERY_GOLDFISH is not set
# CONFIG_POWER_RESET is not set
# CONFIG_POWER_AVS is not set
CONFIG_HWMON=y
CONFIG_HWMON_VID=y
# CONFIG_HWMON_DEBUG_CHIP is not set
#
# Native drivers
#
CONFIG_SENSORS_AD7314=y
# CONFIG_SENSORS_AD7414 is not set
CONFIG_SENSORS_AD7418=y
# CONFIG_SENSORS_ADCXX is not set
CONFIG_SENSORS_ADM1021=y
CONFIG_SENSORS_ADM1025=y
# CONFIG_SENSORS_ADM1026 is not set
CONFIG_SENSORS_ADM1029=y
CONFIG_SENSORS_ADM1031=y
CONFIG_SENSORS_ADM9240=y
CONFIG_SENSORS_ADT7X10=y
# CONFIG_SENSORS_ADT7310 is not set
CONFIG_SENSORS_ADT7410=y
CONFIG_SENSORS_ADT7411=y
CONFIG_SENSORS_ADT7462=y
CONFIG_SENSORS_ADT7470=y
# CONFIG_SENSORS_ADT7475 is not set
CONFIG_SENSORS_ASC7621=y
# CONFIG_SENSORS_K8TEMP is not set
# CONFIG_SENSORS_K10TEMP is not set
# CONFIG_SENSORS_FAM15H_POWER is not set
# CONFIG_SENSORS_ASB100 is not set
# CONFIG_SENSORS_ATXP1 is not set
CONFIG_SENSORS_DS620=y
CONFIG_SENSORS_DS1621=y
CONFIG_SENSORS_DA9055=y
# CONFIG_SENSORS_I5K_AMB is not set
CONFIG_SENSORS_F71805F=y
# CONFIG_SENSORS_F71882FG is not set
CONFIG_SENSORS_F75375S=y
CONFIG_SENSORS_FSCHMD=y
CONFIG_SENSORS_G760A=y
# CONFIG_SENSORS_G762 is not set
CONFIG_SENSORS_GL518SM=y
CONFIG_SENSORS_GL520SM=y
# CONFIG_SENSORS_GPIO_FAN is not set
CONFIG_SENSORS_HIH6130=y
CONFIG_SENSORS_CORETEMP=y
# CONFIG_SENSORS_IBMAEM is not set
# CONFIG_SENSORS_IBMPEX is not set
CONFIG_SENSORS_IIO_HWMON=y
# CONFIG_SENSORS_IT87 is not set
CONFIG_SENSORS_JC42=y
CONFIG_SENSORS_LINEAGE=y
CONFIG_SENSORS_LM63=y
CONFIG_SENSORS_LM70=y
# CONFIG_SENSORS_LM73 is not set
CONFIG_SENSORS_LM75=y
CONFIG_SENSORS_LM77=y
# CONFIG_SENSORS_LM78 is not set
CONFIG_SENSORS_LM80=y
CONFIG_SENSORS_LM83=y
CONFIG_SENSORS_LM85=y
CONFIG_SENSORS_LM87=y
CONFIG_SENSORS_LM90=y
# CONFIG_SENSORS_LM92 is not set
# CONFIG_SENSORS_LM93 is not set
CONFIG_SENSORS_LTC4151=y
# CONFIG_SENSORS_LTC4215 is not set
# CONFIG_SENSORS_LTC4245 is not set
CONFIG_SENSORS_LTC4261=y
# CONFIG_SENSORS_LM95234 is not set
# CONFIG_SENSORS_LM95241 is not set
CONFIG_SENSORS_LM95245=y
CONFIG_SENSORS_MAX1111=y
# CONFIG_SENSORS_MAX16065 is not set
# CONFIG_SENSORS_MAX1619 is not set
CONFIG_SENSORS_MAX1668=y
CONFIG_SENSORS_MAX197=y
CONFIG_SENSORS_MAX6639=y
CONFIG_SENSORS_MAX6642=y
CONFIG_SENSORS_MAX6650=y
# CONFIG_SENSORS_MAX6697 is not set
# CONFIG_SENSORS_MCP3021 is not set
CONFIG_SENSORS_NCT6775=y
CONFIG_SENSORS_PC87360=y
CONFIG_SENSORS_PC87427=y
CONFIG_SENSORS_PCF8591=y
CONFIG_PMBUS=y
CONFIG_SENSORS_PMBUS=y
CONFIG_SENSORS_ADM1275=y
CONFIG_SENSORS_LM25066=y
CONFIG_SENSORS_LTC2978=y
CONFIG_SENSORS_MAX16064=y
CONFIG_SENSORS_MAX34440=y
# CONFIG_SENSORS_MAX8688 is not set
CONFIG_SENSORS_UCD9000=y
CONFIG_SENSORS_UCD9200=y
CONFIG_SENSORS_ZL6100=y
# CONFIG_SENSORS_SHT15 is not set
# CONFIG_SENSORS_SHT21 is not set
# CONFIG_SENSORS_SIS5595 is not set
CONFIG_SENSORS_SMM665=y
CONFIG_SENSORS_DME1737=y
CONFIG_SENSORS_EMC1403=y
# CONFIG_SENSORS_EMC2103 is not set
CONFIG_SENSORS_EMC6W201=y
# CONFIG_SENSORS_SMSC47M1 is not set
CONFIG_SENSORS_SMSC47M192=y
CONFIG_SENSORS_SMSC47B397=y
# CONFIG_SENSORS_SCH56XX_COMMON is not set
# CONFIG_SENSORS_ADS1015 is not set
CONFIG_SENSORS_ADS7828=y
CONFIG_SENSORS_ADS7871=y
CONFIG_SENSORS_AMC6821=y
CONFIG_SENSORS_INA209=y
CONFIG_SENSORS_INA2XX=y
CONFIG_SENSORS_THMC50=y
# CONFIG_SENSORS_TMP102 is not set
CONFIG_SENSORS_TMP401=y
# CONFIG_SENSORS_TMP421 is not set
CONFIG_SENSORS_VIA_CPUTEMP=y
# CONFIG_SENSORS_VIA686A is not set
CONFIG_SENSORS_VT1211=y
# CONFIG_SENSORS_VT8231 is not set
CONFIG_SENSORS_W83781D=y
CONFIG_SENSORS_W83791D=y
CONFIG_SENSORS_W83792D=y
CONFIG_SENSORS_W83793=y
CONFIG_SENSORS_W83795=y
# CONFIG_SENSORS_W83795_FANCTRL is not set
CONFIG_SENSORS_W83L785TS=y
CONFIG_SENSORS_W83L786NG=y
CONFIG_SENSORS_W83627HF=y
CONFIG_SENSORS_W83627EHF=y
CONFIG_SENSORS_WM831X=y
CONFIG_SENSORS_WM8350=y
CONFIG_SENSORS_APPLESMC=y
CONFIG_SENSORS_MC13783_ADC=y
#
# ACPI drivers
#
# CONFIG_SENSORS_ACPI_POWER is not set
# CONFIG_SENSORS_ATK0110 is not set
CONFIG_THERMAL=y
CONFIG_THERMAL_HWMON=y
# CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE is not set
# CONFIG_THERMAL_DEFAULT_GOV_FAIR_SHARE is not set
CONFIG_THERMAL_DEFAULT_GOV_USER_SPACE=y
# CONFIG_THERMAL_GOV_FAIR_SHARE is not set
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_THERMAL_EMULATION=y
#
# Texas Instruments thermal drivers
#
# CONFIG_WATCHDOG is not set
CONFIG_SSB_POSSIBLE=y
#
# Sonics Silicon Backplane
#
CONFIG_SSB=y
CONFIG_SSB_SPROM=y
CONFIG_SSB_BLOCKIO=y
CONFIG_SSB_PCIHOST_POSSIBLE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_B43_PCI_BRIDGE=y
CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
CONFIG_SSB_PCMCIAHOST=y
CONFIG_SSB_SDIOHOST_POSSIBLE=y
CONFIG_SSB_SDIOHOST=y
# CONFIG_SSB_SILENT is not set
CONFIG_SSB_DEBUG=y
CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_DRIVER_GPIO=y
CONFIG_BCMA_POSSIBLE=y
#
# Broadcom specific AMBA
#
CONFIG_BCMA=y
CONFIG_BCMA_HOST_PCI_POSSIBLE=y
# CONFIG_BCMA_HOST_PCI is not set
# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
CONFIG_BCMA_DRIVER_GPIO=y
# CONFIG_BCMA_DEBUG is not set
#
# Multifunction device drivers
#
CONFIG_MFD_CORE=y
# CONFIG_MFD_CS5535 is not set
# CONFIG_MFD_AS3711 is not set
CONFIG_PMIC_ADP5520=y
CONFIG_MFD_AAT2870_CORE=y
CONFIG_MFD_CROS_EC=y
# CONFIG_MFD_CROS_EC_I2C is not set
CONFIG_MFD_CROS_EC_SPI=y
CONFIG_PMIC_DA903X=y
# CONFIG_MFD_DA9052_SPI is not set
# CONFIG_MFD_DA9052_I2C is not set
CONFIG_MFD_DA9055=y
CONFIG_MFD_MC13783=y
CONFIG_MFD_MC13XXX=y
CONFIG_MFD_MC13XXX_SPI=y
CONFIG_MFD_MC13XXX_I2C=y
CONFIG_HTC_PASIC3=y
# CONFIG_HTC_I2CPLD is not set
# CONFIG_LPC_ICH is not set
# CONFIG_LPC_SCH is not set
# CONFIG_MFD_JANZ_CMODIO is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
CONFIG_MFD_88PM805=y
CONFIG_MFD_88PM860X=y
# CONFIG_MFD_MAX77686 is not set
# CONFIG_MFD_MAX77693 is not set
# CONFIG_MFD_MAX8907 is not set
CONFIG_MFD_MAX8925=y
# CONFIG_MFD_MAX8997 is not set
CONFIG_MFD_MAX8998=y
# CONFIG_EZX_PCAP is not set
CONFIG_MFD_RETU=y
CONFIG_MFD_PCF50633=y
# CONFIG_PCF50633_ADC is not set
CONFIG_PCF50633_GPIO=y
# CONFIG_MFD_RDC321X is not set
# CONFIG_MFD_RTSX_PCI is not set
# CONFIG_MFD_RC5T583 is not set
# CONFIG_MFD_SEC_CORE is not set
CONFIG_MFD_SI476X_CORE=y
CONFIG_MFD_SM501=y
# CONFIG_MFD_SM501_GPIO is not set
# CONFIG_MFD_SMSC is not set
CONFIG_ABX500_CORE=y
CONFIG_AB3100_CORE=y
CONFIG_AB3100_OTP=y
CONFIG_MFD_STMPE=y
#
# STMicroelectronics STMPE Interface Drivers
#
# CONFIG_STMPE_I2C is not set
CONFIG_STMPE_SPI=y
# CONFIG_MFD_SYSCON is not set
CONFIG_MFD_TI_AM335X_TSCADC=y
CONFIG_MFD_LP8788=y
# CONFIG_MFD_PALMAS is not set
CONFIG_TPS6105X=y
CONFIG_TPS65010=y
CONFIG_TPS6507X=y
CONFIG_MFD_TPS65090=y
# CONFIG_MFD_TPS65217 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65910 is not set
CONFIG_MFD_TPS65912=y
# CONFIG_MFD_TPS65912_I2C is not set
# CONFIG_MFD_TPS65912_SPI is not set
CONFIG_MFD_TPS80031=y
CONFIG_TWL4030_CORE=y
# CONFIG_TWL4030_MADC is not set
CONFIG_MFD_TWL4030_AUDIO=y
# CONFIG_TWL6040_CORE is not set
# CONFIG_MFD_WL1273_CORE is not set
CONFIG_MFD_LM3533=y
# CONFIG_MFD_TIMBERDALE is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_TMIO is not set
# CONFIG_MFD_VX855 is not set
CONFIG_MFD_ARIZONA=y
CONFIG_MFD_ARIZONA_I2C=y
CONFIG_MFD_ARIZONA_SPI=y
CONFIG_MFD_WM5102=y
# CONFIG_MFD_WM5110 is not set
# CONFIG_MFD_WM8997 is not set
# CONFIG_MFD_WM8400 is not set
CONFIG_MFD_WM831X=y
CONFIG_MFD_WM831X_I2C=y
CONFIG_MFD_WM831X_SPI=y
CONFIG_MFD_WM8350=y
CONFIG_MFD_WM8350_I2C=y
CONFIG_MFD_WM8994=y
CONFIG_REGULATOR=y
# CONFIG_REGULATOR_DEBUG is not set
CONFIG_REGULATOR_DUMMY=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_VIRTUAL_CONSUMER=y
CONFIG_REGULATOR_USERSPACE_CONSUMER=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_AD5398=y
CONFIG_REGULATOR_AAT2870=y
CONFIG_REGULATOR_ARIZONA=y
CONFIG_REGULATOR_DA903X=y
CONFIG_REGULATOR_DA9055=y
# CONFIG_REGULATOR_FAN53555 is not set
CONFIG_REGULATOR_MC13XXX_CORE=y
CONFIG_REGULATOR_MC13783=y
CONFIG_REGULATOR_MC13892=y
CONFIG_REGULATOR_ISL6271A=y
CONFIG_REGULATOR_88PM8607=y
CONFIG_REGULATOR_MAX1586=y
CONFIG_REGULATOR_MAX8649=y
CONFIG_REGULATOR_MAX8660=y
CONFIG_REGULATOR_MAX8925=y
CONFIG_REGULATOR_MAX8952=y
# CONFIG_REGULATOR_MAX8973 is not set
# CONFIG_REGULATOR_MAX8998 is not set
# CONFIG_REGULATOR_LP3971 is not set
CONFIG_REGULATOR_LP3972=y
CONFIG_REGULATOR_LP872X=y
# CONFIG_REGULATOR_LP8755 is not set
CONFIG_REGULATOR_LP8788=y
CONFIG_REGULATOR_PCF50633=y
CONFIG_REGULATOR_AB3100=y
# CONFIG_REGULATOR_TPS51632 is not set
# CONFIG_REGULATOR_TPS6105X is not set
# CONFIG_REGULATOR_TPS62360 is not set
CONFIG_REGULATOR_TPS65023=y
CONFIG_REGULATOR_TPS6507X=y
CONFIG_REGULATOR_TPS65090=y
CONFIG_REGULATOR_TPS6524X=y
CONFIG_REGULATOR_TPS80031=y
# CONFIG_REGULATOR_TWL4030 is not set
CONFIG_REGULATOR_WM831X=y
CONFIG_REGULATOR_WM8350=y
CONFIG_REGULATOR_WM8994=y
CONFIG_MEDIA_SUPPORT=y
#
# Multimedia core support
#
CONFIG_MEDIA_CAMERA_SUPPORT=y
CONFIG_MEDIA_ANALOG_TV_SUPPORT=y
# CONFIG_MEDIA_DIGITAL_TV_SUPPORT is not set
# CONFIG_MEDIA_RADIO_SUPPORT is not set
CONFIG_MEDIA_RC_SUPPORT=y
CONFIG_MEDIA_CONTROLLER=y
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_SUBDEV_API=y
CONFIG_VIDEO_V4L2=y
CONFIG_VIDEO_ADV_DEBUG=y
# CONFIG_VIDEO_FIXED_MINOR_RANGES is not set
CONFIG_VIDEO_V4L2_INT_DEVICE=y
# CONFIG_TTPCI_EEPROM is not set
#
# Media drivers
#
CONFIG_RC_CORE=y
CONFIG_RC_MAP=y
CONFIG_RC_DECODERS=y
CONFIG_LIRC=y
CONFIG_IR_LIRC_CODEC=y
# CONFIG_IR_NEC_DECODER is not set
CONFIG_IR_RC5_DECODER=y
# CONFIG_IR_RC6_DECODER is not set
CONFIG_IR_JVC_DECODER=y
# CONFIG_IR_SONY_DECODER is not set
# CONFIG_IR_RC5_SZ_DECODER is not set
CONFIG_IR_SANYO_DECODER=y
# CONFIG_IR_MCE_KBD_DECODER is not set
# CONFIG_RC_DEVICES is not set
# CONFIG_MEDIA_PCI_SUPPORT is not set
# CONFIG_V4L_PLATFORM_DRIVERS is not set
# CONFIG_V4L_MEM2MEM_DRIVERS is not set
CONFIG_V4L_TEST_DRIVERS=y
# CONFIG_VIDEO_VIVI is not set
# CONFIG_VIDEO_MEM2MEM_TESTDEV is not set
#
# Supported MMC/SDIO adapters
#
# CONFIG_MEDIA_PARPORT_SUPPORT is not set
#
# Media ancillary drivers (tuners, sensors, i2c, frontends)
#
CONFIG_MEDIA_SUBDRV_AUTOSELECT=y
CONFIG_VIDEO_IR_I2C=y
#
# Audio decoders, processors and mixers
#
#
# RDS decoders
#
#
# Video decoders
#
#
# Video and audio decoders
#
#
# Video encoders
#
#
# Camera sensor devices
#
#
# Flash devices
#
#
# Video improvement chips
#
#
# Miscelaneous helper chips
#
#
# Sensors used on soc_camera driver
#
CONFIG_MEDIA_TUNER=y
CONFIG_MEDIA_TUNER_SIMPLE=y
CONFIG_MEDIA_TUNER_TDA8290=y
CONFIG_MEDIA_TUNER_TDA827X=y
CONFIG_MEDIA_TUNER_TDA18271=y
CONFIG_MEDIA_TUNER_TDA9887=y
CONFIG_MEDIA_TUNER_MT20XX=y
CONFIG_MEDIA_TUNER_XC2028=y
CONFIG_MEDIA_TUNER_XC5000=y
CONFIG_MEDIA_TUNER_XC4000=y
CONFIG_MEDIA_TUNER_MC44S803=y
#
# Tools to develop new frontends
#
# CONFIG_DVB_DUMMY_FE is not set
#
# Graphics support
#
# CONFIG_AGP is not set
CONFIG_VGA_ARB=y
CONFIG_VGA_ARB_MAX_GPUS=16
# CONFIG_VGA_SWITCHEROO is not set
CONFIG_DRM=y
# CONFIG_DRM_TDFX is not set
# CONFIG_DRM_R128 is not set
# CONFIG_DRM_RADEON is not set
# CONFIG_DRM_NOUVEAU is not set
# CONFIG_DRM_MGA is not set
# CONFIG_DRM_VIA is not set
# CONFIG_DRM_SAVAGE is not set
# CONFIG_DRM_VMWGFX is not set
# CONFIG_DRM_GMA500 is not set
# CONFIG_DRM_UDL is not set
# CONFIG_DRM_AST is not set
# CONFIG_DRM_MGAG200 is not set
# CONFIG_DRM_CIRRUS_QEMU is not set
# CONFIG_DRM_QXL is not set
# CONFIG_VGASTATE is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
CONFIG_HDMI=y
CONFIG_FB=y
CONFIG_FIRMWARE_EDID=y
# CONFIG_FB_DDC is not set
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
CONFIG_FB_SYS_FILLRECT=y
CONFIG_FB_SYS_COPYAREA=y
CONFIG_FB_SYS_IMAGEBLIT=y
CONFIG_FB_FOREIGN_ENDIAN=y
CONFIG_FB_BOTH_ENDIAN=y
# CONFIG_FB_BIG_ENDIAN is not set
# CONFIG_FB_LITTLE_ENDIAN is not set
CONFIG_FB_SYS_FOPS=y
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_HECUBA=y
# CONFIG_FB_SVGALIB is not set
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_BACKLIGHT is not set
CONFIG_FB_MODE_HELPERS=y
CONFIG_FB_TILEBLITTING=y
#
# Frame buffer hardware drivers
#
# CONFIG_FB_CIRRUS is not set
# CONFIG_FB_PM2 is not set
# CONFIG_FB_CYBER2000 is not set
CONFIG_FB_ARC=y
# CONFIG_FB_ASILIANT is not set
# CONFIG_FB_IMSTT is not set
# CONFIG_FB_VGA16 is not set
CONFIG_FB_UVESA=y
# CONFIG_FB_VESA is not set
CONFIG_FB_N411=y
CONFIG_FB_HGA=y
CONFIG_FB_S1D13XXX=y
# CONFIG_FB_NVIDIA is not set
# CONFIG_FB_RIVA is not set
# CONFIG_FB_I740 is not set
# CONFIG_FB_LE80578 is not set
# CONFIG_FB_MATROX is not set
# CONFIG_FB_RADEON is not set
# CONFIG_FB_ATY128 is not set
# CONFIG_FB_ATY is not set
# CONFIG_FB_S3 is not set
# CONFIG_FB_SAVAGE is not set
# CONFIG_FB_SIS is not set
# CONFIG_FB_VIA is not set
# CONFIG_FB_NEOMAGIC is not set
# CONFIG_FB_KYRO is not set
# CONFIG_FB_3DFX is not set
# CONFIG_FB_VOODOO1 is not set
# CONFIG_FB_VT8623 is not set
# CONFIG_FB_TRIDENT is not set
# CONFIG_FB_ARK is not set
# CONFIG_FB_PM3 is not set
# CONFIG_FB_CARMINE is not set
CONFIG_FB_TMIO=y
# CONFIG_FB_TMIO_ACCELL is not set
# CONFIG_FB_SM501 is not set
# CONFIG_FB_GOLDFISH is not set
CONFIG_FB_VIRTUAL=y
CONFIG_FB_METRONOME=y
# CONFIG_FB_MB862XX is not set
# CONFIG_FB_BROADSHEET is not set
CONFIG_FB_AUO_K190X=y
CONFIG_FB_AUO_K1900=y
# CONFIG_FB_AUO_K1901 is not set
CONFIG_EXYNOS_VIDEO=y
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_LOGO is not set
CONFIG_SOUND=y
CONFIG_SOUND_OSS_CORE=y
CONFIG_SOUND_OSS_CORE_PRECLAIM=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SND_HWDEP=y
CONFIG_SND_RAWMIDI=y
CONFIG_SND_COMPRESS_OFFLOAD=y
CONFIG_SND_JACK=y
CONFIG_SND_SEQUENCER=y
CONFIG_SND_SEQ_DUMMY=y
CONFIG_SND_OSSEMUL=y
# CONFIG_SND_MIXER_OSS is not set
CONFIG_SND_PCM_OSS=y
# CONFIG_SND_PCM_OSS_PLUGINS is not set
# CONFIG_SND_SEQUENCER_OSS is not set
CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_MAX_CARDS=32
CONFIG_SND_SUPPORT_OLD_API=y
# CONFIG_SND_VERBOSE_PRINTK is not set
CONFIG_SND_DEBUG=y
CONFIG_SND_DEBUG_VERBOSE=y
CONFIG_SND_DMA_SGBUF=y
CONFIG_SND_RAWMIDI_SEQ=y
# CONFIG_SND_OPL3_LIB_SEQ is not set
# CONFIG_SND_OPL4_LIB_SEQ is not set
# CONFIG_SND_SBAWE_SEQ is not set
# CONFIG_SND_EMU10K1_SEQ is not set
CONFIG_SND_MPU401_UART=y
CONFIG_SND_VX_LIB=y
CONFIG_SND_DRIVERS=y
CONFIG_SND_DUMMY=y
CONFIG_SND_ALOOP=y
CONFIG_SND_VIRMIDI=y
# CONFIG_SND_MTPAV is not set
CONFIG_SND_MTS64=y
CONFIG_SND_SERIAL_U16550=y
CONFIG_SND_MPU401=y
# CONFIG_SND_PORTMAN2X4 is not set
CONFIG_SND_PCI=y
# CONFIG_SND_AD1889 is not set
# CONFIG_SND_ALS300 is not set
# CONFIG_SND_ALS4000 is not set
# CONFIG_SND_ALI5451 is not set
# CONFIG_SND_ASIHPI is not set
# CONFIG_SND_ATIIXP is not set
# CONFIG_SND_ATIIXP_MODEM is not set
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
# CONFIG_SND_AW2 is not set
# CONFIG_SND_AZT3328 is not set
# CONFIG_SND_BT87X is not set
# CONFIG_SND_CA0106 is not set
# CONFIG_SND_CMIPCI is not set
# CONFIG_SND_OXYGEN is not set
# CONFIG_SND_CS4281 is not set
# CONFIG_SND_CS46XX is not set
# CONFIG_SND_CS5530 is not set
# CONFIG_SND_CS5535AUDIO is not set
# CONFIG_SND_CTXFI is not set
# CONFIG_SND_DARLA20 is not set
# CONFIG_SND_GINA20 is not set
# CONFIG_SND_LAYLA20 is not set
# CONFIG_SND_DARLA24 is not set
# CONFIG_SND_GINA24 is not set
# CONFIG_SND_LAYLA24 is not set
# CONFIG_SND_MONA is not set
# CONFIG_SND_MIA is not set
# CONFIG_SND_ECHO3G is not set
# CONFIG_SND_INDIGO is not set
# CONFIG_SND_INDIGOIO is not set
# CONFIG_SND_INDIGODJ is not set
# CONFIG_SND_INDIGOIOX is not set
# CONFIG_SND_INDIGODJX is not set
# CONFIG_SND_EMU10K1 is not set
# CONFIG_SND_EMU10K1X is not set
# CONFIG_SND_ENS1370 is not set
# CONFIG_SND_ENS1371 is not set
# CONFIG_SND_ES1938 is not set
# CONFIG_SND_ES1968 is not set
# CONFIG_SND_FM801 is not set
# CONFIG_SND_HDA_INTEL is not set
# CONFIG_SND_HDSP is not set
# CONFIG_SND_HDSPM is not set
# CONFIG_SND_ICE1712 is not set
# CONFIG_SND_ICE1724 is not set
# CONFIG_SND_INTEL8X0 is not set
# CONFIG_SND_INTEL8X0M is not set
# CONFIG_SND_KORG1212 is not set
# CONFIG_SND_LOLA is not set
# CONFIG_SND_LX6464ES is not set
# CONFIG_SND_MAESTRO3 is not set
# CONFIG_SND_MIXART is not set
# CONFIG_SND_NM256 is not set
# CONFIG_SND_PCXHR is not set
# CONFIG_SND_RIPTIDE is not set
# CONFIG_SND_RME32 is not set
# CONFIG_SND_RME96 is not set
# CONFIG_SND_RME9652 is not set
# CONFIG_SND_SONICVIBES is not set
# CONFIG_SND_TRIDENT is not set
# CONFIG_SND_VIA82XX is not set
# CONFIG_SND_VIA82XX_MODEM is not set
# CONFIG_SND_VIRTUOSO is not set
# CONFIG_SND_VX222 is not set
# CONFIG_SND_YMFPCI is not set
CONFIG_SND_SPI=y
CONFIG_SND_PCMCIA=y
CONFIG_SND_VXPOCKET=y
CONFIG_SND_PDAUDIOCF=y
CONFIG_SND_SOC=y
# CONFIG_SND_ATMEL_SOC is not set
CONFIG_SND_SOC_I2C_AND_SPI=y
CONFIG_SND_SIMPLE_CARD=y
CONFIG_SOUND_PRIME=y
# CONFIG_SOUND_OSS is not set
#
# HID support
#
CONFIG_HID=y
CONFIG_HID_BATTERY_STRENGTH=y
CONFIG_HIDRAW=y
# CONFIG_UHID is not set
CONFIG_HID_GENERIC=y
#
# Special HID drivers
#
CONFIG_HID_A4TECH=y
CONFIG_HID_ACRUX=y
# CONFIG_HID_ACRUX_FF is not set
CONFIG_HID_APPLE=y
# CONFIG_HID_AUREAL is not set
CONFIG_HID_BELKIN=y
CONFIG_HID_CHERRY=y
# CONFIG_HID_CHICONY is not set
# CONFIG_HID_PRODIKEYS is not set
# CONFIG_HID_CYPRESS is not set
# CONFIG_HID_DRAGONRISE is not set
# CONFIG_HID_EMS_FF is not set
# CONFIG_HID_ELECOM is not set
# CONFIG_HID_EZKEY is not set
CONFIG_HID_KEYTOUCH=y
CONFIG_HID_KYE=y
CONFIG_HID_UCLOGIC=y
CONFIG_HID_WALTOP=y
CONFIG_HID_GYRATION=y
CONFIG_HID_ICADE=y
CONFIG_HID_TWINHAN=y
# CONFIG_HID_KENSINGTON is not set
# CONFIG_HID_LCPOWER is not set
CONFIG_HID_LOGITECH=y
# CONFIG_HID_LOGITECH_DJ is not set
# CONFIG_LOGITECH_FF is not set
CONFIG_LOGIRUMBLEPAD2_FF=y
# CONFIG_LOGIG940_FF is not set
# CONFIG_LOGIWHEELS_FF is not set
CONFIG_HID_MAGICMOUSE=y
# CONFIG_HID_MICROSOFT is not set
CONFIG_HID_MONTEREY=y
# CONFIG_HID_MULTITOUCH is not set
CONFIG_HID_ORTEK=y
CONFIG_HID_PANTHERLORD=y
CONFIG_PANTHERLORD_FF=y
# CONFIG_HID_PETALYNX is not set
# CONFIG_HID_PICOLCD is not set
CONFIG_HID_PRIMAX=y
CONFIG_HID_SAITEK=y
CONFIG_HID_SAMSUNG=y
CONFIG_HID_SPEEDLINK=y
# CONFIG_HID_STEELSERIES is not set
# CONFIG_HID_SUNPLUS is not set
CONFIG_HID_GREENASIA=y
CONFIG_GREENASIA_FF=y
CONFIG_HID_SMARTJOYPLUS=y
# CONFIG_SMARTJOYPLUS_FF is not set
CONFIG_HID_TIVO=y
CONFIG_HID_TOPSEED=y
CONFIG_HID_THINGM=y
CONFIG_HID_THRUSTMASTER=y
# CONFIG_THRUSTMASTER_FF is not set
CONFIG_HID_WACOM=y
CONFIG_HID_WIIMOTE=y
CONFIG_HID_ZEROPLUS=y
# CONFIG_ZEROPLUS_FF is not set
CONFIG_HID_ZYDACRON=y
CONFIG_HID_SENSOR_HUB=y
#
# I2C HID support
#
CONFIG_I2C_HID=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_ARCH_HAS_HCD=y
# CONFIG_USB is not set
#
# USB port drivers
#
# CONFIG_USB_PHY is not set
# CONFIG_USB_GADGET is not set
# CONFIG_UWB is not set
CONFIG_MMC=y
CONFIG_MMC_DEBUG=y
# CONFIG_MMC_UNSAFE_RESUME is not set
# CONFIG_MMC_CLKGATE is not set
#
# MMC/SD/SDIO Card Drivers
#
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=8
CONFIG_MMC_BLOCK_BOUNCE=y
# CONFIG_SDIO_UART is not set
# CONFIG_MMC_TEST is not set
#
# MMC/SD/SDIO Host Controller Drivers
#
CONFIG_MMC_SDHCI=y
# CONFIG_MMC_SDHCI_PCI is not set
# CONFIG_MMC_SDHCI_ACPI is not set
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MMC_WBSD=y
# CONFIG_MMC_TIFM_SD is not set
CONFIG_MMC_SPI=y
# CONFIG_MMC_SDRICOH_CS is not set
# CONFIG_MMC_CB710 is not set
# CONFIG_MMC_VIA_SDMMC is not set
CONFIG_MEMSTICK=y
CONFIG_MEMSTICK_DEBUG=y
#
# MemoryStick drivers
#
# CONFIG_MEMSTICK_UNSAFE_RESUME is not set
CONFIG_MSPRO_BLOCK=y
#
# MemoryStick Host Controller Drivers
#
# CONFIG_MEMSTICK_TIFM_MS is not set
# CONFIG_MEMSTICK_JMICRON_38X is not set
# CONFIG_MEMSTICK_R592 is not set
CONFIG_NEW_LEDS=y
CONFIG_LEDS_CLASS=y
#
# LED drivers
#
# CONFIG_LEDS_88PM860X is not set
CONFIG_LEDS_LM3530=y
CONFIG_LEDS_LM3533=y
# CONFIG_LEDS_LM3642 is not set
CONFIG_LEDS_PCA9532=y
# CONFIG_LEDS_PCA9532_GPIO is not set
# CONFIG_LEDS_GPIO is not set
CONFIG_LEDS_LP3944=y
CONFIG_LEDS_LP55XX_COMMON=y
CONFIG_LEDS_LP5521=y
CONFIG_LEDS_LP5523=y
CONFIG_LEDS_LP5562=y
# CONFIG_LEDS_LP8788 is not set
# CONFIG_LEDS_PCA955X is not set
# CONFIG_LEDS_PCA9633 is not set
CONFIG_LEDS_WM831X_STATUS=y
CONFIG_LEDS_WM8350=y
CONFIG_LEDS_DA903X=y
CONFIG_LEDS_DAC124S085=y
CONFIG_LEDS_REGULATOR=y
CONFIG_LEDS_BD2802=y
# CONFIG_LEDS_LT3593 is not set
CONFIG_LEDS_ADP5520=y
CONFIG_LEDS_MC13783=y
CONFIG_LEDS_TCA6507=y
# CONFIG_LEDS_LM355x is not set
CONFIG_LEDS_OT200=y
CONFIG_LEDS_BLINKM=y
#
# LED Triggers
#
CONFIG_LEDS_TRIGGERS=y
# CONFIG_LEDS_TRIGGER_TIMER is not set
CONFIG_LEDS_TRIGGER_ONESHOT=y
# CONFIG_LEDS_TRIGGER_IDE_DISK is not set
CONFIG_LEDS_TRIGGER_HEARTBEAT=y
CONFIG_LEDS_TRIGGER_BACKLIGHT=y
# CONFIG_LEDS_TRIGGER_CPU is not set
# CONFIG_LEDS_TRIGGER_GPIO is not set
CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
#
# iptables trigger is under Netfilter config (LED target)
#
CONFIG_LEDS_TRIGGER_TRANSIENT=y
CONFIG_LEDS_TRIGGER_CAMERA=y
# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
CONFIG_EDAC=y
# CONFIG_EDAC_LEGACY_SYSFS is not set
# CONFIG_EDAC_DEBUG is not set
CONFIG_EDAC_MM_EDAC=y
# CONFIG_EDAC_E752X is not set
# CONFIG_EDAC_I82975X is not set
# CONFIG_EDAC_I3000 is not set
# CONFIG_EDAC_I3200 is not set
# CONFIG_EDAC_X38 is not set
# CONFIG_EDAC_I5400 is not set
# CONFIG_EDAC_I5000 is not set
# CONFIG_EDAC_I5100 is not set
# CONFIG_EDAC_I7300 is not set
CONFIG_RTC_LIB=y
# CONFIG_RTC_CLASS is not set
CONFIG_DMADEVICES=y
# CONFIG_DMADEVICES_DEBUG is not set
#
# DMA Devices
#
# CONFIG_INTEL_MID_DMAC is not set
# CONFIG_INTEL_IOATDMA is not set
# CONFIG_DW_DMAC_CORE is not set
# CONFIG_DW_DMAC is not set
# CONFIG_DW_DMAC_PCI is not set
CONFIG_TIMB_DMA=y
# CONFIG_PCH_DMA is not set
CONFIG_DMA_ENGINE=y
CONFIG_DMA_ACPI=y
#
# DMA Clients
#
CONFIG_NET_DMA=y
# CONFIG_ASYNC_TX_DMA is not set
# CONFIG_DMATEST is not set
CONFIG_AUXDISPLAY=y
# CONFIG_UIO is not set
CONFIG_VIRT_DRIVERS=y
CONFIG_VIRTIO=y
#
# Virtio drivers
#
# CONFIG_VIRTIO_PCI is not set
CONFIG_VIRTIO_BALLOON=y
# CONFIG_VIRTIO_MMIO is not set
#
# Microsoft Hyper-V guest support
#
# CONFIG_HYPERV is not set
CONFIG_STAGING=y
# CONFIG_ET131X is not set
# CONFIG_SLICOSS is not set
CONFIG_ECHO=y
CONFIG_PANEL=y
CONFIG_PANEL_PARPORT=0
CONFIG_PANEL_PROFILE=5
CONFIG_PANEL_CHANGE_MESSAGE=y
CONFIG_PANEL_BOOT_MESSAGE=""
# CONFIG_DX_SEP is not set
#
# IIO staging drivers
#
#
# Accelerometers
#
# CONFIG_ADIS16201 is not set
CONFIG_ADIS16203=y
CONFIG_ADIS16204=y
# CONFIG_ADIS16209 is not set
# CONFIG_ADIS16220 is not set
CONFIG_ADIS16240=y
CONFIG_LIS3L02DQ=y
CONFIG_SCA3000=y
#
# Analog to digital converters
#
CONFIG_AD7291=y
# CONFIG_AD7606 is not set
CONFIG_AD799X=y
CONFIG_AD799X_RING_BUFFER=y
# CONFIG_AD7780 is not set
CONFIG_AD7816=y
CONFIG_AD7192=y
# CONFIG_AD7280 is not set
#
# Analog digital bi-direction converters
#
CONFIG_ADT7316=y
CONFIG_ADT7316_SPI=y
CONFIG_ADT7316_I2C=y
#
# Capacitance to digital converters
#
CONFIG_AD7150=y
CONFIG_AD7152=y
CONFIG_AD7746=y
#
# Direct Digital Synthesis
#
CONFIG_AD5930=y
CONFIG_AD9832=y
CONFIG_AD9834=y
CONFIG_AD9850=y
CONFIG_AD9852=y
CONFIG_AD9910=y
# CONFIG_AD9951 is not set
#
# Digital gyroscope sensors
#
CONFIG_ADIS16060=y
CONFIG_ADIS16260=y
#
# Network Analyzer, Impedance Converters
#
CONFIG_AD5933=y
#
# Light sensors
#
# CONFIG_SENSORS_ISL29018 is not set
CONFIG_SENSORS_ISL29028=y
CONFIG_TSL2583=y
CONFIG_TSL2x7x=y
#
# Magnetometer sensors
#
# CONFIG_SENSORS_HMC5843 is not set
#
# Active energy metering IC
#
# CONFIG_ADE7753 is not set
CONFIG_ADE7754=y
CONFIG_ADE7758=y
CONFIG_ADE7759=y
CONFIG_ADE7854=y
CONFIG_ADE7854_I2C=y
# CONFIG_ADE7854_SPI is not set
#
# Resolver to digital converters
#
CONFIG_AD2S90=y
CONFIG_AD2S1200=y
# CONFIG_AD2S1210 is not set
#
# Triggers - standalone
#
CONFIG_IIO_SIMPLE_DUMMY=y
# CONFIG_IIO_SIMPLE_DUMMY_EVENTS is not set
CONFIG_IIO_SIMPLE_DUMMY_BUFFER=y
CONFIG_ZSMALLOC=y
CONFIG_ZRAM=y
# CONFIG_ZRAM_DEBUG is not set
# CONFIG_WLAGS49_H2 is not set
# CONFIG_WLAGS49_H25 is not set
# CONFIG_FB_SM7XX is not set
# CONFIG_CRYSTALHD is not set
# CONFIG_FB_XGI is not set
# CONFIG_ACPI_QUICKSTART is not set
# CONFIG_FT1000 is not set
#
# Speakup console speech
#
# CONFIG_TOUCHSCREEN_CLEARPAD_TM1217 is not set
# CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4 is not set
CONFIG_STAGING_MEDIA=y
# CONFIG_VIDEO_DT3155 is not set
# CONFIG_SOLO6X10 is not set
CONFIG_LIRC_STAGING=y
# CONFIG_LIRC_BT829 is not set
# CONFIG_LIRC_PARALLEL is not set
CONFIG_LIRC_SERIAL=y
CONFIG_LIRC_SERIAL_TRANSMITTER=y
# CONFIG_LIRC_SIR is not set
CONFIG_LIRC_ZILOG=y
#
# Android
#
CONFIG_ANDROID=y
# CONFIG_ANDROID_BINDER_IPC is not set
# CONFIG_ASHMEM is not set
CONFIG_ANDROID_LOGGER=y
# CONFIG_ANDROID_TIMED_OUTPUT is not set
CONFIG_ANDROID_LOW_MEMORY_KILLER=y
CONFIG_SYNC=y
CONFIG_SW_SYNC=y
CONFIG_SW_SYNC_USER=y
# CONFIG_WIMAX_GDM72XX is not set
# CONFIG_NET_VENDOR_SILICOM is not set
# CONFIG_DGRP is not set
CONFIG_X86_PLATFORM_DEVICES=y
# CONFIG_ACERHDF is not set
# CONFIG_ASUS_LAPTOP is not set
# CONFIG_FUJITSU_LAPTOP is not set
# CONFIG_FUJITSU_TABLET is not set
# CONFIG_HP_ACCEL is not set
# CONFIG_PANASONIC_LAPTOP is not set
# CONFIG_THINKPAD_ACPI is not set
CONFIG_SENSORS_HDAPS=y
# CONFIG_INTEL_MENLOW is not set
# CONFIG_ACPI_WMI is not set
# CONFIG_TOPSTAR_LAPTOP is not set
# CONFIG_TOSHIBA_BT_RFKILL is not set
# CONFIG_ACPI_CMPC is not set
# CONFIG_INTEL_IPS is not set
# CONFIG_IBM_RTL is not set
# CONFIG_XO15_EBOOK is not set
CONFIG_SAMSUNG_LAPTOP=y
CONFIG_SAMSUNG_Q10=y
# CONFIG_APPLE_GMUX is not set
# CONFIG_INTEL_RST is not set
# CONFIG_INTEL_SMARTCONNECT is not set
# CONFIG_PVPANIC is not set
#
# Hardware Spinlock drivers
#
CONFIG_CLKEVT_I8253=y
CONFIG_I8253_LOCK=y
CONFIG_CLKBLD_I8253=y
CONFIG_MAILBOX=y
# CONFIG_IOMMU_SUPPORT is not set
#
# Remoteproc drivers
#
CONFIG_REMOTEPROC=y
CONFIG_STE_MODEM_RPROC=y
#
# Rpmsg drivers
#
CONFIG_PM_DEVFREQ=y
#
# DEVFREQ Governors
#
# CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND is not set
CONFIG_DEVFREQ_GOV_PERFORMANCE=y
# CONFIG_DEVFREQ_GOV_POWERSAVE is not set
CONFIG_DEVFREQ_GOV_USERSPACE=y
#
# DEVFREQ Drivers
#
CONFIG_EXTCON=y
#
# Extcon Device Drivers
#
# CONFIG_EXTCON_GPIO is not set
# CONFIG_EXTCON_ADC_JACK is not set
CONFIG_EXTCON_ARIZONA=y
CONFIG_MEMORY=y
CONFIG_IIO=y
CONFIG_IIO_BUFFER=y
CONFIG_IIO_BUFFER_CB=y
CONFIG_IIO_KFIFO_BUF=y
CONFIG_IIO_TRIGGERED_BUFFER=y
CONFIG_IIO_TRIGGER=y
CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
#
# Accelerometers
#
CONFIG_HID_SENSOR_ACCEL_3D=y
CONFIG_KXSD9=y
# CONFIG_IIO_ST_ACCEL_3AXIS is not set
#
# Analog to digital converters
#
CONFIG_AD_SIGMA_DELTA=y
# CONFIG_AD7266 is not set
# CONFIG_AD7298 is not set
# CONFIG_AD7923 is not set
CONFIG_AD7791=y
CONFIG_AD7793=y
# CONFIG_AD7476 is not set
# CONFIG_AD7887 is not set
# CONFIG_LP8788_ADC is not set
CONFIG_MAX1363=y
# CONFIG_MCP320X is not set
CONFIG_TI_ADC081C=y
CONFIG_TI_AM335X_ADC=y
#
# Amplifiers
#
# CONFIG_AD8366 is not set
#
# Hid Sensor IIO Common
#
CONFIG_HID_SENSOR_IIO_COMMON=y
CONFIG_HID_SENSOR_IIO_TRIGGER=y
# CONFIG_HID_SENSOR_ENUM_BASE_QUIRKS is not set
CONFIG_IIO_ST_SENSORS_I2C=y
CONFIG_IIO_ST_SENSORS_SPI=y
CONFIG_IIO_ST_SENSORS_CORE=y
#
# Digital to analog converters
#
CONFIG_AD5064=y
CONFIG_AD5360=y
CONFIG_AD5380=y
# CONFIG_AD5421 is not set
CONFIG_AD5624R_SPI=y
CONFIG_AD5446=y
CONFIG_AD5449=y
CONFIG_AD5504=y
CONFIG_AD5755=y
# CONFIG_AD5764 is not set
CONFIG_AD5791=y
CONFIG_AD5686=y
# CONFIG_AD7303 is not set
CONFIG_MAX517=y
CONFIG_MCP4725=y
#
# Frequency Synthesizers DDS/PLL
#
#
# Clock Generator/Distribution
#
CONFIG_AD9523=y
#
# Phase-Locked Loop (PLL) frequency synthesizers
#
# CONFIG_ADF4350 is not set
#
# Digital gyroscope sensors
#
# CONFIG_ADIS16080 is not set
# CONFIG_ADIS16130 is not set
CONFIG_ADIS16136=y
CONFIG_ADXRS450=y
CONFIG_HID_SENSOR_GYRO_3D=y
# CONFIG_IIO_ST_GYRO_3AXIS is not set
# CONFIG_ITG3200 is not set
#
# Inertial measurement units
#
CONFIG_ADIS16400=y
# CONFIG_ADIS16480 is not set
CONFIG_IIO_ADIS_LIB=y
CONFIG_IIO_ADIS_LIB_BUFFER=y
# CONFIG_INV_MPU6050_IIO is not set
#
# Light sensors
#
CONFIG_ADJD_S311=y
CONFIG_SENSORS_LM3533=y
CONFIG_SENSORS_TSL2563=y
CONFIG_VCNL4000=y
# CONFIG_HID_SENSOR_ALS is not set
#
# Magnetometer sensors
#
CONFIG_AK8975=y
CONFIG_HID_SENSOR_MAGNETOMETER_3D=y
CONFIG_IIO_ST_MAGN_3AXIS=y
CONFIG_IIO_ST_MAGN_I2C_3AXIS=y
CONFIG_IIO_ST_MAGN_SPI_3AXIS=y
#
# Triggers - standalone
#
# CONFIG_IIO_INTERRUPT_TRIGGER is not set
# CONFIG_IIO_SYSFS_TRIGGER is not set
#
# Pressure Sensors
#
# CONFIG_IIO_ST_PRESS is not set
# CONFIG_NTB is not set
# CONFIG_VME_BUS is not set
# CONFIG_PWM is not set
CONFIG_IPACK_BUS=y
# CONFIG_BOARD_TPCI200 is not set
# CONFIG_SERIAL_IPOCTAL is not set
# CONFIG_RESET_CONTROLLER is not set
# CONFIG_FMC is not set
#
# Firmware Drivers
#
CONFIG_EDD=y
CONFIG_EDD_OFF=y
CONFIG_FIRMWARE_MEMMAP=y
CONFIG_DELL_RBU=y
# CONFIG_DCDBAS is not set
# CONFIG_ISCSI_IBFT_FIND is not set
# CONFIG_GOOGLE_FIRMWARE is not set
#
# File systems
#
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_EXT2_FS=y
CONFIG_EXT2_FS_XATTR=y
# CONFIG_EXT2_FS_POSIX_ACL is not set
# CONFIG_EXT2_FS_SECURITY is not set
# CONFIG_EXT2_FS_XIP is not set
CONFIG_EXT3_FS=y
# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
# CONFIG_EXT3_FS_XATTR is not set
# CONFIG_EXT4_FS is not set
CONFIG_JBD=y
CONFIG_JBD_DEBUG=y
CONFIG_JBD2=y
CONFIG_JBD2_DEBUG=y
CONFIG_FS_MBCACHE=y
# CONFIG_REISERFS_FS is not set
# CONFIG_JFS_FS is not set
CONFIG_XFS_FS=y
# CONFIG_XFS_QUOTA is not set
CONFIG_XFS_POSIX_ACL=y
CONFIG_XFS_RT=y
CONFIG_XFS_DEBUG=y
CONFIG_GFS2_FS=y
CONFIG_OCFS2_FS=y
CONFIG_OCFS2_FS_O2CB=y
CONFIG_OCFS2_FS_STATS=y
# CONFIG_OCFS2_DEBUG_MASKLOG is not set
# CONFIG_OCFS2_DEBUG_FS is not set
CONFIG_BTRFS_FS=y
# CONFIG_BTRFS_FS_POSIX_ACL is not set
# CONFIG_BTRFS_FS_CHECK_INTEGRITY is not set
CONFIG_BTRFS_FS_RUN_SANITY_TESTS=y
# CONFIG_BTRFS_DEBUG is not set
CONFIG_NILFS2_FS=y
CONFIG_FS_POSIX_ACL=y
CONFIG_EXPORTFS=y
CONFIG_FILE_LOCKING=y
CONFIG_FSNOTIFY=y
CONFIG_DNOTIFY=y
# CONFIG_INOTIFY_USER is not set
CONFIG_FANOTIFY=y
CONFIG_QUOTA=y
CONFIG_QUOTA_NETLINK_INTERFACE=y
# CONFIG_PRINT_QUOTA_WARNING is not set
# CONFIG_QUOTA_DEBUG is not set
CONFIG_QUOTA_TREE=y
CONFIG_QFMT_V1=y
CONFIG_QFMT_V2=y
CONFIG_QUOTACTL=y
# CONFIG_AUTOFS4_FS is not set
# CONFIG_FUSE_FS is not set
#
# Caches
#
CONFIG_FSCACHE=y
CONFIG_FSCACHE_DEBUG=y
# CONFIG_CACHEFILES is not set
#
# CD-ROM/DVD Filesystems
#
CONFIG_ISO9660_FS=y
# CONFIG_JOLIET is not set
CONFIG_ZISOFS=y
# CONFIG_UDF_FS is not set
#
# DOS/FAT/NT Filesystems
#
CONFIG_FAT_FS=y
CONFIG_MSDOS_FS=y
# CONFIG_VFAT_FS is not set
CONFIG_FAT_DEFAULT_CODEPAGE=437
# CONFIG_NTFS_FS is not set
#
# Pseudo filesystems
#
# CONFIG_PROC_FS is not set
CONFIG_SYSFS=y
# CONFIG_TMPFS is not set
CONFIG_HUGETLBFS=y
CONFIG_HUGETLB_PAGE=y
CONFIG_CONFIGFS_FS=y
CONFIG_MISC_FILESYSTEMS=y
# CONFIG_ADFS_FS is not set
CONFIG_AFFS_FS=y
CONFIG_ECRYPT_FS=y
CONFIG_ECRYPT_FS_MESSAGING=y
# CONFIG_HFS_FS is not set
CONFIG_HFSPLUS_FS=y
CONFIG_BEFS_FS=y
CONFIG_BEFS_DEBUG=y
# CONFIG_BFS_FS is not set
CONFIG_EFS_FS=y
CONFIG_LOGFS=y
CONFIG_CRAMFS=y
CONFIG_SQUASHFS=y
# CONFIG_SQUASHFS_XATTR is not set
# CONFIG_SQUASHFS_ZLIB is not set
# CONFIG_SQUASHFS_LZO is not set
CONFIG_SQUASHFS_XZ=y
# CONFIG_SQUASHFS_4K_DEVBLK_SIZE is not set
# CONFIG_SQUASHFS_EMBEDDED is not set
CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3
CONFIG_VXFS_FS=y
# CONFIG_MINIX_FS is not set
CONFIG_OMFS_FS=y
# CONFIG_HPFS_FS is not set
CONFIG_QNX4FS_FS=y
CONFIG_QNX6FS_FS=y
CONFIG_QNX6FS_DEBUG=y
CONFIG_ROMFS_FS=y
CONFIG_ROMFS_BACKED_BY_BLOCK=y
CONFIG_ROMFS_ON_BLOCK=y
CONFIG_PSTORE=y
# CONFIG_PSTORE_CONSOLE is not set
CONFIG_PSTORE_RAM=y
# CONFIG_SYSV_FS is not set
CONFIG_UFS_FS=y
CONFIG_UFS_FS_WRITE=y
CONFIG_UFS_DEBUG=y
CONFIG_EXOFS_FS=y
CONFIG_EXOFS_DEBUG=y
CONFIG_F2FS_FS=y
CONFIG_F2FS_STAT_FS=y
CONFIG_F2FS_FS_XATTR=y
# CONFIG_F2FS_FS_POSIX_ACL is not set
# CONFIG_F2FS_FS_SECURITY is not set
CONFIG_ORE=y
# CONFIG_NETWORK_FILESYSTEMS is not set
CONFIG_NLS=y
CONFIG_NLS_DEFAULT="iso8859-1"
CONFIG_NLS_CODEPAGE_437=y
# CONFIG_NLS_CODEPAGE_737 is not set
CONFIG_NLS_CODEPAGE_775=y
# CONFIG_NLS_CODEPAGE_850 is not set
CONFIG_NLS_CODEPAGE_852=y
CONFIG_NLS_CODEPAGE_855=y
CONFIG_NLS_CODEPAGE_857=y
# CONFIG_NLS_CODEPAGE_860 is not set
# CONFIG_NLS_CODEPAGE_861 is not set
# CONFIG_NLS_CODEPAGE_862 is not set
CONFIG_NLS_CODEPAGE_863=y
CONFIG_NLS_CODEPAGE_864=y
# CONFIG_NLS_CODEPAGE_865 is not set
CONFIG_NLS_CODEPAGE_866=y
# CONFIG_NLS_CODEPAGE_869 is not set
CONFIG_NLS_CODEPAGE_936=y
CONFIG_NLS_CODEPAGE_950=y
CONFIG_NLS_CODEPAGE_932=y
CONFIG_NLS_CODEPAGE_949=y
# CONFIG_NLS_CODEPAGE_874 is not set
CONFIG_NLS_ISO8859_8=y
CONFIG_NLS_CODEPAGE_1250=y
CONFIG_NLS_CODEPAGE_1251=y
CONFIG_NLS_ASCII=y
CONFIG_NLS_ISO8859_1=y
# CONFIG_NLS_ISO8859_2 is not set
# CONFIG_NLS_ISO8859_3 is not set
CONFIG_NLS_ISO8859_4=y
# CONFIG_NLS_ISO8859_5 is not set
CONFIG_NLS_ISO8859_6=y
CONFIG_NLS_ISO8859_7=y
# CONFIG_NLS_ISO8859_9 is not set
# CONFIG_NLS_ISO8859_13 is not set
CONFIG_NLS_ISO8859_14=y
CONFIG_NLS_ISO8859_15=y
# CONFIG_NLS_KOI8_R is not set
CONFIG_NLS_KOI8_U=y
CONFIG_NLS_MAC_ROMAN=y
CONFIG_NLS_MAC_CELTIC=y
# CONFIG_NLS_MAC_CENTEURO is not set
CONFIG_NLS_MAC_CROATIAN=y
CONFIG_NLS_MAC_CYRILLIC=y
CONFIG_NLS_MAC_GAELIC=y
# CONFIG_NLS_MAC_GREEK is not set
# CONFIG_NLS_MAC_ICELAND is not set
# CONFIG_NLS_MAC_INUIT is not set
# CONFIG_NLS_MAC_ROMANIAN is not set
CONFIG_NLS_MAC_TURKISH=y
CONFIG_NLS_UTF8=y
#
# Kernel hacking
#
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
#
# printk and dmesg options
#
CONFIG_PRINTK_TIME=y
CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4
# CONFIG_BOOT_PRINTK_DELAY is not set
# CONFIG_DYNAMIC_DEBUG is not set
#
# Compile-time checks and compiler options
#
# CONFIG_DEBUG_INFO is not set
# CONFIG_ENABLE_WARN_DEPRECATED is not set
CONFIG_ENABLE_MUST_CHECK=y
CONFIG_FRAME_WARN=2048
# CONFIG_STRIP_ASM_SYMS is not set
# CONFIG_READABLE_ASM is not set
# CONFIG_UNUSED_SYMBOLS is not set
CONFIG_DEBUG_FS=y
CONFIG_HEADERS_CHECK=y
CONFIG_DEBUG_SECTION_MISMATCH=y
CONFIG_ARCH_WANT_FRAME_POINTERS=y
CONFIG_FRAME_POINTER=y
CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
# CONFIG_MAGIC_SYSRQ is not set
CONFIG_DEBUG_KERNEL=y
#
# Memory Debugging
#
# CONFIG_DEBUG_PAGEALLOC is not set
CONFIG_DEBUG_OBJECTS=y
CONFIG_DEBUG_OBJECTS_SELFTEST=y
CONFIG_DEBUG_OBJECTS_FREE=y
CONFIG_DEBUG_OBJECTS_TIMERS=y
# CONFIG_DEBUG_OBJECTS_WORK is not set
# CONFIG_DEBUG_OBJECTS_RCU_HEAD is not set
# CONFIG_DEBUG_OBJECTS_PERCPU_COUNTER is not set
CONFIG_DEBUG_OBJECTS_ENABLE_DEFAULT=1
CONFIG_HAVE_DEBUG_KMEMLEAK=y
# CONFIG_DEBUG_KMEMLEAK is not set
CONFIG_DEBUG_STACK_USAGE=y
CONFIG_DEBUG_VM=y
CONFIG_DEBUG_VM_RB=y
# CONFIG_DEBUG_VIRTUAL is not set
# CONFIG_DEBUG_MEMORY_INIT is not set
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
# CONFIG_DEBUG_STACKOVERFLOW is not set
CONFIG_HAVE_ARCH_KMEMCHECK=y
CONFIG_DEBUG_SHIRQ=y
#
# Debug Lockups and Hangs
#
CONFIG_LOCKUP_DETECTOR=y
CONFIG_HARDLOCKUP_DETECTOR=y
# CONFIG_BOOTPARAM_HARDLOCKUP_PANIC is not set
CONFIG_BOOTPARAM_HARDLOCKUP_PANIC_VALUE=0
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC=y
CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=1
CONFIG_DETECT_HUNG_TASK=y
CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120
# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set
CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0
CONFIG_PANIC_ON_OOPS=y
CONFIG_PANIC_ON_OOPS_VALUE=1
#
# Lock Debugging (spinlocks, mutexes, etc...)
#
CONFIG_DEBUG_RT_MUTEXES=y
CONFIG_DEBUG_PI_LIST=y
CONFIG_RT_MUTEX_TESTER=y
CONFIG_DEBUG_SPINLOCK=y
CONFIG_DEBUG_MUTEXES=y
# CONFIG_DEBUG_WW_MUTEX_SLOWPATH is not set
CONFIG_DEBUG_LOCK_ALLOC=y
# CONFIG_PROVE_LOCKING is not set
CONFIG_LOCKDEP=y
CONFIG_LOCK_STAT=y
CONFIG_DEBUG_LOCKDEP=y
CONFIG_DEBUG_ATOMIC_SLEEP=y
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
CONFIG_STACKTRACE=y
# CONFIG_DEBUG_KOBJECT is not set
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_WRITECOUNT=y
# CONFIG_DEBUG_LIST is not set
CONFIG_DEBUG_SG=y
# CONFIG_DEBUG_NOTIFIERS is not set
# CONFIG_DEBUG_CREDENTIALS is not set
#
# RCU Debugging
#
CONFIG_SPARSE_RCU_POINTER=y
# CONFIG_RCU_TORTURE_TEST is not set
CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_RCU_TRACE=y
# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set
CONFIG_NOTIFIER_ERROR_INJECTION=y
CONFIG_PM_NOTIFIER_ERROR_INJECT=y
CONFIG_FAULT_INJECTION=y
CONFIG_FAIL_PAGE_ALLOC=y
CONFIG_FAIL_MAKE_REQUEST=y
# CONFIG_FAIL_IO_TIMEOUT is not set
# CONFIG_FAIL_MMC_REQUEST is not set
CONFIG_FAULT_INJECTION_DEBUG_FS=y
CONFIG_ARCH_HAS_DEBUG_STRICT_USER_COPY_CHECKS=y
# CONFIG_DEBUG_STRICT_USER_COPY_CHECKS is not set
CONFIG_USER_STACKTRACE_SUPPORT=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y
CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_DYNAMIC_FTRACE_WITH_REGS=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_FENTRY=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_TRACE_CLOCK=y
CONFIG_TRACING_SUPPORT=y
# CONFIG_FTRACE is not set
#
# Runtime Testing
#
CONFIG_LKDTM=y
# CONFIG_TEST_LIST_SORT is not set
# CONFIG_BACKTRACE_SELF_TEST is not set
# CONFIG_ATOMIC64_SELFTEST is not set
CONFIG_ASYNC_RAID6_TEST=y
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set
CONFIG_BUILD_DOCSRC=y
CONFIG_DMA_API_DEBUG=y
# CONFIG_SAMPLES is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
CONFIG_STRICT_DEVMEM=y
# CONFIG_X86_VERBOSE_BOOTUP is not set
CONFIG_EARLY_PRINTK=y
# CONFIG_EARLY_PRINTK_DBGP is not set
CONFIG_X86_PTDUMP=y
# CONFIG_DEBUG_RODATA is not set
CONFIG_DOUBLEFAULT=y
# CONFIG_DEBUG_TLBFLUSH is not set
CONFIG_IOMMU_STRESS=y
CONFIG_HAVE_MMIOTRACE_SUPPORT=y
CONFIG_IO_DELAY_TYPE_0X80=0
CONFIG_IO_DELAY_TYPE_0XED=1
CONFIG_IO_DELAY_TYPE_UDELAY=2
CONFIG_IO_DELAY_TYPE_NONE=3
CONFIG_IO_DELAY_0X80=y
# CONFIG_IO_DELAY_0XED is not set
# CONFIG_IO_DELAY_UDELAY is not set
# CONFIG_IO_DELAY_NONE is not set
CONFIG_DEFAULT_IO_DELAY_TYPE=0
# CONFIG_DEBUG_BOOT_PARAMS is not set
# CONFIG_CPA_DEBUG is not set
CONFIG_OPTIMIZE_INLINING=y
# CONFIG_DEBUG_NMI_SELFTEST is not set
# CONFIG_X86_DEBUG_STATIC_CPU_HAS is not set
#
# Security options
#
CONFIG_KEYS=y
CONFIG_TRUSTED_KEYS=y
CONFIG_ENCRYPTED_KEYS=y
CONFIG_KEYS_DEBUG_PROC_KEYS=y
CONFIG_SECURITY_DMESG_RESTRICT=y
# CONFIG_SECURITY is not set
CONFIG_SECURITYFS=y
CONFIG_DEFAULT_SECURITY_DAC=y
CONFIG_DEFAULT_SECURITY=""
CONFIG_XOR_BLOCKS=y
CONFIG_ASYNC_CORE=y
CONFIG_ASYNC_MEMCPY=y
CONFIG_ASYNC_XOR=y
CONFIG_ASYNC_PQ=y
CONFIG_ASYNC_RAID6_RECOV=y
CONFIG_CRYPTO=y
#
# Crypto core or helper
#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_ALGAPI2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_BLKCIPHER=y
CONFIG_CRYPTO_BLKCIPHER2=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_PCOMP=y
CONFIG_CRYPTO_PCOMP2=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_USER=y
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_AUTHENC=y
CONFIG_CRYPTO_ABLK_HELPER_X86=y
CONFIG_CRYPTO_GLUE_HELPER_X86=y
#
# Authenticated Encryption with Associated Data
#
CONFIG_CRYPTO_CCM=y
CONFIG_CRYPTO_GCM=y
CONFIG_CRYPTO_SEQIV=y
#
# Block modes
#
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CTR=y
CONFIG_CRYPTO_CTS=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_LRW=y
CONFIG_CRYPTO_PCBC=y
CONFIG_CRYPTO_XTS=y
#
# Hash modes
#
CONFIG_CRYPTO_CMAC=y
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
CONFIG_CRYPTO_VMAC=y
#
# Digest
#
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CRC32C_INTEL=y
CONFIG_CRYPTO_CRC32=y
CONFIG_CRYPTO_CRC32_PCLMUL=y
CONFIG_CRYPTO_GHASH=y
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_MICHAEL_MIC=y
CONFIG_CRYPTO_RMD128=y
# CONFIG_CRYPTO_RMD160 is not set
# CONFIG_CRYPTO_RMD256 is not set
CONFIG_CRYPTO_RMD320=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA1_SSSE3=y
CONFIG_CRYPTO_SHA256_SSSE3=y
CONFIG_CRYPTO_SHA512_SSSE3=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_WP512 is not set
CONFIG_CRYPTO_GHASH_CLMUL_NI_INTEL=y
#
# Ciphers
#
CONFIG_CRYPTO_AES=y
CONFIG_CRYPTO_AES_X86_64=y
# CONFIG_CRYPTO_AES_NI_INTEL is not set
CONFIG_CRYPTO_ANUBIS=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_BLOWFISH=y
CONFIG_CRYPTO_BLOWFISH_COMMON=y
CONFIG_CRYPTO_BLOWFISH_X86_64=y
CONFIG_CRYPTO_CAMELLIA=y
CONFIG_CRYPTO_CAMELLIA_X86_64=y
CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64=y
CONFIG_CRYPTO_CAMELLIA_AESNI_AVX2_X86_64=y
CONFIG_CRYPTO_CAST_COMMON=y
CONFIG_CRYPTO_CAST5=y
CONFIG_CRYPTO_CAST5_AVX_X86_64=y
CONFIG_CRYPTO_CAST6=y
# CONFIG_CRYPTO_CAST6_AVX_X86_64 is not set
# CONFIG_CRYPTO_DES is not set
CONFIG_CRYPTO_FCRYPT=y
CONFIG_CRYPTO_KHAZAD=y
CONFIG_CRYPTO_SALSA20=y
CONFIG_CRYPTO_SALSA20_X86_64=y
# CONFIG_CRYPTO_SEED is not set
CONFIG_CRYPTO_SERPENT=y
# CONFIG_CRYPTO_SERPENT_SSE2_X86_64 is not set
CONFIG_CRYPTO_SERPENT_AVX_X86_64=y
CONFIG_CRYPTO_SERPENT_AVX2_X86_64=y
# CONFIG_CRYPTO_TEA is not set
CONFIG_CRYPTO_TWOFISH=y
CONFIG_CRYPTO_TWOFISH_COMMON=y
CONFIG_CRYPTO_TWOFISH_X86_64=y
CONFIG_CRYPTO_TWOFISH_X86_64_3WAY=y
CONFIG_CRYPTO_TWOFISH_AVX_X86_64=y
#
# Compression
#
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_ZLIB=y
CONFIG_CRYPTO_LZO=y
# CONFIG_CRYPTO_LZ4 is not set
# CONFIG_CRYPTO_LZ4HC is not set
#
# Random Number Generation
#
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_USER_API=y
CONFIG_CRYPTO_USER_API_HASH=y
# CONFIG_CRYPTO_USER_API_SKCIPHER is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_PADLOCK is not set
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_PUBLIC_KEY_ALGO_RSA=y
CONFIG_X509_CERTIFICATE_PARSER=y
CONFIG_HAVE_KVM=y
CONFIG_VIRTUALIZATION=y
# CONFIG_BINARY_PRINTF is not set
#
# Library routines
#
CONFIG_RAID6_PQ=y
CONFIG_BITREVERSE=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_NET_UTILS=y
CONFIG_GENERIC_FIND_FIRST_BIT=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IO=y
CONFIG_CRC_CCITT=y
CONFIG_CRC16=y
CONFIG_CRC_T10DIF=y
CONFIG_CRC_ITU_T=y
CONFIG_CRC32=y
# CONFIG_CRC32_SELFTEST is not set
# CONFIG_CRC32_SLICEBY8 is not set
# CONFIG_CRC32_SLICEBY4 is not set
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_BIT=y
CONFIG_CRC7=y
CONFIG_LIBCRC32C=y
CONFIG_CRC8=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_XZ_DEC=y
# CONFIG_XZ_DEC_X86 is not set
CONFIG_XZ_DEC_POWERPC=y
# CONFIG_XZ_DEC_IA64 is not set
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_BCJ=y
# CONFIG_XZ_DEC_TEST is not set
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DECOMPRESS_LZMA=y
CONFIG_DECOMPRESS_LZO=y
CONFIG_REED_SOLOMON=y
CONFIG_REED_SOLOMON_ENC8=y
CONFIG_REED_SOLOMON_DEC8=y
CONFIG_BTREE=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
CONFIG_DQL=y
CONFIG_NLATTR=y
CONFIG_ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE=y
CONFIG_AVERAGE=y
CONFIG_CLZ_TAB=y
CONFIG_CORDIC=y
CONFIG_DDR=y
CONFIG_MPILIB=y
CONFIG_OID_REGISTRY=y
^ permalink raw reply
* [PATCH v2 8/8] ath9k: Identify WB335 Antenna configuration
From: Sujith Manoharan @ 2013-09-02 8:29 UTC (permalink / raw)
To: John Linville; +Cc: linux-wireless
In-Reply-To: <1378110546-22305-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
There are 2 types of WB335 cards, 1-antenna and 2-antenna.
Identify them based on PCI subsystem IDs, this will be used
for MCI/BTCOEX tweaks.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
drivers/net/wireless/ath/ath9k/ath9k.h | 16 +--
drivers/net/wireless/ath/ath9k/init.c | 17 ++++
drivers/net/wireless/ath/ath9k/pci.c | 176 ++++++++++++++++++++++++++++++++-
3 files changed, 200 insertions(+), 9 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 585c310..5fd4294 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -625,13 +625,15 @@ void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
/* Main driver core */
/********************/
-#define ATH9K_PCI_CUS198 0x0001
-#define ATH9K_PCI_CUS230 0x0002
-#define ATH9K_PCI_CUS217 0x0004
-#define ATH9K_PCI_CUS252 0x0008
-#define ATH9K_PCI_WOW 0x0010
-#define ATH9K_PCI_BT_ANT_DIV 0x0020
-#define ATH9K_PCI_D3_L1_WAR 0x0040
+#define ATH9K_PCI_CUS198 0x0001
+#define ATH9K_PCI_CUS230 0x0002
+#define ATH9K_PCI_CUS217 0x0004
+#define ATH9K_PCI_CUS252 0x0008
+#define ATH9K_PCI_WOW 0x0010
+#define ATH9K_PCI_BT_ANT_DIV 0x0020
+#define ATH9K_PCI_D3_L1_WAR 0x0040
+#define ATH9K_PCI_AR9565_1ANT 0x0080
+#define ATH9K_PCI_AR9565_2ANT 0x0100
/*
* Default cache line size, in bytes.
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index 4fe0535..e3d11c4 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -550,6 +550,23 @@ static void ath9k_init_platform(struct ath_softc *sc)
if (sc->driver_data & ATH9K_PCI_CUS252)
ath_info(common, "CUS252 card detected\n");
+ if (sc->driver_data & ATH9K_PCI_AR9565_1ANT)
+ ath_info(common, "WB335 1-ANT card detected\n");
+
+ if (sc->driver_data & ATH9K_PCI_AR9565_2ANT)
+ ath_info(common, "WB335 2-ANT card detected\n");
+
+ /*
+ * Some WB335 cards do not support antenna diversity. Since
+ * we use a hardcoded value for AR9565 instead of using the
+ * EEPROM/OTP data, remove the combining feature from
+ * the HW capabilities bitmap.
+ */
+ if (sc->driver_data & (ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_AR9565_2ANT)) {
+ if (!(sc->driver_data & ATH9K_PCI_BT_ANT_DIV))
+ pCap->hw_caps &= ~ATH9K_HW_CAP_ANT_DIV_COMB;
+ }
+
if (sc->driver_data & ATH9K_PCI_BT_ANT_DIV) {
pCap->hw_caps |= ATH9K_HW_CAP_BT_ANT_DIV;
ath_info(common, "Set BT/WLAN RX diversity capability\n");
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 465574b..1aa757a 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -275,12 +275,184 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
0x0036,
PCI_VENDOR_ID_ATHEROS,
0x3028),
- .driver_data = ATH9K_PCI_CUS252 | ATH9K_PCI_BT_ANT_DIV },
+ .driver_data = ATH9K_PCI_CUS252 |
+ ATH9K_PCI_AR9565_2ANT |
+ ATH9K_PCI_BT_ANT_DIV },
{ PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
0x0036,
PCI_VENDOR_ID_AZWAVE,
0x2176),
- .driver_data = ATH9K_PCI_CUS252 | ATH9K_PCI_BT_ANT_DIV },
+ .driver_data = ATH9K_PCI_CUS252 |
+ ATH9K_PCI_AR9565_2ANT |
+ ATH9K_PCI_BT_ANT_DIV },
+
+ /* WB335 1-ANT */
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_FOXCONN,
+ 0xE068),
+ .driver_data = ATH9K_PCI_AR9565_1ANT },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x185F, /* WNC */
+ 0xA119),
+ .driver_data = ATH9K_PCI_AR9565_1ANT },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x11AD, /* LITEON */
+ 0x0632),
+ .driver_data = ATH9K_PCI_AR9565_1ANT },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x11AD, /* LITEON */
+ 0x6671),
+ .driver_data = ATH9K_PCI_AR9565_1ANT },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x1B9A, /* XAVI */
+ 0x2811),
+ .driver_data = ATH9K_PCI_AR9565_1ANT },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x1B9A, /* XAVI */
+ 0x2812),
+ .driver_data = ATH9K_PCI_AR9565_1ANT },
+
+ /* WB335 1-ANT / Antenna Diversity */
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_ATHEROS,
+ 0x3025),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_ATHEROS,
+ 0x3026),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_ATHEROS,
+ 0x302B),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_FOXCONN,
+ 0xE069),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x185F, /* WNC */
+ 0x3028),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x11AD, /* LITEON */
+ 0x0622),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x11AD, /* LITEON */
+ 0x0672),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x11AD, /* LITEON */
+ 0x0662),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_AZWAVE,
+ 0x213A),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_LENOVO,
+ 0x3026),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_HP,
+ 0x18E3),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_HP,
+ 0x217F),
+ .driver_data = ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_BT_ANT_DIV },
+
+ /* WB335 2-ANT */
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_SAMSUNG,
+ 0x411A),
+ .driver_data = ATH9K_PCI_AR9565_2ANT },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_SAMSUNG,
+ 0x411B),
+ .driver_data = ATH9K_PCI_AR9565_2ANT },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_SAMSUNG,
+ 0x411C),
+ .driver_data = ATH9K_PCI_AR9565_2ANT },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_SAMSUNG,
+ 0x411D),
+ .driver_data = ATH9K_PCI_AR9565_2ANT },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_SAMSUNG,
+ 0x411E),
+ .driver_data = ATH9K_PCI_AR9565_2ANT },
+
+ /* WB335 2-ANT / Antenna-Diversity */
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_ATHEROS,
+ 0x3027),
+ .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_ATHEROS,
+ 0x302C),
+ .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x11AD, /* LITEON */
+ 0x0642),
+ .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x11AD, /* LITEON */
+ 0x0652),
+ .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x11AD, /* LITEON */
+ 0x0612),
+ .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_AZWAVE,
+ 0x2130),
+ .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x144F, /* ASKEY */
+ 0x7202),
+ .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x1B9A, /* XAVI */
+ 0x2810),
+ .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ 0x185F, /* WNC */
+ 0x3027),
+ .driver_data = ATH9K_PCI_AR9565_2ANT | ATH9K_PCI_BT_ANT_DIV },
/* PCI-E AR9565 (WB335) */
{ PCI_VDEVICE(ATHEROS, 0x0036),
--
1.8.4
^ permalink raw reply related
* [PATCH v2 7/8] ath9k: Identify CUS252 cards
From: Sujith Manoharan @ 2013-09-02 8:29 UTC (permalink / raw)
To: John Linville; +Cc: linux-wireless
In-Reply-To: <1378110546-22305-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
These cards are based on WB335/AR9565.
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
drivers/net/wireless/ath/ath9k/ath9k.h | 7 ++++---
drivers/net/wireless/ath/ath9k/init.c | 3 +++
drivers/net/wireless/ath/ath9k/pci.c | 12 ++++++++++++
3 files changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 74a8770..585c310 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -628,9 +628,10 @@ void ath_ant_comb_scan(struct ath_softc *sc, struct ath_rx_status *rs);
#define ATH9K_PCI_CUS198 0x0001
#define ATH9K_PCI_CUS230 0x0002
#define ATH9K_PCI_CUS217 0x0004
-#define ATH9K_PCI_WOW 0x0008
-#define ATH9K_PCI_BT_ANT_DIV 0x0010
-#define ATH9K_PCI_D3_L1_WAR 0x0020
+#define ATH9K_PCI_CUS252 0x0008
+#define ATH9K_PCI_WOW 0x0010
+#define ATH9K_PCI_BT_ANT_DIV 0x0020
+#define ATH9K_PCI_D3_L1_WAR 0x0040
/*
* Default cache line size, in bytes.
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index 9a1f349..4fe0535 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -547,6 +547,9 @@ static void ath9k_init_platform(struct ath_softc *sc)
if (sc->driver_data & ATH9K_PCI_CUS217)
ath_info(common, "CUS217 card detected\n");
+ if (sc->driver_data & ATH9K_PCI_CUS252)
+ ath_info(common, "CUS252 card detected\n");
+
if (sc->driver_data & ATH9K_PCI_BT_ANT_DIV) {
pCap->hw_caps |= ATH9K_HW_CAP_BT_ANT_DIV;
ath_info(common, "Set BT/WLAN RX diversity capability\n");
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index b43a2ec..465574b 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -270,6 +270,18 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
{ PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9462 */
{ PCI_VDEVICE(ATHEROS, 0x0037) }, /* PCI-E AR1111/AR9485 */
+ /* CUS252 */
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_ATHEROS,
+ 0x3028),
+ .driver_data = ATH9K_PCI_CUS252 | ATH9K_PCI_BT_ANT_DIV },
+ { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
+ 0x0036,
+ PCI_VENDOR_ID_AZWAVE,
+ 0x2176),
+ .driver_data = ATH9K_PCI_CUS252 | ATH9K_PCI_BT_ANT_DIV },
+
/* PCI-E AR9565 (WB335) */
{ PCI_VDEVICE(ATHEROS, 0x0036),
.driver_data = ATH9K_PCI_BT_ANT_DIV },
--
1.8.4
^ permalink raw reply related
* [PATCH v2 6/8] ath9k: Enable antenna diversity for WB335
From: Sujith Manoharan @ 2013-09-02 8:29 UTC (permalink / raw)
To: John Linville; +Cc: linux-wireless
In-Reply-To: <1378110546-22305-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
drivers/net/wireless/ath/ath9k/pci.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index d089a7c..b43a2ec 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -269,7 +269,11 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
{ PCI_VDEVICE(ATHEROS, 0x0034) }, /* PCI-E AR9462 */
{ PCI_VDEVICE(ATHEROS, 0x0037) }, /* PCI-E AR1111/AR9485 */
- { PCI_VDEVICE(ATHEROS, 0x0036) }, /* PCI-E AR9565 */
+
+ /* PCI-E AR9565 (WB335) */
+ { PCI_VDEVICE(ATHEROS, 0x0036),
+ .driver_data = ATH9K_PCI_BT_ANT_DIV },
+
{ 0 }
};
--
1.8.4
^ permalink raw reply related
* [PATCH v2 5/8] ath9k: Add support for AR9565 v1.0.1 LNA diversity
From: Sujith Manoharan @ 2013-09-02 8:29 UTC (permalink / raw)
To: John Linville; +Cc: linux-wireless
In-Reply-To: <1378110546-22305-1-git-send-email-sujith@msujith.org>
From: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
---
drivers/net/wireless/ath/ath9k/antenna.c | 36 +++++++----------------------
drivers/net/wireless/ath/ath9k/ar9002_phy.c | 1 +
drivers/net/wireless/ath/ath9k/ar9003_phy.c | 6 ++++-
drivers/net/wireless/ath/ath9k/ath9k.h | 1 -
drivers/net/wireless/ath/ath9k/hw.h | 1 +
5 files changed, 15 insertions(+), 30 deletions(-)
diff --git a/drivers/net/wireless/ath/ath9k/antenna.c b/drivers/net/wireless/ath/ath9k/antenna.c
index dd1cc73..bd048cc 100644
--- a/drivers/net/wireless/ath/ath9k/antenna.c
+++ b/drivers/net/wireless/ath/ath9k/antenna.c
@@ -332,7 +332,7 @@ static void ath_select_ant_div_from_quick_scan(struct ath_ant_comb *antcomb,
}
if (antcomb->rssi_lna2 > antcomb->rssi_lna1 +
- ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)
+ div_ant_conf->lna1_lna2_switch_delta)
div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA2;
else
div_ant_conf->main_lna_conf = ATH_ANT_DIV_COMB_LNA1;
@@ -554,42 +554,22 @@ static void ath_ant_div_conf_fast_divbias(struct ath_hw_antcomb_conf *ant_conf,
ant_conf->fast_div_bias = 0x1;
break;
case 0x10: /* LNA2 A-B */
- if ((antcomb->scan == 0) &&
- (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) {
- ant_conf->fast_div_bias = 0x3f;
- } else {
- ant_conf->fast_div_bias = 0x1;
- }
+ ant_conf->fast_div_bias = 0x2;
break;
case 0x12: /* LNA2 LNA1 */
- ant_conf->fast_div_bias = 0x39;
+ ant_conf->fast_div_bias = 0x3f;
break;
case 0x13: /* LNA2 A+B */
- if ((antcomb->scan == 0) &&
- (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) {
- ant_conf->fast_div_bias = 0x3f;
- } else {
- ant_conf->fast_div_bias = 0x1;
- }
+ ant_conf->fast_div_bias = 0x2;
break;
case 0x20: /* LNA1 A-B */
- if ((antcomb->scan == 0) &&
- (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) {
- ant_conf->fast_div_bias = 0x3f;
- } else {
- ant_conf->fast_div_bias = 0x4;
- }
+ ant_conf->fast_div_bias = 0x3;
break;
case 0x21: /* LNA1 LNA2 */
- ant_conf->fast_div_bias = 0x6;
+ ant_conf->fast_div_bias = 0x3;
break;
case 0x23: /* LNA1 A+B */
- if ((antcomb->scan == 0) &&
- (alt_ratio > ATH_ANT_DIV_COMB_ALT_ANT_RATIO)) {
- ant_conf->fast_div_bias = 0x3f;
- } else {
- ant_conf->fast_div_bias = 0x6;
- }
+ ant_conf->fast_div_bias = 0x3;
break;
case 0x30: /* A+B A-B */
ant_conf->fast_div_bias = 0x1;
@@ -638,7 +618,7 @@ static void ath_ant_try_scan(struct ath_ant_comb *antcomb,
antcomb->rssi_sub = alt_rssi_avg;
antcomb->scan = false;
if (antcomb->rssi_lna2 >
- (antcomb->rssi_lna1 + ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA)) {
+ (antcomb->rssi_lna1 + conf->lna1_lna2_switch_delta)) {
/* use LNA2 as main LNA */
if ((antcomb->rssi_add > antcomb->rssi_lna1) &&
(antcomb->rssi_add > antcomb->rssi_sub)) {
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
index 1fc1fa9..7a5569b 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
@@ -532,6 +532,7 @@ static void ar9002_hw_antdiv_comb_conf_get(struct ath_hw *ah,
AR_PHY_9285_ANT_DIV_ALT_LNACONF_S;
antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >>
AR_PHY_9285_FAST_DIV_BIAS_S;
+ antconf->lna1_lna2_switch_delta = -1;
antconf->lna1_lna2_delta = -3;
antconf->div_group = 0;
}
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 9ca9b2c..b8a279e 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -1375,15 +1375,19 @@ static void ar9003_hw_antdiv_comb_conf_get(struct ath_hw *ah,
AR_PHY_ANT_FAST_DIV_BIAS_S;
if (AR_SREV_9330_11(ah)) {
+ antconf->lna1_lna2_switch_delta = -1;
antconf->lna1_lna2_delta = -9;
antconf->div_group = 1;
} else if (AR_SREV_9485(ah)) {
+ antconf->lna1_lna2_switch_delta = -1;
antconf->lna1_lna2_delta = -9;
antconf->div_group = 2;
} else if (AR_SREV_9565(ah)) {
- antconf->lna1_lna2_delta = -3;
+ antconf->lna1_lna2_switch_delta = 3;
+ antconf->lna1_lna2_delta = -9;
antconf->div_group = 3;
} else {
+ antconf->lna1_lna2_switch_delta = -1;
antconf->lna1_lna2_delta = -3;
antconf->div_group = 0;
}
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 2ee35f6..74a8770 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -581,7 +581,6 @@ static inline void ath_fill_led_pin(struct ath_softc *sc)
#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO_LOW_RSSI 50
#define ATH_ANT_DIV_COMB_ALT_ANT_RATIO2_LOW_RSSI 50
-#define ATH_ANT_DIV_COMB_LNA1_LNA2_SWITCH_DELTA -1
#define ATH_ANT_DIV_COMB_LNA1_DELTA_HI -4
#define ATH_ANT_DIV_COMB_LNA1_DELTA_MID -2
#define ATH_ANT_DIV_COMB_LNA1_DELTA_LOW 2
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 69a907b..88f67c3 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -558,6 +558,7 @@ struct ath_hw_antcomb_conf {
u8 main_gaintb;
u8 alt_gaintb;
int lna1_lna2_delta;
+ int lna1_lna2_switch_delta;
u8 div_group;
};
--
1.8.4
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