Some problem about code reading

Some problem about code reading

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Hi,
  I met some problems when reading sourcecode of u-boot 1.1.4 (for mpc85xx)

file /cpu/mpc85xx/start.s line 276


276.    #if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
277.    /* Special sequence needed to update CCSRBAR itself */
278.    lis r4, CFG_CCSRBAR_DEFAULT@h
279.    ori r4, r4, CFG_CCSRBAR_DEFAULT@l
280.
281.    lis r5, CFG_CCSRBAR@h
282.    ori r5, r5, CFG_CCSRBAR@l
283.    srwi r6,r5,12
284.    stw r6, 0(r4)
285.    isync
286.
287.     lis r5, 0xffff
288.     ori r5,r5,0xf000
289.     lwz r5, 0(r5)
290.     isync
291.
292.    lis r3, CFG_CCSRBAR@h
293.    lwz r5, CFG_CCSRBAR@l(r3)
294.     isync
295.    #endif


I think it means if we don't use default CCSRBAR, we put the CCSRBAR addr actually used to the proper place in default CCSRBAR, so that it can jump to the addr we want to automatically.(line 276-286).

But, I don't know what line 287-294 does. Can some one tell me pls? 
Thanks for your help. 

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RE: Some problem about code reading

[Wang Haiying-r54964]

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Hi, 
 
please read the following from MPC85xx UM about the sequence on how to
write CCSRBAR:
 
*************************************
When the e500 core is writing to CCSRBAR, it should use the following
sequence:

- Read the current value of CCSRBAR using a load word instruction
followed by an

    isync. This forces all accesses to configuration space to complete.

- Write the new value to CCSRBAR.

- Perform a load of an address that does not access configuration space
or the on-chip

SRAM, but has an address mapping already in effect (for example, boot
ROM).

Follow this load with an isync.

- Read the contents of CCSRBAR from its new location, followed by
another isync

instruction.

****************************************

The codes  between line 287-294 complete the third step above.

 
Haiying 



________________________________

	From:
linuxppc-embedded-bounces+haiying.wang=freescale.com@ozlabs.org
[mailto:linuxppc-embedded-bounces+haiying.wang=freescale.com@ozlabs.org]
On Behalf Of enorm
	Sent: Wednesday, August 30, 2006 9:46 AM
	To: linuxppc-embedded@ozlabs.org
	Subject: Some problem about code reading 
	
	
	Hi,
	  I met some problems when reading sourcecode of u-boot 1.1.4
(for mpc85xx)
	 
	file /cpu/mpc85xx/start.s line 276
	 
	 
	276.    #if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
	277.    /* Special sequence needed to update CCSRBAR itself */
	278.    lis r4, CFG_CCSRBAR_DEFAULT@h
	279.    ori r4, r4, CFG_CCSRBAR_DEFAULT@l
	280.
	281.    lis r5, CFG_CCSRBAR@h
	282.    ori r5, r5, CFG_CCSRBAR@l
	283.    srwi r6,r5,12
	284.    stw r6, 0(r4)
	285.    isync
	286.
	287.     lis r5, 0xffff
	288.     ori r5,r5,0xf000
	289.     lwz r5, 0(r5)
	290.     isync
	291.
	292.    lis r3, CFG_CCSRBAR@h
	293.    lwz r5, CFG_CCSRBAR@l(r3)
	294.     isync
	295.    #endif
	 
	 
	I think it means if we don't use default CCSRBAR, we put the
CCSRBAR addr actually used to the proper place in default CCSRBAR, so
that it can jump to the addr we want to automatically.(line 276-286).
	 
	But, I don't know what line 287-294 does. Can some one tell me
pls? 
	Thanks for your help. 
	 


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