RE: ppc85xx DMA

RE: ppc85xx DMA

[Liu Dave-r63238]

> Dear sirs,
> 
> I am trying to add a DMA transfer component to my driver on 
> linux 2.6 on a ppc 8541.  Following the steps listed in the 
> reference manual, I write the SAR, SATR, DAR, DATR and BCR 
> registers before cycling the bit in the MR register to start 
> the transfer.
> 
What is the DMA transfer mode? Is direct or chaining mode?

> The SR register though indicates a transfer error as soon as 
> I write the DAR register.  Clearly I've gotten the mapping 
> wrong. I know what the address I am trying to write to in 
> kernel space is, what is unclear is what address the DAR 
> register is expecting.
> 

Did you ioremap the DMA register space?
The DAR register need the physical address

Dave

Re: ppc85xx DMA

[Naru Sundar]

On Tue, Jun 06, 2006 at 09:39:29AM +0800, Liu Dave-r63238 wrote:
> What is the DMA transfer mode? Is direct or chaining mode?

Direct mode.  I fixed an error with my bit ordering for the configuration
registers, and now the transfer seems to complete, but I don't see any
actual data showing up in the destination register that I am writing to.

> Did you ioremap the DMA register space?

Yes, I can write the destination address manually.  So I am thinking my addresses
are wrong.

For the source and dest address I used:

dma_map_single(NULL, ptr, len, DMA_TO_DEVICE)

(which effectively does a virt_to_bus on ppc and so should just return to me
the bus address used by the dma).

-naru

Re: ppc85xx DMA

[Naru Sundar]

To clarify, I am definitely using the physical addresses.  virt_to_bus and
virt_to_phys result in the same value.  My transfer completes and I see
BCR go back to 0, but I can't manage to actually see any data difference
at the destination side.

The destination address is an ioremapped region that I pass through
virt_to_phys.  The src is kmalloc'd memory that has GFP_DMA set.

On Tue, Jun 06, 2006 at 11:55:48AM -0700, Naru Sundar wrote:
> On Tue, Jun 06, 2006 at 09:39:29AM +0800, Liu Dave-r63238 wrote:
> > What is the DMA transfer mode? Is direct or chaining mode?
> 
> Direct mode.  I fixed an error with my bit ordering for the configuration
> registers, and now the transfer seems to complete, but I don't see any
> actual data showing up in the destination register that I am writing to.
> 
> > Did you ioremap the DMA register space?
> 
> Yes, I can write the destination address manually.  So I am thinking my addresses
> are wrong.
> 
> For the source and dest address I used:
> 
> dma_map_single(NULL, ptr, len, DMA_TO_DEVICE)
> 
> (which effectively does a virt_to_bus on ppc and so should just return to me
> the bus address used by the dma).
> 
> -naru
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded

Re: ppc85xx DMA

[Naru Sundar]

Ah hah.  I got it working. 

Turns out using the ioremapped address was bad, I had to use the actual
nonremapped physical address.

Thanks for the info!

-naru

On Tue, Jun 06, 2006 at 02:16:10PM -0700, Naru Sundar wrote:
> To clarify, I am definitely using the physical addresses.  virt_to_bus and
> virt_to_phys result in the same value.  My transfer completes and I see
> BCR go back to 0, but I can't manage to actually see any data difference
> at the destination side.
> 
> The destination address is an ioremapped region that I pass through
> virt_to_phys.  The src is kmalloc'd memory that has GFP_DMA set.
> 
> On Tue, Jun 06, 2006 at 11:55:48AM -0700, Naru Sundar wrote:
> > On Tue, Jun 06, 2006 at 09:39:29AM +0800, Liu Dave-r63238 wrote:
> > > What is the DMA transfer mode? Is direct or chaining mode?
> > 
> > Direct mode.  I fixed an error with my bit ordering for the configuration
> > registers, and now the transfer seems to complete, but I don't see any
> > actual data showing up in the destination register that I am writing to.
> > 
> > > Did you ioremap the DMA register space?
> > 
> > Yes, I can write the destination address manually.  So I am thinking my addresses
> > are wrong.
> > 
> > For the source and dest address I used:
> > 
> > dma_map_single(NULL, ptr, len, DMA_TO_DEVICE)
> > 
> > (which effectively does a virt_to_bus on ppc and so should just return to me
> > the bus address used by the dma).
> > 
> > -naru
> > _______________________________________________
> > Linuxppc-embedded mailing list
> > Linuxppc-embedded@ozlabs.org
> > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded

ppc85xx DMA

[Naru Sundar]

Dear sirs,

I am trying to add a DMA transfer component to my driver on linux 2.6 on a
ppc 8541.  Following the steps listed in the reference manual, I write the
SAR, SATR, DAR, DATR and BCR registers before cycling the bit in the MR
register to start the transfer.

The SR register though indicates a transfer error as soon as I write the
DAR register.  Clearly I've gotten the mapping wrong. I know what the
address I am trying to write to in kernel space is, what is unclear is
what address the DAR register is expecting.

Any help would be appreciated

-naru