From: Ricardo Scop <scop@digitel.com.br>
To: linuxppc-embedded@ozlabs.org
Cc: DI BACCO ANTONIO - technolabs <Antonio.DiBacco@technolabs.it>
Subject: Re: Linux interrupt managing on 8xx
Date: Wed, 6 Jun 2007 01:02:07 -0300 [thread overview]
Message-ID: <200706060102.07410.scop@digitel.com.br> (raw)
In-Reply-To: <F1F6EC0C8B75034F9E3A79FC85122E8E264992@aquib01a>
On Monday 04 June 2007 17:37, DI BACCO ANTONIO - technolabs wrote:
> I have a component named pca9555 (on the i2c bus) that is an I/O expander.
> It can generate an interrupt to the MPC8xx processor (SIU_IRQ1 pin). This
> pin will be active till I read registers of pca9555. Because I cannot
> access the i2c bus in the interrupt handler I queue a work on a work queue.
> Just at the end of the interrupt handler should I disable the interrupt on
> the mpc8xx? I think that otherwise the interrupt will pop up again till I
> execute the work in the work queue finally reading the pca9555 and shutting
> off the source of the interrupt.
Well, why don't you simply program the interrupt to be edge-triggered in the
SIEL register? This way it will only occur again after the pin level is
cleared.
HTH,
Ricardo.
prev parent reply other threads:[~2007-06-06 4:33 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2007-06-04 20:37 Linux interrupt managing on 8xx DI BACCO ANTONIO - technolabs
2007-06-06 4:02 ` Ricardo Scop [this message]
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