* Linux interrupt managing on 8xx
@ 2007-06-04 20:37 DI BACCO ANTONIO - technolabs
2007-06-06 4:02 ` Ricardo Scop
0 siblings, 1 reply; 2+ messages in thread
From: DI BACCO ANTONIO - technolabs @ 2007-06-04 20:37 UTC (permalink / raw)
To: linuxppc-embedded
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I have a component named pca9555 (on the i2c bus) that is an I/O expander. It can generate an interrupt to the MPC8xx processor (SIU_IRQ1 pin). This pin will be active till I read registers of pca9555. Because I cannot access the i2c bus in the interrupt handler I queue a work on a work queue. Just at the end of the interrupt handler should I disable the interrupt on the mpc8xx? I think that otherwise the interrupt will pop up again till I execute the work in the work queue finally reading the pca9555 and shutting off the source of the interrupt.
Bye,
Antonio.
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* Re: Linux interrupt managing on 8xx
2007-06-04 20:37 Linux interrupt managing on 8xx DI BACCO ANTONIO - technolabs
@ 2007-06-06 4:02 ` Ricardo Scop
0 siblings, 0 replies; 2+ messages in thread
From: Ricardo Scop @ 2007-06-06 4:02 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: DI BACCO ANTONIO - technolabs
On Monday 04 June 2007 17:37, DI BACCO ANTONIO - technolabs wrote:
> I have a component named pca9555 (on the i2c bus) that is an I/O expander.
> It can generate an interrupt to the MPC8xx processor (SIU_IRQ1 pin). This
> pin will be active till I read registers of pca9555. Because I cannot
> access the i2c bus in the interrupt handler I queue a work on a work queue.
> Just at the end of the interrupt handler should I disable the interrupt on
> the mpc8xx? I think that otherwise the interrupt will pop up again till I
> execute the work in the work queue finally reading the pca9555 and shutting
> off the source of the interrupt.
Well, why don't you simply program the interrupt to be edge-triggered in the
SIEL register? This way it will only occur again after the pin level is
cleared.
HTH,
Ricardo.
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