PowerPC Local Bus

PowerPC Local Bus

[Fredrik Roubert]

Hi!

I'm about to write drivers for some FPGA's that are connected to the
local bus of a PowerQUICC II Pro processor and use the user-programmable
machines (UPM's) to transfer data over the bus. What code does already
exist for Linux to help me with this? In the stock kernels, I can't even
find a structure definition for the registers of the local bus
controller, but it seems strange that no-one has written such code
before me. Will I really have to write everything from scratch, or what
code is there that I don't know about yet?

Cheers // Fredrik Roubert

-- 
Visserij 192  |  +32 473 344527 / +46 708 776974
BE-9000 Gent  |  http://www.df.lth.se/~roubert/

Re: PowerPC Local Bus

[Kumar Gala]

On Aug 8, 2006, at 8:50 AM, Fredrik Roubert wrote:

> Hi!
>
> I'm about to write drivers for some FPGA's that are connected to the
> local bus of a PowerQUICC II Pro processor and use the user- 
> programmable
> machines (UPM's) to transfer data over the bus. What code does already
> exist for Linux to help me with this? In the stock kernels, I can't  
> even
> find a structure definition for the registers of the local bus
> controller, but it seems strange that no-one has written such code
> before me. Will I really have to write everything from scratch, or  
> what
> code is there that I don't know about yet?


The reason you haven't seen any code is due to several reasons.  One,  
FPGA/localbus implementations can be very specific and thus reuse is  
difficult.  Two, some of this code tends to end up it boot loaders to  
setup the UPM (take a look at U-boot for possible UPM config code).

- kumar

Re: PowerPC Local Bus

[Fredrik Roubert]

On Tue 08 Aug 17:03 CEST 2006, Kumar Gala wrote:

> The reason you haven't seen any code is due to several reasons.  One,
> FPGA/localbus implementations can be very specific and thus reuse is
> difficult.  Two, some of this code tends to end up it boot loaders to
> setup the UPM (take a look at U-boot for possible UPM config code).

OK, so you do all the setup in the boot loader and then the driver just
needs to ioremap() the FPGA? That sounds reasonable and explains why I
haven't found any kernel source code relating to this ...

I just didn't expect the kernel to rely on the boot loader to configure
this. Is that the recommended way to to it?

Cheers // Fredrik Roubert

-- 
Visserij 192  |  +32 473 344527 / +46 708 776974
BE-9000 Gent  |  http://www.df.lth.se/~roubert/

Re: PowerPC Local Bus

[Kumar Gala]

On Aug 9, 2006, at 7:29 AM, Fredrik Roubert wrote:

> On Tue 08 Aug 17:03 CEST 2006, Kumar Gala wrote:
>
>> The reason you haven't seen any code is due to several reasons.  One,
>> FPGA/localbus implementations can be very specific and thus reuse is
>> difficult.  Two, some of this code tends to end up it boot loaders to
>> setup the UPM (take a look at U-boot for possible UPM config code).
>
> OK, so you do all the setup in the boot loader and then the driver  
> just
> needs to ioremap() the FPGA? That sounds reasonable and explains why I
> haven't found any kernel source code relating to this ...
>
> I just didn't expect the kernel to rely on the boot loader to  
> configure
> this. Is that the recommended way to to it?

I don't think there is any recommendation one way or the other.  Its  
just that the boards that are currently supported in the kernel doing  
have FGPAs needing UPM config and thus there isn't any code one way  
or the other.

- kumar

Re: PowerPC Local Bus

[David Hawkins]

Fredrik Roubert wrote:
> Hi!
> 
> I'm about to write drivers for some FPGA's that are connected to the
> local bus of a PowerQUICC II Pro processor and use the user-programmable
> machines (UPM's) to transfer data over the bus. What code does already
> exist for Linux to help me with this? In the stock kernels, I can't even
> find a structure definition for the registers of the local bus
> controller, but it seems strange that no-one has written such code
> before me. Will I really have to write everything from scratch, or what
> code is there that I don't know about yet?
> 
> Cheers // Fredrik Roubert
> 

Hi Fredrik,

I'm going to working on something similar soon. If you want
to discuss it off-list, feel free to. We can report the
results back to the list once we have something working.

This is something that can either go in U-Boot or Linux. The
UPM looks fairly easy to setup. Freescale has a UPM programming
tool that allows you to setup waveforms for the single-read/write
and burst-read/write sequences. I was going to connect up
an FPGA to the MPC8349E-MDS local bus (using the unloaded
SDRAM pads) and then capture logic analyzer traces of the
transactions.

I plan to setup a burst mode interface to an FPGA. Actually,
I'll probably decode one chip select to non-burst registers,
and another to burstable memory.

Like I said, we can chat off-list if you like since this discussion
will not be of general interest (but if anyone thinks this should
stay on-list, let me know, and we'll discuss it here).

What FPGA family are you using? I'll be attaching an Altera
Stratix II FPGA onto the local-bus.

Dave Hawkins
Caltech.