LinuxPPC-Dev Archive on lore.kernel.org
 help / color / mirror / Atom feed
* [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support
@ 2017-02-01 23:16 Chris Packham
  2017-02-01 23:27 ` Borislav Petkov
  0 siblings, 1 reply; 8+ messages in thread
From: Chris Packham @ 2017-02-01 23:16 UTC (permalink / raw)
  To: linux-edac, morbidrsa
  Cc: Chris Packham, Rob Herring, Mark Rutland, Benjamin Herrenschmidt,
	Paul Mackerras, Michael Ellerman, Borislav Petkov,
	Mauro Carvalho Chehab, devicetree, linuxppc-dev, linux-kernel

The l2-cache controller on the T2080 SoC has similar capabilities to the
others already supported by the mpc85xx_edac driver. Add it to the list
of compatible devices.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Johannes Thumshirn <jth@kernel.org>
---
This is a resend of a patch that got an ack[1] but didn't seem to get
picked up.

[1] http://marc.info/?l=linux-edac&m=148042072225488&w=2

Changes since v1:
- Collect ack from Johannes.

 arch/powerpc/boot/dts/fsl/t2081si-post.dtsi | 1 +
 drivers/edac/mpc85xx_edac.c                 | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
index c744569a20e1..a97296c64eb2 100644
--- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
@@ -678,5 +678,6 @@
 		compatible = "fsl,t2080-l2-cache-controller";
 		reg = <0xc20000 0x40000>;
 		next-level-cache = <&cpc>;
+		interrupts = <16 2 1 9>;
 	};
 };
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 8f66cbed70b7..67f7bc3fe5b3 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -629,6 +629,7 @@ static const struct of_device_id mpc85xx_l2_err_of_match[] = {
 	{ .compatible = "fsl,p1020-l2-cache-controller", },
 	{ .compatible = "fsl,p1021-l2-cache-controller", },
 	{ .compatible = "fsl,p2020-l2-cache-controller", },
+	{ .compatible = "fsl,t2080-l2-cache-controller", },
 	{},
 };
 MODULE_DEVICE_TABLE(of, mpc85xx_l2_err_of_match);
-- 
2.11.0.24.ge6920cf

^ permalink raw reply related	[flat|nested] 8+ messages in thread

* Re: [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support
  2017-02-01 23:16 [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support Chris Packham
@ 2017-02-01 23:27 ` Borislav Petkov
  2017-02-01 23:46   ` Chris Packham
  0 siblings, 1 reply; 8+ messages in thread
From: Borislav Petkov @ 2017-02-01 23:27 UTC (permalink / raw)
  To: Chris Packham
  Cc: linux-edac, morbidrsa, Rob Herring, Mark Rutland,
	Benjamin Herrenschmidt, Paul Mackerras, Michael Ellerman,
	Mauro Carvalho Chehab, devicetree, linuxppc-dev, linux-kernel

On Thu, Feb 02, 2017 at 12:16:24PM +1300, Chris Packham wrote:
> The l2-cache controller on the T2080 SoC has similar capabilities to the
> others already supported by the mpc85xx_edac driver. Add it to the list
> of compatible devices.
> 
> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
> Acked-by: Johannes Thumshirn <jth@kernel.org>
> ---
> This is a resend of a patch that got an ack[1] but didn't seem to get
> picked up.
> 
> [1] http://marc.info/?l=linux-edac&m=148042072225488&w=2
> 
> Changes since v1:
> - Collect ack from Johannes.

Whoops, my bad. Sorry about that.

>  arch/powerpc/boot/dts/fsl/t2081si-post.dtsi | 1 +
>  drivers/edac/mpc85xx_edac.c                 | 1 +
>  2 files changed, 2 insertions(+)
> 
> diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
> index c744569a20e1..a97296c64eb2 100644
> --- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi
> @@ -678,5 +678,6 @@
>  		compatible = "fsl,t2080-l2-cache-controller";
>  		reg = <0xc20000 0x40000>;
>  		next-level-cache = <&cpc>;
> +		interrupts = <16 2 1 9>;
>  	};
>  };
> diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
> index 8f66cbed70b7..67f7bc3fe5b3 100644
> --- a/drivers/edac/mpc85xx_edac.c
> +++ b/drivers/edac/mpc85xx_edac.c
> @@ -629,6 +629,7 @@ static const struct of_device_id mpc85xx_l2_err_of_match[] = {
>  	{ .compatible = "fsl,p1020-l2-cache-controller", },
>  	{ .compatible = "fsl,p1021-l2-cache-controller", },
>  	{ .compatible = "fsl,p2020-l2-cache-controller", },
> +	{ .compatible = "fsl,t2080-l2-cache-controller", },

WARNING: DT compatible string "fsl,t2080-l2-cache-controller" appears un-documented -- check ./Documentation/devicetree/bindings/
#58: FILE: drivers/edac/mpc85xx_edac.c:632:
+       { .compatible = "fsl,t2080-l2-cache-controller", },

What is checkpatch.pl trying to tell me here?

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support
  2017-02-01 23:27 ` Borislav Petkov
@ 2017-02-01 23:46   ` Chris Packham
  2017-02-02 17:30     ` Borislav Petkov
  0 siblings, 1 reply; 8+ messages in thread
From: Chris Packham @ 2017-02-01 23:46 UTC (permalink / raw)
  To: Borislav Petkov
  Cc: linux-edac@vger.kernel.org, morbidrsa@gmail.com, Rob Herring,
	Mark Rutland, Benjamin Herrenschmidt, Paul Mackerras,
	Michael Ellerman, Mauro Carvalho Chehab,
	devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	linux-kernel@vger.kernel.org

On 02/02/17 12:28, Borislav Petkov wrote:=0A=
> On Thu, Feb 02, 2017 at 12:16:24PM +1300, Chris Packham wrote:=0A=
>> The l2-cache controller on the T2080 SoC has similar capabilities to the=
=0A=
>> others already supported by the mpc85xx_edac driver. Add it to the list=
=0A=
>> of compatible devices.=0A=
>>=0A=
>> Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>=0A=
>> Acked-by: Johannes Thumshirn <jth@kernel.org>=0A=
>> ---=0A=
>> This is a resend of a patch that got an ack[1] but didn't seem to get=0A=
>> picked up.=0A=
>>=0A=
>> [1] http://marc.info/?l=3Dlinux-edac&m=3D148042072225488&w=3D2=0A=
>>=0A=
>> Changes since v1:=0A=
>> - Collect ack from Johannes.=0A=
>=0A=
> Whoops, my bad. Sorry about that.=0A=
>=0A=
>>  arch/powerpc/boot/dts/fsl/t2081si-post.dtsi | 1 +=0A=
>>  drivers/edac/mpc85xx_edac.c                 | 1 +=0A=
>>  2 files changed, 2 insertions(+)=0A=
>>=0A=
>> diff --git a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi b/arch/powerpc/=
boot/dts/fsl/t2081si-post.dtsi=0A=
>> index c744569a20e1..a97296c64eb2 100644=0A=
>> --- a/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi=0A=
>> +++ b/arch/powerpc/boot/dts/fsl/t2081si-post.dtsi=0A=
>> @@ -678,5 +678,6 @@=0A=
>>  		compatible =3D "fsl,t2080-l2-cache-controller";=0A=
>>  		reg =3D <0xc20000 0x40000>;=0A=
>>  		next-level-cache =3D <&cpc>;=0A=
>> +		interrupts =3D <16 2 1 9>;=0A=
>>  	};=0A=
>>  };=0A=
>> diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c=
=0A=
>> index 8f66cbed70b7..67f7bc3fe5b3 100644=0A=
>> --- a/drivers/edac/mpc85xx_edac.c=0A=
>> +++ b/drivers/edac/mpc85xx_edac.c=0A=
>> @@ -629,6 +629,7 @@ static const struct of_device_id mpc85xx_l2_err_of_m=
atch[] =3D {=0A=
>>  	{ .compatible =3D "fsl,p1020-l2-cache-controller", },=0A=
>>  	{ .compatible =3D "fsl,p1021-l2-cache-controller", },=0A=
>>  	{ .compatible =3D "fsl,p2020-l2-cache-controller", },=0A=
>> +	{ .compatible =3D "fsl,t2080-l2-cache-controller", },=0A=
>=0A=
> WARNING: DT compatible string "fsl,t2080-l2-cache-controller" appears un-=
documented -- check ./Documentation/devicetree/bindings/=0A=
> #58: FILE: drivers/edac/mpc85xx_edac.c:632:=0A=
> +       { .compatible =3D "fsl,t2080-l2-cache-controller", },=0A=
>=0A=
> What is checkpatch.pl trying to tell me here?=0A=
>=0A=
=0A=
checpkatch.pl is confused by =0A=
Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt which says=0A=
=0A=
- compatible    : Should include "fsl,chip-l2-cache-controller" and "cache"=
=0A=
                   where chip is the processor (bsc9132, npc8572 etc.)=0A=
=0A=
So none of the fsl cache controllers pass the checkpatch.pl test.=0A=

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support
  2017-02-01 23:46   ` Chris Packham
@ 2017-02-02 17:30     ` Borislav Petkov
  2017-02-02 23:55       ` Michael Ellerman
  0 siblings, 1 reply; 8+ messages in thread
From: Borislav Petkov @ 2017-02-02 17:30 UTC (permalink / raw)
  To: Chris Packham
  Cc: linux-edac@vger.kernel.org, morbidrsa@gmail.com, Rob Herring,
	Mark Rutland, Benjamin Herrenschmidt, Paul Mackerras,
	Michael Ellerman, Mauro Carvalho Chehab,
	devicetree@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
	linux-kernel@vger.kernel.org

On Wed, Feb 01, 2017 at 11:46:23PM +0000, Chris Packham wrote:
> >> diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
> >> index 8f66cbed70b7..67f7bc3fe5b3 100644
> >> --- a/drivers/edac/mpc85xx_edac.c
> >> +++ b/drivers/edac/mpc85xx_edac.c
> >> @@ -629,6 +629,7 @@ static const struct of_device_id mpc85xx_l2_err_of_match[] = {
> >>  	{ .compatible = "fsl,p1020-l2-cache-controller", },
> >>  	{ .compatible = "fsl,p1021-l2-cache-controller", },
> >>  	{ .compatible = "fsl,p2020-l2-cache-controller", },
> >> +	{ .compatible = "fsl,t2080-l2-cache-controller", },
> >
> > WARNING: DT compatible string "fsl,t2080-l2-cache-controller" appears un-documented -- check ./Documentation/devicetree/bindings/
> > #58: FILE: drivers/edac/mpc85xx_edac.c:632:
> > +       { .compatible = "fsl,t2080-l2-cache-controller", },
> >
> > What is checkpatch.pl trying to tell me here?
> >
> 
> checpkatch.pl is confused by 
> Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt which says
> 
> - compatible    : Should include "fsl,chip-l2-cache-controller" and "cache"
>                    where chip is the processor (bsc9132, npc8572 etc.)
> 
> So none of the fsl cache controllers pass the checkpatch.pl test.

Hmm, so others do list those names explicitly. For example:

Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt

And the patch that added that check to cp:

bff5da433525 ("checkpatch: add DT compatible string documentation checks")

is basically to enforce explicit compatible names.

So I'd like to have an ACK from a PPC maintainer here first before I
apply this.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support
  2017-02-02 17:30     ` Borislav Petkov
@ 2017-02-02 23:55       ` Michael Ellerman
  2017-02-03  0:18         ` Chris Packham
  2017-02-03  9:46         ` Borislav Petkov
  0 siblings, 2 replies; 8+ messages in thread
From: Michael Ellerman @ 2017-02-02 23:55 UTC (permalink / raw)
  To: Borislav Petkov, Chris Packham
  Cc: linux-edac@vger.kernel.org, morbidrsa@gmail.com, Rob Herring,
	Mark Rutland, Benjamin Herrenschmidt, Paul Mackerras,
	Mauro Carvalho Chehab, devicetree@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org

Borislav Petkov <bp@alien8.de> writes:

> On Wed, Feb 01, 2017 at 11:46:23PM +0000, Chris Packham wrote:
>> >> diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
>> >> index 8f66cbed70b7..67f7bc3fe5b3 100644
>> >> --- a/drivers/edac/mpc85xx_edac.c
>> >> +++ b/drivers/edac/mpc85xx_edac.c
>> >> @@ -629,6 +629,7 @@ static const struct of_device_id mpc85xx_l2_err_of_match[] = {
>> >>  	{ .compatible = "fsl,p1020-l2-cache-controller", },
>> >>  	{ .compatible = "fsl,p1021-l2-cache-controller", },
>> >>  	{ .compatible = "fsl,p2020-l2-cache-controller", },
>> >> +	{ .compatible = "fsl,t2080-l2-cache-controller", },
>> >
>> > WARNING: DT compatible string "fsl,t2080-l2-cache-controller" appears un-documented -- check ./Documentation/devicetree/bindings/
>> > #58: FILE: drivers/edac/mpc85xx_edac.c:632:
>> > +       { .compatible = "fsl,t2080-l2-cache-controller", },
>> >
>> > What is checkpatch.pl trying to tell me here?
>> >
>> 
>> checpkatch.pl is confused by 
>> Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt which says
>> 
>> - compatible    : Should include "fsl,chip-l2-cache-controller" and "cache"
>>                    where chip is the processor (bsc9132, npc8572 etc.)
>> 
>> So none of the fsl cache controllers pass the checkpatch.pl test.
>
> Hmm, so others do list those names explicitly. For example:
>
> Documentation/devicetree/bindings/pinctrl/allwinner,sunxi-pinctrl.txt
>
> And the patch that added that check to cp:
>
> bff5da433525 ("checkpatch: add DT compatible string documentation checks")
>
> is basically to enforce explicit compatible names.
>
> So I'd like to have an ACK from a PPC maintainer here first before I
> apply this.

It's fine with me:

Acked-by: Michael Ellerman <mpe@ellerman.id.au>


Chris if you want to send a patch to add the compatible string to the
l2cache.txt I would merge that, but honestly it doesn't achieve much
other than possibly catching a typo in the compatible name.

cheers

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support
  2017-02-02 23:55       ` Michael Ellerman
@ 2017-02-03  0:18         ` Chris Packham
  2017-02-03  5:12           ` Michael Ellerman
  2017-02-03  9:46         ` Borislav Petkov
  1 sibling, 1 reply; 8+ messages in thread
From: Chris Packham @ 2017-02-03  0:18 UTC (permalink / raw)
  To: Michael Ellerman, Borislav Petkov
  Cc: linux-edac@vger.kernel.org, morbidrsa@gmail.com, Rob Herring,
	Mark Rutland, Benjamin Herrenschmidt, Paul Mackerras,
	Mauro Carvalho Chehab, devicetree@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org

On 03/02/17 12:55, Michael Ellerman wrote:=0A=
> Chris if you want to send a patch to add the compatible string to the=0A=
> l2cache.txt I would merge that, but honestly it doesn't achieve much=0A=
> other than possibly catching a typo in the compatible name.=0A=
=0A=
I think catching a typo might be worthwhile. It's 5 minutes work for me =0A=
to grep/sed through the code to find existing compatible strings and =0A=
update the document. Which might save someone else a lot of time =0A=
debugging only to find out they've transposed some digits in the dts.=0A=
=0A=
I'll whip something up and send it out shortly.=0A=

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support
  2017-02-03  0:18         ` Chris Packham
@ 2017-02-03  5:12           ` Michael Ellerman
  0 siblings, 0 replies; 8+ messages in thread
From: Michael Ellerman @ 2017-02-03  5:12 UTC (permalink / raw)
  To: Chris Packham, Borislav Petkov
  Cc: linux-edac@vger.kernel.org, morbidrsa@gmail.com, Rob Herring,
	Mark Rutland, Benjamin Herrenschmidt, Paul Mackerras,
	Mauro Carvalho Chehab, devicetree@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org

Chris Packham <Chris.Packham@alliedtelesis.co.nz> writes:

> On 03/02/17 12:55, Michael Ellerman wrote:
>> Chris if you want to send a patch to add the compatible string to the
>> l2cache.txt I would merge that, but honestly it doesn't achieve much
>> other than possibly catching a typo in the compatible name.
>
> I think catching a typo might be worthwhile. It's 5 minutes work for me 
> to grep/sed through the code to find existing compatible strings and 
> update the document. Which might save someone else a lot of time 
> debugging only to find out they've transposed some digits in the dts.
>
> I'll whip something up and send it out shortly.

Thanks.

cheers

^ permalink raw reply	[flat|nested] 8+ messages in thread

* Re: [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support
  2017-02-02 23:55       ` Michael Ellerman
  2017-02-03  0:18         ` Chris Packham
@ 2017-02-03  9:46         ` Borislav Petkov
  1 sibling, 0 replies; 8+ messages in thread
From: Borislav Petkov @ 2017-02-03  9:46 UTC (permalink / raw)
  To: Michael Ellerman, Chris Packham
  Cc: linux-edac@vger.kernel.org, morbidrsa@gmail.com, Rob Herring,
	Mark Rutland, Benjamin Herrenschmidt, Paul Mackerras,
	Mauro Carvalho Chehab, devicetree@vger.kernel.org,
	linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org

On Fri, Feb 03, 2017 at 10:55:33AM +1100, Michael Ellerman wrote:
> > So I'd like to have an ACK from a PPC maintainer here first before I
> > apply this.
> 
> It's fine with me:
> 
> Acked-by: Michael Ellerman <mpe@ellerman.id.au>

Applied,
thanks guys.

-- 
Regards/Gruss,
    Boris.

Good mailing practices for 400: avoid top-posting and trim the reply.

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2017-02-03  9:46 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2017-02-01 23:16 [PATCH v2] EDAC: mpc85xx: Add T2080 l2-cache support Chris Packham
2017-02-01 23:27 ` Borislav Petkov
2017-02-01 23:46   ` Chris Packham
2017-02-02 17:30     ` Borislav Petkov
2017-02-02 23:55       ` Michael Ellerman
2017-02-03  0:18         ` Chris Packham
2017-02-03  5:12           ` Michael Ellerman
2017-02-03  9:46         ` Borislav Petkov

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox