[PATCH] PCI: quirks: Add warm reset quirk for IBM Spyre accelerator

[PATCH] PCI: quirks: Add warm reset quirk for IBM Spyre accelerator

[Avinash Roy]

From: Shivaprasad G Bhat <sbhat@linux.ibm.com>

The IBM Spyre accelerator (PCI ID 1014:06a7) requires a dedicated warm
reset method for reliable EEH recovery on pSeries/ppc64 platforms.

FLR alone is insufficient because it does not re-initialize the Spyre
firmware state machine. On ppc64 with EEH enabled,
pcibios_set_pcie_reset_state() is overridden in
arch/powerpc/kernel/eeh.c to drive the platform-level PERST# signal via
EEH PE operations, which is the correct mechanism for full device
recovery after an EEH event.

The reset function is placed in arch/powerpc/platforms/pseries/pci.c
where the EEH infrastructure is already present, declared in
pseries.h, and registered in the generic pci_dev_reset_methods[] table
in drivers/pci/quirks.c under a CONFIG_PPC_PSERIES guard.

This reset method is only registered when CONFIG_PPC_PSERIES is enabled, 
so it is not available on other platforms.

Reset sequence:
  - Assert PERST# via pcie_warm_reset, hold 250 ms
  - Deassert PERST# via pcie_deassert_reset
  - Wait 250 ms for PCIe link retrain and device recovery

Signed-off-by: Avinash Roy <avinash.roy1@linux.ibm.com>
Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
---
diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
index 84e4ffe957a8..7aa58d57208f 100644
--- a/arch/powerpc/platforms/pseries/pci.c
+++ b/arch/powerpc/platforms/pseries/pci.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/pci.h>
 #include <linux/string.h>
+#include <linux/delay.h>
 
 #include <asm/eeh.h>
 #include <asm/pci-bridge.h>
@@ -236,6 +237,41 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
 DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
 			 fixup_winbond_82c105);
 
+/*
+ * Reset Spyre adapter using pci_set_pcie_reset_state()
+ * This is specifically for PPC platforms where EEH (Enhanced Error Handling)
+ * requires this reset method for proper device recovery.
+ */
+int reset_spyre(struct pci_dev *dev, bool probe)
+{
+	int ret;
+
+	if (probe)
+		return 0;
+
+	/* Assert warm reset */
+	ret = pci_set_pcie_reset_state(dev, pcie_warm_reset);
+	if (ret) {
+		pci_err(dev, "Failed to assert reset: %d\n", ret);
+		return ret;
+	}
+
+	/* Wait for reset to take effect */
+	msleep(250);
+
+	/* Deassert reset */
+	ret = pci_set_pcie_reset_state(dev, pcie_deassert_reset);
+	if (ret) {
+		pci_err(dev, "Failed to deassert reset: %d\n", ret);
+		return ret;
+	}
+
+	/* Wait for device to recover */
+	msleep(250);
+
+	return 0;
+}
+
 static enum pci_bus_speed prop_to_pci_speed(u32 prop)
 {
 	switch (prop) {
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index 3968a6970fa8..79c194aeb3c6 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -92,6 +92,10 @@ extern struct pci_controller_ops pseries_pci_controller_ops;
 int pseries_msi_allocate_domains(struct pci_controller *phb);
 void pseries_msi_free_domains(struct pci_controller *phb);
 
+/* PCI device reset method for Spyre adapter */
+struct pci_dev;
+int reset_spyre(struct pci_dev *dev, bool probe);
+
 extern int CMO_PrPSP;
 extern int CMO_SecPSP;
 extern unsigned long CMO_PageSize;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index b09f27f7846f..1b8ab5d9764b 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -4237,6 +4237,11 @@ static int reset_hinic_vf_dev(struct pci_dev *pdev, bool probe)
 	return 0;
 }
 
+#ifdef CONFIG_PPC_PSERIES
+/* Defined in arch/powerpc/platforms/pseries/pci.c */
+int reset_spyre(struct pci_dev *dev, bool probe);
+#endif
+
 static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
 	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF,
 		 reset_intel_82599_sfp_virtfn },
@@ -4252,6 +4257,10 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
 		reset_chelsio_generic_dev },
 	{ PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HINIC_VF,
 		reset_hinic_vf_dev },
+#ifdef CONFIG_PPC_PSERIES
+	{ PCI_VENDOR_ID_IBM, 0x06a7,
+		reset_spyre},
+#endif
 	{ 0 }
 };

Re: [PATCH] PCI: quirks: Add warm reset quirk for IBM Spyre accelerator

[Bjorn Helgaas]

On Wed, Aug 05, 2026 at 06:21:32PM +0530, Avinash Roy wrote:
> From: Shivaprasad G Bhat <sbhat@linux.ibm.com>
> 
> The IBM Spyre accelerator (PCI ID 1014:06a7) requires a dedicated warm
> reset method for reliable EEH recovery on pSeries/ppc64 platforms.
> 
> FLR alone is insufficient because it does not re-initialize the Spyre
> firmware state machine. On ppc64 with EEH enabled,
> pcibios_set_pcie_reset_state() is overridden in
> arch/powerpc/kernel/eeh.c to drive the platform-level PERST# signal via
> EEH PE operations, which is the correct mechanism for full device
> recovery after an EEH event.

This makes it sound like this mechanism is needed for EEH recovery for
*all* devices, not just Spyre.  If that's the case it sounds like we
need more than just a Spyre-specific quirk.

> The reset function is placed in arch/powerpc/platforms/pseries/pci.c
> where the EEH infrastructure is already present, declared in
> pseries.h, and registered in the generic pci_dev_reset_methods[] table
> in drivers/pci/quirks.c under a CONFIG_PPC_PSERIES guard.
> 
> This reset method is only registered when CONFIG_PPC_PSERIES is enabled, 
> so it is not available on other platforms.
> 
> Reset sequence:
>   - Assert PERST# via pcie_warm_reset, hold 250 ms
>   - Deassert PERST# via pcie_deassert_reset
>   - Wait 250 ms for PCIe link retrain and device recovery
> 
> Signed-off-by: Avinash Roy <avinash.roy1@linux.ibm.com>
> Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
> ---
> diff --git a/arch/powerpc/platforms/pseries/pci.c b/arch/powerpc/platforms/pseries/pci.c
> index 84e4ffe957a8..7aa58d57208f 100644
> --- a/arch/powerpc/platforms/pseries/pci.c
> +++ b/arch/powerpc/platforms/pseries/pci.c
> @@ -11,6 +11,7 @@
>  #include <linux/kernel.h>
>  #include <linux/pci.h>
>  #include <linux/string.h>
> +#include <linux/delay.h>
>  
>  #include <asm/eeh.h>
>  #include <asm/pci-bridge.h>
> @@ -236,6 +237,41 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
>  DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
>  			 fixup_winbond_82c105);
>  
> +/*
> + * Reset Spyre adapter using pci_set_pcie_reset_state()
> + * This is specifically for PPC platforms where EEH (Enhanced Error Handling)
> + * requires this reset method for proper device recovery.
> + */
> +int reset_spyre(struct pci_dev *dev, bool probe)
> +{
> +	int ret;
> +
> +	if (probe)
> +		return 0;
> +
> +	/* Assert warm reset */
> +	ret = pci_set_pcie_reset_state(dev, pcie_warm_reset);
> +	if (ret) {
> +		pci_err(dev, "Failed to assert reset: %d\n", ret);
> +		return ret;
> +	}
> +
> +	/* Wait for reset to take effect */
> +	msleep(250);
> +
> +	/* Deassert reset */
> +	ret = pci_set_pcie_reset_state(dev, pcie_deassert_reset);
> +	if (ret) {
> +		pci_err(dev, "Failed to deassert reset: %d\n", ret);
> +		return ret;
> +	}
> +
> +	/* Wait for device to recover */
> +	msleep(250);
> +
> +	return 0;
> +}
> +
>  static enum pci_bus_speed prop_to_pci_speed(u32 prop)
>  {
>  	switch (prop) {
> diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
> index 3968a6970fa8..79c194aeb3c6 100644
> --- a/arch/powerpc/platforms/pseries/pseries.h
> +++ b/arch/powerpc/platforms/pseries/pseries.h
> @@ -92,6 +92,10 @@ extern struct pci_controller_ops pseries_pci_controller_ops;
>  int pseries_msi_allocate_domains(struct pci_controller *phb);
>  void pseries_msi_free_domains(struct pci_controller *phb);
>  
> +/* PCI device reset method for Spyre adapter */
> +struct pci_dev;
> +int reset_spyre(struct pci_dev *dev, bool probe);
> +
>  extern int CMO_PrPSP;
>  extern int CMO_SecPSP;
>  extern unsigned long CMO_PageSize;
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index b09f27f7846f..1b8ab5d9764b 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -4237,6 +4237,11 @@ static int reset_hinic_vf_dev(struct pci_dev *pdev, bool probe)
>  	return 0;
>  }
>  
> +#ifdef CONFIG_PPC_PSERIES
> +/* Defined in arch/powerpc/platforms/pseries/pci.c */
> +int reset_spyre(struct pci_dev *dev, bool probe);
> +#endif
> +
>  static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
>  	{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82599_SFP_VF,
>  		 reset_intel_82599_sfp_virtfn },
> @@ -4252,6 +4257,10 @@ static const struct pci_dev_reset_methods pci_dev_reset_methods[] = {
>  		reset_chelsio_generic_dev },
>  	{ PCI_VENDOR_ID_HUAWEI, PCI_DEVICE_ID_HINIC_VF,
>  		reset_hinic_vf_dev },
> +#ifdef CONFIG_PPC_PSERIES
> +	{ PCI_VENDOR_ID_IBM, 0x06a7,
> +		reset_spyre},
> +#endif
>  	{ 0 }
>  };

Re: [PATCH] PCI: quirks: Add warm reset quirk for IBM Spyre accelerator

[Shivaprasad G Bhat]

Hi Bjorn,

Thanks for taking a look.

On 8/5/26 10:48 PM, Bjorn Helgaas wrote:
> On Wed, Aug 05, 2026 at 06:21:32PM +0530, Avinash Roy wrote:
>> From: Shivaprasad G Bhat <sbhat@linux.ibm.com>
>>
>> The IBM Spyre accelerator (PCI ID 1014:06a7) requires a dedicated warm
>> reset method for reliable EEH recovery on pSeries/ppc64 platforms.
>>
>> FLR alone is insufficient because it does not re-initialize the Spyre
>> firmware state machine. On ppc64 with EEH enabled,
>> pcibios_set_pcie_reset_state() is overridden in
>> arch/powerpc/kernel/eeh.c to drive the platform-level PERST# signal via
>> EEH PE operations, which is the correct mechanism for full device
>> recovery after an EEH event.
> 
> This makes it sound like this mechanism is needed for EEH recovery for
> *all* devices, not just Spyre.  If that's the case it sounds like we
> need more than just a Spyre-specific quirk.

Now I re-read it, The second statement needs to be re-worded. It does 
sound like its true for all devices. Quirk is only for the Spyre card.

Will post a v2 fixing the same.

Thanks and Regards,
Shivaprasad

> 
>> The reset function is placed in arch/powerpc/platforms/pseries/pci.c
>> where the EEH infrastructure is already present, declared in
>> pseries.h, and registered in the generic pci_dev_reset_methods[] table
>> in drivers/pci/quirks.c under a CONFIG_PPC_PSERIES guard.
>>
>> This reset method is only registered when CONFIG_PPC_PSERIES is enabled,
>> so it is not available on other platforms.
>>
>> Reset sequence:
>>    - Assert PERST# via pcie_warm_reset, hold 250 ms
>>    - Deassert PERST# via pcie_deassert_reset
>>    - Wait 250 ms for PCIe link retrain and device recovery
>>
>> Signed-off-by: Avinash Roy <avinash.roy1@linux.ibm.com>
>> Signed-off-by: Shivaprasad G Bhat <sbhat@linux.ibm.com>
>> ---
</snip>

Re: [PATCH] PCI: quirks: Add warm reset quirk for IBM Spyre accelerator

[Bjorn Helgaas]

On Thu, Aug 06, 2026 at 10:20:02PM +0530, Shivaprasad G Bhat wrote:
> On 8/5/26 10:48 PM, Bjorn Helgaas wrote:
> > On Wed, Aug 05, 2026 at 06:21:32PM +0530, Avinash Roy wrote:
> > > From: Shivaprasad G Bhat <sbhat@linux.ibm.com>
> > > 
> > > The IBM Spyre accelerator (PCI ID 1014:06a7) requires a dedicated warm
> > > reset method for reliable EEH recovery on pSeries/ppc64 platforms.
> > > 
> > > FLR alone is insufficient because it does not re-initialize the Spyre
> > > firmware state machine. On ppc64 with EEH enabled,
> > > pcibios_set_pcie_reset_state() is overridden in
> > > arch/powerpc/kernel/eeh.c to drive the platform-level PERST# signal via
> > > EEH PE operations, which is the correct mechanism for full device
> > > recovery after an EEH event.
> > 
> > This makes it sound like this mechanism is needed for EEH recovery for
> > *all* devices, not just Spyre.  If that's the case it sounds like we
> > need more than just a Spyre-specific quirk.
> 
> Now I re-read it, The second statement needs to be re-worded. It does sound
> like its true for all devices. Quirk is only for the Spyre card.

So I guess this is related to some Spyre erratum?  Per spec, FLR is
supposed to "set all Function-specific state machines to their
initialization values" (PCIe r7.0, sec 6.6.2).

Re: [PATCH] PCI: quirks: Add warm reset quirk for IBM Spyre accelerator

[Avinash Roy]

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On 8/6/26 10:56 PM, Bjorn Helgaas wrote:
> On Thu, Aug 06, 2026 at 10:20:02PM +0530, Shivaprasad G Bhat wrote:
>> On 8/5/26 10:48 PM, Bjorn Helgaas wrote:
>>> On Wed, Aug 05, 2026 at 06:21:32PM +0530, Avinash Roy wrote:
>>>> From: Shivaprasad G Bhat<sbhat@linux.ibm.com>
>>>>
>>>> The IBM Spyre accelerator (PCI ID 1014:06a7) requires a dedicated warm
>>>> reset method for reliable EEH recovery on pSeries/ppc64 platforms.
>>>>
>>>> FLR alone is insufficient because it does not re-initialize the Spyre
>>>> firmware state machine. On ppc64 with EEH enabled,
>>>> pcibios_set_pcie_reset_state() is overridden in
>>>> arch/powerpc/kernel/eeh.c to drive the platform-level PERST# signal via
>>>> EEH PE operations, which is the correct mechanism for full device
>>>> recovery after an EEH event.
>>> This makes it sound like this mechanism is needed for EEH recovery for
>>> *all* devices, not just Spyre.  If that's the case it sounds like we
>>> need more than just a Spyre-specific quirk.
>> Now I re-read it, The second statement needs to be re-worded. It does sound
>> like its true for all devices. Quirk is only for the Spyre card.
> So I guess this is related to some Spyre erratum?  Per spec, FLR is
> supposed to "set all Function-specific state machines to their
> initialization values" (PCIe r7.0, sec 6.6.2).

Yes, This is for Spyre card specificchanges. The card requires an explicit warm reset to restore it to the 
proper initialization state.

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Re: [PATCH] PCI: quirks: Add warm reset quirk for IBM Spyre accelerator

[Avinash Roy]

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On 8/19/26 9:04 PM, Avinash Roy wrote:
>
>
> On 8/6/26 10:56 PM, Bjorn Helgaas wrote:
>> On Thu, Aug 06, 2026 at 10:20:02PM +0530, Shivaprasad G Bhat wrote:
>>> On 8/5/26 10:48 PM, Bjorn Helgaas wrote:
>>>> On Wed, Aug 05, 2026 at 06:21:32PM +0530, Avinash Roy wrote:
>>>>> From: Shivaprasad G Bhat<sbhat@linux.ibm.com>
>>>>>
>>>>> The IBM Spyre accelerator (PCI ID 1014:06a7) requires a dedicated warm
>>>>> reset method for reliable EEH recovery on pSeries/ppc64 platforms.
>>>>>
>>>>> FLR alone is insufficient because it does not re-initialize the Spyre
>>>>> firmware state machine. On ppc64 with EEH enabled,
>>>>> pcibios_set_pcie_reset_state() is overridden in
>>>>> arch/powerpc/kernel/eeh.c to drive the platform-level PERST# signal via
>>>>> EEH PE operations, which is the correct mechanism for full device
>>>>> recovery after an EEH event.
>>>> This makes it sound like this mechanism is needed for EEH recovery for
>>>> *all* devices, not just Spyre.  If that's the case it sounds like we
>>>> need more than just a Spyre-specific quirk.
>>> Now I re-read it, The second statement needs to be re-worded. It does sound
>>> like its true for all devices. Quirk is only for the Spyre card.
>> So I guess this is related to some Spyre erratum?  Per spec, FLR is
>> supposed to "set all Function-specific state machines to their
>> initialization values" (PCIe r7.0, sec 6.6.2).
> Yes, This is for Spyre card specificchanges. The card requires an explicit warm reset to restore it to the 
> proper initialization state.

Sorry about the typo. This is for the current version of the Spyre card, which requires an explicit warm reset to restore it to the proper initialized state.

Thanks & Regards,
Avinash

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