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* PPC 44x Watchdog timer
From: Glenn Burkhardt @ 2005-04-19  1:37 UTC (permalink / raw)
  To: linuxppc-embedded

Is there a patch for the built in watchdog timer in the 440GP available
anywhere for the 2.4 kernel (viz., ELDK kernels)?

I found a driver for the 2.6 kernel in the mailing list submitted
by Takeharu KATO last February, and, if nothing else is available, plan
to back fit it to the 2.4 kernel.

Thanks!

^ permalink raw reply

* Re: Impact of change n port size
From: Ricardo Scop @ 2005-04-19  3:14 UTC (permalink / raw)
  To: Atit_Shah, linuxppc-embedded
In-Reply-To: <D8595042F3765A4285B848A78A2C2ED1027748@bsdmsg002.corp.satyam.ad>

Hi Atit,

On Monday 18 April 2005 01:31, Atit_Shah wrote:
> Hi All,
>
> =09I have a kernel image which works perfectly for my reference
> board. When I try to port the same image on my board I seem to be facin=
g
> problems.=20
Like what?

> The only difference I see between the reference board and my
> board is the port size and capacity of RAM.
And hw design, board layout, ...

> =09I have taken care of sending the right value for the RAM size
> through BD_INFO. Would there be and where all would the change be, if
> any, in the kernel code OR when I make the kernel image ie through "mak=
e
> menuconfig" / "menu xconfig" required to be made for port size of RAM?
Well, if you're using PPCBoot or U-Boot to boot Linux, what you've done w=
ould=20
be enough.

OTOH, as you have a new hardware design you should check the SDRAM contro=
ller=20
initialization in the bootloader code. It may be sligthly wrong, so the=20
bootloader runs but the OS doesn't, because Linux really stresses out RAM=
=20
operation in burst mode. (BTW, this is a FAQ, if appliable).

> =09Out of curiosity what would be the change required for different
> FLASH port size again on the kernel side.
Look for the MTD parameters in the kernel compilation options.

HTH,

--=20
Ricardo Scop.

        \|/
    ___ -*-
   (@ @)/|\
  /  V  \|  R SCOP Consult.
 /(     )\  Linux-based communications
--^^---^^+------------------------------
rscop@matrix.com.br
+55 51 999-36-777
Porto Alegre, RS - BRazil

^ permalink raw reply

* HW + SW development tools for embedded linux (was Re: using initramfs with ppc)
From: Ricardo Scop @ 2005-04-19  3:35 UTC (permalink / raw)
  To: Manoj Padhi, linuxppc-embedded
In-Reply-To: <5f99347005041817365ccba934@mail.gmail.com>

Hi Manoj,

On Monday 18 April 2005 21:36, Manoj Padhi wrote:
> Pawel,
> I am new to embedded linux development and planning to develop a small
> project using embedded linux.
You failed to mention your project's budget :).

>
> I looked for an evaluation kit in the market and it comes around $1100
> + development tool licence (starts at $6K). Hence I need some advice
                                        ^^^ ELDK is free and probably bet=
ter
=09=09=09=09=09    (GNU tools rock!)

> regarding getting an custom board and use free tools. Can you suggest
> such a board.
We bought an RPXlite once and it worked well (sorry, but I don't remember=
 the=20
price, please google the net).

Cheers,

--=20
Ricardo Scop.

        \|/
    ___ -*-
   (@ @)/|\
  /  V  \|  R SCOP Consult.
 /(     )\  Linux-based communications
--^^---^^+------------------------------
rscop@matrix.com.br
+55 51 999-36-777
Porto Alegre, RS - BRazil

^ permalink raw reply

* Re: writev test failure related to arch/ppc/lib/string.S changes?
From: Paul Mackerras @ 2005-04-19  9:47 UTC (permalink / raw)
  To: pestes; +Cc: linuxppc-dev
In-Reply-To: <1113853327.3750.21.camel@unary.wma.ibm.com>

Phil Estes writes:

> Recently I applied some 2.6.7 ppc32 patches to a 2.6.5 kernel, which
> included the 1.1612.2.78 changeset titled "[PATCH] PPC32: Fix copy
> prefetch on non coherent PPCs".  The functionality I meant to get from
> that backport is working fine, but a test team which is testing my
> changes note that a standard LTP testcase in the writev family now
> fails, which they tracked to the changes made in arch/ppc/lib/string.S
> from the above changeset.

Yeah.  This patch should fix it.  Mind testing it and letting us know
how it goes?

Paul.

diff -urN linux/arch/ppc/lib/string.S ppc/arch/ppc/lib/string.S
--- linux/arch/ppc/lib/string.S	2005-01-29 09:58:49.000000000 +1100
+++ ppc/arch/ppc/lib/string.S	2005-04-19 16:54:34.000000000 +1000
@@ -446,6 +446,7 @@
 #ifdef CONFIG_8xx
 	/* Don't use prefetch on 8xx */
 	mtctr	r0
+	li	r0,0
 53:	COPY_16_BYTES_WITHEX(0)
 	bdnz	53b
 
@@ -564,7 +565,9 @@
 /* or write fault in cacheline loop */
 105:	li	r9,1
 92:	li	r3,LG_CACHELINE_BYTES
-	b	99f
+	mfctr	r8
+	add	r0,r0,r8
+	b	106f
 /* read fault in final word loop */
 108:	li	r9,0
 	b	93f
@@ -585,7 +588,7 @@
  * r5 + (ctr << r3), and r9 is 0 for read or 1 for write.
  */
 99:	mfctr	r0
-	slw	r3,r0,r3
+106:	slw	r3,r0,r3
 	add.	r3,r3,r5
 	beq	120f			/* shouldn't happen */
 	cmpwi	0,r9,0

^ permalink raw reply

* Re: 824x Sandpoint with 2.6.x
From: Sam Song @ 2005-04-19 13:52 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-embedded

"Mark A. Greer" <mgreer@mvista.com> wrote:
> Sorry for the delay, I was on vacation last week.

Not at all. I experienced a lot during your vacation:)

> It could be lots of things. Can you dump __log_buf?
> If so, please dump
> and send it so we can have a look. If not, try
> adding more progress
> stmts and telling us exactly where its stopping.

OK, I am now up to the joint of early_console and
normal console. Switch problem. Perhaps I miss sth
or what?

## Booting image at 01200000 ...
   Image Name:   Linux-2.6.11
   Image Type:   PowerPC Linux Kernel Image (gzip
compressed)
   Data Size:    442401 Bytes = 432 kB
   Load Address: 00000000
   Entry Point:  00000000
   Uncompressing Kernel Image ... OK
## Loading RAMDisk Image at ff950000 ...
   Image Name:   Ramdisk Image
   Image Type:   PowerPC Linux RAMDisk Image (gzip
compressed)
   Data Size:    4479838 Bytes =  4.3 MB
   Load Address: 00000000
   Entry Point:  00000000
   Loading Ramdisk to 03b02000, end 03f47b5e ... OK
   Loading kernel ......
Linux version 2.6.11 (root@localhost.localdomain) (gcc
version 3.2.2 20030217 (Y
[snip]
Kernel command line:
console=uart,mmio,0xfdfce500,115200n8
console=ttyS0,115200
root=/dev/ram rw ramdisk_size=200000
ip=192.168.0.3:192.168..2:::sandpoint:et
h0:off panic=1
OpenPIC Version 1.2 (1 CPUs and 6 IRQ sources) at
fdfcf000
OpenPIC timer frequency is 100.000000 MHz
PID hash table entries: 512 (order: 9, 8192 bytes)
time_init: decrementer frequency = 25.000000 MHz
first init port.membase = 0x-34585344
Early serial console at MMIO 0xfdfce500 (options
'115200n8')
Dentry cache hash table entries: 16384 (order: 4,
65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768
bytes)
Memory: 63872k available (684k kernel code, 228k data,
92k init, 0k highmem)
Mount-cache hash table entries: 512 (order: 0, 4096
bytes)
Linux NoNET1.0 for Linux 2.6
PCI: Probing PCI hardware
PCI: Cannot allocate resource region 1 of device
0000:00:00.0
Serial: 8250/16550 driver $Revision: 1.90 $ 1 ports,
IRQ sharing enabled
io scheduler noop registered
RAMDISK driver initialized: 16 RAM disks of 200000K
size 1024 blocksize
No ttyS device at MMIO 0xfdfce500 for console

No matter how I changed the uart parameter, still no
luck to get any further info. I looked into 
old_serial_port value and found that all invaild. So
how to deal with it next?

Thanks,

Sam


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^ permalink raw reply

* DMA using PPC440GX DMAC?
From: Sanjay Bajaj @ 2005-04-19 13:54 UTC (permalink / raw)
  To: linuxppc-embedded

To use the DMA Controller on PPC440GX, should I use ppc4xx_set_dma_xxx =
instead of set_dma_xxx? If yes, where are in the kernel are they mapped =
to each other? Any help or pointers.

Thanks in advance.
Sanjay

^ permalink raw reply

* Re: [PATCH] ppc32: refactor FPU exception handling
From: Kumar Gala @ 2005-04-19 14:49 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev list, Jason McMullan
In-Reply-To: <Pine.LNX.4.61.0504120957180.12787@blarg.somerset.sps.mot.com>

Paul,

What is the state of this patch?

- kumar

On Apr 12, 2005, at 9:59 AM, Kumar Gala wrote:

> Here is an updated version of the patch which moves the fast exception
> return code into entry.S.=A0 Not sure if I see any reason we can't =
have=20
> akpm
> merge this into -mm so people test it there.
>
>
>
> Moved common FPU exception handling code out of head.S so it can be=20
> used
> by several of the sub-architectures that might of a full PowerPC FPU.=A0=

>
>  Also, uses new CONFIG_PPC_FPU define to fix alignment exception
> handling for floating point load/store instructions to only occur if =
we
> have a hardware FPU.
>
> Signed-off-by: Jason McMullan <jason.mcmullan@timesys.com>
> Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
>
> ---
>
> diff -Nru a/arch/ppc/Kconfig b/arch/ppc/Kconfig
> --- a/arch/ppc/Kconfig=A0 2005-04-12 09:54:36 -05:00
>  +++ b/arch/ppc/Kconfig=A0 2005-04-12 09:54:36 -05:00
>  @@ -53,6 +53,7 @@
>  =A0
>  =A0config 6xx
>  =A0=A0=A0=A0=A0=A0=A0 bool "6xx/7xx/74xx/52xx/82xx/83xx"
> +=A0=A0=A0=A0=A0=A0 select PPC_FPU
>  =A0=A0=A0=A0=A0=A0=A0 help
>  =A0=A0=A0=A0=A0=A0=A0 =A0 There are four types of PowerPC chips =
supported.=A0 The more=20
> common
>  =A0=A0=A0=A0=A0=A0=A0 =A0 types (601, 603, 604, 740, 750, 7400), the =
Motorola embedded
>  @@ -85,6 +86,9 @@
>  =A0=A0=A0=A0=A0=A0=A0 bool "e500"
>  =A0
>  =A0endchoice
>  +
>  +config PPC_FPU
>  +=A0=A0=A0=A0=A0=A0 bool
>  =A0
>  =A0config BOOKE
>  =A0=A0=A0=A0=A0=A0=A0 bool
>  diff -Nru a/arch/ppc/Makefile b/arch/ppc/Makefile
> --- a/arch/ppc/Makefile 2005-04-12 09:54:36 -05:00
>  +++ b/arch/ppc/Makefile 2005-04-12 09:54:36 -05:00
>  @@ -53,6 +53,7 @@
>  =A0
>  =A0head-$(CONFIG_6xx)=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 +=3D =
arch/ppc/kernel/idle_6xx.o
> =A0head-$(CONFIG_POWER4)=A0 =A0=A0=A0=A0=A0=A0=A0 +=3D =
arch/ppc/kernel/idle_power4.o
> +head-$(CONFIG_PPC_FPU) =A0=A0=A0=A0=A0=A0=A0 +=3D =
arch/ppc/kernel/fpu.o
> =A0
>  =A0core-y =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=
=A0 +=3D arch/ppc/kernel/=20
> arch/ppc/platforms/ \
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 =A0=A0 arch/ppc/mm/ arch/ppc/lib/=20
> arch/ppc/syslib/
> diff -Nru a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
> --- a/arch/ppc/kernel/Makefile=A0 2005-04-12 09:54:36 -05:00
>  +++ b/arch/ppc/kernel/Makefile=A0 2005-04-12 09:54:36 -05:00
>  @@ -9,6 +9,7 @@
>  =A0extra-$(CONFIG_8xx)=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 :=3D head_8xx.o
>  =A0extra-$(CONFIG_6xx)=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 +=3D idle_6xx.o
>  =A0extra-$(CONFIG_POWER4) =A0=A0=A0=A0=A0=A0=A0 +=3D idle_power4.o
>  +extra-$(CONFIG_PPC_FPU)=A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
+=3D fpu.o
>  =A0extra-y=A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=
=A0 =A0=A0=A0=A0=A0=A0=A0 +=3D vmlinux.lds
>  =A0
>  =A0obj-y=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=
=A0=A0 :=3D entry.o traps.o irq.o idle.o=20
> time.o misc.o \
>  diff -Nru a/arch/ppc/kernel/align.c b/arch/ppc/kernel/align.c
> --- a/arch/ppc/kernel/align.c=A0=A0 2005-04-12 09:54:36 -05:00
>  +++ b/arch/ppc/kernel/align.c=A0=A0 2005-04-12 09:54:36 -05:00
>  @@ -368,16 +368,24 @@
>  =A0
>  =A0=A0=A0=A0=A0=A0=A0 /* Single-precision FP load and store require =
conversions...=20
> */
>  =A0=A0=A0=A0=A0=A0=A0 case LD+F+S:
>  +#ifdef CONFIG_PPC_FPU
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 preempt_disable();
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 enable_kernel_fp();
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 cvt_fd(&data.f, &data.d, =
&current->thread.fpscr);
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 preempt_enable();
> +#else
>  +=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 return 0;
>  +#endif
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 break;
>  =A0=A0=A0=A0=A0=A0=A0 case ST+F+S:
>  +#ifdef CONFIG_PPC_FPU
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 preempt_disable();
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 enable_kernel_fp();
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 cvt_df(&data.d, &data.f, =
&current->thread.fpscr);
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 preempt_enable();
> +#else
>  +=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 return 0;
>  +#endif
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 break;
>  =A0=A0=A0=A0=A0=A0=A0 }
>  =A0
>  diff -Nru a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
> --- a/arch/ppc/kernel/entry.S=A0=A0 2005-04-12 09:54:36 -05:00
>  +++ b/arch/ppc/kernel/entry.S=A0=A0 2005-04-12 09:54:36 -05:00
>  @@ -563,6 +563,65 @@
>  =A0=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r1,r1,INT_FRAME_SIZE
> =A0=A0=A0=A0=A0=A0=A0 blr
>  =A0
>  +=A0=A0=A0=A0=A0=A0 .globl=A0 fast_exception_return
> +fast_exception_return:
> +#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
> +=A0=A0=A0=A0=A0=A0 andi.=A0=A0 r10,r9,MSR_RI=A0=A0 =A0=A0=A0=A0=A0=A0=A0=
 /* check for recoverable=20
> interrupt */
>  +=A0=A0=A0=A0=A0=A0 beq=A0=A0=A0=A0 1f=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=
=A0 =A0=A0=A0=A0=A0=A0=A0 /* if not, we've got problems=20
> */
>  +#endif
>  +
>  +2:=A0=A0=A0=A0 REST_4GPRS(3, r11)
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r10,_CCR(r11)
>  +=A0=A0=A0=A0=A0=A0 REST_GPR(1, r11)
>  +=A0=A0=A0=A0=A0=A0 mtcr=A0=A0=A0 r10
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r10,_LINK(r11)
> +=A0=A0=A0=A0=A0=A0 mtlr=A0=A0=A0 r10
> +=A0=A0=A0=A0=A0=A0 REST_GPR(10, r11)
>  +=A0=A0=A0=A0=A0=A0 mtspr=A0=A0 SPRN_SRR1,r9
> +=A0=A0=A0=A0=A0=A0 mtspr=A0=A0 SPRN_SRR0,r12
> +=A0=A0=A0=A0=A0=A0 REST_GPR(9, r11)
>  +=A0=A0=A0=A0=A0=A0 REST_GPR(12, r11)
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r11,GPR11(r11)
> +=A0=A0=A0=A0=A0=A0 SYNC
>  +=A0=A0=A0=A0=A0=A0 RFI
>  +
>  +#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
> +/* check if the exception happened in a restartable section */
>  +1:=A0=A0=A0=A0 lis=A0=A0=A0=A0 r3,exc_exit_restart_end@ha
> +=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r3,r3,exc_exit_restart_end@l
> +=A0=A0=A0=A0=A0=A0 cmplw=A0=A0 r12,r3
>  +=A0=A0=A0=A0=A0=A0 bge=A0=A0=A0=A0 3f
> +=A0=A0=A0=A0=A0=A0 lis=A0=A0=A0=A0 r4,exc_exit_restart@ha
> +=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r4,r4,exc_exit_restart@l
> +=A0=A0=A0=A0=A0=A0 cmplw=A0=A0 r12,r4
>  +=A0=A0=A0=A0=A0=A0 blt=A0=A0=A0=A0 3f
>  +=A0=A0=A0=A0=A0=A0 lis=A0=A0=A0=A0 r3,fee_restarts@ha
> +=A0=A0=A0=A0=A0=A0 tophys(r3,r3)
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r5,fee_restarts@l(r3)
> +=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r5,r5,1
>  +=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r5,fee_restarts@l(r3)
> +=A0=A0=A0=A0=A0=A0 mr=A0=A0=A0=A0=A0 r12,r4=A0 =A0=A0=A0=A0=A0=A0=A0 =
/* restart at exc_exit_restart */
>  +=A0=A0=A0=A0=A0=A0 b=A0=A0=A0=A0=A0=A0 2b
>  +
>  +=A0=A0=A0=A0=A0=A0 .comm=A0=A0 fee_restarts,4
>  +
>  +/* aargh, a nonrecoverable interrupt, panic */
>  +/* aargh, we don't know which trap this is */
>  +/* but the 601 doesn't implement the RI bit, so assume it's OK */
>  +3:
>  +BEGIN_FTR_SECTION
> +=A0=A0=A0=A0=A0=A0 b=A0=A0=A0=A0=A0=A0 2b
>  +END_FTR_SECTION_IFSET(CPU_FTR_601)
> +=A0=A0=A0=A0=A0=A0 li=A0=A0=A0=A0=A0 r10,-1
>  +=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r10,TRAP(r11)
>  +=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r3,r1,STACK_FRAME_OVERHEAD
> +=A0=A0=A0=A0=A0=A0 lis=A0=A0=A0=A0 r10,MSR_KERNEL@h
> +=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r10,r10,MSR_KERNEL@l
> +=A0=A0=A0=A0=A0=A0 bl=A0=A0=A0=A0=A0 transfer_to_handler_full
> +=A0=A0=A0=A0=A0=A0 .long=A0=A0 nonrecoverable_exception
> +=A0=A0=A0=A0=A0=A0 .long=A0=A0 ret_from_except
> +#endif
>  +
>  =A0=A0=A0=A0=A0=A0=A0 .globl=A0 sigreturn_exit
>  =A0sigreturn_exit:
> =A0=A0=A0=A0=A0=A0=A0 subi=A0=A0=A0 r1,r3,STACK_FRAME_OVERHEAD
> diff -Nru a/arch/ppc/kernel/fpu.S b/arch/ppc/kernel/fpu.S
> --- /dev/null=A0=A0 Wed Dec 31 16:00:00 196900
>  +++ b/arch/ppc/kernel/fpu.S=A0=A0=A0=A0 2005-04-12 09:54:36 -05:00
>  @@ -0,0 +1,133 @@
>  +/*
>  + *=A0 FPU support code, moved here from head.S so that it can be =
used
>  + *=A0 by chips which use other head-whatever.S files.
>  + *
>  + *=A0 This program is free software; you can redistribute it and/or
>  + *=A0 modify it under the terms of the GNU General Public License
> + *=A0 as published by the Free Software Foundation; either version
>  + *=A0 2 of the License, or (at your option) any later version.
>  + *
>  + */
>  +
>  +#include <linux/config.h>
> +#include <asm/processor.h>
> +#include <asm/page.h>
> +#include <asm/mmu.h>
>  +#include <asm/pgtable.h>
> +#include <asm/cputable.h>
> +#include <asm/cache.h>
> +#include <asm/thread_info.h>
> +#include <asm/ppc_asm.h>
> +#include <asm/offsets.h>
> +
>  +/*
>  + * This task wants to use the FPU now.
>  + * On UP, disable FP for the task which had the FPU previously,
>  + * and save its floating-point registers in its thread_struct.
>  + * Load up this task's FP registers from its thread_struct,
>  + * enable the FPU for the current task and return to the task.
>  + */
>  +=A0=A0=A0=A0=A0=A0 .globl=A0 load_up_fpu
>  +load_up_fpu:
> +=A0=A0=A0=A0=A0=A0 mfmsr=A0=A0 r5
>  +=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r5,r5,MSR_FP
>  +#ifdef CONFIG_PPC64BRIDGE
> +=A0=A0=A0=A0=A0=A0 clrldi=A0 r5,r5,1 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=
=A0=A0=A0 /* turn off 64-bit mode */
>  +#endif /* CONFIG_PPC64BRIDGE */
>  +=A0=A0=A0=A0=A0=A0 SYNC
>  +=A0=A0=A0=A0=A0=A0 MTMSRD(r5)=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 /* enable use of fpu now */
>  +=A0=A0=A0=A0=A0=A0 isync
>  +/*
>  + * For SMP, we don't do lazy FPU switching because it just gets too
>  + * horrendously complex, especially when a task switches from one =
CPU
>  + * to another.=A0 Instead we call giveup_fpu in switch_to.
>  + */
>  +#ifndef CONFIG_SMP
> +=A0=A0=A0=A0=A0=A0 tophys(r6,0)=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 /* get __pa constant */
>  +=A0=A0=A0=A0=A0=A0 addis=A0=A0 r3,r6,last_task_used_math@ha
> +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r4,last_task_used_math@l(r3)
> +=A0=A0=A0=A0=A0=A0 cmpwi=A0=A0 0,r4,0
>  +=A0=A0=A0=A0=A0=A0 beq=A0=A0=A0=A0 1f
> +=A0=A0=A0=A0=A0=A0 add=A0=A0=A0=A0 r4,r4,r6
>  +=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r4,r4,THREAD=A0=A0=A0 =A0=A0=A0=A0=A0=
=A0=A0 /* want=20
> last_task_used_math->thread */
>  +=A0=A0=A0=A0=A0=A0 SAVE_32FPRS(0, r4)
>  +=A0=A0=A0=A0=A0=A0 mffs=A0=A0=A0 fr0
> +=A0=A0=A0=A0=A0=A0 stfd=A0=A0=A0 fr0,THREAD_FPSCR-4(r4)
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r5,PT_REGS(r4)
> +=A0=A0=A0=A0=A0=A0 add=A0=A0=A0=A0 r5,r5,r6
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r4,_MSR-STACK_FRAME_OVERHEAD(r5)
> +=A0=A0=A0=A0=A0=A0 li=A0=A0=A0=A0=A0 r10,MSR_FP|MSR_FE0|MSR_FE1
> +=A0=A0=A0=A0=A0=A0 andc=A0=A0=A0 r4,r4,r10=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=
=A0=A0=A0 /* disable FP for previous=20
> task */
>  +=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r4,_MSR-STACK_FRAME_OVERHEAD(r5)
> +1:
>  +#endif /* CONFIG_SMP */
>  +=A0=A0=A0=A0=A0=A0 /* enable use of FP after return */
>  +=A0=A0=A0=A0=A0=A0 mfspr=A0=A0 r5,SPRN_SPRG3=A0=A0 =A0=A0=A0=A0=A0=A0=A0=
 /* current task's THREAD=20
> (phys) */
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r4,THREAD_FPEXC_MODE(r5)
> +=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r9,r9,MSR_FP=A0=A0=A0 =A0=A0=A0=A0=A0=
=A0=A0 /* enable FP for current */
>  +=A0=A0=A0=A0=A0=A0 or=A0=A0=A0=A0=A0 r9,r9,r4
>  +=A0=A0=A0=A0=A0=A0 lfd=A0=A0=A0=A0 fr0,THREAD_FPSCR-4(r5)
>  +=A0=A0=A0=A0=A0=A0 mtfsf=A0=A0 0xff,fr0
>  +=A0=A0=A0=A0=A0=A0 REST_32FPRS(0, r5)
>  +#ifndef CONFIG_SMP
> +=A0=A0=A0=A0=A0=A0 subi=A0=A0=A0 r4,r5,THREAD
>  +=A0=A0=A0=A0=A0=A0 sub=A0=A0=A0=A0 r4,r4,r6
>  +=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r4,last_task_used_math@l(r3)
> +#endif /* CONFIG_SMP */
>  +=A0=A0=A0=A0=A0=A0 /* restore registers and return */
>  +=A0=A0=A0=A0=A0=A0 /* we haven't used ctr or xer or lr */
> +=A0=A0=A0=A0=A0=A0 b=A0=A0=A0=A0=A0=A0 fast_exception_return
> +
>  +/*
>  + * FP unavailable trap from kernel - print a message, but let
>  + * the task use FP in the kernel until it returns to user mode.
>  + */
>  + =A0=A0=A0=A0=A0 .globl=A0 KernelFP
>  +KernelFP:
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r3,_MSR(r1)
>  +=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r3,r3,MSR_FP
>  +=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r3,_MSR(r1)=A0=A0=A0=A0 =A0=A0=A0=A0=
=A0=A0=A0 /* enable use of FP after=20
> return */
>  +=A0=A0=A0=A0=A0=A0 lis=A0=A0=A0=A0 r3,86f@h
>  +=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r3,r3,86f@l
>  +=A0=A0=A0=A0=A0=A0 mr=A0=A0=A0=A0=A0 r4,r2=A0=A0 =A0=A0=A0=A0=A0=A0=A0=
 =A0=A0=A0=A0=A0=A0=A0 /* current */
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r5,_NIP(r1)
>  +=A0=A0=A0=A0=A0=A0 bl=A0=A0=A0=A0=A0 printk
>  +=A0=A0=A0=A0=A0=A0 b=A0=A0=A0=A0=A0=A0 ret_from_except
> +86:=A0=A0=A0 .string "floating point used in kernel (task=3D%p, =
pc=3D%x)\n"
>  +=A0=A0=A0=A0=A0=A0 .align=A0 4,0
>  +
>  +/*
>  + * giveup_fpu(tsk)
> + * Disable FP for the task given as the argument,
>  + * and save the floating-point registers in its thread_struct.
>  + * Enables the FPU for use in the kernel on return.
>  + */
>  +=A0=A0=A0=A0=A0=A0 .globl=A0 giveup_fpu
>  +giveup_fpu:
>  +=A0=A0=A0=A0=A0=A0 mfmsr=A0=A0 r5
>  +=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r5,r5,MSR_FP
>  +=A0=A0=A0=A0=A0=A0 SYNC_601
>  +=A0=A0=A0=A0=A0=A0 ISYNC_601
>  +=A0=A0=A0=A0=A0=A0 MTMSRD(r5)=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 /* enable use of fpu now */
>  +=A0=A0=A0=A0=A0=A0 SYNC_601
>  +=A0=A0=A0=A0=A0=A0 isync
>  +=A0=A0=A0=A0=A0=A0 cmpwi=A0=A0 0,r3,0
>  +=A0=A0=A0=A0=A0=A0 beqlr-=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0=
 =A0=A0=A0=A0=A0=A0=A0 /* if no previous owner, done=20
> */
> +=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r3,r3,THREAD=A0=A0=A0 =A0=A0=A0=A0=A0=A0=
=A0 /* want THREAD of task */
>  +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r5,PT_REGS(r3)
> +=A0=A0=A0=A0=A0=A0 cmpwi=A0=A0 0,r5,0
>  +=A0=A0=A0=A0=A0=A0 SAVE_32FPRS(0, r3)
>  +=A0=A0=A0=A0=A0=A0 mffs=A0=A0=A0 fr0
> +=A0=A0=A0=A0=A0=A0 stfd=A0=A0=A0 fr0,THREAD_FPSCR-4(r3)
>  +=A0=A0=A0=A0=A0=A0 beq=A0=A0=A0=A0 1f
> +=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r4,_MSR-STACK_FRAME_OVERHEAD(r5)
> +=A0=A0=A0=A0=A0=A0 li=A0=A0=A0=A0=A0 r3,MSR_FP|MSR_FE0|MSR_FE1
> +=A0=A0=A0=A0=A0=A0 andc=A0=A0=A0 r4,r4,r3=A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 /* disable FP for previous=20
> task */
>  +=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r4,_MSR-STACK_FRAME_OVERHEAD(r5)
> +1:
>  +#ifndef CONFIG_SMP
> +=A0=A0=A0=A0=A0=A0 li=A0=A0=A0=A0=A0 r5,0
> +=A0=A0=A0=A0=A0=A0 lis=A0=A0=A0=A0 r4,last_task_used_math@ha
> +=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r5,last_task_used_math@l(r4)
> +#endif /* CONFIG_SMP */
>  +=A0=A0=A0=A0=A0=A0 blr
>  diff -Nru a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
> --- a/arch/ppc/kernel/head.S=A0=A0=A0 2005-04-12 09:54:36 -05:00
>  +++ b/arch/ppc/kernel/head.S=A0=A0=A0 2005-04-12 09:54:36 -05:00
>  @@ -775,133 +775,6 @@
>  =A0=A0=A0=A0=A0=A0=A0 EXC_XFER_STD(0x480, UnknownException)
> =A0#endif /* CONFIG_PPC64BRIDGE */
>  =A0
>  -/*
>  - * This task wants to use the FPU now.
>  - * On UP, disable FP for the task which had the FPU previously,
>  - * and save its floating-point registers in its thread_struct.
>  - * Load up this task's FP registers from its thread_struct,
>  - * enable the FPU for the current task and return to the task.
>  - */
>  -load_up_fpu:
>  -=A0=A0=A0=A0=A0=A0 mfmsr=A0=A0 r5
> -=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r5,r5,MSR_FP
>  -#ifdef CONFIG_PPC64BRIDGE
> -=A0=A0=A0=A0=A0=A0 clrldi=A0 r5,r5,1 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=
=A0=A0=A0 /* turn off 64-bit mode */
>  -#endif /* CONFIG_PPC64BRIDGE */
>  -=A0=A0=A0=A0=A0=A0 SYNC
>  -=A0=A0=A0=A0=A0=A0 MTMSRD(r5)=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 /* enable use of fpu now */
>  -=A0=A0=A0=A0=A0=A0 isync
>  -/*
>  - * For SMP, we don't do lazy FPU switching because it just gets too
>  - * horrendously complex, especially when a task switches from one =
CPU
>  - * to another.=A0 Instead we call giveup_fpu in switch_to.
>  - */
>  -#ifndef CONFIG_SMP
> -=A0=A0=A0=A0=A0=A0 tophys(r6,0)=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 /* get __pa constant */
>  -=A0=A0=A0=A0=A0=A0 addis=A0=A0 r3,r6,last_task_used_math@ha
> -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r4,last_task_used_math@l(r3)
> -=A0=A0=A0=A0=A0=A0 cmpwi=A0=A0 0,r4,0
>  -=A0=A0=A0=A0=A0=A0 beq=A0=A0=A0=A0 1f
>  -=A0=A0=A0=A0=A0=A0 add=A0=A0=A0=A0 r4,r4,r6
>  -=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r4,r4,THREAD=A0=A0=A0 =A0=A0=A0=A0=A0=
=A0=A0 /* want=20
> last_task_used_math->thread */
>  -=A0=A0=A0=A0=A0=A0 SAVE_32FPRS(0, r4)
>  -=A0=A0=A0=A0=A0=A0 mffs=A0=A0=A0 fr0
> -=A0=A0=A0=A0=A0=A0 stfd=A0=A0=A0 fr0,THREAD_FPSCR-4(r4)
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r5,PT_REGS(r4)
> -=A0=A0=A0=A0=A0=A0 add=A0=A0=A0=A0 r5,r5,r6
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r4,_MSR-STACK_FRAME_OVERHEAD(r5)
> -=A0=A0=A0=A0=A0=A0 li=A0=A0=A0=A0=A0 r10,MSR_FP|MSR_FE0|MSR_FE1
> -=A0=A0=A0=A0=A0=A0 andc=A0=A0=A0 r4,r4,r10=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=
=A0=A0=A0 /* disable FP for previous=20
> task */
>  -=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r4,_MSR-STACK_FRAME_OVERHEAD(r5)
> -1:
>  -#endif /* CONFIG_SMP */
>  -=A0=A0=A0=A0=A0=A0 /* enable use of FP after return */
>  -=A0=A0=A0=A0=A0=A0 mfspr=A0=A0 r5,SPRN_SPRG3=A0=A0 =A0=A0=A0=A0=A0=A0=A0=
 /* current task's THREAD=20
> (phys) */
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r4,THREAD_FPEXC_MODE(r5)
> -=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r9,r9,MSR_FP=A0=A0=A0 =A0=A0=A0=A0=A0=
=A0=A0 /* enable FP for current */
>  -=A0=A0=A0=A0=A0=A0 or=A0=A0=A0=A0=A0 r9,r9,r4
>  -=A0=A0=A0=A0=A0=A0 lfd=A0=A0=A0=A0 fr0,THREAD_FPSCR-4(r5)
>  -=A0=A0=A0=A0=A0=A0 mtfsf=A0=A0 0xff,fr0
>  -=A0=A0=A0=A0=A0=A0 REST_32FPRS(0, r5)
>  -#ifndef CONFIG_SMP
> -=A0=A0=A0=A0=A0=A0 subi=A0=A0=A0 r4,r5,THREAD
>  -=A0=A0=A0=A0=A0=A0 sub=A0=A0=A0=A0 r4,r4,r6
>  -=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r4,last_task_used_math@l(r3)
> -#endif /* CONFIG_SMP */
>  -=A0=A0=A0=A0=A0=A0 /* restore registers and return */
>  -=A0=A0=A0=A0=A0=A0 /* we haven't used ctr or xer or lr */
> -=A0=A0=A0=A0=A0=A0 /* fall through to fast_exception_return */
>  -
>  -=A0=A0=A0=A0=A0=A0 .globl=A0 fast_exception_return
> -fast_exception_return:
> -=A0=A0=A0=A0=A0=A0 andi.=A0=A0 r10,r9,MSR_RI=A0=A0 =A0=A0=A0=A0=A0=A0=A0=
 /* check for recoverable=20
> interrupt */
>  -=A0=A0=A0=A0=A0=A0 beq=A0=A0=A0=A0 1f=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=
=A0 =A0=A0=A0=A0=A0=A0=A0 /* if not, we've got problems=20
> */
>  -2:=A0=A0=A0=A0 REST_4GPRS(3, r11)
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r10,_CCR(r11)
>  -=A0=A0=A0=A0=A0=A0 REST_GPR(1, r11)
>  -=A0=A0=A0=A0=A0=A0 mtcr=A0=A0=A0 r10
> -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r10,_LINK(r11)
> -=A0=A0=A0=A0=A0=A0 mtlr=A0=A0=A0 r10
> -=A0=A0=A0=A0=A0=A0 REST_GPR(10, r11)
>  -=A0=A0=A0=A0=A0=A0 mtspr=A0=A0 SPRN_SRR1,r9
> -=A0=A0=A0=A0=A0=A0 mtspr=A0=A0 SPRN_SRR0,r12
> -=A0=A0=A0=A0=A0=A0 REST_GPR(9, r11)
>  -=A0=A0=A0=A0=A0=A0 REST_GPR(12, r11)
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r11,GPR11(r11)
> -=A0=A0=A0=A0=A0=A0 SYNC
>  -=A0=A0=A0=A0=A0=A0 RFI
>  -
>  -/* check if the exception happened in a restartable section */
>  -1:=A0=A0=A0=A0 lis=A0=A0=A0=A0 r3,exc_exit_restart_end@ha
> -=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r3,r3,exc_exit_restart_end@l
> -=A0=A0=A0=A0=A0=A0 cmplw=A0=A0 r12,r3
>  -=A0=A0=A0=A0=A0=A0 bge=A0=A0=A0=A0 3f
>  -=A0=A0=A0=A0=A0=A0 lis=A0=A0=A0=A0 r4,exc_exit_restart@ha
> -=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r4,r4,exc_exit_restart@l
> -=A0=A0=A0=A0=A0=A0 cmplw=A0=A0 r12,r4
>  -=A0=A0=A0=A0=A0=A0 blt=A0=A0=A0=A0 3f
>  -=A0=A0=A0=A0=A0=A0 lis=A0=A0=A0=A0 r3,fee_restarts@ha
> -=A0=A0=A0=A0=A0=A0 tophys(r3,r3)
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r5,fee_restarts@l(r3)
> -=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r5,r5,1
>  -=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r5,fee_restarts@l(r3)
> -=A0=A0=A0=A0=A0=A0 mr=A0=A0=A0=A0=A0 r12,r4=A0 =A0=A0=A0=A0=A0=A0=A0 =
/* restart at exc_exit_restart */
>  -=A0=A0=A0=A0=A0=A0 b=A0=A0=A0=A0=A0=A0 2b
>  -
>  -=A0=A0=A0=A0=A0=A0 .comm=A0=A0 fee_restarts,4
>  -
>  -/* aargh, a nonrecoverable interrupt, panic */
>  -/* aargh, we don't know which trap this is */
>  -/* but the 601 doesn't implement the RI bit, so assume it's OK */
>  -3:
>  -BEGIN_FTR_SECTION
> -=A0=A0=A0=A0=A0=A0 b=A0=A0=A0=A0=A0=A0 2b
>  -END_FTR_SECTION_IFSET(CPU_FTR_601)
> -=A0=A0=A0=A0=A0=A0 li=A0=A0=A0=A0=A0 r10,-1
>  -=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r10,TRAP(r11)
>  -=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r3,r1,STACK_FRAME_OVERHEAD
> -=A0=A0=A0=A0=A0=A0 li=A0=A0=A0=A0=A0 r10,MSR_KERNEL
> -=A0=A0=A0=A0=A0=A0 bl=A0=A0=A0=A0=A0 transfer_to_handler_full
> -=A0=A0=A0=A0=A0=A0 .long=A0=A0 nonrecoverable_exception
> -=A0=A0=A0=A0=A0=A0 .long=A0=A0 ret_from_except
> -
>  -/*
>  - * FP unavailable trap from kernel - print a message, but let
>  - * the task use FP in the kernel until it returns to user mode.
>  - */
>  -KernelFP:
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r3,_MSR(r1)
>  -=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r3,r3,MSR_FP
>  -=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r3,_MSR(r1)=A0=A0=A0=A0 =A0=A0=A0=A0=
=A0=A0=A0 /* enable use of FP after=20
> return */
>  -=A0=A0=A0=A0=A0=A0 lis=A0=A0=A0=A0 r3,86f@h
>  -=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r3,r3,86f@l
>  -=A0=A0=A0=A0=A0=A0 mr=A0=A0=A0=A0=A0 r4,r2=A0=A0 =A0=A0=A0=A0=A0=A0=A0=
 =A0=A0=A0=A0=A0=A0=A0 /* current */
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r5,_NIP(r1)
>  -=A0=A0=A0=A0=A0=A0 bl=A0=A0=A0=A0=A0 printk
>  -=A0=A0=A0=A0=A0=A0 b=A0=A0=A0=A0=A0=A0 ret_from_except
> -86:=A0=A0=A0 .string "floating point used in kernel (task=3D%p, =
pc=3D%x)\n"
>  -=A0=A0=A0=A0=A0=A0 .align=A0 4,0
> -
>  =A0#ifdef CONFIG_ALTIVEC
> =A0/* Note that the AltiVec support is closely modeled after the FP
>  =A0 * support.=A0 Changes to one are likely to be applicable to the
>  @@ -1014,42 +887,6 @@
>  =A0#endif /* CONFIG_SMP */
>  =A0=A0=A0=A0=A0=A0=A0 blr
>  =A0#endif /* CONFIG_ALTIVEC */
>  -
>  -/*
>  - * giveup_fpu(tsk)
> - * Disable FP for the task given as the argument,
>  - * and save the floating-point registers in its thread_struct.
>  - * Enables the FPU for use in the kernel on return.
>  - */
>  -=A0=A0=A0=A0=A0=A0 .globl=A0 giveup_fpu
>  -giveup_fpu:
>  -=A0=A0=A0=A0=A0=A0 mfmsr=A0=A0 r5
> -=A0=A0=A0=A0=A0=A0 ori=A0=A0=A0=A0 r5,r5,MSR_FP
>  -=A0=A0=A0=A0=A0=A0 SYNC_601
>  -=A0=A0=A0=A0=A0=A0 ISYNC_601
>  -=A0=A0=A0=A0=A0=A0 MTMSRD(r5)=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 /* enable use of fpu now */
>  -=A0=A0=A0=A0=A0=A0 SYNC_601
>  -=A0=A0=A0=A0=A0=A0 isync
>  -=A0=A0=A0=A0=A0=A0 cmpwi=A0=A0 0,r3,0
>  -=A0=A0=A0=A0=A0=A0 beqlr-=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0=
 =A0=A0=A0=A0=A0=A0=A0 /* if no previous owner, done=20
> */
> -=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r3,r3,THREAD=A0=A0=A0 =A0=A0=A0=A0=A0=A0=
=A0 /* want THREAD of task */
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r5,PT_REGS(r3)
> -=A0=A0=A0=A0=A0=A0 cmpwi=A0=A0 0,r5,0
>  -=A0=A0=A0=A0=A0=A0 SAVE_32FPRS(0, r3)
>  -=A0=A0=A0=A0=A0=A0 mffs=A0=A0=A0 fr0
> -=A0=A0=A0=A0=A0=A0 stfd=A0=A0=A0 fr0,THREAD_FPSCR-4(r3)
>  -=A0=A0=A0=A0=A0=A0 beq=A0=A0=A0=A0 1f
>  -=A0=A0=A0=A0=A0=A0 lwz=A0=A0=A0=A0 r4,_MSR-STACK_FRAME_OVERHEAD(r5)
> -=A0=A0=A0=A0=A0=A0 li=A0=A0=A0=A0=A0 r3,MSR_FP|MSR_FE0|MSR_FE1
> -=A0=A0=A0=A0=A0=A0 andc=A0=A0=A0 r4,r4,r3=A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 /* disable FP for previous=20
> task */
>  -=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r4,_MSR-STACK_FRAME_OVERHEAD(r5)
> -1:
>  -#ifndef CONFIG_SMP
> -=A0=A0=A0=A0=A0=A0 li=A0=A0=A0=A0=A0 r5,0
>  -=A0=A0=A0=A0=A0=A0 lis=A0=A0=A0=A0 r4,last_task_used_math@ha
> -=A0=A0=A0=A0=A0=A0 stw=A0=A0=A0=A0 r5,last_task_used_math@l(r4)
> -#endif /* CONFIG_SMP */
>  -=A0=A0=A0=A0=A0=A0 blr
>  =A0
>  =A0/*
>  =A0 * This code is jumped to from the startup code to copy
>  diff -Nru a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
> --- a/arch/ppc/kernel/head_44x.S=A0=A0=A0=A0=A0=A0=A0 2005-04-12 =
09:54:36 -05:00
>  +++ b/arch/ppc/kernel/head_44x.S=A0=A0=A0=A0=A0=A0=A0 2005-04-12 =
09:54:36 -05:00
>  @@ -426,7 +426,11 @@
>  =A0=A0=A0=A0=A0=A0=A0 PROGRAM_EXCEPTION
> =A0
>  =A0=A0=A0=A0=A0=A0=A0 /* Floating Point Unavailable Interrupt */
>  +#ifdef CONFIG_PPC_FPU
> +=A0=A0=A0=A0=A0=A0 FP_UNAVAILABLE_EXCEPTION
> +#else
>  =A0=A0=A0=A0=A0=A0=A0 EXCEPTION(0x2010, FloatingPointUnavailable, =
UnknownException,=20
> EXC_XFER_EE)
> +#endif
>  =A0
>  =A0=A0=A0=A0=A0=A0=A0 /* System Call Interrupt */
> =A0=A0=A0=A0=A0=A0=A0 START_EXCEPTION(SystemCall)
> @@ -686,9 +690,11 @@
>  =A0 *
>  =A0 * The 44x core does not have an FPU.
>  =A0 */
>  +#ifndef CONFIG_PPC_FPU
> =A0_GLOBAL(giveup_fpu)
> =A0=A0=A0=A0=A0=A0=A0 blr
>  -
>  +#endif
>  +
> =A0/*
>  =A0 * extern void abort(void)
>  =A0 *
>  diff -Nru a/arch/ppc/kernel/head_booke.h=20
> b/arch/ppc/kernel/head_booke.h
> --- a/arch/ppc/kernel/head_booke.h=A0=A0=A0=A0=A0 2005-04-12 09:54:36 =
-05:00
>  +++ b/arch/ppc/kernel/head_booke.h=A0=A0=A0=A0=A0 2005-04-12 09:54:36 =
-05:00
>  @@ -337,4 +337,11 @@
>  =A0=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r3,r1,STACK_FRAME_OVERHEAD;=A0=A0=A0=
=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0=20
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0 \
>  =A0=A0=A0=A0=A0=A0=A0 EXC_XFER_LITE(0x0900, timer_interrupt)
> =A0
>  +#define FP_UNAVAILABLE_EXCEPTION=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0=
 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0=20
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0 \
>  +=A0=A0=A0=A0=A0=A0 START_EXCEPTION(FloatingPointUnavailable)=A0=A0=A0=A0=
=A0=A0 =A0=A0=A0=A0=A0=A0=A0=20
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0 \
> +=A0=A0=A0=A0=A0=A0 NORMAL_EXCEPTION_PROLOG;=A0=A0=A0=A0=A0=A0=A0 =
=A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0=20
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0 \
>  +=A0=A0=A0=A0=A0=A0 bne=A0=A0=A0=A0 load_up_fpu;=A0=A0=A0 =A0=A0=A0=A0=A0=
=A0=A0 /* if from user, just load it=20
> up */=A0=A0 \
>  +=A0=A0=A0=A0=A0=A0 addi=A0=A0=A0 r3,r1,STACK_FRAME_OVERHEAD;=A0=A0=A0=A0=
 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0=20
> =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0 \
>  +=A0=A0=A0=A0=A0=A0 EXC_XFER_EE_LITE(0x800, KernelFP)
>  +
>  =A0#endif /* __HEAD_BOOKE_H__ */
>  diff -Nru a/arch/ppc/kernel/head_fsl_booke.S=20
> b/arch/ppc/kernel/head_fsl_booke.S
> --- a/arch/ppc/kernel/head_fsl_booke.S=A0 2005-04-12 09:54:36 -05:00
>  +++ b/arch/ppc/kernel/head_fsl_booke.S=A0 2005-04-12 09:54:36 -05:00
>  @@ -477,7 +477,11 @@
>  =A0=A0=A0=A0=A0=A0=A0 PROGRAM_EXCEPTION
> =A0
>  =A0=A0=A0=A0=A0=A0=A0 /* Floating Point Unavailable Interrupt */
>  +#ifdef CONFIG_PPC_FPU
> +=A0=A0=A0=A0=A0=A0 FP_UNAVAILABLE_EXCEPTION
> +#else
>  =A0=A0=A0=A0=A0=A0=A0 EXCEPTION(0x0800, FloatingPointUnavailable, =
UnknownException,=20
> EXC_XFER_EE)
> +#endif
>  =A0
>  =A0=A0=A0=A0=A0=A0=A0 /* System Call Interrupt */
> =A0=A0=A0=A0=A0=A0=A0 START_EXCEPTION(SystemCall)
> @@ -883,10 +887,12 @@
>  =A0/*
>  =A0 * extern void giveup_fpu(struct task_struct *prev)
>  =A0 *
>  - * The e500 core does not have an FPU.
>  + * Not all FSL Book-E cores have an FPU
>  =A0 */
>  +#ifndef CONFIG_PPC_FPU
> =A0_GLOBAL(giveup_fpu)
> =A0=A0=A0=A0=A0=A0=A0 blr
>  +#endif
>  =A0
>  =A0/*
>  =A0 * extern void abort(void)
>  diff -Nru a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
> --- a/arch/ppc/kernel/misc.S=A0=A0=A0 2005-04-12 09:54:36 -05:00
>  +++ b/arch/ppc/kernel/misc.S=A0=A0=A0 2005-04-12 09:54:36 -05:00
>  @@ -1096,17 +1096,7 @@
>  =A0 * and exceptions as if the cpu had performed the load or store.
>  =A0 */
>  =A0
>  -#if defined(CONFIG_4xx) || defined(CONFIG_E500)
> -_GLOBAL(cvt_fd)
> -=A0=A0=A0=A0=A0=A0 lfs=A0=A0=A0=A0 0,0(r3)
>  -=A0=A0=A0=A0=A0=A0 stfd=A0=A0=A0 0,0(r4)
>  -=A0=A0=A0=A0=A0=A0 blr
>  -
>  -_GLOBAL(cvt_df)
> -=A0=A0=A0=A0=A0=A0 lfd=A0=A0=A0=A0 0,0(r3)
>  -=A0=A0=A0=A0=A0=A0 stfs=A0=A0=A0 0,0(r4)
>  -=A0=A0=A0=A0=A0=A0 blr
>  -#else
>  +#ifdef CONFIG_PPC_FPU
> =A0_GLOBAL(cvt_fd)
> =A0=A0=A0=A0=A0=A0=A0 lfd=A0=A0=A0=A0 0,-4(r5)=A0=A0=A0=A0=A0=A0=A0 /* =
load up fpscr value */
>  =A0=A0=A0=A0=A0=A0=A0 mtfsf=A0=A0 0xff,0
>  diff -Nru a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
> --- a/arch/ppc/kernel/traps.c=A0=A0 2005-04-12 09:54:36 -05:00
>  +++ b/arch/ppc/kernel/traps.c=A0=A0 2005-04-12 09:54:36 -05:00
>  @@ -176,7 +176,7 @@
>  =A0#else
>  =A0#define get_mc_reason(regs)=A0=A0=A0 (mfspr(SPRN_MCSR))
> =A0#endif
>  -#define REASON_FP=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 0
>  +#define REASON_FP=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 ESR_FP
>  =A0#define REASON_ILLEGAL =A0=A0=A0=A0=A0=A0=A0 ESR_PIL
> =A0#define REASON_PRIVILEGED=A0=A0=A0=A0=A0 ESR_PPR
>  =A0#define REASON_TRAP=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 ESR_PTR
>  diff -Nru a/include/asm-ppc/reg_booke.h b/include/asm-ppc/reg_booke.h
> --- a/include/asm-ppc/reg_booke.h=A0=A0=A0=A0=A0=A0 2005-04-12 =
09:54:36 -05:00
>  +++ b/include/asm-ppc/reg_booke.h=A0=A0=A0=A0=A0=A0 2005-04-12 =
09:54:36 -05:00
>  @@ -304,6 +304,7 @@
>  =A0#define ESR_PIL=A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
0x08000000=A0=A0=A0=A0=A0 /* Program Exception=20
> - Illegal */
>  =A0#define ESR_PPR=A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
0x04000000=A0=A0=A0=A0=A0 /* Program Exception=20
> - Priveleged */
>  =A0#define ESR_PTR=A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
0x02000000=A0=A0=A0=A0=A0 /* Program Exception=20
> - Trap */
>  +#define ESR_FP =A0=A0=A0=A0=A0=A0=A0 0x01000000=A0=A0=A0=A0=A0 /* =
Floating Point Operation */
>  =A0#define ESR_DST=A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
0x00800000=A0=A0=A0=A0=A0 /* Storage Exception=20
> - Data miss */
>  =A0#define ESR_DIZ=A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =
0x00400000=A0=A0=A0=A0=A0 /* Storage Exception=20
> - Zone fault */
>  =A0#define ESR_ST =A0=A0=A0=A0=A0=A0=A0 0x00800000=A0=A0=A0=A0=A0 /* =
Store Operation */
>  _______________________________________________
> Linuxppc-dev mailing list
>  Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

^ permalink raw reply

* Re: [PATCH] ppc32: Fix alignment exception checking on load/store multiple instructions
From: Kumar Gala @ 2005-04-19 14:50 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev list
In-Reply-To: <Pine.LNX.4.61.0504120101210.10781@blarg.somerset.sps.mot.com>

Paul,

What is the state of ack'ing this patch?

- kumar

On Apr 12, 2005, at 1:03 AM, Kumar Gala wrote:

> Paulus,
>
> Can you take a look and ack this patch before I send to akpm.
>
> The handling of misaligned load/store multiplies did not check to see=20=

> if
> the address were ok to access before __{get,put}_user().
>
>
>
> Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
>
> ---
>  diff -Nru a/arch/ppc/kernel/align.c b/arch/ppc/kernel/align.c
> --- a/arch/ppc/kernel/align.c=A0=A0 2005-04-12 01:00:10 -05:00
>  +++ b/arch/ppc/kernel/align.c=A0=A0 2005-04-12 01:00:10 -05:00
>  @@ -290,6 +290,10 @@
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 /* =
lwm, stmw */
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 nb =
=3D (32 - reg) * 4;
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 }
>  +
>  +=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 if (!access_ok((flags & ST? =
VERIFY_WRITE:=20
> VERIFY_READ), addr, nb+nb0))
> +=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 return =
-EFAULT; /* bad address */
> +
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 rptr =3D (unsigned char =
*) &regs->gpr[reg];
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 if (flags & LD) {
>  =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 =A0=A0=A0=A0=A0=A0=A0 for =
(i =3D 0; i < nb; ++i)
>  _______________________________________________
> Linuxppc-dev mailing list
>  Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

^ permalink raw reply

* update DataTLBMiss exception comment
From: Marcelo Tosatti @ 2005-04-19 11:52 UTC (permalink / raw)
  To: Dan Malek; +Cc: linux-ppc-embedded


Hi,

Since v2.6 DataTLBMiss doesnt jump to the page fault handler, it instead
loads invalid TLB which in turn causes a DataTLBError exception.

The comment on top of it haven't been update since the change. 

What about this?

--- head_8xx.S.orig	2005-04-19 13:29:14.000000000 -0300
+++ head_8xx.S	2005-04-19 13:34:44.000000000 -0300
@@ -289,13 +289,11 @@
  * For the MPC8xx, this is a software tablewalk to load the instruction
  * TLB.  It is modelled after the example in the Motorola manual.  The task
  * switch loads the M_TWB register with the pointer to the first level table.
- * If we discover there is no second level table (the value is zero), the
- * plan was to load that into the TLB, which causes another fault into the
- * TLB Error interrupt where we can handle such problems.  However, that did
- * not work, so if we discover there is no second level table, we restore
- * registers and branch to the error exception.  We have to use the MD_xxx
- * registers for the tablewalk because the equivalent MI_xxx registers
- * only perform the attribute functions.
+ * If we discover there is no second level table (value is zero) or if there 
+ * is an invalid pte, we load that into the TLB, which causes another fault 
+ * into the TLB Error interrupt where we can handle such problems.  
+ * We have to use the MD_xxx registers for the tablewalk because the 
+ * equivalent MI_xxx registers only perform the attribute functions.
  */
 InstructionTLBMiss:
 #ifdef CONFIG_8xx_CPU6

^ permalink raw reply

* Re: update DataTLBMiss exception comment
From: Dan Malek @ 2005-04-19 16:57 UTC (permalink / raw)
  To: Marcelo Tosatti; +Cc: linux-ppc-embedded
In-Reply-To: <20050419115253.GA2780@logos.cnet>


On Apr 19, 2005, at 7:52 AM, Marcelo Tosatti wrote:

> Since v2.6 DataTLBMiss doesnt jump to the page fault handler, it 
> instead
> loads invalid TLB which in turn causes a DataTLBError exception.

Which, of course, is the logically correct way to do it.  I guess I just
read too much into the suggestion in the manual to jump to the
"unused" Data Error exception vector under some miss conditions.
I tried to eliminate the immediate error fault that was going to
happen, but I guess we have to force that fault to get the proper
information in the fault registers.

> The comment on top of it haven't been update since the change.
>
> What about this?

Yes, thanks.


	-- Dan

^ permalink raw reply

* Re: 824x Sandpoint with 2.6.x
From: Mark A. Greer @ 2005-04-19 18:27 UTC (permalink / raw)
  To: Sam Song; +Cc: linuxppc-embedded
In-Reply-To: <20050419135257.50676.qmail@web15805.mail.cnb.yahoo.com>

Sam Song wrote:

> <snip>
>
>
>OK, I am now up to the joint of early_console and
>normal console. Switch problem. Perhaps I miss sth
>or what?
>
><snip>
>
>
>Kernel command line:
>console=uart,mmio,0xfdfce500,115200n8
>console=ttyS0,115200
>root=/dev/ram rw ramdisk_size=200000
>ip=192.168.0.3:192.168..2:::sandpoint:et
>h0:off panic=1
>
<snip>

Get rid of the "console=uart,mmio,0xfdfce500,115200n8" part of the
cmdline and see what happens (keep the "console=ttyS0,115200" part).


Mark

^ permalink raw reply

* Re: Status report for 2.6.12-rc2
From: Benjamin Herrenschmidt @ 2005-04-19 23:42 UTC (permalink / raw)
  To: Wolfram Quester; +Cc: linuxppc-dev list
In-Reply-To: <20050417091851.GE4981@halley.zuhause>

On Sun, 2005-04-17 at 11:18 +0200, Wolfram Quester wrote:
> Hi,
> 
> I use debian on my Powerbook6,2 and recently upgraded from kernel 2.6.10
> with the patch Guido Günther provides at [1] to 2.6.12-rc2 with ben's
> tumbler/snapper patches applied.
> So far I've seen the following issues:
> 1. I tried the new nvidiafb - just because I'm curious and the help says 
>    "This driver supports graphics boards with the nVidia chips, TNT and
>    newer. For very old chipsets, such as the RIVA128, then use the
>    rivafb."
>    The kernel crashed during boot when it tried to switch to nvidiafb. I
>    could see the messages that appeared before this stage until I
>    switched the computer off. Booting with video=ofonly went well and
>    using the traditional rivafb works fine.
>    This situation reminds me to crashes I had sometime ago when I was
>    testing Guido's patches for rivafb when he tried to get proper
>    support for NV30 into rivafb

You should report that to the linux-fbdev mailing list so the maintainer
of this driver can try to figure out what's up.

> 2. Sometimes the machine crashes on suspend to disk. It only happens when I work
>    in X and it seems to freeze in the process of switching to a virtual
>    terminal. The screen shows a distorted image of the previous screen
>    (as if I had 8Bit colour depth with oversized pixels).
>    I never had such freezes with 2.6.10 and this is the issue which
>    annoys me most ATM. I don't have a way to clearly reproduce the
>    freeze. It happend in two out of perhaps 20 suspends. It only seems
>    to happen on the first suspend after boot.
>    The suspend itself is much much faster than with 2.6.10 however.

It dies at suspend time when switching to VC ? Hrm... looks like it
could be X and the framebuffer walking on eachother toes, not sure tho,
2.6.12-rc2 is supposed to have patches fixing such ...

> 3. I configured sound to use snd-powermac. Before I used
>    dmasound-{pmac,core} and it works mostly. After a
>    suspend-resume-cycle I have to kill xfce4-panel, which accesses
>    /dev/mixer0, rmmod snd-powermac, wait a second and reinsert the
>    module. 

Yes, the Alsa code isn't doing very well when sleep is triggered while
an application is playing. I may try to fix it some day, or you can
maybe report that to alsa-devel and have Takashi fix it :)

> 4. Something that is quite annoying but harmless is that after wakeup
>    the machine sometimes suspends again immediately. I had something
>    like this before. On resume the PMU seems to be some kind of
>    irritated and gives wrong information about remaining runtime.
>    If this remaining time is 0 pbbuttonsd suspends the machine again.

Possibly, I haven't really checked what's going on with suspend to disk.
I suspect we just haven't yet started polling again from the PMU and we
expose some crap to userland or something like htat ...

> Thanks,
> 
> Wolfi
> 
>   1. http://honk.physik.uni-konstanz.de/~agx/linux-ppc/kernel/2.6.11.6-agx0.diff
> 
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
-- 
Benjamin Herrenschmidt <benh@kernel.crashing.org>

^ permalink raw reply

* Re: [PATCH] ppc32: refactor FPU exception handling
From: Paul Mackerras @ 2005-04-20  0:17 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev list, Jason McMullan
In-Reply-To: <fd32aa7b6cff252fcc11bd3e37c8c6c5@freescale.com>

Kumar Gala writes:

> What is the state of this patch?

Sorry.  It looks fine.  I won't send it to Andrew Morton just at the
moment, though, since he is away (at LCA) and not keeping up with his
email (as he just told me :).

Paul.

^ permalink raw reply

* Re: [PATCH] ppc32: Fix alignment exception checking on load/store multiple instructions
From: Paul Mackerras @ 2005-04-20  1:26 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev list
In-Reply-To: <700d35a3fce7b67412f955baf473b426@freescale.com>

Kumar Gala writes:

> What is the state of ack'ing this patch?

It's fine, I'll forward it to akpm in due course.

Paul.

^ permalink raw reply

* 8xx SMC question
From: Robin Gilks @ 2005-04-20  3:19 UTC (permalink / raw)
  To: ppc embedded list

Greetings

Using the uart driver from a snapshot of the Denx kernel of about 18 
months ago (2.4.22 or thereabouts), I'm trying to sort out the reception 
of break. The only information I can find that may help identify the 
code is:
BK Id: SCCS/s.uart.c 1.30 11/19/02 11:58:41 trini

The problem I have is that a break doesn't seem to be reported until 
another character comes along - this means for example that if I get 2 
breaks, only one is reported up to the tty layer (I think - maybe a 
queuing problem at tty level?). The new character is received AFTER the 
break (so ordering is not a problem).

Knowing that there is no really 'standard' SMC driver for 2.4 series 
kernels I'm not sure if this scenario will ring any bells. If there is a 
bit I've missed in the interrupt mask (or whatever) that prevents the 
break being seen, any ideas on what it might be? ie. should I be looking 
at arch/ppc/8xx_io/uart.c or at drivers/char/n_tty.c !!

-- 
Robin Gilks
Senior Design Engineer          Phone: (+64)(3) 357 1569
Tait Electronics                Fax  :  (+64)(3) 359 4632
PO Box 1645 Christchurch        Email : robin.gilks@tait.co.nz
New Zealand

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^ permalink raw reply

* Re: Sound drivers for newer machines: need help
From: Armando Di Cianno @ 2005-04-10 17:13 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <1113006674.9568.414.camel@gaston>

-----BEGIN PGP SIGNED MESSAGE-----
Hash: SHA1

On 2005-04-08 20:31:14 -0400 Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
Late in this game, but for completeness...
> echo `cat /proc/device-tree/model`
PowerBook5,4

> for i in `find /proc/device-tree -name layout-id -print`; do echo $i 
> && 
> hexdump -n4 $i; done
/proc/device-tree/pci@f2000000/mac-io@17/i2s@10000/i2s-a@10000/sound/layout-id
0000000 0000 0033
0000004

__armando di cianno
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.1 (GNU/Linux)
Comment: Using the GPG bundle for GNUMail

iD8DBQFCWV7JwgiTPLI9xhcRApm9AJ0ZjwXim5sGmm8W3OBsKLyDO7wrVACeJ7FH
L4fLQJYI6rItfSljTmHNk78=
=b4iY
-----END PGP SIGNATURE-----

^ permalink raw reply

* RAM test - How to
From: Atit_Shah @ 2005-04-20  4:52 UTC (permalink / raw)
  To: linuxppc-embedded

Hi,

	I am using a SDRAM having a port size 64 and size 32MB, and the
burst length is 4. I want to know how i can test my RAM for burst mode
operation. I have read in a couple of places that there is no sure RAM
test but there must be some reasonable test which can be performed to
atleast be sure that the RAM functions fine under burst mode.

Thanks=20
Atit


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^ permalink raw reply

* Re: RAM test - How to
From: Wolfgang Denk @ 2005-04-20  7:40 UTC (permalink / raw)
  To: Atit_Shah; +Cc: linuxppc-embedded
In-Reply-To: <D8595042F3765A4285B848A78A2C2ED102774F@bsdmsg002.corp.satyam.ad>

In message <D8595042F3765A4285B848A78A2C2ED102774F@bsdmsg002.corp.satyam.ad> you wrote:
> 
> 	I am using a SDRAM having a port size 64 and size 32MB, and the
> burst length is 4. I want to know how i can test my RAM for burst mode
> operation. I have read in a couple of places that there is no sure RAM
> test but there must be some reasonable test which can be performed to
> atleast be sure that the RAM functions fine under burst mode.

You can probably implement a memory test like this one:

1)  Map a region of physical RAM into two virtual regions:
    one cached and the the other one uncached.
2)  Fill the cached region with a pattern, and flush the cache
2a) Check the uncached region to match the pattern
2b) Check the cached region to match the pattern
3)  Fill the uncached region with a pattern
3a) Check the cached region to match the pattern
3b) Check the uncached region to match the pattern
4)  Change the patterns and go to step 2.

You probably want to do this in your boot loader, though.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
A Freudian slip is when you say one thing but mean your mother.

^ permalink raw reply

* Re: using initramfs with ppc (solution)
From: Pawel Studencki @ 2005-04-20  9:55 UTC (permalink / raw)
  To: linuxppc-embedded

Hello,
 
I found a solution of my problem, it was corrupt
initramfs (because of my mistake).
While building kernel 2.6.x an initial, default
initramfs is created with some scripts in directory
./usr
When the kernels starts, it searchs for directory
"/root" on initramfs.
If it does not exist, it returns an error and the
actual mounting process
of the real/user filesystem is aborted.
 
best regards
Pawel
 
 
 
p.s.
    Manoj - unfortunately I don't know any development
board with ppc. I work with our hardware,
    which was developed in another department.


		
__________________________________ 
Do you Yahoo!? 
Yahoo! Small Business - Try our new resources site!
http://smallbusiness.yahoo.com/resources/ 

^ permalink raw reply

* Virtex2pro OPB frequency 10/100Mbs ethernet link related problem
From: Pierre Kestener @ 2005-04-20  9:46 UTC (permalink / raw)
  To: linuxppc-embedded, Pierre Kestener

Hello,

I have noticed a strange behavior regarding NFS on my target (Virtex2pro 
ff1152 from Memec) when increasing OPB/PLB bus frequency from 50 MHz to 
66.666667MHz to be able to use a 100 Mbs ethernet link (it is mentionned 
in the OPB/EMAC IP doc
that Bus clock should be more than 65 MHz to have 100Mbs).

I use U-boot (ML300 port with small modifications) for the bootloader 
step (download linux kernel via tftp) and kernel 2.4.20. The root 
filesytem is mounted via NFS.

At 50MHz, everything works fine. Ethernet link speed is 10 Mbs. I can 
check that on my Ethernet switch.

When using 66.666667MHz OPB frequency, ethernet Link speed is indeed 
100Mbs. U-boot works perfectly but linux boot fails trying to get nfs 
server port !!!

Using "tcpdump" on my linux host, i can see that target sends ARP 
packets and the server replies but nothing happends...
 
    09:04:28.848228 arp who-has myHost.extra.cea.fr tell 132.166.xxx.yyy
    09:04:28.848265 arp reply myHost.extra.cea.fr is-at 00:06:5b:xx:yy:zz

Has anyone seen such a behavior, using a 100Mbs ethernet link with a 
Virtex2pro target ?
Any idea regarding this problem (hardware or software) ?

Thanks a lost.
Best Regards.

Pierre Kestener.

^ permalink raw reply

* Re: PPC 44x Watchdog timer
From: Takeharu KATO @ 2005-04-20 11:35 UTC (permalink / raw)
  To: Glenn Burkhardt; +Cc: linuxppc-embedded
In-Reply-To: <20050419013712.AE32FB01E4@loki.aoi-industries.com>

Hi

IIRC, MontaVistaLinux has this feature.
As far as I know, I found it in Monta Vista Linux 3 years ago at least.
I've not checked resent kernel of Monta Vista Linux, so I am sorry if
it is wrong now.

Glenn Burkhardt wrote:
> Is there a patch for the built in watchdog timer in the 440GP available
> anywhere for the 2.4 kernel (viz., ELDK kernels)?
> 
By the way, BOOKE_WDT patch has not been commited to up-stream kernel.
Matt(or Kumar?), please apply the patch.

Regards,

^ permalink raw reply

* Re: PPC 44x Watchdog timer
From: Glenn Burkhardt @ 2005-04-20 12:02 UTC (permalink / raw)
  To: Takeharu KATO; +Cc: linuxppc-embedded
In-Reply-To: <42663E71.60005@ybb.ne.jp>

After looking at the current BitKeeper 2.4 development tree on 
source.mvista.com, it looks like the use of the hardware watchdog timer was 
discontinued at some point in favor of using the general purpose timer.  The 
watchdog exception interrupt isn't used, and it's only configurable for 
PPC405 (although I think that the technique would work for the whole 4xx 
family).

Or am I misreading the code?

It would also be nice if your patch were applied to the 2.6 kernel tree.

On Wednesday 20 April 2005 07:35 am, Takeharu KATO wrote:
> Hi
>
> IIRC, MontaVistaLinux has this feature.
> As far as I know, I found it in Monta Vista Linux 3 years ago at least.
> I've not checked resent kernel of Monta Vista Linux, so I am sorry if
> it is wrong now.
>
> Glenn Burkhardt wrote:
> > Is there a patch for the built in watchdog timer in the 440GP available
> > anywhere for the 2.4 kernel (viz., ELDK kernels)?
>
> By the way, BOOKE_WDT patch has not been commited to up-stream kernel.
> Matt(or Kumar?), please apply the patch.
>
> Regards,

^ permalink raw reply

* Re: writev test failure related to arch/ppc/lib/string.S changes?
From: Phil Estes @ 2005-04-20 13:21 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <16996.54212.518924.846267@cargo.ozlabs.ibm.com>

On Tue, 2005-04-19 at 19:47 +1000, Paul Mackerras wrote:

> Yeah.  This patch should fix it.  Mind testing it and letting us know
> how it goes?
> 
> Paul.
> 

Patch fixes the failure path--works great.  Thanks very much.

- Phil

^ permalink raw reply

* Re: 824x Sandpoint with 2.6.x
From: Sam Song @ 2005-04-20 13:54 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-embedded

"Mark A. Greer" <mgreer@mvista.com> wrote:
> >Kernel command line:
> >console=uart,mmio,0xfdfce500,115200n8
> >console=ttyS0,115200
> >root=/dev/ram rw ramdisk_size=200000
> >ip=192.168.0.3:192.168..2:::sandpoint:et
> >h0:off panic=1
> >
> <snip>
> 
> Get rid of the
> "console=uart,mmio,0xfdfce500,115200n8" part of the
> cmdline and see what happens (keep the
> "console=ttyS0,115200" part).

If so, kernel will hang after loading the kernel......
I cannot see any active info.Is early console output 
message not enough to find out something useful? 

Thanks,

Sam

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^ permalink raw reply

* Re: 824x Sandpoint with 2.6.x
From: Sam Song @ 2005-04-20 13:59 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-embedded

"Mark A. Greer" <mgreer@mvista.com> wrote:
> Get rid of the
> "console=uart,mmio,0xfdfce500,115200n8" part of the
> cmdline and see what happens (keep the
> "console=ttyS0,115200" part).

I suspect there are sth wrong with uart iomem_base.
In my 2.4.24 porting, the following two lines must
be added in sandpoint_setup_arch, or I could get the
same result as 2.6.x.

rs_table[0].port = (ulong) ioremap (rs_table[0].port,
PAGE_SIZE);
rs_table[0].iomem_base = (u8 *) rs_table[0].port;

But the pity is that there are no rs_table used in
2.6.x serial driver.

Thanks again,

Sam

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Do You Yahoo!?
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http://music.yisou.com/
美女明星应有尽有,搜遍美图、艳图和酷图
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1G就是1000兆,雅虎电邮自助扩容!
http://cn.rd.yahoo.com/mail_cn/tag/1g/*http://cn.mail.yahoo.com/event/mail_1g/

^ permalink raw reply


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