* Re: Redwood-6 and 2.6
From: Dale Farnsworth @ 2005-08-17 19:18 UTC (permalink / raw)
To: Otto Solares, linuxppc-embedded
In-Reply-To: <20050817031336.GA20712@xyzzy.farnsworth.org>
On Wed, Aug 17, 2005 at 03:13:36AM +0000, Dale Farnsworth wrote:
> I added smc91111 support for redwood5 and redwood6 many months
> ago. See the reference to CONFIG_REDWOOD_5 in smc91x.h. I haven't
> tested it recently though. I'll give it a try tomorrow.
Just following up. I verified that current linux-2.6.git netboots
fine on redwood5 using the SMC91111.
-Dale
^ permalink raw reply
* [PATCH] Fix for TLB errata on early Xilinx Virtex-II Pro silicon
From: Grant Likely @ 2005-08-17 20:05 UTC (permalink / raw)
To: linuxppc-embedded
Early versions of the Xilinx Virtex-II Pro have a TLB errata where
only even numbered TLB entries work correctly. Occurs on chips where
PVR == 0x20010820 || 0x20010860
See Record #14052, solution #12 in the Xilinx answers database
http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=14052
This patch adds a config option to use only even TLB entries on the V2Pro
It also makes a trivial change to the Kconfig so that Xilinx options depend
on VIRTEX_II_PRO instead of XILINX_ML300
Signed-off-by: Grant Likely <grant.likely@gdcanada.com>
---
arch/ppc/kernel/head_4xx.S | 11 +++++++++++
arch/ppc/platforms/4xx/Kconfig | 28 ++++++++++++++++++++++------
2 files changed, 33 insertions(+), 6 deletions(-)
322a82cd190a777e4ebe728cad2a2a3759039260
diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S
--- a/arch/ppc/kernel/head_4xx.S
+++ b/arch/ppc/kernel/head_4xx.S
@@ -769,7 +769,11 @@ finish_tlb_load:
/* load the next available TLB index.
*/
lwz r9, tlb_4xx_index@l(0)
+#if defined(CONFIG_VIRTEX_II_PRO_TLB_FIX)
+ addi r9, r9, 2
+#else
addi r9, r9, 1
+#endif
andi. r9, r9, (PPC4XX_TLB_SIZE-1)
stw r9, tlb_4xx_index@l(0)
@@ -926,7 +930,14 @@ initial_mmu:
clrrwi r3,r3,10 /* Mask off the effective page number */ ori r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_16M))
+#if defined(CONFIG_VIRTEX_II_PRO_TLB_FIX)
+ /* Odd numbered TLB slots are broken on Xilinx V2Pro processors
+ * where PVR = 20010820 | 20010860
+ */
+ li r0,62 /* TLB slot 62 */
+#else
li r0,63 /* TLB slot 63 */
+#endif
tlbwe r4,r0,TLB_DATA /* Load the data portion of the entry */ tlbwe r3,r0,TLB_TAG /* Load the tag portion of the entry */
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
--- a/arch/ppc/platforms/4xx/Kconfig
+++ b/arch/ppc/platforms/4xx/Kconfig
@@ -161,11 +161,6 @@ config IBM_OCP
depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
default y
-config XILINX_OCP
- bool
- depends on XILINX_ML300
- default y
-
config IBM_EMAC4
bool
depends on 440GX || 440SP
@@ -201,6 +196,27 @@ config VIRTEX_II_PRO
depends on XILINX_ML300
default y
+config VIRTEX_II_PRO_TLB_FIX
+ bool "Virtex-II Pro TLB bugfix"
+ depends on VIRTEX_II_PRO
+ default n
+ help
+ Early versions of the Xilinx Virtex-II Pro have a TLB errata where
+ only even numbered TLB entries work correctly. Say Y here if
+ PVR == 0x20010820 || 0x20010860, or if your board crashes early
+ after enabling the MMU
+
+ See Record #14052, solution #12 in the Xilinx answers database
+ http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=14052
+
+ It is safe to say Y here, but there is a performance impact.
+ Say N if unsure.
+
+config XILINX_OCP
+ bool
+ depends on VIRTEX_II_PRO
+ default y
+
config STB03xxx
bool
depends on REDWOOD_5 || REDWOOD_6
@@ -208,7 +224,7 @@ config STB03xxx
config EMBEDDEDBOOT
bool
- depends on EP405 || XILINX_ML300
+ depends on EP405 || VIRTEX_II_PRO
default y
config IBM_OPENBIOS
^ permalink raw reply
* Cartões UOL
From: cartoes @ 2005-08-17 6:26 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/html, Size: 6217 bytes --]
^ permalink raw reply
* Re: [PATCH] ppc32: ppc_sys SOC identification additions
From: Wolfgang Denk @ 2005-08-17 20:49 UTC (permalink / raw)
To: Vitaly Bordug; +Cc: Kumar Gala, linuxppc-embedded list
In-Reply-To: <430372E9.7040700@ru.mvista.com>
In message <430372E9.7040700@ru.mvista.com> you wrote:
>
> + while (strcmp(ppc_sys_specs[i].ppc_sys_name, "")) {
...
> + while (strcmp(ppc_sys_specs[i].ppc_sys_name, ""))
...
> + while (strcmp(ppc_sys_specs[i].ppc_sys_name, "")) {
What about:
while (ppc_sys_specs[i].ppc_sys_name[0]) ... ???
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
What we anticipate seldom occurs; what we least expect generally
happens. - Bengamin Disraeli
^ permalink raw reply
* Re: When are machine checks suppose to be recoverable?
From: Benjamin Herrenschmidt @ 2005-08-17 21:44 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev list, David Woodhouse
In-Reply-To: <76E28B16-5706-48C8-B92A-349C4F40FA76@freescale.com>
On Wed, 2005-08-17 at 09:00 -0500, Kumar Gala wrote:
> David's 8250 cleanup patch made me wondering when are machine checks
> suppose to recoverable? General class of conditions is what I'm
> looking for here.
>
> Is David's case due to some PCI master abort or something else?
Might be some issue on SMP machines...
Ben.
^ permalink raw reply
* Re: When are machine checks suppose to be recoverable?
From: David Woodhouse @ 2005-08-17 22:30 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev list
In-Reply-To: <1124315089.8857.41.camel@gaston>
On Thu, 2005-08-18 at 07:44 +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2005-08-17 at 09:00 -0500, Kumar Gala wrote:
> > David's 8250 cleanup patch made me wondering when are machine checks
> > suppose to recoverable? General class of conditions is what I'm
> > looking for here.
> >
> > Is David's case due to some PCI master abort or something else?
>
> Might be some issue on SMP machines...
Yeah, that'll probably be the reason it turns out _not_ to be
recoverable despite our expectations. But that wasn't Kumar's question.
--
dwmw2
^ permalink raw reply
* Re: Redwood-6 and 2.6
From: Otto Solares @ 2005-08-18 0:08 UTC (permalink / raw)
To: Dale Farnsworth; +Cc: linuxppc-embedded
In-Reply-To: <20050817191815.GA331@xyzzy.farnsworth.org>
On Wed, Aug 17, 2005 at 12:18:15PM -0700, Dale Farnsworth wrote:
> On Wed, Aug 17, 2005 at 03:13:36AM +0000, Dale Farnsworth wrote:
> > I added smc91111 support for redwood5 and redwood6 many months
> > ago. See the reference to CONFIG_REDWOOD_5 in smc91x.h. I haven't
> > tested it recently though. I'll give it a try tomorrow.
>
> Just following up. I verified that current linux-2.6.git netboots
> fine on redwood5 using the SMC91111.
Excellent for your code! the box I'm talking about is redwood6
based, just a question, the supplied smc91xxx.c for 2.4 needs
byte swapping, that works ok with your code and this unified
smc91x driver?
Thank you.
-otto
^ permalink raw reply
* Re: Redwood-6 and 2.6
From: Otto Solares @ 2005-08-18 0:02 UTC (permalink / raw)
To: Matt Porter; +Cc: linuxppc-embedded
In-Reply-To: <20050816201745.C2246@cox.net>
On Tue, Aug 16, 2005 at 08:17:45PM -0700, Matt Porter wrote:
> What kernel port are you using? You're trying boot a Redwood 6
> kernel on the MediaMVP?
I'm using kernel.org's 2.6.12.4 + your dma patch.
Yes I'm trying to boot this redwood6 kernel on the MediaMVP,
Hauppauge provides source for 2.4.18 which is plain old, my
University project is boot a 2.6 kernel on this little box.
I setup netconsole to see what's going on in the boot but
it doesn't work that's why I think the smc91x driver does not
support PPC or probably it does not support netpoll which is
the base for netconsole, I'll continue figuring out what is
going on.
I really apreciate all your help. Thank you.
-otto
^ permalink raw reply
* Re: When are machine checks suppose to be recoverable?
From: Kumar Gala @ 2005-08-18 3:42 UTC (permalink / raw)
To: David Woodhouse; +Cc: linuxppc-dev list
In-Reply-To: <1124317852.24373.13.camel@localhost.localdomain>
On Aug 17, 2005, at 5:30 PM, David Woodhouse wrote:
> On Thu, 2005-08-18 at 07:44 +1000, Benjamin Herrenschmidt wrote:
>
>> On Wed, 2005-08-17 at 09:00 -0500, Kumar Gala wrote:
>>
>>> David's 8250 cleanup patch made me wondering when are machine checks
>>>
>
>
>>> suppose to recoverable? General class of conditions is what I'm
>>> looking for here.
>>>
>>> Is David's case due to some PCI master abort or something else?
>>>
>>
>> Might be some issue on SMP machines...
>>
>
> Yeah, that'll probably be the reason it turns out _not_ to be
> recoverable despite our expectations. But that wasn't Kumar's
> question.
David's right, that wasn't my question :) I was asking more about
what cases do we actually recover and that is considered correct
behavior.
- kumar
^ permalink raw reply
* Re: [PATCH] cpm_uart: Fix dpram allocation and non-console uarts
From: Nish Aravamudan @ 2005-08-18 5:42 UTC (permalink / raw)
To: Kumar Gala; +Cc: Andrew Morton, linux-kernel, linuxppc-embedded
In-Reply-To: <Pine.LNX.4.61.0508082239180.5117@nylon.am.freescale.net>
On 8/8/05, Kumar Gala <galak@freescale.com> wrote:
> (A believe Marcelo would like to see this in 2.6.13, but I'll let him
> fight over that ;)
>=20
> * Makes dpram allocations work
> * Makes non-console UART work on both 8xx and 82xx
> * Fixed whitespace in files that were touched
>=20
> Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
> Signed-off-by: Pantelis Antoniou <panto@intracom.gr>
> Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
>=20
> ---
> commit 1de80554bcae877dce3b6d878053eb092ef65c72
> tree aba124824607fea1070e86501ddccc9decce362d
> parent ad81111fd554c9d3c14c0a50885e076af2f9ac9b
> author Kumar K. Gala <kumar.gala@freescale.com> Mon, 08 Aug 2005 22:35:39=
-0500
> committer Kumar K. Gala <kumar.gala@freescale.com> Mon, 08 Aug 2005 22:35=
:39 -0500
<snip>
> diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm=
_uart/cpm_uart_core.c
> --- a/drivers/serial/cpm_uart/cpm_uart_core.c
> +++ b/drivers/serial/cpm_uart/cpm_uart_core.c
<snip>
> @@ -376,9 +396,19 @@ static int cpm_uart_startup(struct uart_
> pinfo->sccp->scc_sccm |=3D UART_SCCM_RX;
> }
>=20
> + if (!(pinfo->flags & FLAG_CONSOLE))
> + cpm_line_cr_cmd(line,CPM_CR_INIT_TRX);
> return 0;
> }
>=20
> +inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
> +{
> + unsigned long target_jiffies =3D jiffies + pinfo->wait_closing;
> +
> + while (!time_after(jiffies, target_jiffies))
> + schedule();
> +}
Not sure about that call here. Does the state need to be set so that
you won't be run again immediately? In any case, I think direct
schedule() callers are discouraged? Do you want to call a yield() or
schedule_timeout({0,1}) instead maybe?
> /*
> * Shutdown the uart
> */
> @@ -394,6 +424,12 @@ static void cpm_uart_shutdown(struct uar
>=20
> /* If the port is not the console, disable Rx and Tx. */
> if (!(pinfo->flags & FLAG_CONSOLE)) {
> + /* Wait for all the BDs marked sent */
> + while(!cpm_uart_tx_empty(port))
> + schedule_timeout(2);
<snip>
I think you are using 2 jiffies to guarantee that at least one jiffy
elapses, which is fine. But, if you do not set the state beforehand,
schedule_timeout() returns immediately, so you have a busy-wait here.
Thanks,
Nish
^ permalink raw reply
* linux2.6 crosscompiler setup
From: somshekar chandrashekar kadam @ 2005-08-18 6:50 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: linuxppc-embedded-request
[-- Attachment #1: Type: text/plain, Size: 440 bytes --]
HI ,
need to set the cross compiler for Linux 2.6 PPC from scratch on X86 host , is there any howto or anyother document , i saw only denx eldk supporting it . wanted to build entire cross compiler from scratch , please direct me to any good link if it is there , tried to open the link given on Embedded PowerPC linux howto , that page doesnt exist anymore ,please suggest guys which one is better
Thanks In Advance
Neelu
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^ permalink raw reply
* linux2.6 crosscompiler setup
From: somshekar chandrashekar kadam @ 2005-08-18 6:54 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: linuxppc-embedded-request
[-- Attachment #1: Type: text/plain, Size: 440 bytes --]
HI ,
need to set the cross compiler for Linux 2.6 PPC from scratch on X86 host , is there any howto or anyother document , i saw only denx eldk supporting it . wanted to build entire cross compiler from scratch , please direct me to any good link if it is there , tried to open the link given on Embedded PowerPC linux howto , that page doesnt exist anymore ,please suggest guys which one is better
Thanks In Advance
Neelu
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^ permalink raw reply
* linuxppc cross compiler
From: somshekar chandrashekar kadam @ 2005-08-18 6:55 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linuxppc-dev-request
[-- Attachment #1: Type: text/plain, Size: 439 bytes --]
HI ,
need to set the cross compiler for Linux 2.6 PPC from scratch on X86 host , is there any howto or anyother document , i saw only denx eldk supporting it . wanted to build entire cross compiler from scratch , please direct me to any good link if it is there , tried to open the link given on Embedded PowerPC linux howto , that page doesnt exist anymore ,please suggest guys which one is better
Thanks In Advance
Neelu
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^ permalink raw reply
* Re: linux2.6 crosscompiler setup
From: Gerhard Jaeger @ 2005-08-18 7:14 UTC (permalink / raw)
To: linuxppc-embedded, somshekar chandrashekar kadam
Cc: linuxppc-embedded-request
In-Reply-To: <20050818065436.23051.qmail@webmail50.rediffmail.com>
On Thursday 18 August 2005 08:54, somshekar chandrashekar kadam wrote:
> =A0HI ,
hey, there's no need to ask twice if you did not get an answer within 4 min=
utes!
> need to set the cross compiler for Linux 2.6 PPC from scratch on X86 host=
, is there any howto or anyother document ,=20
> i saw only denx eldk supporting it .=20
guess you didn't search carefully enough ;)
> wanted to build entire cross compiler from scratch , please direct me to =
any good link if it is there ,=20
> tried to open the link given on Embedded PowerPC linux howto , that page =
doesnt exist anymore ,please suggest guys which one is better =20
he, what about google?
http://www.google.de/search?hl=3Dde&ie=3DISO-8859-1&q=3Dcross%2Bcompiler%2B=
scratch%2Blinux%2Bppc&btnG=3DGoogle-Suche&meta=3D
Anyway, try: http://www.kegel.com/crosstool/
Ciao,
Gerhard
=2D-=20
Gerhard Jaeger <gjaeger@sysgo.com> =20
SYSGO AG Embedded and Real-Time Software
www.sysgo.com | www.elinos.com | www.pikeos.com | www.osek.de=20
^ permalink raw reply
* Re: [gmail] linuxppc cross compiler
From: Marc Leeman @ 2005-08-18 7:54 UTC (permalink / raw)
To: somshekar chandrashekar kadam; +Cc: linuxppc-dev
In-Reply-To: <20050818065554.28998.qmail@webmail30.rediffmail.com>
[-- Attachment #1: Type: text/plain, Size: 443 bytes --]
> given on Embedded PowerPC linux howto , that page doesnt exist anymore
> ,please suggest guys which one is better
http://twiki.emdebian.org
http://people.debian.org/~debacle/cross/
http://www.emdebian.org/twiki/bin/view
for embedded, have a look at the buildroot, uclibc and busybox project
pages
--
greetz, marc
Always a party.
Crichton - A Bug's Life
scorpius 2.6.12 #1 Thu Jun 23 21:32:03 CEST 2005 GNU/Linux
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^ permalink raw reply
* segmentaion fault with array[4096]
From: Studencki Pawel @ 2005-08-18 9:45 UTC (permalink / raw)
To: 'linuxppc-embedded@ozlabs.org'
hello,
because I want to do some tests with fusion/RTAI on my mpc852,
I had to downgrade my system to kernel 2.6.10
And I get a strange problem: if I start application with char array size
4096 (or even smaller 2600) I get "segmentation fault".
Could someone gives me a hint? Is this kernel configuration problem?
Where can I start looking for a reason?
thanks
Pawel
^ permalink raw reply
* Re: [PATCH] Fix for TLB errata on early Xilinx Virtex-II Pro silicon
From: Andrei Konovalov @ 2005-08-18 10:16 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-embedded
In-Reply-To: <20050817200547.GA21017@siegfried.thelikelysolution.ca>
Grant Likely wrote:
> Early versions of the Xilinx Virtex-II Pro have a TLB errata where
> only even numbered TLB entries work correctly. Occurs on chips where
> PVR == 0x20010820 || 0x20010860
>
> See Record #14052, solution #12 in the Xilinx answers database
> http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=14052
>
> This patch adds a config option to use only even TLB entries on the V2Pro
> It also makes a trivial change to the Kconfig so that Xilinx options depend
> on VIRTEX_II_PRO instead of XILINX_ML300
>
> Signed-off-by: Grant Likely <grant.likely@gdcanada.com>
> ---
>
> arch/ppc/kernel/head_4xx.S | 11 +++++++++++
> arch/ppc/platforms/4xx/Kconfig | 28 ++++++++++++++++++++++------
> 2 files changed, 33 insertions(+), 6 deletions(-)
>
> 322a82cd190a777e4ebe728cad2a2a3759039260
> diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S
> --- a/arch/ppc/kernel/head_4xx.S
> +++ b/arch/ppc/kernel/head_4xx.S
> @@ -769,7 +769,11 @@ finish_tlb_load:
> /* load the next available TLB index.
> */
> lwz r9, tlb_4xx_index@l(0)
> +#if defined(CONFIG_VIRTEX_II_PRO_TLB_FIX)
> + addi r9, r9, 2
> +#else
> addi r9, r9, 1
> +#endif
> andi. r9, r9, (PPC4XX_TLB_SIZE-1)
> stw r9, tlb_4xx_index@l(0)
I would also fix the comment in this file
(it has nothing to do with the TLB fix but...):
@@ -915,10 +919,10 @@ initial_mmu:
mtspr SPRN_PID,r0
sync
- /* Configure and load two entries into TLB slots 62 and 63.
- * In case we are pinning TLBs, these are reserved in by the
+ /* Configure and load an entry into TLB slot 63.
+ * In case we are pinning TLBs, it is reserved in by the
* other TLB functions. If not reserving, then it doesn't
- * matter where they are loaded.
+ * matter where it is loaded.
*/
clrrwi r4,r4,10 /* Mask off the real page number */
ori r4,r4,(TLB_WR | TLB_EX) /* Set the write and execute bits */
> @@ -926,7 +930,14 @@ initial_mmu:
> clrrwi r3,r3,10 /* Mask off the effective page number */ ori r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_16M))
>
> +#if defined(CONFIG_VIRTEX_II_PRO_TLB_FIX)
> + /* Odd numbered TLB slots are broken on Xilinx V2Pro processors
> + * where PVR = 20010820 | 20010860
> + */
> + li r0,62 /* TLB slot 62 */
> +#else
> li r0,63 /* TLB slot 63 */
> +#endif
>
> tlbwe r4,r0,TLB_DATA /* Load the data portion of the entry */ tlbwe r3,r0,TLB_TAG /* Load the tag portion of the entry */
> diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
> --- a/arch/ppc/platforms/4xx/Kconfig
> +++ b/arch/ppc/platforms/4xx/Kconfig
> @@ -161,11 +161,6 @@ config IBM_OCP
> depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
> default y
>
> -config XILINX_OCP
> - bool
> - depends on XILINX_ML300
> - default y
> -
> config IBM_EMAC4
> bool
> depends on 440GX || 440SP
> @@ -201,6 +196,27 @@ config VIRTEX_II_PRO
> depends on XILINX_ML300
> default y
>
> +config VIRTEX_II_PRO_TLB_FIX
> + bool "Virtex-II Pro TLB bugfix"
> + depends on VIRTEX_II_PRO
> + default n
> + help
> + Early versions of the Xilinx Virtex-II Pro have a TLB errata where
> + only even numbered TLB entries work correctly. Say Y here if
> + PVR == 0x20010820 || 0x20010860, or if your board crashes early
> + after enabling the MMU
> +
> + See Record #14052, solution #12 in the Xilinx answers database
> + http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=14052
> +
> + It is safe to say Y here, but there is a performance impact.
> + Say N if unsure.
> +
> +config XILINX_OCP
> + bool
> + depends on VIRTEX_II_PRO
> + default y
> +
> config STB03xxx
> bool
> depends on REDWOOD_5 || REDWOOD_6
> @@ -208,7 +224,7 @@ config STB03xxx
>
> config EMBEDDEDBOOT
> bool
> - depends on EP405 || XILINX_ML300
> + depends on EP405 || VIRTEX_II_PRO
> default y
>
> config IBM_OPENBIOS
I would drop the last chunk.
I agree that VIRTEX_II_PRO_TLB_FIX and XILINX_OCP should depend on the
chip (VIRTEX_II_PRO), but using EMBEDDEDBOOT or, say, U-Boot is at least
board specific. Well, even the same board can use different bootloaders,
but tying together EMBEDDEDBOOT and VIRTEX_II_PRO is even worse IMO.
Otherwise the patch looks OK.
These changes to head_4xx.S were tested OK on ML300:
in both cases (odd numbered TLB slots used or not) there were no problems.
(For some unknown reason my ML300 doesn't need this workaround though
'cat /proc/cpuinfo' gets "revision : 8.32 (pvr 2001 0820)")
Thanks,
Andrei
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
^ permalink raw reply
* Regarding Keyboard events mapping in different consoles
From: Vijesh VH @ 2005-08-18 11:07 UTC (permalink / raw)
To: rmk, greg, linuxppc-embedded, Linus.Torvalds
[-- Attachment #1: Type: text/plain, Size: 821 bytes --]
Hi,
I am currently working on Powerpc405 Processor. Here I have two interfaces
like serial Interface and IR Interface.
When I boot the kernel using the Serial console what ever i type from the
keyboard(on a PC) using minicom the serial data transfer takes place in
kernel , the kernel decodes the key events of serial console( serial
interface).
Now, I have built the IR Driver which access the handle_scancode function in
the kernel (keyboard.c) by passing the required scan codes and status of the
keys.
The problem here is What ever i type using IR Keyboard appears on my VC
(virtual console or Frame buffer Device) . How do I make IR key
events(handle_scancode) to be handled by the Serial console's keyboard part.
Please do guide me how to proceed.
--
Thanks and Regards,
Vijesh V H
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^ permalink raw reply
* How to implementing CLI using bison and FLEX
From: Sanjeevi Gopal @ 2005-08-18 11:46 UTC (permalink / raw)
To: Linuxppc-embedded
HI,
I am currenly working on mpc850 processor.I wanted to
implement a Command Line interface. I like implement it using bison
and flex tool. If anyone is familar or already implemented plz help me
--=20
With Regards,
Sanjeevi G
^ permalink raw reply
* Re: [PATCH] Fix for TLB errata on early Xilinx Virtex-II Pro silicon
From: Peter Ryser @ 2005-08-18 14:34 UTC (permalink / raw)
To: Andrei Konovalov; +Cc: linuxppc-embedded
In-Reply-To: <43046011.60504@ru.mvista.com>
None of the ML300 will need this workaround as the core voltage is
slightly higher than recommended in the data sheet of Virtex-II Pro. An
increased core voltage is one way to fix the TLB problem in early parts
but it is not the right way as it can have a negative impact on other
V2P features.
Since the ML300 configuration is used as the base for other boards the
patch is still useful. However, all Virtex-II Pro FPGAs that are
shipping today are based on newer core versions and do not show the TLB
problem.
- Peter
Andrei Konovalov wrote:
> Grant Likely wrote:
>
>> Early versions of the Xilinx Virtex-II Pro have a TLB errata where
>> only even numbered TLB entries work correctly. Occurs on chips where
>> PVR == 0x20010820 || 0x20010860
>>
>> See Record #14052, solution #12 in the Xilinx answers database
>> http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=14052
>>
>> This patch adds a config option to use only even TLB entries on the
>> V2Pro
>> It also makes a trivial change to the Kconfig so that Xilinx options
>> depend
>> on VIRTEX_II_PRO instead of XILINX_ML300
>>
>> Signed-off-by: Grant Likely <grant.likely@gdcanada.com>
>> ---
>>
>> arch/ppc/kernel/head_4xx.S | 11 +++++++++++
>> arch/ppc/platforms/4xx/Kconfig | 28 ++++++++++++++++++++++------
>> 2 files changed, 33 insertions(+), 6 deletions(-)
>>
>> 322a82cd190a777e4ebe728cad2a2a3759039260
>> diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S
>> --- a/arch/ppc/kernel/head_4xx.S
>> +++ b/arch/ppc/kernel/head_4xx.S
>> @@ -769,7 +769,11 @@ finish_tlb_load:
>> /* load the next available TLB index.
>> */
>> lwz r9, tlb_4xx_index@l(0)
>> +#if defined(CONFIG_VIRTEX_II_PRO_TLB_FIX)
>> + addi r9, r9, 2
>> +#else
>> addi r9, r9, 1
>> +#endif
>> andi. r9, r9, (PPC4XX_TLB_SIZE-1)
>> stw r9, tlb_4xx_index@l(0)
>
>
> I would also fix the comment in this file
> (it has nothing to do with the TLB fix but...):
>
> @@ -915,10 +919,10 @@ initial_mmu:
> mtspr SPRN_PID,r0
> sync
>
> - /* Configure and load two entries into TLB slots 62 and 63.
> - * In case we are pinning TLBs, these are reserved in by the
> + /* Configure and load an entry into TLB slot 63.
> + * In case we are pinning TLBs, it is reserved in by the
> * other TLB functions. If not reserving, then it doesn't
> - * matter where they are loaded.
> + * matter where it is loaded.
> */
> clrrwi r4,r4,10 /* Mask off the real page number */
> ori r4,r4,(TLB_WR | TLB_EX) /* Set the write and execute
> bits */
>
>> @@ -926,7 +930,14 @@ initial_mmu:
>> clrrwi r3,r3,10 /* Mask off the effective
>> page number */ ori r3,r3,(TLB_VALID | TLB_PAGESZ(PAGESZ_16M))
>>
>> +#if defined(CONFIG_VIRTEX_II_PRO_TLB_FIX)
>> + /* Odd numbered TLB slots are broken on Xilinx V2Pro processors
>> + * where PVR = 20010820 | 20010860
>> + */
>> + li r0,62 /* TLB slot 62 */
>> +#else
>> li r0,63 /* TLB slot 63 */
>> +#endif
>>
>> tlbwe r4,r0,TLB_DATA /* Load the data portion of
>> the entry */ tlbwe r3,r0,TLB_TAG /* Load the tag
>> portion of the entry */
>> diff --git a/arch/ppc/platforms/4xx/Kconfig
>> b/arch/ppc/platforms/4xx/Kconfig
>> --- a/arch/ppc/platforms/4xx/Kconfig
>> +++ b/arch/ppc/platforms/4xx/Kconfig
>> @@ -161,11 +161,6 @@ config IBM_OCP
>> depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY ||
>> EP405 || LUAN || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
>> default y
>>
>> -config XILINX_OCP
>> - bool
>> - depends on XILINX_ML300
>> - default y
>> -
>> config IBM_EMAC4
>> bool
>> depends on 440GX || 440SP
>> @@ -201,6 +196,27 @@ config VIRTEX_II_PRO
>> depends on XILINX_ML300
>> default y
>>
>> +config VIRTEX_II_PRO_TLB_FIX
>> + bool "Virtex-II Pro TLB bugfix"
>> + depends on VIRTEX_II_PRO
>> + default n
>> + help
>> + Early versions of the Xilinx Virtex-II Pro have a TLB
>> errata where
>> + only even numbered TLB entries work correctly. Say Y here if
>> + PVR == 0x20010820 || 0x20010860, or if your board crashes
>> early
>> + after enabling the MMU
>> +
>> + See Record #14052, solution #12 in the Xilinx answers database
>> +
>> http://www.xilinx.com/xlnx/xil_ans_display.jsp?getPagePath=14052
>> +
>> + It is safe to say Y here, but there is a performance impact.
>> + Say N if unsure.
>> +
>> +config XILINX_OCP
>> + bool
>> + depends on VIRTEX_II_PRO
>> + default y
>> +
>> config STB03xxx
>> bool
>> depends on REDWOOD_5 || REDWOOD_6
>> @@ -208,7 +224,7 @@ config STB03xxx
>>
>> config EMBEDDEDBOOT
>> bool
>> - depends on EP405 || XILINX_ML300
>> + depends on EP405 || VIRTEX_II_PRO
>> default y
>>
>> config IBM_OPENBIOS
>
>
> I would drop the last chunk.
> I agree that VIRTEX_II_PRO_TLB_FIX and XILINX_OCP should depend on the
> chip (VIRTEX_II_PRO), but using EMBEDDEDBOOT or, say, U-Boot is at least
> board specific. Well, even the same board can use different bootloaders,
> but tying together EMBEDDEDBOOT and VIRTEX_II_PRO is even worse IMO.
>
> Otherwise the patch looks OK.
>
> These changes to head_4xx.S were tested OK on ML300:
> in both cases (odd numbered TLB slots used or not) there were no
> problems.
> (For some unknown reason my ML300 doesn't need this workaround though
> 'cat /proc/cpuinfo' gets "revision : 8.32 (pvr 2001 0820)")
>
> Thanks,
> Andrei
>
>> _______________________________________________
>> Linuxppc-embedded mailing list
>> Linuxppc-embedded@ozlabs.org
>> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
^ permalink raw reply
* Re: Best kernel for Xilinx VirtexII Pro/PPC405 ?
From: Peter Ryser @ 2005-08-18 14:39 UTC (permalink / raw)
To: Keith J Outwater; +Cc: linuxppc-embedded
In-Reply-To: <OF420A7A65.554F5D8B-ON0725705F.00572C9A-0725705F.00575400@mck.us.ray.com>
> I am running all of my development tools (EDK, ISE, ELDK, etc...) under
>Fedora Core 4, so I am looking for a publicly accessible kernel source
>tree that best supports the PPC405 in the Virtex II Pro.
>
Keep in mind that EDK and ISE are not "officially" supported on FC4.
Anyway, with EDK, ISE, and ELDK you seem to have all that is needed to
get started with Linux on Virtex-II Pro and Virtex-4.
- Peter
^ permalink raw reply
* Re: How to implementing CLI using bison and FLEX
From: Arthur Othieno @ 2005-08-18 14:58 UTC (permalink / raw)
To: Sanjeevi Gopal; +Cc: Linuxppc-embedded
In-Reply-To: <37c1be9b050818044671528ae9@mail.gmail.com>
On Thu, Aug 18, 2005 at 05:16:19PM +0530, Sanjeevi Gopal wrote:
> HI,
>
>
> I am currenly working on mpc850 processor.I wanted to
> implement a Command Line interface. I like implement it using bison
> and flex tool. If anyone is familar or already implemented plz help me
See the Lex and YACC HOWTO[1] on tldp.org for a gentle introduction,
and the flex[2] and bison[3] manuals on gnu.org for the gory details:
[1] http://tldp.org/HOWTO/Lex-YACC-HOWTO.html
[2] http://www.gnu.org/software/flex/manual/
[3] http://www.gnu.org/software/bison/manual/
^ permalink raw reply
* Re: linuxppc cross compiler
From: Hollis Blanchard @ 2005-08-18 14:49 UTC (permalink / raw)
To: somshekar chandrashekar kadam; +Cc: Linux PPC Dev
In-Reply-To: <20050818065554.28998.qmail@webmail30.rediffmail.com>
On Aug 18, 2005, at 1:55 AM, somshekar chandrashekar kadam wrote:
>
> need to set the cross compiler for Linux 2.6 PPC from scratch on X86=20=
> host=A0 , is there any howto or anyother document , i saw only denx =
eldk=20
> supporting it . wanted to build entire cross compiler from scratch ,=20=
> please direct me to any good link if it is there , tried to open the=20=
> link given on Embedded PowerPC linux howto , that page doesnt exist=20
> anymore ,please suggest guys which one is better=A0
http://penguinppc.org/dev/crosstool.php has information on using=20
crosstool, which does it all for you.
Sorry about the broken link in the HOWTO.
-Hollis=
^ permalink raw reply
* Re: [PATCH] Fix for TLB errata on early Xilinx Virtex-II Pro silicon
From: Matt Porter @ 2005-08-18 15:03 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <20050817200547.GA21017@siegfried.thelikelysolution.ca>
On Wed, Aug 17, 2005 at 02:05:47PM -0600, Grant Likely wrote:
> config EMBEDDEDBOOT
> bool
> - depends on EP405 || XILINX_ML300
> + depends on EP405 || VIRTEX_II_PRO
> default y
>
Grant,
Can you post another patch without this hunk?..as Andrei pointed
out, it's a board specific feature.
Otherwise, looks good to go upstream.
-Matt
^ permalink raw reply
* Re: Multiple I2C busses on PPC405
From: Tolunay Orkun @ 2005-08-18 15:06 UTC (permalink / raw)
To: Tolunay Orkun; +Cc: linuxppc-embedded
In-Reply-To: <42FD248D.2040508@orkun.us>
I've not received any reply to my inquiry. Since it was last Friday
afternoon it might have been missed.
I really do appreciate if someone would suggest a bitbang I2C interface
driver generic enough to modify. I only need /dev/i2c? support from the
driver.
Tolunay
Tolunay Orkun wrote:
> I have a working embedded linux on Cogent CSB472 board (PPC405GP)
> currently based on off 2.4.31. We are already using the I2C bus on
> PowerPC using hardware I2C driver (IBM IIC I2C Interface) at Fast
> (400khz) mode.
>
> We need to add support for yet another (slow) I2C bus with PPC405 being
> the master and I'm looking at implementing bit bang interface using GPIO
> pins.
>
> What is the best way to get this going? I am looking at modifying the
> bit bang driver (PPC_405_I2C_Algorithm?) for the I/O pins I'll use.
> Anyone has done something similar. I appreciate all the advice I can get.
>
> Best Regards,
> Tolunay
>
>
>
^ permalink raw reply
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