* Re: Porting Linux2.6.13 on MPC860T custom build board
From: venkatajagadeesh p @ 2005-12-29 10:07 UTC (permalink / raw)
To: Sinan Akman, linuxppc-embedded
In-Reply-To: <43B3958E.4010002@writeme.com>
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Hi Sinan Akman
Thanks for Your suggestion, Now linux is up and booting. thanks for the community who contributed in this porting.
Thanks and one and all,
Venkata jagadish.p
---------------------------------
Yahoo! Photos
Ring in the New Year with Photo Calendars. Add photos, events, holidays, whatever.
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^ permalink raw reply
* Re: Which CAN driver to port to for PPC
From: Wolfgang Grandegger @ 2005-12-29 11:53 UTC (permalink / raw)
To: David Jander; +Cc: linuxppc-embedded
In-Reply-To: <200512281302.46210.david.jander@protonic.nl>
David Jander wrote:
> Hi again,
>
> On Wednesday 28 December 2005 11:44, Wolfgang Grandegger wrote:
>
>>AFAIK, there is no _generic_ embedded CAN driver available which even
>>supports real-time extensions.
>
>
> Yes, lincan does. Well, it supports RTlinux and OCERA's RTlinux (GPL)
> modifications, which somehow reinvent ADEOS (or is it the other way around?),
> but since RTlinux is an option only for i386, and anyway almost dead right
> now, you could say it doesn't support real-time extensions.
Well, ADEOS uses a different method of handling interrupts and
exceptions to avoid the infamous RTLinux patent. Better let's say: it
doesn't support really "free" real-time extensions.
> The problem of saying "Peak-CAN for SJA1000" and "OCAN for intel" is that you
> can basically forget about writing portable code because they are both very
> different.
I agree.
> Maybe you should have a look at Pavel Pisa's lincan. After trying it out you
> might end up as confused as I am, because it doesn't look that bad at all,
> it's almost platform independent, supports all kernels (2.2 to latest 2.6),
> and supports a great amount of cards with intel and/or philips chips (yes,
> both of them on one card is also an option). The driver is designed with
> performance and throughput in mind, but I am not so sure about the API which
> is still a little too simple (maybe that's actually good) and doesn't support
> properly checking chip- or bus-status yet. Also honorable is their effort of
> staying compatible with at least one other player: can4linux.
In the meantime I had a closer look and it looks like the most advanced
in terms of portability, indeed. My experience is, that the chip- or
bus-status, apart from the bus-off state, is very hardware specific and
it's difficult to provide a generic API. Still need to dig more in
lincan to make a reasonable judgment, though.
> Greetings, and thanks for the comments,
>
> Btw, how's ELDK-4 coming along?
Please ask Wolfgang Denk directly.
Wolfgang.
^ permalink raw reply
* Re: Which CAN driver to port to for PPC
From: Wolfgang Grandegger @ 2005-12-29 12:17 UTC (permalink / raw)
To: Alessandro Rubini
Cc: david.jander, r.schwebel, socket-can, Jan Kiszka,
linuxppc-embedded
In-Reply-To: <20051228150742.GA18401@mail.gnudd.com>
Alessandro Rubini wrote:
>>Robert Schwebel et al have worked socket based CAN (i.e. implement CAN
>>as _net_ dev, not as char)
>
>
> That's great. I've always been convinced it is the right way to go.
> I remember I've said so to a friend in March 2002. Unfortunately,
> I had no time to do it the right way, due to short deadlines and
> tight budget. I'm happy Robert did it.
FYI, there is also a RTDM/Xenomai based version of the SJA1000
socket-based CAN driver at
http://www.rts.uni-hannover.de/mitarbeiter/kiszka/rtaddon/
As RTDM/Xenomai is avaiable for PowerPC as well, it might be an option.
Wolfgang.
> /alessandro
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
^ permalink raw reply
* Re : MPC8347 USB problem : Copying big file[>150MB] discontinuous via Samba
From: Sam Song @ 2005-12-29 12:54 UTC (permalink / raw)
To: linuxppc-embedded list
In-Reply-To: <20051229043720.15530.qmail@web15809.mail.cnb.yahoo.com>
Sam Song <samlinuxppc@yahoo.com.cn> wrote:
> Hi all,
>
> We met a USB performance problem on a custom
> 8347board with 2.4.31. When copying small
> files no more than 100MB in size, it worked
> smoothly with NEC or VIA PCI card. But
> copying a big file like more than 150MB
> in size would decrease the copying
> speed a lot. Serial console even couldn't
> response 'ls' command. The target has a
> 128MB DDR RAM.
Ummm, actually, 256MB DDR RAM.
> While the same driver with 2.4.31 worked fine
> on a 8248 custom board. What could the
> problem be?
Arhhhh, it was due to USB 1.1 limitation
itself(8347 USB 2.0 driver wasn't added
yet when I posted it). Only on the
workable 8248 target with USB 1.1 driver,
it would have such a phenomena. There was
even a network error displayed. If working
with USB 2.0, no any problem. New to me:-)
But Well, I don't have the guts
to say this is a kernel's bug:-)
> Sorry to distrub you during Christmas Time.
OK, stay on relax, pls.
Best regards,
Sam
__________________________________________________
赶快注册雅虎超大容量免费邮箱?
http://cn.mail.yahoo.com
^ permalink raw reply
* Re: Which CAN driver to port to for PPC
From: Robert Schwebel @ 2005-12-29 13:43 UTC (permalink / raw)
To: Andrey Volkov
Cc: David Jander, urs.thuermann, socket-can, oliver.hartkopp,
linuxppc-embedded
In-Reply-To: <43B2A902.3090008@varma-el.com>
Hi,
On Wed, Dec 28, 2005 at 06:02:26PM +0300, Andrey Volkov wrote:
> Robert Schwebel et al have worked socket based CAN (i.e. implement CAN
> as _net_ dev, not as char), as consequence you will not have problem
> with major/minor numbers, duplicated code in drivers for different
> chips, could share CAN dev between diff processes _without_ misc.
> third party shared libraies, stacked CAN protocols (CANopen/NMEA2000
> could be abstract kernel module)... But currently it is not open for
> everyone (due to beta status, AFAIK)
>
> Alessandro, please check Pengutronix work first, may be it will be
> helpfull to you to
>
> [...]
>
> P.S. Robert, when I check last time, it was mature enogh, so may be time
> to open mail-list and svn?
The socket-can stuff is mature enouth to have been used in some projects
at Pengutronix.
In december, we have made a synchronisation meeting with the VW people
who made the initial port for 2.4; they are more focussed on having
higher level transport protocols ontop of the "raw" socket interface we
currently use. During that process we have reviewed the user interface
with regard to their use cases, so it will have to be changed a little
bit before we have something which is in a state to be posted on lkml.
Unfortunately we have no commercial project behind the infrastructure
work, so it's priority is lower than it should be to really drive things
forward (paying customers have a higher priority than community work).
Robert
--
Dipl.-Ing. Robert Schwebel | http://www.pengutronix.de
Pengutronix - Linux Solutions for Science and Industry
Handelsregister: Amtsgericht Hildesheim, HRA 2686
Hannoversche Str. 2, 31134 Hildesheim, Germany
Phone: +49-5121-206917-0 | Fax: +49-5121-206917-9
^ permalink raw reply
* Re: [Socket-can] Re: Which CAN driver to port to for PPC
From: Jan Kiszka @ 2005-12-29 15:12 UTC (permalink / raw)
To: The Linux Socket CAN Framework
Cc: David Jander, urs.thuermann, oliver.hartkopp, linuxppc-embedded
In-Reply-To: <20051229134355.GH19375@pengutronix.de>
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Robert Schwebel wrote:
> ...
> In december, we have made a synchronisation meeting with the VW people
> who made the initial port for 2.4; they are more focussed on having
> higher level transport protocols ontop of the "raw" socket interface we
> currently use. During that process we have reviewed the user interface
> with regard to their use cases, so it will have to be changed a little
> bit before we have something which is in a state to be posted on lkml.
>
Beyond the outstanding comparably minor API adjustments, we furthermore
discussed first ideas how to define the lowest interface, i.e. the CAN
network device layer. That should be done in a way which makes porting
CAN low-level drivers between the standard kernel and a real-time Linux
CAN stack trivial. That's a unique chance (compared to the situation of
RTnet e.g.), so we should take it.
This real-time stack is to be derived from the RT-SJA1000 driver
Wolfgang pointed at. It is already based on an abstraction layer (RTDM)
that makes it portable across many of the various RT-Linux variant. So
far this includes support for Xenomai and RTAI, RTLinux/GPL is planning
to adopt RTDM as well. This means we could end up with portable CAN
applications and drivers, RT and non-RT!
As Robert said, it "just" requires some resources for implementing
this... ;)
Jan
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^ permalink raw reply
* Re: Porting Linux2.6.13 on MPC860T custom build board
From: Sinan Akman @ 2005-12-29 15:24 UTC (permalink / raw)
To: venkatajagadeesh p; +Cc: linuxppc-embedded
In-Reply-To: <20051229100724.60504.qmail@web50409.mail.yahoo.com>
venkatajagadeesh p wrote:
> Hi Sinan Akman
>
> Thanks for Your suggestion, Now linux is up and
> booting. thanks for the community who contributed in this porting.
I am glad it worked. I guess my reply to you didn't go through to
linuxppc-embedded.
You might want to post the sequence of things you tried, what worked and
what didn't. This
way someone else can find it through search, assuming it wasn't in the
FAQ already.
Regards
Sinan Akman
>
> Thanks and one and all,
> Venkata jagadish.p
>
> ------------------------------------------------------------------------
> Yahoo! Photos
> Ring in the New Year with Photo Calendars
> <http://us.rd.yahoo.com/mail_us/taglines/photos/*http://pg.photos.yahoo.com/ph//page?.file=calendar_splash.html&.dir=>.
> Add photos, events, holidays, whatever.
^ permalink raw reply
* PowerstackII Utah - PCI IRQ for IDE
From: Sebastian Heutling @ 2005-12-29 16:17 UTC (permalink / raw)
To: linuxppc-dev
Hello,
I wonder what happened to the PCI IRQ map for the PowerstackII Utah -
specifically the IDE IRQ. On http://patchwork.ozlabs.org/linuxppc/ I see
a patch from Sven Luther with a set IDE IRQ line
(http://patchwork.ozlabs.org/linuxppc//patch?id=1082) but on current
kernels it doesn't appear. Even on debian the only kernel that had a
working kernel with IDE for this machine was 2.6.8 but any following
kernel (up to the current 2.6.14) doesn't include any patch for IDE IRQ.
Sebastian
^ permalink raw reply
* Re: Which CAN driver to port to for PPC
From: David Jander @ 2005-12-29 16:28 UTC (permalink / raw)
To: linuxppc-embedded; +Cc: Jan Kiszka, r.schwebel, socket-can
In-Reply-To: <43B3D3F2.6060708@grandegger.com>
On Thursday 29 December 2005 13:17, Wolfgang Grandegger wrote:
> > That's great. I've always been convinced it is the right way to go.
> > I remember I've said so to a friend in March 2002. Unfortunately,
> > I had no time to do it the right way, due to short deadlines and
> > tight budget. I'm happy Robert did it.
>
> FYI, there is also a RTDM/Xenomai based version of the SJA1000
> socket-based CAN driver at
> http://www.rts.uni-hannover.de/mitarbeiter/kiszka/rtaddon/
> As RTDM/Xenomai is avaiable for PowerPC as well, it might be an option.
This is great!
I have been trying out xenomai with 2.6.14 on our MPC8xx hardware, and it
looks impressive. Still wonder why xenomai hasn't gotten the publicity it
deserves.
Somehow I had overlooked the example RTDM CAN driver, though.
I also see Robert Schwebel as a member of OSADL, so I am eagerly waiting for a
news-update on that site also (www.osadl.org).
This could indeed get very interesting, I can't wait to see how Roberts
implementation looks like.
Thanks to all for the discussion and work on this matter,
--
David Jander
Protonic Holland.
^ permalink raw reply
* Re: [PATCH 1/2] ppc32: Make platform devices being able to assign functions (resend)
From: Marcelo Tosatti @ 2005-12-29 19:40 UTC (permalink / raw)
To: Vitaly Bordug; +Cc: linuxppc-embedded list
In-Reply-To: <43B2EFD0.4010709@ru.mvista.com>
Hi Vitaly,
On Wed, Dec 28, 2005 at 11:04:32PM +0300, Vitaly Bordug wrote:
>
> Implemented by modification of the .name field of the platform device,
> when PDs with the
> same names are to be used within different drivers, as
> <device_name> -> <device_name>:<function>
> Corresponding drivers should change the .name in struct device_driver to
> reflect upper of course.
I'm not certain that the <device_name>:<function> structure for sysfs
representation is "allowed" - have you asked GregKH about it?
> Also helper platform_notify_map function added, making assignment of
> board-specific platform_info more consistent and generic.
>
> Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
> ---
>
> arch/ppc/syslib/ppc_sys.c | 165
> ++++++++++++++++++++++++++++++++++++++++++++-
> include/asm-ppc/mpc10x.h | 1
> include/asm-ppc/mpc52xx.h | 1
> include/asm-ppc/mpc8260.h | 1
> include/asm-ppc/mpc83xx.h | 1
> include/asm-ppc/mpc85xx.h | 1
> include/asm-ppc/mpc8xx.h | 1
> include/asm-ppc/ppc_sys.h | 26 +++++++
> 8 files changed, 194 insertions(+), 3 deletions(-)
>
> diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
> index c0b93c4..e3856e7 100644
> --- a/arch/ppc/syslib/ppc_sys.c
> +++ b/arch/ppc/syslib/ppc_sys.c
> @@ -15,11 +15,22 @@
> */
>
> #include <linux/string.h>
> +#include <linux/bootmem.h>
> #include <asm/ppc_sys.h>
>
> int (*ppc_sys_device_fixup) (struct platform_device * pdev);
>
> static int ppc_sys_inited;
> +static int ppc_sys_func_inited;
> +
> +static const char *ppc_sys_func_names[] = {
> + [PPC_SYS_FUNC_DUMMY] = "dummy",
> + [PPC_SYS_FUNC_ETH] = "eth",
> + [PPC_SYS_FUNC_UART] = "uart",
> + [PPC_SYS_FUNC_HLDC] = "hldc",
> + [PPC_SYS_FUNC_USB] = "usb",
> + [PPC_SYS_FUNC_IRDA] = "irda",
> +};
>
> void __init identify_ppc_sys_by_id(u32 id)
> {
> @@ -38,13 +49,13 @@ void __init identify_ppc_sys_by_id(u32 i
> void __init identify_ppc_sys_by_name(char *name)
> {
> unsigned int i = 0;
> - while (ppc_sys_specs[i].ppc_sys_name[0])
> - {
> + while (ppc_sys_specs[i].ppc_sys_name[0]) {
> if (!strcmp(ppc_sys_specs[i].ppc_sys_name, name))
> break;
> i++;
> }
> cur_ppc_sys_spec = &ppc_sys_specs[i];
> +
> return;
> }
>
> @@ -128,6 +139,153 @@ void ppc_sys_device_remove(enum ppc_sys_
> }
> }
>
> +/* Platform-notify mapping
> + * Helper function for BSP code to assign board-specific platfom-divice
^^^^^^^
typo
> bits + */
> +
> +void platform_notify_map(const struct platform_notify_dev_map *map,
> + struct device *dev)
> +{
> + struct platform_device *pdev;
> + int len, idx;
> + const char *s;
> +
> + /* do nothing if no device or no bus_id */
> + if (!dev || !dev->bus_id)
> + return;
> +
> + /* call per device map */
> + while (map->bus_id != NULL) {
> + idx = -1;
> + s = strrchr(dev->bus_id, '.');
> + if (s != NULL)
> + idx = (int)simple_strtol(s + 1, NULL, 10);
> + else
> + s = dev->bus_id;
> +
> + len = s - dev->bus_id;
> +
> + if (!strncmp(dev->bus_id, map->bus_id, len)) {
> + pdev = container_of(dev, struct platform_device,
> dev);
> + map->rtn(pdev, idx);
> + }
> + map++;
> + }
> +}
> +
> +/*
> + Function assignment stuff.
> + Intended to work as follows:
> + the device name defined in foo_devices.c will be concatenated with
> :"func", + where func is string map of respective function from
> platfom_device_func enum
This line looks odd, even though my mailer supposedly breaks it. Can you
format it nicely please?
> +
> + The PPC_SYS_FUNC_DUMMY function is intended to remove all assignments,
> making the device to appear
> + in platform bus with unmodified name.
> + */
> +
> +/*
> + Here we'll replace .name pointers with fixed-lenght strings
> + Hereby, this should be called *before* any func stuff triggeded.
> + */
> +void ppc_sys_device_initfunc(void)
> +{
> + int i;
> + const char *name;
> + static char new_names[NUM_PPC_SYS_DEVS][BUS_ID_SIZE];
> + enum ppc_sys_devices cur_dev;
> +
> + /* If inited yet, do nothing */
> + if (ppc_sys_func_inited)
> + return;
> +
> + for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
> + if ((cur_dev = cur_ppc_sys_spec->device_list[i]) < 0)
> + continue;
> +
> + if (ppc_sys_platform_devices[cur_dev].name) {
> + /*backup name */
> + name = ppc_sys_platform_devices[cur_dev].name;
> + strlcpy(new_names[i], name, BUS_ID_SIZE);
> + ppc_sys_platform_devices[cur_dev].name =
> new_names[i];
Did my mailer break this line or the original patch is borked?
> + }
> + }
> +
> + ppc_sys_func_inited = 1;
> +}
> +
> +/*The "engine" of the func stuff. Here we either concat specified function
> string description + to the name, or remove it if PPC_SYS_FUNC_DUMMY
> parameter is passed here*/
Ditto, please use
/*
* xyz
*/
> +void ppc_sys_device_setfunc(enum ppc_sys_devices dev,
> + enum platform_device_func func)
> +{
> + char *s;
> + char *name = (char *)ppc_sys_platform_devices[dev].name;
> + char tmp[BUS_ID_SIZE];
> +
> + if (!ppc_sys_func_inited) {
> + printk(KERN_ERR "Unable to alter function - not inited!\n");
> + return;
> + }
> +
> + if (ppc_sys_inited) {
> + platform_device_unregister(&ppc_sys_platform_devices[dev]);
> + }
> +
> + if ((s = (char *)strchr(name, ':')) != NULL) { /* reassign */
> + /* Either change the name after ':' or remove func
> modifications */
> + if (func != PPC_SYS_FUNC_DUMMY)
> + strlcpy(s + 1, ppc_sys_func_names[func],
> BUS_ID_SIZE);
> + else
> + *s = 0;
> + } else if (func != PPC_SYS_FUNC_DUMMY) {
> + /* do assignment if it is not just "enable" request */
> + sprintf(tmp, "%s:%s", name, ppc_sys_func_names[func]);
> + strlcpy(name, tmp, BUS_ID_SIZE);
> + }
> +
> + if (ppc_sys_inited) {
> + platform_device_register(&ppc_sys_platform_devices[dev]);
> + }
> +}
> +
> +void ppc_sys_device_disable(enum ppc_sys_devices dev)
> +{
> + BUG_ON(cur_ppc_sys_spec == NULL);
> +
> + /*Check if it is enabled*/
> + if(cur_ppc_sys_spec->config[dev] & PPC_SYS_CONFIG_ENABED) {
> + if (ppc_sys_inited) {
> + platform_device_unregister(&ppc_sys_platform_devices[dev]);
> + }
Missing TAB?
> + cur_ppc_sys_spec->config[dev] &= ~PPC_SYS_CONFIG_ENABED;
> + }
> +}
> +
> +void ppc_sys_device_enable(enum ppc_sys_devices dev)
> +{
> + BUG_ON(cur_ppc_sys_spec == NULL);
> +
> + /*Check if it is disabled*/
> + if(!(cur_ppc_sys_spec->config[dev] & PPC_SYS_CONFIG_ENABED)) {
> + if (ppc_sys_inited) {
> + platform_device_register(&ppc_sys_platform_devices[dev]);
> + }
Ditto
> + cur_ppc_sys_spec->config[dev] |= PPC_SYS_CONFIG_ENABED;
> + }
> +
> +}
> +
> +void ppc_sys_device_enable_all(enum platform_device_func func)
> +{
> + enum ppc_sys_devices cur_dev;
> + int i;
> +
> + for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
> + cur_dev = cur_ppc_sys_spec->device_list[i];
> + ppc_sys_device_enable(cur_dev);
> + }
> +}
> +
> static int __init ppc_sys_init(void)
> {
> unsigned int i, dev_id, ret = 0;
> @@ -136,7 +294,8 @@ static int __init ppc_sys_init(void)
>
> for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
> dev_id = cur_ppc_sys_spec->device_list[i];
> - if (dev_id != -1) {
> + if ((dev_id != -1) ||
> + (cur_ppc_sys_spec->config[dev_id] & PPC_SYS_CONFIG_ENABED)) {
> if (ppc_sys_device_fixup != NULL)
> ppc_sys_device_fixup(&ppc_sys_platform_devices
> [dev_id]);
> diff --git a/include/asm-ppc/mpc10x.h b/include/asm-ppc/mpc10x.h
> index 77b1e09..976ad3d 100644
> --- a/include/asm-ppc/mpc10x.h
> +++ b/include/asm-ppc/mpc10x.h
> @@ -165,6 +165,7 @@ enum ppc_sys_devices {
> MPC10X_DMA1,
> MPC10X_UART0,
> MPC10X_UART1,
> + NUM_PPC_SYS_DEVS,
> };
>
> int mpc10x_bridge_init(struct pci_controller *hose,
> diff --git a/include/asm-ppc/mpc52xx.h b/include/asm-ppc/mpc52xx.h
> index e5f80c2..b2cb44f 100644
> --- a/include/asm-ppc/mpc52xx.h
> +++ b/include/asm-ppc/mpc52xx.h
> @@ -49,6 +49,7 @@ enum ppc_sys_devices {
> MPC52xx_ATA,
> MPC52xx_I2C1,
> MPC52xx_I2C2,
> + NUM_PPC_SYS_DEVS,
> };
>
>
> diff --git a/include/asm-ppc/mpc8260.h b/include/asm-ppc/mpc8260.h
> index 3214526..6ba69a8 100644
> --- a/include/asm-ppc/mpc8260.h
> +++ b/include/asm-ppc/mpc8260.h
> @@ -83,6 +83,7 @@ enum ppc_sys_devices {
> MPC82xx_CPM_SMC2,
> MPC82xx_CPM_USB,
> MPC82xx_SEC1,
> + NUM_PPC_SYS_DEVS,
> };
>
> #ifndef __ASSEMBLY__
> diff --git a/include/asm-ppc/mpc83xx.h b/include/asm-ppc/mpc83xx.h
> index 7cdf60f..3c23fc4 100644
> --- a/include/asm-ppc/mpc83xx.h
> +++ b/include/asm-ppc/mpc83xx.h
> @@ -108,6 +108,7 @@ enum ppc_sys_devices {
> MPC83xx_USB2_DR,
> MPC83xx_USB2_MPH,
> MPC83xx_MDIO,
> + NUM_PPC_SYS_DEVS,
> };
>
> #endif /* CONFIG_83xx */
> diff --git a/include/asm-ppc/mpc85xx.h b/include/asm-ppc/mpc85xx.h
> index 9d14bae..2a77884 100644
> --- a/include/asm-ppc/mpc85xx.h
> +++ b/include/asm-ppc/mpc85xx.h
> @@ -135,6 +135,7 @@ enum ppc_sys_devices {
> MPC85xx_eTSEC4,
> MPC85xx_IIC2,
> MPC85xx_MDIO,
> + NUM_PPC_SYS_DEVS,
> };
>
> /* Internal interrupts are all Level Sensitive, and Positive Polarity */
> diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
> index 46f159c..90e3d59 100644
> --- a/include/asm-ppc/mpc8xx.h
> +++ b/include/asm-ppc/mpc8xx.h
> @@ -111,6 +111,7 @@ enum ppc_sys_devices {
> MPC8xx_CPM_SMC1,
> MPC8xx_CPM_SMC2,
> MPC8xx_CPM_USB,
> + NUM_PPC_SYS_DEVS,
> };
>
> #ifndef BOARD_CHIP_NAME
> diff --git a/include/asm-ppc/ppc_sys.h b/include/asm-ppc/ppc_sys.h
> index 83d8c77..e6f83ad 100644
> --- a/include/asm-ppc/ppc_sys.h
> +++ b/include/asm-ppc/ppc_sys.h
> @@ -44,9 +44,26 @@ struct ppc_sys_spec {
> u32 value;
> u32 num_devices;
> char *ppc_sys_name;
> + u8 config[NUM_PPC_SYS_DEVS];
> enum ppc_sys_devices *device_list;
> };
>
> +struct platform_notify_dev_map {
> + const char *bus_id;
> + void (*rtn)(struct platform_device * pdev, int idx);
> +};
> +
> +enum platform_device_func {
> + PPC_SYS_FUNC_DUMMY = 0,
> + PPC_SYS_FUNC_ETH = 1,
> + PPC_SYS_FUNC_UART = 2,
> + PPC_SYS_FUNC_HLDC = 3,
> + PPC_SYS_FUNC_USB = 4,
> + PPC_SYS_FUNC_IRDA = 5,
> +};
> +
> +#define PPC_SYS_CONFIG_ENABED 1
> +
> /* describes all specific chips and which devices they have on them */
> extern struct ppc_sys_spec ppc_sys_specs[];
> extern struct ppc_sys_spec *cur_ppc_sys_spec;
> @@ -72,5 +89,14 @@ extern void *ppc_sys_get_pdata(enum ppc_
> /* remove a device from the system */
> extern void ppc_sys_device_remove(enum ppc_sys_devices dev);
>
> +/*Function assignment stuff*/
> +void ppc_sys_device_initfunc(void);
> +void ppc_sys_device_setfunc(enum ppc_sys_devices dev,
> + enum platform_device_func func);
> +void ppc_sys_device_set_func_all(enum platform_device_func func);
> +
> +void platform_notify_map(const struct platform_notify_dev_map *map,
> + struct device *dev);
> +
> #endif /* __ASM_PPC_SYS_H */
> #endif /* __KERNEL__ */
^ permalink raw reply
* Re: [PATCH 2/2] ppc32: MPC885ADS, MPC866ADS and MPC8272ADS-specific platform stuff for fs_enet
From: Marcelo Tosatti @ 2005-12-29 20:01 UTC (permalink / raw)
To: Vitaly Bordug; +Cc: linuxppc-embedded list
In-Reply-To: <43B2E62B.5050008@ru.mvista.com>
On Wed, Dec 28, 2005 at 10:23:23PM +0300, Vitaly Bordug wrote:
>
> Added proper ppc_sys identification and fs_platform_info's for MPC 885ADS,
> 866ADS and 8272ADS, utilizing function assignment to remove/do not use
> platform devices which conflict with PD-incompatible drivers.
>
> Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
> ---
>
> arch/ppc/Kconfig | 47 ++++
> arch/ppc/platforms/Makefile | 4
> arch/ppc/platforms/fads.h | 2
> arch/ppc/platforms/mpc8272ads_setup.c | 236 ++++++++++++++++++++
> arch/ppc/platforms/mpc866ads_setup.c | 270 +++++++++++++++++++++++
> arch/ppc/platforms/mpc885ads_setup.c | 387
> +++++++++++++++++++++++++++++++++
> arch/ppc/platforms/pq2ads.h | 4
> arch/ppc/platforms/pq2ads_pd.h | 114 ++++++++++
> arch/ppc/syslib/ppc_sys.c | 4
> drivers/base/platform.c | 2
> 10 files changed, 1066 insertions(+), 4 deletions(-)
>
> diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
> index cc3f64c..ac32793 100644
> --- a/arch/ppc/Kconfig
> +++ b/arch/ppc/Kconfig
> @@ -506,6 +506,53 @@ config WINCEPT
>
> endchoice
>
> +menu "Freescale Ethernet driver platform-specific options"
> + depends on FS_ENET
> +
> + config MPC8xx_SECOND_ETH
> + bool "Second Ethernet channel"
> + depends on (MPC885ADS || MPC86XADS)
> + default y
> + help
> + This enables support for second Ethernet on MPC885ADS and
> MPC86xADS boards.
> + The latter will use SCC1, for 885ADS you can select it below.
> +
> + choice
> + prompt "Second Ethernet channel"
> + depends on MPC8xx_SECOND_ETH
> + default MPC8xx_SECOND_ETH_FEC2
> +
> + config MPC8xx_SECOND_ETH_FEC2
> + bool "FEC2"
> + depends on MPC885ADS
> + help
> + Enable FEC2 to serve as 2-nd Ethernet channel. Note that
> SMC2
> + (often 2-nd UART) will not work if this is enabled.
> +
> + config MPC8xx_SECOND_ETH_SCC1
> + bool "SCC1"
> + depends on MPC86XADS
> + select MPC8xx_SCC_ENET_FIXED
> + help
> + Enable SCC1 to serve as 2-nd Ethernet channel. Note that
> SMC1
> + (often 1-nd UART) will not work if this is enabled.
> +
> + config MPC8xx_SECOND_ETH_SCC3
> + bool "SCC3"
> + depends on MPC885ADS
> + help
> + Enable SCC3 to serve as 2-nd Ethernet channel. Note that
> SMC1
> + (often 1-nd UART) will not work if this is enabled.
> +
> + endchoice
> +
> + config MPC8xx_SCC_ENET_FIXED
> + depends on MPC8xx_SECOND_ETH_SCC
> + default n
> + bool "Use fixed MII-less mode for SCC Ethernet"
> +
> +endmenu
> +
> choice
> prompt "Machine Type"
> depends on 6xx || POWER3 || POWER4
> diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
> index 7c5cdab..ee50b0d 100644
> --- a/arch/ppc/platforms/Makefile
> +++ b/arch/ppc/platforms/Makefile
> @@ -22,6 +22,8 @@ ifeq ($(CONFIG_PPC_PMAC),y)
> obj-$(CONFIG_NVRAM) += pmac_nvram.o
> obj-$(CONFIG_CPU_FREQ_PMAC) += pmac_cpufreq.o
> endif
> +
> +obj-$(CONFIG_ADS8272) += mpc8272ads_setup.o
> obj-$(CONFIG_PMAC_BACKLIGHT) += pmac_backlight.o
> obj-$(CONFIG_PREP_RESIDUAL) += residual.o
> obj-$(CONFIG_PQ2ADS) += pq2ads.o
> @@ -45,6 +47,8 @@ obj-$(CONFIG_SBC82xx) += sbc82xx.o
> obj-$(CONFIG_SPRUCE) += spruce.o
> obj-$(CONFIG_LITE5200) += lite5200.o
> obj-$(CONFIG_EV64360) += ev64360.o
> +obj-$(CONFIG_MPC86XADS) += mpc866ads_setup.o
> +obj-$(CONFIG_MPC885ADS) += mpc885ads_setup.o
>
> ifeq ($(CONFIG_SMP),y)
> obj-$(CONFIG_PPC_PMAC) += pmac_smp.o
> diff --git a/arch/ppc/platforms/fads.h b/arch/ppc/platforms/fads.h
> index a48fb8d..e1c0b1b 100644
> --- a/arch/ppc/platforms/fads.h
> +++ b/arch/ppc/platforms/fads.h
> @@ -112,7 +112,7 @@
>
> /* CPM Ethernet through SCC1 or SCC2 */
>
> -#ifdef CONFIG_SCC1_ENET /* Probably 860 variant */
> +#if defined(CONFIG_SCC1_ENET) || defined(CONFIG_MPC8xx_SECOND_ETH_SCC1) /*
> Probably 860 variant */
> /* Bits in parallel I/O port registers that have to be set/cleared
> * to configure the pins for SCC1 use.
> * TCLK - CLK1, RCLK - CLK2.
> diff --git a/arch/ppc/platforms/mpc8272ads_setup.c
> b/arch/ppc/platforms/mpc8272ads_setup.c
> new file mode 100644
> index 0000000..e45b91a
> --- /dev/null
> +++ b/arch/ppc/platforms/mpc8272ads_setup.c
> @@ -0,0 +1,236 @@
> +/*
> + * arch/ppc/platforms/82xx/pq2ads_pd.c
> + *
> + * MPC82xx Board-specific PlatformDevice descriptions
> + *
> + * 2005 (c) MontaVista Software, Inc.
> + * Vitaly Bordug <vbordug@ru.mvista.com>
> + *
> + * This file is licensed under the terms of the GNU General Public License
> + * version 2. This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + */
> +
> +
> +#include <linux/init.h>
> +#include <linux/module.h>
> +#include <linux/device.h>
> +#include <linux/ioport.h>
> +#include <linux/fs_enet_pd.h>
> +#include <linux/platform_device.h>
> +
> +#include <asm/io.h>
> +#include <asm/mpc8260.h>
> +#include <asm/cpm2.h>
> +#include <asm/immap_cpm2.h>
> +#include <asm/irq.h>
> +#include <asm/ppc_sys.h>
> +#include <asm/ppcboot.h>
> +
> +#include "pq2ads_pd.h"
> +
> +static void init_fcc1_ioports(void);
> +static void init_fcc2_ioports(void);
> +
> +static struct fs_mii_bus_info mii_bus_info = {
> + .method = fsmii_bitbang,
> + .id = 0,
> + .i.bitbang = {
> + .mdio_port = fsiop_portc,
> + .mdio_bit = 18,
> + .mdc_port = fsiop_portc,
> + .mdc_bit = 19,
> + .delay = 1,
> + },
> +};
> +
> +static struct fs_platform_info mpc82xx_fcc1_pdata = {
> + .fs_no = fsid_fcc1,
> + .cp_page = CPM_CR_FCC1_PAGE,
> + .cp_block = CPM_CR_FCC1_SBLOCK,
> + .clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
> + .clk_route = CMX1_CLK_ROUTE,
> + .clk_mask = CMX1_CLK_MASK,
> + .init_ioports = init_fcc1_ioports,
> +
> + .phy_addr = 0,
> +#ifdef PHY_INTERRUPT
> + .phy_irq = PHY_INTERRUPT,
> +#else
> + .phy_irq = -1;
> +#endif
> + .mem_offset = FCC1_MEM_OFFSET,
> + .bus_info = &mii_bus_info,
> + .rx_ring = 32,
> + .tx_ring = 32,
> + .rx_copybreak = 240,
> + .use_napi = 0,
> + .napi_weight = 17,
> +};
> +
> +static struct fs_platform_info mpc82xx_fcc2_pdata = {
> + .fs_no = fsid_fcc2,
> + .cp_page = CPM_CR_FCC2_PAGE,
> + .cp_block = CPM_CR_FCC2_SBLOCK,
> + .clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
> + .clk_route = CMX2_CLK_ROUTE,
> + .clk_mask = CMX2_CLK_MASK,
> + .init_ioports = init_fcc2_ioports,
> +
> + .phy_addr = 3,
> +#ifdef PHY_INTERRUPT
> + .phy_irq = PHY_INTERRUPT,
> +#else
> + .phy_irq = -1;
> +#endif
> + .mem_offset = FCC2_MEM_OFFSET,
> + .bus_info = &mii_bus_info,
> + .rx_ring = 32,
> + .tx_ring = 32,
> + .rx_copybreak = 240,
> + .use_napi = 0,
> + .napi_weight = 17,
> +};
> +
> +static void init_fcc1_ioports(void)
> +{
> + struct io_port *io;
> + u32 tempval;
> + cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
> + u32 *bcsr = ioremap(BCSR_ADDR+4, sizeof(u32));
> +
> + io = &immap->im_ioport;
> +
> + /* Enable the PHY */
> + clrbits32(bcsr, BCSR1_FETHIEN);
> + setbits32(bcsr, BCSR1_FETH_RST);
> +
> + /* FCC1 pins are on port A/C. */
> + /* Configure port A and C pins for FCC1 Ethernet. */
> +
> + tempval = in_be32(&io->iop_pdira);
> + tempval &= ~PA1_DIRA0;
> + tempval |= PA1_DIRA1;
> + out_be32(&io->iop_pdira, tempval);
> +
> + tempval = in_be32(&io->iop_psora);
> + tempval &= ~PA1_PSORA0;
> + tempval |= PA1_PSORA1;
> + out_be32(&io->iop_psora, tempval);
> +
> + setbits32(&io->iop_ppara,PA1_DIRA0 | PA1_DIRA1);
> +
> + /* Alter clocks */
> + tempval = PC_F1TXCLK|PC_F1RXCLK;
> +
> + clrbits32(&io->iop_psorc, tempval);
> + clrbits32(&io->iop_pdirc, tempval);
> + setbits32(&io->iop_pparc, tempval);
> +
> + clrbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_MASK);
> + setbits32(&immap->im_cpmux.cmx_fcr, CMX1_CLK_ROUTE);
> + iounmap(bcsr);
> + iounmap(immap);
> +}
> +
> +static void init_fcc2_ioports(void)
> +{
> + cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
> + u32 *bcsr = ioremap(BCSR_ADDR+12, sizeof(u32));
> +
> + struct io_port *io;
> + u32 tempval;
> +
> + immap = cpm2_immr;
> +
> + io = &immap->im_ioport;
> +
> + /* Enable the PHY */
> + clrbits32(bcsr, BCSR3_FETHIEN2);
> + setbits32(bcsr, BCSR3_FETH2_RST);
> +
> + /* FCC2 are port B/C. */
> + /* Configure port A and C pins for FCC2 Ethernet. */
> +
> + tempval = in_be32(&io->iop_pdirb);
> + tempval &= ~PB2_DIRB0;
> + tempval |= PB2_DIRB1;
> + out_be32(&io->iop_pdirb, tempval);
> +
> + tempval = in_be32(&io->iop_psorb);
> + tempval &= ~PB2_PSORB0;
> + tempval |= PB2_PSORB1;
> + out_be32(&io->iop_psorb, tempval);
> +
> + setbits32(&io->iop_pparb,PB2_DIRB0 | PB2_DIRB1);
> +
> + tempval = PC_F2RXCLK|PC_F2TXCLK;
> +
> + /* Alter clocks */
> + clrbits32(&io->iop_psorc,tempval);
> + clrbits32(&io->iop_pdirc,tempval);
> + setbits32(&io->iop_pparc,tempval);
> +
> + clrbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_MASK);
> + setbits32(&immap->im_cpmux.cmx_fcr, CMX2_CLK_ROUTE);
> +
> + iounmap(bcsr);
> + iounmap(immap);
> +}
> +
> +
> +static void __init mpc8272ads_fixup_enet_pdata(struct platform_device
> *pdev,
> + int idx)
Too much tabs?
> +{
> + bd_t* bi = (void*)__res;
> + int fs_no = fsid_fcc1+pdev->id-1;
> +
> + mpc82xx_fcc1_pdata.dpram_offset = mpc82xx_fcc2_pdata.dpram_offset =
> (u32)cpm2_immr->im_dprambase;
> + mpc82xx_fcc1_pdata.fcc_regs_c = mpc82xx_fcc2_pdata.fcc_regs_c =
> (u32)cpm2_immr->im_fcc_c;
> +
> + switch(fs_no) {
> + case fsid_fcc1:
> + memcpy(&mpc82xx_fcc1_pdata.macaddr,bi->bi_enetaddr,6);
> + pdev->dev.platform_data = &mpc82xx_fcc1_pdata;
> + break;
> + case fsid_fcc2:
> + memcpy(&mpc82xx_fcc2_pdata.macaddr,bi->bi_enetaddr,6);
> + mpc82xx_fcc2_pdata.macaddr[5] ^= 1;
> + pdev->dev.platform_data = &mpc82xx_fcc2_pdata;
> + break;
> + }
Missing tabs in this function?
> + printk("all\n");
> +}
> +
> +static int mpc8272ads_platform_notify(struct device *dev)
> +{
> + static const struct platform_notify_dev_map dev_map[] = {
> + {
> + .bus_id = "fsl-cpm-fcc",
> + .rtn = mpc8272ads_fixup_enet_pdata
> + },
> + {
> + .bus_id = NULL
> + }
> + };
> + platform_notify_map(dev_map,dev);
> +
> + return 0;
> +
> +}
> +
> +int __init mpc8272ads_init(void)
> +{
> + printk(KERN_NOTICE "mpc8272ads: Init\n");
> +
> + platform_notify = mpc8272ads_platform_notify;
> +
> + ppc_sys_device_initfunc();
> +
> + ppc_sys_device_enable(MPC82xx_CPM_FCC1);
> + ppc_sys_device_enable(MPC82xx_CPM_FCC2);
> +
> + return 0;
> +}
> +
> +arch_initcall(mpc8272ads_init);
> diff --git a/arch/ppc/platforms/mpc866ads_setup.c
> b/arch/ppc/platforms/mpc866ads_setup.c
> new file mode 100644
> index 0000000..26b989f
> --- /dev/null
> +++ b/arch/ppc/platforms/mpc866ads_setup.c
> @@ -0,0 +1,270 @@
> +/*arch/ppc/platforms/mpc885ads-setup.c
> + *
> + * Platform setup for the Freescale mpc885ads board
> + *
> + * Vitaly Bordug <vbordug@ru.mvista.com>
> + *
> + * Copyright 2005 MontaVista Software Inc.
> + *
> + * This file is licensed under the terms of the GNU General Public License
> + * version 2. This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + */
> +
> +#include <linux/config.h>
> +#include <linux/init.h>
> +#include <linux/module.h>
> +#include <linux/param.h>
> +#include <linux/string.h>
> +#include <linux/ioport.h>
> +#include <linux/device.h>
> +
> +#include <linux/fs_enet_pd.h>
> +#include <linux/mii.h>
> +
> +#include <asm/delay.h>
> +#include <asm/io.h>
> +#include <asm/machdep.h>
> +#include <asm/page.h>
> +#include <asm/processor.h>
> +#include <asm/system.h>
> +#include <asm/time.h>
> +#include <asm/ppcboot.h>
> +#include <asm/8xx_immap.h>
> +#include <asm/commproc.h>
> +#include <asm/ppc_sys.h>
> +#include <asm/mpc8xx.h>
> +
> +extern unsigned char __res[];
> +
> +static struct fs_mii_bus_info fec_mii_bus_info = {
> + .method = fsmii_fec,
> + .id = 0,
> +};
> +
> +static struct fs_mii_bus_info scc_mii_bus_info = {
> + .method = fsmii_fixed,
> + .id = 0,
> + .i.fixed.speed = 10,
> + .i.fixed.duplex = 0,
> +};
> +
> +static struct fs_platform_info mpc8xx_fec_pdata[] = {
> + {
> + .rx_ring = 128,
> + .tx_ring = 16,
> + .rx_copybreak = 240,
> +
> + .use_napi = 1,
> + .napi_weight = 17,
> +
> + .phy_addr = 15,
> + .phy_irq = -1,
> +
> + .use_rmii = 0,
> +
> + .bus_info = &fec_mii_bus_info,
> + }
> +};
> +
> +static struct fs_platform_info mpc8xx_scc_pdata = {
> + .rx_ring = 64,
> + .tx_ring = 8,
> + .rx_copybreak = 240,
> +
> + .use_napi = 1,
> + .napi_weight = 17,
> +
> + .phy_addr = -1,
> + .phy_irq = -1,
> +
> + .bus_info = &scc_mii_bus_info,
> +};
> +
> +void __init board_init(void)
> +{
> + volatile cpm8xx_t *cp = cpmp;
> + unsigned *bcsr_io;
> +
> + bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
> +
> + if (bcsr_io == NULL) {
> + printk(KERN_CRIT "Could not remap BCSR1\n");
> + return;
> + }
> +#ifdef CONFIG_SERIAL_CPM_SMC1
> + cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
> + clrbits32(bcsr_io,(0x80000000 >> 7));
> +#else
> + setbits32(bcsr_io,(0x80000000 >> 7));
> +
> + cp->cp_pbpar &= ~(0x000000c0);
> + cp->cp_pbdir |= 0x000000c0;
> + cp->cp_smc[0].smc_smcmr = 0;
> + cp->cp_smc[0].smc_smce = 0;
> +#endif
> +
> +#ifdef CONFIG_SERIAL_CPM_SMC2
> + cp->cp_simode &= ~(0xe0000000 >> 1);
> + cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
> + clrbits32(bcsr_io,(0x80000000 >> 13));
> +#else
> + clrbits32(bcsr_io,(0x80000000 >> 13));
> + cp->cp_pbpar &= ~(0x00000c00);
> + cp->cp_pbdir |= 0x00000c00;
> + cp->cp_smc[1].smc_smcmr = 0;
> + cp->cp_smc[1].smc_smce = 0;
> +#endif
> + iounmap(bcsr_io);
> +}
> +
> +static void setup_fec1_ioports(void)
> +{
> + immap_t *immap = (immap_t *) IMAP_ADDR;
> +
> + setbits16(&immap->im_ioport.iop_pdpar, 0x1fff);
> + setbits16(&immap->im_ioport.iop_pddir, 0x1fff);
> +}
> +
> +static void setup_scc1_ioports(void)
> +{
> + immap_t *immap = (immap_t *) IMAP_ADDR;
> + unsigned *bcsr_io;
> +
> + bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
> +
> + if (bcsr_io == NULL) {
> + printk(KERN_CRIT "Could not remap BCSR1\n");
> + return;
> + }
> +
> + /* Enable the PHY.
> + */
> + clrbits32(bcsr_io,BCSR1_ETHEN);
> +
> + /* Configure port A pins for Txd and Rxd.
> + */
> + /* Disable receive and transmit in case EPPC-Bug started it.
> + */
> + setbits16(&immap->im_ioport.iop_papar, PA_ENET_RXD | PA_ENET_TXD);
> + clrbits16(&immap->im_ioport.iop_padir, PA_ENET_RXD | PA_ENET_TXD);
> + clrbits16(&immap->im_ioport.iop_paodr, PA_ENET_TXD);
> +
> + /* Configure port C pins to enable CLSN and RENA.
> + */
> + clrbits16(&immap->im_ioport.iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
> + clrbits16(&immap->im_ioport.iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
> + setbits16(&immap->im_ioport.iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
> + /* Configure port A for TCLK and RCLK.
> + */
> + setbits16(&immap->im_ioport.iop_papar, PA_ENET_TCLK | PA_ENET_RCLK);
> + clrbits16(&immap->im_ioport.iop_padir, PA_ENET_TCLK | PA_ENET_RCLK);
> + clrbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA);
> + clrbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA);
> +
> + /* Configure Serial Interface clock routing.
> + * First, clear all SCC bits to zero, then set the ones we want.
> + */
> + clrbits32(&immap->im_cpm.cp_sicr, SICR_ENET_MASK);
> + setbits32(&immap->im_cpm.cp_sicr, SICR_ENET_CLKRT);
> +
> + /* In the original SCC enet driver the following code is placed at
> + the end of the initialization */
> + setbits32(&immap->im_cpm.cp_pbpar, PB_ENET_TENA);
> + setbits32(&immap->im_cpm.cp_pbdir, PB_ENET_TENA);
> +
> +}
> +
> +static void mpc866ads_fixup_enet_pdata(struct platform_device *pdev, int
> fs_no)
> +{
> + struct fs_platform_info *fpi = pdev->dev.platform_data;
> +
> + volatile cpm8xx_t *cp;
> + bd_t *bd = (bd_t *) __res;
> + char *e;
> + int i;
> +
> + /* Get pointer to Communication Processor */
> + cp = cpmp;
> + switch (fs_no) {
> + case fsid_fec1:
> + fpi = &mpc8xx_fec_pdata[0];
> + fpi->init_ioports = &setup_fec1_ioports;
> +
> + break;
> + case fsid_scc1:
> + fpi = &mpc8xx_scc_pdata;
> + fpi->init_ioports = &setup_scc1_ioports;
> +
> + break;
> + default:
> + break;
> + }
> +
> + pdev->dev.platform_data = fpi;
> + fpi->fs_no = fs_no;
> +
> + e = (unsigned char *)&bd->bi_enetaddr;
> + for (i = 0; i < 6; i++)
> + fpi->macaddr[i] = *e++;
> +
> + fpi->macaddr[5 - pdev->id]++;
> +
> +}
> +
> +static void mpc866ads_fixup_fec_enet_pdata(struct platform_device *pdev,
> + int idx)
> +{
> + /* This is for FEC devices only */
> + if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec")))
> + return;
> + mpc866ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1);
> +}
> +
> +static void mpc866ads_fixup_scc_enet_pdata(struct platform_device *pdev,
> + int idx)
> +{
> + /* This is for SCC devices only */
> + if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc")))
> + return;
> +
> + mpc866ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
> +}
> +
> +static int mpc866ads_platform_notify(struct device *dev)
> +{
> + static const struct platform_notify_dev_map dev_map[] = {
> + {
> + .bus_id = "fsl-cpm-fec",
> + .rtn = mpc866ads_fixup_fec_enet_pdata,
> + },
> + {
> + .bus_id = "fsl-cpm-scc",
> + .rtn = mpc866ads_fixup_scc_enet_pdata,
> + },
> + {
> + .bus_id = NULL
> + }
> + };
> +
> + platform_notify_map(dev_map,dev);
> +
> + return 0;
> +}
> +
> +int __init mpc866ads_init(void)
> +{
> + printk(KERN_NOTICE "mpc866ads: Init\n");
> +
> + platform_notify = mpc866ads_platform_notify;
> +
> + ppc_sys_device_initfunc();
> +#ifdef MPC8xx_SECOND_ETH_SCC1
> + ppc_sys_device_enable(MPC8xx_CPM_SCC1);
> +#endif
> + ppc_sys_device_enable(MPC8xx_CPM_FEC1);
> +
> + return 0;
> +}
> +
> +arch_initcall(mpc866ads_init);
> diff --git a/arch/ppc/platforms/mpc885ads_setup.c
> b/arch/ppc/platforms/mpc885ads_setup.c
> new file mode 100644
> index 0000000..816cade
> --- /dev/null
> +++ b/arch/ppc/platforms/mpc885ads_setup.c
> @@ -0,0 +1,387 @@
> +/*arch/ppc/platforms/mpc885ads-setup.c
> + *
> + * Platform setup for the Freescale mpc885ads board
> + *
> + * Vitaly Bordug <vbordug@ru.mvista.com>
> + *
> + * Copyright 2005 MontaVista Software Inc.
> + *
> + * This file is licensed under the terms of the GNU General Public License
> + * version 2. This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + */
> +
> +#include <linux/config.h>
> +#include <linux/init.h>
> +#include <linux/module.h>
> +#include <linux/param.h>
> +#include <linux/string.h>
> +#include <linux/ioport.h>
> +#include <linux/device.h>
> +
> +#include <linux/fs_enet_pd.h>
> +#include <linux/mii.h>
> +
> +#include <asm/delay.h>
> +#include <asm/io.h>
> +#include <asm/machdep.h>
> +#include <asm/page.h>
> +#include <asm/processor.h>
> +#include <asm/system.h>
> +#include <asm/time.h>
> +#include <asm/ppcboot.h>
> +#include <asm/8xx_immap.h>
> +#include <asm/commproc.h>
> +#include <asm/ppc_sys.h>
> +
> +extern unsigned char __res[];
> +
> +static void __init mpc885ads_scc_phy_init(char);
> +
> +static struct fs_mii_bus_info fec_mii_bus_info = {
> + .method = fsmii_fec,
> + .id = 0,
> +};
> +
> +static struct fs_mii_bus_info scc_mii_bus_info = {
> +#ifdef CONFIG_SCC_ENET_8xx_FIXED
> + .method = fsmii_fixed,
> +#else
> + .method = fsmii_fec,
> +#endif
> +
> + .id = 0,
> +};
> +
> +static struct fs_platform_info mpc8xx_fec_pdata[] = {
> + {
> + .rx_ring = 128,
> + .tx_ring = 16,
> + .rx_copybreak = 240,
> +
> + .use_napi = 1,
> + .napi_weight = 17,
> +
> + .phy_addr = 0,
> + .phy_irq = SIU_IRQ7,
> +
> + .bus_info = &fec_mii_bus_info,
> + }, {
> + .rx_ring = 128,
> + .tx_ring = 16,
> + .rx_copybreak = 240,
> +
> + .use_napi = 1,
> + .napi_weight = 17,
> +
> + .phy_addr = 1,
> + .phy_irq = SIU_IRQ7,
> +
> + .bus_info = &fec_mii_bus_info,
> + }
> +};
> +
> +static struct fs_platform_info mpc8xx_scc_pdata = {
> + .rx_ring = 64,
> + .tx_ring = 8,
> + .rx_copybreak = 240,
> +
> + .use_napi = 1,
> + .napi_weight = 17,
> +
> + .phy_addr = 2,
> +#ifdef CONFIG_MPC8xx_SCC_ENET_FIXED
> + .phy_irq = -1,
> +#else
> + .phy_irq = SIU_IRQ7,
> +#endif
> +
> + .bus_info = &scc_mii_bus_info,
> +};
> +
> +void __init board_init(void)
> +{
> + volatile cpm8xx_t *cp = cpmp;
> + unsigned int *bcsr_io;
> +
> +#ifdef CONFIG_FS_ENET
> + immap_t *immap = (immap_t *) IMAP_ADDR;
> +#endif
> + bcsr_io = ioremap(BCSR1, sizeof(unsigned long));
> +
> + if (bcsr_io == NULL) {
> + printk(KERN_CRIT "Could not remap BCSR\n");
> + return;
> + }
> +#ifdef CONFIG_SERIAL_CPM_SMC1
> + cp->cp_simode &= ~(0xe0000000 >> 17); /* brg1 */
> + clrbits32(bcsr_io, BCSR1_RS232EN_1);
> +#else
> + setbits32(bcsr_io,BCSR1_RS232EN_1);
> + cp->cp_smc[0].smc_smcmr = 0;
> + cp->cp_smc[0].smc_smce = 0;
> +#endif
> +
> +#ifdef CONFIG_SERIAL_CPM_SMC2
> + cp->cp_simode &= ~(0xe0000000 >> 1);
> + cp->cp_simode |= (0x20000000 >> 1); /* brg2 */
> + clrbits32(bcsr_io,BCSR1_RS232EN_2);
> +#else
> + setbits32(bcsr_io,BCSR1_RS232EN_2);
> + cp->cp_smc[1].smc_smcmr = 0;
> + cp->cp_smc[1].smc_smce = 0;
> +#endif
> + iounmap(bcsr_io);
> +
> +#ifdef CONFIG_FS_ENET
> + /* use MDC for MII (common) */
> + setbits16(&immap->im_ioport.iop_pdpar, 0x0080);
> + clrbits16(&immap->im_ioport.iop_pddir, 0x0080);
> +#endif
> +}
> +
> +static void setup_fec1_ioports(void)
> +{
> + immap_t *immap = (immap_t *) IMAP_ADDR;
> +
> + /* configure FEC1 pins */
> + setbits16(&immap->im_ioport.iop_papar, 0xf830);
> + setbits16(&immap->im_ioport.iop_padir, 0x0830);
> + clrbits16(&immap->im_ioport.iop_padir, 0xf000);
> + setbits32(&immap->im_cpm.cp_pbpar, 0x00001001);
> +
> + clrbits32(&immap->im_cpm.cp_pbdir, 0x00001001);
> + setbits16(&immap->im_ioport.iop_pcpar, 0x000c);
> + clrbits16(&immap->im_ioport.iop_pcdir, 0x000c);
> + setbits32(&immap->im_cpm.cp_pepar, 0x00000003);
> +
> + setbits32(&immap->im_cpm.cp_pedir, 0x00000003);
> + clrbits32(&immap->im_cpm.cp_peso, 0x00000003);
> + clrbits32(&immap->im_cpm.cp_cptr, 0x00000100);
> +}
> +
> +static void setup_fec2_ioports(void)
> +{
> + immap_t *immap = (immap_t *) IMAP_ADDR;
> +
> + /* configure FEC2 pins */
> + setbits32(&immap->im_cpm.cp_pepar, 0x0003fffc);
> + setbits32(&immap->im_cpm.cp_pedir, 0x0003fffc);
> + setbits32(&immap->im_cpm.cp_peso, 0x00037800);
> + clrbits32(&immap->im_cpm.cp_peso, 0x000087fc);
> + clrbits32(&immap->im_cpm.cp_cptr, 0x00000080);
> +}
> +
> +static void setup_scc3_ioports(void)
> +{
> + immap_t *immap = (immap_t *) IMAP_ADDR;
> + unsigned *bcsr_io;
> +
> + bcsr_io = ioremap(BCSR_ADDR, BCSR_SIZE);
> +
> + if (bcsr_io == NULL) {
> + printk(KERN_CRIT "Could not remap BCSR\n");
> + return;
> + }
> +
> + /* Enable the PHY.
> + */
> + setbits32(bcsr_io+4, BCSR4_ETH10_RST);
> + /* Configure port A pins for Txd and Rxd.
> + */
> + setbits16(&immap->im_ioport.iop_papar, PA_ENET_RXD | PA_ENET_TXD);
> + clrbits16(&immap->im_ioport.iop_padir, PA_ENET_RXD | PA_ENET_TXD);
> +
> + /* Configure port C pins to enable CLSN and RENA.
> + */
> + clrbits16(&immap->im_ioport.iop_pcpar, PC_ENET_CLSN | PC_ENET_RENA);
> + clrbits16(&immap->im_ioport.iop_pcdir, PC_ENET_CLSN | PC_ENET_RENA);
> + setbits16(&immap->im_ioport.iop_pcso, PC_ENET_CLSN | PC_ENET_RENA);
> +
> + /* Configure port E for TCLK and RCLK.
> + */
> + setbits32(&immap->im_cpm.cp_pepar, PE_ENET_TCLK | PE_ENET_RCLK);
> + clrbits32(&immap->im_cpm.cp_pepar, PE_ENET_TENA);
> + clrbits32(&immap->im_cpm.cp_pedir,
> + PE_ENET_TCLK | PE_ENET_RCLK | PE_ENET_TENA);
> + clrbits32(&immap->im_cpm.cp_peso, PE_ENET_TCLK | PE_ENET_RCLK);
> + setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA);
> +
> + /* Configure Serial Interface clock routing.
> + * First, clear all SCC bits to zero, then set the ones we want.
> + */
> + clrbits32(&immap->im_cpm.cp_sicr, SICR_ENET_MASK);
> + setbits32(&immap->im_cpm.cp_sicr, SICR_ENET_CLKRT);
> +
> + /* Disable Rx and Tx. SMC1 sshould be stopped if SCC3 eternet are
> used.
> + */
> + immap->im_cpm.cp_smc[0].smc_smcmr &= ~(SMCMR_REN | SMCMR_TEN);
> + /* On the MPC885ADS SCC ethernet PHY is initialized in the full
> duplex mode
> + * by H/W setting after reset. SCC ethernet controller support only
> half duplex.
> + * This discrepancy of modes causes a lot of carrier lost errors.
> + */
> +
> + /* In the original SCC enet driver the following code is placed at
> + the end of the initialization */
> + setbits32(&immap->im_cpm.cp_pepar, PE_ENET_TENA);
> + clrbits32(&immap->im_cpm.cp_pedir, PE_ENET_TENA);
> + setbits32(&immap->im_cpm.cp_peso, PE_ENET_TENA);
> +
> + setbits32(bcsr_io+1, BCSR1_ETHEN);
> + iounmap(bcsr_io);
> +}
> +
> +static void mpc885ads_fixup_enet_pdata(struct platform_device *pdev, int
> fs_no)
> +{
> + struct fs_platform_info *fpi = pdev->dev.platform_data;
> +
> + volatile cpm8xx_t *cp;
> + bd_t *bd = (bd_t *) __res;
> + char *e;
> + int i;
> +
> + /* Get pointer to Communication Processor */
> + cp = cpmp;
> + switch (fs_no) {
> + case fsid_fec1:
> + fpi = &mpc8xx_fec_pdata[0];
> + fpi->init_ioports = &setup_fec1_ioports;
> + break;
> + case fsid_fec2:
> + fpi = &mpc8xx_fec_pdata[1];
> + fpi->init_ioports = &setup_fec2_ioports;
> + break;
> + case fsid_scc3:
> + fpi = &mpc8xx_scc_pdata;
> + fpi->init_ioports = &setup_scc3_ioports;
> + mpc885ads_scc_phy_init(fpi->phy_addr);
> + break;
> + default:
> + break;
> + }
> +
> + pdev->dev.platform_data = fpi;
> + fpi->fs_no = fs_no;
> +
> + e = (unsigned char *)&bd->bi_enetaddr;
> + for (i = 0; i < 6; i++)
> + fpi->macaddr[i] = *e++;
> +
> + fpi->macaddr[5 - pdev->id]++;
> +
> +}
> +
> +static void mpc885ads_fixup_fec_enet_pdata(struct platform_device *pdev,
> + int idx)
> +{
> + /* This is for FEC devices only */
> + if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-fec")))
> + return;
> + mpc885ads_fixup_enet_pdata(pdev, fsid_fec1 + pdev->id - 1);
> +}
> +
> +static void __init mpc885ads_fixup_scc_enet_pdata(struct platform_device
> *pdev,
> + int idx)
> +{
> + /* This is for SCC devices only */
> + if (!pdev || !pdev->name || (!strstr(pdev->name, "fsl-cpm-scc")))
> + return;
> +
> + mpc885ads_fixup_enet_pdata(pdev, fsid_scc1 + pdev->id - 1);
> +}
> +
> +/* SCC ethernet controller does not have MII management channel. FEC1 MII
> + * channel is used to communicate with the 10Mbit PHY.
> + */
> +
> +#define MII_ECNTRL_PINMUX 0x4
> +#define FEC_ECNTRL_PINMUX 0x00000004
> +#define FEC_RCNTRL_MII_MODE 0x00000004
> +
> +/* Make MII read/write commands.
> + */
> +#define mk_mii_write(REG, VAL, PHY_ADDR) (0x50020000 | (((REG) & 0x1f)
> << 18) | \
> + ((VAL) & 0xffff) | ((PHY_ADDR) << 23))
strange formatting?
> +
> +static void mpc885ads_scc_phy_init(char phy_addr)
> +{
> + volatile immap_t *immap;
> + volatile fec_t *fecp;
> + bd_t *bd;
> +
> + bd = (bd_t *) __res;
> + immap = (immap_t *) IMAP_ADDR; /* pointer to internal registers */
> + fecp = &(immap->im_cpm.cp_fec);
> +
> + /* Enable MII pins of the FEC1
> + */
> + setbits16(&immap->im_ioport.iop_pdpar, 0x0080);
> + clrbits16(&immap->im_ioport.iop_pddir, 0x0080);
> + /* Set MII speed to 2.5 MHz
> + */
> + out_be32(&fecp->fec_mii_speed,
> + ((((bd->bi_intfreq + 4999999) / 2500000) / 2) & 0x3F) << 1);
> +
> + /* Enable FEC pin MUX
> + */
> + setbits32(&fecp->fec_ecntrl, MII_ECNTRL_PINMUX);
> + setbits32(&fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
> +
> + out_be32(&fecp->fec_mii_data,
> + mk_mii_write(MII_BMCR, BMCR_ISOLATE, phy_addr));
> + udelay(100);
> + out_be32(&fecp->fec_mii_data,
> + mk_mii_write(MII_ADVERTISE,
> + ADVERTISE_10HALF | ADVERTISE_CSMA, phy_addr));
> + udelay(100);
> +
> + /* Disable FEC MII settings
> + */
> + clrbits32(&fecp->fec_ecntrl, MII_ECNTRL_PINMUX);
> + clrbits32(&fecp->fec_r_cntrl, FEC_RCNTRL_MII_MODE);
> + out_be32(&fecp->fec_mii_speed, 0);
> +}
> +
> +static int mpc885ads_platform_notify(struct device *dev)
> +{
> +
> + static const struct platform_notify_dev_map dev_map[] = {
> + {
> + .bus_id = "fsl-cpm-fec",
> + .rtn = mpc885ads_fixup_fec_enet_pdata,
> + },
> + {
> + .bus_id = "fsl-cpm-scc",
> + .rtn = mpc885ads_fixup_scc_enet_pdata,
> + },
> + {
> + .bus_id = NULL
> + }
> + };
> +
> + platform_notify_map(dev_map,dev);
> +
> +}
> +
> +int __init mpc885ads_init(void)
> +{
> + printk(KERN_NOTICE "mpc885ads: Init\n");
> +
> + platform_notify = mpc885ads_platform_notify;
> +
> + ppc_sys_device_initfunc();
> +
> + ppc_sys_device_enable(MPC8xx_CPM_FEC1);
> +
> +#ifdef CONFIG_MPC8xx_SECOND_ETH_SCC3
> + ppc_sys_device_enable(MPC8xx_CPM_SCC1);
> +
> +#endif
> +#ifdef CONFIG_MPC8xx_SECOND_ETH_FEC2
> + ppc_sys_device_enable(MPC8xx_CPM_FEC2);
> +#endif
> +
> + return 0;
> +}
> +
> +arch_initcall(mpc885ads_init);
> diff --git a/arch/ppc/platforms/pq2ads.h b/arch/ppc/platforms/pq2ads.h
> index 067d9a5..6b26dd3 100644
> --- a/arch/ppc/platforms/pq2ads.h
> +++ b/arch/ppc/platforms/pq2ads.h
> @@ -13,6 +13,10 @@
>
> #include <asm/ppcboot.h>
>
> +#if defined(CONFIG_ADS8272)
> +#define BOARD_CHIP_NAME "8272"
> +#endif
> +
> /* Memory map is configured by the PROM startup.
> * We just map a few things we need. The CSR is actually 4 byte-wide
> * registers that can be accessed as 8-, 16-, or 32-bit values.
> diff --git a/arch/ppc/platforms/pq2ads_pd.h b/arch/ppc/platforms/pq2ads_pd.h
> new file mode 100644
> index 0000000..8f14a43
> --- /dev/null
> +++ b/arch/ppc/platforms/pq2ads_pd.h
> @@ -0,0 +1,114 @@
> +#ifndef __PQ2ADS_PD_H
> +#define __PQ2ADS_PD_H
> +/*
> + * arch/ppc/platforms/82xx/pq2ads_pd.h
> + *
> + * Some defines for MPC82xx board-specific PlatformDevice descriptions
> + *
> + * 2005 (c) MontaVista Software, Inc.
> + * Vitaly Bordug <vbordug@ru.mvista.com>
> + *
> + * This file is licensed under the terms of the GNU General Public License
> + * version 2. This program is licensed "as is" without any warranty of any
> + * kind, whether express or implied.
> + */
> +
> +/* FCC1 Clock Source Configuration. These can be redefined in the board
> specific file.
> + Can only choose from CLK9-12 */
> +
> +#define F1_RXCLK 11
> +#define F1_TXCLK 10
> +
> +/* FCC2 Clock Source Configuration. These can be redefined in the board
> specific file.
> + Can only choose from CLK13-16 */
> +#define F2_RXCLK 15
> +#define F2_TXCLK 16
> +
> +/* FCC3 Clock Source Configuration. These can be redefined in the board
> specific file.
> + Can only choose from CLK13-16 */
> +#define F3_RXCLK 13
> +#define F3_TXCLK 14
> +
> +/* Automatically generates register configurations */
> +#define PC_CLK(x) ((uint)(1<<(x-1))) /* FCC CLK I/O ports */
> +
> +#define CMXFCR_RF1CS(x) ((uint)((x-5)<<27)) /* FCC1 Receive
> Clock Source */
> +#define CMXFCR_TF1CS(x) ((uint)((x-5)<<24)) /* FCC1 Transmit
> Clock Source */
> +#define CMXFCR_RF2CS(x) ((uint)((x-9)<<19)) /* FCC2 Receive
> Clock Source */
> +#define CMXFCR_TF2CS(x) ((uint)((x-9)<<16)) /* FCC2 Transmit Clock
> Source */
> +#define CMXFCR_RF3CS(x) ((uint)((x-9)<<11)) /* FCC3 Receive
> Clock Source */
> +#define CMXFCR_TF3CS(x) ((uint)((x-9)<<8)) /* FCC3 Transmit Clock
> Source */
> +
> +#define PC_F1RXCLK PC_CLK(F1_RXCLK)
> +#define PC_F1TXCLK PC_CLK(F1_TXCLK)
> +#define CMX1_CLK_ROUTE (CMXFCR_RF1CS(F1_RXCLK) |
> CMXFCR_TF1CS(F1_TXCLK))
> +#define CMX1_CLK_MASK ((uint)0xff000000)
> +
> +#define PC_F2RXCLK PC_CLK(F2_RXCLK)
> +#define PC_F2TXCLK PC_CLK(F2_TXCLK)
> +#define CMX2_CLK_ROUTE (CMXFCR_RF2CS(F2_RXCLK) |
> CMXFCR_TF2CS(F2_TXCLK))
> +#define CMX2_CLK_MASK ((uint)0x00ff0000)
> +
> +#define PC_F3RXCLK PC_CLK(F3_RXCLK)
> +#define PC_F3TXCLK PC_CLK(F3_TXCLK)
> +#define CMX3_CLK_ROUTE (CMXFCR_RF3CS(F3_RXCLK) |
> CMXFCR_TF3CS(F3_TXCLK))
> +#define CMX3_CLK_MASK ((uint)0x0000ff00)
> +
> +/* I/O Pin assignment for FCC1. I don't yet know the best way to do this,
> + * but there is little variation among the choices.
> + */
> +#define PA1_COL 0x00000001U
> +#define PA1_CRS 0x00000002U
> +#define PA1_TXER 0x00000004U
> +#define PA1_TXEN 0x00000008U
> +#define PA1_RXDV 0x00000010U
> +#define PA1_RXER 0x00000020U
> +#define PA1_TXDAT 0x00003c00U
> +#define PA1_RXDAT 0x0003c000U
> +#define PA1_PSORA0 (PA1_RXDAT | PA1_TXDAT)
> +#define PA1_PSORA1 (PA1_COL | PA1_CRS | PA1_TXER | PA1_TXEN | \
> + PA1_RXDV | PA1_RXER)
> +#define PA1_DIRA0 (PA1_RXDAT | PA1_CRS | PA1_COL | PA1_RXER | PA1_RXDV)
> +#define PA1_DIRA1 (PA1_TXDAT | PA1_TXEN | PA1_TXER)
> +
> +
> +/* I/O Pin assignment for FCC2. I don't yet know the best way to do this,
> + * but there is little variation among the choices.
> + */
> +#define PB2_TXER 0x00000001U
> +#define PB2_RXDV 0x00000002U
> +#define PB2_TXEN 0x00000004U
> +#define PB2_RXER 0x00000008U
> +#define PB2_COL 0x00000010U
> +#define PB2_CRS 0x00000020U
> +#define PB2_TXDAT 0x000003c0U
> +#define PB2_RXDAT 0x00003c00U
> +#define PB2_PSORB0 (PB2_RXDAT | PB2_TXDAT | PB2_CRS | PB2_COL | \
> + PB2_RXER | PB2_RXDV | PB2_TXER)
> +#define PB2_PSORB1 (PB2_TXEN)
> +#define PB2_DIRB0 (PB2_RXDAT | PB2_CRS | PB2_COL | PB2_RXER | PB2_RXDV)
> +#define PB2_DIRB1 (PB2_TXDAT | PB2_TXEN | PB2_TXER)
> +
> +
> +/* I/O Pin assignment for FCC3. I don't yet know the best way to do this,
> + * but there is little variation among the choices.
> + */
> +#define PB3_RXDV 0x00004000U
> +#define PB3_RXER 0x00008000U
> +#define PB3_TXER 0x00010000U
> +#define PB3_TXEN 0x00020000U
> +#define PB3_COL 0x00040000U
> +#define PB3_CRS 0x00080000U
> +#define PB3_TXDAT 0x0f000000U
> +#define PB3_RXDAT 0x00f00000U
> +#define PB3_PSORB0 (PB3_RXDAT | PB3_TXDAT | PB3_CRS | PB3_COL | \
> + PB3_RXER | PB3_RXDV | PB3_TXER | PB3_TXEN)
> +#define PB3_PSORB1 0
> +#define PB3_DIRB0 (PB3_RXDAT | PB3_CRS | PB3_COL | PB3_RXER | PB3_RXDV)
> +#define PB3_DIRB1 (PB3_TXDAT | PB3_TXEN | PB3_TXER)
> +
> +#define FCC_MEM_OFFSET(x) (CPM_FCC_SPECIAL_BASE + (x*128))
> +#define FCC1_MEM_OFFSET FCC_MEM_OFFSET(0)
> +#define FCC2_MEM_OFFSET FCC_MEM_OFFSET(1)
> +
> +#endif
> diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
> index e3856e7..9182a36 100644
> --- a/arch/ppc/syslib/ppc_sys.c
> +++ b/arch/ppc/syslib/ppc_sys.c
> @@ -238,7 +238,7 @@ void ppc_sys_device_setfunc(enum ppc_sys
> else
> *s = 0;
> } else if (func != PPC_SYS_FUNC_DUMMY) {
> - /* do assignment if it is not just "enable" request */
> + /* do assignment if it is not just "clear" request */
> sprintf(tmp, "%s:%s", name, ppc_sys_func_names[func]);
> strlcpy(name, tmp, BUS_ID_SIZE);
> }
> @@ -294,7 +294,7 @@ static int __init ppc_sys_init(void)
>
> for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
> dev_id = cur_ppc_sys_spec->device_list[i];
> - if ((dev_id != -1) ||
> + if ((dev_id != -1) &&
> (cur_ppc_sys_spec->config[dev_id] & PPC_SYS_CONFIG_ENABED)) {
> if (ppc_sys_device_fixup != NULL)
> ppc_sys_device_fixup(&ppc_sys_platform_devices
> diff --git a/drivers/base/platform.c b/drivers/base/platform.c
> index 8827daf..ce551b5 100644
> --- a/drivers/base/platform.c
> +++ b/drivers/base/platform.c
> @@ -266,7 +266,7 @@ int platform_device_add(struct platform_
> }
> }
>
> - pr_debug("Registering platform device '%s'. Parent at %s\n",
> + pr_info("Registering platform device '%s'. Parent at %s\n",
> pdev->dev.bus_id, pdev->dev.parent->bus_id);
>
> ret = device_register(&pdev->dev);
^ permalink raw reply
* Re: [PATCH 1/2] ppc32: Make platform devices being able to assign functions (resend)
From: Grant Likely @ 2005-12-29 19:54 UTC (permalink / raw)
To: Marcelo Tosatti; +Cc: linuxppc-embedded list
In-Reply-To: <20051229194014.GC8842@dmt.cnet>
Marcelo Tosatti wrote:
> Hi Vitaly,
>
> On Wed, Dec 28, 2005 at 11:04:32PM +0300, Vitaly Bordug wrote:
>
>>Implemented by modification of the .name field of the platform device,
>>when PDs with the
>>same names are to be used within different drivers, as
>><device_name> -> <device_name>:<function>
>>Corresponding drivers should change the .name in struct device_driver to
>>reflect upper of course.
>
>
> I'm not certain that the <device_name>:<function> structure for sysfs
> representation is "allowed" - have you asked GregKH about it?
>
>
He didn't seem to have any problem with it when we talked about it at
OLS. Also, ':' is already used by the PCI bus driver. Look in
/sys/class/pci_bus.
g.
--
Grant Likely, B.Sc. P.Eng.
Secret Lab Technologies Ltd.
(403) 663-0761
^ permalink raw reply
* Re: [PATCH 2/2] ppc32: MPC885ADS, MPC866ADS and MPC8272ADS-specific platform stuff for fs_enet(resend)
From: Marcelo Tosatti @ 2005-12-29 20:02 UTC (permalink / raw)
To: Vitaly Bordug, f; +Cc: linuxppc-embedded list
In-Reply-To: <43B2F0FE.4050705@ru.mvista.com>
> diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
> index e3856e7..9182a36 100644
> --- a/arch/ppc/syslib/ppc_sys.c
> +++ b/arch/ppc/syslib/ppc_sys.c
> @@ -238,7 +238,7 @@ void ppc_sys_device_setfunc(enum ppc_sys
> else
> *s = 0;
> } else if (func != PPC_SYS_FUNC_DUMMY) {
> - /* do assignment if it is not just "enable" request */
> + /* do assignment if it is not just "clear" request */
> sprintf(tmp, "%s:%s", name, ppc_sys_func_names[func]);
> strlcpy(name, tmp, BUS_ID_SIZE);
> }
> @@ -294,7 +294,7 @@ static int __init ppc_sys_init(void)
>
> for (i = 0; i < cur_ppc_sys_spec->num_devices; i++) {
> dev_id = cur_ppc_sys_spec->device_list[i];
> - if ((dev_id != -1) ||
> + if ((dev_id != -1) &&
> (cur_ppc_sys_spec->config[dev_id] & PPC_SYS_CONFIG_ENABED)) {
> if (ppc_sys_device_fixup != NULL)
> ppc_sys_device_fixup(&ppc_sys_platform_devices
> diff --git a/drivers/base/platform.c b/drivers/base/platform.c
> index 8827daf..ce551b5 100644
> --- a/drivers/base/platform.c
> +++ b/drivers/base/platform.c
> @@ -266,7 +266,7 @@ int platform_device_add(struct platform_
> }
> }
>
> - pr_debug("Registering platform device '%s'. Parent at %s\n",
> + pr_info("Registering platform device '%s'. Parent at %s\n",
> pdev->dev.bus_id, pdev->dev.parent->bus_id);
>
> ret = device_register(&pdev->dev);
Suppose that all this hunks belong to a different patch?
^ permalink raw reply
* Re: [PATCH 1/2] ppc32: Make platform devices being able to assign functions (resend)
From: Marcelo Tosatti @ 2005-12-29 20:31 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-embedded list
In-Reply-To: <43B43EE4.6010900@secretlab.ca>
On Thu, Dec 29, 2005 at 12:54:12PM -0700, Grant Likely wrote:
> Marcelo Tosatti wrote:
> > Hi Vitaly,
> >
> > On Wed, Dec 28, 2005 at 11:04:32PM +0300, Vitaly Bordug wrote:
> >
> >>Implemented by modification of the .name field of the platform device,
> >>when PDs with the
> >>same names are to be used within different drivers, as
> >><device_name> -> <device_name>:<function>
> >>Corresponding drivers should change the .name in struct device_driver to
> >>reflect upper of course.
> >
> >
> > I'm not certain that the <device_name>:<function> structure for sysfs
> > representation is "allowed" - have you asked GregKH about it?
> >
> >
> He didn't seem to have any problem with it when we talked about it at
> OLS. Also, ':' is already used by the PCI bus driver. Look in
> /sys/class/pci_bus.
Fine then, thanks Grant.
^ permalink raw reply
* [PATCH] powerpc: generalize PPC44x_PIN_SIZE
From: Marcelo Tosatti @ 2005-12-29 20:40 UTC (permalink / raw)
To: Matt Porter; +Cc: linux-ppc-embedded
Hi,
The following patch generalizes PPC44x_PIN_SIZE by changing it to
PPC_PIN_SIZE, which can be defined by any board to automatically adjust
VMALLOC_START, avoiding conflicts with pinned virtual space.
Also define it for 8xx.
Matt, please review.
diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c
index 3d79ce2..e0152a9 100644
--- a/arch/ppc/mm/44x_mmu.c
+++ b/arch/ppc/mm/44x_mmu.c
@@ -104,7 +104,7 @@ unsigned long __init mmu_mapin_ram(void)
/* Determine number of entries necessary to cover lowmem */
pinned_tlbs = (unsigned int)
- (_ALIGN(total_lowmem, PPC44x_PIN_SIZE) >> PPC44x_PIN_SHIFT);
+ (_ALIGN(total_lowmem, PPC_PIN_SIZE) >> PPC44x_PIN_SHIFT);
/* Write upper watermark to save location */
tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
@@ -112,7 +112,7 @@ unsigned long __init mmu_mapin_ram(void)
/* If necessary, set additional pinned TLBs */
if (pinned_tlbs > 1)
for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) {
- unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC44x_PIN_SIZE;
+ unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC_PIN_SIZE;
ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr);
}
diff --git a/include/asm-ppc/ibm44x.h b/include/asm-ppc/ibm44x.h
index f835066..3acc382 100644
--- a/include/asm-ppc/ibm44x.h
+++ b/include/asm-ppc/ibm44x.h
@@ -29,7 +29,7 @@
/* TLB entry offset/size used for pinning kernel lowmem */
#define PPC44x_PIN_SHIFT 28
-#define PPC44x_PIN_SIZE (1 << PPC44x_PIN_SHIFT)
+#define PPC_PIN_SIZE (1 << PPC44x_PIN_SHIFT)
/* Lowest TLB slot consumed by the default pinned TLBs */
#define PPC44x_LOW_SLOT 63
diff --git a/include/asm-ppc/mpc8xx.h b/include/asm-ppc/mpc8xx.h
index 46f159c..73ec9a6 100644
--- a/include/asm-ppc/mpc8xx.h
+++ b/include/asm-ppc/mpc8xx.h
@@ -113,6 +113,8 @@ enum ppc_sys_devices {
MPC8xx_CPM_USB,
};
+#define PPC_PIN_SIZE (24 * 1024 * 1024) /* 24Mbytes of data pinned */
+
#ifndef BOARD_CHIP_NAME
#define BOARD_CHIP_NAME ""
#endif
diff --git a/include/asm-ppc/pgtable.h b/include/asm-ppc/pgtable.h
index 6d1c39e..3f8c38e 100644
--- a/include/asm-ppc/pgtable.h
+++ b/include/asm-ppc/pgtable.h
@@ -12,6 +12,7 @@
#include <asm/processor.h> /* For TASK_SIZE */
#include <asm/mmu.h>
#include <asm/page.h>
+#include <asm/irq.h> /* For sub-arch specific PPC_PIN_SIZE */
struct mm_struct;
extern unsigned long va_to_phys(unsigned long address);
@@ -127,9 +128,8 @@ extern unsigned long ioremap_bot, iorema
* of RAM. -- Cort
*/
#define VMALLOC_OFFSET (0x1000000) /* 16M */
-#ifdef CONFIG_44x
-#include <asm/ibm44x.h>
-#define VMALLOC_START (((_ALIGN((long)high_memory, PPC44x_PIN_SIZE) + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)))
+#ifdef PPC_PIN_SIZE
+#define VMALLOC_START (((_ALIGN((long)high_memory, PPC_PIN_SIZE) + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)))
#else
#define VMALLOC_START ((((long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1)))
#endif
^ permalink raw reply related
* Re: [PATCH] ppc32 8xx: last two 8MB D-TLB entries are incorrectly set
From: Marcelo Tosatti @ 2005-12-29 20:42 UTC (permalink / raw)
To: linux-ppc-embedded, Dan Malek
In-Reply-To: <20051222195221.GA9494@dmt.cnet>
On Thu, Dec 22, 2005 at 05:52:21PM -0200, Marcelo Tosatti wrote:
> Hi,
>
> The last two 8MB TLB entries are being incorrectly set by initial_mmu on 8xx.
>
> The first entry is written with the same virtual/physical address, which
> renders it invalid:
>
> BDI>rms 792 0x00001e00
> BDI>rms 824 1
> BDI>rds 824
> SPR 824 : 0xc08000c0 -1065353024
> BDI>rds 825
> SPR 825 : 0xc0800de0 -1065349664
> BDI>rds 826
> SPR 826 : 0x00000000 0
>
> And the second entry, in addition, does not have its TLB index set
> correctly.
>
> Dan, I'm afraid that, with this problem fixed, the issue you mentioned
> before with relation to conflicts with the vmalloc space becomes real.
>
> * only pin available RAM at initial_mmu, the pinned mappings pointing
> beyond the end of physical RAM cause conflicts with vmalloc() space.
>
> Is there any way to know the RAM size at this point in boot? The bd_t
> structure is board-specific, so no chance at offseting bd_t to reach the
> "mem_size" field.
None of this is necessary, we only need to define VMALLOC_START such
that it won't conflict with pinned space, as the Book-E 44x port already
does.
^ permalink raw reply
* [PATCH] Use 8MB D-TLB entries for kernel static mapping
From: Marcelo Tosatti @ 2005-12-29 20:51 UTC (permalink / raw)
To: linux-ppc-embedded, Dan Malek
Hi,
The following patch implements support for instantiation of 8MB D-TLB
entries for the kernel direct virtual mapping on 8xx, thus reducing TLB
space consumed for the kernel.
Test used: writing 40MB from /dev/zero to file in ext2fs over
RAMDISK.
$ time dd if=/dev/zero of=file bs=4k count=10000
VANILLA 8MB kernel data pages
real 0m11.485s real 0m11.267s
user 0m0.218s user 0m0.250s
sys 0m8.939s sys 0m9.108s
real 0m11.518s real 0m10.978s
user 0m0.203s user 0m0.222s
sys 0m9.585s sys 0m9.138s
real 0m11.554s real 0m10.967s
user 0m0.228s user 0m0.222s
sys 0m9.497s sys 0m9.127s
real 0m11.633s real 0m11.286s
user 0m0.214s user 0m0.196s
sys 0m9.529s sys 0m9.134s
and averages for both:
real 11.54750 real 11.12450
Which is a 3.6% improvement in execution time. More improvement is
expected for loads with larger kernel data footprint (real workloads).
Dan, could you please review the code.
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index de09787..fe25f3f 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -375,6 +375,14 @@ DataStoreTLBMiss:
lis r11, swapper_pg_dir@h
ori r11, r11, swapper_pg_dir@l
rlwimi r10, r11, 0, 2, 19
+ stw r12, 16(r0)
+ mflr r12
+ stw r12, 20(r0) /* save LR */
+ lis r3, LoadLargeDTLB@h
+ ori r3, r3, LoadLargeDTLB@l
+ tophys (r3, r3)
+ mtlr r3
+ blr
3:
lwz r11, 0(r10) /* Get the level 1 entry */
rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
@@ -430,6 +438,83 @@ DataStoreTLBMiss:
InstructionTLBError:
b InstructionAccess
+LoadLargeDTLB:
+ li r12, 0
+ lwz r11, 0(r10) /* Get the level 1 entry */
+ rlwinm. r10, r11,0,0,19 /* Extract page descriptor page address */
+ beq 3f /* If zero, don't try to find a pte */
+
+ /* We have a pte table, so load fetch the pte from the table.
+ */
+ ori r11, r11, 1 /* Set valid bit in physical L2 page */
+ DO_8xx_CPU6(0x3b80, r3)
+ mtspr SPRN_MD_TWC, r11 /* Load pte table base address */
+ mfspr r10, SPRN_MD_TWC /* ....and get the pte address */
+ lwz r10, 0(r10) /* Get the pte */
+
+ /* Insert the Guarded flag into the TWC from the Linux PTE.
+ * It is bit 27 of both the Linux PTE and the TWC (at least
+ * I got that right :-). It will be better when we can put
+ * this into the Linux pgd/pmd and load it in the operation
+ * above.
+ */
+ rlwimi r11, r10, 0, 27, 27
+
+ rlwimi r12, r10, 0, 0, 9 /* extract phys. addr */
+ mfspr r3, SPRN_MD_EPN
+ rlwinm r3, r3, 0, 0, 9 /* extract virtual address */
+ tophys(r3, r3)
+ cmpw r3, r12 /* only use 8M page if it is a direct
+ kernel mapping */
+ bne 1f
+ ori r11, r11, MD_PS8MEG
+ li r12, 1
+ b 2f
+1:
+ li r12, 0 /* can't use 8MB TLB, so zero r12. */
+2:
+ DO_8xx_CPU6(0x3b80, r3)
+ mtspr SPRN_MD_TWC, r11
+
+ /* The Linux PTE won't go exactly into the MMU TLB.
+ * Software indicator bits 21, 22 and 28 must be clear.
+ * Software indicator bits 24, 25, 26, and 27 must be
+ * set. All other Linux PTE bits control the behavior
+ * of the MMU.
+ */
+3: li r11, 0x00f0
+ rlwimi r10, r11, 0, 24, 28 /* Set 24-27, clear 28 */
+ cmpwi r12, 1
+ bne 4f
+ ori r10, r10, 0x8
+
+ mfspr r12, SPRN_MD_EPN
+ lis r3, 0xff80 /* 10-19 must be clear for 8MB TLB */
+ ori r3, r3, 0x0fff
+ and r12, r3, r12
+ DO_8xx_CPU6(0x3780, r3)
+ mtspr SPRN_MD_EPN, r12
+
+ lis r3, 0xff80 /* 10-19 must be clear for 8MB TLB */
+ ori r3, r3, 0x0fff
+ and r10, r3, r10
+4:
+ DO_8xx_CPU6(0x3d80, r3)
+ mtspr SPRN_MD_RPN, r10 /* Update TLB entry */
+
+ mfspr r10, SPRN_M_TW /* Restore registers */
+ lwz r11, 0(r0)
+ mtcr r11
+ lwz r11, 4(r0)
+
+ lwz r12, 20(r0)
+ mtlr r12 /* Restore LR */
+ lwz r12, 16(r0)
+#ifdef CONFIG_8xx_CPU6
+ lwz r3, 8(r0)
+#endif
+ rfi
+
/* This is the data TLB error on the MPC8xx. This could be due to
* many reasons, including a dirty update to a pte. We can catch that
* one here, but anything else is an error. First, we track down the
^ permalink raw reply related
* Re: eldk bug?how to fix
From: Theo Gjaltema @ 2005-12-29 21:48 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <4440987.1134894054475.JavaMail.postfix@mx3.mail.sohu.com>
Hmm...
I've seen these messages before. They were gone when I compiled using
ppc_8xx-gcc compiler of a different ELDK version.
What version of ELDK are you using? Which gcc version?
Succes,
Theo Gjaltema.
zengshuai@sogou.com schreef:
>[root@localhost atmlz]# ppc_6xx-gcc -c -o temp atm_aalx.c
>atm_aalx.c: In function `main':
>atm_aalx.c:201: warning: return type of `main' is not `int'
>/tmp/cciJlehe.s: Assembler messages:
>/tmp/cciJlehe.s:916: Error: unsupported relocation against r3
>/tmp/cciJlehe.s:917: Error: unsupported relocation against r3
>/tmp/cciJlehe.s:917: Error: unsupported relocation against r3
>/tmp/cciJlehe.s:918: Error: unsupported relocation against r3
>/tmp/cciJlehe.s:918: Error: unsupported relocation against r3
>/tmp/cciJlehe.s:919: Error: unsupported relocation against r3
>/tmp/cciJlehe.s:3655: Error: unsupported relocation against r3
>[root@localhost atmlz]# ppc_6xx-gcc -S -o temp.s atm_aalx.c
>[root@localhost atmlz]# vi temp.s
>...................
> stw 0,4(9)
>.L36:
>#APP
> mfmsr r3
> ori r3,r3,0x8000
> andi. r3,r3,0xffbf
> mtmsr r3
>#NO_APP
> lwz 11,0(1)
>..............................
>I must change those "r3" to "3" manually.
>How to fix?
>
>------------------------------
>我现在使用Sogou.com的2G邮箱了，你也来试试吧!
>http://mail.sogou.com/recommend/sogoumail_invite_reg1.jsp?from=sogouinvitation&s_EMAIL=zengshuai%40sogou.com&username=linuxppc-embedded&FullName=linuxppc-embedded&Email=linuxppc-embedded%40ozlabs.org&verify=755eff4e640bdcfc57d93cbd8b0a9cb7
>
>_______________________________________________
>Linuxppc-embedded mailing list
>Linuxppc-embedded@ozlabs.org
>https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
>
^ permalink raw reply
* MPC8245 platform
From: siman @ 2005-12-30 1:44 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <20051229205134.9F4436898E@ozlabs.org>
Hi All:
Did anybody have MPC8245 patch on any kernel version? Please give me some
advise. Thanks.
I found the prpmc610(with mpc8245) could not be init by the Linux kernel.
Thanks.
^ permalink raw reply
* Re: MPC8245 platform
From: Daniel Ann @ 2005-12-30 1:44 UTC (permalink / raw)
To: siman; +Cc: linuxppc-embedded
In-Reply-To: <000d01c60ce2$a7ee1ca0$1200a8c0@xbh>
You should try selecting sandpoint as your platform. That's using MPC8245.
Cheers,
Dan.
On 12/30/05, siman <siman@bsysjob.sharella.com> wrote:
> Hi All:
> Did anybody have MPC8245 patch on any kernel version? Please give me some
> advise. Thanks.
> I found the prpmc610(with mpc8245) could not be init by the Linux kernel.
> Thanks.
>
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
--
Daniel
^ permalink raw reply
* Migrate vxworks bsp to linux
From: siman @ 2005-12-30 2:26 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <20051229205134.9F4436898E@ozlabs.org>
Hi All:
I have the prpmc610 borad(with MPC8245), I have the board's vxworks bsp, did
anybody have experience to migrate from the vxworks to Linux system? I
think the main problem is initial the boards.
Thank all.
Siman
^ permalink raw reply
* Re: Porting Linux2.6.13 on MPC860T custom build board
From: venkatajagadeesh p @ 2005-12-30 4:44 UTC (permalink / raw)
To: linuxppc-embedded, Sinan Akman
[-- Attachment #1: Type: text/plain, Size: 17250 bytes --]
We are seinding the details of porting Linux on MPC860T.
Initially we have enabled all the SMC/SCC devices these are conflicting with the console, the boot loader argument was wrong( connsole=ttyS1,57600 console=tty1 root=/dev/ram),and we have enabled CONFIG_VT.
Modifications :
We have selected only SMC2, and changed the boot loader argument to connsole=ttyCPM2,57600 root=/dev/ram , and modified the drivers/char/Kconfig file
( original lines )
config VT
bool "Virtual terminal" if EMBEDDED
select INPUT
default y if !VIOCONS
( Modified lines )
config VT
bool "Virtual terminal" if EMBEDDED
select INPUT
default n
These are the only modifications we have done to the config and Kconfig files.
Thanks
Venakta jagadeesh.p
> Hi Sinan Akman
>
> Thanks for Your suggestion, Now linux is up and
> booting. thanks for the community who contributed in this >porting.
> I am glad it worked. I guess my reply to you didn't go >through
>to
>linuxppc-embedded.
>You might want to post the sequence of things you tried, what >worked
>and
>what didn't. This
>way someone else can find it through search, assuming it >wasn't in the
>FAQ already.
> Regards
> Sinan Akman
>
> Thanks and one and all,
> Venkata jagadish.p
>
Sinan Akman <sinan@writeme.com> wrote:
Date: Thu, 29 Dec 2005 02:51:42 -0500
From: Sinan Akman <sinan@writeme.com>
To: venkatajagadeesh p <cpvjagadeesh@yahoo.com>
Subject: Re: Porting Linux2.6.13 on MPC860T custom build board
venkatajagadeesh p wrote:
> venkatajagadeesh p wrote:
> >/
> />/ Hi,
> />/ We are trying to port Linux-2.6.13 on Custom build MPC860T,
> board,
> />/ We are unable to see any messages on console. We got the output given
> />/ below. Please help us in porting the kernel.
> />/ I am attaching the config file .
> />/
> />/ =>bootm 0x100000
> />/ ## Booting image at 00100000 ...
> />/ Image Name: Linux-2.6.13
> />/ Image Type: PowerPC Linux Kernel Image (gzip compressed)
> />/ Data Size: 958189 Bytes = 935.7 kB
> />/ Load Address: 00000000
> />/ Entry Point: 00000000
> />/ Verifying Checksum ... OK
> />/ Uncompressing Kernel Image ... gunzip function called
> />/ OK
> />/ do_bootm_linux called ...do_bootm_linux after ...part2 do_boot_linux
> />/ before RAM
> />/ Disk image loading ...
> />/ No initrd
> />/ ## Transferring control to Linux (at address 00000000) ...
> />/
> /> >Most probably, something odd with serial setup.
> > >You have enabled just all the stuff (SCC/SMC), but (on 8xx at least)
> >>they can hardly live together, having alternative - conflicting IO
> pin configurations.
>
> We enabling only SMC2, still it is showing the same problem. In U-boot
> loader we have modified the default console to SMC2. We have not done
> any modifications to the original linux-2.6.13 code.
>
> I am sending config file as an attachment.
Try unsetting VT_CONSOLE. That is, uncheck "Support for console on
virtual terminal" in
Character Devices. It looks like your console output is directed to a
VT. You might also
want to specify console=ttyCPM2 in your bootloader argument.
Hope this helps
-- sinan
>
> I am sending U-boot env varibles also
>
> =>printenv
> bootcmd=bootm;setenv bootargs root=/dev/ram rw
> bootdelay=5
> baudrate=57600
> loads_echo=1
> ethaddr=9a:52:63:15:85:25
> bootfile=uImage
> filesize=95f0a
> ipaddr=192.168.3.2
> serverip=192.168.3.6
> netdev=eth0
> netmask=255.255.255.0
> addip=setenv bootargs ${bootargs}
> ip=${ipaddr}:${serverip}:${gatewayip}:${netmas
> k}:${hostname}:${netdev}:off
> ramargs=setenv bootargs root=/dev/ram rw
> kernel_addr=0xfc0a0000
> ramdisk_addr=0xfc160000
> flash_ram=run ramargs addip;bootm 0xfc0a0000 0xfc160000
> net_ram=tftpboot 0x100000 uImage;tftpboot 0x400000 rambb2;run ramargs
> addip;boot
> m 0x100000 0x400000
> stdin=serial
> stdout=serial
> stderr=serial
> bootargs=root=/dev/ram rw
> Environment size: 638/262140 bytes
>
>
>
> ------------------------------------------------------------------------
> Yahoo! Photos
> Ring in the New Year with Photo Calendars
> .
> Add photos, events, holidays, whatever.
>
>------------------------------------------------------------------------
>
>#
># Automatically generated make config: don't edit
># Linux kernel version: 2.6.13
># Thu Dec 29 10:54:14 2005
>#
>CONFIG_MMU=y
>CONFIG_GENERIC_HARDIRQS=y
>CONFIG_RWSEM_XCHGADD_ALGORITHM=y
>CONFIG_GENERIC_CALIBRATE_DELAY=y
>CONFIG_HAVE_DEC_LOCK=y
>CONFIG_PPC=y
>CONFIG_PPC32=y
>CONFIG_GENERIC_NVRAM=y
>CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
>
>#
># Code maturity level options
>#
>CONFIG_EXPERIMENTAL=y
>CONFIG_CLEAN_COMPILE=y
>CONFIG_BROKEN_ON_SMP=y
>CONFIG_INIT_ENV_ARG_LIMIT=32
>
>#
># General setup
>#
>CONFIG_LOCALVERSION=""
># CONFIG_SWAP is not set
>CONFIG_SYSVIPC=y
># CONFIG_POSIX_MQUEUE is not set
># CONFIG_BSD_PROCESS_ACCT is not set
>CONFIG_SYSCTL=y
># CONFIG_AUDIT is not set
># CONFIG_HOTPLUG is not set
>CONFIG_KOBJECT_UEVENT=y
># CONFIG_IKCONFIG is not set
># CONFIG_EMBEDDED is not set
>CONFIG_KALLSYMS=y
># CONFIG_KALLSYMS_EXTRA_PASS is not set
>CONFIG_PRINTK=y
>CONFIG_BUG=y
>CONFIG_BASE_FULL=y
>CONFIG_FUTEX=y
>CONFIG_EPOLL=y
>CONFIG_SHMEM=y
>CONFIG_CC_ALIGN_FUNCTIONS=0
>CONFIG_CC_ALIGN_LABELS=0
>CONFIG_CC_ALIGN_LOOPS=0
>CONFIG_CC_ALIGN_JUMPS=0
># CONFIG_TINY_SHMEM is not set
>CONFIG_BASE_SMALL=0
>
>#
># Loadable module support
>#
># CONFIG_MODULES is not set
>
>#
># Processor
>#
># CONFIG_6xx is not set
># CONFIG_40x is not set
># CONFIG_44x is not set
># CONFIG_POWER3 is not set
># CONFIG_POWER4 is not set
>CONFIG_8xx=y
># CONFIG_E200 is not set
># CONFIG_E500 is not set
># CONFIG_MATH_EMULATION is not set
># CONFIG_KEXEC is not set
># CONFIG_CPU_FREQ is not set
># CONFIG_WANT_EARLY_SERIAL is not set
>CONFIG_EMBEDDEDBOOT=y
>CONFIG_NOT_COHERENT_CACHE=y
>
>#
># Platform options
>#
>CONFIG_FADS=y
># CONFIG_RPXLITE is not set
># CONFIG_RPXCLASSIC is not set
># CONFIG_BSEIP is not set
>CONFIG_MPC8XXFADS=y
># CONFIG_MPC86XADS is not set
># CONFIG_MPC885ADS is not set
># CONFIG_TQM823L is not set
># CONFIG_TQM850L is not set
># CONFIG_TQM855L is not set
># CONFIG_TQM860L is not set
># CONFIG_FPS850L is not set
># CONFIG_SPD823TS is not set
># CONFIG_IVMS8 is not set
># CONFIG_IVML24 is not set
># CONFIG_SM850 is not set
># CONFIG_HERMES_PRO is not set
># CONFIG_IP860 is not set
># CONFIG_LWMON is not set
># CONFIG_PCU_E is not set
># CONFIG_CCM is not set
># CONFIG_LANTEC is not set
># CONFIG_MBX is not set
># CONFIG_WINCEPT is not set
># CONFIG_HIGHMEM is not set
>CONFIG_HZ_100=y
># CONFIG_HZ_250 is not set
># CONFIG_HZ_1000 is not set
>CONFIG_HZ=100
>CONFIG_PREEMPT_NONE=y
># CONFIG_PREEMPT_VOLUNTARY is not set
># CONFIG_PREEMPT is not set
>CONFIG_SELECT_MEMORY_MODEL=y
>CONFIG_FLATMEM_MANUAL=y
># CONFIG_DISCONTIGMEM_MANUAL is not set
># CONFIG_SPARSEMEM_MANUAL is not set
>CONFIG_FLATMEM=y
>CONFIG_FLAT_NODE_MEM_MAP=y
>CONFIG_BINFMT_ELF=y
># CONFIG_BINFMT_MISC is not set
>CONFIG_CMDLINE_BOOL=y
>CONFIG_CMDLINE="console=ttyS1,57600 console=tty1 root=/dev/ram"
># CONFIG_PM is not set
>CONFIG_SECCOMP=y
>CONFIG_ISA_DMA_API=y
>
>#
># Bus options
>#
># CONFIG_PCI is not set
># CONFIG_PCI_DOMAINS is not set
># CONFIG_PCI_QSPAN is not set
>
>#
># PCCARD (PCMCIA/CardBus) support
>#
># CONFIG_PCCARD is not set
>
>#
># Advanced setup
>#
># CONFIG_ADVANCED_OPTIONS is not set
>
>#
># Default settings for advanced configuration options are used
>#
>CONFIG_HIGHMEM_START=0xfe000000
>CONFIG_LOWMEM_SIZE=0x30000000
>CONFIG_KERNEL_START=0xc0000000
>CONFIG_TASK_SIZE=0x80000000
>CONFIG_CONSISTENT_START=0xff100000
>CONFIG_CONSISTENT_SIZE=0x00200000
>CONFIG_BOOT_LOAD=0x00400000
>
>#
># Networking
>#
>CONFIG_NET=y
>
>#
># Networking options
>#
>CONFIG_PACKET=y
>CONFIG_PACKET_MMAP=y
>CONFIG_UNIX=y
># CONFIG_NET_KEY is not set
>CONFIG_INET=y
># CONFIG_IP_MULTICAST is not set
># CONFIG_IP_ADVANCED_ROUTER is not set
>CONFIG_IP_FIB_HASH=y
>CONFIG_IP_PNP=y
>CONFIG_IP_PNP_DHCP=y
>CONFIG_IP_PNP_BOOTP=y
>CONFIG_IP_PNP_RARP=y
># CONFIG_NET_IPIP is not set
># CONFIG_NET_IPGRE is not set
>CONFIG_ARPD=y
># CONFIG_SYN_COOKIES is not set
># CONFIG_INET_AH is not set
># CONFIG_INET_ESP is not set
># CONFIG_INET_IPCOMP is not set
># CONFIG_INET_TUNNEL is not set
>CONFIG_IP_TCPDIAG=y
>CONFIG_IP_TCPDIAG_IPV6=y
># CONFIG_TCP_CONG_ADVANCED is not set
>CONFIG_TCP_CONG_BIC=y
>CONFIG_IPV6=y
># CONFIG_IPV6_PRIVACY is not set
># CONFIG_INET6_AH is not set
># CONFIG_INET6_ESP is not set
># CONFIG_INET6_IPCOMP is not set
># CONFIG_INET6_TUNNEL is not set
># CONFIG_IPV6_TUNNEL is not set
># CONFIG_NETFILTER is not set
>
>#
># SCTP Configuration (EXPERIMENTAL)
>#
># CONFIG_IP_SCTP is not set
># CONFIG_ATM is not set
>CONFIG_BRIDGE=y
># CONFIG_VLAN_8021Q is not set
># CONFIG_DECNET is not set
># CONFIG_LLC2 is not set
># CONFIG_IPX is not set
># CONFIG_ATALK is not set
># CONFIG_X25 is not set
># CONFIG_LAPB is not set
># CONFIG_NET_DIVERT is not set
># CONFIG_ECONET is not set
># CONFIG_WAN_ROUTER is not set
># CONFIG_NET_SCHED is not set
># CONFIG_NET_CLS_ROUTE is not set
>
>#
># Network testing
>#
># CONFIG_NET_PKTGEN is not set
># CONFIG_HAMRADIO is not set
># CONFIG_IRDA is not set
># CONFIG_BT is not set
>
>#
># Device Drivers
>#
>
>#
># Generic Driver Options
>#
>CONFIG_STANDALONE=y
>CONFIG_PREVENT_FIRMWARE_BUILD=y
># CONFIG_FW_LOADER is not set
>
>#
># Memory Technology Devices (MTD)
>#
># CONFIG_MTD is not set
>
>#
># Parallel port support
>#
># CONFIG_PARPORT is not set
>
>#
># Plug and Play support
>#
>
>#
># Block devices
>#
># CONFIG_BLK_DEV_FD is not set
># CONFIG_BLK_DEV_COW_COMMON is not set
># CONFIG_BLK_DEV_LOOP is not set
># CONFIG_BLK_DEV_NBD is not set
>CONFIG_BLK_DEV_RAM=y
>CONFIG_BLK_DEV_RAM_COUNT=16
>CONFIG_BLK_DEV_RAM_SIZE=4096
>CONFIG_BLK_DEV_INITRD=y
>CONFIG_INITRAMFS_SOURCE=""
># CONFIG_LBD is not set
># CONFIG_CDROM_PKTCDVD is not set
>
>#
># IO Schedulers
>#
>CONFIG_IOSCHED_NOOP=y
># CONFIG_IOSCHED_AS is not set
># CONFIG_IOSCHED_DEADLINE is not set
># CONFIG_IOSCHED_CFQ is not set
># CONFIG_ATA_OVER_ETH is not set
>
>#
># ATA/ATAPI/MFM/RLL support
>#
># CONFIG_IDE is not set
>
>#
># SCSI device support
>#
># CONFIG_SCSI is not set
>
>#
># Multi-device support (RAID and LVM)
>#
># CONFIG_MD is not set
>
>#
># Fusion MPT device support
>#
># CONFIG_FUSION is not set
>
>#
># IEEE 1394 (FireWire) support
>#
>
>#
># I2O device support
>#
>
>#
># Macintosh device drivers
>#
>
>#
># Network device support
>#
>CONFIG_NETDEVICES=y
># CONFIG_DUMMY is not set
># CONFIG_BONDING is not set
># CONFIG_EQUALIZER is not set
># CONFIG_TUN is not set
>
>#
># Ethernet (10 or 100Mbit)
>#
>CONFIG_NET_ETHERNET=y
>CONFIG_MII=y
>
>#
># Ethernet (1000 Mbit)
>#
>
>#
># Ethernet (10000 Mbit)
>#
>
>#
># Token Ring devices
>#
>
>#
># Wireless LAN (non-hamradio)
>#
># CONFIG_NET_RADIO is not set
>
>#
># Wan interfaces
>#
># CONFIG_WAN is not set
># CONFIG_PPP is not set
># CONFIG_SLIP is not set
># CONFIG_SHAPER is not set
># CONFIG_NETCONSOLE is not set
># CONFIG_NETPOLL is not set
># CONFIG_NET_POLL_CONTROLLER is not set
>
>#
># ISDN subsystem
>#
># CONFIG_ISDN is not set
>
>#
># Telephony Support
>#
># CONFIG_PHONE is not set
>
>#
># Input device support
>#
>CONFIG_INPUT=y
>
>#
># Userland interfaces
>#
>CONFIG_INPUT_MOUSEDEV=y
>CONFIG_INPUT_MOUSEDEV_PSAUX=y
>CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
>CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
># CONFIG_INPUT_JOYDEV is not set
># CONFIG_INPUT_TSDEV is not set
># CONFIG_INPUT_EVDEV is not set
># CONFIG_INPUT_EVBUG is not set
>
>#
># Input Device Drivers
>#
># CONFIG_INPUT_KEYBOARD is not set
># CONFIG_INPUT_MOUSE is not set
># CONFIG_INPUT_JOYSTICK is not set
># CONFIG_INPUT_TOUCHSCREEN is not set
># CONFIG_INPUT_MISC is not set
>
>#
># Hardware I/O ports
>#
># CONFIG_SERIO is not set
># CONFIG_GAMEPORT is not set
>
>#
># Character devices
>#
>CONFIG_VT=y
>CONFIG_VT_CONSOLE=y
>CONFIG_HW_CONSOLE=y
>CONFIG_SERIAL_NONSTANDARD=y
># CONFIG_COMPUTONE is not set
># CONFIG_ROCKETPORT is not set
># CONFIG_CYCLADES is not set
># CONFIG_DIGIEPCA is not set
># CONFIG_MOXA_INTELLIO is not set
># CONFIG_MOXA_SMARTIO is not set
># CONFIG_ISI is not set
># CONFIG_SYNCLINKMP is not set
># CONFIG_N_HDLC is not set
># CONFIG_RISCOM8 is not set
># CONFIG_SPECIALIX is not set
># CONFIG_SX is not set
># CONFIG_RIO is not set
># CONFIG_STALDRV is not set
>
>#
># Serial drivers
>#
># CONFIG_SERIAL_8250 is not set
>
>#
># Non-8250 serial port support
>#
>CONFIG_SERIAL_CORE=y
>CONFIG_SERIAL_CORE_CONSOLE=y
>CONFIG_SERIAL_CPM=y
>CONFIG_SERIAL_CPM_CONSOLE=y
># CONFIG_SERIAL_CPM_SCC1 is not set
># CONFIG_SERIAL_CPM_SCC2 is not set
># CONFIG_SERIAL_CPM_SCC3 is not set
># CONFIG_SERIAL_CPM_SCC4 is not set
># CONFIG_SERIAL_CPM_SMC1 is not set
>CONFIG_SERIAL_CPM_SMC2=y
>CONFIG_UNIX98_PTYS=y
># CONFIG_LEGACY_PTYS is not set
>
>#
># IPMI
>#
># CONFIG_IPMI_HANDLER is not set
>
>#
># Watchdog Cards
>#
># CONFIG_WATCHDOG is not set
># CONFIG_NVRAM is not set
># CONFIG_GEN_RTC is not set
># CONFIG_DTLK is not set
># CONFIG_R3964 is not set
>
>#
># Ftape, the floppy tape device driver
>#
># CONFIG_AGP is not set
># CONFIG_RAW_DRIVER is not set
>
>#
># TPM devices
>#
>
>#
># I2C support
>#
># CONFIG_I2C is not set
># CONFIG_I2C_SENSOR is not set
>
>#
># Dallas's 1-wire bus
>#
># CONFIG_W1 is not set
>
>#
># Hardware Monitoring support
>#
># CONFIG_HWMON is not set
>
>#
># Misc devices
>#
>
>#
># Multimedia devices
>#
># CONFIG_VIDEO_DEV is not set
>
>#
># Digital Video Broadcasting Devices
>#
># CONFIG_DVB is not set
>
>#
># Graphics support
>#
># CONFIG_FB is not set
>
>#
># Console display driver support
>#
>CONFIG_DUMMY_CONSOLE=y
>
>#
># Sound
>#
># CONFIG_SOUND is not set
>
>#
># USB support
>#
># CONFIG_USB_ARCH_HAS_HCD is not set
># CONFIG_USB_ARCH_HAS_OHCI is not set
>
>#
># USB Gadget Support
>#
># CONFIG_USB_GADGET is not set
>
>#
># MMC/SD Card support
>#
># CONFIG_MMC is not set
>
>#
># InfiniBand support
>#
>
>#
># SN Devices
>#
>
>#
># File systems
>#
>CONFIG_EXT2_FS=y
>CONFIG_EXT2_FS_XATTR=y
>CONFIG_EXT2_FS_POSIX_ACL=y
>CONFIG_EXT2_FS_SECURITY=y
>CONFIG_EXT2_FS_XIP=y
>CONFIG_FS_XIP=y
># CONFIG_EXT3_FS is not set
># CONFIG_JBD is not set
>CONFIG_FS_MBCACHE=y
># CONFIG_REISERFS_FS is not set
># CONFIG_JFS_FS is not set
>CONFIG_FS_POSIX_ACL=y
>
>#
># XFS support
>#
># CONFIG_XFS_FS is not set
># CONFIG_MINIX_FS is not set
>CONFIG_ROMFS_FS=y
>CONFIG_INOTIFY=y
># CONFIG_QUOTA is not set
>CONFIG_DNOTIFY=y
># CONFIG_AUTOFS_FS is not set
># CONFIG_AUTOFS4_FS is not set
>
>#
># CD-ROM/DVD Filesystems
>#
># CONFIG_ISO9660_FS is not set
># CONFIG_UDF_FS is not set
>
>#
># DOS/FAT/NT Filesystems
>#
># CONFIG_MSDOS_FS is not set
># CONFIG_VFAT_FS is not set
># CONFIG_NTFS_FS is not set
>
>#
># Pseudo filesystems
>#
>CONFIG_PROC_FS=y
># CONFIG_PROC_KCORE is not set
>CONFIG_SYSFS=y
># CONFIG_DEVPTS_FS_XATTR is not set
># CONFIG_TMPFS is not set
># CONFIG_HUGETLB_PAGE is not set
>CONFIG_RAMFS=y
>
>#
># Miscellaneous filesystems
>#
># CONFIG_ADFS_FS is not set
># CONFIG_AFFS_FS is not set
># CONFIG_HFS_FS is not set
># CONFIG_HFSPLUS_FS is not set
># CONFIG_BEFS_FS is not set
># CONFIG_BFS_FS is not set
># CONFIG_EFS_FS is not set
># CONFIG_CRAMFS is not set
># CONFIG_VXFS_FS is not set
># CONFIG_HPFS_FS is not set
># CONFIG_QNX4FS_FS is not set
># CONFIG_SYSV_FS is not set
># CONFIG_UFS_FS is not set
>
>#
># Network File Systems
>#
>CONFIG_NFS_FS=y
># CONFIG_NFS_V3 is not set
># CONFIG_NFS_V4 is not set
># CONFIG_NFS_DIRECTIO is not set
># CONFIG_NFSD is not set
>CONFIG_ROOT_NFS=y
>CONFIG_LOCKD=y
>CONFIG_NFS_COMMON=y
>CONFIG_SUNRPC=y
># CONFIG_RPCSEC_GSS_KRB5 is not set
># CONFIG_RPCSEC_GSS_SPKM3 is not set
># CONFIG_SMB_FS is not set
># CONFIG_CIFS is not set
># CONFIG_NCP_FS is not set
># CONFIG_CODA_FS is not set
># CONFIG_AFS_FS is not set
>
>#
># Partition Types
>#
># CONFIG_PARTITION_ADVANCED is not set
>CONFIG_MSDOS_PARTITION=y
>
>#
># Native Language Support
>#
># CONFIG_NLS is not set
>
>#
># MPC8xx CPM Options
>#
># CONFIG_SCC_ENET is not set
>CONFIG_FEC_ENET=y
>CONFIG_USE_MDIO=y
>CONFIG_FEC_AM79C874=y
># CONFIG_FEC_LXT970 is not set
># CONFIG_FEC_LXT971 is not set
># CONFIG_FEC_QS6612 is not set
>CONFIG_ENET_BIG_BUFFERS=y
>
>#
># Generic MPC8xx Options
>#
># CONFIG_8xx_COPYBACK is not set
># CONFIG_8xx_CPU6 is not set
>CONFIG_NO_UCODE_PATCH=y
># CONFIG_USB_SOF_UCODE_PATCH is not set
># CONFIG_I2C_SPI_UCODE_PATCH is not set
># CONFIG_I2C_SPI_SMC1_UCODE_PATCH is not set
>
>#
># Library routines
>#
># CONFIG_CRC_CCITT is not set
># CONFIG_CRC32 is not set
># CONFIG_LIBCRC32C is not set
>
>#
># Profiling support
>#
># CONFIG_PROFILING is not set
>
>#
># Kernel hacking
>#
># CONFIG_PRINTK_TIME is not set
># CONFIG_DEBUG_KERNEL is not set
>CONFIG_LOG_BUF_SHIFT=14
>
>#
># Security options
>#
># CONFIG_KEYS is not set
># CONFIG_SECURITY is not set
>
>#
># Cryptographic options
>#
># CONFIG_CRYPTO is not set
>
>#
># Hardware crypto devices
>#
>
>
>------------------------------------------------------------------------
>
>_______________________________________________
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^ permalink raw reply
* Re: Migrate vxworks bsp to linux
From: Wolfgang Denk @ 2005-12-30 8:10 UTC (permalink / raw)
To: siman; +Cc: linuxppc-embedded
In-Reply-To: <001301c60ce8$7b4456a0$1200a8c0@xbh>
In message <001301c60ce8$7b4456a0$1200a8c0@xbh> you wrote:
>
> I have the prpmc610 borad(with MPC8245), I have the board's vxworks bsp, did
> anybody have experience to migrate from the vxworks to Linux system? I
> think the main problem is initial the boards.
You start porting a boot loader, like U-Boot.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
As far as the laws of mathematics refer to reality, they are not
certain; and as far as they are certain, they do not refer to
reality. -- Albert Einstein
^ permalink raw reply
* Re: PowerstackII Utah - PCI IRQ for IDE
From: Sven Luther @ 2005-12-30 10:28 UTC (permalink / raw)
To: Sebastian Heutling; +Cc: linuxppc-dev
In-Reply-To: <43B40BFF.1040809@gmx.de>
On Thu, Dec 29, 2005 at 05:17:03PM +0100, Sebastian Heutling wrote:
> Hello,
>
> I wonder what happened to the PCI IRQ map for the PowerstackII Utah -
> specifically the IDE IRQ. On http://patchwork.ozlabs.org/linuxppc/ I see
> a patch from Sven Luther with a set IDE IRQ line
> (http://patchwork.ozlabs.org/linuxppc//patch?id=1082) but on current
> kernels it doesn't appear. Even on debian the only kernel that had a
> working kernel with IDE for this machine was 2.6.8 but any following
> kernel (up to the current 2.6.14) doesn't include any patch for IDE IRQ.
Oh, nobody i know ever tested it, so i guess i didn't notice when it was
removed or something. Can you file a bug report against the debian kernels,
and confirm the IDE line works ?
BTW, the patch is not from me originally, but from Leigh brown i think.
Friendly,
Sven Luther
^ permalink raw reply
* [PATCH 8/8] Add support for Xilinx ML403 reference design
From: Grant Likely @ 2005-12-30 10:29 UTC (permalink / raw)
To: mporter, linuxppc-embedded
In-Reply-To: <11359385973413-git-send-email-grant.likely@secretlab.ca>
Add support for Xilinx ML403 reference design
Signed-off-by: Grant C. Likely <grant.likely@secretlab.ca>
---
arch/ppc/boot/simple/embed_config.c | 41 +++++
arch/ppc/platforms/4xx/Kconfig | 8 +
arch/ppc/platforms/4xx/Makefile | 2
arch/ppc/platforms/4xx/xilinx_ml403.c | 177 ++++++++++++++++++++++
arch/ppc/platforms/4xx/xilinx_ml403.h | 49 ++++++
arch/ppc/platforms/4xx/xparameters/xparameters.h | 13 ++
include/asm-ppc/ibm4xx.h | 4
7 files changed, 291 insertions(+), 3 deletions(-)
create mode 100644 arch/ppc/platforms/4xx/xilinx_ml403.c
create mode 100644 arch/ppc/platforms/4xx/xilinx_ml403.h
03eaaad1784a4094cecd57f3aafbfe8832742505
diff --git a/arch/ppc/boot/simple/embed_config.c b/arch/ppc/boot/simple/embed_config.c
index df24202..0172eb0 100644
--- a/arch/ppc/boot/simple/embed_config.c
+++ b/arch/ppc/boot/simple/embed_config.c
@@ -745,7 +745,7 @@ embed_config(bd_t **bdp)
}
#endif /* WILLOW */
-#ifdef CONFIG_XILINX_ML300
+#if defined(CONFIG_XILINX_ML300)
void
embed_config(bd_t ** bdp)
{
@@ -784,6 +784,45 @@ embed_config(bd_t ** bdp)
}
#endif /* CONFIG_XILINX_ML300 */
+#if defined(CONFIG_XILINX_ML403)
+void
+embed_config(bd_t ** bdp)
+{
+ static const unsigned long line_size = 32;
+ static const unsigned long congruence_classes = 256;
+ unsigned long addr;
+ unsigned long dccr;
+ bd_t *bd;
+
+ /*
+ * Invalidate the data cache if the data cache is turned off.
+ * - The 405 core does not invalidate the data cache on power-up
+ * or reset but does turn off the data cache. We cannot assume
+ * that the cache contents are valid.
+ * - If the data cache is turned on this must have been done by
+ * a bootloader and we assume that the cache contents are
+ * valid.
+ */
+ __asm__("mfdccr %0": "=r" (dccr));
+ if (dccr == 0) {
+ for (addr = 0;
+ addr < (congruence_classes * line_size);
+ addr += line_size) {
+ __asm__("dccci 0,%0": :"b"(addr));
+ }
+ }
+
+ bd = &bdinfo;
+ *bdp = bd;
+ bd->bi_memsize = XPAR_PLB_DDR_0_MEM0_HIGHADDR + 1;
+ bd->bi_intfreq = XPAR_CPU_PPC405_CORE_CLOCK_FREQ_HZ;
+ bd->bi_busfreq = XPAR_XUARTNS550_CLOCK_HZ;
+ bd->bi_pci_busfreq = 0;
+ timebase_period_ns = 1000000000 / bd->bi_tbfreq;
+ /* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */
+}
+#endif /* CONFIG_XILINX_ML403 */
+
#ifdef CONFIG_IBM_OPENBIOS
/* This could possibly work for all treeboot roms.
*/
diff --git a/arch/ppc/platforms/4xx/Kconfig b/arch/ppc/platforms/4xx/Kconfig
index 266280c..f7a5848 100644
--- a/arch/ppc/platforms/4xx/Kconfig
+++ b/arch/ppc/platforms/4xx/Kconfig
@@ -57,6 +57,10 @@ config XILINX_ML300
help
This option enables support for the Xilinx ML300 evaluation board.
+config XILINX_ML403
+ bool "Xilinx-ML403"
+ help
+ This option enables support for the Xilinx ML403 evaluation board.
endchoice
choice
@@ -194,7 +198,7 @@ config 405GPR
config XILINX_VIRTEX
bool
- depends on XILINX_ML300
+ depends on XILINX_ML300 || XILINX_ML403
default y
config STB03xxx
@@ -204,7 +208,7 @@ config STB03xxx
config EMBEDDEDBOOT
bool
- depends on EP405 || XILINX_ML300
+ depends on EP405 || XILINX_ML300 || XILINX_ML403
default y
config IBM_OPENBIOS
diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile
index 4db749d..9dd5629 100644
--- a/arch/ppc/platforms/4xx/Makefile
+++ b/arch/ppc/platforms/4xx/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_REDWOOD_6) += redwood6.o
obj-$(CONFIG_SYCAMORE) += sycamore.o
obj-$(CONFIG_WALNUT) += walnut.o
obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o
+obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o
obj-$(CONFIG_405GP) += ibm405gp.o
obj-$(CONFIG_REDWOOD_5) += ibmstb4.o
@@ -25,3 +26,4 @@ obj-$(CONFIG_440SP) += ibm440sp.o
obj-$(CONFIG_405EP) += ibm405ep.o
obj-$(CONFIG_405GPR) += ibm405gpr.o
obj-$(CONFIG_XILINX_VIRTEX) += virtex.o
+
diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.c b/arch/ppc/platforms/4xx/xilinx_ml403.c
new file mode 100644
index 0000000..4c0c7e4
--- /dev/null
+++ b/arch/ppc/platforms/4xx/xilinx_ml403.c
@@ -0,0 +1,177 @@
+/*
+ * arch/ppc/platforms/4xx/xilinx_ml403.c
+ *
+ * Xilinx ML403 evaluation board initialization
+ *
+ * Author: Grant Likely <grant.likely@secretlab.ca>
+ *
+ * 2005 (c) Secret Lab Technologies Ltd.
+ * 2002-2004 (c) MontaVista Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#include <linux/config.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/tty.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/serial_8250.h>
+#include <linux/serialP.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ppc_sys.h>
+
+#include <syslib/gen550.h>
+#include <platforms/4xx/xparameters/xparameters.h>
+
+/*
+ * As an overview of how the following functions (platform_init,
+ * ml403_map_io, ml403_setup_arch and ml403_init_IRQ) fit into the
+ * kernel startup procedure, here's a call tree:
+ *
+ * start_here arch/ppc/kernel/head_4xx.S
+ * early_init arch/ppc/kernel/setup.c
+ * machine_init arch/ppc/kernel/setup.c
+ * platform_init this file
+ * ppc4xx_init arch/ppc/syslib/ppc4xx_setup.c
+ * parse_bootinfo
+ * find_bootinfo
+ * "setup some default ppc_md pointers"
+ * MMU_init arch/ppc/mm/init.c
+ * *ppc_md.setup_io_mappings == ml403_map_io this file
+ * ppc4xx_map_io arch/ppc/syslib/ppc4xx_setup.c
+ * start_kernel init/main.c
+ * setup_arch arch/ppc/kernel/setup.c
+ * #if defined(CONFIG_KGDB)
+ * *ppc_md.kgdb_map_scc() == gen550_kgdb_map_scc
+ * #endif
+ * *ppc_md.setup_arch == ml403_setup_arch this file
+ * ppc4xx_setup_arch arch/ppc/syslib/ppc4xx_setup.c
+ * ppc4xx_find_bridges arch/ppc/syslib/ppc405_pci.c
+ * init_IRQ arch/ppc/kernel/irq.c
+ * *ppc_md.init_IRQ == ml403_init_IRQ this file
+ * ppc4xx_init_IRQ arch/ppc/syslib/ppc4xx_setup.c
+ * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c
+ */
+
+/* Board specifications structures */
+struct ppc_sys_spec *cur_ppc_sys_spec;
+struct ppc_sys_spec ppc_sys_specs[] = {
+ {
+ /* Only one entry, always assume the same design */
+ .ppc_sys_name = "Xilinx ML403 Reference Design",
+ .mask = 0x00000000,
+ .value = 0x00000000,
+ .num_devices = 1,
+ .device_list = (enum ppc_sys_devices[])
+ {
+ VIRTEX_UART,
+ },
+ },
+};
+
+#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
+
+static volatile unsigned *powerdown_base =
+ (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR;
+
+static void
+xilinx_power_off(void)
+{
+ local_irq_disable();
+ out_be32(powerdown_base, XPAR_POWER_0_POWERDOWN_VALUE);
+ while (1) ;
+}
+#endif
+
+void __init
+ml403_map_io(void)
+{
+ ppc4xx_map_io();
+
+#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
+ powerdown_base = ioremap((unsigned long) powerdown_base,
+ XPAR_POWER_0_POWERDOWN_HIGHADDR -
+ XPAR_POWER_0_POWERDOWN_BASEADDR + 1);
+#endif
+}
+
+/* Early serial support functions */
+static void __init
+ml403_early_serial_init(int num, struct plat_serial8250_port *pdata)
+{
+#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
+ struct uart_port serial_req;
+
+ memset(&serial_req, 0, sizeof(serial_req));
+ serial_req.mapbase = pdata->mapbase;
+ serial_req.membase = pdata->membase;
+ serial_req.irq = pdata->irq;
+ serial_req.uartclk = pdata->uartclk;
+ serial_req.regshift = pdata->regshift;
+ serial_req.iotype = pdata->iotype;
+ serial_req.flags = pdata->flags;
+ gen550_init(num, &serial_req);
+#endif
+}
+
+void __init
+ml403_early_serial_map(void)
+{
+#ifdef CONFIG_SERIAL_8250
+ struct plat_serial8250_port *pdata;
+ int i = 0;
+
+ pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(VIRTEX_UART);
+ while(pdata && pdata->flags)
+ {
+ pdata->membase = ioremap(pdata->mapbase, 0x100);
+ ml403_early_serial_init(i, pdata);
+ pdata++;
+ i++;
+ }
+#endif /* CONFIG_SERIAL_8250 */
+}
+
+void __init
+ml403_setup_arch(void)
+{
+ ml403_early_serial_map();
+ ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
+
+ /* Identify the system */
+ printk(KERN_INFO "Xilinx ML403 Reference System (Virtex-4 FX)\n");
+}
+
+/* Called after board_setup_irq from ppc4xx_init_IRQ(). */
+void __init
+ml403_init_irq(void)
+{
+ ppc4xx_init_IRQ();
+}
+
+void __init
+platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+ unsigned long r6, unsigned long r7)
+{
+ ppc4xx_init(r3, r4, r5, r6, r7);
+
+ identify_ppc_sys_by_id(mfspr(SPRN_PVR));
+
+ ppc_md.setup_arch = ml403_setup_arch;
+ ppc_md.setup_io_mappings = ml403_map_io;
+ ppc_md.init_IRQ = ml403_init_irq;
+
+#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
+ ppc_md.power_off = xilinx_power_off;
+#endif
+
+#ifdef CONFIG_KGDB
+ ppc_md.early_serial_map = ml403_early_serial_map;
+#endif
+}
+
diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.h b/arch/ppc/platforms/4xx/xilinx_ml403.h
new file mode 100644
index 0000000..4735969
--- /dev/null
+++ b/arch/ppc/platforms/4xx/xilinx_ml403.h
@@ -0,0 +1,49 @@
+/*
+ * arch/ppc/platforms/4xx/xilinx_ml403.h
+ *
+ * Include file that defines the Xilinx ML403 reference design
+ *
+ * Author: Grant Likely <grant.likely@secretlab.ca>
+ *
+ * 2005 (c) Secret Lab Technologies Ltd.
+ * 2002-2004 (c) MontaVista Software, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+#ifdef __KERNEL__
+#ifndef __ASM_XILINX_ML403_H__
+#define __ASM_XILINX_ML403_H__
+
+/* ML403 has a Xilinx Virtex-4 FPGA with a PPC405 hard core */
+#include <platforms/4xx/virtex.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+typedef struct board_info {
+ unsigned int bi_memsize; /* DRAM installed, in bytes */
+ unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
+ unsigned int bi_intfreq; /* Processor speed, in Hz */
+ unsigned int bi_busfreq; /* PLB Bus speed, in Hz */
+ unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
+} bd_t;
+
+/* Some 4xx parts use a different timebase frequency from the internal clock.
+*/
+#define bi_tbfreq bi_intfreq
+
+#endif /* !__ASSEMBLY__ */
+
+/* We don't need anything mapped. Size of zero will accomplish that. */
+#define PPC4xx_ONB_IO_PADDR 0u
+#define PPC4xx_ONB_IO_VADDR 0u
+#define PPC4xx_ONB_IO_SIZE 0u
+
+#define PPC4xx_MACHINE_NAME "Xilinx ML403 Reference Design"
+
+#endif /* __ASM_XILINX_ML403_H__ */
+#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/4xx/xparameters/xparameters.h b/arch/ppc/platforms/4xx/xparameters/xparameters.h
index 26ee822..22b0088 100644
--- a/arch/ppc/platforms/4xx/xparameters/xparameters.h
+++ b/arch/ppc/platforms/4xx/xparameters/xparameters.h
@@ -32,6 +32,19 @@
#define VIRTEX_INTC_BASEADDR XPAR_DCR_INTC_0_BASEADDR
#define VIRTEX_INTC_KIND_OF_INTR XPAR_DCR_INTC_0_KIND_OF_INTR
+#elif defined(CONFIG_XILINX_ML403)
+ #include "xparameters_ml403.h"
+
+ /* Serial ports */
+ #define VIRTEX_UART_0_BASEADDR (XPAR_OPB_UART16550_0_BASEADDR + 0x1000)
+ #define VIRTEX_UART_0_IRQ XPAR_OPB_INTC_0_OPB_UART16550_0_IP2INTC_IRPT_INTR
+ #define VIRTEX_UART_0_CLK XPAR_XUARTNS550_CLOCK_HZ
+
+ /* Values for setting up interrupt controller */
+ #define VIRTEX_XINTC_USE_DCR XPAR_XINTC_USE_DCR
+ #define VIRTEX_INTC_BASEADDR XPAR_OPB_INTC_0_BASEADDR
+ #define VIRTEX_INTC_KIND_OF_INTR XPAR_OPB_INTC_0_KIND_OF_INTR
+
#else
/* Add other board xparameter includes here before the #else */
#error No *_xparameters.h file included
diff --git a/include/asm-ppc/ibm4xx.h b/include/asm-ppc/ibm4xx.h
index e992369..c49c462 100644
--- a/include/asm-ppc/ibm4xx.h
+++ b/include/asm-ppc/ibm4xx.h
@@ -51,6 +51,10 @@
#include <platforms/4xx/xilinx_ml300.h>
#endif
+#if defined(CONFIG_XILINX_ML403)
+#include <platforms/4xx/xilinx_ml403.h>
+#endif
+
#ifndef __ASSEMBLY__
#ifdef CONFIG_40x
--
1.0.6-g58e3
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