* powerpc.git tree
From: Paul Mackerras @ 2006-01-11 11:24 UTC (permalink / raw)
To: linuxppc-dev, linuxppc64-dev
All of the patches in the powerpc.git tree have now been either sent
upstream to Linus' tree, or reverted.
For various reasons I didn't just ask Linus to pull the powerpc.git
tree, but instead cherry-picked the commits into the powerpc-merge.git
tree and asked Linus to pull that. That means that there are now
commits in the powerpc.git tree that are superseded by commits in
Linus' tree.
In future I'd like to be able to ask Linus to pull the powerpc.git
tree, without cluttering up his tree with those superseded commits.
That means I need to reset the powerpc.git tree to be the same as
Linus' tree now.
That means that anyone who is following the powerpc.git tree by doing
pulls periodically will need to reset their tree too. Otherwise each
pull will do an unnecessary merge.
If that would cause people serious heartburn, I can instead abandon
the powerpc.git tree and start a new development tree
(powerpc-devel.git perhaps).
Comments?
Paul.
^ permalink raw reply
* Re: restore_user_regs and fpu
From: Paul Mackerras @ 2006-01-11 11:11 UTC (permalink / raw)
To: Heikki Lindholm; +Cc: linuxppc-dev, linuxppc64-dev
In-Reply-To: <43BC15A9.7010009@cs.helsinki.fi>
Heikki Lindholm writes:
> I haven't really confirmed this can happen, but I was wondering whether
> the following would be possible. Looking at restore_user_regs in
> ppc/kernel/signal_32.c and assuming:
> * last_task_used_math == current, eg. a signal handler used fpu
> * fpu state is still what the sig handler left there
> If after the fpu state is restored to current->thread.fpr (copy_user)
> somebody preempts this task and uses fpu, wouldn't it cause the fpu
> state (of the sig handler) to be saved to
> last_task_used_math->thread.fpr overwriting the just restored state.
> Should the last_task_used_math nullifying, etc. be moved to the front of
> the function instead, or am I overlooking something?
I think you are correct, and that the same problem exists for 64-bit
processes. This patch should fix it. Can anyone see any problem with
this patch?
Paul.
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 105d560..913f906 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -201,13 +201,13 @@ int dump_spe(struct pt_regs *regs, elf_v
}
#endif /* CONFIG_SPE */
+#ifndef CONFIG_SMP
/*
* If we are doing lazy switching of CPU state (FP, altivec or SPE),
* and the current task has some state, discard it.
*/
-static inline void discard_lazy_cpu_state(void)
+void discard_lazy_cpu_state(void)
{
-#ifndef CONFIG_SMP
preempt_disable();
if (last_task_used_math == current)
last_task_used_math = NULL;
@@ -220,8 +220,8 @@ static inline void discard_lazy_cpu_stat
last_task_used_spe = NULL;
#endif
preempt_enable();
-#endif /* CONFIG_SMP */
}
+#endif /* CONFIG_SMP */
int set_dabr(unsigned long dabr)
{
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index d3f0b6d..177bba7 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -497,6 +497,15 @@ static long restore_user_regs(struct pt_
if (err)
return 1;
+ /*
+ * Do this before updating the thread state in
+ * current->thread.fpr/vr/evr. That way, if we get preempted
+ * and another task grabs the FPU/Altivec/SPE, it won't be
+ * tempted to save the current CPU state into the thread_struct
+ * and corrupt what we are writing there.
+ */
+ discard_lazy_cpu_state();
+
/* force the process to reload the FP registers from
current->thread when it next does FP instructions */
regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
@@ -538,18 +547,6 @@ static long restore_user_regs(struct pt_
return 1;
#endif /* CONFIG_SPE */
-#ifndef CONFIG_SMP
- preempt_disable();
- if (last_task_used_math == current)
- last_task_used_math = NULL;
- if (last_task_used_altivec == current)
- last_task_used_altivec = NULL;
-#ifdef CONFIG_SPE
- if (last_task_used_spe == current)
- last_task_used_spe = NULL;
-#endif
- preempt_enable();
-#endif
return 0;
}
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 5462bef..7b9d999 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -207,10 +207,20 @@ static long restore_sigcontext(struct pt
if (!sig)
regs->gpr[13] = save_r13;
- err |= __copy_from_user(¤t->thread.fpr, &sc->fp_regs, FP_REGS_SIZE);
if (set != NULL)
err |= __get_user(set->sig[0], &sc->oldmask);
+ /*
+ * Do this before updating the thread state in
+ * current->thread.fpr/vr. That way, if we get preempted
+ * and another task grabs the FPU/Altivec, it won't be
+ * tempted to save the current CPU state into the thread_struct
+ * and corrupt what we are writing there.
+ */
+ discard_lazy_cpu_state();
+
+ err |= __copy_from_user(¤t->thread.fpr, &sc->fp_regs, FP_REGS_SIZE);
+
#ifdef CONFIG_ALTIVEC
err |= __get_user(v_regs, &sc->v_regs);
err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
@@ -229,14 +239,6 @@ static long restore_sigcontext(struct pt
current->thread.vrsave = 0;
#endif /* CONFIG_ALTIVEC */
-#ifndef CONFIG_SMP
- preempt_disable();
- if (last_task_used_math == current)
- last_task_used_math = NULL;
- if (last_task_used_altivec == current)
- last_task_used_altivec = NULL;
- preempt_enable();
-#endif
/* Force reload of FP/VEC */
regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC);
diff --git a/include/asm-powerpc/system.h b/include/asm-powerpc/system.h
index 0c58e32..4c88830 100644
--- a/include/asm-powerpc/system.h
+++ b/include/asm-powerpc/system.h
@@ -133,6 +133,14 @@ extern int fix_alignment(struct pt_regs
extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
extern void cvt_df(double *from, float *to, struct thread_struct *thread);
+#ifndef CONFIG_SMP
+extern void discard_lazy_cpu_state(void);
+#else
+static inline void discard_lazy_cpu_state(void)
+{
+}
+#endif
+
#ifdef CONFIG_ALTIVEC
extern void flush_altivec_to_thread(struct task_struct *);
#else
^ permalink raw reply related
* About MMU setting in MPC8245
From: happa @ 2006-01-11 10:26 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 1536 bytes --]
Hi,
Sorry, I have very basic question about PPC MMU setting.
In "http://www.denx.de/wiki/PPCEmbedded/Kernel#BOOTLOADER",
chapter 10.2. Memory Map, I get the following information.
"The bootloader is responsible for configuring the memory map before jumping to the Linux kernel."
Is anyone know what memory map should be done in bootloader?
If I'm using ICE to load linux kernel, what kind of CPU registers need be configured first?
Is IBAT/DBAT and Segment register need be set?
I have set the following registers before loading kernel via ICE.
Did I miss something else?
(The target CPU is MPC8245)
offset register
------- -----------------------------------
0x0C Cache Line Size
0x04 PCI Command Register
0xA8 Processor interface configuration 1
0xAC Processor interface configuration 2
0x80 Memory starting address register1
0x84 Memory starting address register2
0x88 Extended memory starting addressregister1
0x8C Extended memory starting addressregister2
0x90 Memory ending address register1
0x94 Memory ending address register2
0x98 Extended memory ending address register1
0x9C Extended memory ending address register2
0xA0 Memory bank enable register
0xD0 Extended ROM configuration register 1
0xD4 Extended ROM configuration register 2
0xD8 Extended ROM configuration register 3
0xDC Extended ROM configuration register 4
0xF0 MCCR1
0xF4 MCCR2
0xF8 MCCR3
0xFC MCCR4
Would anyone give me some references about MMU setting?
^ permalink raw reply
* Re: [PATCH] powerpc: fix large nvram access
From: Olaf Hering @ 2006-01-11 10:25 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev
In-Reply-To: <200601110034.58911.arnd@arndb.de>
On Wed, Jan 11, Arnd Bergmann wrote:
> Am Dienstag, 10. Januar 2006 23:13 schrieb Olaf Hering:
> > On Mon, Jan 09, Linux Kernel Mailing List wrote:
> > > tree da8f883f72d08f9534e9eca3bba662413b9bd865
> > > parent d52771fce4e774fa786097d34412a057d487c697
> > > author Arnd Bergmann <arnd@arndb.de> Fri, 09 Dec 2005 19:21:44 +0100
> > > committer Paul Mackerras <paulus@samba.org> Mon, 09 Jan 2006 14:53:31
> > > +1100
> > >
> > > [PATCH] powerpc: fix large nvram access
> > >
> > > /dev/nvram uses the user-provided read/write size
> > > for kmalloc, which fails, if a large number is passed.
> > > This will always use a single page at most, which
> > > can be expected to succeed.
> > >
> > > Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
> > > Signed-off-by: Paul Mackerras <paulus@samba.org>
> > >
> > > arch/powerpc/kernel/nvram_64.c | 114
> > > +++++++++++++++++++----------------------
> >
> > this change breaks my nvsetenv binary on JS20.
> >
>
> I think this has uncovered a bug that has been in nvsetenv for a long time.
Yeah. Dont bother, I will fix that tool.
--
short story of a lazy sysadmin:
alias appserv=wotan
^ permalink raw reply
* Re: [PATCH] implement AT_PLATFORM for powerpc
From: Eugene Surovegin @ 2006-01-11 9:19 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc64-dev, Kumar Gala, sjmunroe, linuxppc-dev
In-Reply-To: <17348.50913.414568.263736@cargo.ozlabs.ibm.com>
On Wed, Jan 11, 2006 at 07:50:41PM +1100, Paul Mackerras wrote:
> Eugene Surovegin writes:
>
> > I checked 44x user manuals I have:
> >
> > 440GP doesn't have isel
> > 440GX, 440EP, 440SP, 440SPe, 440GR have it.
>
> Thanks, that's helpful. Do you know if 440{GX,EP,SP,SPe,GR} implement
> all of the 32-bit user-mode instructions in Book E?
Manuals claim that the following processors implement "... the full,
32-bit fixed-point subset of the Book-E Enhanced PowerPC Architecture":
440GP, 440GX, 440EP, 440GR, 440SP.
I failed to find similar claim in 440SPe manual, though.
> How do mbar and msync work on those processors? As mbar and msync (as
> defined in Book E) or as eieio and sync?
Here is an excerpt from user manual (I checked 440GP, 440GX, 440SP,
440SPe, 440EP, 440GR manuals and they all contain the same text):
Programming Notes
The msync instruction is execution synchronizing, and guarantees that
all storage accesses initiated by instructions executed prior to the
msync have completed before any instructions after the msync begin
execution. On the other hand, architecturally the mbar instruction
merely orders storage accesses, and does not perform execution
synchronization. Therefore, non-storage access instructions after mbar
could complete before the storage access instructions which were
executed prior to mbar have actually completed their storage accesses.
However, the PPC440xx implements the mbar instruction identically to
the msync instruction, and thus both are execution synchronizing.
Architecture Note
mbar replaces the PowerPC eieio instruction. mbar uses the same opcode
as eieio; PowerPC applications which used eieio will get the function
of mbar when executed on a PowerPC Book-E implementation. mbar is
architecturally "stronger" than eieio, in that eieio forced separate
ordering amongst different categories of storage accesses, while mbar
forces such ordering amongst all storage accesses as a single category.
msync replaces the PowerPC sync instruction. msync uses the same
opcode as sync; PowerPC applications which used sync get the function
of msync when executed on a PowerPC Book-E implementation. msync is
architecturally identical to the version of sync specified by an
earlier version of the PowerPC architecture.
> Do the 440* processors in fact claim Book E compliance?
Hmm, cannot tell :).
--
Eugene
^ permalink raw reply
* Re: [PATCH] implement AT_PLATFORM for powerpc
From: Paul Mackerras @ 2006-01-11 8:50 UTC (permalink / raw)
To: Eugene Surovegin; +Cc: linuxppc64-dev, Kumar Gala, sjmunroe, linuxppc-dev
In-Reply-To: <20060111071032.GA28843@gate.ebshome.net>
Eugene Surovegin writes:
> I checked 44x user manuals I have:
>
> 440GP doesn't have isel
> 440GX, 440EP, 440SP, 440SPe, 440GR have it.
Thanks, that's helpful. Do you know if 440{GX,EP,SP,SPe,GR} implement
all of the 32-bit user-mode instructions in Book E?
How do mbar and msync work on those processors? As mbar and msync (as
defined in Book E) or as eieio and sync?
Do the 440* processors in fact claim Book E compliance?
Thanks,
Paul.
^ permalink raw reply
* Can ELDK 3.1.1 compile Linux 2.6 Kernel?
From: Lo Chun Chung @ 2006-01-11 8:36 UTC (permalink / raw)
To: linuxppc-embedded
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Dear all,
I just downloaded ELDK 3.1.1 (from denx) and LINUX kernel 2.6 (from kernel.org), and I compile the kernel for powerpc arch.
but during I compile to the file under the directory vdso32, the following compile errors occur:
arch/powerpc/kernel/vdso32/gettimeofday.S: Assembler messages:
arch/powerpc/kernel/vdso32/gettimeofday.S:28: Error: unknown pseudo-op: `.cfi_startproc'
arch/powerpc/kernel/vdso32/gettimeofday.S:30: Error: unknown pseudo-op: `.cfi_register'
arch/powerpc/kernel/vdso32/gettimeofday.S:73: Error: unknown pseudo-op: `.cfi_endproc'
arch/powerpc/kernel/vdso32/gettimeofday.S:83: Error: unknown pseudo-op: `.cfi_startproc'
arch/powerpc/kernel/vdso32/gettimeofday.S:91: Error: unknown pseudo-op: `.cfi_register'
arch/powerpc/kernel/vdso32/gettimeofday.S:205: Error: unknown pseudo-op: `.cfi_endproc'
arch/powerpc/kernel/vdso32/gettimeofday.S:216: Error: unknown pseudo-op: `.cfi_startproc'
arch/powerpc/kernel/vdso32/gettimeofday.S:240: Error: unknown pseudo-op: `.cfi_endproc'
arch/powerpc/kernel/vdso32/gettimeofday.S:252: Error: unknown pseudo-op: `.cfi_startproc'
arch/powerpc/kernel/vdso32/gettimeofday.S:323: Error: unknown pseudo-op: `.cfi_endproc'
make[2]: *** [arch/powerpc/kernel/vdso32/gettimeofday.o] Error 1
make[1]: *** [arch/powerpc/kernel/vdso32] Error 2
make: *** [arch/powerpc/kernel] Error 2
What's wrong with my compiler? Or ELDK cannot compile 2.6 kernel? What I can do now?
Thanks
Best regards,
Chung
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^ permalink raw reply
* Re: Error: Three ML403 boards
From: Paula Saameño @ 2006-01-11 8:38 UTC (permalink / raw)
To: Peter Ryser, linuxppc-embedded
In-Reply-To: <43C430E2.60905@xilinx.com>
[-- Attachment #1: Type: text/plain, Size: 1649 bytes --]
Hi, Peter,
I have already checked that record, and even fixing that bug and adding the
C_APU_CONTROL parameter, it still does not work in any board but one.
Anyone has suffered the same issue or have any idea of why it is happening??
Thanks a lot!
Paula
On 1/10/06, Peter Ryser <peter.ryser@xilinx.com> wrote:
>
> Paula,
>
> please verify that you are not running into the problem described in
> Xilinx Answer Record 22179
> (
> http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=1&iCountryID=1&getPagePath=22179
> ).
>
> - Peter
>
>
> Paula Saameño wrote:
>
> > Hello,
> >
> > I have 3 Xilinx ML403 boards. I have implemented a 2.4 kernel with a
> > basic configuration, with network support, systemACE, IIC... and it
> > works perfectly in one of them.
> >
> > However, when I put the ACE card, without making any change, in other
> > ML403 board, it does not work. The .ace file is loaded ok but then the
> > network leds (6 leds) start blinking and nothing else happens.
> >
> > I have tried with two ML403 different boards, and I have no idea of
> > where the problem is. They should work in the same way, don't they?
> >
> > Any help would be great.
> >
> > Also, I am trying to load a 2.6 kernel, but I am still on the way. I
> > will let you know if I get it working.
> >
> > Thanks a lot!
> > Paula
> >
> >------------------------------------------------------------------------
> >
> >_______________________________________________
> >Linuxppc-embedded mailing list
> >Linuxppc-embedded@ozlabs.org
> >https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> >
>
>
>
>
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^ permalink raw reply
* Ethernet not initialized: Help req
From: batsayan.das @ 2006-01-11 7:33 UTC (permalink / raw)
To: Linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 1416 bytes --]
Hello,
In our MPC8260 based customs board the CLK9 is for transmit and CLK10 is
for receive. The ELDK tree uses CLK12 is receive, CLK11 is transmit and
the corresponding values defined in as.
/* CLK12 is receive, CLK11 is transmit. These are board specific.
*/
#define PC_F1RXCLK ((uint)0x00000800)
#define PC_F1TXCLK ((uint)0x00000400)
We got CLK9 and CLK10 from U-Boot tree and set those varables, but
ethernet does not work.
We are using LXT971 on FCC1, and setting MII_MDIO and MII_MDCK to our
board specific value detects LXT971 correctly. Here is the log
****LOG*****
GOT FCC IRQ 32
GOT MII IRQ 25
eth0: FCC1 ENET Version 0.4, 00:0B:17:00:00:00
eth0: Phy @ 0x0, type LXT971 (0x001378e2)
***************8
My question is what value shall I use for CLK9 and CLK10?
What else setting we need to change to make Ethernet work?
Pls help.
Thanks,
Batsayan Das
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^ permalink raw reply
* Re: [PATCH] implement AT_PLATFORM for powerpc
From: Eugene Surovegin @ 2006-01-11 7:10 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc64-dev, Kumar Gala, sjmunroe, linuxppc-dev
In-Reply-To: <17348.37558.434652.697604@cargo.ozlabs.ibm.com>
On Wed, Jan 11, 2006 at 04:08:06PM +1100, Paul Mackerras wrote:
> Oops, I must have sent the wrong version of the patch. Do we know
> which 440s have or don't have isel?
I checked 44x user manuals I have:
440GP doesn't have isel
440GX, 440EP, 440SP, 440SPe, 440GR have it.
--
Eugene
^ permalink raw reply
* Re: [PATCH] implement AT_PLATFORM for powerpc
From: Kumar Gala @ 2006-01-11 6:10 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc64-dev, Kumar Gala, sjmunroe, linuxppc-dev
In-Reply-To: <17348.37558.434652.697604@cargo.ozlabs.ibm.com>
On Jan 10, 2006, at 11:08 PM, Paul Mackerras wrote:
> Kumar Gala writes:
>
>> We should probably add two new AT_PLATFORM: "ppc8548" and "ppc5554".
>> "ppc8548" should be used for e500v2, and "ppc5554" for "e200z6".
>
> How different are they in user-level ISA or in instruction scheduling
> requirements?
8548 adds embedded double precision instructions. e200/e500 are
hugely different from a scheduling point of view.
>> You aren't seeting PPC_FEATURE_BOOKE for anything. We need to be
>> a little
>> careful since 'isel' isn't implemented in the very first 440's.
>
> Oops, I must have sent the wrong version of the patch. Do we know
> which 440s have or don't have isel?
Not 100% sure, hopefully Matt Porter or someone else a bit more
familiar with the 440's will chime in.
- k
^ permalink raw reply
* Re: [PATCH] implement AT_PLATFORM for powerpc
From: Paul Mackerras @ 2006-01-11 5:08 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, sjmunroe, linuxppc64-dev
In-Reply-To: <Pine.LNX.4.44.0601102238530.15824-100000@gate.crashing.org>
Kumar Gala writes:
> We should probably add two new AT_PLATFORM: "ppc8548" and "ppc5554".
> "ppc8548" should be used for e500v2, and "ppc5554" for "e200z6".
How different are they in user-level ISA or in instruction scheduling
requirements?
> You aren't seeting PPC_FEATURE_BOOKE for anything. We need to be a little
> careful since 'isel' isn't implemented in the very first 440's.
Oops, I must have sent the wrong version of the patch. Do we know
which 440s have or don't have isel?
Paul.
^ permalink raw reply
* Re: [PATCH] implement AT_PLATFORM for powerpc
From: Kumar Gala @ 2006-01-11 4:48 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, sjmunroe, linuxppc64-dev
In-Reply-To: <17348.35120.840409.283964@cargo.ozlabs.ibm.com>
We should probably add two new AT_PLATFORM: "ppc8548" and "ppc5554".
"ppc8548" should be used for e500v2, and "ppc5554" for "e200z6".
You aren't seeting PPC_FEATURE_BOOKE for anything. We need to be a little
careful since 'isel' isn't implemented in the very first 440's.
- kumar
On Wed, 11 Jan 2006, Paul Mackerras wrote:
> The patch below makes powerpc kernels supply a value for the
> AT_PLATFORM aux table entry which is intended to indicate what class
> of processor the program is running on, so that glibc can optionally
> choose shared library objects which are optimized for the processor.
>
> The patch also adds a PPC_FEATURE_BOOKE bit to the AT_HWCAP value to
> indicate processors which conform to the Book E specification (as far
> as usermode is concerned), e.g. which have the isel, mbar and msync
> instructions.
>
> The set of AT_PLATFORM values is: "cell", "power3", "power4",
> "power5", "power5+", "powerpc", "ppc403", "ppc405", "ppc440",
> "ppc601", "ppc603", "ppc604", "ppc7400", "ppc7450", "ppc750",
> "ppc823", "ppc8540", "ppc970", "rs64".
>
> Note that the "powerpc" value is only used for the case where the PVR
> value is unrecognized.
>
> Comments?
>
> Paul.
>
> diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
> index 43c74a6..c37ed06 100644
> --- a/arch/powerpc/kernel/cputable.c
> +++ b/arch/powerpc/kernel/cputable.c
> @@ -80,6 +80,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power3,
> .oprofile_cpu_type = "ppc64/power3",
> .oprofile_type = RS64,
> + .platform = "power3",
> },
> { /* Power3+ */
> .pvr_mask = 0xffff0000,
> @@ -93,6 +94,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power3,
> .oprofile_cpu_type = "ppc64/power3",
> .oprofile_type = RS64,
> + .platform = "power3",
> },
> { /* Northstar */
> .pvr_mask = 0xffff0000,
> @@ -106,6 +108,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power3,
> .oprofile_cpu_type = "ppc64/rs64",
> .oprofile_type = RS64,
> + .platform = "rs64",
> },
> { /* Pulsar */
> .pvr_mask = 0xffff0000,
> @@ -119,6 +122,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power3,
> .oprofile_cpu_type = "ppc64/rs64",
> .oprofile_type = RS64,
> + .platform = "rs64",
> },
> { /* I-star */
> .pvr_mask = 0xffff0000,
> @@ -132,6 +136,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power3,
> .oprofile_cpu_type = "ppc64/rs64",
> .oprofile_type = RS64,
> + .platform = "rs64",
> },
> { /* S-star */
> .pvr_mask = 0xffff0000,
> @@ -145,6 +150,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power3,
> .oprofile_cpu_type = "ppc64/rs64",
> .oprofile_type = RS64,
> + .platform = "rs64",
> },
> { /* Power4 */
> .pvr_mask = 0xffff0000,
> @@ -158,6 +164,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power4,
> .oprofile_cpu_type = "ppc64/power4",
> .oprofile_type = POWER4,
> + .platform = "power4",
> },
> { /* Power4+ */
> .pvr_mask = 0xffff0000,
> @@ -171,6 +178,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power4,
> .oprofile_cpu_type = "ppc64/power4",
> .oprofile_type = POWER4,
> + .platform = "power4",
> },
> { /* PPC970 */
> .pvr_mask = 0xffff0000,
> @@ -185,6 +193,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_ppc970,
> .oprofile_cpu_type = "ppc64/970",
> .oprofile_type = POWER4,
> + .platform = "ppc970",
> },
> #endif /* CONFIG_PPC64 */
> #if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
> @@ -205,6 +214,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_ppc970,
> .oprofile_cpu_type = "ppc64/970",
> .oprofile_type = POWER4,
> + .platform = "ppc970",
> },
> #endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
> #ifdef CONFIG_PPC64
> @@ -220,6 +230,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_ppc970,
> .oprofile_cpu_type = "ppc64/970",
> .oprofile_type = POWER4,
> + .platform = "ppc970",
> },
> { /* Power5 GR */
> .pvr_mask = 0xffff0000,
> @@ -233,6 +244,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power4,
> .oprofile_cpu_type = "ppc64/power5",
> .oprofile_type = POWER4,
> + .platform = "power5",
> },
> { /* Power5 GS */
> .pvr_mask = 0xffff0000,
> @@ -246,6 +258,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_power4,
> .oprofile_cpu_type = "ppc64/power5+",
> .oprofile_type = POWER4,
> + .platform = "power5+",
> },
> { /* Cell Broadband Engine */
> .pvr_mask = 0xffff0000,
> @@ -257,6 +270,7 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 128,
> .dcache_bsize = 128,
> .cpu_setup = __setup_cpu_be,
> + .platform = "cell",
> },
> { /* default match */
> .pvr_mask = 0x00000000,
> @@ -268,6 +282,7 @@ struct cpu_spec cpu_specs[] = {
> .dcache_bsize = 128,
> .num_pmcs = 6,
> .cpu_setup = __setup_cpu_power4,
> + .platform = "power4",
> }
> #endif /* CONFIG_PPC64 */
> #ifdef CONFIG_PPC32
> @@ -281,6 +296,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc601",
> },
> { /* 603 */
> .pvr_mask = 0xffff0000,
> @@ -290,7 +306,8 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = COMMON_USER,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> - .cpu_setup = __setup_cpu_603
> + .cpu_setup = __setup_cpu_603,
> + .platform = "ppc603",
> },
> { /* 603e */
> .pvr_mask = 0xffff0000,
> @@ -300,7 +317,8 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = COMMON_USER,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> - .cpu_setup = __setup_cpu_603
> + .cpu_setup = __setup_cpu_603,
> + .platform = "ppc603",
> },
> { /* 603ev */
> .pvr_mask = 0xffff0000,
> @@ -310,7 +328,8 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = COMMON_USER,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> - .cpu_setup = __setup_cpu_603
> + .cpu_setup = __setup_cpu_603,
> + .platform = "ppc603",
> },
> { /* 604 */
> .pvr_mask = 0xffff0000,
> @@ -321,7 +340,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 2,
> - .cpu_setup = __setup_cpu_604
> + .cpu_setup = __setup_cpu_604,
> + .platform = "ppc604",
> },
> { /* 604e */
> .pvr_mask = 0xfffff000,
> @@ -332,7 +352,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_604
> + .cpu_setup = __setup_cpu_604,
> + .platform = "ppc604",
> },
> { /* 604r */
> .pvr_mask = 0xffff0000,
> @@ -343,7 +364,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_604
> + .cpu_setup = __setup_cpu_604,
> + .platform = "ppc604",
> },
> { /* 604ev */
> .pvr_mask = 0xffff0000,
> @@ -354,7 +376,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_604
> + .cpu_setup = __setup_cpu_604,
> + .platform = "ppc604",
> },
> { /* 740/750 (0x4202, don't support TAU ?) */
> .pvr_mask = 0xffffffff,
> @@ -365,7 +388,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750
> + .cpu_setup = __setup_cpu_750,
> + .platform = "ppc750",
> },
> { /* 750CX (80100 and 8010x?) */
> .pvr_mask = 0xfffffff0,
> @@ -376,7 +400,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750cx
> + .cpu_setup = __setup_cpu_750cx,
> + .platform = "ppc750",
> },
> { /* 750CX (82201 and 82202) */
> .pvr_mask = 0xfffffff0,
> @@ -387,7 +412,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750cx
> + .cpu_setup = __setup_cpu_750cx,
> + .platform = "ppc750",
> },
> { /* 750CXe (82214) */
> .pvr_mask = 0xfffffff0,
> @@ -398,7 +424,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750cx
> + .cpu_setup = __setup_cpu_750cx,
> + .platform = "ppc750",
> },
> { /* 750CXe "Gekko" (83214) */
> .pvr_mask = 0xffffffff,
> @@ -409,7 +436,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750cx
> + .cpu_setup = __setup_cpu_750cx,
> + .platform = "ppc750",
> },
> { /* 745/755 */
> .pvr_mask = 0xfffff000,
> @@ -420,7 +448,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750
> + .cpu_setup = __setup_cpu_750,
> + .platform = "ppc750",
> },
> { /* 750FX rev 1.x */
> .pvr_mask = 0xffffff00,
> @@ -431,7 +460,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750
> + .cpu_setup = __setup_cpu_750,
> + .platform = "ppc750",
> },
> { /* 750FX rev 2.0 must disable HID0[DPM] */
> .pvr_mask = 0xffffffff,
> @@ -442,7 +472,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750
> + .cpu_setup = __setup_cpu_750,
> + .platform = "ppc750",
> },
> { /* 750FX (All revs except 2.0) */
> .pvr_mask = 0xffff0000,
> @@ -453,7 +484,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750fx
> + .cpu_setup = __setup_cpu_750fx,
> + .platform = "ppc750",
> },
> { /* 750GX */
> .pvr_mask = 0xffff0000,
> @@ -464,7 +496,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750fx
> + .cpu_setup = __setup_cpu_750fx,
> + .platform = "ppc750",
> },
> { /* 740/750 (L2CR bit need fixup for 740) */
> .pvr_mask = 0xffff0000,
> @@ -475,7 +508,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_750
> + .cpu_setup = __setup_cpu_750,
> + .platform = "ppc750",
> },
> { /* 7400 rev 1.1 ? (no TAU) */
> .pvr_mask = 0xffffffff,
> @@ -486,7 +520,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_7400
> + .cpu_setup = __setup_cpu_7400,
> + .platform = "ppc7400",
> },
> { /* 7400 */
> .pvr_mask = 0xffff0000,
> @@ -497,7 +532,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_7400
> + .cpu_setup = __setup_cpu_7400,
> + .platform = "ppc7400",
> },
> { /* 7410 */
> .pvr_mask = 0xffff0000,
> @@ -508,7 +544,8 @@ struct cpu_spec cpu_specs[] = {
> .icache_bsize = 32,
> .dcache_bsize = 32,
> .num_pmcs = 4,
> - .cpu_setup = __setup_cpu_7410
> + .cpu_setup = __setup_cpu_7410,
> + .platform = "ppc7400",
> },
> { /* 7450 2.0 - no doze/nap */
> .pvr_mask = 0xffffffff,
> @@ -522,6 +559,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7450 2.1 */
> .pvr_mask = 0xffffffff,
> @@ -535,6 +573,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7450 2.3 and newer */
> .pvr_mask = 0xffff0000,
> @@ -548,6 +587,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7455 rev 1.x */
> .pvr_mask = 0xffffff00,
> @@ -561,6 +601,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7455 rev 2.0 */
> .pvr_mask = 0xffffffff,
> @@ -574,6 +615,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7455 others */
> .pvr_mask = 0xffff0000,
> @@ -587,6 +629,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7447/7457 Rev 1.0 */
> .pvr_mask = 0xffffffff,
> @@ -600,6 +643,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7447/7457 Rev 1.1 */
> .pvr_mask = 0xffffffff,
> @@ -613,6 +657,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7447/7457 Rev 1.2 and later */
> .pvr_mask = 0xffff0000,
> @@ -626,6 +671,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7447A */
> .pvr_mask = 0xffff0000,
> @@ -639,6 +685,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 7448 */
> .pvr_mask = 0xffff0000,
> @@ -652,6 +699,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_setup = __setup_cpu_745x,
> .oprofile_cpu_type = "ppc/7450",
> .oprofile_type = G4,
> + .platform = "ppc7450",
> },
> { /* 82xx (8240, 8245, 8260 are all 603e cores) */
> .pvr_mask = 0x7fff0000,
> @@ -661,7 +709,8 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = COMMON_USER,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> - .cpu_setup = __setup_cpu_603
> + .cpu_setup = __setup_cpu_603,
> + .platform = "ppc603",
> },
> { /* All G2_LE (603e core, plus some) have the same pvr */
> .pvr_mask = 0x7fff0000,
> @@ -671,7 +720,8 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = COMMON_USER,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> - .cpu_setup = __setup_cpu_603
> + .cpu_setup = __setup_cpu_603,
> + .platform = "ppc603",
> },
> { /* e300 (a 603e core, plus some) on 83xx */
> .pvr_mask = 0x7fff0000,
> @@ -681,7 +731,8 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = COMMON_USER,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> - .cpu_setup = __setup_cpu_603
> + .cpu_setup = __setup_cpu_603,
> + .platform = "ppc603",
> },
> { /* default match, we assume split I/D cache & TB (non-601)... */
> .pvr_mask = 0x00000000,
> @@ -691,6 +742,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = COMMON_USER,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc603",
> },
> #endif /* CLASSIC_PPC */
> #ifdef CONFIG_8xx
> @@ -704,6 +756,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 16,
> .dcache_bsize = 16,
> + .platform = "ppc823",
> },
> #endif /* CONFIG_8xx */
> #ifdef CONFIG_40x
> @@ -715,6 +768,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 16,
> .dcache_bsize = 16,
> + .platform = "ppc403",
> },
> { /* 403GCX */
> .pvr_mask = 0xffffff00,
> @@ -725,6 +779,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
> .icache_bsize = 16,
> .dcache_bsize = 16,
> + .platform = "ppc403",
> },
> { /* 403G ?? */
> .pvr_mask = 0xffff0000,
> @@ -734,6 +789,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 16,
> .dcache_bsize = 16,
> + .platform = "ppc403",
> },
> { /* 405GP */
> .pvr_mask = 0xffff0000,
> @@ -744,6 +800,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* STB 03xxx */
> .pvr_mask = 0xffff0000,
> @@ -754,6 +811,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* STB 04xxx */
> .pvr_mask = 0xffff0000,
> @@ -764,6 +822,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* NP405L */
> .pvr_mask = 0xffff0000,
> @@ -774,6 +833,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* NP4GS3 */
> .pvr_mask = 0xffff0000,
> @@ -784,6 +844,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* NP405H */
> .pvr_mask = 0xffff0000,
> @@ -794,6 +855,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* 405GPr */
> .pvr_mask = 0xffff0000,
> @@ -804,6 +866,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* STBx25xx */
> .pvr_mask = 0xffff0000,
> @@ -814,6 +877,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* 405LP */
> .pvr_mask = 0xffff0000,
> @@ -823,6 +887,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* Xilinx Virtex-II Pro */
> .pvr_mask = 0xffff0000,
> @@ -833,6 +898,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
> { /* 405EP */
> .pvr_mask = 0xffff0000,
> @@ -843,6 +909,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc405",
> },
>
> #endif /* CONFIG_40x */
> @@ -855,6 +922,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = COMMON_USER, /* 440EP has an FPU */
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> {
> .pvr_mask = 0xf0000fff,
> @@ -864,6 +932,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = COMMON_USER, /* 440EP has an FPU */
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> { /* 440GP Rev. B */
> .pvr_mask = 0xf0000fff,
> @@ -873,6 +942,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> { /* 440GP Rev. C */
> .pvr_mask = 0xf0000fff,
> @@ -882,6 +952,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> { /* 440GX Rev. A */
> .pvr_mask = 0xf0000fff,
> @@ -891,6 +962,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> { /* 440GX Rev. B */
> .pvr_mask = 0xf0000fff,
> @@ -900,6 +972,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> { /* 440GX Rev. C */
> .pvr_mask = 0xf0000fff,
> @@ -909,6 +982,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> { /* 440GX Rev. F */
> .pvr_mask = 0xf0000fff,
> @@ -918,6 +992,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> { /* 440SP Rev. A */
> .pvr_mask = 0xff000fff,
> @@ -927,6 +1002,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> { /* 440SPe Rev. A */
> .pvr_mask = 0xff000fff,
> @@ -937,6 +1013,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "ppc440",
> },
> #endif /* CONFIG_44x */
> #ifdef CONFIG_FSL_BOOKE
> @@ -950,6 +1027,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
> PPC_FEATURE_UNIFIED_CACHE,
> .dcache_bsize = 32,
> + .platform = "ppc8540",
> },
> { /* e200z6 */
> .pvr_mask = 0xfff00000,
> @@ -962,6 +1040,7 @@ struct cpu_spec cpu_specs[] = {
> PPC_FEATURE_HAS_EFP_SINGLE |
> PPC_FEATURE_UNIFIED_CACHE,
> .dcache_bsize = 32,
> + .platform = "ppc8540",
> },
> { /* e500 */
> .pvr_mask = 0xffff0000,
> @@ -977,6 +1056,7 @@ struct cpu_spec cpu_specs[] = {
> .num_pmcs = 4,
> .oprofile_cpu_type = "ppc/e500",
> .oprofile_type = BOOKE,
> + .platform = "ppc8540",
> },
> { /* e500v2 */
> .pvr_mask = 0xffff0000,
> @@ -992,6 +1072,7 @@ struct cpu_spec cpu_specs[] = {
> .num_pmcs = 4,
> .oprofile_cpu_type = "ppc/e500",
> .oprofile_type = BOOKE,
> + .platform = "ppc8540",
> },
> #endif
> #if !CLASSIC_PPC
> @@ -1003,6 +1084,7 @@ struct cpu_spec cpu_specs[] = {
> .cpu_user_features = PPC_FEATURE_32,
> .icache_bsize = 32,
> .dcache_bsize = 32,
> + .platform = "powerpc",
> }
> #endif /* !CLASSIC_PPC */
> #endif /* CONFIG_PPC32 */
> diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
> index ef6ead3..03017d9 100644
> --- a/include/asm-powerpc/cputable.h
> +++ b/include/asm-powerpc/cputable.h
> @@ -19,6 +19,7 @@
> #define PPC_FEATURE_POWER5 0x00040000
> #define PPC_FEATURE_POWER5_PLUS 0x00020000
> #define PPC_FEATURE_CELL 0x00010000
> +#define PPC_FEATURE_BOOKE 0x00008000
>
> #ifdef __KERNEL__
> #ifndef __ASSEMBLY__
> @@ -64,6 +65,9 @@ struct cpu_spec {
>
> /* Processor specific oprofile operations */
> enum powerpc_oprofile_type oprofile_type;
> +
> + /* Name of processor class, for the ELF AT_PLATFORM entry */
> + char *platform;
> };
>
> extern struct cpu_spec *cur_cpu_spec;
> diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
> index c5a635d..a75e975 100644
> --- a/include/asm-powerpc/elf.h
> +++ b/include/asm-powerpc/elf.h
> @@ -222,20 +222,18 @@ extern int dump_task_fpu(struct task_str
> instruction set this cpu supports. This could be done in userspace,
> but it's not easy, and we've already done it here. */
> # define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
> -#ifdef __powerpc64__
> -# define ELF_PLAT_INIT(_r, load_addr) do { \
> - _r->gpr[2] = load_addr; \
> -} while (0)
> -#endif /* __powerpc64__ */
>
> /* This yields a string that ld.so will use to load implementation
> specific libraries for optimization. This is more specific in
> - intent than poking at uname or /proc/cpuinfo.
> + intent than poking at uname or /proc/cpuinfo. */
>
> - For the moment, we have only optimizations for the Intel generations,
> - but that could change... */
> +#define ELF_PLATFORM (cur_cpu_spec->platform)
>
> -#define ELF_PLATFORM (NULL)
> +#ifdef __powerpc64__
> +# define ELF_PLAT_INIT(_r, load_addr) do { \
> + _r->gpr[2] = load_addr; \
> +} while (0)
> +#endif /* __powerpc64__ */
>
> #ifdef __KERNEL__
>
> _______________________________________________
> Linuxppc64-dev mailing list
> Linuxppc64-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc64-dev
>
^ permalink raw reply
* [PATCH] powerpc: Fix arch/powerpc/boot Makefile
From: Kumar Gala @ 2006-01-11 4:36 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, linuxppc64-dev, linux-kernel
clean-files was being set twice rather than being appended to.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
commit aa30a75885b935a7f09a1312e792f96cc338e505
tree 2be29cf7aacbf9ac89e3c99dcf0a0502e940ae36
parent b718d4872e6ad557b9751785b596ed57b9e6b023
author Kumar Gala <galak@kernel.crashing.org> Tue, 10 Jan 2006 22:41:48 -0600
committer Kumar Gala <galak@kernel.crashing.org> Tue, 10 Jan 2006 22:41:48 -0600
arch/powerpc/boot/Makefile | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 22726ae..b53d677 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -176,4 +176,4 @@ $(obj)/uImage: $(obj)/vmlinux.gz
install: $(CONFIGURE) $(BOOTIMAGE)
sh -x $(srctree)/$(src)/install.sh "$(KERNELRELEASE)" vmlinux System.map "$(INSTALL_PATH)" "$(BOOTIMAGE)"
-clean-files := $(addprefix $(objtree)/, $(obj-boot) vmlinux.strip)
+clean-files += $(addprefix $(objtree)/, $(obj-boot) vmlinux.strip)
^ permalink raw reply related
* [PATCH] implement AT_PLATFORM for powerpc
From: Paul Mackerras @ 2006-01-11 4:27 UTC (permalink / raw)
To: linuxppc-dev, linuxppc64-dev, sjmunroe
The patch below makes powerpc kernels supply a value for the
AT_PLATFORM aux table entry which is intended to indicate what class
of processor the program is running on, so that glibc can optionally
choose shared library objects which are optimized for the processor.
The patch also adds a PPC_FEATURE_BOOKE bit to the AT_HWCAP value to
indicate processors which conform to the Book E specification (as far
as usermode is concerned), e.g. which have the isel, mbar and msync
instructions.
The set of AT_PLATFORM values is: "cell", "power3", "power4",
"power5", "power5+", "powerpc", "ppc403", "ppc405", "ppc440",
"ppc601", "ppc603", "ppc604", "ppc7400", "ppc7450", "ppc750",
"ppc823", "ppc8540", "ppc970", "rs64".
Note that the "powerpc" value is only used for the case where the PVR
value is unrecognized.
Comments?
Paul.
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 43c74a6..c37ed06 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -80,6 +80,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power3,
.oprofile_cpu_type = "ppc64/power3",
.oprofile_type = RS64,
+ .platform = "power3",
},
{ /* Power3+ */
.pvr_mask = 0xffff0000,
@@ -93,6 +94,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power3,
.oprofile_cpu_type = "ppc64/power3",
.oprofile_type = RS64,
+ .platform = "power3",
},
{ /* Northstar */
.pvr_mask = 0xffff0000,
@@ -106,6 +108,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power3,
.oprofile_cpu_type = "ppc64/rs64",
.oprofile_type = RS64,
+ .platform = "rs64",
},
{ /* Pulsar */
.pvr_mask = 0xffff0000,
@@ -119,6 +122,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power3,
.oprofile_cpu_type = "ppc64/rs64",
.oprofile_type = RS64,
+ .platform = "rs64",
},
{ /* I-star */
.pvr_mask = 0xffff0000,
@@ -132,6 +136,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power3,
.oprofile_cpu_type = "ppc64/rs64",
.oprofile_type = RS64,
+ .platform = "rs64",
},
{ /* S-star */
.pvr_mask = 0xffff0000,
@@ -145,6 +150,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power3,
.oprofile_cpu_type = "ppc64/rs64",
.oprofile_type = RS64,
+ .platform = "rs64",
},
{ /* Power4 */
.pvr_mask = 0xffff0000,
@@ -158,6 +164,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power4,
.oprofile_cpu_type = "ppc64/power4",
.oprofile_type = POWER4,
+ .platform = "power4",
},
{ /* Power4+ */
.pvr_mask = 0xffff0000,
@@ -171,6 +178,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power4,
.oprofile_cpu_type = "ppc64/power4",
.oprofile_type = POWER4,
+ .platform = "power4",
},
{ /* PPC970 */
.pvr_mask = 0xffff0000,
@@ -185,6 +193,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_ppc970,
.oprofile_cpu_type = "ppc64/970",
.oprofile_type = POWER4,
+ .platform = "ppc970",
},
#endif /* CONFIG_PPC64 */
#if defined(CONFIG_PPC64) || defined(CONFIG_POWER4)
@@ -205,6 +214,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_ppc970,
.oprofile_cpu_type = "ppc64/970",
.oprofile_type = POWER4,
+ .platform = "ppc970",
},
#endif /* defined(CONFIG_PPC64) || defined(CONFIG_POWER4) */
#ifdef CONFIG_PPC64
@@ -220,6 +230,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_ppc970,
.oprofile_cpu_type = "ppc64/970",
.oprofile_type = POWER4,
+ .platform = "ppc970",
},
{ /* Power5 GR */
.pvr_mask = 0xffff0000,
@@ -233,6 +244,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power4,
.oprofile_cpu_type = "ppc64/power5",
.oprofile_type = POWER4,
+ .platform = "power5",
},
{ /* Power5 GS */
.pvr_mask = 0xffff0000,
@@ -246,6 +258,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_power4,
.oprofile_cpu_type = "ppc64/power5+",
.oprofile_type = POWER4,
+ .platform = "power5+",
},
{ /* Cell Broadband Engine */
.pvr_mask = 0xffff0000,
@@ -257,6 +270,7 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 128,
.dcache_bsize = 128,
.cpu_setup = __setup_cpu_be,
+ .platform = "cell",
},
{ /* default match */
.pvr_mask = 0x00000000,
@@ -268,6 +282,7 @@ struct cpu_spec cpu_specs[] = {
.dcache_bsize = 128,
.num_pmcs = 6,
.cpu_setup = __setup_cpu_power4,
+ .platform = "power4",
}
#endif /* CONFIG_PPC64 */
#ifdef CONFIG_PPC32
@@ -281,6 +296,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc601",
},
{ /* 603 */
.pvr_mask = 0xffff0000,
@@ -290,7 +306,8 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = COMMON_USER,
.icache_bsize = 32,
.dcache_bsize = 32,
- .cpu_setup = __setup_cpu_603
+ .cpu_setup = __setup_cpu_603,
+ .platform = "ppc603",
},
{ /* 603e */
.pvr_mask = 0xffff0000,
@@ -300,7 +317,8 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = COMMON_USER,
.icache_bsize = 32,
.dcache_bsize = 32,
- .cpu_setup = __setup_cpu_603
+ .cpu_setup = __setup_cpu_603,
+ .platform = "ppc603",
},
{ /* 603ev */
.pvr_mask = 0xffff0000,
@@ -310,7 +328,8 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = COMMON_USER,
.icache_bsize = 32,
.dcache_bsize = 32,
- .cpu_setup = __setup_cpu_603
+ .cpu_setup = __setup_cpu_603,
+ .platform = "ppc603",
},
{ /* 604 */
.pvr_mask = 0xffff0000,
@@ -321,7 +340,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 2,
- .cpu_setup = __setup_cpu_604
+ .cpu_setup = __setup_cpu_604,
+ .platform = "ppc604",
},
{ /* 604e */
.pvr_mask = 0xfffff000,
@@ -332,7 +352,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_604
+ .cpu_setup = __setup_cpu_604,
+ .platform = "ppc604",
},
{ /* 604r */
.pvr_mask = 0xffff0000,
@@ -343,7 +364,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_604
+ .cpu_setup = __setup_cpu_604,
+ .platform = "ppc604",
},
{ /* 604ev */
.pvr_mask = 0xffff0000,
@@ -354,7 +376,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_604
+ .cpu_setup = __setup_cpu_604,
+ .platform = "ppc604",
},
{ /* 740/750 (0x4202, don't support TAU ?) */
.pvr_mask = 0xffffffff,
@@ -365,7 +388,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750
+ .cpu_setup = __setup_cpu_750,
+ .platform = "ppc750",
},
{ /* 750CX (80100 and 8010x?) */
.pvr_mask = 0xfffffff0,
@@ -376,7 +400,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750cx
+ .cpu_setup = __setup_cpu_750cx,
+ .platform = "ppc750",
},
{ /* 750CX (82201 and 82202) */
.pvr_mask = 0xfffffff0,
@@ -387,7 +412,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750cx
+ .cpu_setup = __setup_cpu_750cx,
+ .platform = "ppc750",
},
{ /* 750CXe (82214) */
.pvr_mask = 0xfffffff0,
@@ -398,7 +424,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750cx
+ .cpu_setup = __setup_cpu_750cx,
+ .platform = "ppc750",
},
{ /* 750CXe "Gekko" (83214) */
.pvr_mask = 0xffffffff,
@@ -409,7 +436,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750cx
+ .cpu_setup = __setup_cpu_750cx,
+ .platform = "ppc750",
},
{ /* 745/755 */
.pvr_mask = 0xfffff000,
@@ -420,7 +448,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750
+ .cpu_setup = __setup_cpu_750,
+ .platform = "ppc750",
},
{ /* 750FX rev 1.x */
.pvr_mask = 0xffffff00,
@@ -431,7 +460,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750
+ .cpu_setup = __setup_cpu_750,
+ .platform = "ppc750",
},
{ /* 750FX rev 2.0 must disable HID0[DPM] */
.pvr_mask = 0xffffffff,
@@ -442,7 +472,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750
+ .cpu_setup = __setup_cpu_750,
+ .platform = "ppc750",
},
{ /* 750FX (All revs except 2.0) */
.pvr_mask = 0xffff0000,
@@ -453,7 +484,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750fx
+ .cpu_setup = __setup_cpu_750fx,
+ .platform = "ppc750",
},
{ /* 750GX */
.pvr_mask = 0xffff0000,
@@ -464,7 +496,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750fx
+ .cpu_setup = __setup_cpu_750fx,
+ .platform = "ppc750",
},
{ /* 740/750 (L2CR bit need fixup for 740) */
.pvr_mask = 0xffff0000,
@@ -475,7 +508,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_750
+ .cpu_setup = __setup_cpu_750,
+ .platform = "ppc750",
},
{ /* 7400 rev 1.1 ? (no TAU) */
.pvr_mask = 0xffffffff,
@@ -486,7 +520,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_7400
+ .cpu_setup = __setup_cpu_7400,
+ .platform = "ppc7400",
},
{ /* 7400 */
.pvr_mask = 0xffff0000,
@@ -497,7 +532,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_7400
+ .cpu_setup = __setup_cpu_7400,
+ .platform = "ppc7400",
},
{ /* 7410 */
.pvr_mask = 0xffff0000,
@@ -508,7 +544,8 @@ struct cpu_spec cpu_specs[] = {
.icache_bsize = 32,
.dcache_bsize = 32,
.num_pmcs = 4,
- .cpu_setup = __setup_cpu_7410
+ .cpu_setup = __setup_cpu_7410,
+ .platform = "ppc7400",
},
{ /* 7450 2.0 - no doze/nap */
.pvr_mask = 0xffffffff,
@@ -522,6 +559,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7450 2.1 */
.pvr_mask = 0xffffffff,
@@ -535,6 +573,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7450 2.3 and newer */
.pvr_mask = 0xffff0000,
@@ -548,6 +587,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7455 rev 1.x */
.pvr_mask = 0xffffff00,
@@ -561,6 +601,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7455 rev 2.0 */
.pvr_mask = 0xffffffff,
@@ -574,6 +615,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7455 others */
.pvr_mask = 0xffff0000,
@@ -587,6 +629,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7447/7457 Rev 1.0 */
.pvr_mask = 0xffffffff,
@@ -600,6 +643,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7447/7457 Rev 1.1 */
.pvr_mask = 0xffffffff,
@@ -613,6 +657,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7447/7457 Rev 1.2 and later */
.pvr_mask = 0xffff0000,
@@ -626,6 +671,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7447A */
.pvr_mask = 0xffff0000,
@@ -639,6 +685,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 7448 */
.pvr_mask = 0xffff0000,
@@ -652,6 +699,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_setup = __setup_cpu_745x,
.oprofile_cpu_type = "ppc/7450",
.oprofile_type = G4,
+ .platform = "ppc7450",
},
{ /* 82xx (8240, 8245, 8260 are all 603e cores) */
.pvr_mask = 0x7fff0000,
@@ -661,7 +709,8 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = COMMON_USER,
.icache_bsize = 32,
.dcache_bsize = 32,
- .cpu_setup = __setup_cpu_603
+ .cpu_setup = __setup_cpu_603,
+ .platform = "ppc603",
},
{ /* All G2_LE (603e core, plus some) have the same pvr */
.pvr_mask = 0x7fff0000,
@@ -671,7 +720,8 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = COMMON_USER,
.icache_bsize = 32,
.dcache_bsize = 32,
- .cpu_setup = __setup_cpu_603
+ .cpu_setup = __setup_cpu_603,
+ .platform = "ppc603",
},
{ /* e300 (a 603e core, plus some) on 83xx */
.pvr_mask = 0x7fff0000,
@@ -681,7 +731,8 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = COMMON_USER,
.icache_bsize = 32,
.dcache_bsize = 32,
- .cpu_setup = __setup_cpu_603
+ .cpu_setup = __setup_cpu_603,
+ .platform = "ppc603",
},
{ /* default match, we assume split I/D cache & TB (non-601)... */
.pvr_mask = 0x00000000,
@@ -691,6 +742,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = COMMON_USER,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc603",
},
#endif /* CLASSIC_PPC */
#ifdef CONFIG_8xx
@@ -704,6 +756,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 16,
.dcache_bsize = 16,
+ .platform = "ppc823",
},
#endif /* CONFIG_8xx */
#ifdef CONFIG_40x
@@ -715,6 +768,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 16,
.dcache_bsize = 16,
+ .platform = "ppc403",
},
{ /* 403GCX */
.pvr_mask = 0xffffff00,
@@ -725,6 +779,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
.icache_bsize = 16,
.dcache_bsize = 16,
+ .platform = "ppc403",
},
{ /* 403G ?? */
.pvr_mask = 0xffff0000,
@@ -734,6 +789,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 16,
.dcache_bsize = 16,
+ .platform = "ppc403",
},
{ /* 405GP */
.pvr_mask = 0xffff0000,
@@ -744,6 +800,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* STB 03xxx */
.pvr_mask = 0xffff0000,
@@ -754,6 +811,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* STB 04xxx */
.pvr_mask = 0xffff0000,
@@ -764,6 +822,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* NP405L */
.pvr_mask = 0xffff0000,
@@ -774,6 +833,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* NP4GS3 */
.pvr_mask = 0xffff0000,
@@ -784,6 +844,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* NP405H */
.pvr_mask = 0xffff0000,
@@ -794,6 +855,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* 405GPr */
.pvr_mask = 0xffff0000,
@@ -804,6 +866,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* STBx25xx */
.pvr_mask = 0xffff0000,
@@ -814,6 +877,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* 405LP */
.pvr_mask = 0xffff0000,
@@ -823,6 +887,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* Xilinx Virtex-II Pro */
.pvr_mask = 0xffff0000,
@@ -833,6 +898,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
{ /* 405EP */
.pvr_mask = 0xffff0000,
@@ -843,6 +909,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc405",
},
#endif /* CONFIG_40x */
@@ -855,6 +922,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = COMMON_USER, /* 440EP has an FPU */
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
{
.pvr_mask = 0xf0000fff,
@@ -864,6 +932,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = COMMON_USER, /* 440EP has an FPU */
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
{ /* 440GP Rev. B */
.pvr_mask = 0xf0000fff,
@@ -873,6 +942,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
{ /* 440GP Rev. C */
.pvr_mask = 0xf0000fff,
@@ -882,6 +952,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
{ /* 440GX Rev. A */
.pvr_mask = 0xf0000fff,
@@ -891,6 +962,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
{ /* 440GX Rev. B */
.pvr_mask = 0xf0000fff,
@@ -900,6 +972,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
{ /* 440GX Rev. C */
.pvr_mask = 0xf0000fff,
@@ -909,6 +982,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
{ /* 440GX Rev. F */
.pvr_mask = 0xf0000fff,
@@ -918,6 +992,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
{ /* 440SP Rev. A */
.pvr_mask = 0xff000fff,
@@ -927,6 +1002,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
{ /* 440SPe Rev. A */
.pvr_mask = 0xff000fff,
@@ -937,6 +1013,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "ppc440",
},
#endif /* CONFIG_44x */
#ifdef CONFIG_FSL_BOOKE
@@ -950,6 +1027,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
PPC_FEATURE_UNIFIED_CACHE,
.dcache_bsize = 32,
+ .platform = "ppc8540",
},
{ /* e200z6 */
.pvr_mask = 0xfff00000,
@@ -962,6 +1040,7 @@ struct cpu_spec cpu_specs[] = {
PPC_FEATURE_HAS_EFP_SINGLE |
PPC_FEATURE_UNIFIED_CACHE,
.dcache_bsize = 32,
+ .platform = "ppc8540",
},
{ /* e500 */
.pvr_mask = 0xffff0000,
@@ -977,6 +1056,7 @@ struct cpu_spec cpu_specs[] = {
.num_pmcs = 4,
.oprofile_cpu_type = "ppc/e500",
.oprofile_type = BOOKE,
+ .platform = "ppc8540",
},
{ /* e500v2 */
.pvr_mask = 0xffff0000,
@@ -992,6 +1072,7 @@ struct cpu_spec cpu_specs[] = {
.num_pmcs = 4,
.oprofile_cpu_type = "ppc/e500",
.oprofile_type = BOOKE,
+ .platform = "ppc8540",
},
#endif
#if !CLASSIC_PPC
@@ -1003,6 +1084,7 @@ struct cpu_spec cpu_specs[] = {
.cpu_user_features = PPC_FEATURE_32,
.icache_bsize = 32,
.dcache_bsize = 32,
+ .platform = "powerpc",
}
#endif /* !CLASSIC_PPC */
#endif /* CONFIG_PPC32 */
diff --git a/include/asm-powerpc/cputable.h b/include/asm-powerpc/cputable.h
index ef6ead3..03017d9 100644
--- a/include/asm-powerpc/cputable.h
+++ b/include/asm-powerpc/cputable.h
@@ -19,6 +19,7 @@
#define PPC_FEATURE_POWER5 0x00040000
#define PPC_FEATURE_POWER5_PLUS 0x00020000
#define PPC_FEATURE_CELL 0x00010000
+#define PPC_FEATURE_BOOKE 0x00008000
#ifdef __KERNEL__
#ifndef __ASSEMBLY__
@@ -64,6 +65,9 @@ struct cpu_spec {
/* Processor specific oprofile operations */
enum powerpc_oprofile_type oprofile_type;
+
+ /* Name of processor class, for the ELF AT_PLATFORM entry */
+ char *platform;
};
extern struct cpu_spec *cur_cpu_spec;
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index c5a635d..a75e975 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -222,20 +222,18 @@ extern int dump_task_fpu(struct task_str
instruction set this cpu supports. This could be done in userspace,
but it's not easy, and we've already done it here. */
# define ELF_HWCAP (cur_cpu_spec->cpu_user_features)
-#ifdef __powerpc64__
-# define ELF_PLAT_INIT(_r, load_addr) do { \
- _r->gpr[2] = load_addr; \
-} while (0)
-#endif /* __powerpc64__ */
/* This yields a string that ld.so will use to load implementation
specific libraries for optimization. This is more specific in
- intent than poking at uname or /proc/cpuinfo.
+ intent than poking at uname or /proc/cpuinfo. */
- For the moment, we have only optimizations for the Intel generations,
- but that could change... */
+#define ELF_PLATFORM (cur_cpu_spec->platform)
-#define ELF_PLATFORM (NULL)
+#ifdef __powerpc64__
+# define ELF_PLAT_INIT(_r, load_addr) do { \
+ _r->gpr[2] = load_addr; \
+} while (0)
+#endif /* __powerpc64__ */
#ifdef __KERNEL__
^ permalink raw reply related
* [PATCH] powerpc: Add some missing .gitignore's
From: Kumar Gala @ 2006-01-11 4:12 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, linuxppc64-dev
ignore generated files under arch/powerpc
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
commit 4ef3ebb801e686338c5a8c87863887c54b2af02e
tree 384eb9502d8d4ef5d5452cfe7f43906366230454
parent 2c80aa14abcccdfdef2998ba78c299c33999c621
author Kumar Gala <galak@kernel.crashing.org> Tue, 10 Jan 2006 22:17:28 -0600
committer Kumar Gala <galak@kernel.crashing.org> Tue, 10 Jan 2006 22:17:28 -0600
arch/powerpc/boot/.gitignore | 20 ++++++++++++++++++++
arch/powerpc/kernel/vdso32/.gitignore | 1 +
arch/powerpc/kernel/vdso64/.gitignore | 1 +
3 files changed, 22 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
new file mode 100644
index 0000000..45c9ad2
--- /dev/null
+++ b/arch/powerpc/boot/.gitignore
@@ -0,0 +1,20 @@
+addnote
+infblock.c
+infblock.h
+infcodes.c
+infcodes.h
+inffast.c
+inffast.h
+inflate.c
+inftrees.c
+inftrees.h
+infutil.c
+infutil.h
+kernel-vmlinux.strip.c
+kernel-vmlinux.strip.gz
+uImage
+zImage
+zImage.vmode
+zconf.h
+zlib.h
+zutil.h
diff --git a/arch/powerpc/kernel/vdso32/.gitignore b/arch/powerpc/kernel/vdso32/.gitignore
new file mode 100644
index 0000000..e45fba9
--- /dev/null
+++ b/arch/powerpc/kernel/vdso32/.gitignore
@@ -0,0 +1 @@
+vdso32.lds
diff --git a/arch/powerpc/kernel/vdso64/.gitignore b/arch/powerpc/kernel/vdso64/.gitignore
new file mode 100644
index 0000000..3fd18cf
--- /dev/null
+++ b/arch/powerpc/kernel/vdso64/.gitignore
@@ -0,0 +1 @@
+vdso64.lds
^ permalink raw reply related
* [PATCH] powerpc: Updated Kconfig and Makefiles for 83xx support
From: Kumar Gala @ 2006-01-11 3:43 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, linuxppc64-dev
Updated Kconfig & Makefiles in prep for adding support for the Freescale
MPC83xx family of processors to arch/powerpc. Moved around some config
options that are more globally applicable to other PowerPC processors.
Added a temporary config option (83xx) to match existh arch/ppc support
for the MPC83xx line.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
commit 2c80aa14abcccdfdef2998ba78c299c33999c621
tree 980e516b488d408d93402dbdbe3749e48996bb81
parent 6d26108d8631afcb31faa6d63cab7bee8d35871c
author Kumar Gala <galak@kernel.crashing.org> Tue, 10 Jan 2006 21:49:06 -0600
committer Kumar Gala <galak@kernel.crashing.org> Tue, 10 Jan 2006 21:49:06 -0600
arch/powerpc/Kconfig | 83 +++++++++++++++++-----------
arch/powerpc/platforms/83xx/Kconfig | 26 +++++++++
arch/powerpc/platforms/83xx/Makefile | 4 +
arch/powerpc/platforms/Makefile | 1
arch/powerpc/platforms/embedded6xx/Kconfig | 18 ------
arch/powerpc/sysdev/Makefile | 2 -
arch/ppc/Kconfig | 4 +
7 files changed, 85 insertions(+), 53 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 935d965..01feed0 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -71,15 +71,39 @@ config ARCH_MAY_HAVE_PC_FDC
bool
default y
+config PPC_OF
+ def_bool y
+
+config PPC_UDBG_16550
+ bool
+ default n
+
+config CRASH_DUMP
+ bool "kernel crash dumps (EXPERIMENTAL)"
+ depends on PPC_MULTIPLATFORM
+ depends on EXPERIMENTAL
+ help
+ Build a kernel suitable for use as a kdump capture kernel.
+ The kernel will be linked at a different address than normal, and
+ so can only be used for Kdump.
+
+ Don't change this unless you know what you are doing.
+
+config GENERIC_TBSYNC
+ bool
+ default y if PPC32 && SMP
+ default n
+
menu "Processor support"
choice
prompt "Processor Type"
depends on PPC32
default 6xx
-config 6xx
+config CLASSIC32
bool "6xx/7xx/74xx"
select PPC_FPU
+ select 6xx
help
There are four families of PowerPC chips supported. The more common
types (601, 603, 604, 740, 750, 7400), the Motorola embedded
@@ -93,12 +117,20 @@ config 6xx
config PPC_52xx
bool "Freescale 52xx"
+ select 6xx
+ select PPC_FPU
config PPC_82xx
bool "Freescale 82xx"
+ select 6xx
+ select PPC_FPU
config PPC_83xx
bool "Freescale 83xx"
+ select 6xx
+ select FSL_SOC
+ select 83xx
+ select PPC_FPU
config 40x
bool "AMCC 40x"
@@ -134,6 +166,13 @@ config POWER4
depends on PPC64
def_bool y
+config 6xx
+ bool
+
+# this is temp to handle compat with arch=ppc
+config 83xx
+ bool
+
config PPC_FPU
bool
default y if PPC64
@@ -166,7 +205,7 @@ config PHYS_64BIT
config ALTIVEC
bool "AltiVec Support"
- depends on 6xx || POWER4
+ depends on CLASSIC32 || POWER4
---help---
This option enables kernel support for the Altivec extensions to the
PowerPC processor. The kernel currently supports saving and restoring
@@ -239,7 +278,7 @@ endmenu
source "init/Kconfig"
menu "Platform support"
- depends on PPC64 || 6xx
+ depends on PPC64 || CLASSIC32
choice
prompt "Machine type"
@@ -330,9 +369,6 @@ config PPC_CELL
select MMIO_NVRAM
select PPC_UDBG_16550
-config PPC_OF
- def_bool y
-
config XICS
depends on PPC_PSERIES
bool
@@ -375,26 +411,11 @@ config MPIC_BROKEN_U3
depends on PPC_MAPLE
default y
-config PPC_UDBG_16550
- bool
- default n
-
config CELL_IIC
depends on PPC_CELL
bool
default y
-config CRASH_DUMP
- bool "kernel crash dumps (EXPERIMENTAL)"
- depends on PPC_MULTIPLATFORM
- depends on EXPERIMENTAL
- help
- Build a kernel suitable for use as a kdump capture kernel.
- The kernel will be linked at a different address than normal, and
- so can only be used for Kdump.
-
- Don't change this unless you know what you are doing.
-
config IBMVIO
depends on PPC_PSERIES || PPC_ISERIES
bool
@@ -410,11 +431,6 @@ config PPC_MPC106
bool
default n
-config GENERIC_TBSYNC
- bool
- default y if PPC32 && SMP
- default n
-
source "drivers/cpufreq/Kconfig"
config CPU_FREQ_PMAC
@@ -495,6 +511,7 @@ endmenu
source arch/powerpc/platforms/embedded6xx/Kconfig
source arch/powerpc/platforms/4xx/Kconfig
+source arch/powerpc/platforms/83xx/Kconfig
source arch/powerpc/platforms/85xx/Kconfig
source arch/powerpc/platforms/8xx/Kconfig
source arch/powerpc/platforms/cell/Kconfig
@@ -718,7 +735,7 @@ config PPC_I8259
config PPC_INDIRECT_PCI
bool
depends on PCI
- default y if 40x || 44x || 85xx || 83xx
+ default y if 40x || 44x || 85xx
default n
config EISA
@@ -727,13 +744,16 @@ config EISA
config SBUS
bool
+config FSL_SOC
+ bool
+
# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
config MCA
bool
config PCI
- bool "PCI support" if 40x || CPM2 || 83xx || 85xx || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES)
- default y if !40x && !CPM2 && !8xx && !APUS && !83xx && !85xx
+ bool "PCI support" if 40x || CPM2 || PPC_83xx || 85xx || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES)
+ default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx && !85xx
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
default PCI_QSPAN if !4xx && !CPM2 && 8xx
help
@@ -746,11 +766,6 @@ config PCI_DOMAINS
bool
default PCI
-config MPC83xx_PCI2
- bool " Supprt for 2nd PCI host controller"
- depends on PCI && MPC834x
- default y if MPC834x_SYS
-
config PCI_QSPAN
bool "QSpan PCI"
depends on !4xx && !CPM2 && 8xx
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
new file mode 100644
index 0000000..b20812d
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -0,0 +1,26 @@
+menu "Platform support"
+ depends on PPC_83xx
+
+choice
+ prompt "Machine Type"
+ default MPC834x_SYS
+
+config MPC834x_SYS
+ bool "Freescale MPC834x SYS"
+ help
+ This option enables support for the MPC 834x SYS evaluation board.
+
+ Be aware that PCI buses can only function when SYS board is plugged
+ into the PIB (Platform IO Board) board from Freescale which provide
+ 3 PCI slots. The PIBs PCI initialization is the bootloader's
+ responsiblilty.
+
+endchoice
+
+config MPC834x
+ bool
+ select PPC_UDBG_16550
+ select PPC_INDIRECT_PCI
+ default y if MPC834x_SYS
+
+endmenu
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
new file mode 100644
index 0000000..9d8b28e
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -0,0 +1,4 @@
+#
+# Makefile for the PowerPC 83xx linux kernel.
+#
+obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o pci.o
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 8836b3a..04073fd 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -7,6 +7,7 @@ endif
endif
obj-$(CONFIG_PPC_CHRP) += chrp/
obj-$(CONFIG_4xx) += 4xx/
+obj-$(CONFIG_PPC_83xx) += 83xx/
obj-$(CONFIG_85xx) += 85xx/
obj-$(CONFIG_PPC_PSERIES) += pseries/
obj-$(CONFIG_PPC_ISERIES) += iseries/
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 8125009..4fdbc9a 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -144,16 +144,6 @@ config LITE5200
much but it's only been tested on this board version. I think this
board is also known as IceCube.
-config MPC834x_SYS
- bool "Freescale MPC834x SYS"
- help
- This option enables support for the MPC 834x SYS evaluation board.
-
- Be aware that PCI buses can only function when SYS board is plugged
- into the PIB (Platform IO Board) board from Freescale which provide
- 3 PCI slots. The PIBs PCI initialization is the bootloader's
- responsiblilty.
-
config EV64360
bool "Marvell-EV64360BP"
help
@@ -192,14 +182,6 @@ config 8272
The MPC8272 CPM has a different internal dpram setup than other CPM2
devices
-config 83xx
- bool
- default y if MPC834x_SYS
-
-config MPC834x
- bool
- default y if MPC834x_SYS
-
config CPM2
bool
depends on 8260 || MPC8560 || MPC8555
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 14b9abd..0ae8413 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -6,4 +6,4 @@ obj-$(CONFIG_BOOKE) += dcr.o
obj-$(CONFIG_40x) += dcr.o
obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
-obj-$(CONFIG_83xx) += ipic.o
+obj-$(CONFIG_PPC_83xx) += ipic.o
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index e396f45..d658101 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -743,6 +743,10 @@ config MPC834x
bool
default y if MPC834x_SYS
+config PPC_83xx
+ bool
+ default y if 83xx
+
config CPM1
bool
depends on 8xx
^ permalink raw reply related
* Re: patch add-macio_bus_type-probe-and-remove-methods.patch added to gregkh-2.6 tree
From: Benjamin Herrenschmidt @ 2006-01-11 1:55 UTC (permalink / raw)
To: gregkh; +Cc: greg, rmk+kernel, rmk, linuxppc-dev
In-Reply-To: <1EwCY8-1zu-00@press.kroah.org>
On Mon, 2006-01-09 at 22:00 -0800, gregkh@suse.de wrote:
> This is a note to let you know that I've just added the patch titled
>
> Subject: [CFT 19/29] Add macio_bus_type probe and remove methods
>
> to my gregkh-2.6 tree. Its filename is
>
> add-macio_bus_type-probe-and-remove-methods.patch
>
> This tree can be found at
> http://www.kernel.org/pub/linux/kernel/people/gregkh/gregkh-2.6/patches/
>
>
> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> ---
> drivers/macintosh/macio_asic.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> --- gregkh-2.6.orig/drivers/macintosh/macio_asic.c
> +++ gregkh-2.6/drivers/macintosh/macio_asic.c
> @@ -204,6 +204,9 @@ struct bus_type macio_bus_type = {
> .name = "macio",
> .match = macio_bus_match,
> .uevent = macio_uevent,
> + .probe = macio_device_probe,
> + .remove = macio_device_remove,
> + .shutdown = macio_device_shutdown,
> .suspend = macio_device_suspend,
> .resume = macio_device_resume,
> .dev_attrs = macio_dev_attrs,
> @@ -487,9 +490,6 @@ int macio_register_driver(struct macio_d
> /* initialize common driver fields */
> drv->driver.name = drv->name;
> drv->driver.bus = &macio_bus_type;
> - drv->driver.probe = macio_device_probe;
> - drv->driver.remove = macio_device_remove;
> - drv->driver.shutdown = macio_device_shutdown;
>
> /* register with core */
> count = driver_register(&drv->driver);
>
>
> Patches currently in gregkh-2.6 which might be from rmk@arm.linux.org.uk are
>
> driver/add-bttv-sub-bus_type-probe-and-remove-methods.patch
> driver/add-bus_type-probe-remove-shutdown-methods..patch
> driver/add-ccwgroup_bus_type-probe-and-remove-methods.patch
> driver/add-dio_bus_type-probe-and-remove-methods.patch
> driver/add-ecard_bus_type-probe-remove-shutdown-methods.patch
> driver/add-gameport-bus_type-probe-and-remove-methods.patch
> driver/add-i2c_bus_type-probe-and-remove-methods.patch
> driver/add-ide_bus_type-probe-and-remove-methods.patch
> driver/add-locomo-bus_type-probe-remove-methods.patch
> driver/add-logic-module-bus_type-probe-remove-methods.patch
> driver/add-macio_bus_type-probe-and-remove-methods.patch
> driver/add-mcp-bus_type-probe-and-remove-methods.patch
> driver/add-mmc_bus_type-probe-and-remove-methods.patch
> driver/add-ocp_bus_type-probe-and-remove-methods.patch
> driver/add-of_platform_bus_type-probe-and-remove-methods.patch
> driver/add-parisc_bus_type-probe-and-remove-methods.patch
> driver/add-pci_bus_type-probe-and-remove-methods.patch
> driver/add-pcmcia_bus_type-probe-and-remove-methods.patch
> driver/add-pnp_bus_type-probe-and-remove-methods.patch
> driver/add-pseudo-lld-bus_type-probe-and-remove-methods.patch
> driver/add-rio_bus_type-probe-and-remove-methods.patch
> driver/add-sa1111-bus_type-probe-remove-methods.patch
> driver/add-serio-bus_type-probe-and-remove-methods.patch
> driver/add-sh_bus_type-probe-and-remove-methods.patch
> driver/add-superhyway_bus_type-probe-and-remove-methods.patch
> driver/add-tiocx-bus_type-probe-remove-methods.patch
> driver/add-usb_serial_bus_type-probe-and-remove-methods.patch
> driver/add-vio_bus_type-probe-and-remove-methods.patch
> driver/add-zorro_bus_type-probe-and-remove-methods.patch
> driver/remove-usb-gadget-generic-driver-methods.patch
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH] powerpc: fix large nvram access
From: Arnd Bergmann @ 2006-01-10 23:34 UTC (permalink / raw)
To: linuxppc-dev; +Cc: arndb, Olaf Hering
In-Reply-To: <20060110221313.GA24246@suse.de>
Am Dienstag, 10. Januar 2006 23:13 schrieb Olaf Hering:
> On Mon, Jan 09, Linux Kernel Mailing List wrote:
> > tree da8f883f72d08f9534e9eca3bba662413b9bd865
> > parent d52771fce4e774fa786097d34412a057d487c697
> > author Arnd Bergmann <arnd@arndb.de> Fri, 09 Dec 2005 19:21:44 +0100
> > committer Paul Mackerras <paulus@samba.org> Mon, 09 Jan 2006 14:53:31
> > +1100
> >
> > [PATCH] powerpc: fix large nvram access
> >
> > /dev/nvram uses the user-provided read/write size
> > for kmalloc, which fails, if a large number is passed.
> > This will always use a single page at most, which
> > can be expected to succeed.
> >
> > Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
> > Signed-off-by: Paul Mackerras <paulus@samba.org>
> >
> > arch/powerpc/kernel/nvram_64.c | 114
> > +++++++++++++++++++----------------------
>
> this change breaks my nvsetenv binary on JS20.
>
I think this has uncovered a bug that has been in nvsetenv for a long time.
> open("/dev/nvram", O_RDONLY) = 3
> read(3, "P\347\0\34of-config\0\0\0", 16) = 16
> lseek(3, 432, SEEK_CUR) = 448
> read(3, "p\375\2\0common\0\0\0\0\0\0", 16) = 16
> read(3, "ibm,fw-phandle-enable?=false\0lit"..., 8176) = 4096
This is where my patch changed the behavior of the driver. It used to return all the data in one chunk, now it returns 4096 bytes at most.
> dup(2) = 4
> fcntl64(4, F_GETFL) = 0x2 (flags O_RDWR)
> fstat64(4, {st_mode=S_IFCHR|0600, st_rdev=makedev(5, 1), ...}) = 0
> ioctl(4, TCGETS, {B38400 opost isig icanon echo ...}) = 0
> mmap(NULL, 131072, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0xf7fc0000
> _llseek(4, 0, 0xffd63fd8, SEEK_CUR) = -1 ESPIPE
> (Illegal seek)
> write(4, "Error reading /dev/nvram: Succes"..., 34Error reading /dev/nvram: Success ) = 34
> close(4) = 0
> munmap(0xf7fc0000, 131072) = 0
> exit_group(1) = ?
> (none):/#
And then it got here:
| if (lseek(nvfd, NVSTART, 0) < 0
| || read(nvfd, &nvbuf, NVSIZE) != NVSIZE) {
| perror("Error reading /dev/nvram");
| exit(EXIT_FAILURE);
| }
I'm pretty sure that the failing _llseek is part of the perror
implementation and not the real problem, as we were first thinking.
The problem is that nvsetenv bails out on a short read, while according
to the man page, "It is not an error if this number is smaller than the
number of bytes requested". Of course, character devices often differ
in their behavior from what is in the man pages for file I/O.
I'd suggest we change both ends: nvsetenv should really be able to deal
with a short read, and we can double the size of the kmalloc buffer
for the kernel implementation. Please test the patch below.
---
Subject: powerpc: fix nvsetenv regression with fixed nvram read/write
reading from /dev/nvram was recently fixed to not try to allocate the
user-defined amount of kernel memory. This broke the nvsetenv tool
which relied on never getting short reads from /dev/nvram.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index fd7db8d..8da6e57 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -34,6 +34,15 @@
#undef DEBUG_NVRAM
+/*
+ * Old nvsetenv versions expect us to be able to return 8kb
+ * of data in a single read, so use that as a limit for short
+ * reads.
+ * We can't simply use the requested size because large
+ * kmalloc allocations often fail.
+ */
+#define NVRAM_ALLOC_SIZE 8192
+
static int nvram_scan_partitions(void);
static int nvram_setup_partition(void);
static int nvram_create_os_partition(void);
@@ -94,7 +103,7 @@ static ssize_t dev_nvram_read(struct fil
goto out;
count = min_t(size_t, count, size - *ppos);
- count = min(count, PAGE_SIZE);
+ count = min(count, NVRAM_ALLOC_SIZE);
ret = -ENOMEM;
tmp = kmalloc(count, GFP_KERNEL);
@@ -131,7 +140,7 @@ static ssize_t dev_nvram_write(struct fi
goto out;
count = min_t(size_t, count, size - *ppos);
- count = min(count, PAGE_SIZE);
+ count = min(count, NVRAM_ALLOC_SIZE);
ret = -ENOMEM;
tmp = kmalloc(count, GFP_KERNEL);
^ permalink raw reply related
* Re: [PATCH] powerpc: fix large nvram access
From: Andreas Schwab @ 2006-01-10 23:22 UTC (permalink / raw)
To: Olaf Hering; +Cc: linuxppc-dev, arndb
In-Reply-To: <20060110221313.GA24246@suse.de>
Olaf Hering <olh@suse.de> writes:
> this change breaks my nvsetenv binary on JS20.
>
> (none):/# mount proc ; nvsetenv
> Error reading /dev/nvram: Success
It was broken to begin with.
Andreas.
--
Andreas Schwab, SuSE Labs, schwab@suse.de
SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany
PGP key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
^ permalink raw reply
* Re: [PATCH] powerpc: fix large nvram access
From: Olaf Hering @ 2006-01-10 22:13 UTC (permalink / raw)
To: linuxppc-dev, arndb
In-Reply-To: <200601091916.k09JGMJY004116@hera.kernel.org>
On Mon, Jan 09, Linux Kernel Mailing List wrote:
> tree da8f883f72d08f9534e9eca3bba662413b9bd865
> parent d52771fce4e774fa786097d34412a057d487c697
> author Arnd Bergmann <arnd@arndb.de> Fri, 09 Dec 2005 19:21:44 +0100
> committer Paul Mackerras <paulus@samba.org> Mon, 09 Jan 2006 14:53:31 +1100
>
> [PATCH] powerpc: fix large nvram access
>
> /dev/nvram uses the user-provided read/write size
> for kmalloc, which fails, if a large number is passed.
> This will always use a single page at most, which
> can be expected to succeed.
>
> Signed-off-by: Arnd Bergmann <arndb@de.ibm.com>
> Signed-off-by: Paul Mackerras <paulus@samba.org>
>
> arch/powerpc/kernel/nvram_64.c | 114 +++++++++++++++++++----------------------
this change breaks my nvsetenv binary on JS20.
(none):/# mount proc ; nvsetenv
Error reading /dev/nvram: Success
(none):/# strace -f nvsetenv
execve("/sbin/nvsetenv", ["nvsetenv"], [/* 61 vars */]) = 0
brk(0) = 0x10014000
mmap(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0xf7fe0000
access("/etc/ld.so.preload", R_OK) = -1 ENOENT (No such file or directory)
open("/etc/ld.so.cache", O_RDONLY) = 3
fstat64(3, {st_mode=S_IFREG|0644, st_size=171714, ...}) = 0
mmap(NULL, 171714, PROT_READ, MAP_PRIVATE, 3, 0) = 0xf7fb6000
close(3) = 0
open("/lib/libc.so.6", O_RDONLY) = 3
read(3, "\177ELF\1\2\1\0\0\0\0\0\0\0\0\0\0\3\0\24\0\0\0\1\0\1\325"..., 512) = 512
fstat64(3, {st_mode=S_IFREG|0755, st_size=1569515, ...}) = 0
mmap(0xfe99000, 1401836, PROT_READ|PROT_EXEC, MAP_PRIVATE|MAP_DENYWRITE, 3, 0) = 0xfe99000
madvise(0xfe99000, 1401836, MADV_SEQUENTIAL|0x1) = 0
mprotect(0xffd8000, 65536, PROT_NONE) = 0
mmap(0xffe8000, 20480, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_DENYWRITE, 3, 0x13f000) = 0xffe8000
mmap(0xffed000, 9196, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_FIXED|MAP_ANONYMOUS, -1, 0) = 0xffed000
close(3) = 0
mmap(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0xf7fb5000
mprotect(0xffe8000, 4096, PROT_READ) = 0
munmap(0xf7fb6000, 171714) = 0
brk(0) = 0x10014000
brk(0x10035000) = 0x10035000
open("/proc/device-tree/compatible", O_RDONLY) = 3
fstat64(3, {st_mode=S_IFREG|0444, st_size=13, ...}) = 0
mmap(NULL, 4096, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0xf7fdf000
read(3, "IBM,1234-123\0", 1024) = 13
read(3, "", 1024) = 0
close(3) = 0
munmap(0xf7fdf000, 4096) = 0
open("/dev/nvram", O_RDONLY) = 3
read(3, "P\347\0\34of-config\0\0\0", 16) = 16
lseek(3, 432, SEEK_CUR) = 448
read(3, "p\375\2\0common\0\0\0\0\0\0", 16) = 16
read(3, "ibm,fw-phandle-enable?=false\0lit"..., 8176) = 4096
dup(2) = 4
fcntl64(4, F_GETFL) = 0x2 (flags O_RDWR)
fstat64(4, {st_mode=S_IFCHR|0600, st_rdev=makedev(5, 1), ...}) = 0
ioctl(4, TCGETS, {B38400 opost isig icanon echo ...}) = 0
mmap(NULL, 131072, PROT_READ|PROT_WRITE, MAP_PRIVATE|MAP_ANONYMOUS, -1, 0) = 0xf7fc0000
_llseek(4, 0, 0xffd63fd8, SEEK_CUR) = -1 ESPIPE (Illegal seek)
write(4, "Error reading /dev/nvram: Succes"..., 34Error reading /dev/nvram: Success
) = 34
close(4) = 0
munmap(0xf7fc0000, 131072) = 0
exit_group(1) = ?
(none):/#
--
short story of a lazy sysadmin:
alias appserv=wotan
^ permalink raw reply
* Re: Error: Three ML403 boards
From: Peter Ryser @ 2006-01-10 22:10 UTC (permalink / raw)
To: Paula Saameño; +Cc: linuxppc-embedded
In-Reply-To: <259581790601100820s42d1a311ye40bfcf4ba6c9bd5@mail.gmail.com>
Paula,
please verify that you are not running into the problem described in=20
Xilinx Answer Record 22179=20
(http://www.xilinx.com/xlnx/xil_ans_display.jsp?iLanguageID=3D1&iCountryI=
D=3D1&getPagePath=3D22179).
- Peter
Paula Saame=F1o wrote:
> Hello,
>
> I have 3 Xilinx ML403 boards. I have implemented a 2.4 kernel with a=20
> basic configuration, with network support, systemACE, IIC... and it=20
> works perfectly in one of them.
>
> However, when I put the ACE card, without making any change, in other=20
> ML403 board, it does not work. The .ace file is loaded ok but then the=20
> network leds (6 leds) start blinking and nothing else happens.
>
> I have tried with two ML403 different boards, and I have no idea of=20
> where the problem is. They should work in the same way, don't they?
>
> Any help would be great.
>
> Also, I am trying to load a 2.6 kernel, but I am still on the way. I=20
> will let you know if I get it working.
>
> Thanks a lot!
> Paula
>
>------------------------------------------------------------------------
>
>_______________________________________________
>Linuxppc-embedded mailing list
>Linuxppc-embedded@ozlabs.org
>https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
^ permalink raw reply
* Re: 2.6.15-mm2
From: Serge E. Hallyn @ 2006-01-10 21:20 UTC (permalink / raw)
To: Andrew Morton, lkml; +Cc: linuxppc-dev
In-Reply-To: <20060107052221.61d0b600.akpm@osdl.org>
Quoting Andrew Morton (akpm@osdl.org):
>
> ftp://ftp.kernel.org/pub/linux/kernel/people/akpm/patches/2.6/2.6.15/2.6.15-mm2/
With both this and 2.6.15-mm1, but not with 2.6.15, I get the following
error:
mm/built-in.o(*ABS*+0x39c3c7ac): In function `__crc___handle_mm_fault':
slab.c: multiple definition of `__crc___handle_mm_fault'
make: *** [.tmp_vmlinux1] Error 1
The culprit appears to be that there are two places where
__handle_mm_fault is EXPORT_SYMBOL_GPLed. The following trivial patch
fixes it for me.
Signed-off-by: Serge Hallyn <serue@us.ibm.com>
Index: linux-2.6.15/arch/powerpc/kernel/ppc_ksyms.c
===================================================================
--- linux-2.6.15.orig/arch/powerpc/kernel/ppc_ksyms.c 2006-01-10 04:59:11.000000000 -0600
+++ linux-2.6.15/arch/powerpc/kernel/ppc_ksyms.c 2006-01-10 09:07:40.000000000 -0600
@@ -240,8 +240,6 @@ EXPORT_SYMBOL(next_mmu_context);
EXPORT_SYMBOL(set_context);
#endif
-EXPORT_SYMBOL_GPL(__handle_mm_fault);
-
#ifdef CONFIG_PPC_STD_MMU_32
extern long mol_trampoline;
EXPORT_SYMBOL(mol_trampoline); /* For MOL */
thanks,
-serge
^ permalink raw reply
* [PATCH] enable the RTC driver in ppc64_defconfig
From: Olaf Hering @ 2006-01-10 20:57 UTC (permalink / raw)
To: Paul Mackeras, linuxppc-dev
Enable the RTC driver.
Signed-off-by: Olaf Hering <olh@suse.de>
arch/powerpc/configs/ppc64_defconfig | 2 +-
1 files changed, 1 insertion(+), 1 deletion(-)
Index: linux-2.6.15-olh/arch/powerpc/configs/ppc64_defconfig
===================================================================
--- linux-2.6.15-olh.orig/arch/powerpc/configs/ppc64_defconfig
+++ linux-2.6.15-olh/arch/powerpc/configs/ppc64_defconfig
@@ -878,7 +878,7 @@ CONFIG_HVCS=m
#
# CONFIG_WATCHDOG is not set
# CONFIG_RTC is not set
-# CONFIG_GEN_RTC is not set
+CONFIG_GEN_RTC=y
# CONFIG_DTLK is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
--
short story of a lazy sysadmin:
alias appserv=wotan
^ permalink raw reply
* [PATCH] dtc: Update flat OF doc for new mdio properties
From: Becky Bruce @ 2006-01-10 19:16 UTC (permalink / raw)
To: david; +Cc: linuxppc-dev
Add device-type and compatible as required fields for mdio node; add eTSEC
to ethernet model options.
Signed-off-by: Becky Bruce <Becky.bruce@freescale.com>
---
commit 411a8d127af0305a9f81b893bb8e64a94031ec4f
tree d88ace9ae751e7ef53b1171230cd1bfe8d446fab
parent 986c272d66da52a952758c0d1c9f58f67e2b2251
author Becky Bruce <becky.bruce@freescale.com> Tue, 10 Jan 2006 13:04:31 -0600
committer Becky Bruce <becky.bruce@freescale.com> Tue, 10 Jan 2006 13:04:31 -0600
Documentation/booting-without-of.txt | 7 ++++++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/Documentation/booting-without-of.txt b/Documentation/booting-without-of.txt
index 1be1760..60d5b7a 100644
--- a/Documentation/booting-without-of.txt
+++ b/Documentation/booting-without-of.txt
@@ -1162,6 +1162,9 @@ platforms are moved over to use the flat
Required properties:
- reg : Offset and length of the register set for the device
+ - device_type : Should be "mdio"
+ - compatible : Should define the compatible device type for the
+ mdio. Currently, this is most likely to be "gianfar"
Example:
@@ -1179,7 +1182,7 @@ platforms are moved over to use the flat
Required properties:
- device_type : Should be "network"
- - model : Model of the device. Can be "TSEC" or "FEC"
+ - model : Model of the device. Can be "TSEC", "eTSEC", or "FEC"
- compatible : Should be "gianfar"
- reg : Offset and length of the register set for the device
- address : List of bytes representing the ethernet address of
@@ -1317,6 +1320,8 @@ not necessary as they are usually the sa
mdio@24520 {
reg = <24520 20>;
+ device_type = "mdio";
+ compatible = "gianfar";
ethernet-phy@0 {
linux,phandle = <2452000>
^ permalink raw reply related
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