* Re: MPC8641(D) software status
From: Xianghua Xiao @ 2006-05-11 19:24 UTC (permalink / raw)
To: Wolfgang Denk; +Cc: linuxppc-embedded
In-Reply-To: <20060511190201.D3818352B0C@atlas.denx.de>
well I am not the one to be allowed to send public patches. However if
someone needs a 2.6.15/2.6.16 patch I can certainly send it out before a
public release(2.6.17?) is ready. It's also available on freescale's
website.
thanks,
xianghua
Wolfgang Denk wrote:
>In message <44634541.3040109@freescale.com> you wrote:
>
>
>>We have patches for 8641D against 2.6.15/2.6.16 and it works well in lab
>>in the last three months along with u-boot code. I think a patch against
>>2.6.17 or later will be released in the future. However if you need the
>>2.6.15/2.6.16 patch now, you can contact Freescale directly. In fact,
>>for all 8641D boards we will ship, we will include the kernel/u-boot
>>source code on the SATA hard drive directly as well, or you can also
>>download them from freescale's website.
>>
>>
>
>And when will you start working with the commmunity, and submit your
>patches to the public source tree? Will Freescale wait (again) until
>they are against such an old version that it's a PITA to merge them?
>
>Best regards,
>
>Wolfgang Denk
>
>
>
--
// Xianghua Xiao
// Freescale Semiconductor x.xiao@freescale.com
// (Tel)1 (512) 996-6768 (Fax) 1 (512) 996-7438
// 7700 W. Parmer Lane, MD: PL30, Austin, TX 78729
^ permalink raw reply
* Re: MPC8641(D) software status
From: Wolfgang Denk @ 2006-05-11 19:55 UTC (permalink / raw)
To: Xianghua Xiao; +Cc: linuxppc-embedded
In-Reply-To: <44638F6D.1030602@freescale.com>
In message <44638F6D.1030602@freescale.com> you wrote:
> well I am not the one to be allowed to send public patches. However if
> someone needs a 2.6.15/2.6.16 patch I can certainly send it out before a
> public release(2.6.17?) is ready. It's also available on freescale's
> website.
Can you please post an URL, both for the Linux and the U-boot
patches?
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
You don't have to worry about me. I might have been born yesterday...
but I stayed up all night.
^ permalink raw reply
* Failure of 2 BAT schemes to enable D-cache
From: Om Vadlapatla @ 2006-05-11 20:13 UTC (permalink / raw)
To: linuxppc-embedded@ozlabs.org, U-Boot-Users@lists.sourceforge.net
[-- Attachment #1: Type: text/plain, Size: 4224 bytes --]
Hello,
Processor: MPC8270
Debugger: Abatron BDI 2000
Board & processor Initialization by: Uboot 1.1.2
Aim:
I try to enable d-cache at the Register level with out
having any exceptions. I will write my own code to
compile into the kernel that is no longer supported by
Montavista (3.0) provided it works when I manipulate
the registers.
Proceedure:
~in window 1 (DIP window) I reset the processor then
the flash mem loads the U-boot version 1.1.2. I do not
load the OS so the system is running at the U-boot
prompt.
=>
~In window 2 (BDI debugger window) I use the Abarton
BDI to force the PPC to enter debug mode by issuing -
"halt" instruction.
//this is the BDI window for both tests when "halt"
MPC8270>halt
Target CPU : MPC8280/MGT5200 (Zeppo)
Target state : debug mode
Debug entry cause : COP halt
Current PC : 0x0ffe935c
Current CR : 0x44004044
Current MSR : 0x0000b002
Current LR : 0x0ffe13a8
~now by issueing commands from the BDI I try to set
the BATs and the MMU as follows:
I tried two BAT schemes on the abatron that are
attached in BAT_register_setting_table.txt &
8280_InitMMU.cmm :
-------------------------------------------------------
Test 1:-
For seting DBAT regs by BDI commands ccording to
(BAT_register_setting_table.txt)or:
// initialize bats
MPC8270>rm dbat0u 0xffe0003f
MPC8270>rm dbat0l 0xffe00022
MPC8270>rm dbat1u 0x00001fff
MPC8270>rm dbat1l 0x00000002
MPC8270>rm dbat2u 0x300007ff
MPC8270>rm dbat2l 0x30000002
MPC8270>rm dbat3u 0x400003FF
MPC8270>rm dbat3l 0x40000022
MPC8270>rm dbat4u 0xFB0001FF
MPC8270>rm dbat4l 0xFB000022
MPC8270>rm dbat5u 0xFE400003
MPC8270>rm dbat5l 0xFE400022
MPC8270>rm dbat6u 0xF0000003
MPC8270>rm dbat6l 0xF0000022
MPC8270>rm dbat7u 0xFF000003
MPC8270>rm dbat7l 0xFF000022
MPC8270>rm hid0 0x8000c088 // set HID0 to enable
// I & D Cache
MPC8270>go // to let the processor run
I check the PC and it is at 0x200 the Machine check
exception.
Please post suggestions to avoid the Exception!!
-------------------------------------------------------
Test 2:-
commands I issued throught Abatron BDI window:
// initialization of BATs refer to (8280_InitMMU.cmm)
// please keep in mind that even though these BAT
// initialization are for a Stand alone systems I only
// plan to test if I am able to initialize the data
// cache without the 0x200 (Machine check exception)
// exception.
// 60-x SDRAM IBAT
MPC8270>rm ibat0u 0x000003fe // IBAT0U 32MB
MPC8270>rm ibat0l 0x00000002 // IBAT0L R/W
//IMMR IBAT
MPC8270>rm ibat1u 0x04700002 // IBAT1U 128KB
MPC8270>rm ibat1l 0x04700022 // IBAT0L I R/W
//Flash IBAT
MPC8270>rm ibat3u 0xff0000fe // IBAT3U 8MB
MPC8270>rm ibat3l 0xff000001 // IBAT3L R/O
//60-x SDRAM DBAT
MPC8270>rm dbat0u 0x000007fe // DBAT0U 16MB
MPC8270>rm dbat0l 0x00000002 // DBAT0L R/W
//Local SDRAM DBAT
MPC8270>rm dbat1u 0x0400007e //DBAT1U
MPC8270>rm dbat1l 0x0400002a //DBAT1L I,G R/W
//BCSR DBAT
MPC8270>rm dbat2u 0x0450007e //DBAT2U BCSR + IMMR
space
MPC8270>rm dbat2l 0x0450002a //DBAT2L I,G R/W
//Flash DBAT
MPC8270>rm dbat3u 0xff0000fe //DBAT3U 8MB
MPC8270>rm dbat3l 0xff000022 //DBAT3L I R/W
// the Bats initialize fine no problem till here
// enable MMU (EE + ME + DR +IR)
MPC8270>rm msr 0x9030
// I feel I may be messing it up here (can some one
// please correct me?)
MPC8270>go // this is to let the processor run
// however ends up restarting the system
// I dont issue the foll command coz of reset
MPC8270>rm hid0 0x8000c088 // this is to set and
// enable the I & D Caches
This is how the DIP window where the boot prompt is
looks after this test 2:-
See attached file: DIP_outPut_test2_BATs.txt
Have I wrongly inilialized the MSR?
-------------------------------------------------------
Please post comments and suggestions of how I can
initialized MMU for d-cache performance. I am new
to this.
Thanky you,
Best regards,
Om Vadlapatla
__________________________________________________
Do You Yahoo!?
Tired of spam? Yahoo! Mail has the best spam protection around
http://mail.yahoo.com
[-- Attachment #2: 790078158-8280_InitMMU.cmm --]
[-- Type: application/octet-stream, Size: 1775 bytes --]
; ********************************
; Initialize BATs
; ********************************
INIT_MMU:
; *** Invalidate TLBs
d.a 0x10000 addi r2,0,32
d.a 0x10004 mtctr r2 ; Load CTR with 32.
d.a 0x10008 addi r3,0,0 ; Use r3 as the tlb index
d.a 0x1000C tlbie r3 ; invalidate the tlb entry
d.a 0x10010 sync
d.a 0x10014 addi r3,r3,0x1000 ; increment the index
d.a 0x10018 bdnz 0x1000C
d.a 0x1001C b 0x1001C
r.s IP 0x10000
go
wait 1ms
break
; *** Clear all Upper BATs
d.s SPR:0x218 %l 0 ; DBAT0U
d.s SPR:0x21A %l 0 ; DBAT1U
d.s SPR:0x21C %l 0 ; DBAT2U
d.s SPR:0x21E %l 0 ; DBAT3U
d.s SPR:0x238 %l 0 ; DBAT4U
d.s SPR:0x23A %l 0 ; DBAT5U
d.s SPR:0x23C %l 0 ; DBAT6U
d.s SPR:0x23E %l 0 ; DBAT7U
d.s SPR:0x210 %l 0 ; IBAT0U
d.s SPR:0x212 %l 0 ; IBAT1U
d.s SPR:0x214 %l 0 ; IBAT2U
d.s SPR:0x216 %l 0 ; IBAT3U
d.s SPR:0x230 %l 0 ; IBAT4U
d.s SPR:0x232 %l 0 ; IBAT5U
d.s SPR:0x234 %l 0 ; IBAT6U
d.s SPR:0x236 %l 0 ; IBAT7U
; 60-x SDRAM IBAT
d.s SPR:0x210 %l 0x000003FE ; IBAT0U 32MB
d.s SPR:0x211 %l 0x00000002 ; IBAT0L R/W
; IMMR IBAT
d.s SPR:0x212 %l 0x04700002 ; IBAT1U 128KB
d.s SPR:0x213 %l 0x04700022 ; IBAT0L I R/W
; Flash IBAT
d.s SPR:0x216 %l 0xFF0000FE ; IBAT3U 8MB
d.s SPR:0x217 %l 0xFF000001 ; IBAT3L R/O
; 60-x SDRAM DBAT
d.s SPR:0x218 %l 0x000007FE ; DBAT0U 16MB
d.s SPR:0x219 %l 0x00000002 ; DBAT0L R/W
; Local SDRAM DBAT
d.s SPR:0x21A %l 0x0400007E ; DBAT1U
d.s SPR:0x21B %l 0x0400002A ; DBAT1L I,G R/W
; BCSR DBAT
d.s SPR:0x21C %l 0x0450007E ; DBAT2U BCSR + IMMR space
d.s SPR:0x21D %l 0x0450002A ; DBAT2L I,G R/W
; Flash DBAT
d.s SPR:0x21E %l 0xFF0000FE ; DBAT3U 8MB
d.s SPR:0x21F %l 0xFF000022 ; DBAT3L I R/W
; Enable MMU
;r.s MSR 0x9030 ; EE + ME + DR + IR
[-- Attachment #3: 79201750-BAT_register_setting_table.txt --]
[-- Type: text/plain, Size: 1770 bytes --]
BAT register setting table
I&D-BAT register setting (I-BAT register can not write W and G bit)
|---------------------------------------------------------------------------------------------|
|BAT-No |Base address |Memory Size |WIMG | BAT U |BAT L |Remark |
|-------|---------------|---------------|---------|-------------|---------------|-------------|
|0 |0xFFE00000 |2Mbyte |0100 | FFE0003F |FFE00022 |BOOT Memory |
|-------|---------------|---------------|---------|-------------|---------------|-------------|
|1 |0x00000000 |256Mbyte |0000 | 00001FFF |00000002 |60x-SDRAM |
|-------|---------------|---------------|---------|-------------|---------------|-------------|
|2 |0x30000000 |64Mbyte |0000 | 300007FF |30000002 |Local-SDRAM |
|-------|---------------|---------------|---------|-------------|---------------|-------------|
|3 |0x40000000 |20Mbyte |0100 | 400003FF |40000022 |SDH-I/O |
|-------|---------------|---------------|---------|-------------|---------------|-------------|
|4 |0xFB000000 |12Mbyte |0100 | FB0001FF |FB000022 |RTC and FPGA |
|-------|---------------|---------------|---------|-------------|---------------|-------------|
|5 |0xFE400000 |1Kbyte |0100 | FE400003 |FE400022 |Compact-Flash|
|-------|---------------|---------------|---------|-------------|---------------|-------------|
|6 |0xF0000000 |128Kbyte |0100 | F0000003 |F0000022 |CPU(Master) |
|-------|---------------|---------------|---------|-------------|---------------|-------------|
|7 |0xFF000000 |128Kbyte |0100 | FF000003 |FF000022 |CPU(Slave)** |
|---------------------------------------------------------------------------------------------|
**No.7 of BAT register should be setting for FW4160
[-- Attachment #4: 2552527863-DIP_outPut_Test1_BATs.txt --]
[-- Type: text/plain, Size: 2938 bytes --]
$ telnet 100.0.4.26 5003
Trying 100.0.4.26...
Connected to 100.0.4.26.
Escape character is '^]'.
U-Boot 1.1.2 (Jan 27 2006 - 14:27:57) ### Release 1.1.5 ###
MPC8260 Reset Status: Bus Monitor, External Soft, External Hard
MPC8260 Clock Configuration
- Bus-to-Core Mult 4x, VCO Div 2, 60x Bus Freq 25-75 , Core Freq 100-300
- dfbrg 1, corecnf 0x1a, busdf 5, cpmdf 1, plldf 0, pllmf 5
- vco_out 400000002, scc_clk 100000000, brg_clk 25000000
- cpu_clk 266666668, cpm_clk 200000001, bus_clk 66666667
CPU: MPC8260 (HiP7 Rev 14, Mask 1.0 1K49M) at 266.666 MHz
Board: Fujitsu FW4060
I2C: ready
DRAM: 256 MB
FLASH: 2 MB
In: serial
Out: serial
Err: serial
Net: FCC2 ETHERNET
IDE: Bus 0: OK
Device 0: Model: Hitachi XXM2.3.0 Firm: Rev 3.00 Ser#: X0405 20050304185152
Type: Removable Hard Disk
Capacity: 61.1 MB = 0.0 GB (125184 x 512)
Hit any key to stop autoboot: 0
=> Bad trap at PC: fffffffc, SR: 1000, vector=800
NIP: FFFFFFFC XER: 20000000 LR: 00001088 REGS: 0ffa7dc0 TRAP: 0800 DAR: 0FFE55FC
MSR: 00001000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00
GPR00: 0000A000 0FFA7EB0 00000004 00000000 0FFF0E80 0000000A FFFFFFFD FFFFFFFF
GPR08: 0FFA7C18 F0000080 00008000 F0000090 00000000 0403FF80 0FFF6000 101C8000
GPR16: 00000000 00000000 00000000 0100FFE0 00000000 00000001 00000000 00000000
GPR24: 00000000 FFFFFFFF 00000001 00000003 0FFFEFC8 0FFA7F64 0FFF74AC 0FFF0E80
Call backtrace:
Exception in kernel pc fffffffc signal 0
U-Boÿ
U-Boot 1.1.2 (Jan 27 2006 - 14:27:57) ### Release 1.1.5 ###
MPC8260 Reset Status: External Soft, External Hard
MPC8260 Clock Configuration
- Bus-to-Core Mult 4x, VCO Div 2, 60x Bus Freq 25-75 , Core Freq 100-300
- dfbrg 1, corecnf 0x1a, busdf 5, cpmdf 1, plldf 0, pllmf 5
- vco_out 400000002, scc_clk 100000000, brg_clk 25000000
- cpu_clk 266666668, cpm_clk 200000001, bus_clk 66666667
CPU: MPC8260 (HiP7 Rev 14, Mask 1.0 1K49M) at 266.666 MHz
Board: Fujitsu FW4060
I2C: ready
DRAM: 256 MB
FLASH: 2 MB
In: serial
Out: serial
Err: serial
Net: FCC2 ETHERNET
IDE: Bus 0: OK
Device 0: Model: Hitachi XXM2.3.0 Firm: Rev 3.00 Ser#: X0405 20050304185152
Type: Removable Hard Disk
Capacity: 61.1 MB = 0.0 GB (125184 x 512)
Hit any key to stop autoboot: 0
=> Bad trap at PC: fffffffc, SR: 1000, vector=800
NIP: FFFFFFFC XER: 00000000 LR: 00001088 REGS: 0ffa7dc0 TRAP: 0800 DAR: 0FFE55FC
MSR: 00001000 EE: 0 PR: 0 FP: 0 ME: 1 IR/DR: 00
GPR00: 0000A000 0FFA7EB0 00000004 00000000 0FFF0E80 0000000A FFFFFFFD 00000000
GPR08: 00000002 F0000080 00008000 F0000090 00000000 0403FF80 0FFF6000 101C8000
GPR16: 00000000 00000000 00000000 0100FFE0 00003002 00000001 00000000 0FFCB098
GPR24: 0FFCE410 00000001 00000001 00000003 0FFFEFC8 0FFA7F64 0FFF74AC 0FFF0E80
Call backtrace:
Exception in kernel pc fffffffc signal 0
U-Boot 1.1.2 (Jan 27 2006 - 14:ò
^ permalink raw reply
* Help: Linux porting to custom target hw
From: Jayanta Das @ 2006-05-11 20:36 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 342 bytes --]
Thanks a lot Thiago.
My specific question was what do I need to change in the kernel and
U-Boot source to boot my target HW. Is flash location and the memory map
only thing I need to worry about or I need to do something more. E.g. I
am looking for a document which will specify the LSP specific files.
Thanks again for the help.
[-- Attachment #2: Type: text/html, Size: 1007 bytes --]
^ permalink raw reply
* Re: Failure of 2 BAT schemes to enable D-cache
From: Wolfgang Denk @ 2006-05-11 22:38 UTC (permalink / raw)
To: Om Vadlapatla
Cc: U-Boot-Users@lists.sourceforge.net, linuxppc-embedded@ozlabs.org
In-Reply-To: <20060511201329.23866.qmail@web37105.mail.mud.yahoo.com>
In message <20060511201329.23866.qmail@web37105.mail.mud.yahoo.com> you wrote:
>
> Please post comments and suggestions of how I can
> initialized MMU for d-cache performance. I am new
> to this.
We have been through this before, several times. Many times actually.
I have explained it to you, and so did others.
It is perfectly fine with me if you ignore my advice. But then please
stop posting the same question again and again here.
You will not receive any new answers.
Again, and definitely for the last time:
It makes no sense to try to enable the data cache on a MPC82xx system
in U-Boot; the time you could save if you succeeded is marginal to
your application startup time.
And in Linux the D-Cache is enabled, so no changes are needed.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
They say a little knowledge is a dangerous thing, but it is not one
half so bad as a lot of ignorance. - Terry Pratchett, _Equal Rites_
^ permalink raw reply
* Re: [RFC/PATCH] Make powerpc64 use __thread for per-cpu variables
From: Segher Boessenkool @ 2006-05-11 23:41 UTC (permalink / raw)
To: Richard Henderson
Cc: linux-arch, linuxppc-dev, Paul Mackerras, David S. Miller,
linux-kernel
In-Reply-To: <20060511002217.GA31481@twiddle.net>
>> Would an asm clobber of GPR13 in the schedule routines (or a wrapper
>> for them, or whatever) work?
>
> No. The address is cse'd symbolically long before the r13
> reference is exposed.
Current GCC won't ever do that over a (non-local, non-inlinable)
function call though. _Current_ GCC.
Segher
^ permalink raw reply
* Re: [RFC/PATCH] Make powerpc64 use __thread for per-cpu variables
From: Segher Boessenkool @ 2006-05-11 23:42 UTC (permalink / raw)
To: Paul Mackerras
Cc: linux-arch, linux-kernel, linuxppc-dev, David S. Miller, rth
In-Reply-To: <17506.37259.755099.974824@cargo.ozlabs.ibm.com>
>> gcc shouldn't think there is any reason to cache the address.
>
> Can I rely on that being true in the future?
As long as the compiler stays smart enough, and doesn't do
stupid things :-)
(i.e., no. Sigh).
Segher
^ permalink raw reply
* Help: Linux porting to custom target hw
From: Thiago Galesi @ 2006-05-12 0:49 UTC (permalink / raw)
To: Jayanta Das; +Cc: linuxppc-embedded
In-Reply-To: <8584FDC94AFF7640B17B8A89B23B19B331C6BA@sbsserver.AlphionCorp.local>
>
> My specific question was what do I need to change in the kernel and U-Boo=
t
> source to boot my target HW. Is flash location and the memory map only th=
ing
> I need to worry about or I need to do something more. E.g. I am looking f=
or
> a document which will specify the LSP specific files.
I'm not very familiar with UBoot but most of the changes will be made
there, not in the kernel (that is, memory size, memory mappings, etc)
AFAIK the only thing you'll have to set up in the kernel is the flash
location, size and configuration (that is, if it is 16 bits, 32 bits,
2x16 bits , etc, etc)
Thiago
^ permalink raw reply
* Re: MPC8641(D) software status
From: Sam Song @ 2006-05-12 1:31 UTC (permalink / raw)
To: Xianghua Xiao; +Cc: linuxppc-embedded
In-Reply-To: <44638F6D.1030602@freescale.com>
Hi Xianghua,
Xianghua Xiao <x.xiao@freescale.com> wrote:
> well I am not the one to be allowed to send
> public patches. However if
> someone needs a 2.6.15/2.6.16 patch I can
> certainly send it out before a
> public release(2.6.17?) is ready. It's also
> available on freescale's
> website.
That's fine. But I couldn't get it on your
website. Not NOW, perhaps? :-)
As wolfgang mentioned, the sooner it released
to community, the better it would be.
Still one thing. Does MPC7447A tool chain
work for MPC8641D?
The big news is that it can be supported
by u-boot and 2.6 kernel. It's so great!
Highly appreciate your info,
Sam
BTW, will you show up at FTF Shangahi at the
end of this month? If so, I could invite you
visit our lab for further communication.
Best regards,
Sam
___________________________________________________________
雅虎免费邮箱-3.5G容量，20M附件
http://cn.mail.yahoo.com/
^ permalink raw reply
* Re: ppc32 kernel boot problem (pmu related?)
From: Benjamin Herrenschmidt @ 2006-05-12 3:12 UTC (permalink / raw)
To: Nathan Pilatzke; +Cc: linuxppc-dev
In-Reply-To: <98889dd30605111207g6afe6158je681717ccacb9e40@mail.gmail.com>
On Thu, 2006-05-11 at 15:07 -0400, Nathan Pilatzke wrote:
> Hello, I am not a member of this list and I hope this is the correct
> place to report such problems and ask for help.
>
> I am running an eMac first generation powerpc (700MHz) and the Gentoo
> distribution. Kernel 2.6.15 (Gentoo revision 1) is working quite well
> for me. A few days ago I compiled 2.6.17-rc3 from the vanilla sources
> ebuild and am having troubles with the pmu code.
>
> I can boot successfully when my config has
> # CONFIG_ADB_PMU is not set
> but cannot boot if my config has
> CONFIG_ADB_PMU=y
What happens when you enable that option ?
> I can post anything you need to help narrow down the problem (ie.
> kernel configs, boot msgs). Would turning on the kernel debugging
> give more information on the problem? Any help would be greatly
> appreciated... even if I can just narrow down the problem further so
> that I can make a very specific bug report.
>
> Here is the cpuinfo (as reported under 2.6.17-rc3 without PMU):
> cat /proc/cpuinfo
> processor : 0
> cpu : 7450, altivec supported
> clock : 700.000000MHz
> revision : 0.1 (pvr 8000 0201)
> bogomips : 49.79
> timebase : 24913389
> platform : PowerMac
> machine : PowerMac4,4
> motherboard : PowerMac4,4 MacRISC2 MacRISC Power Macintosh
> detected as : 80 (eMac)
> pmac flags : 00000010
> L2 cache : 256K unified
> pmac-generation : NewWorld
>
> Thanks.
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev
^ permalink raw reply
* scheduler Latecy test on power pc
From: Prabhat_Singh @ 2006-05-12 3:42 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 746 bytes --]
Hi,
I am using denx linux-2.4.24 on our customized board based on
MPC8248 power processor.
I want to do kernel scheduling latency test on my power pc based
board
, can any one please tell me how could I do that?
prabhat
DISCLAIMER:
This email (including any attachments) is intended for the sole use of the intended recipient/s and may contain material that is CONFIDENTIAL AND PRIVATE COMPANY INFORMATION. Any review or reliance by others or copying or distribution or forwarding of any or all of the contents in this message is STRICTLY PROHIBITED. If you are not the intended recipient, please contact the sender by email and delete all copies; your cooperation in this regard is appreciated.
[-- Attachment #2: Type: text/html, Size: 3037 bytes --]
^ permalink raw reply
* RE: Help Needed: input overrun(s)
From: s.maiti @ 2006-05-12 5:07 UTC (permalink / raw)
To: Rune Torgersen; +Cc: linuxppc-embedded
In-Reply-To: <DCEAAC0833DD314AB0B58112AD99B93B0189DDA7@ismail.innsys.innovsys.com>
Thank you very much for your help. Actually in our driver we are using all
128 channels of MCC1. So we have relocated the dpram for the uart and
ethernet to the dpram 3 and freed the space for the MCC1 accordingly. We
have gone through our allocations, nowhere it's conflicting.
In your case is your driver able to transmit and receive data correctly?
In our case whenever we load the driver the console output gets crambbled.
Through debugging we have identified that the cause of it may be due to
the configuration of L1RSYNC, L1TSYNC, RCLK and TCLK. Can these
configuration cause this ttyS overrun?
Also when the driver is loaded we are not getting any interrupts. We are
writting to the Tx buffer through a user space application, but that is
not resulting in any tx interrupts. Can you help me regarding this.
Also I will be grateful to if let me know which kernel version of linux
you are using and the flow of initialization you are using in your driver.
Looking forward to your help.
Thanks and regards,
Souvik Maiti
Tata Consultancy Services Limited
Mailto: s.maiti@tcs.com
Website: http://www.tcs.com
"Rune Torgersen" <runet@innovsys.com>
05/11/2006 07:44 PM
To
<s.maiti@tcs.com>
cc
<linuxppc-embedded@ozlabs.org>, "Stevan Ignjatovic" <stevan@iritel.com>
Subject
RE: Help Needed: input overrun(s)
> From: s.maiti@tcs.com [mailto:s.maiti@tcs.com]
> Thanks very much for your reply. It's seems you have already
> developed the MCC driver. Are you using channels 32 to 96?
> Have you made any changes in the dp ram allocation for uart
> or ethernet driver?
> Please help me...
We are using every other channel from 32 to 96 on both MCC's as SS7
receivers.
We did not have to do any relocations for UART or ethernet.
Ethernet uses upper DPRAM (above 0x8000) and uarts use the first 128
bytes.
We statically allocate DPRAM with cpm_alloc_fixed. MCC1 use 0x0800 to
0x17ff
MCC2 use 0x2800 to 0x37ff. Extra param RAM is allocated with cpm_alloc
and is allocated as 256*8 bytes, and shared between MCC1 and 2.
All BD and interrupt tables are in main memory.
ForwardSourceID:NT00006DD6
=====-----=====-----=====
Notice: The information contained in this e-mail
message and/or attachments to it may contain
confidential or privileged information. If you are
not the intended recipient, any dissemination, use,
review, distribution, printing or copying of the
information contained in this e-mail message
and/or attachments to it are strictly prohibited. If
you have received this communication in error,
please notify us by reply e-mail or telephone and
immediately and permanently delete the message
and any attachments. Thank you
^ permalink raw reply
* DMA problem on PPC 74xx
From: Monika Borikar @ 2006-05-12 6:44 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 876 bytes --]
Hello All,
I am working on PPC 74xx processor which uses Marvell mv64360 host bridge. On PPC linux-2.6.12.5 (with EV64360 patch ) is running, with CONFIG_NOT_COHERENT_CACHE=y option in .config file.
I have a pci device which has to do DMA transfer from PPC memory. This pci device is DMA master for all dma transactions. The device driver on PPC allocates memory using pci_alloc_consistent & write the data to this allocated memory. Address of this allocated memory is given to device using which device is supposed to do read/write using dma mechanism.
Looks like dma transfer is not happening. I found few mails which talks about some problem with caching. Can anybody guide me if there is any such issue & how to solve that?
Thanks
-Monika
---------------------------------
New Yahoo! Messenger with Voice. Call regular phones from your PC and save big.
[-- Attachment #2: Type: text/html, Size: 1021 bytes --]
^ permalink raw reply
* 2.6 vs 2.4
From: Srinivas Murthy @ 2006-05-12 6:51 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 275 bytes --]
Hi,
Wolfgang Denk has a good listing of issues to consider betn linux 2.4 vs
2.6 for ppc82xx based platforms (http://www.denx.de/wiki/Know/Linux24vs26).
Would this recommendation still hold?
Are there any patches, developments in this area?
Thanks,
_Srinivas
[-- Attachment #2: Type: text/html, Size: 493 bytes --]
^ permalink raw reply
* Linux doesn't boot if USB is enabled
From: IGOR LURI @ 2006-05-12 8:53 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 3070 bytes --]
Hi all,
We have a mpc5200 Icecube board with u-boot 1.1.3 and linux 2.4.25 from Denx where linux boots with USB enabled.
We also have a mpc5200liteB evaluation board with u-boot 1.1.4 and linux 2.4.25 from Denx. We have realized that when USB is enabled linux doen´t boot, it hungs after u-boot uncompresses linux image.
=> usb reset
(Re)start USB...
USB: scanning bus for devices... 1 USB Device(s) found
scanning bus for storage devices... 0 Storage Device(s) found
=>run bootcmd
BOOTP broadcast 1
DHCP client bound to address 10.0.17.102
Using FEC ETHERNET device
TFTP from server 10.0.7.228; our IP address is 10.0.17.102
Filename 'vmlinux.UBoot'.
Load address: 0x500000
Loading: #################################################################
#################################################################
#################################################################
#
done
Bytes transferred = 1000231 (f4327 hex)
=> bootm 0x500000
## Booting image at 00500000 ...
Image Name: Linux-2.4.25-rthal5-TRACE
Created: 2006-05-11 15:08:31 UTC
Image Type: PowerPC Linux Kernel Image (gzip compressed)
Data Size: 1000167 Bytes = 976.7 kB
Load Address: 00000000
Entry Point: 00000000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
Memory BAT mapping: BAT2=256Mb, BAT3=0Mb, residual: 0Mb
Linux version 2.4.25-rthal5-TRACE (igor@ILURI_LINUX) (gcc version 3.3.6) #301 jue may 11 17:08:00 CEST 2006
On node 0 totalpages: 65536
zone(0): 65536 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: root=/dev/nfs rw console=ttyS0 console=ttyS0 init=/sbin/init ip=on
Console: colour dummy device 80x25
Calibrating delay loop... 307.20 BogoMIPS
Memory: 256012k available (1824k kernel code, 612k data, 96k init, 0k highmem)
Dentry cache hash table entries: 32768 (order: 6, 262144 bytes)
If we disable USB with the command
=> usb stop
stopping USB..
linux boots as usual.
I don't found changes in USB part between u-boot 1.1.3 and u-boot 1.1.4. I have readen MPC5200 revision B chip errata and there is nothing about USB. But I have found a manual named U-Boot Bootloader for MPL Single Board Computer that says the following:
Warning: Please make sure to stop the USB subsystem before booting an OS. This can be done by
adding the command usb stop to the variable bootcmd:
This board uses a ppc405 and also it has the same problem.
Someone knows why linux doesn't boot with USB enabled on a mpc5200liteB board? Is this a hardware problem?Is a revision B chip errata? Or, a software problem?
Thanks in advance.
Igor Luri
R&D Software Department
Fagor Automation S. Coop.
P. O. Box 144
E-20500 Mondragón-Arrasate
Tel. ++34 943 71 92 00
++34 943 71 92 01 (Ext. 44124)
Fax. ++34 943 79 92 03
www.fagorautomation.com
[-- Attachment #2: Type: text/html, Size: 6648 bytes --]
^ permalink raw reply
* Re: Linux doesn't boot if USB is enabled
From: Wolfgang Denk @ 2006-05-12 9:53 UTC (permalink / raw)
To: IGOR LURI; +Cc: linuxppc-embedded
In-Reply-To: <918EB199DDDFFA42BEA2EB3A1C6021F3CE19E2@correo.fagorautomation.net>
In message <918EB199DDDFFA42BEA2EB3A1C6021F3CE19E2@correo.fagorautomation.net> you wrote:
>
> We also have a mpc5200liteB evaluation board with u-boot 1.1.4 and linux
> 2.4.25 from Denx. We have realized that when USB is enabled linux
> doen´t boot, it hungs after u-boot uncompresses linux image.
You need the latest versions of both U-boot and Linux.
For U-Boot, you need a version after April 18 (see especially commit
ID 8419c013048b1f15f3fa2fc7c0463d860a04ee3e). For the Linux kernel,
you need a version after April 21 (see especially commit ID
1ac8b71bdbe6de928ba84c83831f6988a9b51165).
I recommend to grab the top-of-tree from both repositories.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Well, the way I see it, logic is only a way of being ignorant by num-
bers. - Terry Pratchett, _Small Gods_
^ permalink raw reply
* how to mount /dev/ram0 to /
From: tony @ 2006-05-12 9:43 UTC (permalink / raw)
To: linuxppc-embedded@ozlabs.org
I made a new uRamdisk for the mini bubinga board,
change uboot's bootargs like this
bootargs root=/dev/ram rw console=ttyS0,115200 ip=192.168.0.200:192.168.0.19:::bubinga:eth0:off panic=1
==>
bootargs root=/dev/ram0 rw console=ttyS0,115200 ip=192.168.0.200:192.168.0.19:::bubinga:eth0:off panic=1
after boot up,excute df to see the mount point:
~ # df
Filesystem 1k-blocks Used Available Use% Mounted on
~ #
nothing was mounted.
the fatab in /etc is like this:
/dev/ram0 / ext2 defaults 1 1
none /proc proc defaults 0 0
anything wrong?
thank you.
tony
^ permalink raw reply
* Re: how to mount /dev/ram0 to /
From: Wolfgang Denk @ 2006-05-12 10:09 UTC (permalink / raw)
To: tony; +Cc: linuxppc-embedded@ozlabs.org
In-Reply-To: <44645CBD.00AAC3.19405>
In message <44645CBD.00AAC3.19405> you wrote:
>
> after boot up,excute df to see the mount point:
> ~ # df
> Filesystem 1k-blocks Used Available Use% Mounted on
> ~ #
> nothing was mounted.
Your rc scripts probably did not care to update /etc/mtag as needed.
Check what "cat /proc/mounts" gives.
> the fatab in /etc is like this:
> /dev/ram0 / ext2 defaults 1 1
> none /proc proc defaults 0 0
>
> anything wrong?
Probably no part of your rc scripts did anything with the information
in /etc/fstab ...
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Perl itself is usually pretty good about telling you what you
shouldn't do. :-) - Larry Wall in <11091@jpl-devvax.JPL.NASA.GOV>
^ permalink raw reply
* regarding setup_common_caches (port linux to prpmc610 kernel-2.4.25 with MVME2100 patch) dated jan 10 2006
From: Kiran Kumar.A @ 2006-05-12 11:06 UTC (permalink / raw)
To: siman; +Cc: linuxppc-embedded
Hello Siman,
This is kiran here working on mvme6100 for kernel 2.6.13-4.
I saw your issue regarding the setup_common_caches in mvme2100 port.=20
Since I'm also getting the similar problem in the port mentioned above, I j=
ust wanted to know that , Did you crack the issue of common_caches??. If so=
, Please let me know as to what could be done with this.
Waiting for your reply at the earliest.
regards,
kiran
--=20
_______________________________________________
Search for businesses by name, location, or phone number. -Lycos Yellow Pa=
ges
http://r.lycos.com/r/yp_emailfooter/http://yellowpages.lycos.com/default.as=
p?SRC=3Dlycos10
^ permalink raw reply
* Re: ppc32 kernel boot problem (pmu related?)
From: Nathan Pilatzke @ 2006-05-12 12:40 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1147403525.7343.19.camel@localhost.localdomain>
On 5/11/06, Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> On Thu, 2006-05-11 at 15:07 -0400, Nathan Pilatzke wrote:
> > I am running an eMac first generation powerpc (700MHz) and the Gentoo
> > distribution. Kernel 2.6.15 (Gentoo revision 1) is working quite well
> > for me. A few days ago I compiled 2.6.17-rc3 from the vanilla sources
> > ebuild and am having troubles with the pmu code.
> >
> > I can boot successfully when my config has
> > # CONFIG_ADB_PMU is not set
> > but cannot boot if my config has
> > CONFIG_ADB_PMU=3Dy
>
> What happens when you enable that option ?
>
Sorry, I was a little light on details... I thought this might be a
known problem. With the pmu option enabled (and early open firmware
messages enabled) I get:
Using PowerMac machine description
Total memory =3D 640MB; using 2048kB for hash table (at cfe00000)
Linux version 2.6.17-rc3 (root@the_emac) (gcc version 3.4.5 (Gentoo 3.4.5-r=
1, ss
p-3.4.5-1.0, pie-8.7.9)) #11 Thu May 11 09:53:39 EDT 2006
Found UniNorth memory controller & host bridge @ 0xf8000000 revision: 0x11
Mapped at 0xfdfc0000
Found a Keylargo mac-io controller, rev: 3, mapped at 0xfdf40000
Processor NAP mode on idle enabled.
PowerMac motherboard: eMac
setup_arch: bootmem
Found UniNorth PCI host bridge at 0xf0000000. Firmware bus number: 0->0
Found UniNorth PCI host bridge at 0xf2000000. Firmware bus number: 0->0
Found UniNorth PCI host bridge at 0xf4000000. Firmware bus number: 0->0
via-pmu: Server Mode is disabled
PMU driver v2 initialized for Core99, firmware: 0c
arch: exit
Top of RAM: 0x28000000, Total RAM: 0x28000000
Memory hole size: 0MB
Built 1 zonelists
Kernel command line: root=3D/dev/sda8 ro video=3Dofonly root=3D/dev/sda8 ro=
otdelay=3D10
resume=3D/dev/sda9
mpic: Setting up MPIC " MPIC 1 " version 1.2 at 80040000, max 4 CPUs
mpic: ISU size: 64, shift: 6, mask: 3f
mpic: Initializing for 64 sources
PID hash table entries: 4096 (order: 12, 16384 bytes)
time_init: decrementer frequency =3D 24.913389 MHz
time_init: processor frequency =3D 700.000000 MHz
and then the machine freezes and requires a power cycle to restart.
Without that option enabled I get this:
PowerMac motherboard: eMac
-setup_arch: bootmem
Found UniNorth PCI host bridge at 0xf0000000. Firmware bus number: 0->0
Found UniNorth PCI host bridge at 0xf2000000. Firmware bus number: 0->0
Found UniNorth PCI host bridge at 0xf4000000. Firmware bus number: 0->0
-via-pmu: Server Mode is disabled
-PMU driver v2 initialized for Core99, firmware: 0c
-arch: exit
+WARNING ! Your machine is PMU-based but your kernel
+ wasn't compiled with CONFIG_ADB_PMU option !
Top of RAM: 0x28000000, Total RAM: 0x28000000
Memory hole size: 0MB
+On node 0 totalpages: 163840
+ DMA zone: 163840 pages, LIFO batch:31
Built 1 zonelists
Kernel command line: root=3D/dev/sda8 ro video=3Dofonly root=3D/dev/sda8
rootdelay=3D10
resume=3D/dev/sda9
mpic: Setting up MPIC " MPIC 1 " version 1.2 at 80040000, max 4 CPUs
mpic: ISU size: 64, shift: 6, mask: 3f
mpic: Initializing for 64 sources
PID hash table entries: 4096 (order: 12, 16384 bytes)
time_init: decrementer frequency =3D 24.913389 MHz
time_init: processor frequency =3D 700.000000 MHz
+Console: colour dummy device 80x25
+Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
...
and it continues booting as normal. As a side note it should be known
that I could not coerce the PowerMac ALSA sound driver to compile
without the PMU enabled either, so there probably should be a config
dependency on it if that is the case.
Anything else I can do?
^ permalink raw reply
* Re: [U-Boot-Users] Re: Failure of 2 BAT schemes to enable D-cache
From: Jerry Van Baren @ 2006-05-12 12:26 UTC (permalink / raw)
Cc: U-Boot-Users@lists.sourceforge.net, linuxppc-embedded@ozlabs.org
In-Reply-To: <20060511223814.2195C352B0C@atlas.denx.de>
Wolfgang Denk wrote:
> In message <20060511201329.23866.qmail@web37105.mail.mud.yahoo.com> you wrote:
>> Please post comments and suggestions of how I can
>> initialized MMU for d-cache performance. I am new
>> to this.
>
> We have been through this before, several times. Many times actually.
> I have explained it to you, and so did others.
>
> It is perfectly fine with me if you ignore my advice. But then please
> stop posting the same question again and again here.
>
> You will not receive any new answers.
>
> Again, and definitely for the last time:
>
> It makes no sense to try to enable the data cache on a MPC82xx system
> in U-Boot; the time you could save if you succeeded is marginal to
> your application startup time.
>
> And in Linux the D-Cache is enabled, so no changes are needed.
>
>
> Best regards,
> Wolfgang Denk
Furthermore, manipulating processor control registers interactively with
a debugger (e.g. attempting to enable dcache) is somewhere between
nearly impossible and totally impossible. Read and understand the
processor manual on the sequences required for changing control
registers and enabling/disabling cache. You cannot guarantee that the
sequences will be done properly because the debugger has LOTS of unknown
code running to implement what to you "looks like" a simple register
write command.
Signing off on this thread,
gvb
^ permalink raw reply
* Re: Linux doesn't boot if USB is enabled
From: Igor Luri @ 2006-05-12 13:30 UTC (permalink / raw)
To: Wolfgang Denk; +Cc: linuxppc-embedded
In-Reply-To: <20060512095339.421CC352B2A@atlas.denx.de>
Dear Wolfgang,
I have updated linux kernel an u-boot from the CVS repository, so I have
de latest u-boot and linux version. I grabed the new u-boot an kernel
and now hungs later while probing PCI. If I configure linux kernel
without PCI support, it boots OK.
I use lite5200b_defconfig configuration. I am missing something in the
configuration relationated with PCI?
U-Boot 1.1.4 (May 12 2006 -
14:45:32)
CPU: MPC5200 v2.2, Core v1.4 at 462
MHz
Bus 132 MHz, IPB 132 MHz, PCI 33
MHz
Board: Freescale
Lite5200B
I2C: 85 kHz,
ready
DRAM: 256
MB
FLASH: 32
MB
*** Warning - bad CRC, using default
environment
PCI: Bus Dev VenId DevId Class
Int
00 1a 1057 5809 0680
00
In:
serial
Out:
serial
Err:
serial
Net: FEC
ETHERNET
IDE: Bus 0:
OK
Device 0: Model: SanDisk SDCFB-32 Firm: HDX 2.15 Ser#:
103407C2604A5824
Type: Hard
Disk
Capacity: 30.6 MB = 0.0 GB (62720 x
512)
Device 1: not
available
Type "run flash_nfs" to mount root filesystem over NFS
Hit any key to stop autoboot: 0
=> bootp 500000 vmlinux.UBoot
BOOTP broadcast 1
Using FEC ETHERNET device
TFTP from server 10.0.7.228; our IP address is 10.0.17.102
Filename 'vmlinux.UBoot'.
Load address: 0x500000
Loading: #################################################################
#################################################################
##########################################################
done
Bytes transferred = 959935 (ea5bf
hex)
=> usb
reset
(Re)start
USB...
USB: scanning bus for devices... 1 USB Device(s)
found
scanning bus for storage devices... 0 Storage Device(s)
found
=> bootm
500000
## Booting image at 00500000
...
Image Name:
Linux-2.4.25
Created: 2006-05-12 12:31:19
UTC
Image Type: PowerPC Linux Kernel Image (gzip
compressed)
Data Size: 959871 Bytes = 937.4
kB
Load Address:
00000000
Entry Point:
00000000
Verifying Checksum ...
OK
Uncompressing Kernel Image ...
OK
Memory BAT mapping: BAT2=256Mb, BAT3=0Mb, residual:
0Mb
Linux version 2.4.25 (igor@ILURI_LINUX) (gcc version 3.3.6) #1 vie may
12 14:27:36 CEST 2006
On node 0 totalpages:
65536
zone(0): 65536
pages.
zone(1): 0
pages.
zone(2): 0
pages.
Kernel command
line:
Calibrating delay loop... 307.20
BogoMIPS
Memory: 256340k available (1636k kernel code, 496k data, 76k init, 0k
highmem)
Dentry cache hash table entries: 32768 (order: 6, 262144
bytes)
Inode cache hash table entries: 16384 (order: 5, 131072
bytes)
Mount cache hash table entries: 512 (order: 0, 4096
bytes)
Buffer cache hash table entries: 16384 (order: 4, 65536
bytes)
Page-cache hash table entries: 65536 (order: 6, 262144
bytes)
POSIX conformance testing by
UNIFIX
PCI: Probing PCI hardware
PCI: moved dev
Wolfgang Denk wrote:
>In message <918EB199DDDFFA42BEA2EB3A1C6021F3CE19E2@correo.fagorautomation.net> you wrote:
>
>
>>We also have a mpc5200liteB evaluation board with u-boot 1.1.4 and linux
>>2.4.25 from Denx. We have realized that when USB is enabled linux
>>doen´t boot, it hungs after u-boot uncompresses linux image.
>>
>>
>
>You need the latest versions of both U-boot and Linux.
>
>For U-Boot, you need a version after April 18 (see especially commit
>ID 8419c013048b1f15f3fa2fc7c0463d860a04ee3e). For the Linux kernel,
>you need a version after April 21 (see especially commit ID
>1ac8b71bdbe6de928ba84c83831f6988a9b51165).
>
>I recommend to grab the top-of-tree from both repositories.
>
>Best regards,
>
>Wolfgang Denk
>
>
>
^ permalink raw reply
* Re: 2.6 vs 2.4
From: Benjamin Herrenschmidt @ 2006-05-12 13:57 UTC (permalink / raw)
To: Srinivas Murthy; +Cc: linuxppc-dev
In-Reply-To: <7cb1293c0605112351y658460a0x8b793ea12004dbfc@mail.gmail.com>
On Thu, 2006-05-11 at 23:51 -0700, Srinivas Murthy wrote:
> Hi,
> Wolfgang Denk has a good listing of issues to consider betn linux 2.4
> vs 2.6 for ppc82xx based platforms
> (http://www.denx.de/wiki/Know/Linux24vs26).
>
> Would this recommendation still hold?
>
> Are there any patches, developments in this area?
The main open question is: is somebody still maintaining the 8xx kernel
port ?
Ben.
^ permalink raw reply
* Re: 2.6 vs 2.4
From: Benjamin Herrenschmidt @ 2006-05-12 14:02 UTC (permalink / raw)
To: Srinivas Murthy; +Cc: linuxppc-dev
In-Reply-To: <1147442231.9412.9.camel@localhost.localdomain>
On Fri, 2006-05-12 at 23:57 +1000, Benjamin Herrenschmidt wrote:
> On Thu, 2006-05-11 at 23:51 -0700, Srinivas Murthy wrote:
> > Hi,
> > Wolfgang Denk has a good listing of issues to consider betn linux 2.4
> > vs 2.6 for ppc82xx based platforms
> > (http://www.denx.de/wiki/Know/Linux24vs26).
> >
> > Would this recommendation still hold?
> >
> > Are there any patches, developments in this area?
>
> The main open question is: is somebody still maintaining the 8xx kernel
> port ?
Oh , and to give a better reply after reading that web page... I'd say
there might be a reason why 2.6 is slower (or appears slower) than 2.4
on some of those embedded platforms. It's definitely faster in a number
of areas on 6xx and other desktop CPUs. A lot of embedded folks will
then bitch and complain about the slowdown on their 8xx processor, but
very few of them if not none popped up actually identifying the actual
issues and coming up with solution for them during the 2.6 dev. cycle.
Ben.
^ permalink raw reply
* Re: Alubook 5,8: No sound with 2.6.17-rc3-g5528e568-dirty
From: Wolfgang Pfeiffer @ 2006-05-12 14:19 UTC (permalink / raw)
To: Johannes Berg; +Cc: linuxppc-dev list, debian-powerpc, Matthias Grimm
In-Reply-To: <20060510213028.GG3878@localhost>
Hi All
First a fat Thanks to Johannes, Benh and to all of those heroes making
it possible to run a relatively freh PPC (Apple) Powerbook model with Linux ... :)
I'm cross-posting. So a short note for those who can't know what all this is about:
I didn't have sound with a fresh git kernel, on the machine mentioned above:
$ cat /proc/cpuinfo
processor : 0
cpu : 7447A, altivec supported
clock : 833.333000MHz
revision : 0.5 (pvr 8003 0105)
bogomips : 16.57
timebase : 8320000
platform : PowerMac
machine : PowerBook5,8
motherboard : PowerBook5,8 MacRISC3 Power Macintosh
detected as : 287 (PowerBook G4 15")
pmac flags : 00000019
L2 cache : 512K unified
pmac-generation : NewWorld
[Oops, something's messed up there: this actually is a 1.67 Ghz
processor. I'll have a look at this later .. :) ]
That's why I sent a message to linuxppc-dev@ozlabs.org. The thread is
starting here:
http://ozlabs.org/pipermail/linuxppc-dev/2006-May/022736.html
On Wed, May 10, 2006 at 11:30:28PM +0200, Wolfgang Pfeiffer wrote:
> On Wed, May 10, 2006 at 06:04:13PM +0200, Johannes Berg wrote:
>
> > Also, try snd-aoa.
>
> Impossible here, it does not compile here. Neither with gcc 4.0 or 4.1
Wrong. To put it mildly .. :) Result probably of me being too tired,
too fast, and too anal when reading instructions ...
# lsmod | grep -i aoa
snd_aoa_codec_onyx 12032 2
snd_aoa_fabric_layout 7492 2
snd_aoa 8076 2 snd_aoa_codec_onyx,snd_aoa_fabric_layout
soundbus 6628 2 snd_aoa_fabric_layout,i2sbus
snd 60148 12 snd_aoa_codec_onyx,snd_aoa_fabric_layout,
snd_aoa,snd_powermac,i2sbus,snd_pcm_oss,
snd_mixer_oss,snd_pcm,snd_timer
I successfully compiled the software now, and only with gcc-4.1. Example:
# modinfo snd_aoa
filename: /lib/modules/2.6.17-rc3-gf358166a-dirty/kernel/sound/aoa/snd-aoa.ko
description: Apple Onboard Audio Sound Driver
author: Johannes Berg <johannes@sipsolutions.net>
license: GPL
vermagic: 2.6.17-rc3-gf358166a-dirty mod_unload gcc-4.1
depends: snd
srcversion: D0DFD2EF0CFEB8E7C08AAEB
The git kernel I compiled the snd-aoa modules for (must be from about
yesterday, IINM):
cat /proc/version
Linux version 2.6.17-rc3-gf358166a-dirty (root@debby1-6) (gcc version
4.1.1 20060428 (prerelease) (Debian 4.1.0-2)) #1 Fri May 12 01:13:36
CEST 2006
config for this latest kernel (Please note the
"CONFIG_PREEMPT_VOLUNTARY=y" in there ... :) ... :
<http://wolfgangpfeiffer.com/config-2.6.17-rc3-gf358166a-dirty.txt>
I filled /etc/modules with snd_aoa modules and i have sound already
from boot time on ... with a minor glitch (i.e. not being able to
store a certain volume level via alsactrl to the next reboot, as it
seems), but sound ...
>
> I took your instructions from
> http://lists.debian.org/debian-powerpc/2006/03/msg00470.html
>
I'm listening to some Internet radio station via alsaplayer while
writing this mail ... :) ...
Results, as of now:
I can change the sound volume via the software. Tested in xine and
alsaplayer-gtk so far ...
I have problems doing the same with pbbuttonsd. That is I can start,
e.g., gtkppbuttons, but when pressing <FN>-<F5> or <FN>-<F4> it seems
being impossible to change the sound volume this way. But I can toggle
it completely ON/OFF with <FN>-<F3.> ... not being sure tho' whether
this is due to some of my braindead mistakes or really a pbbuttonsd
issue ...
Thanks again a lot to everyone for your work, your time, and the
resulting fine software ... :)
Nice weekend
Wolfgang
--
Wolfgang Pfeiffer: /ICQ: 286585973/ + + + /AIM: crashinglinux/
http://profiles.yahoo.com/wolfgangpfeiffer
Key ID: E3037113
http://keyserver.mine.nu/pks/lookup?search=0xE3037113&fingerprint=on
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox