LinuxPPC-Dev Archive on lore.kernel.org

* RE: [PATCH/2.6.17-rc4 3/10] Powerpc: Add tsi108 common function
From: Zang Roy-r61911 @ 2006-05-25  4:20 UTC (permalink / raw)
  To: Kumar Gala, Benjamin Herrenschmidt
  Cc: linuxppc-dev list, Yang Xin-Xin-r48390, Paul Mackerras,
	Alexandre.Bounine

> Can the PCI use indirect like used on most other PPC platforms.

Now , I was confirmed that we cannot switch to it.
Reason for that is our need for the machine check exception handling for PCI Config reads.
Tsi108/109 does not have HW mechanism to ignore Master Abort during Config read and return all ones. 
We have to provide our routine with .fixup section to be able process failed PCI Config reads (Master Abort on PCI).
The indirect method relies on the HW mechanism. 

Another question that appeared around machine check handling was calling of tsi108_clear_pci_cfg_error() function.
We have it to clean errors reported during PCI bus probe. We may skip it (and PCI block still be operational) but
 this will block error reporting mechanism because the PCI block only records the first detected error. 
So we decided it may be better to keep error reporting active by cleaning errors that we expect during PCI enumeration.
 I do not see any harm here because I will  provide our own machine check handler in my board support file according to 
Ben's suggestion.

Roy 

> 
> > +int
> > +tsi108_direct_write_config(struct pci_bus *bus, unsigned 
> int devfunc,
> > +			   int offset, int len, u32 val)
> > +{
> > +	volatile unsigned char *cfg_addr;
> > +
> > +	cfg_addr = (unsigned char *)(tsi_mk_config_addr(bus->number,
> > +							
> devfunc, offset) |
> > +				     (offset & 0x03));
> > +
> > +#ifdef TSI108_PCI_DEBUG
> > +	printk("PCI CFG write : ");
> > +	printk("%d:0x%x:0x%x ", bus->number, devfunc, offset);
> > +	printk("%d ADDR=0x%08x ", len, (uint) cfg_addr);
> > +	printk("data = 0x%08x\n", val);
> > +#endif
> > +
> > +	switch (len) {
> > +	case 1:
> > +		out_8((u8 *) cfg_addr, val);
> > +		break;
> > +	case 2:
> > +		out_le16((u16 *) cfg_addr, val);
> > +		break;
> > +	default:
> > +		out_le32((u32 *) cfg_addr, val);
> > +		break;
> > +	}
> > +
> > +	return PCIBIOS_SUCCESSFUL;
> > +}
> > +

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