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* [patch 06/20] spufs: restore mapping of mssync register
From: arnd @ 2006-06-19 18:33 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060619183315.653672000@klappe.arndb.de>

A recent change to the way that the mfc file gets mapped made it
impossible to map the SPE Multi-Source Synchronization register
into user space, but that may be needed by some applications.

This restores the missing functionality.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

---

Index: powerpc.git/arch/powerpc/platforms/cell/spufs/file.c
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/spufs/file.c
+++ powerpc.git/arch/powerpc/platforms/cell/spufs/file.c
@@ -825,6 +825,55 @@ DEFINE_SIMPLE_ATTRIBUTE(spufs_signal2_ty
 					spufs_signal2_type_set, "%llu");
 
 #ifdef CONFIG_SPUFS_MMAP
+static struct page *spufs_mss_mmap_nopage(struct vm_area_struct *vma,
+					   unsigned long address, int *type)
+{
+	return spufs_ps_nopage(vma, address, type, 0x0000);
+}
+
+static struct vm_operations_struct spufs_mss_mmap_vmops = {
+	.nopage = spufs_mss_mmap_nopage,
+};
+
+/*
+ * mmap support for problem state MFC DMA area [0x0000 - 0x0fff].
+ * Mapping this area requires that the application have CAP_SYS_RAWIO,
+ * as these registers require special care when read/writing.
+ */
+static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
+{
+	if (!(vma->vm_flags & VM_SHARED))
+		return -EINVAL;
+
+	if (!capable(CAP_SYS_RAWIO))
+		return -EPERM;
+
+	vma->vm_flags |= VM_RESERVED;
+	vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
+				     | _PAGE_NO_CACHE);
+
+	vma->vm_ops = &spufs_mss_mmap_vmops;
+	return 0;
+}
+#endif
+
+static int spufs_mss_open(struct inode *inode, struct file *file)
+{
+	struct spufs_inode_info *i = SPUFS_I(inode);
+
+	file->private_data = i->i_ctx;
+	return nonseekable_open(inode, file);
+}
+
+static struct file_operations spufs_mss_fops = {
+	.open	 = spufs_mss_open,
+#ifdef CONFIG_SPUFS_MMAP
+	.mmap	 = spufs_mss_mmap,
+#endif
+};
+
+
+#ifdef CONFIG_SPUFS_MMAP
 static struct page *spufs_mfc_mmap_nopage(struct vm_area_struct *vma,
 					   unsigned long address, int *type)
 {
@@ -1292,6 +1341,7 @@ struct tree_descr spufs_dir_contents[] =
 	{ "signal2", &spufs_signal2_fops, 0666, },
 	{ "signal1_type", &spufs_signal1_type, 0666, },
 	{ "signal2_type", &spufs_signal2_type, 0666, },
+	{ "mss", &spufs_mss_fops, 0666, },
 	{ "mfc", &spufs_mfc_fops, 0666, },
 	{ "cntl", &spufs_cntl_fops,  0666, },
 	{ "npc", &spufs_npc_ops, 0666, },

--

^ permalink raw reply

* [patch 05/20] cell: always build spu base into the kernel
From: arnd @ 2006-06-19 18:33 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060619183315.653672000@klappe.arndb.de>

The spu_base module is rather deeply intermixed with the
core kernel, so it makes sense to have that built-in.
This will let us extend the base in the future without
having to export more core symbols just for it.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

Index: powerpc.git/arch/powerpc/platforms/cell/Makefile
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/Makefile
+++ powerpc.git/arch/powerpc/platforms/cell/Makefile
@@ -3,15 +3,11 @@ obj-y			+= cbe_regs.o pervasive.o
 obj-$(CONFIG_CBE_RAS)	+= ras.o
 
 obj-$(CONFIG_SMP)	+= smp.o
-obj-$(CONFIG_SPU_FS)	+= spu-base.o spufs/
-
-spu-base-y		+= spu_base.o spu_priv1.o
 
 # needed only when building loadable spufs.ko
 spufs-modular-$(CONFIG_SPU_FS) += spu_syscalls.o
 obj-y			+= $(spufs-modular-m)
 
 # always needed in kernel
-spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o
+spufs-builtin-$(CONFIG_SPU_FS) += spu_callbacks.o spu_base.o spu_priv1.o spufs/
 obj-y			+= $(spufs-builtin-y) $(spufs-builtin-m)
-
Index: powerpc.git/arch/powerpc/platforms/cell/spufs/Makefile
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/spufs/Makefile
+++ powerpc.git/arch/powerpc/platforms/cell/spufs/Makefile
@@ -1,5 +1,7 @@
+obj-y += switch.o
+
 obj-$(CONFIG_SPU_FS) += spufs.o
-spufs-y += inode.o file.o context.o switch.o syscalls.o
+spufs-y += inode.o file.o context.o syscalls.o
 spufs-y += sched.o backing_ops.o hw_ops.o run.o
 
 # Rules to build switch.o with the help of SPU tool chain
Index: powerpc.git/arch/powerpc/platforms/cell/spufs/switch.c
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/spufs/switch.c
+++ powerpc.git/arch/powerpc/platforms/cell/spufs/switch.c
@@ -2074,6 +2074,7 @@ int spu_save(struct spu_state *prev, str
 	}
 	return rc;
 }
+EXPORT_SYMBOL_GPL(spu_save);
 
 /**
  * spu_restore - SPU context restore, with harvest and locking.
@@ -2103,6 +2104,7 @@ int spu_restore(struct spu_state *new, s
 	}
 	return rc;
 }
+EXPORT_SYMBOL_GPL(spu_restore);
 
 /**
  * spu_harvest - SPU harvest (reset) operation
@@ -2193,6 +2195,7 @@ void spu_init_csa(struct spu_state *csa)
 	init_priv1(csa);
 	init_priv2(csa);
 }
+EXPORT_SYMBOL_GPL(spu_init_csa);
 
 void spu_fini_csa(struct spu_state *csa)
 {
@@ -2203,3 +2206,4 @@ void spu_fini_csa(struct spu_state *csa)
 
 	vfree(csa->lscsa);
 }
+EXPORT_SYMBOL_GPL(spu_fini_csa);

--

^ permalink raw reply

* [patch 04/20] cell: register SPUs as sysdevs
From: arnd @ 2006-06-19 18:33 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060619183315.653672000@klappe.arndb.de>

From: Jeremy Kerr <jk@ozlabs.org>

SPUs are registered as system devices, exposing attributes through
sysfs. Since the sysdev includes a kref, we can remove the one in
struct spu (it isn't used at the moment anyway).

Currently only the interrupt source and numa node attributes are added.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

Index: powerpc.git/arch/powerpc/platforms/cell/spu_base.c
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/spu_base.c
+++ powerpc.git/arch/powerpc/platforms/cell/spu_base.c
@@ -649,6 +649,46 @@ out:
 	return ret;
 }
 
+struct sysdev_class spu_sysdev_class = {
+	set_kset_name("spu")
+};
+
+static ssize_t spu_show_isrc(struct sys_device *sysdev, char *buf)
+{
+	struct spu *spu = container_of(sysdev, struct spu, sysdev);
+	return sprintf(buf, "%d\n", spu->isrc);
+
+}
+static SYSDEV_ATTR(isrc, 0400, spu_show_isrc, NULL);
+
+extern int attach_sysdev_to_node(struct sys_device *dev, int nid);
+
+static int spu_create_sysdev(struct spu *spu)
+{
+	int ret;
+
+	spu->sysdev.id = spu->number;
+	spu->sysdev.cls = &spu_sysdev_class;
+	ret = sysdev_register(&spu->sysdev);
+	if (ret) {
+		printk(KERN_ERR "Can't register SPU %d with sysfs\n",
+				spu->number);
+		return ret;
+	}
+
+	sysdev_create_file(&spu->sysdev, &attr_isrc);
+	sysfs_add_device_to_node(&spu->sysdev, spu->nid);
+
+	return 0;
+}
+
+static void spu_destroy_sysdev(struct spu *spu)
+{
+	sysdev_remove_file(&spu->sysdev, &attr_isrc);
+	sysfs_remove_device_from_node(&spu->sysdev, spu->nid);
+	sysdev_unregister(&spu->sysdev);
+}
+
 static int __init create_spu(struct device_node *spe)
 {
 	struct spu *spu;
@@ -695,6 +735,10 @@ static int __init create_spu(struct devi
 	if (ret)
 		goto out_unmap;
 
+	ret = spu_create_sysdev(spu);
+	if (ret)
+		goto out_free_irqs;
+
 	list_add(&spu->list, &spu_list);
 	mutex_unlock(&spu_mutex);
 
@@ -703,6 +747,9 @@ static int __init create_spu(struct devi
 		spu->problem, spu->priv1, spu->priv2, spu->number);
 	goto out;
 
+out_free_irqs:
+	spu_free_irqs(spu);
+
 out_unmap:
 	mutex_unlock(&spu_mutex);
 	spu_unmap(spu);
@@ -716,6 +763,7 @@ static void destroy_spu(struct spu *spu)
 {
 	list_del_init(&spu->list);
 
+	spu_destroy_sysdev(spu);
 	spu_free_irqs(spu);
 	spu_unmap(spu);
 	kfree(spu);
@@ -728,6 +776,7 @@ static void cleanup_spu_base(void)
 	list_for_each_entry_safe(spu, tmp, &spu_list, list)
 		destroy_spu(spu);
 	mutex_unlock(&spu_mutex);
+	sysdev_class_unregister(&spu_sysdev_class);
 }
 module_exit(cleanup_spu_base);
 
@@ -736,6 +785,11 @@ static int __init init_spu_base(void)
 	struct device_node *node;
 	int ret;
 
+	/* create sysdev class for spus */
+	ret = sysdev_class_register(&spu_sysdev_class);
+	if (ret)
+		return ret;
+
 	ret = -ENODEV;
 	for (node = of_find_node_by_type(NULL, "spe");
 			node; node = of_find_node_by_type(node, "spe")) {
Index: powerpc.git/include/asm-powerpc/spu.h
===================================================================
--- powerpc.git.orig/include/asm-powerpc/spu.h
+++ powerpc.git/include/asm-powerpc/spu.h
@@ -25,8 +25,8 @@
 #ifdef __KERNEL__
 
 #include <linux/config.h>
-#include <linux/kref.h>
 #include <linux/workqueue.h>
+#include <linux/sysdev.h>
 
 #define LS_SIZE (256 * 1024)
 #define LS_ADDR_MASK (LS_SIZE - 1)
@@ -123,7 +123,6 @@ struct spu {
 	u64 flags;
 	u64 dar;
 	u64 dsisr;
-	struct kref kref;
 	size_t ls_size;
 	unsigned int slb_replace;
 	struct mm_struct *mm;
@@ -144,6 +143,8 @@ struct spu {
 	char irq_c0[8];
 	char irq_c1[8];
 	char irq_c2[8];
+
+	struct sys_device sysdev;
 };
 
 struct spu *spu_alloc(void);

--

^ permalink raw reply

* [patch 03/20] cell: update defconfig
From: arnd @ 2006-06-19 18:33 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060619183315.653672000@klappe.arndb.de>

Enable some of the most requested features in defconfig
and refresh with the latest powerpc.git Kconfig files.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
---
Index: powerpc.git/arch/powerpc/configs/cell_defconfig
===================================================================
--- powerpc.git.orig/arch/powerpc/configs/cell_defconfig
+++ powerpc.git/arch/powerpc/configs/cell_defconfig
@@ -1,7 +1,7 @@
 #
 # Automatically generated make config: don't edit
-# Linux kernel version: 2.6.16
-# Thu Mar 23 20:48:09 2006
+# Linux kernel version: 2.6.17
+# Mon Jun 19 17:23:03 2006
 #
 CONFIG_PPC64=y
 CONFIG_64BIT=y
@@ -11,6 +11,7 @@ CONFIG_GENERIC_HARDIRQS=y
 CONFIG_RWSEM_XCHGADD_ALGORITHM=y
 CONFIG_GENERIC_HWEIGHT=y
 CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
 CONFIG_PPC=y
 CONFIG_EARLY_PRINTK=y
 CONFIG_COMPAT=y
@@ -55,7 +56,7 @@ CONFIG_SYSCTL=y
 # CONFIG_AUDIT is not set
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
-# CONFIG_CPUSETS is not set
+CONFIG_CPUSETS=y
 # CONFIG_RELAY is not set
 CONFIG_INITRAMFS_SOURCE=""
 CONFIG_CC_OPTIMIZE_FOR_SIZE=y
@@ -116,6 +117,7 @@ CONFIG_PPC_MULTIPLATFORM=y
 # CONFIG_PPC_PMAC is not set
 # CONFIG_PPC_MAPLE is not set
 CONFIG_PPC_CELL=y
+CONFIG_PPC_SYSTEMSIM=y
 # CONFIG_U3_DART is not set
 CONFIG_PPC_RTAS=y
 # CONFIG_RTAS_ERROR_LOGGING is not set
@@ -153,20 +155,24 @@ CONFIG_FORCE_MAX_ZONEORDER=13
 CONFIG_KEXEC=y
 # CONFIG_CRASH_DUMP is not set
 CONFIG_IRQ_ALL_CPUS=y
-# CONFIG_NUMA is not set
+CONFIG_NUMA=y
+CONFIG_NODES_SHIFT=4
 CONFIG_ARCH_SELECT_MEMORY_MODEL=y
-CONFIG_ARCH_FLATMEM_ENABLE=y
 CONFIG_ARCH_SPARSEMEM_ENABLE=y
 CONFIG_SELECT_MEMORY_MODEL=y
 # CONFIG_FLATMEM_MANUAL is not set
 # CONFIG_DISCONTIGMEM_MANUAL is not set
 CONFIG_SPARSEMEM_MANUAL=y
 CONFIG_SPARSEMEM=y
+CONFIG_NEED_MULTIPLE_NODES=y
 CONFIG_HAVE_MEMORY_PRESENT=y
 # CONFIG_SPARSEMEM_STATIC is not set
 CONFIG_SPARSEMEM_EXTREME=y
-# CONFIG_MEMORY_HOTPLUG is not set
+CONFIG_MEMORY_HOTPLUG=y
 CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_MIGRATION=y
+CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID=y
+CONFIG_ARCH_MEMORY_PROBE=y
 # CONFIG_PPC_64K_PAGES is not set
 CONFIG_SCHED_SMT=y
 CONFIG_PROC_DEVICETREE=y
@@ -183,6 +189,7 @@ CONFIG_GENERIC_ISA_DMA=y
 # CONFIG_PPC_INDIRECT_PCI is not set
 CONFIG_PCI=y
 CONFIG_PCI_DOMAINS=y
+CONFIG_PCIEPORTBUS=y
 # CONFIG_PCI_DEBUG is not set
 
 #
@@ -477,7 +484,7 @@ CONFIG_DM_MULTIPATH=m
 #
 CONFIG_NETDEVICES=y
 # CONFIG_DUMMY is not set
-# CONFIG_BONDING is not set
+CONFIG_BONDING=y
 # CONFIG_EQUALIZER is not set
 # CONFIG_TUN is not set
 
@@ -625,6 +632,7 @@ CONFIG_SERIAL_NONSTANDARD=y
 # CONFIG_N_HDLC is not set
 # CONFIG_SPECIALIX is not set
 # CONFIG_SX is not set
+# CONFIG_RIO is not set
 # CONFIG_STALDRV is not set
 
 #
@@ -767,6 +775,7 @@ CONFIG_I2C_ALGOBIT=y
 # Multimedia devices
 #
 # CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_V4L2=y
 
 #
 # Digital Video Broadcasting Devices
@@ -1055,11 +1064,7 @@ CONFIG_DEBUGGER=y
 # CONFIG_XMON is not set
 CONFIG_IRQSTACKS=y
 # CONFIG_BOOTX_TEXT is not set
-# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
-# CONFIG_PPC_EARLY_DEBUG_G5 is not set
-# CONFIG_PPC_EARLY_DEBUG_RTAS is not set
-# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
-# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
 
 #
 # Security options

--

^ permalink raw reply

* [patch 02/20] cell: fix interrupt priority handling
From: arnd @ 2006-06-19 18:33 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060619183315.653672000@klappe.arndb.de>

Checking the priority field to test for irq validity is
completely bogus and breaks with future external interrupt
controllers.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

---

Index: powerpc.git/arch/powerpc/platforms/cell/interrupt.c
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/interrupt.c
+++ powerpc.git/arch/powerpc/platforms/cell/interrupt.c
@@ -117,8 +117,7 @@ static int iic_external_get_irq(struct c
 		 * One of these units can be connected
 		 * to an external interrupt controller.
 		 */
-		if (pending.prio > 0x3f ||
-		    pending.class != 2)
+		if (pending.class != 2)
 			break;
 		irq = IIC_EXT_OFFSET
 			+ spider_get_irq(node)

--

^ permalink raw reply

* [patch 01/20] cell: add RAS support
From: arnd @ 2006-06-19 18:33 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev, cbe-oss-dev, linux-kernel
In-Reply-To: <20060619183315.653672000@klappe.arndb.de>

From: Benjamin Herrenschmidt <benh@kernel.crashing.org>

This is a first version of support for the Cell BE "Reliability,
Availability and Serviceability" features.

It doesn't yet handle some of the RAS interrupts (the ones described in
iic_is/iic_irr), I'm still working on a proper way to expose these. They
are essentially a cascaded controller by themselves (sic !) though I may
just handle them locally to the iic driver. I need also to sync with
David Erb on the way he hooked in the performance monitor interrupt.

So that's all for 2.6.17 and I'll do more work on that with my rework of
the powerpc interrupt layer that I'm hacking on at the moment.

Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>

Index: powerpc.git/arch/powerpc/kernel/head_64.S
===================================================================
--- powerpc.git.orig/arch/powerpc/kernel/head_64.S
+++ powerpc.git/arch/powerpc/kernel/head_64.S
@@ -316,6 +316,21 @@ label##_pSeries:					\
 	mtspr	SPRN_SPRG1,r13;		/* save r13 */	\
 	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
 
+#define HSTD_EXCEPTION_PSERIES(n, label)		\
+	. = n;						\
+	.globl label##_pSeries;				\
+label##_pSeries:					\
+	HMT_MEDIUM;					\
+	mtspr	SPRN_SPRG1,r20;		/* save r20 */	\
+	mfspr	r20,SPRN_HSRR0;		/* copy HSRR0 to SRR0 */ \
+	mtspr	SPRN_SRR0,r20;				\
+	mfspr	r20,SPRN_HSRR1;		/* copy HSRR0 to SRR0 */ \
+	mtspr	SPRN_SRR1,r20;				\
+	mfspr	r20,SPRN_SPRG1;		/* restore r20 */ \
+	mtspr	SPRN_SPRG1,r13;		/* save r13 */	\
+	EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
+
+
 #define STD_EXCEPTION_ISERIES(n, label, area)		\
 	.globl label##_iSeries;				\
 label##_iSeries:					\
@@ -544,8 +559,17 @@ system_call_pSeries:
 
 	STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable)
 
+#ifdef CONFIG_CBE_RAS
+	HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error)
+#endif /* CONFIG_CBE_RAS */
 	STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint)
+#ifdef CONFIG_CBE_RAS
+	HSTD_EXCEPTION_PSERIES(0x1600, cbe_maintenance)
+#endif /* CONFIG_CBE_RAS */
 	STD_EXCEPTION_PSERIES(0x1700, altivec_assist)
+#ifdef CONFIG_CBE_RAS
+	HSTD_EXCEPTION_PSERIES(0x1800, cbe_thermal)
+#endif /* CONFIG_CBE_RAS */
 
 	. = 0x3000
 
@@ -827,6 +851,11 @@ machine_check_common:
 #else
 	STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
 #endif
+#ifdef CONFIG_CBE_RAS
+	STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
+	STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
+	STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
+#endif /* CONFIG_CBE_RAS */
 
 /*
  * Here we have detected that the kernel stack pointer is bad.
Index: powerpc.git/arch/powerpc/platforms/cell/Kconfig
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/Kconfig
+++ powerpc.git/arch/powerpc/platforms/cell/Kconfig
@@ -16,4 +16,8 @@ config SPUFS_MMAP
 	select MEMORY_HOTPLUG
 	default y
 
+config CBE_RAS
+	bool "RAS features for bare metal Cell BE"
+	default y
+
 endmenu
Index: powerpc.git/arch/powerpc/platforms/cell/Makefile
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/Makefile
+++ powerpc.git/arch/powerpc/platforms/cell/Makefile
@@ -1,5 +1,6 @@
 obj-y			+= interrupt.o iommu.o setup.o spider-pic.o
-obj-y			+= pervasive.o
+obj-y			+= cbe_regs.o pervasive.o
+obj-$(CONFIG_CBE_RAS)	+= ras.o
 
 obj-$(CONFIG_SMP)	+= smp.o
 obj-$(CONFIG_SPU_FS)	+= spu-base.o spufs/
Index: powerpc.git/arch/powerpc/platforms/cell/pervasive.c
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/pervasive.c
+++ powerpc.git/arch/powerpc/platforms/cell/pervasive.c
@@ -37,36 +37,28 @@
 #include <asm/reg.h>
 
 #include "pervasive.h"
+#include "cbe_regs.h"
 
 static DEFINE_SPINLOCK(cbe_pervasive_lock);
-struct cbe_pervasive {
-	struct pmd_regs __iomem *regs;
-	unsigned int thread;
-};
-
-/* can't use per_cpu from setup_arch */
-static struct cbe_pervasive cbe_pervasive[NR_CPUS];
 
 static void __init cbe_enable_pause_zero(void)
 {
 	unsigned long thread_switch_control;
 	unsigned long temp_register;
-	struct cbe_pervasive *p;
-	int thread;
+	struct cbe_pmd_regs __iomem *pregs;
 
 	spin_lock_irq(&cbe_pervasive_lock);
-	p = &cbe_pervasive[smp_processor_id()];
-
-	if (!cbe_pervasive->regs)
+	pregs = cbe_get_cpu_pmd_regs(smp_processor_id());
+	if (pregs == NULL)
 		goto out;
 
 	pr_debug("Power Management: CPU %d\n", smp_processor_id());
 
 	 /* Enable Pause(0) control bit */
-	temp_register = in_be64(&p->regs->pm_control);
+	temp_register = in_be64(&pregs->pm_control);
 
-	out_be64(&p->regs->pm_control,
-		 temp_register|PMD_PAUSE_ZERO_CONTROL);
+	out_be64(&pregs->pm_control,
+		 temp_register | CBE_PMD_PAUSE_ZERO_CONTROL);
 
 	/* Enable DEC and EE interrupt request */
 	thread_switch_control  = mfspr(SPRN_TSC_CELL);
@@ -75,25 +67,16 @@ static void __init cbe_enable_pause_zero
 	switch ((mfspr(SPRN_CTRLF) & CTRL_CT)) {
 	case CTRL_CT0:
 		thread_switch_control |= TSC_CELL_DEC_ENABLE_0;
-		thread = 0;
 		break;
 	case CTRL_CT1:
 		thread_switch_control |= TSC_CELL_DEC_ENABLE_1;
-		thread = 1;
 		break;
 	default:
 		printk(KERN_WARNING "%s: unknown configuration\n",
 			__FUNCTION__);
-		thread = -1;
 		break;
 	}
 
-	if (p->thread != thread)
-		printk(KERN_WARNING "%s: device tree inconsistant, "
-				     "cpu %i: %d/%d\n", __FUNCTION__,
-				     smp_processor_id(),
-				     p->thread, thread);
-
 	mtspr(SPRN_TSC_CELL, thread_switch_control);
 
 out:
@@ -104,6 +87,11 @@ static void cbe_idle(void)
 {
 	unsigned long ctrl;
 
+	/* Why do we do that on every idle ? Couldn't that be done once for
+	 * all or do we lose the state some way ? Also, the pm_control
+	 * register setting, that can't be set once at boot ? We really want
+	 * to move that away in order to implement a simple powersave
+	 */
 	cbe_enable_pause_zero();
 
 	while (1) {
@@ -152,8 +140,15 @@ static int cbe_system_reset_exception(st
 		timer_interrupt(regs);
 		break;
 	case SRR1_WAKEMT:
-		/* no action required */
 		break;
+#ifdef CONFIG_CBE_RAS
+	case SRR1_WAKESYSERR:
+		cbe_system_error_exception(regs);
+		break;
+	case SRR1_WAKETHERM:
+		cbe_thermal_exception(regs);
+		break;
+#endif /* CONFIG_CBE_RAS */
 	default:
 		/* do system reset */
 		return 0;
@@ -162,68 +157,11 @@ static int cbe_system_reset_exception(st
 	return 1;
 }
 
-static int __init cbe_find_pmd_mmio(int cpu, struct cbe_pervasive *p)
+void __init cbe_pervasive_init(void)
 {
-	struct device_node *node;
-	unsigned int *int_servers;
-	char *addr;
-	unsigned long real_address;
-	unsigned int size;
-
-	struct pmd_regs __iomem *pmd_mmio_area;
-	int hardid, thread;
-	int proplen;
-
-	pmd_mmio_area = NULL;
-	hardid = get_hard_smp_processor_id(cpu);
-	for (node = NULL; (node = of_find_node_by_type(node, "cpu"));) {
-		int_servers = (void *) get_property(node,
-				"ibm,ppc-interrupt-server#s", &proplen);
-		if (!int_servers) {
-			printk(KERN_WARNING "%s misses "
-				"ibm,ppc-interrupt-server#s property",
-				node->full_name);
-			continue;
-		}
-		for (thread = 0; thread < proplen / sizeof (int); thread++) {
-			if (hardid == int_servers[thread]) {
-				addr = get_property(node, "pervasive", NULL);
-				goto found;
-			}
-		}
-	}
-
-	printk(KERN_WARNING "%s: CPU %d not found\n", __FUNCTION__, cpu);
-	return -EINVAL;
-
-found:
-	real_address = *(unsigned long*) addr;
-	addr += sizeof (unsigned long);
-	size = *(unsigned int*) addr;
-
-	pr_debug("pervasive area for CPU %d at %lx, size %x\n",
-			cpu, real_address, size);
-	p->regs = ioremap(real_address, size);
-	p->thread = thread;
-	return 0;
-}
-
-void __init cell_pervasive_init(void)
-{
-	struct cbe_pervasive *p;
-	int cpu;
-	int ret;
-
 	if (!cpu_has_feature(CPU_FTR_PAUSE_ZERO))
 		return;
 
-	for_each_possible_cpu(cpu) {
-		p = &cbe_pervasive[cpu];
-		ret = cbe_find_pmd_mmio(cpu, p);
-		if (ret)
-			return;
-	}
-
 	ppc_md.idle_loop = cbe_idle;
 	ppc_md.system_reset_exception = cbe_system_reset_exception;
 }
Index: powerpc.git/arch/powerpc/platforms/cell/ras.c
===================================================================
--- /dev/null
+++ powerpc.git/arch/powerpc/platforms/cell/ras.c
@@ -0,0 +1,112 @@
+#define DEBUG
+
+#include <linux/config.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/smp.h>
+
+#include <asm/reg.h>
+#include <asm/io.h>
+#include <asm/prom.h>
+#include <asm/machdep.h>
+
+#include "ras.h"
+#include "cbe_regs.h"
+
+
+static void dump_fir(int cpu)
+{
+	struct cbe_pmd_regs __iomem *pregs = cbe_get_cpu_pmd_regs(cpu);
+	struct cbe_iic_regs __iomem *iregs = cbe_get_cpu_iic_regs(cpu);
+
+	if (pregs == NULL)
+		return;
+
+	/* Todo: do some nicer parsing of bits and based on them go down
+	 * to other sub-units FIRs and not only IIC
+	 */
+	printk(KERN_ERR "Global Checkstop FIR    : 0x%016lx\n",
+	       in_be64(&pregs->checkstop_fir));
+	printk(KERN_ERR "Global Recoverable FIR  : 0x%016lx\n",
+	       in_be64(&pregs->checkstop_fir));
+	printk(KERN_ERR "Global MachineCheck FIR : 0x%016lx\n",
+	       in_be64(&pregs->spec_att_mchk_fir));
+
+	if (iregs == NULL)
+		return;
+	printk(KERN_ERR "IOC FIR                 : 0x%016lx\n",
+	       in_be64(&iregs->ioc_fir));
+
+}
+
+void cbe_system_error_exception(struct pt_regs *regs)
+{
+	int cpu = smp_processor_id();
+
+	printk(KERN_ERR "System Error Interrupt on CPU %d !\n", cpu);
+	dump_fir(cpu);
+	dump_stack();
+}
+
+void cbe_maintenance_exception(struct pt_regs *regs)
+{
+	int cpu = smp_processor_id();
+
+	/*
+	 * Nothing implemented for the maintenance interrupt at this point
+	 */
+
+	printk(KERN_ERR "Unhandled Maintenance interrupt on CPU %d !\n", cpu);
+	dump_stack();
+}
+
+void cbe_thermal_exception(struct pt_regs *regs)
+{
+	int cpu = smp_processor_id();
+
+	/*
+	 * Nothing implemented for the thermal interrupt at this point
+	 */
+
+	printk(KERN_ERR "Unhandled Thermal interrupt on CPU %d !\n", cpu);
+	dump_stack();
+}
+
+static int cbe_machine_check_handler(struct pt_regs *regs)
+{
+	int cpu = smp_processor_id();
+
+	printk(KERN_ERR "Machine Check Interrupt on CPU %d !\n", cpu);
+	dump_fir(cpu);
+
+	/* No recovery from this code now, lets continue */
+	return 0;
+}
+
+void __init cbe_ras_init(void)
+{
+	unsigned long hid0;
+
+	/*
+	 * Enable System Error & thermal interrupts and wakeup conditions
+	 */
+
+	hid0 = mfspr(SPRN_HID0);
+	hid0 |= HID0_CBE_THERM_INT_EN | HID0_CBE_THERM_WAKEUP |
+		HID0_CBE_SYSERR_INT_EN | HID0_CBE_SYSERR_WAKEUP;
+	mtspr(SPRN_HID0, hid0);
+	mb();
+
+	/*
+	 * Install machine check handler. Leave setting of precise mode to
+	 * what the firmware did for now
+	 */
+	ppc_md.machine_check_exception = cbe_machine_check_handler;
+	mb();
+
+	/*
+	 * For now, we assume that IOC_FIR is already set to forward some
+	 * error conditions to the System Error handler. If that is not true
+	 * then it will have to be fixed up here.
+	 */
+}
Index: powerpc.git/arch/powerpc/platforms/cell/ras.h
===================================================================
--- /dev/null
+++ powerpc.git/arch/powerpc/platforms/cell/ras.h
@@ -0,0 +1,9 @@
+#ifndef RAS_H
+#define RAS_H
+
+extern void cbe_system_error_exception(struct pt_regs *regs);
+extern void cbe_maintenance_exception(struct pt_regs *regs);
+extern void cbe_thermal_exception(struct pt_regs *regs);
+extern void cbe_ras_init(void);
+
+#endif /* RAS_H */
Index: powerpc.git/arch/powerpc/platforms/cell/setup.c
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/setup.c
+++ powerpc.git/arch/powerpc/platforms/cell/setup.c
@@ -52,7 +52,9 @@
 
 #include "interrupt.h"
 #include "iommu.h"
+#include "cbe_regs.h"
 #include "pervasive.h"
+#include "ras.h"
 
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -82,6 +84,12 @@ static void __init cell_setup_arch(void)
 	ppc_md.init_IRQ       = iic_init_IRQ;
 	ppc_md.get_irq        = iic_get_irq;
 
+	cbe_regs_init();
+
+#ifdef CONFIG_CBE_RAS
+	cbe_ras_init();
+#endif
+
 #ifdef CONFIG_SMP
 	smp_init_cell();
 #endif
@@ -98,7 +106,7 @@ static void __init cell_setup_arch(void)
 	init_pci_config_tokens();
 	find_and_init_phbs();
 	spider_init_IRQ();
-	cell_pervasive_init();
+	cbe_pervasive_init();
 #ifdef CONFIG_DUMMY_CONSOLE
 	conswitchp = &dummy_con;
 #endif
Index: powerpc.git/include/asm-powerpc/reg.h
===================================================================
--- powerpc.git.orig/include/asm-powerpc/reg.h
+++ powerpc.git/include/asm-powerpc/reg.h
@@ -386,6 +386,8 @@
 #define   SRR1_WAKEMT		0x00280000 /* mtctrl */
 #define   SRR1_WAKEDEC		0x00180000 /* Decrementer interrupt */
 #define   SRR1_WAKETHERM	0x00100000 /* Thermal management interrupt */
+#define SPRN_HSRR0	0x13A	/* Save/Restore Register 0 */
+#define SPRN_HSRR1	0x13B	/* Save/Restore Register 1 */
 
 #ifndef SPRN_SVR
 #define SPRN_SVR	0x11E	/* System Version Register */
Index: powerpc.git/arch/powerpc/platforms/cell/pervasive.h
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/pervasive.h
+++ powerpc.git/arch/powerpc/platforms/cell/pervasive.h
@@ -25,38 +25,9 @@
 #ifndef PERVASIVE_H
 #define PERVASIVE_H
 
-struct pmd_regs {
-	u8 pad_0x0000_0x0800[0x0800 - 0x0000];			/* 0x0000 */
-
-	/* Thermal Sensor Registers */
-	u64  ts_ctsr1;						/* 0x0800 */
-	u64  ts_ctsr2;						/* 0x0808 */
-	u64  ts_mtsr1;						/* 0x0810 */
-	u64  ts_mtsr2;						/* 0x0818 */
-	u64  ts_itr1;						/* 0x0820 */
-	u64  ts_itr2;						/* 0x0828 */
-	u64  ts_gitr;						/* 0x0830 */
-	u64  ts_isr;						/* 0x0838 */
-	u64  ts_imr;						/* 0x0840 */
-	u64  tm_cr1;						/* 0x0848 */
-	u64  tm_cr2;						/* 0x0850 */
-	u64  tm_simr;						/* 0x0858 */
-	u64  tm_tpr;						/* 0x0860 */
-	u64  tm_str1;						/* 0x0868 */
-	u64  tm_str2;						/* 0x0870 */
-	u64  tm_tsr;						/* 0x0878 */
-
-	/* Power Management */
-	u64  pm_control;					/* 0x0880 */
-#define PMD_PAUSE_ZERO_CONTROL		0x10000
-	u64  pm_status;						/* 0x0888 */
-
-	/* Time Base Register */
-	u64  tbr;						/* 0x0890 */
-
-	u8   pad_0x0898_0x1000 [0x1000 - 0x0898];		/* 0x0898 */
-};
-
-void __init cell_pervasive_init(void);
+extern void cbe_pervasive_init(void);
+extern void cbe_system_error_exception(struct pt_regs *regs);
+extern void cbe_maintenance_exception(struct pt_regs *regs);
+extern void cbe_thermal_exception(struct pt_regs *regs);
 
 #endif
Index: powerpc.git/arch/powerpc/platforms/cell/cbe_regs.h
===================================================================
--- /dev/null
+++ powerpc.git/arch/powerpc/platforms/cell/cbe_regs.h
@@ -0,0 +1,129 @@
+/*
+ * cbe_regs.h
+ *
+ * This file is intended to hold the various register definitions for CBE
+ * on-chip system devices (memory controller, IO controller, etc...)
+ *
+ * (c) 2006 Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
+ */
+
+#ifndef CBE_REGS_H
+#define CBE_REGS_H
+
+/*
+ *
+ * Some HID register definitions
+ *
+ */
+
+/* CBE specific HID0 bits */
+#define HID0_CBE_THERM_WAKEUP	0x0000020000000000ul
+#define HID0_CBE_SYSERR_WAKEUP	0x0000008000000000ul
+#define HID0_CBE_THERM_INT_EN	0x0000000400000000ul
+#define HID0_CBE_SYSERR_INT_EN	0x0000000200000000ul
+
+
+/*
+ *
+ * Pervasive unit register definitions
+ *
+ */
+
+struct cbe_pmd_regs {
+	u8 pad_0x0000_0x0800[0x0800 - 0x0000];			/* 0x0000 */
+
+	/* Thermal Sensor Registers */
+	u64  ts_ctsr1;						/* 0x0800 */
+	u64  ts_ctsr2;						/* 0x0808 */
+	u64  ts_mtsr1;						/* 0x0810 */
+	u64  ts_mtsr2;						/* 0x0818 */
+	u64  ts_itr1;						/* 0x0820 */
+	u64  ts_itr2;						/* 0x0828 */
+	u64  ts_gitr;						/* 0x0830 */
+	u64  ts_isr;						/* 0x0838 */
+	u64  ts_imr;						/* 0x0840 */
+	u64  tm_cr1;						/* 0x0848 */
+	u64  tm_cr2;						/* 0x0850 */
+	u64  tm_simr;						/* 0x0858 */
+	u64  tm_tpr;						/* 0x0860 */
+	u64  tm_str1;						/* 0x0868 */
+	u64  tm_str2;						/* 0x0870 */
+	u64  tm_tsr;						/* 0x0878 */
+
+	/* Power Management */
+	u64  pm_control;					/* 0x0880 */
+#define CBE_PMD_PAUSE_ZERO_CONTROL		0x10000
+	u64  pm_status;						/* 0x0888 */
+
+	/* Time Base Register */
+	u64  tbr;						/* 0x0890 */
+
+	u8   pad_0x0898_0x0c00 [0x0c00 - 0x0898];		/* 0x0898 */
+
+	/* Fault Isolation Registers */
+	u64  checkstop_fir;					/* 0x0c00 */
+	u64  recoverable_fir;
+	u64  spec_att_mchk_fir;
+	u64  fir_mode_reg;
+	u64  fir_enable_mask;
+
+	u8   pad_0x0c28_0x1000 [0x1000 - 0x0c28];		/* 0x0c28 */
+};
+
+extern struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np);
+extern struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu);
+
+/*
+ *
+ * IIC unit register definitions
+ *
+ */
+
+struct cbe_iic_pending_bits {
+	u32 data;
+	u8 flags;
+	u8 class;
+	u8 source;
+	u8 prio;
+};
+
+#define CBE_IIC_IRQ_VALID	0x80
+#define CBE_IIC_IRQ_IPI		0x40
+
+struct cbe_iic_thread_regs {
+	struct cbe_iic_pending_bits pending;
+	struct cbe_iic_pending_bits pending_destr;
+	u64 generate;
+	u64 prio;
+};
+
+struct cbe_iic_regs {
+	u8	pad_0x0000_0x0400[0x0400 - 0x0000];		/* 0x0000 */
+
+	/* IIC interrupt registers */
+	struct	cbe_iic_thread_regs thread[2];			/* 0x0400 */
+	u64     iic_ir;						/* 0x0440 */
+	u64     iic_is;						/* 0x0448 */
+
+	u8	pad_0x0450_0x0500[0x0500 - 0x0450];		/* 0x0450 */
+
+	/* IOC FIR */
+	u64	ioc_fir_reset;					/* 0x0500 */
+	u64	ioc_fir_set;
+	u64	ioc_checkstop_enable;
+	u64	ioc_fir_error_mask;
+	u64	ioc_syserr_enable;
+	u64	ioc_fir;
+
+	u8	pad_0x0530_0x1000[0x1000 - 0x0530];		/* 0x0530 */
+};
+
+extern struct cbe_iic_regs __iomem *cbe_get_iic_regs(struct device_node *np);
+extern struct cbe_iic_regs __iomem *cbe_get_cpu_iic_regs(int cpu);
+
+
+/* Init this module early */
+extern void cbe_regs_init(void);
+
+
+#endif /* CBE_REGS_H */
Index: powerpc.git/arch/powerpc/platforms/cell/interrupt.c
===================================================================
--- powerpc.git.orig/arch/powerpc/platforms/cell/interrupt.c
+++ powerpc.git/arch/powerpc/platforms/cell/interrupt.c
@@ -33,29 +33,10 @@
 #include <asm/ptrace.h>
 
 #include "interrupt.h"
-
-struct iic_pending_bits {
-	u32 data;
-	u8 flags;
-	u8 class;
-	u8 source;
-	u8 prio;
-};
-
-enum iic_pending_flags {
-	IIC_VALID = 0x80,
-	IIC_IPI   = 0x40,
-};
-
-struct iic_regs {
-	struct iic_pending_bits pending;
-	struct iic_pending_bits pending_destr;
-	u64 generate;
-	u64 prio;
-};
+#include "cbe_regs.h"
 
 struct iic {
-	struct iic_regs __iomem *regs;
+	struct cbe_iic_thread_regs __iomem *regs;
 	u8 target_id;
 };
 
@@ -115,7 +96,7 @@ static struct hw_interrupt_type iic_pic 
 	.end = iic_end,
 };
 
-static int iic_external_get_irq(struct iic_pending_bits pending)
+static int iic_external_get_irq(struct cbe_iic_pending_bits pending)
 {
 	int irq;
 	unsigned char node, unit;
@@ -168,15 +149,15 @@ int iic_get_irq(struct pt_regs *regs)
 {
 	struct iic *iic;
 	int irq;
-	struct iic_pending_bits pending;
+	struct cbe_iic_pending_bits pending;
 
 	iic = &__get_cpu_var(iic);
 	*(unsigned long *) &pending = 
 		in_be64((unsigned long __iomem *) &iic->regs->pending_destr);
 
 	irq = -1;
-	if (pending.flags & IIC_VALID) {
-		if (pending.flags & IIC_IPI) {
+	if (pending.flags & CBE_IIC_IRQ_VALID) {
+		if (pending.flags & CBE_IIC_IRQ_IPI) {
 			irq = IIC_IPI_OFFSET + (pending.prio >> 4);
 /*
 			if (irq > 0x80)
@@ -226,7 +207,7 @@ static int setup_iic_hardcoded(void)
 			regs += 0x20;
 
 		printk(KERN_INFO "IIC for CPU %d at %lx\n", cpu, regs);
-		iic->regs = ioremap(regs, sizeof(struct iic_regs));
+		iic->regs = ioremap(regs, sizeof(struct cbe_iic_thread_regs));
 		iic->target_id = (nodeid << 4) + ((cpu & 1) ? 0xf : 0xe);
 	}
 
@@ -267,12 +248,12 @@ static int setup_iic(void)
 		}
 
  		iic = &per_cpu(iic, np[0]);
- 		iic->regs = ioremap(regs[0], sizeof(struct iic_regs));
+ 		iic->regs = ioremap(regs[0], sizeof(struct cbe_iic_thread_regs));
 		iic->target_id = ((np[0] & 2) << 3) + ((np[0] & 1) ? 0xf : 0xe);
  		printk("IIC for CPU %d at %lx mapped to %p\n", np[0], regs[0], iic->regs);
 
  		iic = &per_cpu(iic, np[1]);
- 		iic->regs = ioremap(regs[2], sizeof(struct iic_regs));
+ 		iic->regs = ioremap(regs[2], sizeof(struct cbe_iic_thread_regs));
 		iic->target_id = ((np[1] & 2) << 3) + ((np[1] & 1) ? 0xf : 0xe);
  		printk("IIC for CPU %d at %lx mapped to %p\n", np[1], regs[2], iic->regs);
 
Index: powerpc.git/arch/powerpc/kernel/prom.c
===================================================================
--- powerpc.git.orig/arch/powerpc/kernel/prom.c
+++ powerpc.git/arch/powerpc/kernel/prom.c
@@ -2096,3 +2096,46 @@ int prom_update_property(struct device_n
 	return 0;
 }
 
+
+/* Find the device node for a given logical cpu number, also returns the cpu
+ * local thread number (index in ibm,interrupt-server#s) if relevant and
+ * asked for (non NULL)
+ */
+struct device_node *of_get_cpu_node(int cpu, unsigned int *thread)
+{
+	int hardid;
+	struct device_node *np;
+
+	hardid = get_hard_smp_processor_id(cpu);
+
+	for_each_node_by_type(np, "cpu") {
+		u32 *intserv;
+		unsigned int plen, t;
+
+		/* Check for ibm,ppc-interrupt-server#s. If it doesn't exist
+		 * fallback to "reg" property and assume no threads
+		 */
+		intserv = (u32 *)get_property(np, "ibm,ppc-interrupt-server#s",
+					      &plen);
+		if (intserv == NULL) {
+			u32 *reg = (u32 *)get_property(np, "reg", NULL);
+			if (reg == NULL)
+				continue;
+			if (*reg == hardid) {
+				if (thread)
+					*thread = 0;
+				return np;
+			}
+		} else {
+			plen /= sizeof(u32);
+			for (t = 0; t < plen; t++) {
+				if (hardid == intserv[t]) {
+					if (thread)
+						*thread = t;
+					return np;
+				}
+			}
+		}
+	}
+	return NULL;
+}
Index: powerpc.git/arch/powerpc/platforms/cell/cbe_regs.c
===================================================================
--- /dev/null
+++ powerpc.git/arch/powerpc/platforms/cell/cbe_regs.c
@@ -0,0 +1,128 @@
+/*
+ * cbe_regs.c
+ *
+ * Accessor routines for the various MMIO register blocks of the CBE
+ *
+ * (c) 2006 Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp.
+ */
+
+
+#include <linux/config.h>
+#include <linux/percpu.h>
+#include <linux/types.h>
+
+#include <asm/io.h>
+#include <asm/pgtable.h>
+#include <asm/prom.h>
+#include <asm/ptrace.h>
+
+#include "cbe_regs.h"
+
+#define MAX_CBE		2
+
+/*
+ * Current implementation uses "cpu" nodes. We build our own mapping
+ * array of cpu numbers to cpu nodes locally for now to allow interrupt
+ * time code to have a fast path rather than call of_get_cpu_node(). If
+ * we implement cpu hotplug, we'll have to install an appropriate norifier
+ * in order to release references to the cpu going away
+ */
+static struct cbe_regs_map
+{
+	struct device_node *cpu_node;
+	struct cbe_pmd_regs __iomem *pmd_regs;
+	struct cbe_iic_regs __iomem *iic_regs;
+} cbe_regs_maps[MAX_CBE];
+static int cbe_regs_map_count;
+
+static struct cbe_thread_map
+{
+	struct device_node *cpu_node;
+	struct cbe_regs_map *regs;
+} cbe_thread_map[NR_CPUS];
+
+static struct cbe_regs_map *cbe_find_map(struct device_node *np)
+{
+	int i;
+
+	for (i = 0; i < cbe_regs_map_count; i++)
+		if (cbe_regs_maps[i].cpu_node == np)
+			return &cbe_regs_maps[i];
+	return NULL;
+}
+
+struct cbe_pmd_regs __iomem *cbe_get_pmd_regs(struct device_node *np)
+{
+	struct cbe_regs_map *map = cbe_find_map(np);
+	if (map == NULL)
+		return NULL;
+	return map->pmd_regs;
+}
+
+struct cbe_pmd_regs __iomem *cbe_get_cpu_pmd_regs(int cpu)
+{
+	struct cbe_regs_map *map = cbe_thread_map[cpu].regs;
+	if (map == NULL)
+		return NULL;
+	return map->pmd_regs;
+}
+
+
+struct cbe_iic_regs __iomem *cbe_get_iic_regs(struct device_node *np)
+{
+	struct cbe_regs_map *map = cbe_find_map(np);
+	if (map == NULL)
+		return NULL;
+	return map->iic_regs;
+}
+struct cbe_iic_regs __iomem *cbe_get_cpu_iic_regs(int cpu)
+{
+	struct cbe_regs_map *map = cbe_thread_map[cpu].regs;
+	if (map == NULL)
+		return NULL;
+	return map->iic_regs;
+}
+
+void __init cbe_regs_init(void)
+{
+	int i;
+	struct device_node *cpu;
+
+	/* Build local fast map of CPUs */
+	for_each_cpu(i)
+		cbe_thread_map[i].cpu_node = of_get_cpu_node(i, NULL);
+
+	/* Find maps for each device tree CPU */
+	for_each_node_by_type(cpu, "cpu") {
+		struct cbe_regs_map *map = &cbe_regs_maps[cbe_regs_map_count++];
+
+		/* That hack must die die die ! */
+		struct address_prop {
+			unsigned long address;
+			unsigned int len;
+		} __attribute__((packed)) *prop;
+
+
+		if (cbe_regs_map_count > MAX_CBE) {
+			printk(KERN_ERR "cbe_regs: More BE chips than supported"
+			       "!\n");
+			cbe_regs_map_count--;
+			return;
+		}
+		map->cpu_node = cpu;
+		for_each_cpu(i)
+			if (cbe_thread_map[i].cpu_node == cpu)
+				cbe_thread_map[i].regs = map;
+
+		prop = (struct address_prop *)get_property(cpu, "pervasive",
+							   NULL);
+		if (prop != NULL)
+			map->pmd_regs = ioremap(prop->address, prop->len);
+
+		prop = (struct address_prop *)get_property(cpu, "iic",
+							   NULL);
+		if (prop != NULL)
+			map->iic_regs = ioremap(prop->address, prop->len);
+	}
+}
+
Index: powerpc.git/include/asm-powerpc/prom.h
===================================================================
--- powerpc.git.orig/include/asm-powerpc/prom.h
+++ powerpc.git/include/asm-powerpc/prom.h
@@ -238,5 +238,8 @@ void of_parse_dma_window(struct device_n
 
 extern void kdump_move_device_tree(void);
 
+/* CPU OF node matching */
+struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
+
 #endif /* __KERNEL__ */
 #endif /* _POWERPC_PROM_H */
Index: powerpc.git/arch/powerpc/configs/cell_defconfig
===================================================================
--- powerpc.git.orig/arch/powerpc/configs/cell_defconfig
+++ powerpc.git/arch/powerpc/configs/cell_defconfig
@@ -133,6 +133,7 @@ CONFIG_CELL_IIC=y
 #
 CONFIG_SPU_FS=m
 CONFIG_SPUFS_MMAP=y
+CONFIG_CBE_RAS=y
 
 #
 # Kernel options

--

^ permalink raw reply

* [patch 00/20] cell: patches for 2.6.18
From: arnd @ 2006-06-19 18:33 UTC (permalink / raw)
  To: paulus; +Cc: linuxppc-dev, cbe-oss-dev, linux-kernel

Here are the cell patches I promised to submit ages ago for
inclusion in 2.6.18. I refreshed them to apply on the
union of 2.6.17 and powerpc.git.

	Arnd <><
--

^ permalink raw reply

* OFW node names
From: Doug Maxey @ 2006-06-19 17:19 UTC (permalink / raw)
  To: linuxppc-dev


Howdy!

I'm looking at page 164 in the 1275-1994 at the "name" entry.

Does any platform known to use yaboot (or grub for that matter) use the
preferred encoding of the manufacturer portion of the name property?
How about the "ONNNNN" OUI from the RAC, or the uppercase VWXYZ company stock symbol?

My view has been limited to the IBM platform.  According to the 
examples, this is a recommended practice.  I know IBM uses the 
lowercase variant.

If anyone has an example, please point me at tarball of the device tree.

++doug

^ permalink raw reply

* RE: Using bestcomm in an external module (MPC5200B to be exact)
From: Trueskew @ 2006-06-19 14:50 UTC (permalink / raw)
  To: 'Andrey Volkov'; +Cc: linuxppc-embedded
In-Reply-To: <4496A363.8080802@varma-el.com>

Hi Andrey,

Thanks for the reply.  I did notice that a few weeks ago and was waiting for
the patch state to be changed from "New" to "Accepted".  Can you give me
more details on how you found out bestcomm won't be included in 2.6?  The
latest downloadable LTIB from Freescale for the Lite5200b includes bestcomm
in several places, and the mpc52xx fec driver uses it, along with the ATA
driver that Sylvain provided a patch for.

As for http://www.246tNt.com/mpc52xx/, it's been coming up "page not found"
for me for those same few weeks when I've tried it off an on, and
www.246tNt.com just has a Welcome line in it.

Sal 

-----Original Message-----
From: Andrey Volkov [mailto:avolkov@varma-el.com] 
Sent: Monday, June 19, 2006 6:15 AM
To: Trueskew
Cc: linuxppc-embedded@ozlabs.org
Subject: Re: Using bestcomm in an external module (MPC5200B to be exact)

Trueskew wrote:
> I should've let you all know, I'm more of a 2.4 person than a 2.6 person.
> So I read what I could on 2.6 difference with 2.4, and it looked like 
> my easiest choice was to modify the bestcomm code to export a couple 
> tables and its API functions.  I found that kallsyms has almost all of 
> the functions I needed to resolve (with 'T' next to them), but they were
still not working.
> I added EXPORT_MODULE(TaskBDReset) and similar declarations in the 
> bestcomm api code, but that still didn't do the trick for me.  So what is
the trick?
> I think I'm on the right track, I can insmod a module that my driver 
> needs, see kallsyms get updated, and access the functions directly in 
> my driver.  I hope I'm close to doing something similar with the 
> bestcomm functions, can anyone offer me some advice on what else I need to
do?
> 
> Thanks.
Please, check Sylvain's patchset (http://www.246tNt.com/mpc52xx/) _before_
you will do anithing. If be more shortly - Freescale's BestcommAPI
_deprecated_ and will _not_ included to 2.6.xxx.

--
Regards
Andrey Volkov


> 
> ________________________________
> 
> From: Trueskew [mailto:trueskew@gmail.com]
> Sent: Friday, June 16, 2006 9:47 PM
> To: 'linuxppc-embedded@ozlabs.org'
> Subject: Using bestcomm in an external module (MPC5200B to be exact)
> 
> 
> I'm writing a driver for a TI codec attached to the MPC5200B PSC3 
> codec lines on a Lite5200b.  It's an external module, and I'd like to 
> use Bestcomm with it.  I've already tried a bunch of horrible things to
get it to work.
> I could say it's close, but by close I mean the FEC still runs, my 
> stuff doesn't.
>  
> 1. Can the Bestcomm I/F be used by an external module, or is the 
> module required to be built in if built-in drivers use Bestcomm?  
> TasksInitAPI (no so bad) and TasksLoadImage (yeah, bad) aren't really 
> supposed to be called more than once from what I've read, and the 
> kernel loads them for ethernet and ATA (no disk in my system if that
matters).
>  
> 2. If it can be used by an external module, how would I do it?  I've 
> tried compiling the source into my module and replicating the 
> initialization the kernel does in addition to my own stuff.  It's not 
> too bad, though I don't get any interrupts yet.
>  
> The LTIB from Freescale includes AIC23 and AC97 drivers that use Bestcomm.
> I built my kernel with them set as modules, and they had the same 
> unresolved problems that my driver has on insmod, so I'm pessimistic.  
> If someone could put me out of my misery one way or another, I'd
appreciate it.
>  
> Thanks.
> Sal
> 
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> 

^ permalink raw reply

* Re: L3 cache on Apple dual processor (7450 r 2.1) question
From: Olof Johansson @ 2006-06-19 14:36 UTC (permalink / raw)
  To: Till Wimmer; +Cc: linuxppc-dev
In-Reply-To: <1150726624.4711.16.camel@localhost.localdomain>

On Mon, Jun 19, 2006 at 04:17:04PM +0200, Till Wimmer wrote:

> Now my questions are:
> Is there anything else to do for getting the L3 cache working?
> How can i check if the L3 is enabled? E.g. is there a benchmark program
> which accounts for cache settings?

lmbench has testcases for memory latency testing.

http://www.bitmover.com/lmbench/


-Olof

^ permalink raw reply

* L3 cache on Apple dual processor (7450 r 2.1) question
From: Till Wimmer @ 2006-06-19 14:17 UTC (permalink / raw)
  To: linuxppc-dev

Hello,

i tried to enable the L3 cache on my dual 800MHz processor board (taken
from Quicksilver). I'm running the 2.6.8-3-powerpc-smp kernel from
Debian.

I changed the code for in core99_init_caches() in
arch/ppc/platforms/pmac_smp.c because the cache wasn't enabled by
default:

        if (cpu == 0){
                _set_L3CR(0);
                _set_L3CR(0x9F424340);
                core99_l3_cache = _get_L3CR();
                printk("CPU0: L3CR is %lx\n", core99_l3_cache);
        } else {
                printk("CPU%d: L3CR was %lx\n", cpu, _get_L3CR());
                _set_L3CR(0);
                _set_L3CR(core99_l3_cache);
		printk("CPU%d: L3CR is %lx\n", cpu, _get_L3CR());
        }
Now my questions are:
Is there anything else to do for getting the L3 cache working?
How can i check if the L3 is enabled? E.g. is there a benchmark program
which accounts for cache settings?

Thanx
Till

^ permalink raw reply

* Re: could linux support to configure the PLB-PCI bridge of PPC440 into adapter mode
From: Matthias Fuchs @ 2006-06-19 14:11 UTC (permalink / raw)
  To: hilichen2000; +Cc: linuxppc-embedded
In-Reply-To: <BAY110-F4002B7619F83B2E70939DEC3860@phx.gbl>

Hi chen,

it's not easy to setup the PCI-to-PLB mapping in a generic way so that 
is gets into the kernel. Also it might be too late when the adapter OS 
configures the bridge. The bridge must be setup quickly after reset so 
that the host OS can assign resources to the card. The bootloader of 
your board might be a good place to setup of the adapter stuff. At least 
number and sizes of the needed address spaces should be setup early.
The PLB address can be setup or modified later (e.g. from the target OS).

> hi,now I want to use PPC440GX as PCI adapter card bridge. according to user 
> manual, the PLB-PCI bridge should be configured to Adapter mode. after 
> check some code of PCI of linux, i find the linux only support configuring 
> the PLB-PCI bridge into HOST mode. Is my understanding correct ? if the 
> normal version of linux don't support the adapter mode, could i found the 
> patch?
Probably not.

Matthias

^ permalink raw reply

* Re: [PATCH 5/9 v3] Add the MPC8641 HPCN platform files.
From: Jon Loeliger @ 2006-06-19 14:09 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev@ozlabs.org, Jon Loeliger
In-Reply-To: <1150600470.23600.158.camel@localhost.localdomain>

On Sat, 2006-06-17 at 22:14, Benjamin Herrenschmidt wrote:

> I'm not too fan of the big table in the kernel however. I'd rather have
> it in the device-tree.

We are waiting for this release to get into the mainline,
and for your proposed rewrite to be accepted.  We have folks
here who are on deck to totally modify this to accommodate
your proposal via the Device Tree file.

But we're not going to read your mind to get there. :-)

jdl

^ permalink raw reply

* Re: [PATCH 4/9 v3] Add starting of secondary 86xx CPUs.
From: Jon Loeliger @ 2006-06-19 14:06 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev@ozlabs.org, Jon Loeliger
In-Reply-To: <1150599918.23600.150.camel@localhost.localdomain>

On Sat, 2006-06-17 at 22:05, Benjamin Herrenschmidt wrote:

> > +BEGIN_FTR_SECTION
> > +	LOAD_BAT(4,r3,r4,r5)
> > +	LOAD_BAT(5,r3,r4,r5)
> > +	LOAD_BAT(6,r3,r4,r5)
> > +	LOAD_BAT(7,r3,r4,r5)
> > +END_FTR_SECTION_IFSET(CPU_FTR_HAS_HIGH_BATS)
> >  	blr
> 
> Looks good.

Excellent.  Thanks.

jdl

^ permalink raw reply

* Re: [PATCH 5/9 v3] Add the MPC8641 HPCN platform files.
From: Jon Loeliger @ 2006-06-19 14:04 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev@ozlabs.org, Jon Loeliger
In-Reply-To: <1150600056.23600.152.camel@localhost.localdomain>

On Sat, 2006-06-17 at 22:07, Benjamin Herrenschmidt wrote:

> 
> You don't have any way to freeze the timebase ? (No GPIO controlling
> TBEN ?) It's pretty nasty to rely on software sync,

I will investigate this option and follow up with a patch,
assuming that there is a HW solution for your suggestion.

> especially if it's supposed to be an example design ...

Who said that? ;-)

jdl

^ permalink raw reply

* Re: Using bestcomm in an external module (MPC5200B to be exact)
From: Andrey Volkov @ 2006-06-19 13:15 UTC (permalink / raw)
  To: Trueskew; +Cc: linuxppc-embedded
In-Reply-To: <44965226.33b91fca.1abe.ffffd120@mx.gmail.com>

Trueskew wrote:
> I should've let you all know, I'm more of a 2.4 person than a 2.6 person.
> So I read what I could on 2.6 difference with 2.4, and it looked like my
> easiest choice was to modify the bestcomm code to export a couple tables and
> its API functions.  I found that kallsyms has almost all of the functions I
> needed to resolve (with 'T' next to them), but they were still not working.
> I added EXPORT_MODULE(TaskBDReset) and similar declarations in the bestcomm
> api code, but that still didn't do the trick for me.  So what is the trick?
> I think I'm on the right track, I can insmod a module that my driver needs,
> see kallsyms get updated, and access the functions directly in my driver.  I
> hope I'm close to doing something similar with the bestcomm functions, can
> anyone offer me some advice on what else I need to do?
> 
> Thanks.
Please, check Sylvain's patchset (http://www.246tNt.com/mpc52xx/)
_before_ you will do anithing. If be more shortly - Freescale's
BestcommAPI _deprecated_ and will _not_ included to 2.6.xxx.

--
Regards
Andrey Volkov


> 
> ________________________________
> 
> From: Trueskew [mailto:trueskew@gmail.com] 
> Sent: Friday, June 16, 2006 9:47 PM
> To: 'linuxppc-embedded@ozlabs.org'
> Subject: Using bestcomm in an external module (MPC5200B to be exact)
> 
> 
> I'm writing a driver for a TI codec attached to the MPC5200B PSC3 codec
> lines on a Lite5200b.  It's an external module, and I'd like to use Bestcomm
> with it.  I've already tried a bunch of horrible things to get it to work.
> I could say it's close, but by close I mean the FEC still runs, my stuff
> doesn't.  
>  
> 1. Can the Bestcomm I/F be used by an external module, or is the module
> required to be built in if built-in drivers use Bestcomm?  TasksInitAPI (no
> so bad) and TasksLoadImage (yeah, bad) aren't really supposed to be called
> more than once from what I've read, and the kernel loads them for ethernet
> and ATA (no disk in my system if that matters).  
>  
> 2. If it can be used by an external module, how would I do it?  I've tried
> compiling the source into my module and replicating the initialization the
> kernel does in addition to my own stuff.  It's not too bad, though I don't
> get any interrupts yet.
>  
> The LTIB from Freescale includes AIC23 and AC97 drivers that use Bestcomm.
> I built my kernel with them set as modules, and they had the same unresolved
> problems that my driver has on insmod, so I'm pessimistic.  If someone could
> put me out of my misery one way or another, I'd appreciate it.
>  
> Thanks.
> Sal
> 
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> 

^ permalink raw reply

* could linux support to configure the PLB-PCI bridge of PPC440 into adapter mode
From: 陈 云 @ 2006-06-19  7:57 UTC (permalink / raw)
  To: linuxppc-embedded

hi,now I want to use PPC440GX as PCI adapter card bridge. according to user 
manual, the PLB-PCI bridge should be configured to Adapter mode. after 
check some code of PCI of linux, i find the linux only support configuring 
the PLB-PCI bridge into HOST mode. Is my understanding correct ? if the 
normal version of linux don't support the adapter mode, could i found the 
patch?

best regards and thank you.

 chen

_________________________________________________________________
与联机的朋友进行交流,请使用 MSN Messenger:  http://messenger.msn.com/cn  

^ permalink raw reply

* RE: Using bestcomm in an external module (MPC5200B to be exact)
From: Trueskew @ 2006-06-19  7:28 UTC (permalink / raw)
  To: linuxppc-embedded

I should've let you all know, I'm more of a 2.4 person than a 2.6 person.
So I read what I could on 2.6 difference with 2.4, and it looked like my
easiest choice was to modify the bestcomm code to export a couple tables and
its API functions.  I found that kallsyms has almost all of the functions I
needed to resolve (with 'T' next to them), but they were still not working.
I added EXPORT_MODULE(TaskBDReset) and similar declarations in the bestcomm
api code, but that still didn't do the trick for me.  So what is the trick?
I think I'm on the right track, I can insmod a module that my driver needs,
see kallsyms get updated, and access the functions directly in my driver.  I
hope I'm close to doing something similar with the bestcomm functions, can
anyone offer me some advice on what else I need to do?

Thanks.

________________________________

From: Trueskew [mailto:trueskew@gmail.com] 
Sent: Friday, June 16, 2006 9:47 PM
To: 'linuxppc-embedded@ozlabs.org'
Subject: Using bestcomm in an external module (MPC5200B to be exact)


I'm writing a driver for a TI codec attached to the MPC5200B PSC3 codec
lines on a Lite5200b.  It's an external module, and I'd like to use Bestcomm
with it.  I've already tried a bunch of horrible things to get it to work.
I could say it's close, but by close I mean the FEC still runs, my stuff
doesn't.  
 
1. Can the Bestcomm I/F be used by an external module, or is the module
required to be built in if built-in drivers use Bestcomm?  TasksInitAPI (no
so bad) and TasksLoadImage (yeah, bad) aren't really supposed to be called
more than once from what I've read, and the kernel loads them for ethernet
and ATA (no disk in my system if that matters).  
 
2. If it can be used by an external module, how would I do it?  I've tried
compiling the source into my module and replicating the initialization the
kernel does in addition to my own stuff.  It's not too bad, though I don't
get any interrupts yet.
 
The LTIB from Freescale includes AIC23 and AC97 drivers that use Bestcomm.
I built my kernel with them set as modules, and they had the same unresolved
problems that my driver has on insmod, so I'm pessimistic.  If someone could
put me out of my misery one way or another, I'd appreciate it.
 
Thanks.
Sal

^ permalink raw reply

* Linux Audio Xilinx board
From: Prakash N @ 2006-06-19  4:49 UTC (permalink / raw)
  To: linuxppc-embedded

[-- Attachment #1: Type: text/plain, Size: 14184 bytes --]

 Hi all,
 I'm developing an IP Phone which has to be optimized for cost.  I thought of prototyping, the application on Xilinx Board (http://www.xilinx.com/univ/xupv2p.html (or) www.digilentinc.com/xupv2p). Xilinx had given the OS support thro' Montavista, VxWorks. The montavista Linux which is supported & "open source" is available with the kernel 2.4.26. I used www.eecs.wsu.edu/~jamie/research/LinuxPort/linux_port.htm as a reference for porting linux on xilinx board. Since I'm more into VLSI than embedded designs I dont know much about the later.
 
 Now coming to problem, Xilinx had given BSPs for Ethernet, UART, Compact Flash etc , which I can replace it in the Montavista distribution and I can configure and compile the kernel for the same. What I mean here is the montavista linux distribution doesnt have the xilinx BSPs, which I need to put in their distribution, before configuration & compilation. But the Xilinx had not given the BSP for Audio Codec, which is available in the board.
 
 But as per the work done by Jamie, http://www.eecs.wsu.edu/~jamie/research/designs/audio_test /Audio%20Test.doc
 http://www.eecs.wsu.edu/~jamie/research/designs/audio_test/7.1i.zip
 
Coming to my application, Linphone (www.linphone.org), an open source
VoIP phone, I could compile and run it on FC4 Linux x86 computer. Also
I cross compiled the same on powerPC-405 platform using cross
compiling tools. Since audio support/device driver is not provided
under montavista (compatible to Xilinx board) I couldnt test the
audio, which is very important in phone kind of products.
I could see the ac97 Codec (LM4550 chip) in the board. Also I could
see ac97 related files in two places,
1) Under Xilinx supplied software
2) Under Montavista Linux distribution

Probably I may need to  change the ac97 files in montavista with "some
modifications" in Xilinx provided files. Here "some modifications" is
the advice given by Jamie (transcript is given below), which she had
stopped replying after some time.

I\'d attached the
1.Xilinx provided BSPs which I replace in monta vista distribution.
(attached as temp.zip)
2.ac97 files provided by Xilinx (xac97_l.c & xac97_l.h)
3.ac97 related files by Montavista  (ac97*.*) as given in
linuxppc_2_4_devel folder

The linphone is trying to check /dev/dsp for audio i/o and I just need
OSS rather ALSA, as later is not supported in Linux 2.4.

Now if you can say how can I make a driver / adapter in linux for
Linphone, so that it can access the xilinx board specific Audio Codec.

------------------------------------------------------------------------------------------------------------------------
Transcripts of mails with Jamie
------------------------------------------------------------------------------------------------------------------------Prakash,

- Hide quoted text -
",1] );  //-->I could able to test the Mic (Mike, Speaker input) & speaker (speaker  output), as a stand alone application (not on linux) running on board. 

Coming to my application, Linphone (www.linphone.org), an open source VoIP phone, I could compile and run it on FC4 Linux x86 computer. Also I cross compiled the same on powerPC-405 platform using cross compiling tools. Since audio support/device driver is not provided under montavista (compatible to Xilinx board) I couldnt test the audio, which is very important in phone kind of products.
I could see  the ac97  Codec (LM4550 chip) in the board. Also I could see ac97 related  files in two places, 
1) Under Xilinx supplied software
2) Under Montavista  Linux distribution

Probably I may need to change the ac97 files in montavista with "some modifications" in Xilinx provided files. Here "some modifications" is the advice given by Jamie (transcript is given below), which she had stopped replying after some time.

The linphone is trying to check /dev/dsp for audio i/o and I just need OSS rather ALSA, as later is not supported in Linux 2.4.

Now if you can say how can I make a driver / adapter in linux for Linphone, so that it can access the xilinx board specific Audio Codec.
 Also I want to know whether there is Linux 2.6 version available for xilinx board, which does have the BSPs for the same.

------------------------------------------------------------------------------------------
Transcripts  of mails with  Jamie
 ------------------------------ ------------------------------------------------------------

Prakash,

Sorry about the delay. I was out of town for a while.
If you track down Xilinx device driver functions, you\'ll
see that they use their own IO functions. These functions
are specific to Xilinx products, and so they can\'t be used directly
under Linux. The memory mapped IO driver I wrote can be used to
replace these functions. You basically create a character device on
your own, so that the device can be read/write in Linux. I assume you
have a good
programming knowledge, so just look into the AC97
device driver, and track down to the lowest level IO.
>From there, use the Linux IO driver to  replace these functions. I hope
this helps.

-Jamie


----- Original Message -----
From: "Prakash N" <nprakash@cedt.iisc.ernet.in>
To: "Jamie Lin" <jamiehl@mail.wsu.edu>
Sent: Thursday, May 04, 2006 11:16 PM
Subject: RE: XILINX board-Audio Codec-Linux driver support


> Jamie,
> Could you please brief me how can I proceed in developing the
> driver/adapter for linux-xilinx combination. Just give me some steps
> for this audio support. Like, just outline what I need to do, then I
> can proceed. I feel I may have to modify/add xilinx hardware related
> stuff to AC97 general linux drivers.
> Please guide  me in this.
> Sincerely,
> Prakash
>
> -----Original Message-----
> From: Jamie Lin [mailto:jamiehl@mail.wsu.edu]
> Sent: Monday, May 01, 2006 10:25 PM
> To: Prakash N
> Subject: Re: XILINX board-Audio Codec-Linux driver support
>
>
> No, you can\'t just use these files under Linux. Xilinx has its way of
",1] );  //--> 
Sorry about the delay. I was out of town for a while.
If you track down  Xilinx device driver functions, you'll
see that they use their own IO  functions. These functions
are specific to Xilinx products, and so they can't  be used directly
under Linux. The memory mapped IO driver I wrote can be used  to
replace these functions. You basically create a character device  on
your own, so that the device can be read/write in Linux.  I assume  you
have a good
programming knowledge, so just look into the  AC97
device driver, and track down to the lowest level IO.
>From there, use  the Linux IO driver to replace these functions. I hope
this  helps.

-Jamie


----- Original Message -----
From: "Prakash  N" <nprakash@cedt.iisc.ernet.in>
To:  "Jamie Lin" <jamiehl@mail.wsu.edu>
Sent:  Thursday, May 04, 2006 11:16 PM
Subject: RE: XILINX board-Audio Codec-Linux  driver support


> Jamie,
> Could you please brief me how can  I proceed in developing the
> driver/adapter for linux-xilinx combination.  Just give me some steps
> for this audio support. Like, just outline what  I need to do, then I
> can proceed. I feel I may have  to modify/add xilinx  hardware related
> stuff to AC97 general linux drivers.
> Please  guide me in this.
> Sincerely,
> Prakash
>
>  -----Original Message-----
> From: Jamie Lin [mailto:jamiehl@mail.wsu.edu]
> Sent:  Monday, May 01, 2006 10:25 PM
> To: Prakash N
> Subject: Re: XILINX  board-Audio Codec-Linux driver support
>
>
> No, you can't  just use these files under Linux. Xilinx has its way of
 > be used to make Xilinx drivers. All drivers in EDK only work under
> specific Xilinx platforms. That\'s why when we want to run Ethernet in
> Linux, we need to copy BSP to Linux, so that it knows a specific type
> of Ethernet needs to be made. We only replace files that  comes with
> BSP in Linux. The rest of driver files in Linux are used to adapt the
> device. If mv_linux BSP doesn\'t generate the device drivers for some
> of your devices in the base system, it means that device is not
> supported under Linux. To conclude, you need to write a custom AC97
> adapter in order to make it work in Linux.
>
> -Jamie
>
>
> ----- Original Message -----
> From: "Prakash N" <nprakash@cedt.iisc.ernet.in>
> To: "Jamie Lin" <jamiehl@mail.wsu.edu>
> Sent: Sunday, April 30, 2006 11:58 PM
> Subject: RE: XILINX board-Audio Codec-Linux driver support
>
>
> >  Jamie,
> > Iam confused with bsp folders. I just updated EDK with this,
> > http://www.xilinx.com/univ/XUPV2P/lib/lib_rev_1_1.zip
> > In that I could see EDK\\sw\\XilinxProcessorIPLib\\drivers\\ac97_v2_00_a
> > having data and src dirs which contains,
> > Data --> ac97_v2_1_0.tcl, ac97_v2_1_0.mdd
> > Src --> xac97_l.h ,xac97_l.c , Makefile
> > Is it not possible to use these drivers, by copying and pasting in
> > EDK\\sw\\ThirdParty\\bsp\\linux_mvl31_v1_01_a\\drivers
",1] );  //--> > making device drivers to adapt their platforms. The Makefiles can  only
> be used to make Xilinx drivers. All drivers in EDK only work  under
> specific Xilinx platforms. That's why when we want to  run Ethernet  in
> Linux, we need to copy BSP to Linux, so that it knows a specific  type
> of Ethernet needs to be made. We only replace files that comes  with
> BSP in Linux. The rest of driver files in Linux are used to adapt  the
> device. If mv_linux BSP doesn't generate the device drivers for  some
> of your devices in the base system, it means that device is  not
> supported under Linux. To conclude, you need to write a custom  AC97
> adapter in order to make it work in Linux.
>
>  -Jamie
>
>
> ----- Original Message -----
> From:  "Prakash N" <nprakash@cedt.iisc.ernet.in>
>  To: "Jamie Lin" <jamiehl@mail.wsu.edu>
> Sent:  Sunday, April 30, 2006 11:58 PM
>  Subject: RE: XILINX board-Audio  Codec-Linux driver support
>
>
> > Jamie,
> > Iam  confused with bsp folders. I just updated EDK with this,
> > http://www.xilinx.com/univ/XUPV2P/lib/lib_rev_1_1.zip
>  > In that I could see  EDK\sw\XilinxProcessorIPLib\drivers\ac97_v2_00_a
> > having data  and src dirs which contains,
> > Data --> ac97_v2_1_0.tcl,  ac97_v2_1_0.mdd
> > Src --> xac97_l.h ,xac97_l.c , Makefile
>  > Is it not possible to use these drivers, by copying and pasting in
>  > EDK\sw\ThirdParty\bsp\linux_mvl31_v1_01_a\drivers
 > > Please clarify,
> > Prakash
> >
> >
> > -----Original Message-----
>  > From: Jamie Lin [mailto:jamiehl@mail.wsu.edu]
> > Sent: Monday, May 01, 2006 9:49 AM
> > To: Prakash N
> > Subject: Re: XILINX board-Audio Codec-Linux driver support
> >
> >
> > Prakash,
> >
> > The BSP only offers a limit number of necessary drivers. You\'ll have
> > to write custom drivers on your own if they\'re not included. One thing
>
> > you can do is to use the sample IO driver I\'ve written to replace
> > low
> > level IOs in the Xilinx AC97 codec driver. This will take you some
> > time, but is a way to adapt AC97 codec in Linux that I can think of.
> > Other than this approach, I haven\'t seen any ready to use driver for
> > this codec.
> >
> > -Jamie
> >
> >
> > ----- Original Message -----
> > From: <nprakash@cedt.iisc.ernet.in>
> > To: <jamiehl@mail.wsu.edu>
> > Sent: Friday, April 28, 2006 5:23 AM
> > Subject: XILINX board-Audio Codec-Linux driver support
> >
> >
> > > Jamie Lin,
> > > I could follow your doc and successfully ported the Linux in the
> > > board. I
> > just
> > > want to know how can I add the audio codec drivers in linux. I
> > > mean,
>
> > > I
> > couldnt
> > > see the Audio Codec in "Connected Peripherals" in Library & OS
",1] );  //--> > > and run libgen .....
> > Please clarify,
> >  Prakash
> >
> >
> > -----Original  Message-----
> > From: Jamie Lin [mailto:jamiehl@mail.wsu.edu]
> > Sent:  Monday, May 01, 2006 9:49 AM
> > To: Prakash N
> > Subject:  Re: XILINX board-Audio Codec-Linux driver support
> >
>  >
> > Prakash,
> >
> > The BSP only offers a limit  number of necessary drivers. You'll have
> > to write custom drivers on  your own if they're not included. One thing
>
> > you can do is  to use the sample IO driver I've written to replace
> > low
>  > level IOs in the Xilinx AC97 codec driver. This will take you some
>  > time, but is a way to adapt AC97 codec in Linux that I can think  of.
>  > Other than this approach, I haven't seen any ready to use  driver for
> > this codec.
> >
> > -Jamie
>  >
> >
> > ----- Original Message -----
> > From:  <nprakash@cedt.iisc.ernet.in>
>  > To: <jamiehl@mail.wsu.edu>
> >  Sent: Friday, April 28, 2006 5:23 AM
> > Subject: XILINX board-Audio  Codec-Linux driver support
> >
> >
> > > Jamie  Lin,
> > > I could follow your doc and successfully ported the Linux  in the
> > > board. I
> > just
> > > want to  know how can I add the audio codec drivers in linux. I
> > >  mean,
>
> > > I
> > couldnt
> > >  see the  Audio Codec in "Connected Peripherals" in Library & OS
 >
> > > see its there
> > with
> > > all version, base address... defined. How can I add this in that
> > > so
> > > that
> > thro\'
> > > libgen I can add drivers for that also.
> > > Regards
> > > Prakash

------------------------------------------------------------------------------------------------------------------------

I feel I\'d given whatever possible details, still If something is
missing, Please ask the same.
Prakash

",1] ); D(["mb","


--
N.Prakash
Bangalore
+919448787632


",0] );  D(["ma",[1,"2 attachments — Scanning for viruses...temp.zip
294K linuxaudio.zip
22K ","10bd14d0c40a4b1e"] ] );  //--> > > > parameters (software platform settings). But in the hardware I  could
>
> > > see its there
> > with
> >  > all version, base address... defined. How can I add this in that
>  > > so
> > > that
> > thro'
> > > libgen  I can add drivers for that also.
> > > Regards
>  > >  Prakash

---------------------------------------------------------------------------------------------------

I  feel I'd given whatever possible details, still If something is
missing,  Please ask the same.
N.Prakash
ME Final Year- Microelectronics
CEDT-IISc
Bangalore
India
 
 				
---------------------------------
  Yahoo! India Answers: Share what you know. Learn something new Click here
 Send free SMS to your Friends on Mobile from your Yahoo! Messenger Download now

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^ permalink raw reply

* Re: help requesting for mounting eldk tools on AMCC PPC 405EP Taihu kit
From: Wolfgang Denk @ 2006-06-18 20:49 UTC (permalink / raw)
  To: jagadeesh kalisetty; +Cc: linuxppc-dev
In-Reply-To: <20060618152344.13300.qmail@webmail18.rediffmail.com>

In message <20060618152344.13300.qmail@webmail18.rediffmail.com> you wrote:
> 
> but the kernel is failed to mount on /dev/nfs as below please can you
> provide necessary steps to fix the problem.
...
> => setenv setboot setenv bootargs root=/dev/pts nfsroot=192.168.2.18:/opt/eldk/ppc_4xx ip=192.168.1.62:::::eth0:off

What's /dev/pts? You mentioned you intended to use NFS as  root  file
system. Then I'd expect to see /dev/nfs here. [Note: 'n' != 'p']

> bootcmd=run setboot;bootm 0xfc000000 0xfc300000

You mentioned you intended to use NFS as root file system.  Then  why
do you use a ramdisk?

> ## Loading RAMDisk Image at fc300000 ...
>    Image Name:   Taihu Ramdisk
>    Image Type:   PowerPC Linux RAMDisk Image (gzip compressed)
>    Data Size:    15447973 Bytes = 14.7 MB

Your ramdisk image is much bigger than  the  default  maximum  kernel
ramdisk  size (4 MB). But you don't pass any ramdisk size information
with your boot arguments:

> Kernel command line: root=/dev/pts nfsroot=192.168.2.18:/opt/eldk/ppc_4xx ip=192.168.1.62:::::eth0:off

If you really want to use this  ramdisk,  you  should  set  the  root
device and the ramdisk size appropriately.

Best regards,

Wolfgang Denk

-- 
Software Engineering:  Embedded and Realtime Systems,  Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
NOTE: The  Most  Fundamental  Particles  in  This  Product  Are  Held
Together  by  a  "Gluing" Force About Which Little is Currently Known
and Whose Adhesive Power Can Therefore Not Be Permanently Guaranteed.

^ permalink raw reply

* help requesting for mounting eldk tools on AMCC PPC 405EP Taihu kit
From: jagadeesh kalisetty @ 2006-06-18 15:23 UTC (permalink / raw)
  To: linuxppc-dev

[-- Attachment #1: Type: text/plain, Size: 6439 bytes --]

hi

 I am using Taihu Amcc PPC 405EP kit it already contains the U-boot, Linux kernel image, and ramdisk image. I connected the kit using c-kermit on fedora core 4 and installed eldk tools and added it (/opt/eldk/ppc_4xx) to NFS sharing.
While booting on kit I passed kernel arguments as 
setenv bootargs root=/dev/nfs nfsroot=192.168.2.18:/opt/eldk/ppc_4xx ip=192.168.1.62:::::eth0:off

 but the kernel is failed to mount on /dev/nfs as below please can you provide necessary steps to fix the problem.
I am waiting for your response. 
    
……….after U-booting on kit…..
Hit any key to stop autoboot:  0
=> setenv setboot setenv bootargs root=/dev/pts nfsroot=192.168.2.18:/opt/eldk/ppc_4xx ip=192.168.1.62:::::eth0:off
=> printenv
bootdelay=5
baudrate=9600
filesize=ebb7e5
ethaddr=50:00:00:00:25:00
eth1addr=50:00:00:00:25:01
loads_echo=1
ethact=ppc_4xx_eth0
bootcmd=run setboot;bootm 0xfc000000 0xfc300000
kozio=bootm 0xffe00000
RT_eth0_ip=192.168.1.62
RT_eth0_ip2=:::::eth0:off
stdin=serial
stdout=serial
stderr=serial
ver=U-Boot 1.1.4 (Jan 19 2006 - 14:16:53)
setboot=setenv bootargs root=/dev/pts nfsroot=192.168.2.18:/opt/eldk/ppc_4xx ip=192.168.1.62:::::eth0:off

Environment size: 450/16379 bytes
=> boot
## Booting image at fc000000 ...
   Image Name:   Linux-2.6.13
   Image Type:   PowerPC Linux Kernel Image (gzip compressed)
   Data Size:    1121647 Bytes =  1.1 MB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
   Uncompressing Kernel Image ... OK
## Loading RAMDisk Image at fc300000 ...
   Image Name:   Taihu Ramdisk
   Image Type:   PowerPC Linux RAMDisk Image (gzip compressed)
   Data Size:    15447973 Bytes = 14.7 MB
   Load Address: 00000000
   Entry Point:  00000000
   Verifying Checksum ... OK
   Loading Ramdisk to 070e3000, end 07f9e7a5 ... OK
Linux version 2.6.13 (root@linux_box) (gcc version 4.0.0 (DENX ELDK 4.0 4.0.0)) #50 Tue Feb 7 09:07:24 CST 2006
AMCC PowerPC 405EP Taihu Platform
Built 1 zonelists
Kernel command line: root=/dev/pts nfsroot=192.168.2.18:/opt/eldk/ppc_4xx ip=192.168.1.62:::::eth0:off
PID hash table entries: 1024 (order: 10, 16384 bytes)
Dentry cache hash table entries: 32768 (order: 5, 131072 bytes)
Inode-cache hash table entries: 16384 (order: 4, 65536 bytes)
Memory: 112128k available (1916k kernel code, 452k data, 96k init, 0k highmem)
Mount-cache hash table entries: 512
checking if image is initramfs...it isn't (no cpio magic); looks like an initrd
Freeing initrd memory: 15085k freed
NET: Registered protocol family 16
PCI: Probing PCI hardware
JFFS2 version 2.2. (NAND) (C) 2001-2003 Red Hat, Inc.
Initializing Cryptographic API
Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ sharing enabled
ttyS0 at MMIO 0x0 (irq = 1) is a 16550A
ttyS1 at MMIO 0x0 (irq = 0) is a 16550A
io scheduler noop registered
io scheduler anticipatory registered
io scheduler deadline registered
io scheduler cfq registered
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
loop: loaded (max 8 devices)
mal0: Initialized, 4 tx channels, 2 rx channels
emac: IBM EMAC Ethernet driver, version 2.0
Maintained by Benjamin Herrenschmidt <benh@kernel.crashing.org>
eth0: IBM emac, MAC 50:00:00:00:25:00
eth0: Found Generic MII PHY (0x14)
eth1: IBM emac, MAC 50:00:00:00:25:01
eth1: Found Generic MII PHY (0x10)
e100: Intel(R) PRO/100 Network Driver, 3.4.8-k2-NAPI
e100: Copyright(c) 1999-2005 Intel Corporation
taihu: bootflash mapping: 200000 at ffe00000
AMCC Taihu Boot Flash: Found 1 x16 devices at 0x0 in 16-bit bank
 Amd/Fujitsu Extended Query Table at 0x0040
number of CFI chips: 1
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.
Creating 3 MTD partitions on "AMCC Taihu Boot Flash":
0x00000000-0x001a0000 : "kozio diags"
0x001a0000-0x001c0000 : "u-boot env"
0x001c0000-0x00200000 : "u-boot"
taihu: appflash mapping: 2000000 at fc000000
AMCC Taihu Application Flash: Found 2 x16 devices at 0x0 in 16-bit bank
 Amd/Fujitsu Extended Query Table at 0x0040
AMCC Taihu Application Flash: CFI does not contain boot bank location. Assuming top.
number of CFI chips: 1
cfi_cmdset_0002: Disabling erase-suspend-program due to code brokenness.
Creating 3 MTD partitions on "AMCC Taihu Application Flash":
0x00000000-0x00300000 : "kernel"
0x00300000-0x01d00000 : "initrd"
0x01d00000-0x02000000 : "jffs2"
Yenta: CardBus bridge found at 0000:00:07.0 [0000:0000]
Yenta: Enabling burst memory read transactions
Yenta: Using CSCINT to route CSC interrupts to PCI
Yenta: Routing CardBus interrupts to PCI
Yenta TI: socket 0000:00:07.0, mfunc 0x00001000, devctl 0x66
Yenta TI: socket 0000:00:07.0 probing PCI interrupt failed, trying to fix
Yenta TI: socket 0000:00:07.0 falling back to parallel PCI interrupts
Yenta TI: socket 0000:00:07.0 parallel PCI interrupts ok
eth0: Link is Up
eth0: Speed: 100, Full duplex.
Yenta: ISA IRQ mask 0x0000, PCI irq 26
Socket status: 30000087
pcmcia: parent PCI bridge I/O window: 0x0 - 0xffff
pcmcia: parent PCI bridge Memory window: 0x80000000 - 0xbfffffff
zero gadget: Gadget Zero, version: St Patrick's Day 2004
zero gadget: using pd12_udc, OUT ep1out-bulk IN ep2in-bulk
pd12_udc: registered gadget driver 'zero'
i2c /dev entries driver
IBM IIC driver v2.1
ibm-iic0: using standard (100 kHz) mode
NET: Registered protocol family 2
IP route cache hash table entries: 2048 (order: 1, 8192 bytes)
TCP established hash table entries: 8192 (order: 4, 65536 bytes)
TCP bind hash table entries: 8192 (order: 3, 32768 bytes)
TCP: Hash tables configured (established 8192 bind 8192)
TCP reno registered
TCP bic registered
NET: Registered protocol family 1
NET: Registered protocol family 17
NET: Registered protocol family 15
eth0: Link is Up
eth0: Speed: 100, Full duplex.
IP-Config: Guessing netmask 255.255.255.0
IP-Config: Complete:
      device=eth0, addr=192.168.1.62, mask=255.255.255.0, gw=255.255.255.255,
     host=192.168.1.62, domain=, nis-domain=(none),
     bootserver=255.255.255.255, rootserver=255.255.255.255, rootpath=
RAMDISK: Compressed image found at block 0
RAMDISK: incomplete write (-28 != 32768) 4194304
VFS: Cannot open root device "pts" or unknown-block(0,0)
Please append a correct "root=" boot option
Kernel panic - not syncing: VFS: Unable to mount root fs on unknown-block(0,0)
 <0>Rebooting in 180 seconds..<NULL>



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^ permalink raw reply

* Re: [PATCH 7/9 v3] Add 8641 Register space and IRQ definitions.
From: Kumar Gala @ 2006-06-18 14:31 UTC (permalink / raw)
  To: Jon Loeliger; +Cc: linuxppc-dev
In-Reply-To: <E1Frjet-0004PA-J1@jdl.com>


On Jun 17, 2006, at 5:52 PM, Jon Loeliger wrote:

[snip]

> diff --git a/include/asm-powerpc/mpc86xx.h b/include/asm-powerpc/ 
> mpc86xx.h
> new file mode 100644
> index 0000000..d0a6718
> --- /dev/null
> +++ b/include/asm-powerpc/mpc86xx.h
> @@ -0,0 +1,47 @@
> +/*
> + * MPC86xx definitions
> + *
> + * Author: Jeff Brown
> + *
> + * Copyright 2004 Freescale Semiconductor, Inc
> + *
> + * This program is free software; you can redistribute  it and/or  
> modify it
> + * under  the terms of  the GNU General  Public License as  
> published by the
> + * Free Software Foundation;  either version 2 of the  License, or  
> (at your
> + * option) any later version.
> + */
> +
> +#ifdef __KERNEL__
> +#ifndef __ASM_POWERPC_MPC86xx_H__
> +#define __ASM_POWERPC_MPC86xx_H__
> +
> +#include <linux/config.h>
> +#include <asm/mmu.h>
> +
> +#ifdef CONFIG_PPC_86xx
> +
> +#ifdef CONFIG_MPC8641_HPCN
> +#include <platforms/86xx/mpc8641_hpcn.h>
> +#endif
>

Is this really needed, its a hold over from arch/ppc.  I dont think  
you need anything defined in mpc8641_hpcn.h.  This always created  
funny dependancies and would be nice to get ride of.

> +
> +#define _IO_BASE        isa_io_base
> +#define _ISA_MEM_BASE   isa_mem_base
> +#ifdef CONFIG_PCI
> +#define PCI_DRAM_OFFSET pci_dram_offset
> +#else
> +#define PCI_DRAM_OFFSET 0
> +#endif
> +
> +#define CPU0_BOOT_RELEASE 0x01000000
> +#define CPU1_BOOT_RELEASE 0x02000000
> +#define CPU_ALL_RELEASED (CPU0_BOOT_RELEASE | CPU1_BOOT_RELEASE)
> +#define MCM_PORT_CONFIG_OFFSET 0x1010
> +
> +/* Offset from CCSRBAR */
> +#define MPC86xx_OPENPIC_OFFSET	(0x40000)
> +#define MPC86xx_MCM_OFFSET      (0x00000)
> +#define MPC86xx_MCM_SIZE        (0x02000)
> +
> +#endif /* CONFIG_PPC_86xx */
> +#endif /* __ASM_POWERPC_MPC86xx_H__ */
> +#endif /* __KERNEL__ */
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

^ permalink raw reply

* Re: [PATCH 5/9 v3] Add the MPC8641 HPCN platform files.
From: Kumar Gala @ 2006-06-18 14:28 UTC (permalink / raw)
  To: Jon Loeliger; +Cc: linuxppc-dev
In-Reply-To: <E1Frjen-0004Oz-Hz@jdl.com>


On Jun 17, 2006, at 5:52 PM, Jon Loeliger wrote:

> Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
> Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com>
> Signed-off-by: Jon Loeliger <jdl@freescale.com>
>
> ---
>
>  arch/powerpc/platforms/86xx/mpc8641_hpcn.h |   54 +++++
>  arch/powerpc/platforms/86xx/mpc86xx.h      |   28 ++
>  arch/powerpc/platforms/86xx/mpc86xx_hpcn.c |  326 +++++++++++++++++ 
> +++++++++++
>  arch/powerpc/platforms/86xx/mpc86xx_smp.c  |  117 ++++++++++
>  4 files changed, 525 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/ 
> powerpc/platforms/86xx/mpc8641_hpcn.h
> new file mode 100644
> index 0000000..5042253
> --- /dev/null
> +++ b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
> @@ -0,0 +1,54 @@
> +/*
> + * MPC8641 HPCN board definitions
> + *
> + * Copyright 2006 Freescale Semiconductor Inc.
> + *
> + * This program is free software; you can redistribute  it and/or  
> modify it
> + * under  the terms of  the GNU General  Public License as  
> published by the
> + * Free Software Foundation;  either version 2 of the  License, or  
> (at your
> + * option) any later version.
> + *
> + * Author: Xianghua Xiao <x.xiao@freescale.com>
> + */
> +
> +#ifndef __MPC8641_HPCN_H__
> +#define __MPC8641_HPCN_H__
> +
> +#include <linux/config.h>
> +#include <linux/init.h>
> +
> +/* PCI interrupt controller */
> +#define PIRQA		3
> +#define PIRQB		4
> +#define PIRQC		5
> +#define PIRQD		6
> +#define PIRQ7		7
> +#define PIRQE		9
> +#define PIRQF		10
> +#define PIRQG		11
> +#define PIRQH		12
> +
> +/* PCI-Express memory map */
> +#define MPC86XX_PCIE_LOWER_IO        0x00000000
> +#define MPC86XX_PCIE_UPPER_IO        0x00ffffff
> +
> +#define MPC86XX_PCIE_LOWER_MEM       0x80000000
> +#define MPC86XX_PCIE_UPPER_MEM       0x9fffffff
> +
> +#define MPC86XX_PCIE_IO_BASE         0xe2000000
> +#define MPC86XX_PCIE_MEM_OFFSET      0x00000000
> +
> +#define MPC86XX_PCIE_IO_SIZE         0x01000000
> +
> +#define PCIE1_CFG_ADDR_OFFSET    (0x8000)
> +#define PCIE1_CFG_DATA_OFFSET    (0x8004)
> +
> +#define PCIE2_CFG_ADDR_OFFSET    (0x9000)
> +#define PCIE2_CFG_DATA_OFFSET    (0x9004)
> +
> +#define MPC86xx_PCIE_OFFSET PCIE1_CFG_ADDR_OFFSET
> +#define MPC86xx_PCIE_SIZE	(0x1000)
> +
> +#define MPC86XX_RSTCR_OFFSET	(0xe00b0)	/* Reset Control Register */
> +
> +#endif	/* __MPC8641_HPCN_H__ */
> diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/ 
> platforms/86xx/mpc86xx.h
> new file mode 100644
> index 0000000..e3c9e4f
> --- /dev/null
> +++ b/arch/powerpc/platforms/86xx/mpc86xx.h
> @@ -0,0 +1,28 @@
> +/*
> + * Copyright 2006 Freescale Semiconductor Inc.
> + *
> + * This program is free software; you can redistribute  it and/or  
> modify it
> + * under  the terms of  the GNU General  Public License as  
> published by the
> + * Free Software Foundation;  either version 2 of the  License, or  
> (at your
> + * option) any later version.
> + */
> +
> +#ifndef __MPC86XX_H__
> +#define __MPC86XX_H__
> +
> +/*
> + * Declaration for the various functions exported by the
> + * mpc86xx_* files. Mostly for use by mpc86xx_setup().
> + */
> +
> +extern int __init add_bridge(struct device_node *dev);
> +
> +extern void __init setup_indirect_pcie(struct pci_controller *hose,
> +				       u32 cfg_addr, u32 cfg_data);
> +extern void __init setup_indirect_pcie_nomap(struct pci_controller  
> *hose,
> +					     void __iomem *cfg_addr,
> +					     void __iomem *cfg_data);
> +
> +extern void __init mpc86xx_smp_init(void);
> +
> +#endif	/* __MPC86XX_H__ */
> diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/ 
> powerpc/platforms/86xx/mpc86xx_hpcn.c
> new file mode 100644
> index 0000000..483c21d
> --- /dev/null
> +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
> @@ -0,0 +1,326 @@
> +/*
> + * MPC86xx HPCN board specific routines
> + *
> + * Recode: ZHANG WEI <wei.zhang@freescale.com>
> + * Initial author: Xianghua Xiao <x.xiao@freescale.com>
> + *
> + * Copyright 2006 Freescale Semiconductor Inc.
> + *
> + * This program is free software; you can redistribute  it and/or  
> modify it
> + * under  the terms of  the GNU General  Public License as  
> published by the
> + * Free Software Foundation;  either version 2 of the  License, or  
> (at your
> + * option) any later version.
> + */
> +
> +#include <linux/config.h>
> +#include <linux/stddef.h>
> +#include <linux/kernel.h>
> +#include <linux/pci.h>
> +#include <linux/kdev_t.h>
> +#include <linux/delay.h>
> +#include <linux/seq_file.h>
> +#include <linux/root_dev.h>
> +
> +#include <asm/system.h>
> +#include <asm/time.h>
> +#include <asm/machdep.h>
> +#include <asm/pci-bridge.h>
> +#include <asm/mpc86xx.h>
> +#include <asm/prom.h>
> +#include <mm/mmu_decl.h>
> +#include <asm/udbg.h>
> +#include <asm/i8259.h>
> +
> +#include <asm/mpic.h>
> +
> +#include <sysdev/fsl_soc.h>
> +
> +#include "mpc86xx.h"
> +
> +#ifndef CONFIG_PCI
> +unsigned long isa_io_base = 0;
> +unsigned long isa_mem_base = 0;
> +unsigned long pci_dram_offset = 0;
> +#endif
> +
> +
> +/*
> + * Internal interrupts are all Level Sensitive, and Positive Polarity
> + */
> +
> +static u_char mpc86xx_hpcn_openpic_initsenses[] __initdata = {
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  0:  
> Reserved */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  1: MCM */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  2: DDR  
> DRAM */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  3: LBIU */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  4: DMA 0 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  5: DMA 1 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  6: DMA 2 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  7: DMA 3 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  8: PCIE1 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal  9: PCIE2 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 10:  
> Reserved */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 11:  
> Reserved */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 12: DUART2 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 13: TSEC 1  
> Transmit */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 14: TSEC 1  
> Receive */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 15: TSEC 3  
> transmit */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 16: TSEC 3  
> receive */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 17: TSEC 3  
> error */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 18: TSEC 1  
> Receive/Transmit Error */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 19: TSEC 2  
> Transmit */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 20: TSEC 2  
> Receive */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 21: TSEC 4  
> transmit */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 22: TSEC 4  
> receive */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 23: TSEC 4  
> error */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 24: TSEC 2  
> Receive/Transmit Error */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 25: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 26: DUART1 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 27: I2C */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 28:  
> Performance Monitor */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 29: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 30: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 31: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 32: SRIO  
> error/write-port unit */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 33: SRIO  
> outbound doorbell */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 34: SRIO  
> inbound doorbell */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 35: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 36: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 37: SRIO  
> outbound message unit 1 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 38: SRIO  
> inbound message unit 1 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 39: SRIO  
> outbound message unit 2 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 40: SRIO  
> inbound message unit 2 */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 41: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 42: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 43: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 44: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 45: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 46: Unused */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* Internal 47: Unused */
> +	0x0,						/* External  0: */
> +	0x0,						/* External  1: */
> +	0x0,						/* External  2: */
> +	0x0,						/* External  3: */
> +	0x0,						/* External  4: */
> +	0x0,						/* External  5: */
> +	0x0,						/* External  6: */
> +	0x0,						/* External  7: */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External  8: Pixis  
> FPGA */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE),	/* External  9: ULI  
> 8259 INTR Cascade */
> +	(IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE),	/* External 10: Quad  
> ETH PHY */
> +	0x0,						/* External 11: */
> +	0x0,
> +	0x0,
> +	0x0,
> +	0x0,
> +};
> +
> +
> +void __init
> +mpc86xx_hpcn_init_irq(void)
> +{
> +	struct mpic *mpic1;
> +	phys_addr_t openpic_paddr;
> +
> +	/* Determine the Physical Address of the OpenPIC regs */
> +	openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET;
> +
> +	/* Alloc mpic structure and per isu has 16 INT entries. */
> +	mpic1 = mpic_alloc(openpic_paddr,
> +			MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
> +			16, MPC86xx_OPENPIC_IRQ_OFFSET, 0, 250,
> +			mpc86xx_hpcn_openpic_initsenses,
> +			sizeof(mpc86xx_hpcn_openpic_initsenses),
> +			" MPIC     ");
> +	BUG_ON(mpic1 == NULL);
> +
> +	/* 48 Internal Interrupts */
> +	mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10200);
> +	mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10400);
> +	mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10600);
> +
> +	/* 16 External interrupts */
> +	mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10000);
> +
> +	mpic_init(mpic1);
> +
> +#ifdef CONFIG_PCI
> +	mpic_setup_cascade(MPC86xx_IRQ_EXT9, i8259_irq_cascade, NULL);
> +	i8259_init(0, I8259_OFFSET);
> +#endif
> +}
> +
> +
> +
> +#ifdef CONFIG_PCI
> +/*
> + * interrupt routing
> + */
> +
> +int
> +mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned  
> char pin)
> +{
> +	static char pci_irq_table[][4] = {
> +		/*
> +		 *      PCI IDSEL/INTPIN->INTLINE
> +		 *       A      B      C      D
> +		 */
> +		{PIRQA, PIRQB, PIRQC, PIRQD},   /* IDSEL 17 -- PCI Slot 1 */
> +		{PIRQB, PIRQC, PIRQD, PIRQA},	/* IDSEL 18 -- PCI Slot 2 */
> +		{0, 0, 0, 0},			/* IDSEL 19 */
> +		{0, 0, 0, 0},			/* IDSEL 20 */
> +		{0, 0, 0, 0},			/* IDSEL 21 */
> +		{0, 0, 0, 0},			/* IDSEL 22 */
> +		{0, 0, 0, 0},			/* IDSEL 23 */
> +		{0, 0, 0, 0},			/* IDSEL 24 */
> +		{0, 0, 0, 0},			/* IDSEL 25 */
> +		{PIRQD, PIRQA, PIRQB, PIRQC},	/* IDSEL 26 -- PCI Bridge*/
> +		{PIRQC, 0, 0, 0},		/* IDSEL 27 -- LAN */
> +		{PIRQE, PIRQF, PIRQH, PIRQ7},	/* IDSEL 28 -- USB 1.1 */
> +		{PIRQE, PIRQF, PIRQG, 0},	/* IDSEL 29 -- Audio & Modem */
> +		{PIRQH, 0, 0, 0},		/* IDSEL 30 -- LPC & PMU*/
> +		{PIRQD, 0, 0, 0},		/* IDSEL 31 -- ATA */
> +	};
> +
> +	const long min_idsel = 17, max_idsel = 31, irqs_per_slot = 4;
> +	return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET;
> +}
> +
> +
> +int
> +mpc86xx_exclude_device(u_char bus, u_char devfn)
> +{
> +#if !defined(CONFIG_PCI)
> +	if (bus == 0 && PCI_SLOT(devfn) == 0)
> +		return PCIBIOS_DEVICE_NOT_FOUND;
> +#endif
> +
> +	return PCIBIOS_SUCCESSFUL;
> +}

any reason not to put this in pci.c its generic enough.  Also, loose  
the #if, its pointless ;)

> +#endif /* CONFIG_PCI */
> +
> +
> +static void __init
> +mpc86xx_hpcn_setup_arch(void)
> +{
> +	struct device_node *np;
> +
> +	if (ppc_md.progress)
> +		ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
> +
> +	np = of_find_node_by_type(NULL, "cpu");
> +	if (np != 0) {
> +		unsigned int *fp;
> +
> +		fp = (int *)get_property(np, "clock-frequency", NULL);
> +		if (fp != 0)
> +			loops_per_jiffy = *fp / HZ;
> +		else
> +			loops_per_jiffy = 50000000 / HZ;
> +		of_node_put(np);
> +	}
> +
> +#ifdef CONFIG_PCI
> +	for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
> +		add_bridge(np);
> +
> +	ppc_md.pci_swizzle = common_swizzle;
> +	ppc_md.pci_map_irq = mpc86xx_map_irq;
> +	ppc_md.pci_exclude_device = mpc86xx_exclude_device;
> +#endif
> +
> +	printk("MPC86xx HPCN board from Freescale Semiconductor\n");
> +
> +#ifdef  CONFIG_ROOT_NFS
> +	ROOT_DEV = Root_NFS;
> +#else
> +	ROOT_DEV = Root_HDA1;
> +#endif
> +
> +#ifdef CONFIG_SMP
> +	mpc86xx_smp_init();
> +#endif
> +}
> +
> +
> +void
> +mpc86xx_hpcn_show_cpuinfo(struct seq_file *m)
> +{
> +	struct device_node *root;
> +	uint memsize = total_memory;
> +	const char *model = "";
> +	uint svid = mfspr(SPRN_SVR);
> +
> +	seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
> +
> +	root = of_find_node_by_path("/");
> +	if (root)
> +		model = get_property(root, "model", NULL);
> +	seq_printf(m, "Machine\t\t: %s\n", model);
> +	of_node_put(root);
> +
> +	seq_printf(m, "SVR\t\t: 0x%x\n", svid);
> +	seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
> +}
> +
> +
> +/*
> + * Called very early, device-tree isn't unflattened
> + */
> +static int __init mpc86xx_hpcn_probe(void)
> +{
> +	unsigned long root = of_get_flat_dt_root();
> +
> +	if (of_flat_dt_is_compatible(root, "mpc86xx"))
> +		return 1;	/* Looks good */
> +
> +	return 0;
> +}

You should make this probe actually check model or something more  
specific than mpc86xx.  I didn't do this on 85xx or 83xx since we had  
pre-existing .dts that didn't setup model in a consistent way.

> +
> +
> +void
> +mpc86xx_restart(char *cmd)
> +{
> +	void __iomem *rstcr;
> +
> +	rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
> +
> +	local_irq_disable();
> +
> +	/* Assert reset request to Reset Control Register */
> +	out_be32(rstcr, 0x2);
> +
> +	/* not reached */
> +}
> +
> +
> +long __init
> +mpc86xx_time_init(void)
> +{
> +	unsigned int temp;
> +
> +	/* Set the time base to zero */
> +	mtspr(SPRN_TBWL, 0);
> +	mtspr(SPRN_TBWU, 0);
> +
> +	temp = mfspr(SPRN_HID0);
> +	temp |= HID0_TBEN;
> +	mtspr(SPRN_HID0, temp);
> +	asm volatile("isync");
> +
> +	return 0;
> +}
> +
> +
> +define_machine(mpc86xx_hpcn) {
> +	.name			= "MPC86xx HPCN",
> +	.probe			= mpc86xx_hpcn_probe,
> +	.setup_arch		= mpc86xx_hpcn_setup_arch,
> +	.init_IRQ		= mpc86xx_hpcn_init_irq,
> +	.show_cpuinfo		= mpc86xx_hpcn_show_cpuinfo,
> +	.get_irq		= mpic_get_irq,
> +	.restart		= mpc86xx_restart,
> +	.time_init		= mpc86xx_time_init,
> +	.calibrate_decr		= generic_calibrate_decr,
> +	.progress		= udbg_progress,
> +};
> diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/ 
> powerpc/platforms/86xx/mpc86xx_smp.c
> new file mode 100644
> index 0000000..944ec4b
> --- /dev/null
> +++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c

a nit, but any reason to not call this just smp.c?

> @@ -0,0 +1,117 @@
> +/*
> + * Author: Xianghua Xiao <x.xiao@freescale.com>
> + *         Zhang Wei <wei.zhang@freescale.com>
> + *
> + * Copyright 2006 Freescale Semiconductor Inc.
> + *
> + * This program is free software; you can redistribute  it and/or  
> modify it
> + * under  the terms of  the GNU General  Public License as  
> published by the
> + * Free Software Foundation;  either version 2 of the  License, or  
> (at your
> + * option) any later version.
> + */
> +
> +#include <linux/config.h>
> +#include <linux/stddef.h>
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/delay.h>
> +
> +#include <asm/pgtable.h>
> +#include <asm/page.h>
> +#include <asm/pci-bridge.h>
> +#include <asm-powerpc/mpic.h>
> +#include <asm/mpc86xx.h>
> +#include <asm/cacheflush.h>
> +
> +#include <sysdev/fsl_soc.h>
> +
> +#include "mpc86xx.h"
> +
> +extern void __secondary_start_mpc86xx(void);
> +extern unsigned long __secondary_hold_acknowledge;
> +
> +
> +static void __init
> +smp_86xx_release_core(int nr)
> +{
> +	void *mcm_vaddr;
> +	unsigned long vaddr, pcr;
> +
> +	if (nr < 0 || nr >= NR_CPUS)
> +		return;
> +
> +	/*
> +	 * Startup Core #nr.
> +	 */
> +	mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
> +			    MPC86xx_MCM_SIZE);
> +	vaddr = (unsigned long)mcm_vaddr +  MCM_PORT_CONFIG_OFFSET;
> +	pcr = in_be32((volatile unsigned *)vaddr);
> +	pcr |= 1 << (nr + 24);
> +	out_be32((volatile unsigned *)vaddr, pcr);
> +}
> +
> +
> +static void __init
> +smp_86xx_kick_cpu(int nr)
> +{
> +	unsigned int save_vector;
> +	unsigned long target, flags;
> +	int n = 0;
> +	volatile unsigned int *vector
> +		 = (volatile unsigned int *)(KERNELBASE + 0x100);
> +
> +	if (nr < 0 || nr >= NR_CPUS)
> +		return;
> +
> +	pr_debug("smp_86xx_kick_cpu: kick CPU #%d\n", nr);
> +
> +	local_irq_save(flags);
> +	local_irq_disable();
> +
> +	/* Save reset vector */
> +	save_vector = *vector;
> +
> +	/* Setup fake reset vector to call __secondary_start_mpc86xx. */
> +	target = (unsigned long) __secondary_start_mpc86xx;
> +	create_branch((unsigned long)vector, target, BRANCH_SET_LINK);
> +
> +	/* Kick that CPU */
> +	smp_86xx_release_core(nr);
> +
> +	/* Wait a bit for the CPU to take the exception. */
> +	while ((__secondary_hold_acknowledge != nr) && (n++, n < 1000))
> +		mdelay(1);
> +
> +	/* Restore the exception vector */
> +	*vector = save_vector;
> +	flush_icache_range((unsigned long) vector, (unsigned long) vector  
> + 4);
> +
> +	local_irq_restore(flags);
> +
> +	pr_debug("wait CPU #%d for %d msecs.\n", nr, n);
> +}
> +
> +
> +static void __init
> +smp_86xx_setup_cpu(int cpu_nr)
> +{
> +	mpic_setup_this_cpu();
> +}
> +
> +
> +struct smp_ops_t smp_86xx_ops = {
> +	.message_pass = smp_mpic_message_pass,
> +	.probe = smp_mpic_probe,
> +	.kick_cpu = smp_86xx_kick_cpu,
> +	.setup_cpu = smp_86xx_setup_cpu,
> +	.take_timebase = smp_generic_take_timebase,
> +	.give_timebase = smp_generic_give_timebase,
> +};
> +
> +
> +void __init
> +mpc86xx_smp_init(void)
> +{
> +	smp_ops = &smp_86xx_ops;
> +}
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

^ permalink raw reply

* Re: [PATCH 0/9 v3] Introduce the MPC8641 HPCN platform
From: Kumar Gala @ 2006-06-18 14:23 UTC (permalink / raw)
  To: Jon Loeliger; +Cc: linuxppc-dev
In-Reply-To: <E1Frjec-0004Oc-Ou@jdl.com>


On Jun 17, 2006, at 5:52 PM, Jon Loeliger wrote:

>
> This is the third posting of a series of patches
> that introduces the MPC8641 HPCN platform.  This
> version corrects all of the suggestions from Kumar,
> and shows an ACK from Jeff Garzik for the netdev
> related parts.  It also addresses all of the problems
> that Ben brought up related to multi-platform issues.
> It does not use IRQ settings from the device tree yet;
> that will come as a follow on patch when Ben's IRQ
> rewrite is more solid.
>
> Please consider this for addition into the 2.6.18 queue.

General question, have you run these patches through sparse?

>
> Collectively:
>
> Signed-off-by: Jon Loeliger <jdl@freescale.com>
> Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
> Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com>
> Signed-off-by: Jeff Brown <Jeff.Brown@freescale.com>
> Signed-off-by: Kriston Carson <KristonCarson@freescale.com>
> Acked-by: Jeff Garzik <jeff@garzik.org>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

^ permalink raw reply

* Re: [PATCH 3/9 v3] Add 8641 CPU table entry.
From: Kumar Gala @ 2006-06-18 14:16 UTC (permalink / raw)
  To: Jon Loeliger; +Cc: linuxppc-dev
In-Reply-To: <E1Frjei-0004Oq-Ot@jdl.com>


On Jun 17, 2006, at 5:52 PM, Jon Loeliger wrote:

> Signed-off-by: Wei Zhang <Wei.Zhang@freescale.com>
> Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
> Signed-off-by: Jon Loeliger <jdl@freescale.com>
>
> ---
>
>  arch/powerpc/kernel/cputable.c |   12 ++++++++++++
>  1 files changed, 12 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/ 
> cputable.c
> index abf7d42..1c11488 100644
> --- a/arch/powerpc/kernel/cputable.c
> +++ b/arch/powerpc/kernel/cputable.c
> @@ -722,6 +722,18 @@ #if CLASSIC_PPC
>  		.oprofile_type		= PPC_OPROFILE_G4,
>  		.platform		= "ppc7450",
>  	},
> +        {       /* 8641 */
> +               .pvr_mask               = 0xffffffff,
> +               .pvr_value              = 0x80040010,
> +               .cpu_name               = "8641",
> +               .cpu_features           = CPU_FTRS_7447A,
> +               .cpu_user_features      = COMMON_USER |  
> PPC_FEATURE_HAS_ALTIVEC_COMP,
> +               .icache_bsize           = 32,
> +               .dcache_bsize           = 32,
> +               .num_pmcs               = 6,
> +               .cpu_setup              = __setup_cpu_745x
> +        },
> +

is this really needed?  Based on the PVR you'd match the 7448 entry  
which seems identical (beyond the name, which is irrelevant)?  [also  
your missing oprofile & platform info]

>  	{	/* 82xx (8240, 8245, 8260 are all 603e cores) */
>  		.pvr_mask		= 0x7fff0000,
>  		.pvr_value		= 0x00810000,
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

^ permalink raw reply


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