* Re: CROSS_COMPILE - namespace collision
From: Wolfgang Denk @ 2006-06-28 20:14 UTC (permalink / raw)
To: Lee Revell; +Cc: linuxppc-embedded
In-Reply-To: <1151515702.15513.40.camel@mindpipe>
Dear Lee,
in message <1151515702.15513.40.camel@mindpipe> you wrote:
> I have not been able to get readline 5.1 to compile with the ELDK - it
Did you read the documentation?
> I can make it work with a hack, but I thought this might be interesting
> info.
Please see section "3.7.2. Rebuilding Target Packages" in the manual,
http://www.denx.de/wiki/view/DULG/ELDKRebuildingComponents#Section_3.7.2.
It describes clearly what needs to be done to build target packages.
Also note that readline already comes as part of the ELDK, so you
probably might just use the existing code.
Please RTFM.
Best regards,
Wolfgang Denk
--
Software Engineering: Embedded and Realtime Systems, Embedded Linux
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
Sometimes a feeling is all we humans have to go on.
-- Kirk, "A Taste of Armageddon", stardate 3193.9
^ permalink raw reply
* Re: no login prompt with ml403 + uartlite-->major numbers?
From: T Ziomek @ 2006-06-28 20:14 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <mailman.1193.1151524639.11183.linuxppc-embedded@ozlabs.org>
> On 6/28/06, Robert Zach <rza1@so-logic.co.at> wrote:
>> Hello!
>>
>> I use the "Standart" ml403 Design with the uartlite instead of the
>> uart16550...
>>
>> my kernel parameters are:
>> "console=ttl0 ip=off root=/dev/xsysace/disc0/part3 rw"
>>
>> It boots correctly, but i got no login prompt!!
>> getty is started with init.
>> my inittab looks like:
>> ...
>> ::respawn:/sbin/getty 9600 ttl0
At a lower level...are you keeping in mind that the UART-Lite baud rate (and
probably parity, stop bits, # of data bits) is set in hardware? So any at-
tempt to specify settings in software (e.g. your 'getty' line above, or on
the kernel cmd line) have no effect. If your console isn't set to match the
UART-Lite's hardware settings you're going to see gibberish, or nothing.
Tom
--
/"\ ASCII Ribbon Campaign |
\ / | Email to user 'CTZ001'
X Against HTML | at 'email.mot.com'
/ \ in e-mail & news |
^ permalink raw reply
* Re: Re: [Alsa-devel] RFC: dma_mmap_coherent() for powerpc/ppc architecture and ALSA?
From: Gerhard Pircher @ 2006-06-28 20:27 UTC (permalink / raw)
To: Takashi Iwai; +Cc: linuxppc-dev, rlrevell, alsa-devel, linux-kernel
Hi,
It took a little bit longer to integrate the patch, as I didn't figure out first how to implement the __dma_mmap_coherent() function for PPC systems with CONFIG_NOT_COHERENT_CACHE defined. :)
Unfortunately my system still crashes within snd_pcm_mmap_data_nopage()
(sound/core/pcm_native.c), as you can see below. I guess it tries to remap
a DMA buffer allocated by the not cache coherent DMA memory allocation
function in arch/ppc/kernel/dma-mapping.c.
Jun 28 21:59:30 localhost kernel: [ 199.869609] Using dma_mmap_coherent for mmaping DMA buffer!
Jun 28 21:59:30 localhost kernel: [ 199.925075] Oops: kernel access of bad area, sig: 11 [#1]
Jun 28 21:59:30 localhost kernel: [ 199.925106] NIP: E226FF44 LR: E226FF94 CTR: E226FEA4
Jun 28 21:59:30 localhost kernel: [ 199.925116] REGS: d2577d30 TRAP: 0600 Not tainted (2.6.16.16-a1-2)
Jun 28 21:59:30 localhost kernel: [ 199.925121] MSR: 00009032 <EE,ME,IR,DR> CR: 44048444 XER: 00000000
Jun 28 21:59:30 localhost kernel: [ 199.925134] DAR: 99A9999D, DSISR: 00000120
Jun 28 21:59:30 localhost kernel: [ 199.925140] TASK = d242cd10[4338] 'totem' THREAD: d2576000
Jun 28 21:59:30 localhost kernel: [ 199.925144] GPR00: 99A9999D D2577DE0 D242CD10 C0C826A0 00000000 D2577E08 D275F000 D36DC328
Jun 28 21:59:30 localhost kernel: [ 199.925158] GPR08: 02000000 00004000 00000000 99A99999 84048444 10054698 00000000 10196A58
Jun 28 21:59:30 localhost kernel: [ 199.925172] GPR16: 00000000 00000000 00000000 D36DC328 02000000 329FE000 00000000 00000000
Jun 28 21:59:30 localhost kernel: [ 199.925184] GPR24: DE5A6B20 DFA63C80 329FE000 DFA63C80 D20AD804 D275F7F8 D2576000 D2577E08
Jun 28 21:59:30 localhost kernel: [ 199.925199] NIP [E226FF44] snd_pcm_mmap_data_nopage+0xa0/0x12c [snd_pcm]
Jun 28 21:59:30 localhost kernel: [ 199.925300] LR [E226FF94] snd_pcm_mmap_data_nopage+0xf0/0x12c [snd_pcm]
Jun 28 21:59:30 localhost kernel: [ 199.925325] Call Trace:
Jun 28 21:59:30 localhost kernel: [ 199.925330] [D2577DE0] [C0010050] update_mmu_cache+0xe4/0xf4 (unreliable)
Jun 28 21:59:30 localhost kernel: [ 199.925361] [D2577E00] [C004F1D8] do_no_page+0xa4/0x6a4
Jun 28 21:59:30 localhost kernel: [ 199.925387] [D2577E60] [C004FA24] __handle_mm_fault+0x12c/0x328
Jun 28 21:59:30 localhost kernel: [ 199.925398] [D2577E90] [C000F740] do_page_fault+0x140/0x384
Jun 28 21:59:30 localhost kernel: [ 199.925407] [D2577F40] [C0004AC0] handle_page_fault+0xc/0x80
Jun 28 21:59:30 localhost kernel: [ 199.925423] Instruction dump:
Jun 28 21:59:30 localhost kernel: [ 199.925427] 812a0218 3d60c038 800b938c 7d292214 3d294000 5529c9f4 7c604a14 80030000
Jun 28 21:59:30 localhost kernel: [ 199.925441] 7c6b1b78 70094000 40820044 380b0004 <7d200028> 31290001 7d20012d 40a2fff4
Comments?
Thanks!
Gerhard
-------- Original-Nachricht --------
Datum: Wed, 14 Jun 2006 16:42:48 +0200
Von: Takashi Iwai <tiwai@suse.de>
An: Gerhard Pircher <gerhard_pircher@gmx.net>
Betreff: Re: [Alsa-devel] RFC: dma_mmap_coherent() for powerpc/ppc architecture and ALSA?
> At Mon, 12 Jun 2006 16:42:54 +0200,
> Gerhard Pircher wrote:
> >
> > > > But as far as I understand this would require a rewrite of all the
> > > > ALSA drivers (or at least a rewrite of the ALSA's DMA helper
> > > > functions).
> > >
> > > Yes. The change of ALSA side has been also on my tree. But it was
> > > still pending since I'm not satisfied with the design yet.
> > > If you're interested in it, let me know. I'll post the patch.
> >
> > Yes, please! Then I can test, if the dma_mmap_coherent() patch works on
> > my non cache coherent powerpc machine.
>
> For using dma_mmap_coherent(), the patch below should suffice.
> (Also you need to enable HAVE_DMA_MMAP_COHERENT there not only for
> ARM.)
>
> > Do you think the DMA Layer/ALSA patches will go upstream in one of
> > the next ALSA/Linux kernel versions?
>
> Definitely no 2.6.18 material yet.
>
>
> Takashi
--
Echte DSL-Flatrate dauerhaft für 0,- Euro*!
"Feel free" mit GMX DSL! http://www.gmx.net/de/go/dsl
^ permalink raw reply
* [PATCH] todc: add support for Time-Of-Day-Clock
From: Mark A. Greer @ 2006-06-28 21:13 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
This is a resubmit with a proper subject and with all comments addressed.
Applies cleanly to powerpc.git 649e85797259162f7fdc696420e7492f20226f2d
Mark
--
The todc code from arch/ppc supports many todc/rtc chips and is needed
in arch/powerpc. This patch adds the todc code to arch/powerpc.
Signed-off-by: Mark A. Greer <mgreer@mvista.com>
--
arch/powerpc/Kconfig | 7
arch/powerpc/sysdev/Makefile | 1
arch/powerpc/sysdev/todc.c | 392 ++++++++++++++++++++++++++++++++++
include/asm-powerpc/todc.h | 487 +++++++++++++++++++++++++++++++++++++++++++
4 files changed, 887 insertions(+)
--
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a4dad6e..b1dcdbd 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -562,6 +562,13 @@ config TAU_AVERAGE
/proc/cpuinfo.
If in doubt, say N here.
+
+config PPC_TODC
+ depends on EMBEDDED6xx
+ bool "Generic Time-of-day Clock (TODC) support"
+ ---help---
+ This adds support for many TODC/RTC chips.
+
endmenu
source arch/powerpc/platforms/embedded6xx/Kconfig
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index cef95b0..8b0dd5f 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -12,3 +12,4 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
obj-$(CONFIG_PPC_83xx) += ipic.o
obj-$(CONFIG_FSL_SOC) += fsl_soc.o
+obj-$(CONFIG_PPC_TODC) += todc.o
diff --git a/arch/powerpc/sysdev/todc.c b/arch/powerpc/sysdev/todc.c
new file mode 100644
index 0000000..0a65980
--- /dev/null
+++ b/arch/powerpc/sysdev/todc.c
@@ -0,0 +1,392 @@
+/*
+ * Time of Day Clock support for the M48T35, M48T37, M48T59, and MC146818
+ * Real Time Clocks/Timekeepers.
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2001-2004 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/time.h>
+#include <linux/timex.h>
+#include <linux/bcd.h>
+#include <linux/mc146818rtc.h>
+
+#include <asm/machdep.h>
+#include <asm/io.h>
+#include <asm/time.h>
+#include <asm/todc.h>
+
+/*
+ * Depending on the hardware on your board and your board design, the
+ * RTC/NVRAM may be accessed either directly (like normal memory) or via
+ * address/data registers. If your board uses the direct method, set
+ * 'nvram_data' to the base address of your nvram and leave 'nvram_as0' and
+ * 'nvram_as1' NULL. If your board uses address/data regs to access nvram,
+ * set 'nvram_as0' to the address of the lower byte, set 'nvram_as1' to the
+ * address of the upper byte (leave NULL if using mc146818), and set
+ * 'nvram_data' to the address of the 8-bit data register.
+ *
+ * Note: Even though the documentation for the various RTC chips say that it
+ * take up to a second before it starts updating once the 'R' bit is
+ * cleared, they always seem to update even though we bang on it many
+ * times a second. This is true, except for the Dallas Semi 1746/1747
+ * (possibly others). Those chips seem to have a real problem whenever
+ * we set the 'R' bit before reading them, they basically stop counting.
+ * --MAG
+ */
+
+/*
+ * 'todc_info' should be initialized in your *_setup.c file to
+ * point to a fully initialized 'todc_info_t' structure.
+ * This structure holds all the register offsets for your particular
+ * TODC/RTC chip.
+ * TODC_ALLOC()/TODC_INIT() will allocate and initialize this table for you.
+ */
+
+#ifdef RTC_FREQ_SELECT
+#undef RTC_FREQ_SELECT
+#define RTC_FREQ_SELECT control_b /* Register A */
+#endif
+
+#ifdef RTC_CONTROL
+#undef RTC_CONTROL
+#define RTC_CONTROL control_a /* Register B */
+#endif
+
+#ifdef RTC_INTR_FLAGS
+#undef RTC_INTR_FLAGS
+#define RTC_INTR_FLAGS watchdog /* Register C */
+#endif
+
+#ifdef RTC_VALID
+#undef RTC_VALID
+#define RTC_VALID interrupts /* Register D */
+#endif
+
+/* Access routines when RTC accessed directly (like normal memory) */
+u_char
+todc_direct_read_val(int addr)
+{
+ return readb((void __iomem *)(todc_info->nvram_data + addr));
+}
+
+void
+todc_direct_write_val(int addr, unsigned char val)
+{
+ writeb(val, (void __iomem *)(todc_info->nvram_data + addr));
+ return;
+}
+
+/* Access routines for accessing m48txx type chips via addr/data regs */
+u_char
+todc_m48txx_read_val(int addr)
+{
+ outb(addr, todc_info->nvram_as0);
+ outb(addr>>todc_info->as0_bits, todc_info->nvram_as1);
+ return inb(todc_info->nvram_data);
+}
+
+void
+todc_m48txx_write_val(int addr, unsigned char val)
+{
+ outb(addr, todc_info->nvram_as0);
+ outb(addr>>todc_info->as0_bits, todc_info->nvram_as1);
+ outb(val, todc_info->nvram_data);
+ return;
+}
+
+/* Access routines for accessing mc146818 type chips via addr/data regs */
+u_char
+todc_mc146818_read_val(int addr)
+{
+ outb_p(addr, todc_info->nvram_as0);
+ return inb_p(todc_info->nvram_data);
+}
+
+void
+todc_mc146818_write_val(int addr, unsigned char val)
+{
+ outb_p(addr, todc_info->nvram_as0);
+ outb_p(val, todc_info->nvram_data);
+}
+
+
+/*
+ * Routines to make RTC chips with NVRAM buried behind an addr/data pair
+ * have the NVRAM and clock regs appear at the same level.
+ * The NVRAM will appear to start at addr 0 and the clock regs will appear
+ * to start immediately after the NVRAM (actually, start at offset
+ * todc_info->nvram_size).
+ */
+static inline u_char
+todc_read_val(int addr)
+{
+ u_char val;
+
+ if (todc_info->sw_flags & TODC_FLAG_2_LEVEL_NVRAM) {
+ if (addr < todc_info->nvram_size) { /* NVRAM */
+ ppc_md.rtc_write_val(todc_info->nvram_addr_reg, addr);
+ val = ppc_md.rtc_read_val(todc_info->nvram_data_reg);
+ } else { /* Clock Reg */
+ addr -= todc_info->nvram_size;
+ val = ppc_md.rtc_read_val(addr);
+ }
+ } else
+ val = ppc_md.rtc_read_val(addr);
+
+ return val;
+}
+
+static inline void
+todc_write_val(int addr, u_char val)
+{
+ if (todc_info->sw_flags & TODC_FLAG_2_LEVEL_NVRAM) {
+ if (addr < todc_info->nvram_size) { /* NVRAM */
+ ppc_md.rtc_write_val(todc_info->nvram_addr_reg, addr);
+ ppc_md.rtc_write_val(todc_info->nvram_data_reg, val);
+ } else { /* Clock Reg */
+ addr -= todc_info->nvram_size;
+ ppc_md.rtc_write_val(addr, val);
+ }
+ } else
+ ppc_md.rtc_write_val(addr, val);
+}
+
+/*
+ * TODC routines
+ *
+ * There is some ugly stuff in that there are assumptions for the mc146818.
+ *
+ * Assumptions:
+ * - todc_info->control_a has the offset as mc146818 Register B reg
+ * - todc_info->control_b has the offset as mc146818 Register A reg
+ * - m48txx control reg's write enable or 'W' bit is same as
+ * mc146818 Register B 'SET' bit (i.e., 0x80)
+ *
+ * These assumptions were made to make the code simpler.
+ */
+long __init
+todc_time_init(void)
+{
+ u_char cntl_b;
+
+ if (!ppc_md.rtc_read_val)
+ ppc_md.rtc_read_val = ppc_md.nvram_read_val;
+ if (!ppc_md.rtc_write_val)
+ ppc_md.rtc_write_val = ppc_md.nvram_write_val;
+
+ cntl_b = todc_read_val(todc_info->control_b);
+
+ if (todc_info->rtc_type == TODC_TYPE_MC146818) {
+ if ((cntl_b & 0x70) != 0x20) {
+ printk(KERN_INFO "TODC real-time-clock was stopped."
+ " Now starting...");
+ cntl_b &= ~0x70;
+ cntl_b |= 0x20;
+ }
+
+ todc_write_val(todc_info->control_b, cntl_b);
+ } else if (todc_info->rtc_type == TODC_TYPE_DS17285) {
+ u_char mode;
+
+ mode = todc_read_val(TODC_TYPE_DS17285_CNTL_A);
+ /* Make sure countdown clear is not set */
+ mode &= ~0x40;
+ /* Enable oscillator, extended register set */
+ mode |= 0x30;
+ todc_write_val(TODC_TYPE_DS17285_CNTL_A, mode);
+
+ } else if (todc_info->rtc_type == TODC_TYPE_DS1501) {
+ u_char month;
+
+ todc_info->enable_read = TODC_DS1501_CNTL_B_TE;
+ todc_info->enable_write = TODC_DS1501_CNTL_B_TE;
+
+ month = todc_read_val(todc_info->month);
+
+ if ((month & 0x80) == 0x80) {
+ printk(KERN_INFO "TODC %s %s\n",
+ "real-time-clock was stopped.",
+ "Now starting...");
+ month &= ~0x80;
+ todc_write_val(todc_info->month, month);
+ }
+
+ cntl_b &= ~TODC_DS1501_CNTL_B_TE;
+ todc_write_val(todc_info->control_b, cntl_b);
+ } else { /* must be a m48txx type */
+ u_char cntl_a;
+
+ todc_info->enable_read = TODC_MK48TXX_CNTL_A_R;
+ todc_info->enable_write = TODC_MK48TXX_CNTL_A_W;
+
+ cntl_a = todc_read_val(todc_info->control_a);
+
+ /* Check & clear STOP bit in control B register */
+ if (cntl_b & TODC_MK48TXX_DAY_CB) {
+ printk(KERN_INFO "TODC %s %s\n",
+ "real-time-clock was stopped.",
+ "Now starting...");
+
+ cntl_a |= todc_info->enable_write;
+ cntl_b &= ~TODC_MK48TXX_DAY_CB;/* Start Oscil */
+
+ todc_write_val(todc_info->control_a, cntl_a);
+ todc_write_val(todc_info->control_b, cntl_b);
+ }
+
+ /* Make sure READ & WRITE bits are cleared. */
+ cntl_a &= ~(todc_info->enable_write | todc_info->enable_read);
+ todc_write_val(todc_info->control_a, cntl_a);
+ }
+
+ return 0;
+}
+
+/*
+ * There is some ugly stuff in that there are assumptions that for a mc146818,
+ * the todc_info->control_a has the offset of the mc146818 Register B reg and
+ * that the register'ss 'SET' bit is the same as the m48txx's write enable
+ * bit in the control register of the m48txx (i.e., 0x80).
+ *
+ * It was done to make the code look simpler.
+ */
+void
+todc_get_rtc_time(struct rtc_time *tm)
+{
+ uint year = 0, mon = 0, mday = 0, hour = 0, min = 0, sec = 0;
+ uint limit, i;
+ u_char save_control, uip = 0;
+ extern void GregorianDay(struct rtc_time *);
+
+ spin_lock(&rtc_lock);
+ save_control = todc_read_val(todc_info->control_a);
+
+ if (todc_info->rtc_type != TODC_TYPE_MC146818) {
+ limit = 1;
+
+ switch (todc_info->rtc_type) {
+ case TODC_TYPE_DS1553:
+ case TODC_TYPE_DS1557:
+ case TODC_TYPE_DS1743:
+ case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
+ case TODC_TYPE_DS1747:
+ case TODC_TYPE_DS17285:
+ break;
+ default:
+ todc_write_val(todc_info->control_a,
+ (save_control | todc_info->enable_read));
+ }
+ } else
+ limit = 100000000;
+
+ for (i=0; i<limit; i++) {
+ if (todc_info->rtc_type == TODC_TYPE_MC146818)
+ uip = todc_read_val(todc_info->RTC_FREQ_SELECT);
+
+ sec = todc_read_val(todc_info->seconds) & 0x7f;
+ min = todc_read_val(todc_info->minutes) & 0x7f;
+ hour = todc_read_val(todc_info->hours) & 0x3f;
+ mday = todc_read_val(todc_info->day_of_month) & 0x3f;
+ mon = todc_read_val(todc_info->month) & 0x1f;
+ year = todc_read_val(todc_info->year) & 0xff;
+
+ if (todc_info->rtc_type == TODC_TYPE_MC146818) {
+ uip |= todc_read_val(todc_info->RTC_FREQ_SELECT);
+ if ((uip & RTC_UIP) == 0)
+ break;
+ }
+ }
+
+ if (todc_info->rtc_type != TODC_TYPE_MC146818) {
+ switch (todc_info->rtc_type) {
+ case TODC_TYPE_DS1553:
+ case TODC_TYPE_DS1557:
+ case TODC_TYPE_DS1743:
+ case TODC_TYPE_DS1746: /* XXXX BAD HACK -> FIX */
+ case TODC_TYPE_DS1747:
+ case TODC_TYPE_DS17285:
+ break;
+ default:
+ save_control &= ~(todc_info->enable_read);
+ todc_write_val(todc_info->control_a, save_control);
+ }
+ }
+ spin_unlock(&rtc_lock);
+
+ if ((todc_info->rtc_type != TODC_TYPE_MC146818)
+ || ((save_control & RTC_DM_BINARY) == 0)
+ || RTC_ALWAYS_BCD) {
+ BCD_TO_BIN(sec);
+ BCD_TO_BIN(min);
+ BCD_TO_BIN(hour);
+ BCD_TO_BIN(mday);
+ BCD_TO_BIN(mon);
+ BCD_TO_BIN(year);
+ }
+
+ if ((year + 1900) < 1970) {
+ year += 100;
+ }
+
+ tm->tm_sec = sec;
+ tm->tm_min = min;
+ tm->tm_hour = hour;
+ tm->tm_mday = mday;
+ tm->tm_mon = mon;
+ tm->tm_year = year;
+
+ GregorianDay(tm);
+}
+
+int
+todc_set_rtc_time(struct rtc_time *tm)
+{
+ u_char save_control, save_freq_select = 0;
+
+ spin_lock(&rtc_lock);
+ save_control = todc_read_val(todc_info->control_a);
+
+ /* Assuming MK48T59_RTC_CA_WRITE & RTC_SET are equal */
+ todc_write_val(todc_info->control_a,
+ (save_control | todc_info->enable_write));
+ save_control &= ~(todc_info->enable_write); /* in case it was set */
+
+ if (todc_info->rtc_type == TODC_TYPE_MC146818) {
+ save_freq_select = todc_read_val(todc_info->RTC_FREQ_SELECT);
+ todc_write_val(todc_info->RTC_FREQ_SELECT,
+ save_freq_select | RTC_DIV_RESET2);
+ }
+
+ if ((todc_info->rtc_type != TODC_TYPE_MC146818)
+ || ((save_control & RTC_DM_BINARY) == 0)
+ || RTC_ALWAYS_BCD) {
+ BIN_TO_BCD(tm->tm_sec);
+ BIN_TO_BCD(tm->tm_min);
+ BIN_TO_BCD(tm->tm_hour);
+ BIN_TO_BCD(tm->tm_mon);
+ BIN_TO_BCD(tm->tm_mday);
+ BIN_TO_BCD(tm->tm_year);
+ }
+
+ todc_write_val(todc_info->seconds, tm->tm_sec);
+ todc_write_val(todc_info->minutes, tm->tm_min);
+ todc_write_val(todc_info->hours, tm->tm_hour);
+ todc_write_val(todc_info->month, tm->tm_mon);
+ todc_write_val(todc_info->day_of_month, tm->tm_mday);
+ todc_write_val(todc_info->year, tm->tm_year);
+
+ todc_write_val(todc_info->control_a, save_control);
+
+ if (todc_info->rtc_type == TODC_TYPE_MC146818)
+ todc_write_val(todc_info->RTC_FREQ_SELECT, save_freq_select);
+
+ spin_unlock(&rtc_lock);
+ return 0;
+}
diff --git a/include/asm-powerpc/todc.h b/include/asm-powerpc/todc.h
new file mode 100644
index 0000000..60a8c39
--- /dev/null
+++ b/include/asm-powerpc/todc.h
@@ -0,0 +1,487 @@
+/*
+ * Definitions for the M48Txx and mc146818 series of Time of day/Real Time
+ * Clock chips.
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2001 (c) MontaVista, Software, Inc. This file is licensed under
+ * the terms of the GNU General Public License version 2. This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+/*
+ * Support for the M48T37/M48T59/.../mc146818 Real Time Clock chips.
+ * Purpose is to make one generic file that handles all of these chips instead
+ * of every platform implementing the same code over & over again.
+ */
+
+#ifndef __PPC_KERNEL_TODC_H
+#define __PPC_KERNEL_TODC_H
+
+typedef struct {
+ uint rtc_type; /* your particular chip */
+
+ /*
+ * Following are the addresses of the AS0, AS1, and DATA registers
+ * of these chips. Note that these are board-specific.
+ */
+ unsigned int nvram_as0;
+ unsigned int nvram_as1;
+ unsigned int nvram_data;
+
+ /*
+ * Define bits to stop external set of regs from changing so
+ * the chip can be read/written reliably.
+ */
+ unsigned char enable_read;
+ unsigned char enable_write;
+
+ /*
+ * Following is the number of AS0 address bits. This is normally
+ * 8 but some bad hardware routes address lines incorrectly.
+ */
+ int as0_bits;
+
+ int nvram_size; /* Size of NVRAM on chip */
+ int sw_flags; /* Software control flags */
+
+ /* Following are the register offsets for the particular chip */
+ int year;
+ int month;
+ int day_of_month;
+ int day_of_week;
+ int hours;
+ int minutes;
+ int seconds;
+ int control_b;
+ int control_a;
+ int watchdog;
+ int interrupts;
+ int alarm_date;
+ int alarm_hour;
+ int alarm_minutes;
+ int alarm_seconds;
+ int century;
+ int flags;
+
+ /*
+ * Some RTC chips have their NVRAM buried behind a addr/data pair of
+ * regs on the first level/clock registers. The following fields
+ * are the addresses for those addr/data regs.
+ */
+ int nvram_addr_reg;
+ int nvram_data_reg;
+} todc_info_t;
+
+/*
+ * Define the types of TODC/RTC variants that are supported in
+ * arch/ppc/kernel/todc_time.c
+ * Make a new one of these for any chip somehow differs from what's already
+ * defined. That way, if you ever need to put in code to touch those
+ * bits/registers in todc_time.c, you can put it inside an
+ * 'if (todc_info->rtc_type == TODC_TYPE_XXX)' so you won't break
+ * anyone else.
+ */
+#define TODC_TYPE_MK48T35 1
+#define TODC_TYPE_MK48T37 2
+#define TODC_TYPE_MK48T59 3
+#define TODC_TYPE_DS1693 4 /* Dallas DS1693 RTC */
+#define TODC_TYPE_DS1743 5 /* Dallas DS1743 RTC */
+#define TODC_TYPE_DS1746 6 /* Dallas DS1746 RTC */
+#define TODC_TYPE_DS1747 7 /* Dallas DS1747 RTC */
+#define TODC_TYPE_DS1501 8 /* Dallas DS1501 RTC */
+#define TODC_TYPE_DS1643 9 /* Dallas DS1643 RTC */
+#define TODC_TYPE_PC97307 10 /* PC97307 internal RTC */
+#define TODC_TYPE_DS1557 11 /* Dallas DS1557 RTC */
+#define TODC_TYPE_DS17285 12 /* Dallas DS17285 RTC */
+#define TODC_TYPE_DS1553 13 /* Dallas DS1553 RTC */
+#define TODC_TYPE_MC146818 100 /* Leave room for m48txx's */
+
+/*
+ * Bit to clear/set to enable reads/writes to the chip
+ */
+#define TODC_MK48TXX_CNTL_A_R 0x40
+#define TODC_MK48TXX_CNTL_A_W 0x80
+#define TODC_MK48TXX_DAY_CB 0x80
+
+#define TODC_DS1501_CNTL_B_TE 0x80
+
+/*
+ * Define flag bits used by todc routines.
+ */
+#define TODC_FLAG_2_LEVEL_NVRAM 0x00000001
+
+/*
+ * Define the values for the various RTC's that should to into the todc_info
+ * table.
+ * Note: The XXX_NVRAM_SIZE, XXX_NVRAM_ADDR_REG, and XXX_NVRAM_DATA_REG only
+ * matter if XXX_SW_FLAGS has TODC_FLAG_2_LEVEL_NVRAM set.
+ */
+#define TODC_TYPE_MK48T35_NVRAM_SIZE 0x7ff8
+#define TODC_TYPE_MK48T35_SW_FLAGS 0
+#define TODC_TYPE_MK48T35_YEAR 0x7fff
+#define TODC_TYPE_MK48T35_MONTH 0x7ffe
+#define TODC_TYPE_MK48T35_DOM 0x7ffd /* Day of Month */
+#define TODC_TYPE_MK48T35_DOW 0x7ffc /* Day of Week */
+#define TODC_TYPE_MK48T35_HOURS 0x7ffb
+#define TODC_TYPE_MK48T35_MINUTES 0x7ffa
+#define TODC_TYPE_MK48T35_SECONDS 0x7ff9
+#define TODC_TYPE_MK48T35_CNTL_B 0x7ff9
+#define TODC_TYPE_MK48T35_CNTL_A 0x7ff8
+#define TODC_TYPE_MK48T35_WATCHDOG 0x0000
+#define TODC_TYPE_MK48T35_INTERRUPTS 0x0000
+#define TODC_TYPE_MK48T35_ALARM_DATE 0x0000
+#define TODC_TYPE_MK48T35_ALARM_HOUR 0x0000
+#define TODC_TYPE_MK48T35_ALARM_MINUTES 0x0000
+#define TODC_TYPE_MK48T35_ALARM_SECONDS 0x0000
+#define TODC_TYPE_MK48T35_CENTURY 0x0000
+#define TODC_TYPE_MK48T35_FLAGS 0x0000
+#define TODC_TYPE_MK48T35_NVRAM_ADDR_REG 0
+#define TODC_TYPE_MK48T35_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_MK48T37_NVRAM_SIZE 0x7ff0
+#define TODC_TYPE_MK48T37_SW_FLAGS 0
+#define TODC_TYPE_MK48T37_YEAR 0x7fff
+#define TODC_TYPE_MK48T37_MONTH 0x7ffe
+#define TODC_TYPE_MK48T37_DOM 0x7ffd /* Day of Month */
+#define TODC_TYPE_MK48T37_DOW 0x7ffc /* Day of Week */
+#define TODC_TYPE_MK48T37_HOURS 0x7ffb
+#define TODC_TYPE_MK48T37_MINUTES 0x7ffa
+#define TODC_TYPE_MK48T37_SECONDS 0x7ff9
+#define TODC_TYPE_MK48T37_CNTL_B 0x7ff9
+#define TODC_TYPE_MK48T37_CNTL_A 0x7ff8
+#define TODC_TYPE_MK48T37_WATCHDOG 0x7ff7
+#define TODC_TYPE_MK48T37_INTERRUPTS 0x7ff6
+#define TODC_TYPE_MK48T37_ALARM_DATE 0x7ff5
+#define TODC_TYPE_MK48T37_ALARM_HOUR 0x7ff4
+#define TODC_TYPE_MK48T37_ALARM_MINUTES 0x7ff3
+#define TODC_TYPE_MK48T37_ALARM_SECONDS 0x7ff2
+#define TODC_TYPE_MK48T37_CENTURY 0x7ff1
+#define TODC_TYPE_MK48T37_FLAGS 0x7ff0
+#define TODC_TYPE_MK48T37_NVRAM_ADDR_REG 0
+#define TODC_TYPE_MK48T37_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_MK48T59_NVRAM_SIZE 0x1ff0
+#define TODC_TYPE_MK48T59_SW_FLAGS 0
+#define TODC_TYPE_MK48T59_YEAR 0x1fff
+#define TODC_TYPE_MK48T59_MONTH 0x1ffe
+#define TODC_TYPE_MK48T59_DOM 0x1ffd /* Day of Month */
+#define TODC_TYPE_MK48T59_DOW 0x1ffc /* Day of Week */
+#define TODC_TYPE_MK48T59_HOURS 0x1ffb
+#define TODC_TYPE_MK48T59_MINUTES 0x1ffa
+#define TODC_TYPE_MK48T59_SECONDS 0x1ff9
+#define TODC_TYPE_MK48T59_CNTL_B 0x1ff9
+#define TODC_TYPE_MK48T59_CNTL_A 0x1ff8
+#define TODC_TYPE_MK48T59_WATCHDOG 0x1fff
+#define TODC_TYPE_MK48T59_INTERRUPTS 0x1fff
+#define TODC_TYPE_MK48T59_ALARM_DATE 0x1fff
+#define TODC_TYPE_MK48T59_ALARM_HOUR 0x1fff
+#define TODC_TYPE_MK48T59_ALARM_MINUTES 0x1fff
+#define TODC_TYPE_MK48T59_ALARM_SECONDS 0x1fff
+#define TODC_TYPE_MK48T59_CENTURY 0x1fff
+#define TODC_TYPE_MK48T59_FLAGS 0x1fff
+#define TODC_TYPE_MK48T59_NVRAM_ADDR_REG 0
+#define TODC_TYPE_MK48T59_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_DS1501_NVRAM_SIZE 0x100
+#define TODC_TYPE_DS1501_SW_FLAGS TODC_FLAG_2_LEVEL_NVRAM
+#define TODC_TYPE_DS1501_YEAR (TODC_TYPE_DS1501_NVRAM_SIZE + 0x06)
+#define TODC_TYPE_DS1501_MONTH (TODC_TYPE_DS1501_NVRAM_SIZE + 0x05)
+#define TODC_TYPE_DS1501_DOM (TODC_TYPE_DS1501_NVRAM_SIZE + 0x04)
+#define TODC_TYPE_DS1501_DOW (TODC_TYPE_DS1501_NVRAM_SIZE + 0x03)
+#define TODC_TYPE_DS1501_HOURS (TODC_TYPE_DS1501_NVRAM_SIZE + 0x02)
+#define TODC_TYPE_DS1501_MINUTES (TODC_TYPE_DS1501_NVRAM_SIZE + 0x01)
+#define TODC_TYPE_DS1501_SECONDS (TODC_TYPE_DS1501_NVRAM_SIZE + 0x00)
+#define TODC_TYPE_DS1501_CNTL_B (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0f)
+#define TODC_TYPE_DS1501_CNTL_A (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0f)
+#define TODC_TYPE_DS1501_WATCHDOG (TODC_TYPE_DS1501_NVRAM_SIZE + 0xff)
+#define TODC_TYPE_DS1501_INTERRUPTS (TODC_TYPE_DS1501_NVRAM_SIZE + 0xff)
+#define TODC_TYPE_DS1501_ALARM_DATE (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0b)
+#define TODC_TYPE_DS1501_ALARM_HOUR (TODC_TYPE_DS1501_NVRAM_SIZE + 0x0a)
+#define TODC_TYPE_DS1501_ALARM_MINUTES (TODC_TYPE_DS1501_NVRAM_SIZE + 0x09)
+#define TODC_TYPE_DS1501_ALARM_SECONDS (TODC_TYPE_DS1501_NVRAM_SIZE + 0x08)
+#define TODC_TYPE_DS1501_CENTURY (TODC_TYPE_DS1501_NVRAM_SIZE + 0x07)
+#define TODC_TYPE_DS1501_FLAGS (TODC_TYPE_DS1501_NVRAM_SIZE + 0xff)
+#define TODC_TYPE_DS1501_NVRAM_ADDR_REG 0x10
+#define TODC_TYPE_DS1501_NVRAM_DATA_REG 0x13
+
+#define TODC_TYPE_DS1553_NVRAM_SIZE 0x1ff0
+#define TODC_TYPE_DS1553_SW_FLAGS 0
+#define TODC_TYPE_DS1553_YEAR 0x1fff
+#define TODC_TYPE_DS1553_MONTH 0x1ffe
+#define TODC_TYPE_DS1553_DOM 0x1ffd /* Day of Month */
+#define TODC_TYPE_DS1553_DOW 0x1ffc /* Day of Week */
+#define TODC_TYPE_DS1553_HOURS 0x1ffb
+#define TODC_TYPE_DS1553_MINUTES 0x1ffa
+#define TODC_TYPE_DS1553_SECONDS 0x1ff9
+#define TODC_TYPE_DS1553_CNTL_B 0x1ff9
+#define TODC_TYPE_DS1553_CNTL_A 0x1ff8 /* control_a R/W regs */
+#define TODC_TYPE_DS1553_WATCHDOG 0x1ff7
+#define TODC_TYPE_DS1553_INTERRUPTS 0x1ff6
+#define TODC_TYPE_DS1553_ALARM_DATE 0x1ff5
+#define TODC_TYPE_DS1553_ALARM_HOUR 0x1ff4
+#define TODC_TYPE_DS1553_ALARM_MINUTES 0x1ff3
+#define TODC_TYPE_DS1553_ALARM_SECONDS 0x1ff2
+#define TODC_TYPE_DS1553_CENTURY 0x1ff8
+#define TODC_TYPE_DS1553_FLAGS 0x1ff0
+#define TODC_TYPE_DS1553_NVRAM_ADDR_REG 0
+#define TODC_TYPE_DS1553_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_DS1557_NVRAM_SIZE 0x7fff0
+#define TODC_TYPE_DS1557_SW_FLAGS 0
+#define TODC_TYPE_DS1557_YEAR 0x7ffff
+#define TODC_TYPE_DS1557_MONTH 0x7fffe
+#define TODC_TYPE_DS1557_DOM 0x7fffd /* Day of Month */
+#define TODC_TYPE_DS1557_DOW 0x7fffc /* Day of Week */
+#define TODC_TYPE_DS1557_HOURS 0x7fffb
+#define TODC_TYPE_DS1557_MINUTES 0x7fffa
+#define TODC_TYPE_DS1557_SECONDS 0x7fff9
+#define TODC_TYPE_DS1557_CNTL_B 0x7fff9
+#define TODC_TYPE_DS1557_CNTL_A 0x7fff8 /* control_a R/W regs */
+#define TODC_TYPE_DS1557_WATCHDOG 0x7fff7
+#define TODC_TYPE_DS1557_INTERRUPTS 0x7fff6
+#define TODC_TYPE_DS1557_ALARM_DATE 0x7fff5
+#define TODC_TYPE_DS1557_ALARM_HOUR 0x7fff4
+#define TODC_TYPE_DS1557_ALARM_MINUTES 0x7fff3
+#define TODC_TYPE_DS1557_ALARM_SECONDS 0x7fff2
+#define TODC_TYPE_DS1557_CENTURY 0x7fff8
+#define TODC_TYPE_DS1557_FLAGS 0x7fff0
+#define TODC_TYPE_DS1557_NVRAM_ADDR_REG 0
+#define TODC_TYPE_DS1557_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_DS1643_NVRAM_SIZE 0x1ff8
+#define TODC_TYPE_DS1643_SW_FLAGS 0
+#define TODC_TYPE_DS1643_YEAR 0x1fff
+#define TODC_TYPE_DS1643_MONTH 0x1ffe
+#define TODC_TYPE_DS1643_DOM 0x1ffd /* Day of Month */
+#define TODC_TYPE_DS1643_DOW 0x1ffc /* Day of Week */
+#define TODC_TYPE_DS1643_HOURS 0x1ffb
+#define TODC_TYPE_DS1643_MINUTES 0x1ffa
+#define TODC_TYPE_DS1643_SECONDS 0x1ff9
+#define TODC_TYPE_DS1643_CNTL_B 0x1ff9
+#define TODC_TYPE_DS1643_CNTL_A 0x1ff8 /* control_a R/W regs */
+#define TODC_TYPE_DS1643_WATCHDOG 0x1fff
+#define TODC_TYPE_DS1643_INTERRUPTS 0x1fff
+#define TODC_TYPE_DS1643_ALARM_DATE 0x1fff
+#define TODC_TYPE_DS1643_ALARM_HOUR 0x1fff
+#define TODC_TYPE_DS1643_ALARM_MINUTES 0x1fff
+#define TODC_TYPE_DS1643_ALARM_SECONDS 0x1fff
+#define TODC_TYPE_DS1643_CENTURY 0x1ff8
+#define TODC_TYPE_DS1643_FLAGS 0x1fff
+#define TODC_TYPE_DS1643_NVRAM_ADDR_REG 0
+#define TODC_TYPE_DS1643_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_DS1693_NVRAM_SIZE 0 /* Not handled yet */
+#define TODC_TYPE_DS1693_SW_FLAGS 0
+#define TODC_TYPE_DS1693_YEAR 0x09
+#define TODC_TYPE_DS1693_MONTH 0x08
+#define TODC_TYPE_DS1693_DOM 0x07 /* Day of Month */
+#define TODC_TYPE_DS1693_DOW 0x06 /* Day of Week */
+#define TODC_TYPE_DS1693_HOURS 0x04
+#define TODC_TYPE_DS1693_MINUTES 0x02
+#define TODC_TYPE_DS1693_SECONDS 0x00
+#define TODC_TYPE_DS1693_CNTL_B 0x0b
+#define TODC_TYPE_DS1693_CNTL_A 0x0a
+#define TODC_TYPE_DS1693_WATCHDOG 0xff
+#define TODC_TYPE_DS1693_INTERRUPTS 0xff
+#define TODC_TYPE_DS1693_ALARM_DATE 0x49
+#define TODC_TYPE_DS1693_ALARM_HOUR 0x05
+#define TODC_TYPE_DS1693_ALARM_MINUTES 0x03
+#define TODC_TYPE_DS1693_ALARM_SECONDS 0x01
+#define TODC_TYPE_DS1693_CENTURY 0x48
+#define TODC_TYPE_DS1693_FLAGS 0xff
+#define TODC_TYPE_DS1693_NVRAM_ADDR_REG 0
+#define TODC_TYPE_DS1693_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_DS1743_NVRAM_SIZE 0x1ff8
+#define TODC_TYPE_DS1743_SW_FLAGS 0
+#define TODC_TYPE_DS1743_YEAR 0x1fff
+#define TODC_TYPE_DS1743_MONTH 0x1ffe
+#define TODC_TYPE_DS1743_DOM 0x1ffd /* Day of Month */
+#define TODC_TYPE_DS1743_DOW 0x1ffc /* Day of Week */
+#define TODC_TYPE_DS1743_HOURS 0x1ffb
+#define TODC_TYPE_DS1743_MINUTES 0x1ffa
+#define TODC_TYPE_DS1743_SECONDS 0x1ff9
+#define TODC_TYPE_DS1743_CNTL_B 0x1ff9
+#define TODC_TYPE_DS1743_CNTL_A 0x1ff8 /* control_a R/W regs */
+#define TODC_TYPE_DS1743_WATCHDOG 0x1fff
+#define TODC_TYPE_DS1743_INTERRUPTS 0x1fff
+#define TODC_TYPE_DS1743_ALARM_DATE 0x1fff
+#define TODC_TYPE_DS1743_ALARM_HOUR 0x1fff
+#define TODC_TYPE_DS1743_ALARM_MINUTES 0x1fff
+#define TODC_TYPE_DS1743_ALARM_SECONDS 0x1fff
+#define TODC_TYPE_DS1743_CENTURY 0x1ff8
+#define TODC_TYPE_DS1743_FLAGS 0x1fff
+#define TODC_TYPE_DS1743_NVRAM_ADDR_REG 0
+#define TODC_TYPE_DS1743_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_DS1746_NVRAM_SIZE 0x1fff8
+#define TODC_TYPE_DS1746_SW_FLAGS 0
+#define TODC_TYPE_DS1746_YEAR 0x1ffff
+#define TODC_TYPE_DS1746_MONTH 0x1fffe
+#define TODC_TYPE_DS1746_DOM 0x1fffd /* Day of Month */
+#define TODC_TYPE_DS1746_DOW 0x1fffc /* Day of Week */
+#define TODC_TYPE_DS1746_HOURS 0x1fffb
+#define TODC_TYPE_DS1746_MINUTES 0x1fffa
+#define TODC_TYPE_DS1746_SECONDS 0x1fff9
+#define TODC_TYPE_DS1746_CNTL_B 0x1fff9
+#define TODC_TYPE_DS1746_CNTL_A 0x1fff8 /* control_a R/W regs */
+#define TODC_TYPE_DS1746_WATCHDOG 0x00000
+#define TODC_TYPE_DS1746_INTERRUPTS 0x00000
+#define TODC_TYPE_DS1746_ALARM_DATE 0x00000
+#define TODC_TYPE_DS1746_ALARM_HOUR 0x00000
+#define TODC_TYPE_DS1746_ALARM_MINUTES 0x00000
+#define TODC_TYPE_DS1746_ALARM_SECONDS 0x00000
+#define TODC_TYPE_DS1746_CENTURY 0x00000
+#define TODC_TYPE_DS1746_FLAGS 0x00000
+#define TODC_TYPE_DS1746_NVRAM_ADDR_REG 0
+#define TODC_TYPE_DS1746_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_DS1747_NVRAM_SIZE 0x7fff8
+#define TODC_TYPE_DS1747_SW_FLAGS 0
+#define TODC_TYPE_DS1747_YEAR 0x7ffff
+#define TODC_TYPE_DS1747_MONTH 0x7fffe
+#define TODC_TYPE_DS1747_DOM 0x7fffd /* Day of Month */
+#define TODC_TYPE_DS1747_DOW 0x7fffc /* Day of Week */
+#define TODC_TYPE_DS1747_HOURS 0x7fffb
+#define TODC_TYPE_DS1747_MINUTES 0x7fffa
+#define TODC_TYPE_DS1747_SECONDS 0x7fff9
+#define TODC_TYPE_DS1747_CNTL_B 0x7fff9
+#define TODC_TYPE_DS1747_CNTL_A 0x7fff8 /* control_a R/W regs */
+#define TODC_TYPE_DS1747_WATCHDOG 0x00000
+#define TODC_TYPE_DS1747_INTERRUPTS 0x00000
+#define TODC_TYPE_DS1747_ALARM_DATE 0x00000
+#define TODC_TYPE_DS1747_ALARM_HOUR 0x00000
+#define TODC_TYPE_DS1747_ALARM_MINUTES 0x00000
+#define TODC_TYPE_DS1747_ALARM_SECONDS 0x00000
+#define TODC_TYPE_DS1747_CENTURY 0x00000
+#define TODC_TYPE_DS1747_FLAGS 0x00000
+#define TODC_TYPE_DS1747_NVRAM_ADDR_REG 0
+#define TODC_TYPE_DS1747_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_DS17285_NVRAM_SIZE (0x1000-0x80) /* 4Kx8 NVRAM (minus RTC regs) */
+#define TODC_TYPE_DS17285_SW_FLAGS TODC_FLAG_2_LEVEL_NVRAM
+#define TODC_TYPE_DS17285_SECONDS (TODC_TYPE_DS17285_NVRAM_SIZE + 0x00)
+#define TODC_TYPE_DS17285_ALARM_SECONDS (TODC_TYPE_DS17285_NVRAM_SIZE + 0x01)
+#define TODC_TYPE_DS17285_MINUTES (TODC_TYPE_DS17285_NVRAM_SIZE + 0x02)
+#define TODC_TYPE_DS17285_ALARM_MINUTES (TODC_TYPE_DS17285_NVRAM_SIZE + 0x03)
+#define TODC_TYPE_DS17285_HOURS (TODC_TYPE_DS17285_NVRAM_SIZE + 0x04)
+#define TODC_TYPE_DS17285_ALARM_HOUR (TODC_TYPE_DS17285_NVRAM_SIZE + 0x05)
+#define TODC_TYPE_DS17285_DOW (TODC_TYPE_DS17285_NVRAM_SIZE + 0x06)
+#define TODC_TYPE_DS17285_DOM (TODC_TYPE_DS17285_NVRAM_SIZE + 0x07)
+#define TODC_TYPE_DS17285_MONTH (TODC_TYPE_DS17285_NVRAM_SIZE + 0x08)
+#define TODC_TYPE_DS17285_YEAR (TODC_TYPE_DS17285_NVRAM_SIZE + 0x09)
+#define TODC_TYPE_DS17285_CNTL_A (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0A)
+#define TODC_TYPE_DS17285_CNTL_B (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0B)
+#define TODC_TYPE_DS17285_CNTL_C (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0C)
+#define TODC_TYPE_DS17285_CNTL_D (TODC_TYPE_DS17285_NVRAM_SIZE + 0x0D)
+#define TODC_TYPE_DS17285_WATCHDOG 0
+#define TODC_TYPE_DS17285_INTERRUPTS 0
+#define TODC_TYPE_DS17285_ALARM_DATE 0
+#define TODC_TYPE_DS17285_CENTURY 0
+#define TODC_TYPE_DS17285_FLAGS 0
+#define TODC_TYPE_DS17285_NVRAM_ADDR_REG 0x50
+#define TODC_TYPE_DS17285_NVRAM_DATA_REG 0x53
+
+#define TODC_TYPE_MC146818_NVRAM_SIZE 0 /* XXXX */
+#define TODC_TYPE_MC146818_SW_FLAGS 0
+#define TODC_TYPE_MC146818_YEAR 0x09
+#define TODC_TYPE_MC146818_MONTH 0x08
+#define TODC_TYPE_MC146818_DOM 0x07 /* Day of Month */
+#define TODC_TYPE_MC146818_DOW 0x06 /* Day of Week */
+#define TODC_TYPE_MC146818_HOURS 0x04
+#define TODC_TYPE_MC146818_MINUTES 0x02
+#define TODC_TYPE_MC146818_SECONDS 0x00
+#define TODC_TYPE_MC146818_CNTL_B 0x0a
+#define TODC_TYPE_MC146818_CNTL_A 0x0b /* control_a R/W regs */
+#define TODC_TYPE_MC146818_WATCHDOG 0
+#define TODC_TYPE_MC146818_INTERRUPTS 0x0c
+#define TODC_TYPE_MC146818_ALARM_DATE 0xff
+#define TODC_TYPE_MC146818_ALARM_HOUR 0x05
+#define TODC_TYPE_MC146818_ALARM_MINUTES 0x03
+#define TODC_TYPE_MC146818_ALARM_SECONDS 0x01
+#define TODC_TYPE_MC146818_CENTURY 0xff
+#define TODC_TYPE_MC146818_FLAGS 0xff
+#define TODC_TYPE_MC146818_NVRAM_ADDR_REG 0
+#define TODC_TYPE_MC146818_NVRAM_DATA_REG 0
+
+#define TODC_TYPE_PC97307_NVRAM_SIZE 0 /* No NVRAM? */
+#define TODC_TYPE_PC97307_SW_FLAGS 0
+#define TODC_TYPE_PC97307_YEAR 0x09
+#define TODC_TYPE_PC97307_MONTH 0x08
+#define TODC_TYPE_PC97307_DOM 0x07 /* Day of Month */
+#define TODC_TYPE_PC97307_DOW 0x06 /* Day of Week */
+#define TODC_TYPE_PC97307_HOURS 0x04
+#define TODC_TYPE_PC97307_MINUTES 0x02
+#define TODC_TYPE_PC97307_SECONDS 0x00
+#define TODC_TYPE_PC97307_CNTL_B 0x0a
+#define TODC_TYPE_PC97307_CNTL_A 0x0b /* control_a R/W regs */
+#define TODC_TYPE_PC97307_WATCHDOG 0x0c
+#define TODC_TYPE_PC97307_INTERRUPTS 0x0d
+#define TODC_TYPE_PC97307_ALARM_DATE 0xff
+#define TODC_TYPE_PC97307_ALARM_HOUR 0x05
+#define TODC_TYPE_PC97307_ALARM_MINUTES 0x03
+#define TODC_TYPE_PC97307_ALARM_SECONDS 0x01
+#define TODC_TYPE_PC97307_CENTURY 0xff
+#define TODC_TYPE_PC97307_FLAGS 0xff
+#define TODC_TYPE_PC97307_NVRAM_ADDR_REG 0
+#define TODC_TYPE_PC97307_NVRAM_DATA_REG 0
+
+/*
+ * Define macros to allocate and init the todc_info_t table that will
+ * be used by the todc_time.c routines.
+ */
+#define TODC_ALLOC() \
+ static todc_info_t todc_info_alloc; \
+ todc_info_t *todc_info = &todc_info_alloc;
+
+#define TODC_INIT(clock_type, as0, as1, data, bits) { \
+ todc_info->rtc_type = clock_type; \
+ \
+ todc_info->nvram_as0 = (unsigned int)(as0); \
+ todc_info->nvram_as1 = (unsigned int)(as1); \
+ todc_info->nvram_data = (unsigned int)(data); \
+ \
+ todc_info->as0_bits = (bits); \
+ \
+ todc_info->nvram_size = clock_type ##_NVRAM_SIZE; \
+ todc_info->sw_flags = clock_type ##_SW_FLAGS; \
+ \
+ todc_info->year = clock_type ##_YEAR; \
+ todc_info->month = clock_type ##_MONTH; \
+ todc_info->day_of_month = clock_type ##_DOM; \
+ todc_info->day_of_week = clock_type ##_DOW; \
+ todc_info->hours = clock_type ##_HOURS; \
+ todc_info->minutes = clock_type ##_MINUTES; \
+ todc_info->seconds = clock_type ##_SECONDS; \
+ todc_info->control_b = clock_type ##_CNTL_B; \
+ todc_info->control_a = clock_type ##_CNTL_A; \
+ todc_info->watchdog = clock_type ##_WATCHDOG; \
+ todc_info->interrupts = clock_type ##_INTERRUPTS; \
+ todc_info->alarm_date = clock_type ##_ALARM_DATE; \
+ todc_info->alarm_hour = clock_type ##_ALARM_HOUR; \
+ todc_info->alarm_minutes = clock_type ##_ALARM_MINUTES; \
+ todc_info->alarm_seconds = clock_type ##_ALARM_SECONDS; \
+ todc_info->century = clock_type ##_CENTURY; \
+ todc_info->flags = clock_type ##_FLAGS; \
+ \
+ todc_info->nvram_addr_reg = clock_type ##_NVRAM_ADDR_REG; \
+ todc_info->nvram_data_reg = clock_type ##_NVRAM_DATA_REG; \
+}
+
+extern todc_info_t *todc_info;
+
+unsigned char todc_direct_read_val(int addr);
+void todc_direct_write_val(int addr, unsigned char val);
+unsigned char todc_m48txx_read_val(int addr);
+void todc_m48txx_write_val(int addr, unsigned char val);
+unsigned char todc_mc146818_read_val(int addr);
+void todc_mc146818_write_val(int addr, unsigned char val);
+
+long todc_time_init(void);
+void todc_get_rtc_time(struct rtc_time *);
+int todc_set_rtc_time(struct rtc_time *);
+void todc_calibrate_decr(void);
+
+#endif /* __PPC_KERNEL_TODC_H */
^ permalink raw reply related
* Re: [linux-pm] release early... powermac g5 suspend to disk
From: Pavel Machek @ 2006-06-28 21:42 UTC (permalink / raw)
To: Johannes Berg; +Cc: linuxppc-dev list, linux-pm
In-Reply-To: <1151057810.7608.25.camel@localhost>
Hi!
> Wow. 2 days and a mostly destroyed XFS filesystem (it's still running
> but I better not touch some directories or it goes belly up, xfs_repair
> craps out too) I actually suspended my quad powermac a few times.
Congratulations! Hehe, you have nice testcase for xfs now :-).
[ext2 is the filesystem you proably want to use while hacking such code].
> Half of the time I'll be told by the softlockup watchdog that it locked
> up, but sometimes it actually works, that is, it suspends and resumes.
>
> Issues: I don't save MPIC state. Hence, anything that is compiled in as
> modules will no longer get IRQs after resume. Like USB on my system. So
> I only ohci_hcd and ehci_hcd before suspend, reload later (from a
> script) and I can still use the keyboard after ;)
>
> Same goes for tg3 even though it is built-in. Well, I held off looking
> at the MPIC because Ben said he was rewriting the whole interrupt stuff
> anyway.
>
> Other issues: yeah, this is extremely ugly. If you like your machine,
> don't take a look.
I like my machine. I'll take a look anyway ;-). It is not _that_
bad... at least it is short :).
Pavel
> --- linux-2.6-git.orig/kernel/power/snapshot.c 2006-06-23 11:37:23.433885225 +0200
> +++ linux-2.6-git/kernel/power/snapshot.c 2006-06-23 11:39:03.352985945 +0200
> @@ -177,7 +177,13 @@
> return 0;
>
> page = pfn_to_page(pfn);
> +/*
> + I currently mark the physical memory that we reserve
> + and _don't_ map for kernel access as Nosave so we won't
> + try to save it... Not sure what to do.
> +
> BUG_ON(PageReserved(page) && PageNosave(page));
> +*/
I believe this is gone in -git kernels for some other reasons.
Pavel
--
(english) http://www.livejournal.com/~pavelmachek
(cesky, pictures) http://atrey.karlin.mff.cuni.cz/~pavel/picture/horses/blog.html
^ permalink raw reply
* Re: [PATCH 6/7] net: Add QE UCC Gigabit Ethernet driver
From: Andrew Morton @ 2006-06-28 21:51 UTC (permalink / raw)
To: Li Yang-r58472
Cc: netdev, linux-kernel, linuxppc-dev, gridish, jgarzik, Hanjin.Chu
In-Reply-To: <9FCDBA58F226D911B202000BDBAD467306E04FD7@zch01exm40.ap.freescale.net>
Li Yang-r58472 <LeoLi@freescale.com> wrote:
>
> This is a gigabit Ethernet driver for Freescale QE(QUICC ENGINE) SOC. QE can be found on PowerQUICC II pro family.
>
>
>
> diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
> index bdaaad8..ebbb218 100644
> --- a/drivers/net/Kconfig
> +++ b/drivers/net/Kconfig
> @@ -2189,6 +2189,33 @@ config GFAR_NAPI
> bool "NAPI Support"
> depends on GIANFAR
>
> +config UCC_GETH
> + tristate "Freescale QE UCC GETH"
> + depends on QUICC_ENGINE
Opinions vary, but it can be useful if drivers such as this are compilable
on common architectures (ie: x86). That way, lots of people end up
compiling it and problems (generally simple ones) can be fixed for you.
Plus it's much less likely that someone will break your driver by accident.
Then again, it'll cause people to build a driver which they cannot possibly
use..
> # link order important here
> #
> diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
> new file mode 100644
> index 0000000..a7be2eb
> --- /dev/null
> +++ b/drivers/net/ucc_geth.c
>
> ...
>
> +#include <asm/uaccess.h>
> +#include <asm/irq.h>
> +#include <asm/io.h>
> +#include <asm/immap_qe.h>
> +#include <asm/qe.h>
> +
> +#include <asm/ucc.h>
> +#include <asm/ucc_fast.h>
Well that rather rules out the x86 option.
> +
> +static ucc_geth_info_t ugeth_primary_info = {
> + .uf_info = {
> + .bd_mem_part = MEM_PART_SYSTEM,
> + .brkpt_support = 0,
> + .grant_support = 0,
> + .tsa = 0,
> + .cdp = 0,
> + .cds = 0,
> + .ctsp = 0,
> + .ctss = 0,
> + .tci = 0,
> + .txsy = 0,
> + .rtsm = UCC_FAST_SEND_IDLES_BETWEEN_FRAMES,
> + .revd = 0,
> + .rsyn = 0,
Note that all the `.foo = 0' lines aren't needed.
> + .l2qt = {0, 0, 0, 0, 0, 0, 0, 0},
> + .l3qt = {0, 0, 0, 0, 0, 0, 0, 0,
> + 0, 0, 0, 0, 0, 0, 0, 0,
> + 0, 0, 0, 0, 0, 0, 0, 0,
> + 0, 0, 0, 0, 0, 0, 0, 0,
> + 0, 0, 0, 0, 0, 0, 0, 0,
> + 0, 0, 0, 0, 0, 0, 0, 0,
> + 0, 0, 0, 0, 0, 0, 0, 0,
> + 0, 0, 0, 0, 0, 0, 0, 0},
> + .vtagtable = {0, 0, 0, 0, 0, 0, 0, 0},
> + .iphoffset = {0, 0, 0, 0, 0, 0, 0, 0},
In fact I'd be inclined to remove them - the chances of keeping this table
in sync with the actual struct definition seem low.
> +
> +#ifdef DEBUG
> +static void mem_disp(u8 * addr, int size)
> +{
> + u8 *i;
> + int size16Aling = (size >> 4) << 4;
> + int size4Aling = (size >> 2) << 2;
> + int notAlign = 0;
> + if (size % 16)
> + notAlign = 1;
> +
> + for (i = addr; (u32) i < (u32) addr + size16Aling; i += 16)
> + printk("0x%08x: %08x %08x %08x %08x\r\n",
> + (u32) i,
> + *((u32 *) (i)),
> + *((u32 *) (i + 4)),
> + *((u32 *) (i + 8)), *((u32 *) (i + 12)));
> + if (notAlign == 1)
> + printk("0x%08x: ", (u32) i);
> + for (; (u32) i < (u32) addr + size4Aling; i += 4)
> + printk("%08x ", *((u32 *) (i)));
> + for (; (u32) i < (u32) addr + size; i++)
> + printk("%02x", *((u8 *) (i)));
> + if (notAlign == 1)
> + printk("\r\n");
> +}
> +#endif /* DEBUG */
This is very non-64-bit.
> +#ifdef CONFIG_UGETH_FILTERING
> +static void enqueue(struct list_head *node, struct list_head *lh)
> +{
> + unsigned long flags;
> +
> + local_irq_save(flags);
> + list_add_tail(node, lh);
> + local_irq_restore(flags);
> +}
> +#endif /* CONFIG_UGETH_FILTERING */
And local_irq_save() is very non-SMP (isn't it?)
> +static struct list_head *dequeue(struct list_head *lh)
> +{
> + unsigned long flags;
> +
> + local_irq_save(flags);
> + if (!list_empty(lh)) {
> + struct list_head *node = lh->next;
> + list_del(node);
> + local_irq_restore(flags);
> + return node;
> + } else {
> + local_irq_restore(flags);
> + return NULL;
> + }
> +}
Unless this really really really never will run on SMP, it'd be better to
use spin_lock_irqsave() here. That's equivalent on !SMP.
> +static struct sk_buff *get_new_skb(ucc_geth_private_t * ugeth, u8 * bd)
Preferred coding style is
static struct sk_buff *get_new_skb(ucc_geth_private_t *ugeth, u8 *bd)
> +{
> + struct sk_buff *skb = NULL;
> + unsigned int timeout = SKB_ALLOC_TIMEOUT;
> +
> + /* We have to allocate the skb, so keep trying till we succeed */
> + while ((!skb) && timeout--)
> + skb =
> + dev_alloc_skb(ugeth->ug_info->uf_info.max_rx_buf_length +
> + UCC_GETH_RX_DATA_BUF_ALIGNMENT);
This is pretty pointless. If the first allocation attempt failed then
for-sure the rest of them will fail too. All it does is waste CPU.
> +
> +static int rx_bd_buffer_set(ucc_geth_private_t * ugeth, u8 rxQ)
> +{
> + u8 *bd;
> + u32 bd_status;
> + struct sk_buff *skb;
> + int i;
> +
> + if (!ugeth) {
> + ugeth_err("%s: No handle passed.", __FUNCTION__);
> + return -EINVAL;
> + }
Presumably, this can't happen. Suggest you remove this code and let the
thing oops if it does happen.
> +static int fill_init_enet_entries(ucc_geth_private_t * ugeth,
> + volatile u32 * p_start,
> + u8 num_entries,
> + u32 thread_size,
> + u32 thread_alignment,
> + qe_risc_allocation_e risc,
> + int skip_page_for_first_entry)
> +{
> + u32 init_enet_offset;
> + u8 i;
> + int snum;
> +
> + if (!ugeth || !ugeth->uccf) {
> + ugeth_err("%s: No handle passed.", __FUNCTION__);
> + return -EINVAL;
> + }
Ditto.
> +#ifdef CONFIG_UGETH_FILTERING
> +static enet_addr_container_t *get_enet_addr_container(void)
> +{
> + enet_addr_container_t *enet_addr_cont;
> +
> + /* allocate memory */
> + enet_addr_cont =
> + (enet_addr_container_t *) kmalloc(sizeof(enet_addr_container_t),
Unneeded typecast.
> +
> +static inline int compare_addr(enet_addr_t * addr1, enet_addr_t * addr2)
> +{
> + return strncmp((char *)addr1, (char *)addr2,
> + ENET_NUM_OCTETS_PER_ADDRESS);
> +}
Shouldn't this use memcmp()? strncmp() will stop at 0x00.
> + mem_disp((u8 *) & ugeth->p_thread_data_tx[i],
> + sizeof(ucc_geth_thread_data_tx_t));
We should have a kernel-wide printk-a-block-of-memory-out library function,
but we don't.
> +static int init_check_frame_length_mode(int length_check,
> + volatile u32 * maccfg2_register)
> +{
> + u32 value = 0;
Unneeded initialisation (lots of places).
> + value = in_be32(maccfg2_register);
> +/* Called every time the controller might need to be made
> + * aware of new link state. The PHY code conveys this
> + * information through variables in the ugeth structure, and this
> + * function converts those variables into the appropriate
> + * register values, and can bring down the device if needed.
> + */
> +#include <linux/mii.h>
This is a funny place to be including a header file. Better to put it at
the top of the .c file.
[remainder skipped - it's a big driver]
^ permalink raw reply
* Re: Please pull from 'for_paulus' branch of powerpc
From: Jon Loeliger @ 2006-06-28 22:44 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
In-Reply-To: <Pine.LNX.4.44.0606280057580.2211-100000@gate.crashing.org>
So, like, the other day Kumar Gala mumbled:
> Please pull from 'for_paulus' branch of
> master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git
>
> to receive the following updates:
>
> arch/powerpc/kernel/cputable.c | 12 --
> arch/powerpc/platforms/86xx/mpc86xx.h | 8 +
> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 128 +++++++++++++++++++++++++-
> -
> arch/powerpc/platforms/86xx/mpc86xx_smp.c | 9 -
> arch/powerpc/platforms/86xx/pci.c | 136 +-------------------------
> ---
> include/asm-powerpc/mpc86xx.h | 4
> 6 files changed, 138 insertions(+), 159 deletions(-)
>
> Kumar Gala:
> powerpc: minor cleanups for mpc86xx
>
Kumar,
Looks good to me. I'll pull them to the 86xx tree.
Thanks!
jdl
^ permalink raw reply
* Re: 2.6.17-mm2
From: Martin J. Bligh @ 2006-06-29 0:17 UTC (permalink / raw)
To: Martin Bligh
Cc: Andrew Morton, jeremy, drfickle, linux-kernel, mbligh,
linuxppc64-dev
In-Reply-To: <44A2DA40.40502@google.com>
Martin Bligh wrote:
>>> How the hell did you figure that one out?
>>
>>
>> Found a way to reproduce it - do `cat /proc/slabinfo > /dev/null' in a
>> tight loop. With that happening, a little two-way wasn't able to make
>> it through `dbench 4' without soiling the upholstery. Then
>> bisection-searching.
>
>
> Aha. we probably trigger it because the automated test harness dumps a
> bunch of crap out of /proc before and after running dbench then ;-)
OK, your patch does seem to fix it for the automated tests. Not 100%
reliable, since it was a little intermittent before, but it looks
good.
Thanks to both Andrew and Andy.
M.
^ permalink raw reply
* Yosemite board w/ppc440ep NETDEV WATCHDOG: eth0: transmit timed out
From: Rocky Mussadi @ 2006-06-29 1:10 UTC (permalink / raw)
To: linuxppc-embedded
Hi,
We are on the Yosemite reference board with IBM PPC440EP ver 2.0. On
this board, if we pass traffic from eth0 to eth1 and back, we run into
an eth0 and eth1 transmit lockup consistently. We use "nuttcp -T 2" to
generate the traffic. The interfaces are operating at 100/full
(autonegotiated). We have seen this with several different kernels up to
kernel 2.6.17. When the lockup occurs we see the message:
NETDEV WATCHDOG: eth0: transmit timed out
The only way to recover is via reboot.
Please note, we are running no software on the board except for the
kernel. This is the kernel that came with the reference board. The
driver being used is the ibm_emac driver.
Thanks for any help!
Rocky
^ permalink raw reply
* [PATCH 1/3] Add support for the Freescale MPC8349E-mITX eval board
From: Kim Phillips @ 2006-06-29 2:13 UTC (permalink / raw)
To: linuxppc-dev
Add support for the Freescale MPC8349E-mITX eval board
This is largely based on 8349 SYS code except that it uses the new rtc_class code in drivers/rtc instead of explicitly specifying the rtc chip. SATA is untested, as this is work in progress.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
---
arch/powerpc/platforms/83xx/Kconfig | 11 ++
arch/powerpc/platforms/83xx/Makefile | 1
arch/powerpc/platforms/83xx/misc.c | 52 +++++++++
arch/powerpc/platforms/83xx/mpc834x_itx.c | 166 +++++++++++++++++++++++++++++
arch/powerpc/platforms/83xx/mpc834x_itx.h | 23 ++++
arch/powerpc/platforms/83xx/mpc83xx.h | 5 +
include/asm-ppc/mpc83xx.h | 4 +
7 files changed, 261 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/platforms/83xx/mpc834x_itx.c
create mode 100644 arch/powerpc/platforms/83xx/mpc834x_itx.h
3182b4a50027d17badab0c7b8dc2fd4d8fc307b0
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 7675e67..5fe7b7f 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -16,12 +16,21 @@ config MPC834x_SYS
3 PCI slots. The PIBs PCI initialization is the bootloader's
responsiblilty.
+config MPC834x_ITX
+ bool "Freescale MPC834x ITX"
+ select DEFAULT_UIMAGE
+ help
+ This option enables support for the MPC 834x ITX evaluation board.
+
+ Be aware that PCI initialization is the bootloader's
+ responsiblilty.
+
endchoice
config MPC834x
bool
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
- default y if MPC834x_SYS
+ default y if MPC834x_SYS || MPC834x_ITX
endmenu
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 5c72367..9387a11 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -4,3 +4,4 @@
obj-y := misc.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o
+obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/platforms/83xx/misc.c
index 1455bce..568a8f7 100644
--- a/arch/powerpc/platforms/83xx/misc.c
+++ b/arch/powerpc/platforms/83xx/misc.c
@@ -53,3 +53,55 @@ long __init mpc83xx_time_init(void)
return 0;
}
+
+#ifdef CONFIG_RTC_CLASS
+int mpc83xx_set_rtc_time(struct rtc_time *tm)
+{
+ int err;
+ struct class_device *class_dev =
+ rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
+
+ if (class_dev == NULL) {
+ printk("%s: unable to open rtc device (%s)\n",
+ __FUNCTION__, CONFIG_RTC_HCTOSYS_DEVICE);
+ return -ENODEV;
+ }
+
+ err = rtc_set_time(class_dev, tm);
+ if (err != 0)
+ dev_err(class_dev->dev,
+ "%s: unable to set the hardware clock\n",__FUNCTION__);
+
+ rtc_class_close(class_dev);
+
+ return 0;
+}
+
+void mpc83xx_get_rtc_time(struct rtc_time *tm)
+{
+ int err;
+ struct class_device *class_dev =
+ rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
+
+ if (class_dev == NULL) {
+ printk("%s: unable to open rtc device (%s)\n",
+ __FUNCTION__, CONFIG_RTC_HCTOSYS_DEVICE);
+ return;
+ }
+
+ err = rtc_read_time(class_dev, tm);
+ if (err == 0) {
+ err = rtc_valid_tm(tm);
+ if (err != 0)
+ dev_err(class_dev->dev,
+ "%s: invalid date/time\n",__FUNCTION__);
+ }
+ else
+ dev_err(class_dev->dev,
+ "%s: unable to read the hardware clock\n",__FUNCTION__);
+
+ rtc_class_close(class_dev);
+
+ return;
+}
+#endif /* CONFIG_RTC_CLASS */
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
new file mode 100644
index 0000000..0a3f58a
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -0,0 +1,166 @@
+/*
+ * arch/powerpc/platforms/83xx/mpc834x_itx.c
+ *
+ * MPC834x ITX board specific routines
+ *
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/config.h>
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/errno.h>
+#include <linux/reboot.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/major.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+#include <linux/root_dev.h>
+
+#include <asm/system.h>
+#include <asm/atomic.h>
+#include <asm/time.h>
+#include <asm/io.h>
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <sysdev/fsl_soc.h>
+
+#include "mpc83xx.h"
+
+#ifndef CONFIG_PCI
+unsigned long isa_io_base = 0;
+unsigned long isa_mem_base = 0;
+#endif
+
+#ifdef CONFIG_PCI
+static int
+mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+{
+ static char pci_irq_table[][4] =
+ /*
+ * PCI IDSEL/INTPIN->INTLINE
+ * A B C D
+ */
+ {
+ {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x0e */
+ {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x0f */
+ {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x10 */
+ };
+
+ const long min_idsel = 0x0e, max_idsel = 0x10, irqs_per_slot = 4;
+ return PCI_IRQ_TABLE_LOOKUP;
+}
+#endif /* CONFIG_PCI */
+
+/* ************************************************************************
+ *
+ * Setup the architecture
+ *
+ */
+static void __init mpc834x_itx_setup_arch(void)
+{
+ struct device_node *np;
+
+ if (ppc_md.progress)
+ ppc_md.progress("mpc834x_itx_setup_arch()", 0);
+
+ np = of_find_node_by_type(NULL, "cpu");
+ if (np != 0) {
+ unsigned int *fp =
+ (int *)get_property(np, "clock-frequency", NULL);
+ if (fp != 0)
+ loops_per_jiffy = *fp / HZ;
+ else
+ loops_per_jiffy = 50000000 / HZ;
+ of_node_put(np);
+ }
+#ifdef CONFIG_PCI
+ for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
+ add_bridge(np);
+
+ ppc_md.pci_swizzle = common_swizzle;
+ ppc_md.pci_map_irq = mpc83xx_map_irq;
+ ppc_md.pci_exclude_device = mpc83xx_exclude_device;
+#endif
+
+#ifdef CONFIG_ROOT_NFS
+ ROOT_DEV = Root_NFS;
+#else
+ ROOT_DEV = Root_HDA1;
+#endif
+}
+
+void __init mpc834x_itx_init_IRQ(void)
+{
+ u8 senses[8] = {
+ 0, /* EXT 0 */
+ IRQ_SENSE_LEVEL, /* EXT 1 */
+ IRQ_SENSE_LEVEL, /* EXT 2 */
+ 0, /* EXT 3 */
+#ifdef CONFIG_PCI
+ IRQ_SENSE_LEVEL, /* EXT 4 */
+ IRQ_SENSE_LEVEL, /* EXT 5 */
+ IRQ_SENSE_LEVEL, /* EXT 6 */
+ IRQ_SENSE_LEVEL, /* EXT 7 */
+#else
+ 0, /* EXT 4 */
+ 0, /* EXT 5 */
+ 0, /* EXT 6 */
+ 0, /* EXT 7 */
+#endif
+ };
+
+ ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8);
+
+ /* Initialize the default interrupt mapping priorities,
+ * in case the boot rom changed something on us.
+ */
+ ipic_set_default_priority();
+}
+
+#ifdef CONFIG_RTC_CLASS
+static int __init mpc834x_rtc_hookup(void)
+{
+ ppc_md.get_rtc_time = mpc83xx_get_rtc_time;
+ ppc_md.set_rtc_time = mpc83xx_set_rtc_time;
+
+ return 0;
+}
+
+late_initcall(mpc834x_rtc_hookup);
+#endif
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc834x_itx_probe(void)
+{
+ /* We always match for now, eventually we should look at the flat
+ dev tree to ensure this is the board we are suppose to run on
+ */
+ return 1;
+}
+
+define_machine(mpc834x_itx) {
+ .name = "MPC834x ITX",
+ .probe = mpc834x_itx_probe,
+ .setup_arch = mpc834x_itx_setup_arch,
+ .init_IRQ = mpc834x_itx_init_IRQ,
+ .get_irq = ipic_get_irq,
+ .restart = mpc83xx_restart,
+ .time_init = mpc83xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.h b/arch/powerpc/platforms/83xx/mpc834x_itx.h
new file mode 100644
index 0000000..174ca4e
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.h
@@ -0,0 +1,23 @@
+/*
+ * arch/powerpc/platforms/83xx/mpc834x_itx.h
+ *
+ * MPC834X ITX common board definitions
+ *
+ * Maintainer: Kumar Gala <galak@kernel.crashing.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef __MACH_MPC83XX_ITX_H__
+#define __MACH_MPC83XX_ITX_H__
+
+#define PIRQA MPC83xx_IRQ_EXT4
+#define PIRQB MPC83xx_IRQ_EXT5
+#define PIRQC MPC83xx_IRQ_EXT6
+#define PIRQD MPC83xx_IRQ_EXT7
+
+#endif /* __MACH_MPC83XX_ITX_H__ */
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index 01cae10..532a084 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -3,6 +3,7 @@
#include <linux/init.h>
#include <linux/device.h>
+#include <linux/rtc.h>
/*
* Declaration for the various functions exported by the
@@ -13,5 +14,9 @@ extern int add_bridge(struct device_node
extern int mpc83xx_exclude_device(u_char bus, u_char devfn);
extern void mpc83xx_restart(char *cmd);
extern long mpc83xx_time_init(void);
+#ifdef CONFIG_RTC_CLASS
+extern int mpc83xx_set_rtc_time(struct rtc_time *tm);
+extern void mpc83xx_get_rtc_time(struct rtc_time *tm);
+#endif
#endif /* __MPC83XX_H__ */
diff --git a/include/asm-ppc/mpc83xx.h b/include/asm-ppc/mpc83xx.h
index 02ed2c3..80076be 100644
--- a/include/asm-ppc/mpc83xx.h
+++ b/include/asm-ppc/mpc83xx.h
@@ -25,6 +25,10 @@
#include <platforms/83xx/mpc834x_sys.h>
#endif
+#ifdef CONFIG_MPC834x_ITX
+#include <platforms/83xx/mpc834x_itx.h>
+#endif
+
#define _IO_BASE isa_io_base
#define _ISA_MEM_BASE isa_mem_base
#ifdef CONFIG_PCI
--
1.2.4
^ permalink raw reply related
* [PATCH 3/3] provide default configuration for MPC8349mITX board
From: Kim Phillips @ 2006-06-29 2:13 UTC (permalink / raw)
To: linuxppc-dev
provide default configuration for MPC8349mITX board
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
---
arch/powerpc/configs/mpc834x_itx_defconfig | 1328 ++++++++++++++++++++++++++++
1 files changed, 1328 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/configs/mpc834x_itx_defconfig
2d4cb255680afd6587fd3475900ff25dbff4b9e9
diff --git a/arch/powerpc/configs/mpc834x_itx_defconfig b/arch/powerpc/configs/mpc834x_itx_defconfig
new file mode 100644
index 0000000..2c02cf9
--- /dev/null
+++ b/arch/powerpc/configs/mpc834x_itx_defconfig
@@ -0,0 +1,1328 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.17
+# Wed Jun 28 19:20:06 2006
+#
+# CONFIG_PPC64 is not set
+CONFIG_PPC32=y
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_PPC_UDBG_16550=y
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_DEFAULT_UIMAGE=y
+
+#
+# Processor support
+#
+# CONFIG_CLASSIC32 is not set
+# CONFIG_PPC_52xx is not set
+# CONFIG_PPC_82xx is not set
+CONFIG_PPC_83xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_86xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_8xx is not set
+# CONFIG_E200 is not set
+CONFIG_6xx=y
+CONFIG_83xx=y
+CONFIG_PPC_FPU=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_SMP is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# Code maturity level options
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+
+#
+# General setup
+#
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+# CONFIG_POSIX_MQUEUE is not set
+# CONFIG_BSD_PROCESS_ACCT is not set
+CONFIG_SYSCTL=y
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+# CONFIG_RELAY is not set
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EMBEDDED=y
+# CONFIG_KALLSYMS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+# CONFIG_EPOLL is not set
+CONFIG_SHMEM=y
+CONFIG_SLAB=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_SLOB is not set
+
+#
+# Loadable module support
+#
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+# CONFIG_MODULE_FORCE_UNLOAD is not set
+# CONFIG_MODVERSIONS is not set
+# CONFIG_MODULE_SRCVERSION_ALL is not set
+# CONFIG_KMOD is not set
+
+#
+# Block layer
+#
+# CONFIG_LBD is not set
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+CONFIG_IOSCHED_DEADLINE=y
+CONFIG_IOSCHED_CFQ=y
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+CONFIG_PPC_GEN550=y
+# CONFIG_WANT_EARLY_SERIAL is not set
+
+#
+# Platform support
+#
+# CONFIG_MPC834x_SYS is not set
+CONFIG_MPC834x_ITX=y
+CONFIG_MPC834x=y
+
+#
+# Kernel options
+#
+# CONFIG_HIGHMEM is not set
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+# CONFIG_BINFMT_MISC is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+# CONFIG_SOFTWARE_SUSPEND is not set
+CONFIG_SECCOMP=y
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_GENERIC_ISA_DMA=y
+# CONFIG_PPC_I8259 is not set
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_FSL_SOC=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+# CONFIG_PCIEPORTBUS is not set
+# CONFIG_PCI_DEBUG is not set
+
+#
+# PCCARD (PCMCIA/CardBus) support
+#
+# CONFIG_PCCARD is not set
+
+#
+# PCI Hotplug Support
+#
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0x80000000
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+# CONFIG_NETDEBUG is not set
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+# CONFIG_XFRM_USER is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_BIC=y
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+
+#
+# DCCP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_DCCP is not set
+
+#
+# SCTP Configuration (EXPERIMENTAL)
+#
+# CONFIG_IP_SCTP is not set
+
+#
+# TIPC Configuration (EXPERIMENTAL)
+#
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_NET_DIVERT is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+
+#
+# QoS and/or fair queueing
+#
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_IEEE80211 is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_DEBUG_DRIVER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+
+#
+# Connector - unified userspace <-> kernelspace linker
+#
+# CONFIG_CONNECTOR is not set
+
+#
+# Memory Technology Devices (MTD)
+#
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+# CONFIG_MTD_CONCAT is not set
+# CONFIG_MTD_PARTITIONS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+# CONFIG_MTD_BLOCK is not set
+# CONFIG_MTD_BLOCK_RO is not set
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_NOSWAP=y
+# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
+# CONFIG_MTD_CFI_GEOMETRY is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_OTP is not set
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_STAA=y
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_RAM=y
+CONFIG_MTD_ROM=y
+CONFIG_MTD_ABSENT=y
+# CONFIG_MTD_OBSOLETE_CHIPS is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_DATAFLASH is not set
+# CONFIG_MTD_M25P80 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+
+#
+# NAND Flash Device Drivers
+#
+# CONFIG_MTD_NAND is not set
+
+#
+# OneNAND Flash Device Drivers
+#
+# CONFIG_MTD_ONENAND is not set
+
+#
+# Parallel port support
+#
+# CONFIG_PARPORT is not set
+
+#
+# Plug and Play support
+#
+
+#
+# Block devices
+#
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+
+#
+# ATA/ATAPI/MFM/RLL support
+#
+CONFIG_IDE=y
+# CONFIG_BLK_DEV_IDE is not set
+# CONFIG_BLK_DEV_HD_ONLY is not set
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+
+#
+# SCSI Transport Attributes
+#
+CONFIG_SCSI_SPI_ATTRS=y
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_ATTRS is not set
+
+#
+# SCSI low-level drivers
+#
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+CONFIG_SCSI_SATA=y
+# CONFIG_SCSI_SATA_AHCI is not set
+# CONFIG_SCSI_SATA_SVW is not set
+# CONFIG_SCSI_ATA_PIIX is not set
+# CONFIG_SCSI_SATA_MV is not set
+# CONFIG_SCSI_SATA_NV is not set
+# CONFIG_SCSI_PDC_ADMA is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_SATA_QSTOR is not set
+# CONFIG_SCSI_SATA_PROMISE is not set
+# CONFIG_SCSI_SATA_SX4 is not set
+CONFIG_SCSI_SATA_SIL=y
+# CONFIG_SCSI_SATA_SIL24 is not set
+# CONFIG_SCSI_SATA_SIS is not set
+# CONFIG_SCSI_SATA_ULI is not set
+# CONFIG_SCSI_SATA_VIA is not set
+# CONFIG_SCSI_SATA_VITESSE is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+
+#
+# Multi-device support (RAID and LVM)
+#
+CONFIG_MD=y
+CONFIG_BLK_DEV_MD=y
+CONFIG_MD_LINEAR=y
+CONFIG_MD_RAID0=y
+CONFIG_MD_RAID1=y
+# CONFIG_MD_RAID10 is not set
+# CONFIG_MD_RAID456 is not set
+# CONFIG_MD_MULTIPATH is not set
+# CONFIG_MD_FAULTY is not set
+# CONFIG_BLK_DEV_DM is not set
+
+#
+# Fusion MPT device support
+#
+# CONFIG_FUSION is not set
+# CONFIG_FUSION_SPI is not set
+# CONFIG_FUSION_FC is not set
+# CONFIG_FUSION_SAS is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_IEEE1394 is not set
+
+#
+# I2O device support
+#
+# CONFIG_I2O is not set
+
+#
+# Macintosh device drivers
+#
+# CONFIG_WINDFARM is not set
+
+#
+# Network device support
+#
+CONFIG_NETDEVICES=y
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+
+#
+# ARCnet devices
+#
+# CONFIG_ARCNET is not set
+
+#
+# PHY device support
+#
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+CONFIG_CICADA_PHY=y
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+
+#
+# Ethernet (10 or 100Mbit)
+#
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+
+#
+# Tulip family network device support
+#
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_DGRS is not set
+# CONFIG_EEPRO100 is not set
+CONFIG_E100=y
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+# CONFIG_8139TOO is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+
+#
+# Ethernet (1000 Mbit)
+#
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+# CONFIG_E1000 is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_GIANFAR=y
+CONFIG_GFAR_NAPI=y
+
+#
+# Ethernet (10000 Mbit)
+#
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+
+#
+# Token Ring devices
+#
+# CONFIG_TR is not set
+
+#
+# Wireless LAN (non-hamradio)
+#
+# CONFIG_NET_RADIO is not set
+
+#
+# Wan interfaces
+#
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+
+#
+# ISDN subsystem
+#
+# CONFIG_ISDN is not set
+
+#
+# Telephony Support
+#
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+
+#
+# Userland interfaces
+#
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_TSDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+# CONFIG_VT is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_PCI=y
+CONFIG_SERIAL_8250_NR_UARTS=4
+CONFIG_SERIAL_8250_RUNTIME_UARTS=4
+# CONFIG_SERIAL_8250_EXTENDED is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+
+#
+# IPMI
+#
+# CONFIG_IPMI_HANDLER is not set
+
+#
+# Watchdog Cards
+#
+CONFIG_WATCHDOG=y
+# CONFIG_WATCHDOG_NOWAYOUT is not set
+
+#
+# Watchdog Device Drivers
+#
+# CONFIG_SOFT_WATCHDOG is not set
+CONFIG_83xx_WDT=y
+
+#
+# PCI-based Watchdog Cards
+#
+# CONFIG_PCIPCWATCHDOG is not set
+# CONFIG_WDTPCI is not set
+
+#
+# USB-based Watchdog Cards
+#
+# CONFIG_USBPCWATCHDOG is not set
+CONFIG_HW_RANDOM=y
+# CONFIG_NVRAM is not set
+# CONFIG_GEN_RTC is not set
+# CONFIG_DTLK is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+
+#
+# Ftape, the floppy tape device driver
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_RAW_DRIVER is not set
+
+#
+# TPM devices
+#
+# CONFIG_TCG_TPM is not set
+# CONFIG_TELCLOCK is not set
+
+#
+# I2C support
+#
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+CONFIG_I2C_MPC=y
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_STUB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_ISA is not set
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+CONFIG_SPI=y
+# CONFIG_SPI_DEBUG is not set
+CONFIG_SPI_MASTER=y
+
+#
+# SPI Master Controller Drivers
+#
+CONFIG_SPI_BITBANG=y
+CONFIG_SPI_MPC83xx=y
+
+#
+# SPI Protocol Masters
+#
+
+#
+# Dallas's 1-wire bus
+#
+
+#
+# Hardware Monitoring support
+#
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_ABITUGURU is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ASB100 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_FSCHER is not set
+# CONFIG_SENSORS_FSCPOS is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM70 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+
+#
+# Misc devices
+#
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+CONFIG_VIDEO_V4L2=y
+
+#
+# Digital Video Broadcasting Devices
+#
+# CONFIG_DVB is not set
+# CONFIG_USB_DABUSB is not set
+
+#
+# Graphics support
+#
+CONFIG_FIRMWARE_EDID=y
+# CONFIG_FB is not set
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+
+#
+# USB support
+#
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_BANDWIDTH is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_SPLIT_ISO is not set
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_BIG_ENDIAN is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+CONFIG_USB_UHCI_HCD=y
+# CONFIG_USB_SL811_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+CONFIG_USB_STORAGE=y
+# CONFIG_USB_STORAGE_DEBUG is not set
+# CONFIG_USB_STORAGE_DATAFAB is not set
+# CONFIG_USB_STORAGE_FREECOM is not set
+# CONFIG_USB_STORAGE_DPCM is not set
+# CONFIG_USB_STORAGE_USBAT is not set
+# CONFIG_USB_STORAGE_SDDR09 is not set
+# CONFIG_USB_STORAGE_SDDR55 is not set
+# CONFIG_USB_STORAGE_JUMPSHOT is not set
+# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Input Devices
+#
+# CONFIG_USB_HID is not set
+
+#
+# USB HID Boot Protocol drivers
+#
+# CONFIG_USB_KBD is not set
+# CONFIG_USB_MOUSE is not set
+# CONFIG_USB_AIPTEK is not set
+# CONFIG_USB_WACOM is not set
+# CONFIG_USB_ACECAD is not set
+# CONFIG_USB_KBTAB is not set
+# CONFIG_USB_POWERMATE is not set
+# CONFIG_USB_TOUCHSCREEN is not set
+# CONFIG_USB_YEALINK is not set
+# CONFIG_USB_XPAD is not set
+# CONFIG_USB_ATI_REMOTE is not set
+# CONFIG_USB_ATI_REMOTE2 is not set
+# CONFIG_USB_KEYSPAN_REMOTE is not set
+# CONFIG_USB_APPLETOUCH is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGETKIT is not set
+# CONFIG_USB_PHIDGETSERVO is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+CONFIG_USB_GADGET=y
+# CONFIG_USB_GADGET_DEBUG_FILES is not set
+CONFIG_USB_GADGET_SELECTED=y
+CONFIG_USB_GADGET_NET2280=y
+CONFIG_USB_NET2280=y
+# CONFIG_USB_GADGET_PXA2XX is not set
+# CONFIG_USB_GADGET_GOKU is not set
+# CONFIG_USB_GADGET_LH7A40X is not set
+# CONFIG_USB_GADGET_OMAP is not set
+# CONFIG_USB_GADGET_AT91 is not set
+# CONFIG_USB_GADGET_DUMMY_HCD is not set
+CONFIG_USB_GADGET_DUALSPEED=y
+# CONFIG_USB_ZERO is not set
+CONFIG_USB_ETH=y
+CONFIG_USB_ETH_RNDIS=y
+# CONFIG_USB_GADGETFS is not set
+# CONFIG_USB_FILE_STORAGE is not set
+# CONFIG_USB_G_SERIAL is not set
+
+#
+# MMC/SD Card support
+#
+# CONFIG_MMC is not set
+
+#
+# LED devices
+#
+# CONFIG_NEW_LEDS is not set
+
+#
+# LED drivers
+#
+
+#
+# LED Triggers
+#
+
+#
+# InfiniBand support
+#
+# CONFIG_INFINIBAND is not set
+
+#
+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
+#
+
+#
+# Real Time Clock
+#
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+CONFIG_RTC_INTF_DEV_UIE_EMUL=y
+
+#
+# RTC drivers
+#
+# CONFIG_RTC_DRV_X1205 is not set
+CONFIG_RTC_DRV_DS1307=y
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_TEST is not set
+# CONFIG_RTC_DRV_MAX6902 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# DMA Engine support
+#
+CONFIG_DMA_ENGINE=y
+
+#
+# DMA Clients
+#
+CONFIG_NET_DMA=y
+
+#
+# DMA Devices
+#
+CONFIG_INTEL_IOATDMA=y
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+CONFIG_JBD=y
+# CONFIG_JBD_DEBUG is not set
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_HUGETLB_PAGE is not set
+CONFIG_RAMFS=y
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+
+#
+# Network File Systems
+#
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+# CONFIG_NFS_V3_ACL is not set
+CONFIG_NFS_V4=y
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_LOCKD_V4=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+CONFIG_SUNRPC_GSS=y
+CONFIG_RPCSEC_GSS_KRB5=y
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+# CONFIG_9P_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+# CONFIG_MSDOS_PARTITION is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+
+#
+# Native Language Support
+#
+# CONFIG_NLS is not set
+
+#
+# Library routines
+#
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+CONFIG_CRC32=y
+# CONFIG_LIBCRC32C is not set
+
+#
+# Instrumentation Support
+#
+# CONFIG_PROFILING is not set
+
+#
+# Kernel hacking
+#
+CONFIG_PRINTK_TIME=y
+# CONFIG_MAGIC_SYSRQ is not set
+CONFIG_DEBUG_KERNEL=y
+CONFIG_LOG_BUF_SHIFT=17
+CONFIG_DETECT_SOFTLOCKUP=y
+# CONFIG_SCHEDSTATS is not set
+# CONFIG_DEBUG_SLAB is not set
+# CONFIG_DEBUG_MUTEXES is not set
+# CONFIG_DEBUG_SPINLOCK is not set
+# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
+# CONFIG_DEBUG_KOBJECT is not set
+CONFIG_DEBUG_INFO=y
+# CONFIG_DEBUG_FS is not set
+# CONFIG_DEBUG_VM is not set
+CONFIG_FORCED_INLINING=y
+# CONFIG_RCU_TORTURE_TEST is not set
+# CONFIG_DEBUGGER is not set
+# CONFIG_BDI_SWITCH is not set
+CONFIG_BOOTX_TEXT=y
+CONFIG_SERIAL_TEXT_DEBUG=y
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+
+#
+# Cryptographic options
+#
+CONFIG_CRYPTO=y
+# CONFIG_CRYPTO_HMAC is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_MD4 is not set
+CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_SHA1 is not set
+# CONFIG_CRYPTO_SHA256 is not set
+# CONFIG_CRYPTO_SHA512 is not set
+# CONFIG_CRYPTO_WP512 is not set
+# CONFIG_CRYPTO_TGR192 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_CAST5 is not set
+# CONFIG_CRYPTO_CAST6 is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_KHAZAD is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_DEFLATE is not set
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
+# CONFIG_CRYPTO_CRC32C is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Hardware crypto devices
+#
--
1.2.4
^ permalink raw reply related
* [PATCH 2/3] Add support for the Cicada 8201 PHY
From: Kim Phillips @ 2006-06-29 2:13 UTC (permalink / raw)
To: netdev, linuxppc-dev; +Cc: jeff
Add support for the Cicada 8201 PHY, a.k.a Vitesse VSC8201. This PHY is present on the MPC8349mITX.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
---
drivers/net/phy/cicada.c | 42 ++++++++++++++++++++++++++++++++++++------
1 files changed, 36 insertions(+), 6 deletions(-)
9834dea86d3620e223584ebc2b04fda4e44092a9
diff --git a/drivers/net/phy/cicada.c b/drivers/net/phy/cicada.c
index 7d8d534..b755c86 100644
--- a/drivers/net/phy/cicada.c
+++ b/drivers/net/phy/cicada.c
@@ -104,7 +104,22 @@ static int cis820x_config_intr(struct ph
return err;
}
-/* Cicada 820x */
+/* Cicada 8201, a.k.a Vitesse VSC8201 */
+static struct phy_driver cis8201_driver = {
+ .phy_id = 0x000fc410,
+ .name = "Cicada Cis8201",
+ .phy_id_mask = 0x000ffff0,
+ .features = PHY_GBIT_FEATURES,
+ .flags = PHY_HAS_INTERRUPT,
+ .config_init = &cis820x_config_init,
+ .config_aneg = &genphy_config_aneg,
+ .read_status = &genphy_read_status,
+ .ack_interrupt = &cis820x_ack_interrupt,
+ .config_intr = &cis820x_config_intr,
+ .driver = { .owner = THIS_MODULE,},
+};
+
+/* Cicada 8204 */
static struct phy_driver cis8204_driver = {
.phy_id = 0x000fc440,
.name = "Cicada Cis8204",
@@ -119,15 +134,30 @@ static struct phy_driver cis8204_driver
.driver = { .owner = THIS_MODULE,},
};
-static int __init cis8204_init(void)
+static int __init cicada_init(void)
{
- return phy_driver_register(&cis8204_driver);
+ int ret;
+
+ ret = phy_driver_register(&cis8204_driver);
+ if (ret)
+ goto err1;
+
+ ret = phy_driver_register(&cis8201_driver);
+ if (ret)
+ goto err2;
+ return 0;
+
+err2:
+ phy_driver_unregister(&cis8204_driver);
+err1:
+ return ret;
}
-static void __exit cis8204_exit(void)
+static void __exit cicada_exit(void)
{
phy_driver_unregister(&cis8204_driver);
+ phy_driver_unregister(&cis8201_driver);
}
-module_init(cis8204_init);
-module_exit(cis8204_exit);
+module_init(cicada_init);
+module_exit(cicada_exit);
--
1.2.4
^ permalink raw reply related
* Re: Xilinx SystemACE driver for 2.6
From: sudheer @ 2006-06-29 2:45 UTC (permalink / raw)
To: Ameet Patil; +Cc: linuxppc-embedded
In-Reply-To: <44A2C7CE.9070302@gmail.com>
Hi Ameet,
Your mail is not clear.
Ameet Patil wrote:
>Hi,
> I have ported System Ace driver from 2.4 to 2.6.
>
Hope you have ported System Ace Driver from 2.4 to 2.6.
>Please post the patch soon.
>
>
Or else you are asking the group for patch to port it.
Please make it clear.
I am looking for the same .
Thanks
Sudheer
>-Ameet
>_______________________________________________
>Linuxppc-embedded mailing list
>Linuxppc-embedded@ozlabs.org
>https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
>
>
^ permalink raw reply
* RE: Please pull from 'for_paulus' branch of powerpc
From: Zhang Wei-r63237 @ 2006-06-29 3:33 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
>
> On Jun 28, 2006, at 1:26 AM, Zhang Wei-r63237 wrote:
>
> > Hi, Kumar,
> >
> > Why moving these codes from pci.c to mpc86xx_hpcn.c? It's
> not must be.
> > These functions relate to PCI device of MPC8641D HPCn platform.
> > And we can also see the 'DECLARE_PCI_FIXUP_HEADER()' declaration in
> > pci.c of Powermac platform.
>
> The point for moving is 86xx/pci.c should apply to all 86xx
> systems, not just the HPCn system.
>
> - kumar
The codes of moving is for PCI devices, it's for HPCn system now, but it's also fit for the same PCI chips in the other 86xx system and the same chip should keep the same setting in 86xx platforms, I think so.
Even though other 86xx platforms have no these PCI chips, these codes will not take effect.
And we can also see the similar solution in pSeries and PowerMac platforms pci.c file. The function 'fixup_winbond_82c105' in pseries/pci.c is for the Winbond 82c105 IDE controller on p610. (pSeries have only p610? :-D ) The function 'fixup_k2_sata' in powermac/pci.c is for K2-SATA. (K2-SATA chip is in all PowerMac machine? ;-) )
The moving will make the mpc86xx_hpcn.c more fat.
Thanks,
Zhang Wei
>
> >> -----Original Message-----
> >> From: linuxppc-dev-bounces+wei.zhang=freescale.com@ozlabs.org
> >> [mailto:linuxppc-dev-bounces+wei.zhang=freescale.com@ozlabs.or
> >> g] On Behalf Of Kumar Gala
> >> Sent: Wednesday, June 28, 2006 2:01 PM
> >> To: Paul Mackerras
> >> Cc: linuxppc-dev@ozlabs.org; linux-kernel@vger.kernel.org
> >> Subject: Please pull from 'for_paulus' branch of powerpc
> >>
> >> Please pull from 'for_paulus' branch of
> >> master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git
> >>
> >> to receive the following updates:
> >>
> >> arch/powerpc/kernel/cputable.c | 12 --
> >> arch/powerpc/platforms/86xx/mpc86xx.h | 8 +
> >> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 128
> >> +++++++++++++++++++++++++--
> >> arch/powerpc/platforms/86xx/mpc86xx_smp.c | 9 -
> >> arch/powerpc/platforms/86xx/pci.c | 136
> >> +----------------------------
> >> include/asm-powerpc/mpc86xx.h | 4
> >> 6 files changed, 138 insertions(+), 159 deletions(-)
> >>
> >> Kumar Gala:
> >> powerpc: minor cleanups for mpc86xx
> >>
> >> diff --git a/arch/powerpc/kernel/cputable.c
> >> b/arch/powerpc/kernel/cputable.c index 1c11488..abf7d42 100644
> >> --- a/arch/powerpc/kernel/cputable.c
> >> +++ b/arch/powerpc/kernel/cputable.c
> >> @@ -722,18 +722,6 @@ #if CLASSIC_PPC
> >> .oprofile_type = PPC_OPROFILE_G4,
> >> .platform = "ppc7450",
> >> },
> >> - { /* 8641 */
> >> - .pvr_mask = 0xffffffff,
> >> - .pvr_value = 0x80040010,
> >> - .cpu_name = "8641",
> >> - .cpu_features = CPU_FTRS_7447A,
> >> - .cpu_user_features = COMMON_USER |
> >> PPC_FEATURE_HAS_ALTIVEC_COMP,
> >> - .icache_bsize = 32,
> >> - .dcache_bsize = 32,
> >> - .num_pmcs = 6,
> >> - .cpu_setup = __setup_cpu_745x
> >> - },
> >> -
> >> { /* 82xx (8240, 8245, 8260 are all 603e cores) */
> >> .pvr_mask = 0x7fff0000,
> >> .pvr_value = 0x00810000,
> >> diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h
> >> b/arch/powerpc/platforms/86xx/mpc86xx.h
> >> index e3c9e4f..2834462 100644
> >> --- a/arch/powerpc/platforms/86xx/mpc86xx.h
> >> +++ b/arch/powerpc/platforms/86xx/mpc86xx.h
> >> @@ -15,11 +15,13 @@ #define __MPC86XX_H__
> >> * mpc86xx_* files. Mostly for use by mpc86xx_setup().
> >> */
> >>
> >> -extern int __init add_bridge(struct device_node *dev);
> >> +extern int add_bridge(struct device_node *dev);
> >>
> >> -extern void __init setup_indirect_pcie(struct
> pci_controller *hose,
> >> +extern int mpc86xx_exclude_device(u_char bus, u_char devfn);
> >> +
> >> +extern void setup_indirect_pcie(struct pci_controller *hose,
> >> u32 cfg_addr, u32
> >> cfg_data); -extern void __init
> >> setup_indirect_pcie_nomap(struct pci_controller *hose,
> >> +extern void setup_indirect_pcie_nomap(struct pci_controller *hose,
> >> void __iomem *cfg_addr,
> >> void __iomem *cfg_data);
> >>
> >> diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
> >> b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
> >> index 483c21d..ac7f418 100644
> >> --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
> >> +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
> >> @@ -36,6 +36,7 @@ #include <asm/mpic.h> #include
> <sysdev/fsl_soc.h>
> >>
> >> #include "mpc86xx.h"
> >> +#include "mpc8641_hpcn.h"
> >>
> >> #ifndef CONFIG_PCI
> >> unsigned long isa_io_base = 0;
> >> @@ -186,17 +187,130 @@ mpc86xx_map_irq(struct pci_dev *dev, uns
> >> return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; }
> >>
> >> +static void __devinit quirk_ali1575(struct pci_dev *dev) {
> >> + unsigned short temp;
> >> +
> >> + /*
> >> + * ALI1575 interrupts route table setup:
> >> + *
> >> + * IRQ pin IRQ#
> >> + * PIRQA ---- 3
> >> + * PIRQB ---- 4
> >> + * PIRQC ---- 5
> >> + * PIRQD ---- 6
> >> + * PIRQE ---- 9
> >> + * PIRQF ---- 10
> >> + * PIRQG ---- 11
> >> + * PIRQH ---- 12
> >> + *
> >> + * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
> >> + * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
> >> + */
> >> + pci_write_config_dword(dev, 0x48, 0xb9317542);
> >> +
> >> + /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
> >> + pci_write_config_byte(dev, 0x86, 0x0c);
> >> +
> >> + /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
> >> + pci_write_config_byte(dev, 0x87, 0x0d);
> >> +
> >> + /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
> >> + pci_write_config_byte(dev, 0x88, 0x0f);
> >> +
> >> + /* USB 2.0 controller, interrupt: PIRQ7 */
> >> + pci_write_config_byte(dev, 0x74, 0x06);
> >> +
> >> + /* Audio controller, interrupt: PIRQE */
> >> + pci_write_config_byte(dev, 0x8a, 0x0c);
> >> +
> >> + /* Modem controller, interrupt: PIRQF */
> >> + pci_write_config_byte(dev, 0x8b, 0x0d);
> >> +
> >> + /* HD audio controller, interrupt: PIRQG */
> >> + pci_write_config_byte(dev, 0x8c, 0x0e);
> >> +
> >> + /* Serial ATA interrupt: PIRQD */
> >> + pci_write_config_byte(dev, 0x8d, 0x0b);
> >> +
> >> + /* SMB interrupt: PIRQH */
> >> + pci_write_config_byte(dev, 0x8e, 0x0f);
> >> +
> >> + /* PMU ACPI SCI interrupt: PIRQH */
> >> + pci_write_config_byte(dev, 0x8f, 0x0f);
> >> +
> >> + /* Primary PATA IDE IRQ: 14
> >> + * Secondary PATA IDE IRQ: 15
> >> + */
> >> + pci_write_config_byte(dev, 0x44, 0x3d);
> >> + pci_write_config_byte(dev, 0x75, 0x0f);
> >> +
> >> + /* Set IRQ14 and IRQ15 to legacy IRQs */
> >> + pci_read_config_word(dev, 0x46, &temp);
> >> + temp |= 0xc000;
> >> + pci_write_config_word(dev, 0x46, temp);
> >> +
> >> + /* Set i8259 interrupt trigger
> >> + * IRQ 3: Level
> >> + * IRQ 4: Level
> >> + * IRQ 5: Level
> >> + * IRQ 6: Level
> >> + * IRQ 7: Level
> >> + * IRQ 9: Level
> >> + * IRQ 10: Level
> >> + * IRQ 11: Level
> >> + * IRQ 12: Level
> >> + * IRQ 14: Edge
> >> + * IRQ 15: Edge
> >> + */
> >> + outb(0xfa, 0x4d0);
> >> + outb(0x1e, 0x4d1);
> >> +}
> >>
> >> -int
> >> -mpc86xx_exclude_device(u_char bus, u_char devfn)
> >> +static void __devinit quirk_uli5288(struct pci_dev *dev)
> >> {
> >> -#if !defined(CONFIG_PCI)
> >> - if (bus == 0 && PCI_SLOT(devfn) == 0)
> >> - return PCIBIOS_DEVICE_NOT_FOUND;
> >> -#endif
> >> + unsigned char c;
> >> +
> >> + pci_read_config_byte(dev,0x83,&c);
> >> + c |= 0x80;
> >> + pci_write_config_byte(dev, 0x83, c);
> >> +
> >> + pci_write_config_byte(dev, 0x09, 0x01);
> >> + pci_write_config_byte(dev, 0x0a, 0x06);
> >> +
> >> + pci_read_config_byte(dev,0x83,&c);
> >> + c &= 0x7f;
> >> + pci_write_config_byte(dev, 0x83, c);
> >>
> >> - return PCIBIOS_SUCCESSFUL;
> >> + pci_read_config_byte(dev,0x84,&c);
> >> + c |= 0x01;
> >> + pci_write_config_byte(dev, 0x84, c);
> >> }
> >> +
> >> +static void __devinit quirk_uli5229(struct pci_dev *dev) {
> >> + unsigned short temp;
> >> + pci_write_config_word(dev, 0x04, 0x0405);
> >> + pci_read_config_word(dev, 0x4a, &temp);
> >> + temp |= 0x1000;
> >> + pci_write_config_word(dev, 0x4a, temp); }
> >> +
> >> +static void __devinit early_uli5249(struct pci_dev *dev) {
> >> + unsigned char temp;
> >> + pci_write_config_word(dev, 0x04, 0x0007);
> >> + pci_read_config_byte(dev, 0x7c, &temp);
> >> + pci_write_config_byte(dev, 0x7c, 0x80);
> >> + pci_write_config_byte(dev, 0x09, 0x01);
> >> + pci_write_config_byte(dev, 0x7c, temp);
> >> + dev->class |= 0x1;
> >> +}
> >> +
> >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575,
> quirk_ali1575);
> >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288,
> quirk_uli5288);
> >> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229,
> quirk_uli5229);
> >> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
> >> #endif /* CONFIG_PCI */
> >>
> >>
> >> diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
> >> b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
> >> index 944ec4b..9cca3d1 100644
> >> --- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
> >> +++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
> >> @@ -34,8 +34,8 @@ extern unsigned long __secondary_hold_ac static
> >> void __init smp_86xx_release_core(int nr) {
> >> - void *mcm_vaddr;
> >> - unsigned long vaddr, pcr;
> >> + __be32 __iomem *mcm_vaddr;
> >> + unsigned long pcr;
> >>
> >> if (nr < 0 || nr >= NR_CPUS)
> >> return;
> >> @@ -45,10 +45,9 @@ smp_86xx_release_core(int nr)
> >> */
> >> mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
> >> MPC86xx_MCM_SIZE);
> >> - vaddr = (unsigned long)mcm_vaddr + MCM_PORT_CONFIG_OFFSET;
> >> - pcr = in_be32((volatile unsigned *)vaddr);
> >> + pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
> >> pcr |= 1 << (nr + 24);
> >> - out_be32((volatile unsigned *)vaddr, pcr);
> >> + out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
> >> }
> >>
> >>
> >> diff --git a/arch/powerpc/platforms/86xx/pci.c
> >> b/arch/powerpc/platforms/86xx/pci.c
> >> index 5180df7..0d8b340 100644
> >> --- a/arch/powerpc/platforms/86xx/pci.c
> >> +++ b/arch/powerpc/platforms/86xx/pci.c
> >> @@ -122,15 +122,12 @@ static void __init setup_pcie_atmu(struc
> >> static void __init mpc86xx_setup_pcie(struct pci_controller *hose,
> >> u32 pcie_offset, u32 pcie_size) {
> >> - volatile struct ccsr_pex *pcie;
> >> u16 cmd;
> >> unsigned int temps;
> >>
> >> DBG("PCIE host controller register offset 0x%08x, size
> 0x%08x.\n",
> >> pcie_offset, pcie_size);
> >>
> >> - pcie = ioremap(pcie_offset, pcie_size);
> >> -
> >> early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
> >> cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER |
> PCI_COMMAND_MEMORY
> >> | PCI_COMMAND_IO;
> >> @@ -144,6 +141,14 @@ mpc86xx_setup_pcie(struct pci_controller
> >> early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); }
> >>
> >> +int mpc86xx_exclude_device(u_char bus, u_char devfn) {
> >> + if (bus == 0 && PCI_SLOT(devfn) == 0)
> >> + return PCIBIOS_DEVICE_NOT_FOUND;
> >> +
> >> + return PCIBIOS_SUCCESSFUL;
> >> +}
> >> +
> >> int __init add_bridge(struct device_node *dev) {
> >> int len;
> >> @@ -198,128 +203,3 @@ int __init add_bridge(struct device_node
> >>
> >> return 0;
> >> }
> >> -
> >> -static void __devinit quirk_ali1575(struct pci_dev *dev) -{
> >> - unsigned short temp;
> >> -
> >> - /*
> >> - * ALI1575 interrupts route table setup:
> >> - *
> >> - * IRQ pin IRQ#
> >> - * PIRQA ---- 3
> >> - * PIRQB ---- 4
> >> - * PIRQC ---- 5
> >> - * PIRQD ---- 6
> >> - * PIRQE ---- 9
> >> - * PIRQF ---- 10
> >> - * PIRQG ---- 11
> >> - * PIRQH ---- 12
> >> - *
> >> - * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
> >> - * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
> >> - */
> >> - pci_write_config_dword(dev, 0x48, 0xb9317542);
> >> -
> >> - /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
> >> - pci_write_config_byte(dev, 0x86, 0x0c);
> >> -
> >> - /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
> >> - pci_write_config_byte(dev, 0x87, 0x0d);
> >> -
> >> - /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
> >> - pci_write_config_byte(dev, 0x88, 0x0f);
> >> -
> >> - /* USB 2.0 controller, interrupt: PIRQ7 */
> >> - pci_write_config_byte(dev, 0x74, 0x06);
> >> -
> >> - /* Audio controller, interrupt: PIRQE */
> >> - pci_write_config_byte(dev, 0x8a, 0x0c);
> >> -
> >> - /* Modem controller, interrupt: PIRQF */
> >> - pci_write_config_byte(dev, 0x8b, 0x0d);
> >> -
> >> - /* HD audio controller, interrupt: PIRQG */
> >> - pci_write_config_byte(dev, 0x8c, 0x0e);
> >> -
> >> - /* Serial ATA interrupt: PIRQD */
> >> - pci_write_config_byte(dev, 0x8d, 0x0b);
> >> -
> >> - /* SMB interrupt: PIRQH */
> >> - pci_write_config_byte(dev, 0x8e, 0x0f);
> >> -
> >> - /* PMU ACPI SCI interrupt: PIRQH */
> >> - pci_write_config_byte(dev, 0x8f, 0x0f);
> >> -
> >> - /* Primary PATA IDE IRQ: 14
> >> - * Secondary PATA IDE IRQ: 15
> >> - */
> >> - pci_write_config_byte(dev, 0x44, 0x3d);
> >> - pci_write_config_byte(dev, 0x75, 0x0f);
> >> -
> >> - /* Set IRQ14 and IRQ15 to legacy IRQs */
> >> - pci_read_config_word(dev, 0x46, &temp);
> >> - temp |= 0xc000;
> >> - pci_write_config_word(dev, 0x46, temp);
> >> -
> >> - /* Set i8259 interrupt trigger
> >> - * IRQ 3: Level
> >> - * IRQ 4: Level
> >> - * IRQ 5: Level
> >> - * IRQ 6: Level
> >> - * IRQ 7: Level
> >> - * IRQ 9: Level
> >> - * IRQ 10: Level
> >> - * IRQ 11: Level
> >> - * IRQ 12: Level
> >> - * IRQ 14: Edge
> >> - * IRQ 15: Edge
> >> - */
> >> - outb(0xfa, 0x4d0);
> >> - outb(0x1e, 0x4d1);
> >> -}
> >> -
> >> -static void __devinit quirk_uli5288(struct pci_dev *dev) -{
> >> - unsigned char c;
> >> -
> >> - pci_read_config_byte(dev,0x83,&c);
> >> - c |= 0x80;
> >> - pci_write_config_byte(dev, 0x83, c);
> >> -
> >> - pci_write_config_byte(dev, 0x09, 0x01);
> >> - pci_write_config_byte(dev, 0x0a, 0x06);
> >> -
> >> - pci_read_config_byte(dev,0x83,&c);
> >> - c &= 0x7f;
> >> - pci_write_config_byte(dev, 0x83, c);
> >> -
> >> - pci_read_config_byte(dev,0x84,&c);
> >> - c |= 0x01;
> >> - pci_write_config_byte(dev, 0x84, c);
> >> -}
> >> -
> >> -static void __devinit quirk_uli5229(struct pci_dev *dev) -{
> >> - unsigned short temp;
> >> - pci_write_config_word(dev, 0x04, 0x0405);
> >> - pci_read_config_word(dev, 0x4a, &temp);
> >> - temp |= 0x1000;
> >> - pci_write_config_word(dev, 0x4a, temp);
> >> -}
> >> -
> >> -static void __devinit early_uli5249(struct pci_dev *dev) -{
> >> - unsigned char temp;
> >> - pci_write_config_word(dev, 0x04, 0x0007);
> >> - pci_read_config_byte(dev, 0x7c, &temp);
> >> - pci_write_config_byte(dev, 0x7c, 0x80);
> >> - pci_write_config_byte(dev, 0x09, 0x01);
> >> - pci_write_config_byte(dev, 0x7c, temp);
> >> - dev->class |= 0x1;
> >> -}
> >> -
> >> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575,
> quirk_ali1575);
> >> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL,
> >> 0x5288, quirk_uli5288);
> >> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229,
> quirk_uli5229);
> >> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL,
> >> 0x5249, early_uli5249); diff --git
> >> a/include/asm-powerpc/mpc86xx.h
> >> b/include/asm-powerpc/mpc86xx.h index d0a6718..00d72a7 100644
> >> --- a/include/asm-powerpc/mpc86xx.h
> >> +++ b/include/asm-powerpc/mpc86xx.h
> >> @@ -20,10 +20,6 @@ #include <asm/mmu.h>
> >>
> >> #ifdef CONFIG_PPC_86xx
> >>
> >> -#ifdef CONFIG_MPC8641_HPCN
> >> -#include <platforms/86xx/mpc8641_hpcn.h> -#endif
> >> -
> >> #define _IO_BASE isa_io_base
> >> #define _ISA_MEM_BASE isa_mem_base
> >> #ifdef CONFIG_PCI
> >>
> >> _______________________________________________
> >> Linuxppc-dev mailing list
> >> Linuxppc-dev@ozlabs.org
> >> https://ozlabs.org/mailman/listinfo/linuxppc-dev
> >>
>
^ permalink raw reply
* [PATCH] Make lparcfg.c work when both iseries and pseries are selected
From: Stephen Rothwell @ 2006-06-29 5:07 UTC (permalink / raw)
To: paulus; +Cc: linuxppc-dev
In-Reply-To: <20060628072928.GX16029@localdomain>
This also consolidates the initial bits of lparcfg_data() and adds the
partition number to the iSeries flattened device tree.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
arch/powerpc/kernel/lparcfg.c | 147 ++++++++++++++++++-----------------
arch/powerpc/platforms/iseries/dt.c | 2
2 files changed, 78 insertions(+), 71 deletions(-)
Built and run on iSeries, built on pSeries.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index c02deaa..73edc3c 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -45,11 +45,9 @@ #define MODULE_NAME "lparcfg"
static struct proc_dir_entry *proc_ppc64_lparcfg;
#define LPARCFG_BUFF_SIZE 4096
-#ifdef CONFIG_PPC_ISERIES
-
/*
- * For iSeries legacy systems, the PPA purr function is available from the
- * emulated_time_base field in the paca.
+ * Track sum of all purrs across all processors. This is used to further
+ * calculate usage values by different applications
*/
static unsigned long get_purr(void)
{
@@ -57,48 +55,31 @@ static unsigned long get_purr(void)
int cpu;
for_each_possible_cpu(cpu) {
- sum_purr += lppaca[cpu].emulated_time_base;
+ if (firmware_has_feature(FW_FEATURE_ISERIES))
+ sum_purr += lppaca[cpu].emulated_time_base;
+ else {
+ struct cpu_usage *cu;
-#ifdef PURR_DEBUG
- printk(KERN_INFO "get_purr for cpu (%d) has value (%ld) \n",
- cpu, lppaca[cpu].emulated_time_base);
-#endif
+ cu = &per_cpu(cpu_usage_array, cpu);
+ sum_purr += cu->current_tb;
+ }
}
return sum_purr;
}
-#define lparcfg_write NULL
+#ifdef CONFIG_PPC_ISERIES
/*
* Methods used to fetch LPAR data when running on an iSeries platform.
*/
-static int lparcfg_data(struct seq_file *m, void *v)
+static int iseries_lparcfg_data(struct seq_file *m, void *v)
{
- unsigned long pool_id, lp_index;
+ unsigned long pool_id;
int shared, entitled_capacity, max_entitled_capacity;
int processors, max_processors;
unsigned long purr = get_purr();
- seq_printf(m, "%s %s \n", MODULE_NAME, MODULE_VERS);
-
shared = (int)(get_lppaca()->shared_proc);
- seq_printf(m, "serial_number=%c%c%c%c%c%c%c\n",
- e2a(xItExtVpdPanel.mfgID[2]),
- e2a(xItExtVpdPanel.mfgID[3]),
- e2a(xItExtVpdPanel.systemSerial[1]),
- e2a(xItExtVpdPanel.systemSerial[2]),
- e2a(xItExtVpdPanel.systemSerial[3]),
- e2a(xItExtVpdPanel.systemSerial[4]),
- e2a(xItExtVpdPanel.systemSerial[5]));
-
- seq_printf(m, "system_type=%c%c%c%c\n",
- e2a(xItExtVpdPanel.machineType[0]),
- e2a(xItExtVpdPanel.machineType[1]),
- e2a(xItExtVpdPanel.machineType[2]),
- e2a(xItExtVpdPanel.machineType[3]));
-
- lp_index = HvLpConfig_getLpIndex();
- seq_printf(m, "partition_id=%d\n", (int)lp_index);
seq_printf(m, "system_active_processors=%d\n",
(int)HvLpConfig_getSystemPhysicalProcessors());
@@ -137,6 +118,14 @@ static int lparcfg_data(struct seq_file
return 0;
}
+
+#else /* CONFIG_PPC_ISERIES */
+
+static int iseries_lparcfg_data(struct seq_file *m, void *v)
+{
+ return 0;
+}
+
#endif /* CONFIG_PPC_ISERIES */
#ifdef CONFIG_PPC_PSERIES
@@ -213,22 +202,6 @@ static void h_pic(unsigned long *pool_id
log_plpar_hcall_return(rc, "H_PIC");
}
-/* Track sum of all purrs across all processors. This is used to further */
-/* calculate usage values by different applications */
-
-static unsigned long get_purr(void)
-{
- unsigned long sum_purr = 0;
- int cpu;
- struct cpu_usage *cu;
-
- for_each_possible_cpu(cpu) {
- cu = &per_cpu(cpu_usage_array, cpu);
- sum_purr += cu->current_tb;
- }
- return sum_purr;
-}
-
#define SPLPAR_CHARACTERISTICS_TOKEN 20
#define SPLPAR_MAXLENGTH 1026*(sizeof(char))
@@ -333,35 +306,13 @@ #endif
return count;
}
-static int lparcfg_data(struct seq_file *m, void *v)
+static int pseries_lparcfg_data(struct seq_file *m, void *v)
{
int partition_potential_processors;
int partition_active_processors;
- struct device_node *rootdn;
- const char *model = "";
- const char *system_id = "";
- unsigned int *lp_index_ptr, lp_index = 0;
struct device_node *rtas_node;
int *lrdrp = NULL;
- rootdn = find_path_device("/");
- if (rootdn) {
- model = get_property(rootdn, "model", NULL);
- system_id = get_property(rootdn, "system-id", NULL);
- lp_index_ptr = (unsigned int *)
- get_property(rootdn, "ibm,partition-no", NULL);
- if (lp_index_ptr)
- lp_index = *lp_index_ptr;
- }
-
- seq_printf(m, "%s %s \n", MODULE_NAME, MODULE_VERS);
-
- seq_printf(m, "serial_number=%s\n", system_id);
-
- seq_printf(m, "system_type=%s\n", model);
-
- seq_printf(m, "partition_id=%d\n", (int)lp_index);
-
rtas_node = find_path_device("/rtas");
if (rtas_node)
lrdrp = (int *)get_property(rtas_node, "ibm,lrdr-capacity",
@@ -549,8 +500,61 @@ out:
return retval;
}
+#else /* CONFIG_PPC_PSERIES */
+
+static int pseries_lparcfg_data(struct seq_file *m, void *v)
+{
+ return 0;
+}
+
+static ssize_t lparcfg_write(struct file *file, const char __user * buf,
+ size_t count, loff_t * off)
+{
+ return count;
+}
+
#endif /* CONFIG_PPC_PSERIES */
+static int lparcfg_data(struct seq_file *m, void *v)
+{
+ struct device_node *rootdn;
+ const char *model = "";
+ const char *system_id = "";
+ const char *tmp;
+ unsigned int *lp_index_ptr, lp_index = 0;
+
+ seq_printf(m, "%s %s \n", MODULE_NAME, MODULE_VERS);
+
+ rootdn = find_path_device("/");
+ if (rootdn) {
+ tmp = get_property(rootdn, "model", NULL);
+ if (tmp) {
+ model = tmp;
+ /* Skip "IBM," - see platforms/iseries/dt.c */
+ if (firmware_has_feature(FW_FEATURE_ISERIES))
+ model += 4;
+ }
+ tmp = get_property(rootdn, "system-id", NULL);
+ if (tmp) {
+ system_id = tmp;
+ /* Skip "IBM," - see platforms/iseries/dt.c */
+ if (firmware_has_feature(FW_FEATURE_ISERIES))
+ system_id += 4;
+ }
+ lp_index_ptr = (unsigned int *)
+ get_property(rootdn, "ibm,partition-no", NULL);
+ if (lp_index_ptr)
+ lp_index = *lp_index_ptr;
+ }
+ seq_printf(m, "serial_number=%s\n", system_id);
+ seq_printf(m, "system_type=%s\n", model);
+ seq_printf(m, "partition_id=%d\n", (int)lp_index);
+
+ if (firmware_has_feature(FW_FEATURE_ISERIES))
+ return iseries_lparcfg_data(m, v);
+ return pseries_lparcfg_data(m, v);
+}
+
static int lparcfg_open(struct inode *inode, struct file *file)
{
return single_open(file, lparcfg_data, NULL);
@@ -569,7 +573,8 @@ int __init lparcfg_init(void)
mode_t mode = S_IRUSR | S_IRGRP | S_IROTH;
/* Allow writing if we have FW_FEATURE_SPLPAR */
- if (firmware_has_feature(FW_FEATURE_SPLPAR)) {
+ if (firmware_has_feature(FW_FEATURE_SPLPAR) &&
+ !firmware_has_feature(FW_FEATURE_ISERIES)) {
lparcfg_fops.write = lparcfg_write;
mode |= S_IWUSR;
}
diff --git a/arch/powerpc/platforms/iseries/dt.c b/arch/powerpc/platforms/iseries/dt.c
index d3444aa..d194140 100644
--- a/arch/powerpc/platforms/iseries/dt.c
+++ b/arch/powerpc/platforms/iseries/dt.c
@@ -252,6 +252,7 @@ static void __init dt_model(struct iseri
{
char buf[16] = "IBM,";
+ /* N.B. lparcfg.c knows about the "IBM," prefixes ... */
/* "IBM," + mfgId[2:3] + systemSerial[1:5] */
strne2a(buf + 4, xItExtVpdPanel.mfgID + 2, 2);
strne2a(buf + 6, xItExtVpdPanel.systemSerial + 1, 5);
@@ -264,6 +265,7 @@ static void __init dt_model(struct iseri
dt_prop_str(dt, "model", buf);
dt_prop_str(dt, "compatible", "IBM,iSeries");
+ dt_prop_u32(dt, "ibm,partition-no", HvLpConfig_getLpIndex());
}
static void __init dt_do_vdevice(struct iseries_flat_dt *dt,
--
1.4.0
^ permalink raw reply related
* Re: Please pull from 'for_paulus' branch of powerpc
From: Kumar Gala @ 2006-06-29 5:08 UTC (permalink / raw)
To: Zhang Wei-r63237; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
In-Reply-To: <9FCDBA58F226D911B202000BDBAD467306E19B76@zch01exm40.ap.freescale.net>
On Jun 28, 2006, at 10:33 PM, Zhang Wei-r63237 wrote:
>>
>> On Jun 28, 2006, at 1:26 AM, Zhang Wei-r63237 wrote:
>>
>>> Hi, Kumar,
>>>
>>> Why moving these codes from pci.c to mpc86xx_hpcn.c? It's
>> not must be.
>>> These functions relate to PCI device of MPC8641D HPCn platform.
>>> And we can also see the 'DECLARE_PCI_FIXUP_HEADER()' declaration in
>>> pci.c of Powermac platform.
>>
>> The point for moving is 86xx/pci.c should apply to all 86xx
>> systems, not just the HPCn system.
>>
>> - kumar
>
> The codes of moving is for PCI devices, it's for HPCn system now,
> but it's also fit for the same PCI chips in the other 86xx system
> and the same chip should keep the same setting in 86xx platforms, I
> think so.
>
> Even though other 86xx platforms have no these PCI chips, these
> codes will not take effect.
Its code bloat for systems that dont need it.
> And we can also see the similar solution in pSeries and PowerMac
> platforms pci.c file. The function 'fixup_winbond_82c105' in
> pseries/pci.c is for the Winbond 82c105 IDE controller on p610.
> (pSeries have only p610? :-D ) The function 'fixup_k2_sata' in
> powermac/pci.c is for K2-SATA. (K2-SATA chip is in all PowerMac
> machine? ;-) )
Realize, powermac and pseries describe actual full systems, not
processor families like 86xx.
> The moving will make the mpc86xx_hpcn.c more fat.
That's all relative.
- kumar
>
> Thanks,
> Zhang Wei
>
>>
>>>> -----Original Message-----
>>>> From: linuxppc-dev-bounces+wei.zhang=freescale.com@ozlabs.org
>>>> [mailto:linuxppc-dev-bounces+wei.zhang=freescale.com@ozlabs.or
>>>> g] On Behalf Of Kumar Gala
>>>> Sent: Wednesday, June 28, 2006 2:01 PM
>>>> To: Paul Mackerras
>>>> Cc: linuxppc-dev@ozlabs.org; linux-kernel@vger.kernel.org
>>>> Subject: Please pull from 'for_paulus' branch of powerpc
>>>>
>>>> Please pull from 'for_paulus' branch of
>>>> master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git
>>>>
>>>> to receive the following updates:
>>>>
>>>> arch/powerpc/kernel/cputable.c | 12 --
>>>> arch/powerpc/platforms/86xx/mpc86xx.h | 8 +
>>>> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 128
>>>> +++++++++++++++++++++++++--
>>>> arch/powerpc/platforms/86xx/mpc86xx_smp.c | 9 -
>>>> arch/powerpc/platforms/86xx/pci.c | 136
>>>> +----------------------------
>>>> include/asm-powerpc/mpc86xx.h | 4
>>>> 6 files changed, 138 insertions(+), 159 deletions(-)
>>>>
>>>> Kumar Gala:
>>>> powerpc: minor cleanups for mpc86xx
>>>>
>>>> diff --git a/arch/powerpc/kernel/cputable.c
>>>> b/arch/powerpc/kernel/cputable.c index 1c11488..abf7d42 100644
>>>> --- a/arch/powerpc/kernel/cputable.c
>>>> +++ b/arch/powerpc/kernel/cputable.c
>>>> @@ -722,18 +722,6 @@ #if CLASSIC_PPC
>>>> .oprofile_type = PPC_OPROFILE_G4,
>>>> .platform = "ppc7450",
>>>> },
>>>> - { /* 8641 */
>>>> - .pvr_mask = 0xffffffff,
>>>> - .pvr_value = 0x80040010,
>>>> - .cpu_name = "8641",
>>>> - .cpu_features = CPU_FTRS_7447A,
>>>> - .cpu_user_features = COMMON_USER |
>>>> PPC_FEATURE_HAS_ALTIVEC_COMP,
>>>> - .icache_bsize = 32,
>>>> - .dcache_bsize = 32,
>>>> - .num_pmcs = 6,
>>>> - .cpu_setup = __setup_cpu_745x
>>>> - },
>>>> -
>>>> { /* 82xx (8240, 8245, 8260 are all 603e cores) */
>>>> .pvr_mask = 0x7fff0000,
>>>> .pvr_value = 0x00810000,
>>>> diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h
>>>> b/arch/powerpc/platforms/86xx/mpc86xx.h
>>>> index e3c9e4f..2834462 100644
>>>> --- a/arch/powerpc/platforms/86xx/mpc86xx.h
>>>> +++ b/arch/powerpc/platforms/86xx/mpc86xx.h
>>>> @@ -15,11 +15,13 @@ #define __MPC86XX_H__
>>>> * mpc86xx_* files. Mostly for use by mpc86xx_setup().
>>>> */
>>>>
>>>> -extern int __init add_bridge(struct device_node *dev);
>>>> +extern int add_bridge(struct device_node *dev);
>>>>
>>>> -extern void __init setup_indirect_pcie(struct
>> pci_controller *hose,
>>>> +extern int mpc86xx_exclude_device(u_char bus, u_char devfn);
>>>> +
>>>> +extern void setup_indirect_pcie(struct pci_controller *hose,
>>>> u32 cfg_addr, u32
>>>> cfg_data); -extern void __init
>>>> setup_indirect_pcie_nomap(struct pci_controller *hose,
>>>> +extern void setup_indirect_pcie_nomap(struct pci_controller *hose,
>>>> void __iomem *cfg_addr,
>>>> void __iomem *cfg_data);
>>>>
>>>> diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
>>>> b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
>>>> index 483c21d..ac7f418 100644
>>>> --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
>>>> +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
>>>> @@ -36,6 +36,7 @@ #include <asm/mpic.h> #include
>> <sysdev/fsl_soc.h>
>>>>
>>>> #include "mpc86xx.h"
>>>> +#include "mpc8641_hpcn.h"
>>>>
>>>> #ifndef CONFIG_PCI
>>>> unsigned long isa_io_base = 0;
>>>> @@ -186,17 +187,130 @@ mpc86xx_map_irq(struct pci_dev *dev, uns
>>>> return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; }
>>>>
>>>> +static void __devinit quirk_ali1575(struct pci_dev *dev) {
>>>> + unsigned short temp;
>>>> +
>>>> + /*
>>>> + * ALI1575 interrupts route table setup:
>>>> + *
>>>> + * IRQ pin IRQ#
>>>> + * PIRQA ---- 3
>>>> + * PIRQB ---- 4
>>>> + * PIRQC ---- 5
>>>> + * PIRQD ---- 6
>>>> + * PIRQE ---- 9
>>>> + * PIRQF ---- 10
>>>> + * PIRQG ---- 11
>>>> + * PIRQH ---- 12
>>>> + *
>>>> + * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
>>>> + * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
>>>> + */
>>>> + pci_write_config_dword(dev, 0x48, 0xb9317542);
>>>> +
>>>> + /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
>>>> + pci_write_config_byte(dev, 0x86, 0x0c);
>>>> +
>>>> + /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
>>>> + pci_write_config_byte(dev, 0x87, 0x0d);
>>>> +
>>>> + /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
>>>> + pci_write_config_byte(dev, 0x88, 0x0f);
>>>> +
>>>> + /* USB 2.0 controller, interrupt: PIRQ7 */
>>>> + pci_write_config_byte(dev, 0x74, 0x06);
>>>> +
>>>> + /* Audio controller, interrupt: PIRQE */
>>>> + pci_write_config_byte(dev, 0x8a, 0x0c);
>>>> +
>>>> + /* Modem controller, interrupt: PIRQF */
>>>> + pci_write_config_byte(dev, 0x8b, 0x0d);
>>>> +
>>>> + /* HD audio controller, interrupt: PIRQG */
>>>> + pci_write_config_byte(dev, 0x8c, 0x0e);
>>>> +
>>>> + /* Serial ATA interrupt: PIRQD */
>>>> + pci_write_config_byte(dev, 0x8d, 0x0b);
>>>> +
>>>> + /* SMB interrupt: PIRQH */
>>>> + pci_write_config_byte(dev, 0x8e, 0x0f);
>>>> +
>>>> + /* PMU ACPI SCI interrupt: PIRQH */
>>>> + pci_write_config_byte(dev, 0x8f, 0x0f);
>>>> +
>>>> + /* Primary PATA IDE IRQ: 14
>>>> + * Secondary PATA IDE IRQ: 15
>>>> + */
>>>> + pci_write_config_byte(dev, 0x44, 0x3d);
>>>> + pci_write_config_byte(dev, 0x75, 0x0f);
>>>> +
>>>> + /* Set IRQ14 and IRQ15 to legacy IRQs */
>>>> + pci_read_config_word(dev, 0x46, &temp);
>>>> + temp |= 0xc000;
>>>> + pci_write_config_word(dev, 0x46, temp);
>>>> +
>>>> + /* Set i8259 interrupt trigger
>>>> + * IRQ 3: Level
>>>> + * IRQ 4: Level
>>>> + * IRQ 5: Level
>>>> + * IRQ 6: Level
>>>> + * IRQ 7: Level
>>>> + * IRQ 9: Level
>>>> + * IRQ 10: Level
>>>> + * IRQ 11: Level
>>>> + * IRQ 12: Level
>>>> + * IRQ 14: Edge
>>>> + * IRQ 15: Edge
>>>> + */
>>>> + outb(0xfa, 0x4d0);
>>>> + outb(0x1e, 0x4d1);
>>>> +}
>>>>
>>>> -int
>>>> -mpc86xx_exclude_device(u_char bus, u_char devfn)
>>>> +static void __devinit quirk_uli5288(struct pci_dev *dev)
>>>> {
>>>> -#if !defined(CONFIG_PCI)
>>>> - if (bus == 0 && PCI_SLOT(devfn) == 0)
>>>> - return PCIBIOS_DEVICE_NOT_FOUND;
>>>> -#endif
>>>> + unsigned char c;
>>>> +
>>>> + pci_read_config_byte(dev,0x83,&c);
>>>> + c |= 0x80;
>>>> + pci_write_config_byte(dev, 0x83, c);
>>>> +
>>>> + pci_write_config_byte(dev, 0x09, 0x01);
>>>> + pci_write_config_byte(dev, 0x0a, 0x06);
>>>> +
>>>> + pci_read_config_byte(dev,0x83,&c);
>>>> + c &= 0x7f;
>>>> + pci_write_config_byte(dev, 0x83, c);
>>>>
>>>> - return PCIBIOS_SUCCESSFUL;
>>>> + pci_read_config_byte(dev,0x84,&c);
>>>> + c |= 0x01;
>>>> + pci_write_config_byte(dev, 0x84, c);
>>>> }
>>>> +
>>>> +static void __devinit quirk_uli5229(struct pci_dev *dev) {
>>>> + unsigned short temp;
>>>> + pci_write_config_word(dev, 0x04, 0x0405);
>>>> + pci_read_config_word(dev, 0x4a, &temp);
>>>> + temp |= 0x1000;
>>>> + pci_write_config_word(dev, 0x4a, temp); }
>>>> +
>>>> +static void __devinit early_uli5249(struct pci_dev *dev) {
>>>> + unsigned char temp;
>>>> + pci_write_config_word(dev, 0x04, 0x0007);
>>>> + pci_read_config_byte(dev, 0x7c, &temp);
>>>> + pci_write_config_byte(dev, 0x7c, 0x80);
>>>> + pci_write_config_byte(dev, 0x09, 0x01);
>>>> + pci_write_config_byte(dev, 0x7c, temp);
>>>> + dev->class |= 0x1;
>>>> +}
>>>> +
>>>> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575,
>> quirk_ali1575);
>>>> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288,
>> quirk_uli5288);
>>>> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229,
>> quirk_uli5229);
>>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
>>>> #endif /* CONFIG_PCI */
>>>>
>>>>
>>>> diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
>>>> b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
>>>> index 944ec4b..9cca3d1 100644
>>>> --- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
>>>> +++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
>>>> @@ -34,8 +34,8 @@ extern unsigned long __secondary_hold_ac static
>>>> void __init smp_86xx_release_core(int nr) {
>>>> - void *mcm_vaddr;
>>>> - unsigned long vaddr, pcr;
>>>> + __be32 __iomem *mcm_vaddr;
>>>> + unsigned long pcr;
>>>>
>>>> if (nr < 0 || nr >= NR_CPUS)
>>>> return;
>>>> @@ -45,10 +45,9 @@ smp_86xx_release_core(int nr)
>>>> */
>>>> mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
>>>> MPC86xx_MCM_SIZE);
>>>> - vaddr = (unsigned long)mcm_vaddr + MCM_PORT_CONFIG_OFFSET;
>>>> - pcr = in_be32((volatile unsigned *)vaddr);
>>>> + pcr = in_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2));
>>>> pcr |= 1 << (nr + 24);
>>>> - out_be32((volatile unsigned *)vaddr, pcr);
>>>> + out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >> 2), pcr);
>>>> }
>>>>
>>>>
>>>> diff --git a/arch/powerpc/platforms/86xx/pci.c
>>>> b/arch/powerpc/platforms/86xx/pci.c
>>>> index 5180df7..0d8b340 100644
>>>> --- a/arch/powerpc/platforms/86xx/pci.c
>>>> +++ b/arch/powerpc/platforms/86xx/pci.c
>>>> @@ -122,15 +122,12 @@ static void __init setup_pcie_atmu(struc
>>>> static void __init mpc86xx_setup_pcie(struct pci_controller *hose,
>>>> u32 pcie_offset, u32 pcie_size) {
>>>> - volatile struct ccsr_pex *pcie;
>>>> u16 cmd;
>>>> unsigned int temps;
>>>>
>>>> DBG("PCIE host controller register offset 0x%08x, size
>> 0x%08x.\n",
>>>> pcie_offset, pcie_size);
>>>>
>>>> - pcie = ioremap(pcie_offset, pcie_size);
>>>> -
>>>> early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
>>>> cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER |
>> PCI_COMMAND_MEMORY
>>>> | PCI_COMMAND_IO;
>>>> @@ -144,6 +141,14 @@ mpc86xx_setup_pcie(struct pci_controller
>>>> early_write_config_dword(hose, 0, 0, PCI_PRIMARY_BUS, temps); }
>>>>
>>>> +int mpc86xx_exclude_device(u_char bus, u_char devfn) {
>>>> + if (bus == 0 && PCI_SLOT(devfn) == 0)
>>>> + return PCIBIOS_DEVICE_NOT_FOUND;
>>>> +
>>>> + return PCIBIOS_SUCCESSFUL;
>>>> +}
>>>> +
>>>> int __init add_bridge(struct device_node *dev) {
>>>> int len;
>>>> @@ -198,128 +203,3 @@ int __init add_bridge(struct device_node
>>>>
>>>> return 0;
>>>> }
>>>> -
>>>> -static void __devinit quirk_ali1575(struct pci_dev *dev) -{
>>>> - unsigned short temp;
>>>> -
>>>> - /*
>>>> - * ALI1575 interrupts route table setup:
>>>> - *
>>>> - * IRQ pin IRQ#
>>>> - * PIRQA ---- 3
>>>> - * PIRQB ---- 4
>>>> - * PIRQC ---- 5
>>>> - * PIRQD ---- 6
>>>> - * PIRQE ---- 9
>>>> - * PIRQF ---- 10
>>>> - * PIRQG ---- 11
>>>> - * PIRQH ---- 12
>>>> - *
>>>> - * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
>>>> - * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
>>>> - */
>>>> - pci_write_config_dword(dev, 0x48, 0xb9317542);
>>>> -
>>>> - /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
>>>> - pci_write_config_byte(dev, 0x86, 0x0c);
>>>> -
>>>> - /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
>>>> - pci_write_config_byte(dev, 0x87, 0x0d);
>>>> -
>>>> - /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
>>>> - pci_write_config_byte(dev, 0x88, 0x0f);
>>>> -
>>>> - /* USB 2.0 controller, interrupt: PIRQ7 */
>>>> - pci_write_config_byte(dev, 0x74, 0x06);
>>>> -
>>>> - /* Audio controller, interrupt: PIRQE */
>>>> - pci_write_config_byte(dev, 0x8a, 0x0c);
>>>> -
>>>> - /* Modem controller, interrupt: PIRQF */
>>>> - pci_write_config_byte(dev, 0x8b, 0x0d);
>>>> -
>>>> - /* HD audio controller, interrupt: PIRQG */
>>>> - pci_write_config_byte(dev, 0x8c, 0x0e);
>>>> -
>>>> - /* Serial ATA interrupt: PIRQD */
>>>> - pci_write_config_byte(dev, 0x8d, 0x0b);
>>>> -
>>>> - /* SMB interrupt: PIRQH */
>>>> - pci_write_config_byte(dev, 0x8e, 0x0f);
>>>> -
>>>> - /* PMU ACPI SCI interrupt: PIRQH */
>>>> - pci_write_config_byte(dev, 0x8f, 0x0f);
>>>> -
>>>> - /* Primary PATA IDE IRQ: 14
>>>> - * Secondary PATA IDE IRQ: 15
>>>> - */
>>>> - pci_write_config_byte(dev, 0x44, 0x3d);
>>>> - pci_write_config_byte(dev, 0x75, 0x0f);
>>>> -
>>>> - /* Set IRQ14 and IRQ15 to legacy IRQs */
>>>> - pci_read_config_word(dev, 0x46, &temp);
>>>> - temp |= 0xc000;
>>>> - pci_write_config_word(dev, 0x46, temp);
>>>> -
>>>> - /* Set i8259 interrupt trigger
>>>> - * IRQ 3: Level
>>>> - * IRQ 4: Level
>>>> - * IRQ 5: Level
>>>> - * IRQ 6: Level
>>>> - * IRQ 7: Level
>>>> - * IRQ 9: Level
>>>> - * IRQ 10: Level
>>>> - * IRQ 11: Level
>>>> - * IRQ 12: Level
>>>> - * IRQ 14: Edge
>>>> - * IRQ 15: Edge
>>>> - */
>>>> - outb(0xfa, 0x4d0);
>>>> - outb(0x1e, 0x4d1);
>>>> -}
>>>> -
>>>> -static void __devinit quirk_uli5288(struct pci_dev *dev) -{
>>>> - unsigned char c;
>>>> -
>>>> - pci_read_config_byte(dev,0x83,&c);
>>>> - c |= 0x80;
>>>> - pci_write_config_byte(dev, 0x83, c);
>>>> -
>>>> - pci_write_config_byte(dev, 0x09, 0x01);
>>>> - pci_write_config_byte(dev, 0x0a, 0x06);
>>>> -
>>>> - pci_read_config_byte(dev,0x83,&c);
>>>> - c &= 0x7f;
>>>> - pci_write_config_byte(dev, 0x83, c);
>>>> -
>>>> - pci_read_config_byte(dev,0x84,&c);
>>>> - c |= 0x01;
>>>> - pci_write_config_byte(dev, 0x84, c);
>>>> -}
>>>> -
>>>> -static void __devinit quirk_uli5229(struct pci_dev *dev) -{
>>>> - unsigned short temp;
>>>> - pci_write_config_word(dev, 0x04, 0x0405);
>>>> - pci_read_config_word(dev, 0x4a, &temp);
>>>> - temp |= 0x1000;
>>>> - pci_write_config_word(dev, 0x4a, temp);
>>>> -}
>>>> -
>>>> -static void __devinit early_uli5249(struct pci_dev *dev) -{
>>>> - unsigned char temp;
>>>> - pci_write_config_word(dev, 0x04, 0x0007);
>>>> - pci_read_config_byte(dev, 0x7c, &temp);
>>>> - pci_write_config_byte(dev, 0x7c, 0x80);
>>>> - pci_write_config_byte(dev, 0x09, 0x01);
>>>> - pci_write_config_byte(dev, 0x7c, temp);
>>>> - dev->class |= 0x1;
>>>> -}
>>>> -
>>>> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575,
>> quirk_ali1575);
>>>> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL,
>>>> 0x5288, quirk_uli5288);
>>>> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229,
>> quirk_uli5229);
>>>> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL,
>>>> 0x5249, early_uli5249); diff --git
>>>> a/include/asm-powerpc/mpc86xx.h
>>>> b/include/asm-powerpc/mpc86xx.h index d0a6718..00d72a7 100644
>>>> --- a/include/asm-powerpc/mpc86xx.h
>>>> +++ b/include/asm-powerpc/mpc86xx.h
>>>> @@ -20,10 +20,6 @@ #include <asm/mmu.h>
>>>>
>>>> #ifdef CONFIG_PPC_86xx
>>>>
>>>> -#ifdef CONFIG_MPC8641_HPCN
>>>> -#include <platforms/86xx/mpc8641_hpcn.h> -#endif
>>>> -
>>>> #define _IO_BASE isa_io_base
>>>> #define _ISA_MEM_BASE isa_mem_base
>>>> #ifdef CONFIG_PCI
>>>>
>>>> _______________________________________________
>>>> Linuxppc-dev mailing list
>>>> Linuxppc-dev@ozlabs.org
>>>> https://ozlabs.org/mailman/listinfo/linuxppc-dev
>>>>
>>
^ permalink raw reply
* Re: [PATCH 1/3] Add support for the Freescale MPC8349E-mITX eval board
From: Kumar Gala @ 2006-06-29 5:10 UTC (permalink / raw)
To: Kim Phillips; +Cc: linuxppc-dev
In-Reply-To: <20060628211317.7b21d085.kim.phillips@freescale.com>
On Jun 28, 2006, at 9:13 PM, Kim Phillips wrote:
> Add support for the Freescale MPC8349E-mITX eval board
>
> This is largely based on 8349 SYS code except that it uses the new
> rtc_class code in drivers/rtc instead of explicitly specifying the
> rtc chip. SATA is untested, as this is work in progress.
>
> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
>
> arch/powerpc/platforms/83xx/Kconfig | 11 ++
> arch/powerpc/platforms/83xx/Makefile | 1
> arch/powerpc/platforms/83xx/misc.c | 52 +++++++++
> arch/powerpc/platforms/83xx/mpc834x_itx.c | 166 ++++++++++++++++++
> +++++++++++
> arch/powerpc/platforms/83xx/mpc834x_itx.h | 23 ++++
> arch/powerpc/platforms/83xx/mpc83xx.h | 5 +
> include/asm-ppc/mpc83xx.h | 4 +
> 7 files changed, 261 insertions(+), 1 deletions(-)
> create mode 100644 arch/powerpc/platforms/83xx/mpc834x_itx.c
> create mode 100644 arch/powerpc/platforms/83xx/mpc834x_itx.h
>
> 3182b4a50027d17badab0c7b8dc2fd4d8fc307b0
> diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/
> platforms/83xx/Kconfig
> index 7675e67..5fe7b7f 100644
> --- a/arch/powerpc/platforms/83xx/Kconfig
> +++ b/arch/powerpc/platforms/83xx/Kconfig
> @@ -16,12 +16,21 @@ config MPC834x_SYS
> 3 PCI slots. The PIBs PCI initialization is the bootloader's
> responsiblilty.
>
> +config MPC834x_ITX
> + bool "Freescale MPC834x ITX"
> + select DEFAULT_UIMAGE
> + help
> + This option enables support for the MPC 834x ITX evaluation board.
> +
> + Be aware that PCI initialization is the bootloader's
> + responsiblilty.
> +
> endchoice
>
> config MPC834x
> bool
> select PPC_UDBG_16550
> select PPC_INDIRECT_PCI
> - default y if MPC834x_SYS
> + default y if MPC834x_SYS || MPC834x_ITX
>
> endmenu
> diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/
> platforms/83xx/Makefile
> index 5c72367..9387a11 100644
> --- a/arch/powerpc/platforms/83xx/Makefile
> +++ b/arch/powerpc/platforms/83xx/Makefile
> @@ -4,3 +4,4 @@
> obj-y := misc.o
> obj-$(CONFIG_PCI) += pci.o
> obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o
> +obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
> diff --git a/arch/powerpc/platforms/83xx/misc.c b/arch/powerpc/
> platforms/83xx/misc.c
> index 1455bce..568a8f7 100644
> --- a/arch/powerpc/platforms/83xx/misc.c
> +++ b/arch/powerpc/platforms/83xx/misc.c
> @@ -53,3 +53,55 @@ long __init mpc83xx_time_init(void)
>
> return 0;
> }
> +
> +#ifdef CONFIG_RTC_CLASS
> +int mpc83xx_set_rtc_time(struct rtc_time *tm)
> +{
> + int err;
> + struct class_device *class_dev =
> + rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
> +
> + if (class_dev == NULL) {
> + printk("%s: unable to open rtc device (%s)\n",
> + __FUNCTION__, CONFIG_RTC_HCTOSYS_DEVICE);
> + return -ENODEV;
> + }
> +
> + err = rtc_set_time(class_dev, tm);
> + if (err != 0)
> + dev_err(class_dev->dev,
> + "%s: unable to set the hardware clock\n",__FUNCTION__);
> +
> + rtc_class_close(class_dev);
> +
> + return 0;
> +}
> +
> +void mpc83xx_get_rtc_time(struct rtc_time *tm)
> +{
> + int err;
> + struct class_device *class_dev =
> + rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
> +
> + if (class_dev == NULL) {
> + printk("%s: unable to open rtc device (%s)\n",
> + __FUNCTION__, CONFIG_RTC_HCTOSYS_DEVICE);
> + return;
> + }
> +
> + err = rtc_read_time(class_dev, tm);
> + if (err == 0) {
> + err = rtc_valid_tm(tm);
> + if (err != 0)
> + dev_err(class_dev->dev,
> + "%s: invalid date/time\n",__FUNCTION__);
> + }
> + else
> + dev_err(class_dev->dev,
> + "%s: unable to read the hardware clock\n",__FUNCTION__);
> +
> + rtc_class_close(class_dev);
> +
> + return;
> +}
> +#endif /* CONFIG_RTC_CLASS */
What is this trying to accomplish? What RTC chip is on 834x ITC and
how's it connected?
> diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/
> powerpc/platforms/83xx/mpc834x_itx.c
> new file mode 100644
> index 0000000..0a3f58a
> --- /dev/null
> +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
> @@ -0,0 +1,166 @@
> +/*
> + * arch/powerpc/platforms/83xx/mpc834x_itx.c
> + *
> + * MPC834x ITX board specific routines
> + *
> + * Maintainer: Kumar Gala <galak@kernel.crashing.org>
> + *
> + * This program is free software; you can redistribute it and/or
> modify it
> + * under the terms of the GNU General Public License as
> published by the
> + * Free Software Foundation; either version 2 of the License, or
> (at your
> + * option) any later version.
> + */
> +
> +#include <linux/config.h>
> +#include <linux/stddef.h>
> +#include <linux/kernel.h>
> +#include <linux/init.h>
> +#include <linux/errno.h>
> +#include <linux/reboot.h>
> +#include <linux/pci.h>
> +#include <linux/kdev_t.h>
> +#include <linux/major.h>
> +#include <linux/console.h>
> +#include <linux/delay.h>
> +#include <linux/seq_file.h>
> +#include <linux/root_dev.h>
> +
> +#include <asm/system.h>
> +#include <asm/atomic.h>
> +#include <asm/time.h>
> +#include <asm/io.h>
> +#include <asm/machdep.h>
> +#include <asm/ipic.h>
> +#include <asm/bootinfo.h>
> +#include <asm/irq.h>
> +#include <asm/prom.h>
> +#include <asm/udbg.h>
> +#include <sysdev/fsl_soc.h>
> +
> +#include "mpc83xx.h"
> +
> +#ifndef CONFIG_PCI
> +unsigned long isa_io_base = 0;
> +unsigned long isa_mem_base = 0;
> +#endif
> +
> +#ifdef CONFIG_PCI
> +static int
> +mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned
> char pin)
> +{
> + static char pci_irq_table[][4] =
> + /*
> + * PCI IDSEL/INTPIN->INTLINE
> + * A B C D
> + */
> + {
> + {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x0e */
> + {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x0f */
> + {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x10 */
> + };
> +
> + const long min_idsel = 0x0e, max_idsel = 0x10, irqs_per_slot = 4;
> + return PCI_IRQ_TABLE_LOOKUP;
> +}
> +#endif /* CONFIG_PCI */
> +
> +/*
> **********************************************************************
> **
> + *
> + * Setup the architecture
> + *
> + */
> +static void __init mpc834x_itx_setup_arch(void)
> +{
> + struct device_node *np;
> +
> + if (ppc_md.progress)
> + ppc_md.progress("mpc834x_itx_setup_arch()", 0);
> +
> + np = of_find_node_by_type(NULL, "cpu");
> + if (np != 0) {
> + unsigned int *fp =
> + (int *)get_property(np, "clock-frequency", NULL);
> + if (fp != 0)
> + loops_per_jiffy = *fp / HZ;
> + else
> + loops_per_jiffy = 50000000 / HZ;
> + of_node_put(np);
> + }
> +#ifdef CONFIG_PCI
> + for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
> + add_bridge(np);
> +
> + ppc_md.pci_swizzle = common_swizzle;
> + ppc_md.pci_map_irq = mpc83xx_map_irq;
> + ppc_md.pci_exclude_device = mpc83xx_exclude_device;
> +#endif
> +
> +#ifdef CONFIG_ROOT_NFS
> + ROOT_DEV = Root_NFS;
> +#else
> + ROOT_DEV = Root_HDA1;
> +#endif
> +}
> +
> +void __init mpc834x_itx_init_IRQ(void)
> +{
> + u8 senses[8] = {
> + 0, /* EXT 0 */
> + IRQ_SENSE_LEVEL, /* EXT 1 */
> + IRQ_SENSE_LEVEL, /* EXT 2 */
> + 0, /* EXT 3 */
> +#ifdef CONFIG_PCI
> + IRQ_SENSE_LEVEL, /* EXT 4 */
> + IRQ_SENSE_LEVEL, /* EXT 5 */
> + IRQ_SENSE_LEVEL, /* EXT 6 */
> + IRQ_SENSE_LEVEL, /* EXT 7 */
> +#else
> + 0, /* EXT 4 */
> + 0, /* EXT 5 */
> + 0, /* EXT 6 */
> + 0, /* EXT 7 */
> +#endif
> + };
> +
> + ipic_init(get_immrbase() + 0x00700, 0, 0, senses, 8);
> +
> + /* Initialize the default interrupt mapping priorities,
> + * in case the boot rom changed something on us.
> + */
> + ipic_set_default_priority();
> +}
> +
> +#ifdef CONFIG_RTC_CLASS
> +static int __init mpc834x_rtc_hookup(void)
> +{
> + ppc_md.get_rtc_time = mpc83xx_get_rtc_time;
> + ppc_md.set_rtc_time = mpc83xx_set_rtc_time;
> +
> + return 0;
> +}
> +
> +late_initcall(mpc834x_rtc_hookup);
> +#endif
> +
> +/*
> + * Called very early, MMU is off, device-tree isn't unflattened
> + */
> +static int __init mpc834x_itx_probe(void)
> +{
> + /* We always match for now, eventually we should look at the flat
> + dev tree to ensure this is the board we are suppose to run on
> + */
> + return 1;
> +}
> +
> +define_machine(mpc834x_itx) {
> + .name = "MPC834x ITX",
> + .probe = mpc834x_itx_probe,
> + .setup_arch = mpc834x_itx_setup_arch,
> + .init_IRQ = mpc834x_itx_init_IRQ,
> + .get_irq = ipic_get_irq,
> + .restart = mpc83xx_restart,
> + .time_init = mpc83xx_time_init,
> + .calibrate_decr = generic_calibrate_decr,
> + .progress = udbg_progress,
> +};
> diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.h b/arch/
> powerpc/platforms/83xx/mpc834x_itx.h
> new file mode 100644
> index 0000000..174ca4e
> --- /dev/null
> +++ b/arch/powerpc/platforms/83xx/mpc834x_itx.h
> @@ -0,0 +1,23 @@
> +/*
> + * arch/powerpc/platforms/83xx/mpc834x_itx.h
> + *
> + * MPC834X ITX common board definitions
> + *
> + * Maintainer: Kumar Gala <galak@kernel.crashing.org>
> + *
> + * This program is free software; you can redistribute it and/or
> modify it
> + * under the terms of the GNU General Public License as
> published by the
> + * Free Software Foundation; either version 2 of the License, or
> (at your
> + * option) any later version.
> + *
> + */
> +
> +#ifndef __MACH_MPC83XX_ITX_H__
> +#define __MACH_MPC83XX_ITX_H__
> +
> +#define PIRQA MPC83xx_IRQ_EXT4
> +#define PIRQB MPC83xx_IRQ_EXT5
> +#define PIRQC MPC83xx_IRQ_EXT6
> +#define PIRQD MPC83xx_IRQ_EXT7
> +
> +#endif /* __MACH_MPC83XX_ITX_H__ */
> diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/
> platforms/83xx/mpc83xx.h
> index 01cae10..532a084 100644
> --- a/arch/powerpc/platforms/83xx/mpc83xx.h
> +++ b/arch/powerpc/platforms/83xx/mpc83xx.h
> @@ -3,6 +3,7 @@
>
> #include <linux/init.h>
> #include <linux/device.h>
> +#include <linux/rtc.h>
>
> /*
> * Declaration for the various functions exported by the
> @@ -13,5 +14,9 @@ extern int add_bridge(struct device_node
> extern int mpc83xx_exclude_device(u_char bus, u_char devfn);
> extern void mpc83xx_restart(char *cmd);
> extern long mpc83xx_time_init(void);
> +#ifdef CONFIG_RTC_CLASS
> +extern int mpc83xx_set_rtc_time(struct rtc_time *tm);
> +extern void mpc83xx_get_rtc_time(struct rtc_time *tm);
> +#endif
>
> #endif /* __MPC83XX_H__ */
> diff --git a/include/asm-ppc/mpc83xx.h b/include/asm-ppc/mpc83xx.h
> index 02ed2c3..80076be 100644
> --- a/include/asm-ppc/mpc83xx.h
> +++ b/include/asm-ppc/mpc83xx.h
> @@ -25,6 +25,10 @@
> #include <platforms/83xx/mpc834x_sys.h>
> #endif
>
> +#ifdef CONFIG_MPC834x_ITX
> +#include <platforms/83xx/mpc834x_itx.h>
> +#endif
> +
This shouldn't be needed, its a hold over from arch/ppc
> #define _IO_BASE isa_io_base
> #define _ISA_MEM_BASE isa_mem_base
> #ifdef CONFIG_PCI
> --
> 1.2.4
^ permalink raw reply
* FW: unresolved symbol on target ... while insmod
From: srideep.devireddy @ 2006-06-29 5:25 UTC (permalink / raw)
To: linuxppc-embedded
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Thanks ... I am able to resolve the problem ...
________________________________
From: Srideep DeviReddy (WT01 - Broadband Networks)
Sent: Thursday, June 29, 2006 10:30 AM
To: 'linuxppc-embedded@ozlabs.org'
Subject: unresolved symbol on target ... while insmod
Hello All ,
I compiled a driver module using cross compiler for MPC8247 , now when
I try to insert the module in to the target I give me an error like
root@10.0.0.2:/home# insmod linux-kernel-bde.o
Using linux-kernel-bde.o
insmod: unresolved symbol devfs_register
insmod: unresolved symbol vsprintf
insmod: unresolved symbol kmalloc
insmod: unresolved symbol create_proc_entry
insmod: unresolved symbol __get_free_pages
insmod: unresolved symbol __save_flags_ptr
insmod: unresolved symbol ioremap
insmod: unresolved symbol free_irq
insmod: unresolved symbol high_memory
insmod: unresolved symbol devfs_unregister
insmod: unresolved symbol iounmap
insmod: unresolved symbol free_pages
insmod: unresolved symbol kfree
insmod: unresolved symbol strlen
insmod: unresolved symbol remove_proc_entry
insmod: unresolved symbol request_irq
insmod: unresolved symbol mem_map
insmod: unresolved symbol simple_strtoul
insmod: unresolved symbol sprintf
insmod: unresolved symbol __restore_flags
insmod: unresolved symbol printk
insmod: unresolved symbol __cli
Can any one show me some pointers what is this error all about . And how
to over come this . Thanks in advance
Best Regards
Srideep
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^ permalink raw reply
* unresolved symbol on target ... while insmod
From: srideep.devireddy @ 2006-06-29 5:00 UTC (permalink / raw)
To: linuxppc-embedded
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Hello All ,
I compiled a driver module using cross compiler for MPC8247 , now when
I try to insert the module in to the target I give me an error like
root@10.0.0.2:/home# insmod linux-kernel-bde.o
Using linux-kernel-bde.o
insmod: unresolved symbol devfs_register
insmod: unresolved symbol vsprintf
insmod: unresolved symbol kmalloc
insmod: unresolved symbol create_proc_entry
insmod: unresolved symbol __get_free_pages
insmod: unresolved symbol __save_flags_ptr
insmod: unresolved symbol ioremap
insmod: unresolved symbol free_irq
insmod: unresolved symbol high_memory
insmod: unresolved symbol devfs_unregister
insmod: unresolved symbol iounmap
insmod: unresolved symbol free_pages
insmod: unresolved symbol kfree
insmod: unresolved symbol strlen
insmod: unresolved symbol remove_proc_entry
insmod: unresolved symbol request_irq
insmod: unresolved symbol mem_map
insmod: unresolved symbol simple_strtoul
insmod: unresolved symbol sprintf
insmod: unresolved symbol __restore_flags
insmod: unresolved symbol printk
insmod: unresolved symbol __cli
Can any one show me some pointers what is this error all about . And how
to over come this . Thanks in advance
Best Regards
Srideep
The information contained in this electronic message and any attachments to this message are intended for the exclusive use of the addressee(s) and may contain proprietary, confidential or privileged information. If you are not the intended recipient, you should not disseminate, distribute or copy this e-mail. Please notify the sender immediately and destroy all copies of this message and any attachments.
WARNING: Computer viruses can be transmitted via email. The recipient should check this email and any attachments for the presence of viruses. The company accepts no liability for any damage caused by any virus transmitted by this email.
www.wipro.com
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^ permalink raw reply
* RE: patches applied to powerpc.git
From: Paul Mackerras @ 2006-06-29 6:05 UTC (permalink / raw)
To: Zang Roy-r61911; +Cc: linuxppc-dev, linux-kernel-owner
In-Reply-To: <9FCDBA58F226D911B202000BDBAD467306DD16AC@zch01exm40.ap.freescale.net>
Zang Roy-r61911 writes:
> I have submitted the "v2" version for mpc7448hpc2 board support in arch/powerpc/platforms/embedded6xx.
> I have not got any suggestion, since I submitted the code.
> In this submission I have addressed all the issues brought up in the "v1" submission.
> So could you help me merge the patches into your git tree ? If there is any comment about the code, please let me know.
I have taken 1, 2, and 4. Ben H asked me to delay with patch 3/4
because it will conflict with changes he is making. Also I would like
to see it done in a fashion which doesn't add two extra loads to
things like _mpic_ipi_read etc.
Paul.
^ permalink raw reply
* RE: Please pull from 'for_paulus' branch of powerpc
From: Zhang Wei-r63237 @ 2006-06-29 6:13 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
> On Jun 28, 2006, at 10:33 PM, Zhang Wei-r63237 wrote:
> >> On Jun 28, 2006, at 1:26 AM, Zhang Wei-r63237 wrote:
> >>
> >>> Hi, Kumar,
> >>>
> >>> Why moving these codes from pci.c to mpc86xx_hpcn.c? It's
> >> not must be.
> >>> These functions relate to PCI device of MPC8641D HPCn platform.
> >>> And we can also see the 'DECLARE_PCI_FIXUP_HEADER()'
> declaration in
> >>> pci.c of Powermac platform.
> >>
> >> The point for moving is 86xx/pci.c should apply to all
> 86xx systems,
> >> not just the HPCn system.
> >>
> >> - kumar
> >
> > The codes of moving is for PCI devices, it's for HPCn
> system now, but
> > it's also fit for the same PCI chips in the other 86xx
> system and the
> > same chip should keep the same setting in 86xx platforms, I
> think so.
> >
> > Even though other 86xx platforms have no these PCI chips,
> these codes
> > will not take effect.
>
> Its code bloat for systems that dont need it.
Yes, but it will make the codes more general.
Otherwise it will prevents using the same kernel image on another platform.
How to do if the other 86xx platform has the same ships? Add the same code to mpc86xx_xxx.c? It will also bloat the source tree.
>
> > And we can also see the similar solution in pSeries and PowerMac
> > platforms pci.c file. The function 'fixup_winbond_82c105' in
> > pseries/pci.c is for the Winbond 82c105 IDE controller on p610.
> > (pSeries have only p610? :-D ) The function 'fixup_k2_sata' in
> > powermac/pci.c is for K2-SATA. (K2-SATA chip is in all PowerMac
> > machine? ;-) )
>
> Realize, powermac and pseries describe actual full systems,
> not processor families like 86xx.
>
Yes, but the powermac and pseries full systems also have different model and different chips set.
And using processor families like 85xx, 86xx as powerpc platform sub-directory name is maybe not a good idea.
Thanks,
Zhang Wei
> > The moving will make the mpc86xx_hpcn.c more fat.
>
> That's all relative.
>
> - kumar
>
> >
> > Thanks,
> > Zhang Wei
> >
> >>
> >>>> -----Original Message-----
> >>>> From: linuxppc-dev-bounces+wei.zhang=freescale.com@ozlabs.org
> >>>> [mailto:linuxppc-dev-bounces+wei.zhang=freescale.com@ozlabs.or
> >>>> g] On Behalf Of Kumar Gala
> >>>> Sent: Wednesday, June 28, 2006 2:01 PM
> >>>> To: Paul Mackerras
> >>>> Cc: linuxppc-dev@ozlabs.org; linux-kernel@vger.kernel.org
> >>>> Subject: Please pull from 'for_paulus' branch of powerpc
> >>>>
> >>>> Please pull from 'for_paulus' branch of
> >>>> master.kernel.org:/pub/scm/linux/kernel/git/galak/powerpc.git
> >>>>
> >>>> to receive the following updates:
> >>>>
> >>>> arch/powerpc/kernel/cputable.c | 12 --
> >>>> arch/powerpc/platforms/86xx/mpc86xx.h | 8 +
> >>>> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 128
> >>>> +++++++++++++++++++++++++--
> >>>> arch/powerpc/platforms/86xx/mpc86xx_smp.c | 9 -
> >>>> arch/powerpc/platforms/86xx/pci.c | 136
> >>>> +----------------------------
> >>>> include/asm-powerpc/mpc86xx.h | 4
> >>>> 6 files changed, 138 insertions(+), 159 deletions(-)
> >>>>
> >>>> Kumar Gala:
> >>>> powerpc: minor cleanups for mpc86xx
> >>>>
> >>>> diff --git a/arch/powerpc/kernel/cputable.c
> >>>> b/arch/powerpc/kernel/cputable.c index 1c11488..abf7d42 100644
> >>>> --- a/arch/powerpc/kernel/cputable.c
> >>>> +++ b/arch/powerpc/kernel/cputable.c
> >>>> @@ -722,18 +722,6 @@ #if CLASSIC_PPC
> >>>> .oprofile_type = PPC_OPROFILE_G4,
> >>>> .platform = "ppc7450",
> >>>> },
> >>>> - { /* 8641 */
> >>>> - .pvr_mask = 0xffffffff,
> >>>> - .pvr_value = 0x80040010,
> >>>> - .cpu_name = "8641",
> >>>> - .cpu_features = CPU_FTRS_7447A,
> >>>> - .cpu_user_features = COMMON_USER |
> >>>> PPC_FEATURE_HAS_ALTIVEC_COMP,
> >>>> - .icache_bsize = 32,
> >>>> - .dcache_bsize = 32,
> >>>> - .num_pmcs = 6,
> >>>> - .cpu_setup = __setup_cpu_745x
> >>>> - },
> >>>> -
> >>>> { /* 82xx (8240, 8245, 8260 are all 603e cores) */
> >>>> .pvr_mask = 0x7fff0000,
> >>>> .pvr_value = 0x00810000,
> >>>> diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h
> >>>> b/arch/powerpc/platforms/86xx/mpc86xx.h
> >>>> index e3c9e4f..2834462 100644
> >>>> --- a/arch/powerpc/platforms/86xx/mpc86xx.h
> >>>> +++ b/arch/powerpc/platforms/86xx/mpc86xx.h
> >>>> @@ -15,11 +15,13 @@ #define __MPC86XX_H__
> >>>> * mpc86xx_* files. Mostly for use by mpc86xx_setup().
> >>>> */
> >>>>
> >>>> -extern int __init add_bridge(struct device_node *dev);
> >>>> +extern int add_bridge(struct device_node *dev);
> >>>>
> >>>> -extern void __init setup_indirect_pcie(struct
> >> pci_controller *hose,
> >>>> +extern int mpc86xx_exclude_device(u_char bus, u_char devfn);
> >>>> +
> >>>> +extern void setup_indirect_pcie(struct pci_controller *hose,
> >>>> u32 cfg_addr, u32
> >>>> cfg_data); -extern void __init
> >>>> setup_indirect_pcie_nomap(struct pci_controller *hose,
> >>>> +extern void setup_indirect_pcie_nomap(struct
> pci_controller *hose,
> >>>> void
> __iomem *cfg_addr,
> >>>> void
> __iomem *cfg_data);
> >>>>
> >>>> diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
> >>>> b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
> >>>> index 483c21d..ac7f418 100644
> >>>> --- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
> >>>> +++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
> >>>> @@ -36,6 +36,7 @@ #include <asm/mpic.h> #include
> >> <sysdev/fsl_soc.h>
> >>>>
> >>>> #include "mpc86xx.h"
> >>>> +#include "mpc8641_hpcn.h"
> >>>>
> >>>> #ifndef CONFIG_PCI
> >>>> unsigned long isa_io_base = 0;
> >>>> @@ -186,17 +187,130 @@ mpc86xx_map_irq(struct pci_dev *dev, uns
> >>>> return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET; }
> >>>>
> >>>> +static void __devinit quirk_ali1575(struct pci_dev *dev) {
> >>>> + unsigned short temp;
> >>>> +
> >>>> + /*
> >>>> + * ALI1575 interrupts route table setup:
> >>>> + *
> >>>> + * IRQ pin IRQ#
> >>>> + * PIRQA ---- 3
> >>>> + * PIRQB ---- 4
> >>>> + * PIRQC ---- 5
> >>>> + * PIRQD ---- 6
> >>>> + * PIRQE ---- 9
> >>>> + * PIRQF ---- 10
> >>>> + * PIRQG ---- 11
> >>>> + * PIRQH ---- 12
> >>>> + *
> >>>> + * interrupts for PCI slot0 -- PIRQA / PIRQB /
> PIRQC / PIRQD
> >>>> + * PCI slot1 -- PIRQB / PIRQC /
> PIRQD / PIRQA
> >>>> + */
> >>>> + pci_write_config_dword(dev, 0x48, 0xb9317542);
> >>>> +
> >>>> + /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
> >>>> + pci_write_config_byte(dev, 0x86, 0x0c);
> >>>> +
> >>>> + /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
> >>>> + pci_write_config_byte(dev, 0x87, 0x0d);
> >>>> +
> >>>> + /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
> >>>> + pci_write_config_byte(dev, 0x88, 0x0f);
> >>>> +
> >>>> + /* USB 2.0 controller, interrupt: PIRQ7 */
> >>>> + pci_write_config_byte(dev, 0x74, 0x06);
> >>>> +
> >>>> + /* Audio controller, interrupt: PIRQE */
> >>>> + pci_write_config_byte(dev, 0x8a, 0x0c);
> >>>> +
> >>>> + /* Modem controller, interrupt: PIRQF */
> >>>> + pci_write_config_byte(dev, 0x8b, 0x0d);
> >>>> +
> >>>> + /* HD audio controller, interrupt: PIRQG */
> >>>> + pci_write_config_byte(dev, 0x8c, 0x0e);
> >>>> +
> >>>> + /* Serial ATA interrupt: PIRQD */
> >>>> + pci_write_config_byte(dev, 0x8d, 0x0b);
> >>>> +
> >>>> + /* SMB interrupt: PIRQH */
> >>>> + pci_write_config_byte(dev, 0x8e, 0x0f);
> >>>> +
> >>>> + /* PMU ACPI SCI interrupt: PIRQH */
> >>>> + pci_write_config_byte(dev, 0x8f, 0x0f);
> >>>> +
> >>>> + /* Primary PATA IDE IRQ: 14
> >>>> + * Secondary PATA IDE IRQ: 15
> >>>> + */
> >>>> + pci_write_config_byte(dev, 0x44, 0x3d);
> >>>> + pci_write_config_byte(dev, 0x75, 0x0f);
> >>>> +
> >>>> + /* Set IRQ14 and IRQ15 to legacy IRQs */
> >>>> + pci_read_config_word(dev, 0x46, &temp);
> >>>> + temp |= 0xc000;
> >>>> + pci_write_config_word(dev, 0x46, temp);
> >>>> +
> >>>> + /* Set i8259 interrupt trigger
> >>>> + * IRQ 3: Level
> >>>> + * IRQ 4: Level
> >>>> + * IRQ 5: Level
> >>>> + * IRQ 6: Level
> >>>> + * IRQ 7: Level
> >>>> + * IRQ 9: Level
> >>>> + * IRQ 10: Level
> >>>> + * IRQ 11: Level
> >>>> + * IRQ 12: Level
> >>>> + * IRQ 14: Edge
> >>>> + * IRQ 15: Edge
> >>>> + */
> >>>> + outb(0xfa, 0x4d0);
> >>>> + outb(0x1e, 0x4d1);
> >>>> +}
> >>>>
> >>>> -int
> >>>> -mpc86xx_exclude_device(u_char bus, u_char devfn)
> >>>> +static void __devinit quirk_uli5288(struct pci_dev *dev)
> >>>> {
> >>>> -#if !defined(CONFIG_PCI)
> >>>> - if (bus == 0 && PCI_SLOT(devfn) == 0)
> >>>> - return PCIBIOS_DEVICE_NOT_FOUND;
> >>>> -#endif
> >>>> + unsigned char c;
> >>>> +
> >>>> + pci_read_config_byte(dev,0x83,&c);
> >>>> + c |= 0x80;
> >>>> + pci_write_config_byte(dev, 0x83, c);
> >>>> +
> >>>> + pci_write_config_byte(dev, 0x09, 0x01);
> >>>> + pci_write_config_byte(dev, 0x0a, 0x06);
> >>>> +
> >>>> + pci_read_config_byte(dev,0x83,&c);
> >>>> + c &= 0x7f;
> >>>> + pci_write_config_byte(dev, 0x83, c);
> >>>>
> >>>> - return PCIBIOS_SUCCESSFUL;
> >>>> + pci_read_config_byte(dev,0x84,&c);
> >>>> + c |= 0x01;
> >>>> + pci_write_config_byte(dev, 0x84, c);
> >>>> }
> >>>> +
> >>>> +static void __devinit quirk_uli5229(struct pci_dev *dev) {
> >>>> + unsigned short temp;
> >>>> + pci_write_config_word(dev, 0x04, 0x0405);
> >>>> + pci_read_config_word(dev, 0x4a, &temp);
> >>>> + temp |= 0x1000;
> >>>> + pci_write_config_word(dev, 0x4a, temp); }
> >>>> +
> >>>> +static void __devinit early_uli5249(struct pci_dev *dev) {
> >>>> + unsigned char temp;
> >>>> + pci_write_config_word(dev, 0x04, 0x0007);
> >>>> + pci_read_config_byte(dev, 0x7c, &temp);
> >>>> + pci_write_config_byte(dev, 0x7c, 0x80);
> >>>> + pci_write_config_byte(dev, 0x09, 0x01);
> >>>> + pci_write_config_byte(dev, 0x7c, temp);
> >>>> + dev->class |= 0x1;
> >>>> +}
> >>>> +
> >>>> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575,
> >> quirk_ali1575);
> >>>> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288,
> >> quirk_uli5288);
> >>>> +DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229,
> >> quirk_uli5229);
> >>>> +DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249,
> early_uli5249);
> >>>> #endif /* CONFIG_PCI */
> >>>>
> >>>>
> >>>> diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
> >>>> b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
> >>>> index 944ec4b..9cca3d1 100644
> >>>> --- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
> >>>> +++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
> >>>> @@ -34,8 +34,8 @@ extern unsigned long
> __secondary_hold_ac static
> >>>> void __init smp_86xx_release_core(int nr) {
> >>>> - void *mcm_vaddr;
> >>>> - unsigned long vaddr, pcr;
> >>>> + __be32 __iomem *mcm_vaddr;
> >>>> + unsigned long pcr;
> >>>>
> >>>> if (nr < 0 || nr >= NR_CPUS)
> >>>> return;
> >>>> @@ -45,10 +45,9 @@ smp_86xx_release_core(int nr)
> >>>> */
> >>>> mcm_vaddr = ioremap(get_immrbase() + MPC86xx_MCM_OFFSET,
> >>>> MPC86xx_MCM_SIZE);
> >>>> - vaddr = (unsigned long)mcm_vaddr +
> MCM_PORT_CONFIG_OFFSET;
> >>>> - pcr = in_be32((volatile unsigned *)vaddr);
> >>>> + pcr = in_be32(mcm_vaddr +
> (MCM_PORT_CONFIG_OFFSET >> 2));
> >>>> pcr |= 1 << (nr + 24);
> >>>> - out_be32((volatile unsigned *)vaddr, pcr);
> >>>> + out_be32(mcm_vaddr + (MCM_PORT_CONFIG_OFFSET >>
> 2), pcr);
> >>>> }
> >>>>
> >>>>
> >>>> diff --git a/arch/powerpc/platforms/86xx/pci.c
> >>>> b/arch/powerpc/platforms/86xx/pci.c
> >>>> index 5180df7..0d8b340 100644
> >>>> --- a/arch/powerpc/platforms/86xx/pci.c
> >>>> +++ b/arch/powerpc/platforms/86xx/pci.c
> >>>> @@ -122,15 +122,12 @@ static void __init setup_pcie_atmu(struc
> >>>> static void __init mpc86xx_setup_pcie(struct
> pci_controller *hose,
> >>>> u32 pcie_offset, u32 pcie_size) {
> >>>> - volatile struct ccsr_pex *pcie;
> >>>> u16 cmd;
> >>>> unsigned int temps;
> >>>>
> >>>> DBG("PCIE host controller register offset 0x%08x, size
> >> 0x%08x.\n",
> >>>> pcie_offset, pcie_size);
> >>>>
> >>>> - pcie = ioremap(pcie_offset, pcie_size);
> >>>> -
> >>>> early_read_config_word(hose, 0, 0, PCI_COMMAND, &cmd);
> >>>> cmd |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER |
> >> PCI_COMMAND_MEMORY
> >>>> | PCI_COMMAND_IO;
> >>>> @@ -144,6 +141,14 @@ mpc86xx_setup_pcie(struct pci_controller
> >>>> early_write_config_dword(hose, 0, 0,
> PCI_PRIMARY_BUS, temps); }
> >>>>
> >>>> +int mpc86xx_exclude_device(u_char bus, u_char devfn) {
> >>>> + if (bus == 0 && PCI_SLOT(devfn) == 0)
> >>>> + return PCIBIOS_DEVICE_NOT_FOUND;
> >>>> +
> >>>> + return PCIBIOS_SUCCESSFUL;
> >>>> +}
> >>>> +
> >>>> int __init add_bridge(struct device_node *dev) {
> >>>> int len;
> >>>> @@ -198,128 +203,3 @@ int __init add_bridge(struct device_node
> >>>>
> >>>> return 0;
> >>>> }
> >>>> -
> >>>> -static void __devinit quirk_ali1575(struct pci_dev *dev) -{
> >>>> - unsigned short temp;
> >>>> -
> >>>> - /*
> >>>> - * ALI1575 interrupts route table setup:
> >>>> - *
> >>>> - * IRQ pin IRQ#
> >>>> - * PIRQA ---- 3
> >>>> - * PIRQB ---- 4
> >>>> - * PIRQC ---- 5
> >>>> - * PIRQD ---- 6
> >>>> - * PIRQE ---- 9
> >>>> - * PIRQF ---- 10
> >>>> - * PIRQG ---- 11
> >>>> - * PIRQH ---- 12
> >>>> - *
> >>>> - * interrupts for PCI slot0 -- PIRQA / PIRQB /
> PIRQC / PIRQD
> >>>> - * PCI slot1 -- PIRQB / PIRQC /
> PIRQD / PIRQA
> >>>> - */
> >>>> - pci_write_config_dword(dev, 0x48, 0xb9317542);
> >>>> -
> >>>> - /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
> >>>> - pci_write_config_byte(dev, 0x86, 0x0c);
> >>>> -
> >>>> - /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
> >>>> - pci_write_config_byte(dev, 0x87, 0x0d);
> >>>> -
> >>>> - /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
> >>>> - pci_write_config_byte(dev, 0x88, 0x0f);
> >>>> -
> >>>> - /* USB 2.0 controller, interrupt: PIRQ7 */
> >>>> - pci_write_config_byte(dev, 0x74, 0x06);
> >>>> -
> >>>> - /* Audio controller, interrupt: PIRQE */
> >>>> - pci_write_config_byte(dev, 0x8a, 0x0c);
> >>>> -
> >>>> - /* Modem controller, interrupt: PIRQF */
> >>>> - pci_write_config_byte(dev, 0x8b, 0x0d);
> >>>> -
> >>>> - /* HD audio controller, interrupt: PIRQG */
> >>>> - pci_write_config_byte(dev, 0x8c, 0x0e);
> >>>> -
> >>>> - /* Serial ATA interrupt: PIRQD */
> >>>> - pci_write_config_byte(dev, 0x8d, 0x0b);
> >>>> -
> >>>> - /* SMB interrupt: PIRQH */
> >>>> - pci_write_config_byte(dev, 0x8e, 0x0f);
> >>>> -
> >>>> - /* PMU ACPI SCI interrupt: PIRQH */
> >>>> - pci_write_config_byte(dev, 0x8f, 0x0f);
> >>>> -
> >>>> - /* Primary PATA IDE IRQ: 14
> >>>> - * Secondary PATA IDE IRQ: 15
> >>>> - */
> >>>> - pci_write_config_byte(dev, 0x44, 0x3d);
> >>>> - pci_write_config_byte(dev, 0x75, 0x0f);
> >>>> -
> >>>> - /* Set IRQ14 and IRQ15 to legacy IRQs */
> >>>> - pci_read_config_word(dev, 0x46, &temp);
> >>>> - temp |= 0xc000;
> >>>> - pci_write_config_word(dev, 0x46, temp);
> >>>> -
> >>>> - /* Set i8259 interrupt trigger
> >>>> - * IRQ 3: Level
> >>>> - * IRQ 4: Level
> >>>> - * IRQ 5: Level
> >>>> - * IRQ 6: Level
> >>>> - * IRQ 7: Level
> >>>> - * IRQ 9: Level
> >>>> - * IRQ 10: Level
> >>>> - * IRQ 11: Level
> >>>> - * IRQ 12: Level
> >>>> - * IRQ 14: Edge
> >>>> - * IRQ 15: Edge
> >>>> - */
> >>>> - outb(0xfa, 0x4d0);
> >>>> - outb(0x1e, 0x4d1);
> >>>> -}
> >>>> -
> >>>> -static void __devinit quirk_uli5288(struct pci_dev *dev) -{
> >>>> - unsigned char c;
> >>>> -
> >>>> - pci_read_config_byte(dev,0x83,&c);
> >>>> - c |= 0x80;
> >>>> - pci_write_config_byte(dev, 0x83, c);
> >>>> -
> >>>> - pci_write_config_byte(dev, 0x09, 0x01);
> >>>> - pci_write_config_byte(dev, 0x0a, 0x06);
> >>>> -
> >>>> - pci_read_config_byte(dev,0x83,&c);
> >>>> - c &= 0x7f;
> >>>> - pci_write_config_byte(dev, 0x83, c);
> >>>> -
> >>>> - pci_read_config_byte(dev,0x84,&c);
> >>>> - c |= 0x01;
> >>>> - pci_write_config_byte(dev, 0x84, c);
> >>>> -}
> >>>> -
> >>>> -static void __devinit quirk_uli5229(struct pci_dev *dev) -{
> >>>> - unsigned short temp;
> >>>> - pci_write_config_word(dev, 0x04, 0x0405);
> >>>> - pci_read_config_word(dev, 0x4a, &temp);
> >>>> - temp |= 0x1000;
> >>>> - pci_write_config_word(dev, 0x4a, temp);
> >>>> -}
> >>>> -
> >>>> -static void __devinit early_uli5249(struct pci_dev *dev) -{
> >>>> - unsigned char temp;
> >>>> - pci_write_config_word(dev, 0x04, 0x0007);
> >>>> - pci_read_config_byte(dev, 0x7c, &temp);
> >>>> - pci_write_config_byte(dev, 0x7c, 0x80);
> >>>> - pci_write_config_byte(dev, 0x09, 0x01);
> >>>> - pci_write_config_byte(dev, 0x7c, temp);
> >>>> - dev->class |= 0x1;
> >>>> -}
> >>>> -
> >>>> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575,
> >> quirk_ali1575);
> >>>> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL,
> >>>> 0x5288, quirk_uli5288);
> >>>> -DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229,
> >> quirk_uli5229);
> >>>> -DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL,
> >>>> 0x5249, early_uli5249); diff --git
> >>>> a/include/asm-powerpc/mpc86xx.h
> >>>> b/include/asm-powerpc/mpc86xx.h index d0a6718..00d72a7 100644
> >>>> --- a/include/asm-powerpc/mpc86xx.h
> >>>> +++ b/include/asm-powerpc/mpc86xx.h
> >>>> @@ -20,10 +20,6 @@ #include <asm/mmu.h>
> >>>>
> >>>> #ifdef CONFIG_PPC_86xx
> >>>>
> >>>> -#ifdef CONFIG_MPC8641_HPCN
> >>>> -#include <platforms/86xx/mpc8641_hpcn.h> -#endif
> >>>> -
> >>>> #define _IO_BASE isa_io_base
> >>>> #define _ISA_MEM_BASE isa_mem_base
> >>>> #ifdef CONFIG_PCI
> >>>>
> >>>> _______________________________________________
> >>>> Linuxppc-dev mailing list
> >>>> Linuxppc-dev@ozlabs.org
> >>>> https://ozlabs.org/mailman/listinfo/linuxppc-dev
> >>>>
> >>
>
^ permalink raw reply
* RE: patches applied to powerpc.git
From: Zang Roy-r61911 @ 2006-06-29 6:38 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, linux-kernel-owner
>
> Zang Roy-r61911 writes:
>
> > I have submitted the "v2" version for mpc7448hpc2 board
> support in arch/powerpc/platforms/embedded6xx.
> > I have not got any suggestion, since I submitted the code.
> > In this submission I have addressed all the issues
> brought up in the "v1" submission.
> > So could you help me merge the patches into your git
> tree ? If there is any comment about the code, please let me know.
>
> I have taken 1, 2, and 4. Ben H asked me to delay with patch
> 3/4 because it will conflict with changes he is making. Also
> I would like to see it done in a fashion which doesn't add
> two extra loads to things like _mpic_ipi_read etc.
>
> Paul.
>
Paul
Great news!
For tsi108 mpic part, it is a bit complex:). We can wait for
Ben's code to decide the direction of our mpic.
Ben,
Where is your patch? So many guys wait for it!
Roy
^ permalink raw reply
* new IRQ work status
From: Benjamin Herrenschmidt @ 2006-06-29 8:36 UTC (permalink / raw)
To: linuxppc-dev
Here's a progress report on my new irq management work.
I've ported pseries, iseries (well tested) and cell (barely tested) at
this point, and tested various funky combinations of device-trees to
validate as much as the core as possible. I still need to port over chrp
and maple which are easy, and powermac which will be a bit more
difficult as it relies a lot more on intrs/n_intrs in the device-nodes
which I've now removed.
Hopefully, it should be finished this week. The current serie of patch
applies on top of 2.6.17-mm1. I will do a version on top of the powerpc
tree as soon as the genirq port is upstream (which hopefully should
happen soon, possibly tomorrow).
I don't yet want to post the patches on the list (too much), they can be
found at:
http://gate.crashing.org/~benh/irq-WIP/
Comments welcome.
Cheers,
Ben.
^ permalink raw reply
* Re: Please pull from 'for_paulus' branch of powerpc
From: Benjamin Herrenschmidt @ 2006-06-29 9:10 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel, Zhang Wei-r63237
In-Reply-To: <BDF5A6D5-E7F4-4CDF-9B34-13A66A0B7C99@kernel.crashing.org>
> > Even though other 86xx platforms have no these PCI chips, these
> > codes will not take effect.
>
> Its code bloat for systems that dont need it.
Well... it depends :) If it's totally unlikely to ever have this chip in
those platforms, then yes. But if it's common enough, it's fair to have
the quirk in a generic place (provided that Whang is right and the fixup
is indeed the same for all 86xx platforms)
Ben.
^ permalink raw reply
* Re: [Alsa-devel] RFC: dma_mmap_coherent() for powerpc/ppc architecture and ALSA?
From: Takashi Iwai @ 2006-06-29 9:27 UTC (permalink / raw)
To: Gerhard Pircher; +Cc: linuxppc-dev, rlrevell, alsa-devel, linux-kernel
In-Reply-To: <20060628202753.198630@gmx.net>
At Wed, 28 Jun 2006 22:27:53 +0200,
Gerhard Pircher wrote:
>
> Hi,
>
> It took a little bit longer to integrate the patch, as I didn't figure out first how to implement the __dma_mmap_coherent() function for PPC systems with CONFIG_NOT_COHERENT_CACHE defined. :)
>
> Unfortunately my system still crashes within snd_pcm_mmap_data_nopage()
> (sound/core/pcm_native.c), as you can see below. I guess it tries to remap
> a DMA buffer allocated by the not cache coherent DMA memory allocation
> function in arch/ppc/kernel/dma-mapping.c.
Strange, nopage will be never called if you apply my patch and modify
to use dma_mmap_coherent().
Takashi
^ permalink raw reply
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