* Re: U-Boot and kernel 2.6
From: Dmitry Chichkov @ 2006-08-01 5:12 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <4418.62.48.238.11.1086803257.squirrel@alumni.deec.uc.pt>
Hi Ricardo,
I would recommend not to try old versions of U-Boot ("from 2.4") with new
linux kernels ("2.6").
We had some troubles with invalid memory mappings in this configuration.
-- Regards, Dmitry Chichkov
"Ricardo DIz" <rdiz@alumni.deec.uc.pt> ???????/???????? ? ????????
?????????: news:4418.62.48.238.11.1086803257.squirrel@alumni.deec.uc.pt...
>
> Hi,
>
> I'm trying to boot a custom 860T board using the latest kernel from
> linuxppc-2.5. The board is currently using a variation of an old version
> of U-Boot (0.2.0) along with a hacked 2.4.20 linux kernel version.
>
> My first aim is to boot a simple kernel and make it get to a shell. For
> that I compiled the kernel, but did not compiled u-boot with a recent
> version.
>
> When booting, the kernel got uncompressed, but then it resets! I presume
> the watchdog (which is enabled), is resetting the processor, so I guess
> booting just stalls. Was there any changes in the way parameters were
> received by the kernel since 2.4.20?
>
> Oh, I forgot to mention the compiler. I'm still using a gcc 2.95
> cross-compiler, altough I tried using a gcc 3.2 cross-compiler for the
> 8260 once, but got the same result.
>
> I followed a recent thread very similar to this, but that turned out to be
> just a matter of UART configuration, and I don't thinks this is the case.
>
> Any thoughts?
>
> Thanks in advance,
> Ricardo Diz
>
> ** Sent via the linuxppc-embedded mail list. See
> http://lists.linuxppc.org/
>
>
^ permalink raw reply
* RE: RE: RE: cpm_dpalloc
From: Li Yang-r58472 @ 2006-08-01 3:20 UTC (permalink / raw)
To: Keinen Namen; +Cc: linuxppc-embedded
In-Reply-To: <20060731133919.31980@gmx.net>
I'm not very familiar with SPI. See if someone on the list can help.
Best Regards,
Leo
> -----Original Message-----
> From: Keinen Namen [mailto:GSM909@gmx.de]
> Sent: Monday, July 31, 2006 9:39 PM
> To: Li Yang-r58472
> Subject: Re: RE: RE: cpm_dpalloc
>=20
> Thx, now it=B4s working fine.
>=20
> But my Problem didn=B4t solved :(
> But I have an other Question about SPI.
>=20
> How can I see that the init of RX and TX Parameter are succsesful ?
> I just looking till the CPM_CR_FLG till is cleard but I did not see if =
the init
> is ok?
>=20
> I try to look at the RX internal byte count in the Parameter ram, but =
there is nothing
> chance.
>=20
> Regards
> Fred
>=20
> -------- Original-Nachricht --------
> Datum: Mon, 31 Jul 2006 17:24:30 +0800
> Von: "Li Yang-r58472" <LeoLi@freescale.com>
> An: "Keinen Namen" <GSM909@gmx.de>
> Betreff: RE: RE: cpm_dpalloc
>=20
> > Yes, but that patch is for powerpc arch. You can use this patch for =
ppc.
> > http://patchwork.ozlabs.org/linuxppc/patch?id=3D4317
> >
> > Best Regards,
> > Leo
> > > -----Original Message-----
> > > From: Keinen Namen [mailto:GSM909@gmx.de]
> > > Sent: Monday, July 31, 2006 5:21 PM
> > > To: Li Yang-r58472
> > > Subject: Re: RE: cpm_dpalloc
> > >
> > > Thanks for your fast Help.
> > >
> > > I=B4m not firm in patches. Is this the patch ?
> > > http://lkml.org/lkml/2006/6/30/108
> > >
> > > Regards
> > > Fred
> > > -------- Original-Nachricht --------
> > > Datum: Mon, 31 Jul 2006 16:56:54 +0800
> > > Von: "Li Yang-r58472" <LeoLi@freescale.com>
> > > An: GSM909@gmx.de, linuxppc-embedded@ozlabs.org
> > > Betreff: RE: cpm_dpalloc
> > >
> > > > There is a bug in rheap for alignment. The patch is still =
hanging
> > around.
> > > >
> > > > Search rheap and alignment on the linuxppc-dev list for patch
> > previously
> > > > posted.
> > > >
> > > > Best Regards,
> > > > Leo
> > > > > -----Original Message-----
> > > > > From: =
linuxppc-embedded-bounces+leoli=3Dfreescale.com@ozlabs.org
> > > > > =
[mailto:linuxppc-embedded-bounces+leoli=3Dfreescale.com@ozlabs.org] On
> > > > Behalf Of
> > > > > GSM909@gmx.de
> > > > > Sent: Monday, July 31, 2006 4:50 PM
> > > > > To: linuxppc-embedded@ozlabs.org
> > > > > Subject: cpm_dpalloc
> > > > >
> > > > > Hi All
> > > > >
> > > > > I have a MPC82xx Processor from Freescale with Linux 2.6.14 ( =
Can=B4t
> > > > chance to an
> > > > > new version).
> > > > >
> > > > > My Problem is that I want to allocate a 64byte of memory in =
the dual
> > > > ported ram
> > > > > with an alignment of 64bytes. (Needed for SPI Parameter Ram)
> > > > >
> > > > > the funktion cpm_dpalloc(64,64) returned 0x220 but that are =
not in a
> > 64
> > > > byte
> > > > > alignment.
> > > > >
> > > > > Regards
> > > > > Fred
> > > > > --
> > > > >
> > > > >
> > > > > Der GMX SmartSurfer hilft bis zu 70% Ihrer Onlinekosten zu =
sparen!
> > > > > Ideal f=FCr Modem und ISDN: =
http://www.gmx.net/de/go/smartsurfer
> > > > > _______________________________________________
> > > > > Linuxppc-embedded mailing list
> > > > > Linuxppc-embedded@ozlabs.org
> > > > > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> > > > _______________________________________________
> > > > Linuxppc-embedded mailing list
> > > > Linuxppc-embedded@ozlabs.org
> > > > https://ozlabs.org/mailman/listinfo/linuxppc-embedded
> > >
> > > --
> > >
> > >
> > > Echte DSL-Flatrate dauerhaft f=FCr 0,- Euro*. Nur noch kurze Zeit!
> > > "Feel free" mit GMX DSL: http://www.gmx.net/de/go/dsl
>=20
> --
>=20
>=20
> Echte DSL-Flatrate dauerhaft f=FCr 0,- Euro*. Nur noch kurze Zeit!
> "Feel free" mit GMX DSL: http://www.gmx.net/de/go/dsl
^ permalink raw reply
* who has silicon's 722 driver source
From: hpchen @ 2006-08-01 2:55 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 235 bytes --]
Hi, All:
I'm interfacing mpc8245 to sm722, I found in the previous
mails that someone has successfully written driver for it
using Power PC. Can anybody tell me the addresses to download the driver and its source code?
Thanks!
[-- Attachment #2: Type: text/html, Size: 3370 bytes --]
^ permalink raw reply
* Portting Linux to MPC8247
From: yulq @ 2006-08-01 1:23 UTC (permalink / raw)
To: linuxppc-embedded
I am portting Linux(ver. 2.4.24) to MPC8247. I use U-boot and ELDK Kit.
The boot and kernel works well, but when the init process to execute
/sbin/init the board restarts. The message is shown following:
... ...
Memory BAT mapping: BAT2=32Mb, BAT3=0Mb, residual: 0Mb
Linux version 2.4.24-pre2 (yulq@MDS-Server) (gcc version 3.2.2 20030217
(Yellow
Dog Linux 3.0 3.2.2-2a_1)) #99 Mon Jul 31 17:51:08 CST 2006
On node 0 totalpages: 8192
zone(0): 8192 pages.
zone(1): 0 pages.
zone(2): 0 pages.
Kernel command line: console=ttyS0,9600n8 root=/dev/ram
ip=192.168.2.130:192.168
.2.147:192.168.2.147:255.255.255.0:yulq::off
Warning: real time clock seems stuck!
Calibrating delay loop... 131.89 BogoMIPS
Memory: 27088k available (988k kernel code, 324k data, 52k init, 0k
highmem)
Dentry cache hash table entries: 4096 (order: 3, 32768 bytes)
Inode cache hash table entries: 2048 (order: 2, 16384 bytes)
Mount cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer cache hash table entries: 1024 (order: 0, 4096 bytes)
Page-cache hash table entries: 8192 (order: 3, 32768 bytes)
POSIX conformance testing by UNIFIX
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
CPM UART driver version 0.01
ttyS0 on SMC1 at 0x0000, BRG7
ttyS1 on SCC1 at 0x8000, BRG1
ttyS2 on SCC2 at 0x8100, BRG2
pty: 256 Unix98 ptys configured
eth0: FCC1 ENET Version 0.4, 08:00:3E:2D:9D:5B
eth0: Phy @ 0x1, type LXT971 (0x001378e2)
RAMDISK driver initialized: 16 RAM disks of 16384K size 1024 blocksize
NET4: Linux TCP/IP 1.0 for NET4.0
IP Protocols: ICMP, UDP, TCP
IP: routing cache hash table of 512 buckets, 4Kbytes
TCP: Hash tables configured (established 2048 bind 4096)
eth0: config: auto-negotiation on, 100FDX, 100HDX, 10FDX, 10HDX.
IP-Config: Complete:
device=eth0, addr=192.168.2.130, mask=255.255.255.0,
gw=192.168.2.147,
host=yulq, domain=, nis-domain=(none),
bootserver=192.168.2.147, rootserver=192.168.2.147, rootpath=
NET4: Unix domain sockets 1.0/SMP for Linux NET4.0.
RAMDISK: Compressed image found at block 0
Freeing initrd memory: 3919k freed
VFS: Mounted root (ext2 filesystem) readonly.
Freeing unused kernel memory: 52k init
Open an initial console successful
Board restarts !
What is the problem ?
^ permalink raw reply
* Re: [PATCH] crash in aty128_set_lcd_enable on PowerBook
From: Antonino A. Daplas @ 2006-07-31 23:50 UTC (permalink / raw)
To: Olaf Hering; +Cc: Andrew Morton, linuxppc-dev, linux-kernel
In-Reply-To: <20060731185024.GA5117@suse.de>
Olaf Hering wrote:
> On Sun, Jul 16, Olaf Hering wrote:
>
>> Current Linus tree crashes in aty128_set_lcd_enable() because par->pdev
>> is NULL. This happens since at least a week. Call trace is:
>>
>> aty128_set_lcd_enable
>> aty128fb_set_par
>> fbcon_init
>> visual_init
>> take_over_console
>> fbcon_takeover
>> notifier_call_chain
>> blocking_notifier_call_chain
>> register_framebuffer
>> aty128fb_probe
>> pci_device_probe
>> bus_for_each_dev
>> driver_attach
>> bus_add_driver
>> driver_register
>> __pci_register_driver
>> aty128fb_init
>> init
>> kernel_thread
>>
>
>
> - info->fix was assigned twice.
> - par->vram_size is assigned in aty128_probe(), no need to redo it again in aty128_init()
> - register_framebuffer() uses uninitialized struct members,
> move it past par->pdev assignment and past aty128_bl_init().
>
>
Looks good.
> Signed-off-by: Olaf Hering <olh@suse.de>
Acked-by: Antonino Daplas <adaplas@pol.net>
^ permalink raw reply
* Re: [PATCH][2/2] RTAS MSI
From: Jake Moilanen @ 2006-07-31 21:01 UTC (permalink / raw)
To: PaulMackerras, michael; +Cc: linuxppc-dev
In-Reply-To: <1154320382.19883.26.camel@localhost.localdomain>
Here's version 3 which addresses all of Michael's comments.
Signed-off-by: Jake Moilanen <moilanen@austin.ibm.com>
arch/powerpc/kernel/prom_init.c | 8 ++
arch/powerpc/platforms/pseries/setup.c | 4 +
arch/powerpc/platforms/pseries/xics.c | 5 +
drivers/pci/Kconfig | 2
drivers/pci/Makefile | 5 +
drivers/pci/msi-rtas.c | 99
+++++++++++++++++++++++++++++++++
include/asm-powerpc/rtas.h | 4 +
7 files changed, 122 insertions(+), 5 deletions(-)
Index: 2.6-msi/drivers/pci/Makefile
===================================================================
--- 2.6-msi.orig/drivers/pci/Makefile
+++ 2.6-msi/drivers/pci/Makefile
@@ -27,9 +27,12 @@ obj-$(CONFIG_PPC64) += setup-bus.o
obj-$(CONFIG_MIPS) += setup-bus.o setup-irq.o
obj-$(CONFIG_X86_VISWS) += setup-irq.o
-msiobj-y := msi.o msi-apic.o
+msiobj-$(CONFIG_X86) += msi.o msi-apic.o
+msiobj-$(CONFIG_IA64) += msi.o msi-apic.o
msiobj-$(CONFIG_IA64_GENERIC) += msi-altix.o
msiobj-$(CONFIG_IA64_SGI_SN2) += msi-altix.o
+msiobj-$(CONFIG_PPC_PSERIES) += msi-rtas.o
+
obj-$(CONFIG_PCI_MSI) += $(msiobj-y)
#
Index: 2.6-msi/drivers/pci/msi-rtas.c
===================================================================
--- /dev/null
+++ 2.6-msi/drivers/pci/msi-rtas.c
@@ -0,0 +1,99 @@
+/*
+ * Jake Moilanen <moilanen@austin.ibm.com>
+ * Copyright (C) 2006 IBM
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; version 2 of the
+ * License.
+ *
+ */
+
+#include <linux/pci.h>
+#include <linux/irq.h>
+#include <asm/rtas.h>
+#include <asm/hw_irq.h>
+#include <asm/ppc-pci.h>
+
+int rtas_enable_msi(struct pci_dev* pdev)
+{
+ int seq_num = 1;
+ int i;
+ int rc;
+ int query_token = rtas_token("ibm,query-interrupt-source-number");
+ int ret[2];
+ int n_intr;
+ int last_virq = NO_IRQ;
+ int virq;
+ unsigned int addr;
+ unsigned long buid;
+ struct device_node * dn;
+
+ dn = pci_device_to_OF_node(pdev);
+
+ if (!of_find_property(dn, "ibm,req#msi", NULL))
+ return -ENOENT;
+
+ buid = get_phb_buid(dn->parent);
+ addr = (pdev->bus->number << 16) | (pdev->devfn << 8);
+
+ do {
+ rc = rtas_call(rtas_token("ibm,change-msi"), 6, 3, ret, addr,
+ buid >> 32, buid & 0xffffffff,
+ 0, 0, seq_num);
+
+ seq_num = ret[1];
+ } while (rtas_busy_delay(rc));
+
+ if (rc) {
+ printk(KERN_WARNING "error[%d]: getting the number of "
+ "MSI interrupts for %s\n", rc, dn->name);
+ return -EIO;
+ }
+
+ /* Return if there's no MSI interrupts */
+ if (!ret[0])
+ return -ENOENT;
+
+ n_intr = ret[0];
+
+ for (i = 0; i < n_intr; i++) {
+ do {
+ rc = rtas_call(query_token, 4, 3, ret, addr,
+ buid >> 32, buid & 0xffffffff, i);
+ } while (rtas_busy_delay(rc));
+
+ if (!rc) {
+ virq = irq_create_mapping(irq_find_host(dn), ret[0],
+ ret[1] ? IRQ_TYPE_EDGE_RISING :
+ IRQ_TYPE_LEVEL_LOW);
+
+ /* for now, take the last valid vector given out */
+ if (virq != NO_IRQ)
+ last_virq = virq;
+
+ } else {
+ printk(KERN_WARNING "error[%d]: "
+ "query-interrupt-source-number for %s\n",
+ rc, dn->name);
+ }
+ }
+
+ /*
+ * If we can't get any MSI vectors, fail and try falling
+ * back to LSI
+ */
+ if (last_virq == NO_IRQ)
+ return -EIO;
+
+ pdev->irq = last_virq;
+
+ return 0;
+}
+
+void rtas_disable_msi(struct pci_dev* pdev)
+{
+ /*
+ * for now, we don't give firmware back vectors to their pool
+ */
+}
Index: 2.6-msi/drivers/pci/Kconfig
===================================================================
--- 2.6-msi.orig/drivers/pci/Kconfig
+++ 2.6-msi/drivers/pci/Kconfig
@@ -4,7 +4,7 @@
config PCI_MSI
bool "Message Signaled Interrupts (MSI and MSI-X)"
depends on PCI
- depends on (X86_LOCAL_APIC && X86_IO_APIC) || IA64
+ depends on (X86_LOCAL_APIC && X86_IO_APIC) || IA64 || PPC_PSERIES
help
This allows device drivers to enable MSI (Message Signaled
Interrupts). Message Signaled Interrupts enable a device to
Index: 2.6-msi/arch/powerpc/platforms/pseries/setup.c
===================================================================
--- 2.6-msi.orig/arch/powerpc/platforms/pseries/setup.c
+++ 2.6-msi/arch/powerpc/platforms/pseries/setup.c
@@ -267,6 +267,10 @@ static void __init pseries_discover_pic(
return;
} else if (strstr(typep, "ppc-xicp")) {
ppc_md.init_IRQ = xics_init_IRQ;
+#ifdef CONFIG_PCI_MSI
+ ppc_md.enable_msi = rtas_enable_msi;
+ ppc_md.disable_msi = rtas_disable_msi;
+#endif
#ifdef CONFIG_KEXEC
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
#endif
Index: 2.6-msi/include/asm-powerpc/rtas.h
===================================================================
--- 2.6-msi.orig/include/asm-powerpc/rtas.h
+++ 2.6-msi/include/asm-powerpc/rtas.h
@@ -4,6 +4,7 @@
#include <linux/spinlock.h>
#include <asm/page.h>
+#include <linux/pci.h>
/*
* Definitions for talking to the RTAS on CHRP machines.
@@ -186,6 +187,9 @@ extern int early_init_dt_scan_rtas(unsig
extern void pSeries_log_error(char *buf, unsigned int err_type, int
fatal);
+extern int rtas_enable_msi(struct pci_dev* pdev);
+extern void rtas_disable_msi(struct pci_dev * pdev);
+
/* Error types logged. */
#define ERR_FLAG_ALREADY_LOGGED 0x0
#define ERR_FLAG_BOOT 0x1 /* log was pulled from NVRAM on boot */
Index: 2.6-msi/arch/powerpc/kernel/prom_init.c
===================================================================
--- 2.6-msi.orig/arch/powerpc/kernel/prom_init.c
+++ 2.6-msi/arch/powerpc/kernel/prom_init.c
@@ -632,6 +632,12 @@ static void __init early_cmdline_parse(v
/* ibm,dynamic-reconfiguration-memory property supported */
#define OV5_DRCONF_MEMORY 0x20
#define OV5_LARGE_PAGES 0x10 /* large pages supported */
+/* PCIe/MSI support. Without MSI full PCIe is not supported */
+#ifdef CONFIG_PCI_MSI
+#define OV5_MSI 0x01 /* PCIe/MSI support */
+#else
+#define OV5_MSI 0x00
+#endif /* CONFIG_PCI_MSI */
/*
* The architecture vector has an array of PVR mask/value pairs,
@@ -675,7 +681,7 @@ static unsigned char ibm_architecture_ve
/* option vector 5: PAPR/OF options */
3 - 1, /* length */
0, /* don't ignore, don't halt */
- OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES,
+ OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_MSI,
};
/* Old method - ELF header with PT_NOTE sections */
Index: 2.6-msi/arch/powerpc/platforms/pseries/xics.c
===================================================================
--- 2.6-msi.orig/arch/powerpc/platforms/pseries/xics.c
+++ 2.6-msi/arch/powerpc/platforms/pseries/xics.c
@@ -526,11 +526,12 @@ static int xics_host_map_lpar(struct irq
pr_debug("xics: map_lpar virq %d, hwirq 0x%lx, flags: 0x%x\n",
virq, hw, flags);
- if (sense && sense != IRQ_TYPE_LEVEL_LOW)
+ if (sense && !(sense & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_EDGE_RISING)))
printk(KERN_WARNING "xics: using unsupported sense 0x%x"
" for irq %d (h: 0x%lx)\n", flags, virq, hw);
- get_irq_desc(virq)->status |= IRQ_LEVEL;
+ if (sense && sense & IRQ_TYPE_LEVEL_LOW)
+ get_irq_desc(virq)->status |= IRQ_LEVEL;
set_irq_chip_and_handler(virq, &xics_pic_lpar, handle_fasteoi_irq);
return 0;
}
^ permalink raw reply
* Re: [PATCH][2/2] RTAS MSI
From: Jake Moilanen @ 2006-07-31 20:47 UTC (permalink / raw)
To: michael; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <1154320382.19883.26.camel@localhost.localdomain>
> > +int rtas_enable_msi(struct pci_dev* pdev)
> > +{
> > + static int seq_num = 1;
>
> Do we really want seq_num to be static? By my reading of PAPR we only
> need to maintain the seq number across calls that return -2/990x, and we
> handle that all inside this function. If it does need to be unique for
> _all_ calls, then I don't see how seq_num being static is going to work,
> a different cpu could stomp on the seq_num value between calls, which
> presumably would make firmware mad.
Bah...I thought I fixed this a long time ago....must have gotten dropped
somewhere in the mix.
> > + int reglen;
> > + int ret[3];
>
> You only need ret[2] I think, the first return value (status) is handled
> inside rtas_call for you.
Yup...
> > + int dummy;
> > + int n_intr;
> > + int last_virq = NO_IRQ;
> > + int virq;
> > + unsigned int addr;
> > + unsigned long buid = -1;
>
> No need to set buid to -1 as you unconditionally assign to it later.
Agreed
> > + struct device_node * dn;
> > +
> > + dn = pci_device_to_OF_node(pdev);
> > +
> > + if (!of_find_property(dn, "ibm,req#msi", &dummy))
> > + return -ENOENT;
>
> You don't need dummy, just pass NULL.
Yup.
> > +
> > + reg = (u32 *) get_property(dn, "reg", ®len);
> > + if (reg == NULL || reglen < 20)
> > + return -ENXIO;
> > +
> > + devfn = (reg[0] >> 8) & 0xff;
> > + busno = (reg[0] >> 16) & 0xff;
> > +
> > + buid = get_phb_buid(dn->parent);
> > + addr = (busno << 16) | (devfn << 8);
>
> Why do we need to read the reg here, can't we just use the existing
> fields? ie:
>
> addr = (pdev->bus->number << 16) | (pdev->devfn << 8);
Patch coming w/ all these fixes.
^ permalink raw reply
* Re: Compilation error in fsl_soc.c
From: Jon Loeliger @ 2006-07-31 20:45 UTC (permalink / raw)
To: Vitaly Bordug; +Cc: linuxppc-embedded@ozlabs.org
In-Reply-To: <20060731173959.03f57dd4@vitb.ru.mvista.com>
On Mon, 2006-07-31 at 08:39, Vitaly Bordug wrote:
> On Mon, 31 Jul 2006 08:37:56 +0100
> "Demke Torsten-atd012" <torsten.demke@motorola.com> wrote:
>
> > Hi all,
> >
> > with a recent versions from Paulus merge-tree the compilation
> > of MPC85xx CDS failed with following output:
> > ...
>
> No, since it is just going to be out.
>
> I'll submit some patches addressing that this week...
Vitaly,
I have just posted some patches on linuxppc-dev
for the 86xx that cover the fsl_soc.c breakage here.
Thanks,
jdl
^ permalink raw reply
* Re: please pull powerpc.git 'merge' branch
From: Linus Torvalds @ 2006-07-31 20:41 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <17613.38710.609255.581840@cargo.ozlabs.ibm.com>
On Mon, 31 Jul 2006, Paul Mackerras wrote:
>
> Please do a pull from the "merge" branch of
>
> git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git
Please change your "please pull" script so that the branch-name is
mentioned at the end of the same line as the repo name.
Not only does that make cut-and-paste work, it avoids the easy mistake of
not noticing the branch-name and instead merging the "master" branch by
mistake (which I did at first, and ended up fixing up a merge conflict
until I noticed that it wasn't even what you asked me to pull..).
Ok?
Linus
^ permalink raw reply
* [PATCH] Rewrite the PPC 86xx IRQ handling to use Flat Device Tree
From: Jon Loeliger @ 2006-07-31 20:35 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
IRQ setup now comes from the Flat Device Tree
and use the new generic IRQ code. Fixed the
fsl_soc.c IRQ OF interrupt node parsing.
Remove some unused MPC86xx macro definition.
Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
---
arch/powerpc/platforms/86xx/mpc8641_hpcn.h | 32 ---
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 324 +++++++++++++++-------------
arch/powerpc/sysdev/fsl_soc.c | 30 +--
3 files changed, 188 insertions(+), 198 deletions(-)
diff --git a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
index 5d2bcf7..41e554c 100644
--- a/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
+++ b/arch/powerpc/platforms/86xx/mpc8641_hpcn.h
@@ -16,38 +16,6 @@ #define __MPC8641_HPCN_H__
#include <linux/init.h>
-/* PCI interrupt controller */
-#define PIRQA 3
-#define PIRQB 4
-#define PIRQC 5
-#define PIRQD 6
-#define PIRQ7 7
-#define PIRQE 9
-#define PIRQF 10
-#define PIRQG 11
-#define PIRQH 12
-
-/* PCI-Express memory map */
-#define MPC86XX_PCIE_LOWER_IO 0x00000000
-#define MPC86XX_PCIE_UPPER_IO 0x00ffffff
-
-#define MPC86XX_PCIE_LOWER_MEM 0x80000000
-#define MPC86XX_PCIE_UPPER_MEM 0x9fffffff
-
-#define MPC86XX_PCIE_IO_BASE 0xe2000000
-#define MPC86XX_PCIE_MEM_OFFSET 0x00000000
-
-#define MPC86XX_PCIE_IO_SIZE 0x01000000
-
-#define PCIE1_CFG_ADDR_OFFSET (0x8000)
-#define PCIE1_CFG_DATA_OFFSET (0x8004)
-
-#define PCIE2_CFG_ADDR_OFFSET (0x9000)
-#define PCIE2_CFG_DATA_OFFSET (0x9004)
-
-#define MPC86xx_PCIE_OFFSET PCIE1_CFG_ADDR_OFFSET
-#define MPC86xx_PCIE_SIZE (0x1000)
-
#define MPC86XX_RSTCR_OFFSET (0xe00b0) /* Reset Control Register */
#endif /* __MPC8641_HPCN_H__ */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 8390906..4a33d95 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -37,6 +37,14 @@ #include <sysdev/fsl_soc.h>
#include "mpc86xx.h"
#include "mpc8641_hpcn.h"
+#undef DEBUG
+
+#ifdef DEBUG
+#define DBG(fmt...) do { printk(KERN_ERR fmt); } while(0)
+#else
+#define DBG(fmt...) do { } while(0)
+#endif
+
#ifndef CONFIG_PCI
unsigned long isa_io_base = 0;
unsigned long isa_mem_base = 0;
@@ -44,205 +52,215 @@ unsigned long pci_dram_offset = 0;
#endif
-/*
- * Internal interrupts are all Level Sensitive, and Positive Polarity
- */
-
-static u_char mpc86xx_hpcn_openpic_initsenses[] __initdata = {
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 0: Reserved */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 1: MCM */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 2: DDR DRAM */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 3: LBIU */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 4: DMA 0 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 5: DMA 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 6: DMA 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 7: DMA 3 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 8: PCIE1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 9: PCIE2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 10: Reserved */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 11: Reserved */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 12: DUART2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 13: TSEC 1 Transmit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 14: TSEC 1 Receive */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 15: TSEC 3 transmit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 16: TSEC 3 receive */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 17: TSEC 3 error */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 18: TSEC 1 Receive/Transmit Error */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 19: TSEC 2 Transmit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 20: TSEC 2 Receive */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 21: TSEC 4 transmit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 22: TSEC 4 receive */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 23: TSEC 4 error */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 24: TSEC 2 Receive/Transmit Error */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 25: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 26: DUART1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 27: I2C */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 28: Performance Monitor */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 29: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 30: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 31: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 32: SRIO error/write-port unit */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 33: SRIO outbound doorbell */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 34: SRIO inbound doorbell */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 35: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 36: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 37: SRIO outbound message unit 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 38: SRIO inbound message unit 1 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 39: SRIO outbound message unit 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 40: SRIO inbound message unit 2 */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 41: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 42: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 43: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 44: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 45: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 46: Unused */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* Internal 47: Unused */
- 0x0, /* External 0: */
- 0x0, /* External 1: */
- 0x0, /* External 2: */
- 0x0, /* External 3: */
- 0x0, /* External 4: */
- 0x0, /* External 5: */
- 0x0, /* External 6: */
- 0x0, /* External 7: */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 8: Pixis FPGA */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 9: ULI 8259 INTR Cascade */
- (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 10: Quad ETH PHY */
- 0x0, /* External 11: */
- 0x0,
- 0x0,
- 0x0,
- 0x0,
-};
-
+static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc,
+ struct pt_regs *regs)
+{
+ unsigned int cascade_irq = i8259_irq(regs);
+ if (cascade_irq != NO_IRQ)
+ generic_handle_irq(cascade_irq, regs);
+ desc->chip->eoi(irq);
+}
void __init
mpc86xx_hpcn_init_irq(void)
{
struct mpic *mpic1;
+ struct device_node *np, *cascade_node = NULL;
+ int cascade_irq;
phys_addr_t openpic_paddr;
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (np == NULL)
+ return;
+
/* Determine the Physical Address of the OpenPIC regs */
openpic_paddr = get_immrbase() + MPC86xx_OPENPIC_OFFSET;
/* Alloc mpic structure and per isu has 16 INT entries. */
- mpic1 = mpic_alloc(openpic_paddr,
+ mpic1 = mpic_alloc(np, openpic_paddr,
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
- 16, MPC86xx_OPENPIC_IRQ_OFFSET, 0, 250,
- mpc86xx_hpcn_openpic_initsenses,
- sizeof(mpc86xx_hpcn_openpic_initsenses),
+ 16, NR_IRQS - 4,
" MPIC ");
BUG_ON(mpic1 == NULL);
+ mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10000);
+
/* 48 Internal Interrupts */
- mpic_assign_isu(mpic1, 0, openpic_paddr + 0x10200);
- mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10400);
- mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10600);
+ mpic_assign_isu(mpic1, 1, openpic_paddr + 0x10200);
+ mpic_assign_isu(mpic1, 2, openpic_paddr + 0x10400);
+ mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10600);
- /* 16 External interrupts */
- mpic_assign_isu(mpic1, 3, openpic_paddr + 0x10000);
+ /* 16 External interrupts
+ * Moving them from [0 - 15] to [64 - 79]
+ */
+ mpic_assign_isu(mpic1, 4, openpic_paddr + 0x10000);
mpic_init(mpic1);
#ifdef CONFIG_PCI
- mpic_setup_cascade(MPC86xx_IRQ_EXT9, i8259_irq_cascade, NULL);
- i8259_init(0, I8259_OFFSET);
-#endif
-}
+ /* Initialize i8259 controller */
+ for_each_node_by_type(np, "interrupt-controller")
+ if (device_is_compatible(np, "chrp,iic")) {
+ cascade_node = np;
+ break;
+ }
+ if (cascade_node == NULL) {
+ printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n");
+ return;
+ }
+ cascade_irq = irq_of_parse_and_map(cascade_node, 0);
+ if (cascade_irq == NO_IRQ) {
+ printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt");
+ return;
+ }
+ DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
+ i8259_init(cascade_node, 0);
+ set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
+#endif
+}
#ifdef CONFIG_PCI
-/*
- * interrupt routing
- */
-int
-mpc86xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
+enum pirq{PIRQA = 8, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH};
+const unsigned char uli1575_irq_route_table[16] = {
+ 0, /* 0: Reserved */
+ 0x8, /* 1: 0b1000 */
+ 0, /* 2: Reserved */
+ 0x2, /* 3: 0b0010 */
+ 0x4, /* 4: 0b0100 */
+ 0x5, /* 5: 0b0101 */
+ 0x7, /* 6: 0b0111 */
+ 0x6, /* 7: 0b0110 */
+ 0, /* 8: Reserved */
+ 0x1, /* 9: 0b0001 */
+ 0x3, /* 10: 0b0011 */
+ 0x9, /* 11: 0b1001 */
+ 0xb, /* 12: 0b1011 */
+ 0, /* 13: Reserved */
+ 0xd, /* 14, 0b1101 */
+ 0xf, /* 15, 0b1111 */
+};
+
+static int __devinit
+get_pci_irq_from_of(struct pci_controller *hose, int slot, int pin)
{
- static char pci_irq_table[][4] = {
- /*
- * PCI IDSEL/INTPIN->INTLINE
- * A B C D
- */
- {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 17 -- PCI Slot 1 */
- {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 18 -- PCI Slot 2 */
- {0, 0, 0, 0}, /* IDSEL 19 */
- {0, 0, 0, 0}, /* IDSEL 20 */
- {0, 0, 0, 0}, /* IDSEL 21 */
- {0, 0, 0, 0}, /* IDSEL 22 */
- {0, 0, 0, 0}, /* IDSEL 23 */
- {0, 0, 0, 0}, /* IDSEL 24 */
- {0, 0, 0, 0}, /* IDSEL 25 */
- {PIRQD, PIRQA, PIRQB, PIRQC}, /* IDSEL 26 -- PCI Bridge*/
- {PIRQC, 0, 0, 0}, /* IDSEL 27 -- LAN */
- {PIRQE, PIRQF, PIRQH, PIRQ7}, /* IDSEL 28 -- USB 1.1 */
- {PIRQE, PIRQF, PIRQG, 0}, /* IDSEL 29 -- Audio & Modem */
- {PIRQH, 0, 0, 0}, /* IDSEL 30 -- LPC & PMU*/
- {PIRQD, 0, 0, 0}, /* IDSEL 31 -- ATA */
- };
-
- const long min_idsel = 17, max_idsel = 31, irqs_per_slot = 4;
- return PCI_IRQ_TABLE_LOOKUP + I8259_OFFSET;
+ struct of_irq oirq;
+ u32 laddr[3];
+ struct device_node *hosenode = hose ? hose->arch_data : NULL;
+
+ if (!hosenode) return -EINVAL;
+
+ laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(slot, 0) << 8);
+ laddr[1] = laddr[2] = 0;
+ of_irq_map_raw(hosenode, &pin, laddr, &oirq);
+ DBG("mpc86xx_hpcn: pci irq addr %x, slot %d, pin %d, irq %d\n",
+ laddr[0], slot, pin, oirq.specifier[0]);
+ return oirq.specifier[0];
}
-static void __devinit quirk_ali1575(struct pci_dev *dev)
+static void __devinit quirk_uli1575(struct pci_dev *dev)
{
unsigned short temp;
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+ unsigned char irq2pin[16];
+ unsigned long pirq_map_word = 0;
+ u32 irq;
+ int i;
/*
- * ALI1575 interrupts route table setup:
+ * ULI1575 interrupts route setup
+ */
+ memset(irq2pin, 0, 16); /* Initialize default value 0 */
+
+ /*
+ * PIRQA -> PIRQD mapping read from OF-tree
+ *
+ * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
+ * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
+ */
+ for (i = 0; i < 4; i++){
+ irq = get_pci_irq_from_of(hose, 17, i + 1);
+ if (irq > 0 && irq < 16)
+ irq2pin[irq] = PIRQA + i;
+ else
+ printk(KERN_WARNING "ULI1575 device"
+ "(slot %d, pin %d) irq %d is invalid.\n",
+ 17, i, irq);
+ }
+
+ /*
+ * PIRQE -> PIRQF mapping set manually
*
* IRQ pin IRQ#
- * PIRQA ---- 3
- * PIRQB ---- 4
- * PIRQC ---- 5
- * PIRQD ---- 6
* PIRQE ---- 9
* PIRQF ---- 10
* PIRQG ---- 11
* PIRQH ---- 12
- *
- * interrupts for PCI slot0 -- PIRQA / PIRQB / PIRQC / PIRQD
- * PCI slot1 -- PIRQB / PIRQC / PIRQD / PIRQA
*/
- pci_write_config_dword(dev, 0x48, 0xb9317542);
+ for (i = 0; i < 4; i++) irq2pin[i + 9] = PIRQE + i;
+
+ /* Set IRQ-PIRQ Mapping to ULI1575 */
+ for (i = 0; i < 16; i++)
+ if (irq2pin[i])
+ pirq_map_word |= (uli1575_irq_route_table[i] & 0xf)
+ << ((irq2pin[i] - PIRQA) * 4);
- /* USB 1.1 OHCI controller 1, interrupt: PIRQE */
- pci_write_config_byte(dev, 0x86, 0x0c);
+ /* ULI1575 IRQ mapping conf register default value is 0xb9317542 */
+ DBG("Setup ULI1575 IRQ mapping configuration register value = 0x%x\n",
+ pirq_map_word);
+ pci_write_config_dword(dev, 0x48, pirq_map_word);
- /* USB 1.1 OHCI controller 2, interrupt: PIRQF */
- pci_write_config_byte(dev, 0x87, 0x0d);
+#define ULI1575_SET_DEV_IRQ(slot, pin, reg) \
+ do { \
+ int irq; \
+ irq = get_pci_irq_from_of(hose, slot, pin); \
+ if (irq > 0 && irq < 16) \
+ pci_write_config_byte(dev, reg, irq2pin[irq]); \
+ else \
+ printk(KERN_WARNING "ULI1575 device" \
+ "(slot %d, pin %d) irq %d is invalid.\n", \
+ slot, pin, irq); \
+ } while(0)
- /* USB 1.1 OHCI controller 3, interrupt: PIRQH */
- pci_write_config_byte(dev, 0x88, 0x0f);
+ /* USB 1.1 OHCI controller 1, slot 28, pin 1 */
+ ULI1575_SET_DEV_IRQ(28, 1, 0x86);
- /* USB 2.0 controller, interrupt: PIRQ7 */
- pci_write_config_byte(dev, 0x74, 0x06);
+ /* USB 1.1 OHCI controller 2, slot 28, pin 2 */
+ ULI1575_SET_DEV_IRQ(28, 2, 0x87);
- /* Audio controller, interrupt: PIRQE */
- pci_write_config_byte(dev, 0x8a, 0x0c);
+ /* USB 1.1 OHCI controller 3, slot 28, pin 3 */
+ ULI1575_SET_DEV_IRQ(28, 3, 0x88);
- /* Modem controller, interrupt: PIRQF */
- pci_write_config_byte(dev, 0x8b, 0x0d);
+ /* USB 2.0 controller, slot 28, pin 4 */
+ irq = get_pci_irq_from_of(hose, 28, 4);
+ if (irq >= 0 && irq <=15)
+ pci_write_config_dword(dev, 0x74, uli1575_irq_route_table[irq]);
- /* HD audio controller, interrupt: PIRQG */
- pci_write_config_byte(dev, 0x8c, 0x0e);
+ /* Audio controller, slot 29, pin 1 */
+ ULI1575_SET_DEV_IRQ(29, 1, 0x8a);
- /* Serial ATA interrupt: PIRQD */
- pci_write_config_byte(dev, 0x8d, 0x0b);
+ /* Modem controller, slot 29, pin 2 */
+ ULI1575_SET_DEV_IRQ(29, 2, 0x8b);
- /* SMB interrupt: PIRQH */
- pci_write_config_byte(dev, 0x8e, 0x0f);
+ /* HD audio controller, slot 29, pin 3 */
+ ULI1575_SET_DEV_IRQ(29, 3, 0x8c);
- /* PMU ACPI SCI interrupt: PIRQH */
- pci_write_config_byte(dev, 0x8f, 0x0f);
+ /* SMB interrupt: slot 30, pin 1 */
+ ULI1575_SET_DEV_IRQ(30, 1, 0x8e);
+
+ /* PMU ACPI SCI interrupt: slot 30, pin 2 */
+ ULI1575_SET_DEV_IRQ(30, 2, 0x8f);
+
+ /* Serial ATA interrupt: slot 31, pin 1 */
+ ULI1575_SET_DEV_IRQ(31, 1, 0x8d);
/* Primary PATA IDE IRQ: 14
* Secondary PATA IDE IRQ: 15
*/
- pci_write_config_byte(dev, 0x44, 0x3d);
- pci_write_config_byte(dev, 0x75, 0x0f);
+ pci_write_config_byte(dev, 0x44, 0x30 | uli1575_irq_route_table[14]);
+ pci_write_config_byte(dev, 0x75, uli1575_irq_route_table[15]);
/* Set IRQ14 and IRQ15 to legacy IRQs */
pci_read_config_word(dev, 0x46, &temp);
@@ -264,6 +282,8 @@ static void __devinit quirk_ali1575(stru
*/
outb(0xfa, 0x4d0);
outb(0x1e, 0x4d1);
+
+#undef ULI1575_SET_DEV_IRQ
}
static void __devinit quirk_uli5288(struct pci_dev *dev)
@@ -306,7 +326,7 @@ static void __devinit early_uli5249(stru
dev->class |= 0x1;
}
-DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_ali1575);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, 0x5249, early_uli5249);
@@ -337,8 +357,6 @@ #ifdef CONFIG_PCI
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
add_bridge(np);
- ppc_md.pci_swizzle = common_swizzle;
- ppc_md.pci_map_irq = mpc86xx_map_irq;
ppc_md.pci_exclude_device = mpc86xx_exclude_device;
#endif
@@ -377,6 +395,15 @@ mpc86xx_hpcn_show_cpuinfo(struct seq_fil
}
+void __init mpc86xx_hpcn_pcibios_fixup(void)
+{
+ struct pci_dev *dev = NULL;
+
+ for_each_pci_dev(dev)
+ pci_read_irq_line(dev);
+}
+
+
/*
* Called very early, device-tree isn't unflattened
*/
@@ -431,6 +458,7 @@ define_machine(mpc86xx_hpcn) {
.setup_arch = mpc86xx_hpcn_setup_arch,
.init_IRQ = mpc86xx_hpcn_init_irq,
.show_cpuinfo = mpc86xx_hpcn_show_cpuinfo,
+ .pcibios_fixup = mpc86xx_hpcn_pcibios_fixup,
.get_irq = mpic_get_irq,
.restart = mpc86xx_restart,
.time_init = mpc86xx_time_init,
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 07c47e8..4a6aa64 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -85,11 +85,8 @@ static int __init gfar_mdio_of_init(void
mdio_data.irq[k] = -1;
while ((child = of_get_next_child(np, child)) != NULL) {
- if (child->n_intrs) {
- const u32 *id =
- get_property(child, "reg", NULL);
- mdio_data.irq[*id] = child->intrs[0].line;
- }
+ const u32 *id = get_property(child, "reg", NULL);
+ mdio_data.irq[*id] = irq_of_parse_and_map(child, 0);
}
ret =
@@ -131,6 +128,7 @@ static int __init gfar_of_init(void)
const char *model;
const void *mac_addr;
const phandle *ph;
+ int n_res = 1;
memset(r, 0, sizeof(r));
memset(&gfar_data, 0, sizeof(gfar_data));
@@ -139,8 +137,7 @@ static int __init gfar_of_init(void)
if (ret)
goto err;
- r[1].start = np->intrs[0].line;
- r[1].end = np->intrs[0].line;
+ r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
r[1].flags = IORESOURCE_IRQ;
model = get_property(np, "model", NULL);
@@ -150,19 +147,19 @@ static int __init gfar_of_init(void)
r[1].name = gfar_tx_intr;
r[2].name = gfar_rx_intr;
- r[2].start = np->intrs[1].line;
- r[2].end = np->intrs[1].line;
+ r[2].start = r[2].end = irq_of_parse_and_map(np, 1);
r[2].flags = IORESOURCE_IRQ;
r[3].name = gfar_err_intr;
- r[3].start = np->intrs[2].line;
- r[3].end = np->intrs[2].line;
+ r[3].start = r[3].end = irq_of_parse_and_map(np, 2);
r[3].flags = IORESOURCE_IRQ;
+
+ n_res += 2;
}
gfar_dev =
platform_device_register_simple("fsl-gianfar", i, &r[0],
- np->n_intrs + 1);
+ n_res + 1);
if (IS_ERR(gfar_dev)) {
ret = PTR_ERR(gfar_dev);
@@ -251,8 +248,7 @@ static int __init fsl_i2c_of_init(void)
if (ret)
goto err;
- r[1].start = np->intrs[0].line;
- r[1].end = np->intrs[0].line;
+ r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
r[1].flags = IORESOURCE_IRQ;
i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
@@ -388,8 +384,7 @@ static int __init fsl_usb_of_init(void)
if (ret)
goto err;
- r[1].start = np->intrs[0].line;
- r[1].end = np->intrs[0].line;
+ r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
r[1].flags = IORESOURCE_IRQ;
usb_dev_mph =
@@ -437,8 +432,7 @@ static int __init fsl_usb_of_init(void)
if (ret)
goto unreg_mph;
- r[1].start = np->intrs[0].line;
- r[1].end = np->intrs[0].line;
+ r[1].start = r[1].end = irq_of_parse_and_map(np, 0);
r[1].flags = IORESOURCE_IRQ;
usb_dev_dr =
^ permalink raw reply related
* PATCH: Enable PCI by default on PPC_86xx boards
From: Jon Loeliger @ 2006-07-31 20:33 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
Signed-off-by: Jon Loeliger <jdl@freescale.com>
---
arch/powerpc/Kconfig | 7 ++++---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 13e583f..abb325e 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -836,9 +836,10 @@ config MCA
bool
config PCI
- bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx ||
PPC_MPC52xx || (EMBEDDED && PPC_ISERIES) \
- || MPC7448HPC2
- default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx && !PPC_85xx
&& !PPC_86xx
+ bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx
\
+ || PPC_MPC52xx || (EMBEDDED && PPC_ISERIES) || MPC7448HPC2
+ default y if !40x && !CPM2 && !8xx && !APUS && !PPC_83xx \
+ && !PPC_85xx && !PPC_86xx
default PCI_PERMEDIA if !4xx && !CPM2 && !8xx && APUS
default PCI_QSPAN if !4xx && !CPM2 && 8xx
help
^ permalink raw reply related
* Re: [PATCH][2/2] RTAS MSI
From: Jake Moilanen @ 2006-07-31 19:55 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <17613.33279.61050.840408@cargo.ozlabs.ibm.com>
On Mon, 2006-07-31 at 14:07 +1000, Paul Mackerras wrote:
> Jake Moilanen writes:
>
> > -msiobj-y := msi.o msi-apic.o
> > -msiobj-$(CONFIG_IA64_GENERIC) += msi-altix.o
> > -msiobj-$(CONFIG_IA64_SGI_SN2) += msi-altix.o
> > +msiobj-$(CONFIG_X86) += msi.o msi-apic.o
> > +msiobj-$(CONFIG_IA64) += msi.o msi-apic.o
> > +msiobj-$(CONFIG_IA64_GENERIC) += msi.o msi-apic.o msi-altix.o
> > +msiobj-$(CONFIG_IA64_SGI_SN2) += msi.o msi-apic.o msi-altix.o
>
> Doesn't this mean that ia64 configs might now get msi.o and msi-apic.o
> listed twice? Why did you need to change the
> msiobj-$(CONFIG_IA64_GENERIC) and msiobj-$(CONFIG_IA64_SGI_SN2) lines
> at all?
Yup...see the second patch I posted where I fixed up the ia64 configs so
msi.o and msi-apic.o are listed once and msiobj-$(CONFIG_IA64_GENERIC)
and msiobj-$(CONFIG_IA64_SGI_SN2) are not changed.
In a few, I'll be posting another version of the patch which address
Michael's concerns.
^ permalink raw reply
* Re: cool article
From: Ameet Patil @ 2006-07-31 19:48 UTC (permalink / raw)
To: edb; +Cc: linuxppc-embedded
In-Reply-To: <44CE4C1D.6050103@datadesigncorp.net>
Thanks Ed! I did get a root fs up and running NOT using JFFS2 though. I
used ext2.
cheers,
-Ameet
Edward Bockhoefer wrote:
> I found your post about the Virtex II part one at
> http://www.linux.get2knowmore.com. Thanks for the info. Did you happen
> to get a root fs up and running using jffs2?
>
> Best Regards,
> Ed
>
>
^ permalink raw reply
* Re: [PATCH] remove bogomips from /proc/cpuinfo
From: Linas Vepstas @ 2006-07-31 18:57 UTC (permalink / raw)
To: Andreas Schwab; +Cc: linuxppc-dev, Paul Mackeras, Arnd Bergmann, Olaf Hering
In-Reply-To: <jewt9tfxlq.fsf@sykes.suse.de>
On Mon, Jul 31, 2006 at 08:17:05PM +0200, Andreas Schwab wrote:
> Olaf Hering <olh@suse.de> writes:
>
> > On Mon, Jul 31, Arnd Bergmann wrote:
> >
> >> On Monday 31 July 2006 14:59, Olaf Hering wrote:
> >> > Remove bogomips from /proc/cpuinfo.
> >> > It is now really bogus since "timebase-frequency" is shown.
> >>
> >> Well, but it's still part of the ABI, right?
> >> How do you determine that there are no broken applications
> >> still relying on it?
> >
> > Everything works on a G5, as example. Alpha doesnt have it either.
> > What pratical value had bogomips for an application?
>
> What harm does it do?
Kernel bloat.
--linas
^ permalink raw reply
* Common video card to Lite5200B
From: Alan Carvalho @ 2006-07-31 19:14 UTC (permalink / raw)
To: linuxppc-embedded
Hi all,
I contacted Freescale to get info about what comercial video card work
in the Lite5200B using Linux.
They said some customer are using common ATI and Nvidia cards, but
they don't know what models exactly.
I want know if someone here is this list is using some common video
card (PCI 3.3V) on Lite5200B.
Thank you,
Alan
^ permalink raw reply
* Re: Xilinx PIC and kernel interrupt handler
From: Stig Telfer @ 2006-07-31 19:07 UTC (permalink / raw)
To: Martin, Tim; +Cc: linuxppc-embedded
In-Reply-To: <821B2170E9E7F04FA38DF7EC21DE487105E01B5B@VCAEXCH01.hq.corp.viasat.com>
Hi Tim -
You are right, there are many references in the INTC doc to w meaning
the data bus width. I think I have mis-read the IVR section.
However, the patch was based on real-world observations. Under high
system activity I occasionally see IVR reads returning 0x7F, and our
system has 7 interrupts connected to that PIC. That's where my
hypothesis about the bit-extension came from.
As an aside, an immediate second read of the IVR returns a valid vector
number to service. Curious on a uniprocessor system...
Regards,
Stig
On 31 Jul 2006, at 19:06, Martin, Tim wrote:
> Regarding the IVR patch: Have you seen this bug in practice, or just
> from examining the code?
>
> The reason I ask is I've recently looked at this myself, and was under
> the impression that "w" is the width of the data bus (DB) (per page 9
> of
> dcr_intc.pdf). So regardless of how many interrupt sources are
> connected, assuming the data bus width is 32 bits, w=32.
>
> I've specifically confirmed this is true if you have less than 32
> interrupt sources connected, the one named INT0 shows up in bit
> position
> 31 (w-1 for w=32 is 31) of the ISR and IPR. Bit position 31 in PPC
> notation is the LSB.
>
> Tim
>
>> -----Original Message-----
>> From: linuxppc-embedded-bounces+tmartin=viasat.com@ozlabs.org
>> [mailto:linuxppc-embedded-bounces+tmartin=viasat.com@ozlabs.or
>> g] On Behalf Of Stig Telfer
>> Sent: Monday, July 31, 2006 6:51 AM
>> To: linuxppc-embedded@ozlabs.org
>> Subject: Xilinx PIC and kernel interrupt handler
>>
>> Hi -
>>
>> There appears to be a kernel bug in the 2.4 and 2.6.17.7
>> kernel trees relating to reading the interrupt vector from
>> the Xilinx PIC
>> (xilinx_pic_get_irq() in xilinx_pic.c). As I see it, here's the
>> problem: If no interrupt is pending, the register should read
>> all ones.
>> However, the IVR is only as wide as the number of interrupt
>> sources.
>> The routine mistakenly assumes sign extension and checks for
>> a 32-bit read of -1 instead of a read of w bits where w is
>> the number of connected interrupt sources.
>>
>> The 2.6 version also has a search-and-replace glitch relating
>> to removal of the reversal of bit numbering. I have attached
>> a two line patch (for 2.6.17.7) that makes the IVR comparison
>> against the right bit pattern and removes the remnants of the
>> former bit-reversal code.
>>
>> Share and enjoy,
>> Stig Telfer
>>
>>
^ permalink raw reply
* [PATCH] crash in aty128_set_lcd_enable on PowerBook
From: Olaf Hering @ 2006-07-31 18:50 UTC (permalink / raw)
To: linux-kernel, linuxppc-dev, Andrew Morton, Benjamin Herrenschmidt
In-Reply-To: <20060716163728.GA16228@suse.de>
On Sun, Jul 16, Olaf Hering wrote:
>
> Current Linus tree crashes in aty128_set_lcd_enable() because par->pdev
> is NULL. This happens since at least a week. Call trace is:
>
> aty128_set_lcd_enable
> aty128fb_set_par
> fbcon_init
> visual_init
> take_over_console
> fbcon_takeover
> notifier_call_chain
> blocking_notifier_call_chain
> register_framebuffer
> aty128fb_probe
> pci_device_probe
> bus_for_each_dev
> driver_attach
> bus_add_driver
> driver_register
> __pci_register_driver
> aty128fb_init
> init
> kernel_thread
>
- info->fix was assigned twice.
- par->vram_size is assigned in aty128_probe(), no need to redo it again in aty128_init()
- register_framebuffer() uses uninitialized struct members,
move it past par->pdev assignment and past aty128_bl_init().
Signed-off-by: Olaf Hering <olh@suse.de>
Index: linux-2.6.18-rc3/drivers/video/aty/aty128fb.c
===================================================================
--- linux-2.6.18-rc3.orig/drivers/video/aty/aty128fb.c
+++ linux-2.6.18-rc3/drivers/video/aty/aty128fb.c
@@ -1910,9 +1910,6 @@ static int __devinit aty128_init(struct
u8 chip_rev;
u32 dac;
- if (!par->vram_size) /* may have already been probed */
- par->vram_size = aty_ld_le32(CONFIG_MEMSIZE) & 0x03FFFFFF;
-
/* Get the chip revision */
chip_rev = (aty_ld_le32(CONFIG_CNTL) >> 16) & 0x1F;
@@ -2025,9 +2022,6 @@ static int __devinit aty128_init(struct
aty128_init_engine(par);
- if (register_framebuffer(info) < 0)
- return 0;
-
par->pm_reg = pci_find_capability(pdev, PCI_CAP_ID_PM);
par->pdev = pdev;
par->asleep = 0;
@@ -2037,6 +2031,9 @@ static int __devinit aty128_init(struct
aty128_bl_init(par);
#endif
+ if (register_framebuffer(info) < 0)
+ return 0;
+
printk(KERN_INFO "fb%d: %s frame buffer device on %s\n",
info->node, info->fix.id, video_card);
@@ -2086,7 +2083,6 @@ static int __devinit aty128_probe(struct
par = info->par;
info->pseudo_palette = par->pseudo_palette;
- info->fix = aty128fb_fix;
/* Virtualize mmio region */
info->fix.mmio_start = reg_addr;
^ permalink raw reply
* Re: [PATCH] remove bogomips from /proc/cpuinfo
From: Andreas Schwab @ 2006-07-31 18:17 UTC (permalink / raw)
To: Olaf Hering; +Cc: linuxppc-dev, Paul Mackeras, Arnd Bergmann
In-Reply-To: <20060731174924.GA4273@suse.de>
Olaf Hering <olh@suse.de> writes:
> On Mon, Jul 31, Arnd Bergmann wrote:
>
>> On Monday 31 July 2006 14:59, Olaf Hering wrote:
>> > Remove bogomips from /proc/cpuinfo.
>> > It is now really bogus since "timebase-frequency" is shown.
>>
>> Well, but it's still part of the ABI, right?
>> How do you determine that there are no broken applications
>> still relying on it?
>
> Everything works on a G5, as example. Alpha doesnt have it either.
> What pratical value had bogomips for an application?
What harm does it do?
Andreas.
--
Andreas Schwab, SuSE Labs, schwab@suse.de
SuSE Linux Products GmbH, Maxfeldstraße 5, 90409 Nürnberg, Germany
PGP key fingerprint = 58CA 54C7 6D53 942B 1756 01D3 44D5 214B 8276 4ED5
"And now for something completely different."
^ permalink raw reply
* RE: Xilinx PIC and kernel interrupt handler
From: Martin, Tim @ 2006-07-31 18:06 UTC (permalink / raw)
To: Stig Telfer, linuxppc-embedded
Regarding the IVR patch: Have you seen this bug in practice, or just
from examining the code?
The reason I ask is I've recently looked at this myself, and was under
the impression that "w" is the width of the data bus (DB) (per page 9 of
dcr_intc.pdf). So regardless of how many interrupt sources are
connected, assuming the data bus width is 32 bits, w=3D32.
I've specifically confirmed this is true if you have less than 32
interrupt sources connected, the one named INT0 shows up in bit position
31 (w-1 for w=3D32 is 31) of the ISR and IPR. Bit position 31 in PPC
notation is the LSB.
Tim=20
> -----Original Message-----
> From: linuxppc-embedded-bounces+tmartin=3Dviasat.com@ozlabs.org=20
> [mailto:linuxppc-embedded-bounces+tmartin=3Dviasat.com@ozlabs.or
> g] On Behalf Of Stig Telfer
> Sent: Monday, July 31, 2006 6:51 AM
> To: linuxppc-embedded@ozlabs.org
> Subject: Xilinx PIC and kernel interrupt handler=20
>=20
> Hi -
>=20
> There appears to be a kernel bug in the 2.4 and 2.6.17.7=20
> kernel trees relating to reading the interrupt vector from=20
> the Xilinx PIC
> (xilinx_pic_get_irq() in xilinx_pic.c). As I see it, here's the
> problem: If no interrupt is pending, the register should read=20
> all ones.=20
> However, the IVR is only as wide as the number of interrupt=20
> sources. =20
> The routine mistakenly assumes sign extension and checks for=20
> a 32-bit read of -1 instead of a read of w bits where w is=20
> the number of connected interrupt sources.
>=20
> The 2.6 version also has a search-and-replace glitch relating=20
> to removal of the reversal of bit numbering. I have attached=20
> a two line patch (for 2.6.17.7) that makes the IVR comparison=20
> against the right bit pattern and removes the remnants of the=20
> former bit-reversal code.
>=20
> Share and enjoy,
> Stig Telfer
>=20
>=20
^ permalink raw reply
* Re: [PATCH] remove bogomips from /proc/cpuinfo
From: Olaf Hering @ 2006-07-31 17:49 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev, Paul Mackeras
In-Reply-To: <200607311946.18331.arnd.bergmann@de.ibm.com>
On Mon, Jul 31, Arnd Bergmann wrote:
> On Monday 31 July 2006 14:59, Olaf Hering wrote:
> > Remove bogomips from /proc/cpuinfo.
> > It is now really bogus since "timebase-frequency" is shown.
>
> Well, but it's still part of the ABI, right?
> How do you determine that there are no broken applications
> still relying on it?
Everything works on a G5, as example. Alpha doesnt have it either.
What pratical value had bogomips for an application?
^ permalink raw reply
* Re: [PATCH] remove bogomips from /proc/cpuinfo
From: Arnd Bergmann @ 2006-07-31 17:46 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Paul Mackeras, Olaf Hering
In-Reply-To: <20060731125904.GA1997@suse.de>
On Monday 31 July 2006 14:59, Olaf Hering wrote:
> Remove bogomips from /proc/cpuinfo.
> It is now really bogus since "timebase-frequency" is shown.
Well, but it's still part of the ABI, right?
How do you determine that there are no broken applications
still relying on it?
Arnd <><
^ permalink raw reply
* booting with BootX corrupts memory
From: Olaf Hering @ 2006-07-31 17:46 UTC (permalink / raw)
To: linuxppc-dev
Booting an old Mac with BootX corrupts memory, the kernel seldom gets
into init. Even the built-in initramfs archive gets corrupted. So far I
havent figured out where the corruption starts. The only data point so
far is that a passed initrd gets overwritten with stuff that looks like
part of the device-tree after the call to free_area_init_node() from
paging_init(). Perhaps the virtual/real address mapping isnt handled
correctly.
This is broken since at least 2.6.15, 2.6.14 dies very early, 2.6.13 was
still ok.
Symptoms differ, depending on used .config and wether an initrd is passed.
This one is without CONFIG_BOOTX_TEXT.
.....
Using PowerMac machine description
Total memory = 72MB; using 256kB for hash table (at c0a80000)
Linux version 2.6.18-rc3 (olaf@g5) (gcc version 4.1.0 (SUSE Linux)) #39 Mon Jul 31 19:06:09 CEST 2006
1f8b0808 d4015944 0203696e 69747264 20313438 323100ec bd0f7c94 c5b92f3e Found initrd at 0xc04e0000:0xc0ac3b46
Found a Grand Central mac-io controller, rev: 2, mapped at 0xfdf00000
PowerMac motherboard: PowerMac 7200/7300
Cache coherency enabled for bandit/PSX
Found Bandit PCI host bridge at 0x00000000f2000000. Firmware bus number: 0->1
1f8b0808 d4015944 0203696e 69747264 20313438 323100ec bd0f7c94 c5b92f3e paging_init(334) exit
00000400 00000001 ffffffff 00000000 00000000 00000000 c04e0018 c04e0018 paging_init(344) exit
Built 1 zonelists. Total pages: 18432
Kernel command line: ramdisk_size=8192 start_shell nosshkey console=ttyS0,38400 onsole=tty0 video=platinumfb:off minmemory=0 memyasttext=0
irq: Found primary Apple PIC /bandit/gc for 32 irqs
irq: System has 32 possible interrupts
PID hash table entries: 512 (order: 9, 2048 bytes)
Console: colour dummy device 80x25
Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
Memory: 56688k/73728k available (2608k kernel code, 16976k reserved, 136k data, 2110k bss, 1472k init)
Mount-cache hash table entries: 512
Unpacking initramfs... done
Freeing initrd memory: 6030k freed
Bad page state in process 'swapper'
page:c04d8f00 flags:0x00000080 mapping:00000000 mapcount:0 count:0
Trying to fix it up, but a reboot is needed
Backtrace:
Call Trace:
[C159DF20] [C0007A58] show_stack+0x50/0x184 (unreliable)
[C159DF40] [C0048EDC] bad_page+0x58/0x9c
[C159DF50] [C0049228] free_hot_cold_page+0xa0/0x15c
[C159DF70] [C0011F88] free_initrd_mem+0x70/0xac
[C159DF80] [C011F614] populate_rootfs+0x84/0xa0
[C159DFA0] [C000390C] init+0x2c/0x260
[C159DFF0] [C000F390] kernel_thread+0x44/0x60
Bad page state in process 'swapper'
page:c04d8f20 flags:0x00000080 mapping:00000000 mapcount:0 count:0
Trying to fix it up, but a reboot is needed
Backtrace:
Call Trace:
[C159DF20] [C0007A58] show_stack+0x50/0x184 (unreliable)
[C159DF40] [C0048EDC] bad_page+0x58/0x9c
[C159DF50] [C0049228] free_hot_cold_page+0xa0/0x15c
[C159DF70] [C0011F88] free_initrd_mem+0x70/0xac
[C159DF80] [C011F614] populate_rootfs+0x84/0xa0
[C159DFA0] [C000390C] init+0x2c/0x260
[C159DFF0] [C000F390] kernel_thread+0x44/0x60
Bad page state in process 'swapper'
page:c04d8f40 flags:0x00000080 mapping:00000000 mapcount:0 count:0
Trying to fix it up, but a reboot is needed
Backtrace:
Call Trace:
[C159DF20] [C0007A58] show_stack+0x50/0x184 (unreliable)
...
^ permalink raw reply
* RE: USB flashdrive on Motorola MPC5200 (IceCube) board, linux ker nel 2.4.25 (DENX drop)
From: Furxhi, Orges @ 2006-07-31 16:35 UTC (permalink / raw)
To: 'Roman Fietze', Furxhi, Orges; +Cc: linuxppc-embedded
Hello,
Thanks for responding,
> > usb.c: USB device not accepting new address=2 (error=-110)
>
> We had that problem on a few of our boards as well.
>
> For the old Icecube exists the possibility to mount two different USB
> transceivers, one of them the ISP1107DH, the other one the
> P11PAPW. Which one of the two is mounted on your board?
The Icecube board has the USBP11A transceiver and our custom board has the
ISP1105 (this has a problem with low speed devices according to PHILIPS).
> On our own boards we had problems with low speed devices and the
> ISP1107, the other transceiver that Freescale used worked
> fine. Connecting those low speed devices via a hub worked.
We get the same message when we connect the hub itself to the USB port
Does anything need to be configured in the kernel to accept the USB hub, if
so which switch is it?
> We ended up using a Fairchild USB1T11A, the ISP1107 seemed to have a
> problem, we just didn't have luck with them. The Fairchild's are pin
> compatible, maybe you just give it a try.
I'll relay this to our hardware guys.
Thanks,
Orges
^ permalink raw reply
* Xilinx PIC and kernel interrupt handler
From: Stig Telfer @ 2006-07-31 13:50 UTC (permalink / raw)
To: linuxppc-embedded
[-- Attachment #1: Type: text/plain, Size: 825 bytes --]
Hi -
There appears to be a kernel bug in the 2.4 and 2.6.17.7 kernel trees
relating to reading the interrupt vector from the Xilinx PIC
(xilinx_pic_get_irq() in xilinx_pic.c). As I see it, here's the
problem: If no interrupt is pending, the register should read all ones.
However, the IVR is only as wide as the number of interrupt sources.
The routine mistakenly assumes sign extension and checks for a 32-bit
read of -1 instead of a read of w bits where w is the number of
connected interrupt sources.
The 2.6 version also has a search-and-replace glitch relating to
removal of the reversal of bit numbering. I have attached a two line
patch (for 2.6.17.7) that makes the IVR comparison against the right
bit pattern and removes the remnants of the former bit-reversal code.
Share and enjoy,
Stig Telfer
[-- Attachment #2: xilinx_pic.patch --]
[-- Type: application/octet-stream, Size: 475 bytes --]
diff -Naurb linux-2.6.17.7/arch/ppc/syslib/xilinx_pic.c linux-2.6.17.7-stig/arch/ppc/syslib/xilinx_pic.c
--- linux-2.6.17.7/arch/ppc/syslib/xilinx_pic.c 2006-07-25 04:36:01.000000000 +0100
+++ linux-2.6.17.7-stig/arch/ppc/syslib/xilinx_pic.c 2006-07-31 14:20:04.000000000 +0100
@@ -97,8 +97,8 @@
*/
irq = intc_in_be32(intc + IVR);
- if (irq != -1)
- irq = irq;
+ if (irq == (1 << XPAR_INTC_MAX_NUM_INTR_INPUTS) - 1)
+ irq = -1;
pr_debug("get_irq: %d\n", irq);
^ permalink raw reply
* Re: Compilation error in fsl_soc.c
From: Vitaly Bordug @ 2006-07-31 13:39 UTC (permalink / raw)
To: Demke Torsten-atd012; +Cc: linuxppc-embedded
In-Reply-To: <67194FEE6056B947B4EF756C9E497A2EA198F8@zuk35exm60.ds.mot.com>
On Mon, 31 Jul 2006 08:37:56 +0100
"Demke Torsten-atd012" <torsten.demke@motorola.com> wrote:
> Hi all,
>
> with a recent versions from Paulus merge-tree the compilation
> of MPC85xx CDS failed with following output:
> ...
> LD arch/powerpc/lib/built-in.o
> CC arch/powerpc/sysdev/mpic.o
> CC arch/powerpc/sysdev/indirect_pci.o
> AS arch/powerpc/sysdev/dcr.o
> CC arch/powerpc/sysdev/fsl_soc.o
> arch/powerpc/sysdev/fsl_soc.c: In function 'gfar_mdio_of_init':
> arch/powerpc/sysdev/fsl_soc.c:88: error: 'struct device_node' has no
> member name d 'n_intrs'
> arch/powerpc/sysdev/fsl_soc.c:91: error: 'struct device_node' has no
> member name d 'intrs'
> arch/powerpc/sysdev/fsl_soc.c: In function 'gfar_of_init':
> arch/powerpc/sysdev/fsl_soc.c:142: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:143: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:153: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:154: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:158: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:159: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:165: error: 'struct device_node' has no
> member nam ed 'n_intrs'
> arch/powerpc/sysdev/fsl_soc.c: In function 'fsl_i2c_of_init':
> arch/powerpc/sysdev/fsl_soc.c:254: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:255: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c: In function 'fsl_usb_of_init':
> arch/powerpc/sysdev/fsl_soc.c:391: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:392: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:440: error: 'struct device_node' has no
> member nam ed 'intrs'
> arch/powerpc/sysdev/fsl_soc.c:441: error: 'struct device_node' has no
> member nam ed 'intrs'
> make[1]: *** [arch/powerpc/sysdev/fsl_soc.o] Error 1
> make: *** [arch/powerpc/sysdev] Error 2
No, since it is just going to be out.
I'll submit some patches addressing that this week...
--
Sincerely,
Vitaly
^ permalink raw reply
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