* Re: [PATCH v4] qe: miscellaneous code improvements and fixes to the QE library
From: Stephen Hemminger @ 2007-10-03 16:44 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, Timur Tabi, netdev
In-Reply-To: <1191429299378-git-send-email-timur@freescale.com>
On Wed, 3 Oct 2007 11:34:59 -0500
Timur Tabi <timur@freescale.com> wrote:
> This patch makes numerous miscellaneous code improvements to the QE library.
>
> 1. Remove struct ucc_common and merge ucc_init_guemr() into ucc_set_type()
> (every caller of ucc_init_guemr() also calls ucc_set_type()). Modify all
> callers of ucc_set_type() accordingly.
>
> 2. Remove the unused enum ucc_pram_initial_offset.
>
> 3. Refactor qe_setbrg(), also implement work-around for errata QE_General4.
>
> 4. Several printk() calls were missing the terminating \n.
>
> 5. Add __iomem where needed, and change u16 to __be16 and u32 to __be32 where
> appropriate.
>
> 6. In ucc_slow_init() the RBASE and TBASE registers in the PRAM were programmed
> with the wrong value.
>
> 7. Add the protocol type to struct us_info and updated ucc_slow_init() to
> use it, instead of always programming QE_CR_PROTOCOL_UNSPECIFIED.
>
> 8. Rename ucc_slow_restart_x() to ucc_slow_restart_tx()
>
> 9. Add several macros in qe.h (mostly for slow UCC support, but also to
> standardize some naming convention) and remove several unused macros.
>
> 10. Update ucc_geth.c to use the new macros.
>
> 11. Add ucc_slow_info.protocol to specify which QE_CR_PROTOCOL_xxx protcol
> to use when initializing the UCC in ucc_slow_init().
>
> 12. Rename ucc_slow_pram.rfcr to rbmr and ucc_slow_pram.tfcr to tbmr, since
> these are the real names of the registers.
>
> 13. Use the setbits, clrbits, and clrsetbits where appropriate.
>
> 14. Refactor ucc_set_qe_mux_rxtx().
>
> 15. Remove all instances of 'volatile'.
>
> 16. Simplify get_cmxucr_reg();
>
> 17. Replace qe_mux.cmxucrX with qe_mux.cmxucr[].
>
> 18. Updated struct ucc_geth because struct ucc_fast is not padded any more.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
>
Separate the changes into individual patches to allow for better comment/review
and bisection in case of regression.
^ permalink raw reply
* Re: [PATCH] [9/11] pasemi_mac: clear out old errors on interface open
From: Jeff Garzik @ 2007-10-03 17:46 UTC (permalink / raw)
To: Olof Johansson; +Cc: netdev, linuxppc-dev
In-Reply-To: <20071002212739.GJ2282@lixom.net>
Olof Johansson wrote:
> pasemi_mac: clear out old errors on interface open
>
> Clear out any pending errors when an interface is brought up. Since the bits
> are sticky, they might be from interface shutdown time after firmware has
> used it, etc.
>
> Signed-off-by: Olof Johansson <olof@lixom.net>
In general, interface-open should completely reset and initialize the
hardware. does pasemi_mac not do that?
Jeff
^ permalink raw reply
* Re: [PATCH] [11/11] pasemi_mac: enable iommu support
From: Jeff Garzik @ 2007-10-03 17:47 UTC (permalink / raw)
To: Olof Johansson; +Cc: netdev, linuxppc-dev
In-Reply-To: <20071002212818.GL2282@lixom.net>
Olof Johansson wrote:
> pasemi_mac: use buffer index pointer in clean_rx()
>
> Use the new features in B0 for buffer ring index on the receive side. This
> means we no longer have to search in the ring for where the buffer
> came from.
>
> Also cleanup the RX cleaning side a little, while I was at it.
>
> Note: Pre-B0 hardware is no longer supported, and needs a pile of other
> workarounds that are not being submitted for mainline inclusion. So the
> fact that this breaks old hardware is not a problem at this time.
>
> Signed-off-by: Olof Johansson <olof@lixom.net>
You sent patch #10 against as patch #11 :)
^ permalink raw reply
* Re: [PATCH] [POWERPC] Cleaned up whitespace in head_fsl_booke.S
From: Kumar Gala @ 2007-10-03 17:47 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20071003163907.GA17658@loki.buserror.net>
On Oct 3, 2007, at 11:39 AM, Scott Wood wrote:
> On Wed, Oct 03, 2007 at 10:20:11AM -0500, Kumar Gala wrote:
>> /* Invalidate TLB1 */
>> - li r9,0x0c
>> + li 9,0x0c
>
> No 'r'?
damn, one too many chars deleted :)
- k
^ permalink raw reply
* Re: [PATCH] [1/11] pasemi_mac: basic error checking
From: Jeff Garzik @ 2007-10-03 17:50 UTC (permalink / raw)
To: Olof Johansson; +Cc: netdev, linuxppc-dev
In-Reply-To: <20071002212450.GB2282@lixom.net>
Olof Johansson wrote:
> pasemi_mac: basic error checking
>
> Add some rudimentary error checking to pasemi_mac.
>
> Signed-off-by: Olof Johansson <olof@lixom.net>
applied 1-10
^ permalink raw reply
* Re: [PATCH] Fix typo in new EMAC driver.
From: Jeff Garzik @ 2007-10-03 17:51 UTC (permalink / raw)
To: Valentine Barshak (by way of Josh Boyer <jwboyer@linux.vnet.ibm.com>)
Cc: linuxppc-dev, netdev
In-Reply-To: <20071002120107.GA21847@ru.mvista.com>
Valentine Barshak (by way of Josh Boyer <jwboyer@linux.vnet.ibm.com>) wrote:
> Fix an obvious typo in emac_xmit_finish.
>
> Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
> ---
> drivers/net/ibm_newemac/core.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
applied
^ permalink raw reply
* Re: [PATCH] [9/11] pasemi_mac: clear out old errors on interface open
From: Olof Johansson @ 2007-10-03 18:02 UTC (permalink / raw)
To: Jeff Garzik; +Cc: netdev, linuxppc-dev
In-Reply-To: <4703D568.6000000@pobox.com>
On Wed, Oct 03, 2007 at 01:46:16PM -0400, Jeff Garzik wrote:
> Olof Johansson wrote:
>> pasemi_mac: clear out old errors on interface open
>> Clear out any pending errors when an interface is brought up. Since the
>> bits
>> are sticky, they might be from interface shutdown time after firmware has
>> used it, etc.
>> Signed-off-by: Olof Johansson <olof@lixom.net>
>
> In general, interface-open should completely reset and initialize the
> hardware. does pasemi_mac not do that?
There's no explicit way to reset just one interface besides disabling it
(which we do at close, and re-enable at open). It seems that some of
the error bits are sticky across disable/enable, which is why this was
needed. Also, they're RW1C, so writing 0 doesn't remove them (need to
write 1 to clear).
The only other dependency from firmware at this time is the setting of mac
addresses, something that will be taken care of once we allow override of
them via ethtool, since we'd need to program them from the driver then
no matter what. Right now we assume that firmware has programmed it.
-Olof
^ permalink raw reply
* [PATCH RESEND] [11/11] pasemi_mac: enable iommu support
From: Olof Johansson @ 2007-10-03 18:03 UTC (permalink / raw)
To: Jeff Garzik; +Cc: netdev, linuxppc-dev
In-Reply-To: <4703D5A5.1080204@pobox.com>
pasemi_mac: enable iommu support
Enable IOMMU support for pasemi_mac, but avoid using it on non-partitioned
systems for performance reasons.
The user can override this by selecting the PPC_PASEMI_IOMMU_DMA_FORCE
configuration option.
Signed-off-by: Olof Johansson <olof@lixom.net>
---
On Wed, Oct 03, 2007 at 01:47:17PM -0400, Jeff Garzik wrote:
> You sent patch #10 against as patch #11 :)
Oops! Here's the real copy.
-Olof
Index: k.org/arch/powerpc/platforms/pasemi/iommu.c
===================================================================
--- k.org.orig/arch/powerpc/platforms/pasemi/iommu.c
+++ k.org/arch/powerpc/platforms/pasemi/iommu.c
@@ -25,6 +25,7 @@
#include <asm/iommu.h>
#include <asm/machdep.h>
#include <asm/abs_addr.h>
+#include <asm/firmware.h>
#define IOBMAP_PAGE_SHIFT 12
@@ -175,13 +176,17 @@ static void pci_dma_dev_setup_pasemi(str
{
pr_debug("pci_dma_dev_setup, dev %p (%s)\n", dev, pci_name(dev));
- /* DMA device is untranslated, but all other PCI-e goes through
- * the IOMMU
+#if !defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
+ /* For non-LPAR environment, don't translate anything for the DMA
+ * engine. The exception to this is if the user has enabled
+ * CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE at build time.
*/
- if (dev->vendor == 0x1959 && dev->device == 0xa007)
+ if (dev->vendor == 0x1959 && dev->device == 0xa007 &&
+ !firmware_has_feature(FW_FEATURE_LPAR))
dev->dev.archdata.dma_ops = &dma_direct_ops;
- else
- dev->dev.archdata.dma_data = &iommu_table_iobmap;
+#endif
+
+ dev->dev.archdata.dma_data = &iommu_table_iobmap;
}
static void pci_dma_bus_setup_null(struct pci_bus *b) { }
Index: k.org/drivers/net/pasemi_mac.c
===================================================================
--- k.org.orig/drivers/net/pasemi_mac.c
+++ k.org/drivers/net/pasemi_mac.c
@@ -34,6 +34,7 @@
#include <net/checksum.h>
#include <asm/irq.h>
+#include <asm/firmware.h>
#include "pasemi_mac.h"
@@ -89,6 +90,15 @@ MODULE_PARM_DESC(debug, "PA Semi MAC bit
static struct pasdma_status *dma_status;
+static int translation_enabled(void)
+{
+#if defined(CONFIG_PPC_PASEMI_IOMMU_DMA_FORCE)
+ return 1;
+#else
+ return firmware_has_feature(FW_FEATURE_LPAR);
+#endif
+}
+
static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
unsigned int val)
{
@@ -193,6 +203,7 @@ static int pasemi_mac_setup_rx_resources
struct pasemi_mac_rxring *ring;
struct pasemi_mac *mac = netdev_priv(dev);
int chan_id = mac->dma_rxch;
+ unsigned int cfg;
ring = kzalloc(sizeof(*ring), GFP_KERNEL);
@@ -232,20 +243,28 @@ static int pasemi_mac_setup_rx_resources
PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 3));
- write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
- PAS_DMA_RXCHAN_CFG_HBU(2));
+ cfg = PAS_DMA_RXCHAN_CFG_HBU(2);
+
+ if (translation_enabled())
+ cfg |= PAS_DMA_RXCHAN_CFG_CTR;
+
+ write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id), cfg);
write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
- PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
+ PAS_DMA_RXINT_BASEL_BRBL(ring->buf_dma));
write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
- PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
+ PAS_DMA_RXINT_BASEU_BRBH(ring->buf_dma >> 32) |
PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
- write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
- PAS_DMA_RXINT_CFG_DHL(3) | PAS_DMA_RXINT_CFG_L2 |
- PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
- PAS_DMA_RXINT_CFG_HEN);
+ cfg = PAS_DMA_RXINT_CFG_DHL(3) | PAS_DMA_RXINT_CFG_L2 |
+ PAS_DMA_RXINT_CFG_LW | PAS_DMA_RXINT_CFG_RBP |
+ PAS_DMA_RXINT_CFG_HEN;
+
+ if (translation_enabled())
+ cfg |= PAS_DMA_RXINT_CFG_ITRR | PAS_DMA_RXINT_CFG_ITR;
+
+ write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if), cfg);
ring->next_to_fill = 0;
ring->next_to_clean = 0;
@@ -275,6 +294,7 @@ static int pasemi_mac_setup_tx_resources
u32 val;
int chan_id = mac->dma_txch;
struct pasemi_mac_txring *ring;
+ unsigned int cfg;
ring = kzalloc(sizeof(*ring), GFP_KERNEL);
if (!ring)
@@ -304,11 +324,15 @@ static int pasemi_mac_setup_tx_resources
write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
- write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
- PAS_DMA_TXCHAN_CFG_TY_IFACE |
- PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
- PAS_DMA_TXCHAN_CFG_UP |
- PAS_DMA_TXCHAN_CFG_WT(2));
+ cfg = PAS_DMA_TXCHAN_CFG_TY_IFACE |
+ PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
+ PAS_DMA_TXCHAN_CFG_UP |
+ PAS_DMA_TXCHAN_CFG_WT(2);
+
+ if (translation_enabled())
+ cfg |= PAS_DMA_TXCHAN_CFG_TRD | PAS_DMA_TXCHAN_CFG_TRR;
+
+ write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id), cfg);
ring->next_to_fill = 0;
ring->next_to_clean = 0;
Index: k.org/drivers/net/pasemi_mac.h
===================================================================
--- k.org.orig/drivers/net/pasemi_mac.h
+++ k.org/drivers/net/pasemi_mac.h
@@ -212,6 +212,7 @@ enum {
#define PAS_DMA_RXINT_CFG_DHL_S 24
#define PAS_DMA_RXINT_CFG_DHL(x) (((x) << PAS_DMA_RXINT_CFG_DHL_S) & \
PAS_DMA_RXINT_CFG_DHL_M)
+#define PAS_DMA_RXINT_CFG_ITR 0x00400000
#define PAS_DMA_RXINT_CFG_LW 0x00200000
#define PAS_DMA_RXINT_CFG_L2 0x00100000
#define PAS_DMA_RXINT_CFG_HEN 0x00080000
@@ -258,9 +259,11 @@ enum {
#define PAS_DMA_TXCHAN_CFG_WT_S 6
#define PAS_DMA_TXCHAN_CFG_WT(x) (((x) << PAS_DMA_TXCHAN_CFG_WT_S) & \
PAS_DMA_TXCHAN_CFG_WT_M)
-#define PAS_DMA_TXCHAN_CFG_CF 0x00001000 /* Clean first line */
-#define PAS_DMA_TXCHAN_CFG_CL 0x00002000 /* Clean last line */
+#define PAS_DMA_TXCHAN_CFG_TRD 0x00010000 /* translate data */
+#define PAS_DMA_TXCHAN_CFG_TRR 0x00008000 /* translate rings */
#define PAS_DMA_TXCHAN_CFG_UP 0x00004000 /* update tx descr when sent */
+#define PAS_DMA_TXCHAN_CFG_CL 0x00002000 /* Clean last line */
+#define PAS_DMA_TXCHAN_CFG_CF 0x00001000 /* Clean first line */
#define PAS_DMA_TXCHAN_INCR(c) (0x310+(c)*_PAS_DMA_TXCHAN_STRIDE)
#define PAS_DMA_TXCHAN_BASEL(c) (0x318+(c)*_PAS_DMA_TXCHAN_STRIDE)
#define PAS_DMA_TXCHAN_BASEL_BRBL_M 0xffffffc0
@@ -294,6 +297,7 @@ enum {
#define PAS_DMA_RXCHAN_CCMDSTA_FD 0x00001000
#define PAS_DMA_RXCHAN_CCMDSTA_DT 0x00000800
#define PAS_DMA_RXCHAN_CFG(c) (0x804+(c)*_PAS_DMA_RXCHAN_STRIDE)
+#define PAS_DMA_RXCHAN_CFG_CTR 0x00000400
#define PAS_DMA_RXCHAN_CFG_HBU_M 0x00000380
#define PAS_DMA_RXCHAN_CFG_HBU_S 7
#define PAS_DMA_RXCHAN_CFG_HBU(x) (((x) << PAS_DMA_RXCHAN_CFG_HBU_S) & \
Index: k.org/arch/powerpc/platforms/pasemi/Kconfig
===================================================================
--- k.org.orig/arch/powerpc/platforms/pasemi/Kconfig
+++ k.org/arch/powerpc/platforms/pasemi/Kconfig
@@ -19,6 +19,16 @@ config PPC_PASEMI_IOMMU
help
IOMMU support for PA6T-1682M
+config PPC_PASEMI_IOMMU_DMA_FORCE
+ bool "Force DMA engine to use IOMMU"
+ depends on PPC_PASEMI_IOMMU
+ help
+ This option forces the use of the IOMMU also for the
+ DMA engine. Otherwise the kernel will use it only when
+ running under a hypervisor.
+
+ If in doubt, say "N".
+
config PPC_PASEMI_MDIO
depends on PHYLIB
tristate "MDIO support via GPIO"
^ permalink raw reply
* Re: [PATCH v4] qe: miscellaneous code improvements and fixes to the QE library
From: Timur Tabi @ 2007-10-03 18:00 UTC (permalink / raw)
To: Stephen Hemminger; +Cc: linuxppc-dev, netdev
In-Reply-To: <20071003094449.702c4a90@freepuppy.rosehill>
Stephen Hemminger wrote:
> Separate the changes into individual patches to allow for better comment/review
> and bisection in case of regression.
That would be too difficult. Some of the changes are single lines, and this
patch has already been approved -- I just cross-posted to netdev because I
made a few ucc_geth changes that can't be docoupled from the powerpc changes.
A series of 18 patches would just be convoluted.
--
Timur Tabi
Linux Kernel Developer @ Freescale
^ permalink raw reply
* Re: [PATCH 4/5] ibmebus: Move to of_device and of_platform_driver, match eHCA and eHEA drivers
From: Roland Dreier @ 2007-10-03 18:05 UTC (permalink / raw)
To: Paul Mackerras
Cc: Thomas Klein, Arnd Bergmann, Jan-Bernd Themann, Joachim Fenkes,
LKML, Paul Mackerras, LinuxPPC-Dev, Christoph Raisch,
Stefan Roscher
In-Reply-To: <18179.943.277895.633795@cargo.ozlabs.ibm.com>
> > Replace struct ibmebus_dev and struct ibmebus_driver with struct of_device
> > and struct of_platform_driver, respectively. Match the external ibmebus
> > interface and drivers using it.
> >
> > Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com>
>
> If not, then you need to get an Acked-by and an agreement that this
> change can go via the powerpc.git tree from Roland Dreier and Jeff
> Garzik.
I don't see anything objectionable in the infiniband parts of the
patch -- I don't have any way to test the changes but it all looks
like a straightforward conversion to a new platform API. So:
Acked-by: Roland Dreier <rolandd@cisco.com>
- R.
^ permalink raw reply
* Re: [PATCH] [9/11] pasemi_mac: clear out old errors on interface open
From: Jeff Garzik @ 2007-10-03 18:15 UTC (permalink / raw)
To: Olof Johansson; +Cc: netdev, linuxppc-dev
In-Reply-To: <20071003180210.GA19319@lixom.net>
Olof Johansson wrote:
> On Wed, Oct 03, 2007 at 01:46:16PM -0400, Jeff Garzik wrote:
>> Olof Johansson wrote:
>>> pasemi_mac: clear out old errors on interface open
>>> Clear out any pending errors when an interface is brought up. Since the
>>> bits
>>> are sticky, they might be from interface shutdown time after firmware has
>>> used it, etc.
>>> Signed-off-by: Olof Johansson <olof@lixom.net>
>> In general, interface-open should completely reset and initialize the
>> hardware. does pasemi_mac not do that?
>
> There's no explicit way to reset just one interface besides disabling it
> (which we do at close, and re-enable at open). It seems that some of
> the error bits are sticky across disable/enable, which is why this was
> needed. Also, they're RW1C, so writing 0 doesn't remove them (need to
> write 1 to clear).
OK just making sure, thanks.
> The only other dependency from firmware at this time is the setting of mac
> addresses, something that will be taken care of once we allow override of
> them via ethtool, since we'd need to program them from the driver then
> no matter what. Right now we assume that firmware has programmed it.
Standard procedure for this is
* upon module-load, obtain the MAC address from <whatever canonical source>
* upon interface-up, program dev->dev_addr[] into chip's RX filter (aka
MAC address) registers
That permits the admin to override the MAC address via ifconfig.
(ethtool doesn't support that, but you basically had the right idea)
Jeff
^ permalink raw reply
* Re: [PATCH] fsl_spi_init: Support non-QE processors
From: Grant Likely @ 2007-10-03 18:17 UTC (permalink / raw)
To: Peter Korsgaard; +Cc: linuxppc-dev
In-Reply-To: <874ph8xjz1.fsf@macbook.be.48ers.dk>
On 10/3/07, Peter Korsgaard <jacmet@sunsite.dk> wrote:
> >>>>> "Grant" == Grant Likely <grant.likely@secretlab.ca> writes:
>
> Hi,
>
> Grant> Why not just:
>
> Grant> np = of_find_node_by_type(NULL, "qe");
> Grant> + if (!np)
> Grant> + np = of_find_node_by_type(NULL, "soc");
> Grant> if (!np)
> Grant> return -ENODEV;
>
> My first iteration did it like that, but then you don't get a -ENODEV
> if the node is missing (and you'll end up using the wrong clock) and
> it doesn't support processors with SPI on and off QE (if that
> exists/will ever exist).
Okay, but you should at least be able confine your determination of
which sysclk value to use to one part of the function. Otherwise, it
looks good.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH RESEND] [11/11] pasemi_mac: enable iommu support
From: Jeff Garzik @ 2007-10-03 18:19 UTC (permalink / raw)
To: Olof Johansson; +Cc: netdev, linuxppc-dev
In-Reply-To: <20071003180354.GB19319@lixom.net>
Olof Johansson wrote:
> pasemi_mac: enable iommu support
>
> Enable IOMMU support for pasemi_mac, but avoid using it on non-partitioned
> systems for performance reasons.
>
> The user can override this by selecting the PPC_PASEMI_IOMMU_DMA_FORCE
> configuration option.
>
> Signed-off-by: Olof Johansson <olof@lixom.net>
applied
^ permalink raw reply
* Re: [PATCH 0/6] Patch series to add of_platform binding to xilinxfb
From: Grant Likely @ 2007-10-03 18:22 UTC (permalink / raw)
To: Andrei Konovalov, linuxppc-dev
In-Reply-To: <4703C8A7.8070001@ru.mvista.com>
On 10/3/07, Andrei Konovalov <akonovalov@ru.mvista.com> wrote:
> Hi Grant,
>
> Grant Likely wrote:
> > (resend due to mailer issues. Apologies to anyone receiving this twice)
> >
> > This patch series reworks the Xilinx framebuffer driver and then adds
> > an of_platform bus binding. The of_platform bus binding is needed to use
> > the driver in arch/powerpc platforms.
>
> The patch series looks good (though I did no testing on my site; seems
> the Xilinx ML* boards should not be hurt).
I've tested under both arch/ppc and arch/powerpc on a custom board
that I have here.
>
> BTW, I don't follow the linuxppc list close enough at the moment.
> What boards are going to use of_platform bus binding?
Any Xilinx platform (powerpc & microblaze) using the xilinx
framebuffer (ml300, ml403, etc).
> ML40x/ML300 are not in the arch/powerpc yet, right?
2.6.24 will have Xilinx Virtex support in arch/powerpc. It's already
in Josh's 4xx maintainer tree.
> Do I recall correct that you have a mpc5200 based one with two xilinxfb's?
Nope, I haven't seen such a beast myself.
> PS
> I don't think you need an ack from me.
> If this is not true, let me know, and I'll ack the patch series
You are the author after all. :-) Your ack is probably appropriate,
if not absolutely necessary.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* [PATCH] powerpc: fix crash in rtas during early boot.
From: Linas Vepstas @ 2007-10-03 18:35 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev
RTAS messages can occur very early during boot, before the error
message buffer has been allocated. The current code will lead to
a null-pointer deref. Explicitly protect against this.
Signed-off-by: Linas Vepstas <linas@austin.ibm.com>
Cc: Andy Whitcroft <apw@shadowen.org>
----
Andy Whitcroft's crash was appearently due to firmware complaining
about lost power, (actually, lost power supply redundancy!), which
occurred very early during boot.
Type 00000040 (EPOW)
Status: bypassed new
Residual error from previous boot.
EPOW Sensor Value: 00000002
EPOW warning due to loss of redundancy.
EPOW general power fault.
I've no clue why firmware thought it was OK to report this
during one of the earliest calls to RTAS; I'm still investiigating
that.
arch/powerpc/platforms/pseries/rtasd.c | 6 ++++++
1 file changed, 6 insertions(+)
Index: linux-2.6.23-rc8-mm1/arch/powerpc/platforms/pseries/rtasd.c
===================================================================
--- linux-2.6.23-rc8-mm1.orig/arch/powerpc/platforms/pseries/rtasd.c 2007-09-26 15:06:49.000000000 -0500
+++ linux-2.6.23-rc8-mm1/arch/powerpc/platforms/pseries/rtasd.c 2007-10-03 11:58:09.000000000 -0500
@@ -235,6 +235,12 @@ void pSeries_log_error(char *buf, unsign
return;
}
+ /* During early boot, the log buffer hasn't been allocted yet. */
+ if (rtas_log_buf == NULL) {
+ spin_unlock_irqrestore(&rtasd_log_lock, s);
+ return;
+ }
+
/* call type specific method for error */
switch (err_type & ERR_TYPE_MASK) {
case ERR_TYPE_RTAS_LOG:
^ permalink raw reply
* Re: 2.6.23-rc7-mm1 -- powerpc rtas panic
From: Linas Vepstas @ 2007-10-03 18:50 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev, Andrew Morton, linux-kernel
In-Reply-To: <1191384586.8073.6.camel@concordia>
On Wed, Oct 03, 2007 at 02:09:46PM +1000, Michael Ellerman wrote:
>
> Until we initialise what exactly?
Until we allocate the error log buffer. The original crash was
for a null-pointer deref of the unallocated buffer. I just sent
out a patch to fix this; its a bit simpler than the below.
In that email, I remarked:
Andy Whitcroft's crash was appearently due to firmware complaining
about lost power, (actually, lost power supply redundancy!), which
occurred very early during boot.
Type 00000040 (EPOW)
Status: bypassed new
Residual error from previous boot.
EPOW Sensor Value: 00000002
EPOW warning due to loss of redundancy.
EPOW general power fault.
I've no clue why firmware thought it was OK to report this
during one of the earliest calls to RTAS; I'm still investiigating
that.
--linas
^ permalink raw reply
* [PATCH] PPC 85xx failure with odd memory sizes and CONFIG_HIGHMEM
From: Dale Farnsworth @ 2007-10-03 19:01 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-embedded
From: Dale Farnsworth <dale@farnsworth.org>
The CONFIG_FSL_BOOKE mmu setup code fails when CONFIG_HIGHMEM=y
and the 3 fixed TLB entries cannot exactly map the lowmem size.
Each TLB entry can map 4MB, 16MB, 64MB or 256MB, so the failure
is observed when the kernel lowmem size is not equal to the
sum of up to 3 of those values.
Normally, memory is sized in nice numbers, but I observed this
problem while testing a crash dump kernel. The failure can
also be observed by artificially reducing the kernel's main
memory via the mem= kernel command line parameter.
This commit fixes the problem by setting __initial_memory_limit
in adjust_total_lowmem().
Signed-off-by: Dale Farnsworth <dale@farnsworth.org>
---
arch/powerpc/mm/fsl_booke_mmu.c | 2 ++
1 file changed, 2 insertions(+)
Index: linux-2.6.21/arch/powerpc/mm/fsl_booke_mmu.c
===================================================================
--- linux-2.6.21.orig/arch/powerpc/mm/fsl_booke_mmu.c 2007-10-02 01:18:10.000000000 +0000
+++ linux-2.6.21/arch/powerpc/mm/fsl_booke_mmu.c 2007-10-03 16:40:24.000000000 +0000
@@ -60,6 +60,7 @@ unsigned int num_tlbcam_entries;
static unsigned long __cam0, __cam1, __cam2;
extern unsigned long total_lowmem;
extern unsigned long __max_low_memory;
+extern unsigned long __initial_memory_limit;
#define MAX_LOW_MEM CONFIG_LOWMEM_SIZE
#define NUM_TLBCAMS (16)
@@ -233,4 +234,5 @@ adjust_total_lowmem(void)
__cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
(total_lowmem - __cam0 - __cam1 - __cam2) >> 20);
__max_low_memory = max_low_mem = __cam0 + __cam1 + __cam2;
+ __initial_memory_limit = __max_low_memory;
}
^ permalink raw reply
* Re: [PATCH 08/10] ia64: Convert cpu_sibling_map to a per_cpu data array (v3)
From: Mike Travis @ 2007-10-03 19:22 UTC (permalink / raw)
To: Paul Jackson
Cc: linux-mm, ak, linux-kernel, linuxppc-dev, sparclinux, akpm,
clameter
In-Reply-To: <20070928024901.24ab6c99.pj@sgi.com>
Hi Paul,
I just now found this. I'll take a look immediately. I tried it
on a couple of systems but not margin.
Thanks,
Mike
Paul Jackson wrote:
> Mike,
>
> I think there is a bug either in this ia64 patch, or in the related
> generic arch patch: Convert cpu_sibling_map to be a per cpu variable
> (v3).
>
> It dies early in boot on me, on the SGI internal 8 processor IA64
> system that you and I know as 'margin'. The death is a hard hang, due
> to a corrupt stack, due to a bogus cpu index.
>
> I haven't tracked it down all the way, but have gotten this far. If I add
> the following patch, I get a panic on the BUG_ON if I have these two patches
> in 2.6.23-rc8-mm1, but it boots just fine if I don't have these two patches.
>
> It seems that the "cpu_sibling_map[cpu]" cpumask_t is empty (all zero
> bits) with your two patches applied, but has some non-zero bits
> otherwise, which leads to 'group' being NR_CPUS instead of a useful CPU
> number. Unfortunately, I have no idea why the "cpu_sibling_map[cpu]"
> cpumask_t is empty -- good luck on that part.
>
> The patch that catches this bug earlier is this:
>
> --- 2.6.23-rc8-mm1.orig/kernel/sched.c 2007-09-28 01:42:20.144561024 -0700
> +++ 2.6.23-rc8-mm1/kernel/sched.c 2007-09-28 02:27:14.239075497 -0700
> @@ -5905,6 +5905,7 @@ static int cpu_to_phys_group(int cpu, co
> #else
> group = cpu;
> #endif
> + BUG_ON(group == NR_CPUS);
> if (sg)
> *sg = &per_cpu(sched_group_phys, group);
> return group;
>
>
^ permalink raw reply
* RE: [PATCH] PPC 85xx failure with odd memory sizes and CONFIG_HIGHMEM
From: Rune Torgersen @ 2007-10-03 19:34 UTC (permalink / raw)
To: Dale Farnsworth, Kumar Gala; +Cc: linuxppc-embedded
In-Reply-To: <20071003190140.GA19169@xyzzy.farnsworth.org>
> From: Dale Farnsworth
>=20
> The CONFIG_FSL_BOOKE mmu setup code fails when CONFIG_HIGHMEM=3Dy
> and the 3 fixed TLB entries cannot exactly map the lowmem size.
> Each TLB entry can map 4MB, 16MB, 64MB or 256MB, so the failure
> is observed when the kernel lowmem size is not equal to the
> sum of up to 3 of those values.
Does this mean you cannot run 1G of lowmem on a 85xx?
On 82xx I run 1G of lowmem, and when we finaly upgrade our product to a
85xx something, Iw was planning on doing the same.
(For those interested:
To run 1G lowmwm on 82xx (at least under arch/ppc)
CONFIG_ADVANCED_OPTIONS=3Dy
CONFIG_HIGHMEM_START=3D0xfe000000
CONFIG_LOWMEM_SIZE_BOOL=3Dy
CONFIG_LOWMEM_SIZE=3D0x40000000
CONFIG_KERNEL_START_BOOL=3Dy
CONFIG_KERNEL_START=3D0xa0000000
^ permalink raw reply
* Re: [PATCH] PPC 85xx failure with odd memory sizes and CONFIG_HIGHMEM
From: Dale Farnsworth @ 2007-10-03 19:51 UTC (permalink / raw)
To: Rune Torgersen; +Cc: linuxppc-embedded
In-Reply-To: <DCEAAC0833DD314AB0B58112AD99B93B0371EFE9@ismail.innsys.innovsys.com>
On Wed, Oct 03, 2007 at 02:34:42PM -0500, Rune Torgersen wrote:
> > From: Dale Farnsworth
> >
> > The CONFIG_FSL_BOOKE mmu setup code fails when CONFIG_HIGHMEM=y
> > and the 3 fixed TLB entries cannot exactly map the lowmem size.
> > Each TLB entry can map 4MB, 16MB, 64MB or 256MB, so the failure
> > is observed when the kernel lowmem size is not equal to the
> > sum of up to 3 of those values.
>
> Does this mean you cannot run 1G of lowmem on a 85xx?
I think you can, and maybe I should have added 1GB to my list of
sizes above. But, my 85xx system only has 256MB, so I can't test
it.
-Dale
^ permalink raw reply
* [PATCH 0/5] Add MPC8610 HPCD Base Port
From: Jon Loeliger @ 2007-10-03 20:09 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
Kumar and Paul,
These five patches add the base port for the newly
introduced MPC8610 HPCD reference board. We would
like to see these added to 2.6.24 if possible!
Thanks,
jdl
arch/powerpc/boot/dts/mpc8610_hpcd.dts | 191 +++++
arch/powerpc/configs/mpc8610_hpcd_defconfig | 1023 +++++++++++++++++++++++++++
arch/powerpc/platforms/86xx/Kconfig | 13 +
arch/powerpc/platforms/86xx/Makefile | 1 +
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 267 +++++++
arch/powerpc/sysdev/fsl_pci.c | 1 +
include/linux/pci_ids.h | 1 +
7 files changed, 1497 insertions(+), 0 deletions(-)
^ permalink raw reply
* [PATCH 1/5] Add initial MPC8610 HPCD Device Tree Source file.
From: Jon Loeliger @ 2007-10-03 20:09 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
From: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
---
arch/powerpc/boot/dts/mpc8610_hpcd.dts | 191 ++++++++++++++++++++++++++++++++
1 files changed, 191 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/mpc8610_hpcd.dts
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
new file mode 100644
index 0000000..966edf1
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -0,0 +1,191 @@
+/*
+ * MPC8610 HPCD Device Tree Source
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License Version 2 as published
+ * by the Free Software Foundation.
+ */
+
+
+/ {
+ model = "MPC8610HPCD";
+ compatible = "fsl,MPC8610HPCD";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8610@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <d# 32>; // bytes
+ i-cache-line-size = <d# 32>; // bytes
+ d-cache-size = <8000>; // L1, 32K
+ i-cache-size = <8000>; // L1, 32K
+ timebase-frequency = <0>; // 33 MHz, from uboot
+ bus-frequency = <0>; // From uboot
+ clock-frequency = <0>; // From uboot
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <00000000 20000000>; // 512M at 0x0
+ };
+
+ soc@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ #interrupt-cells = <2>;
+ device_type = "soc";
+ ranges = <0 e0000000 00100000>;
+ reg = <e0000000 1000>;
+ bus-frequency = <0>;
+
+ i2c@3000 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3000 100>;
+ interrupts = <2b 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
+ i2c@3100 {
+ device_type = "i2c";
+ compatible = "fsl-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3100 100>;
+ interrupts = <2b 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
+ serial@4500 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4500 100>;
+ clock-frequency = <0>;
+ interrupts = <2a 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ serial@4600 {
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <4600 100>;
+ clock-frequency = <0>;
+ interrupts = <1c 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+
+ mpic: interrupt-controller@40000 {
+ clock-frequency = <0>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <40000 40000>;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ big-endian;
+ };
+
+ global-utilities@e0000 {
+ compatible = "fsl,mpc8610-guts";
+ reg = <e0000 1000>;
+ fsl,has-rstcr;
+ };
+ };
+
+ pci@e0008000 {
+ compatible = "fsl,mpc8610-pci";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <e0008000 1000>;
+ bus-range = <0 0>;
+ ranges = <02000000 0 80000000 80000000 0 10000000
+ 01000000 0 00000000 e1000000 0 00100000>;
+ clock-frequency = <1fca055>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ interrupt-map-mask = <f800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x11 */
+ 8800 0 0 1 &mpic 4 1
+ 8800 0 0 2 &mpic 5 1
+ 8800 0 0 3 &mpic 6 1
+ 8800 0 0 4 &mpic 7 1
+
+ /* IDSEL 0x12 */
+ 9000 0 0 1 &mpic 5 1
+ 9000 0 0 2 &mpic 6 1
+ 9000 0 0 3 &mpic 7 1
+ 9000 0 0 4 &mpic 4 1
+ >;
+ };
+
+ pcie@e000a000 {
+ compatible = "fsl,mpc8641-pcie";
+ device_type = "pci";
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <e000a000 1000>;
+ bus-range = <1 3>;
+ ranges = <02000000 0 a0000000 a0000000 0 10000000
+ 01000000 0 00000000 e3000000 0 00100000>;
+ clock-frequency = <1fca055>;
+ interrupt-parent = <&mpic>;
+ interrupts = <1a 2>;
+ interrupt-map-mask = <f800 0 0 7>;
+
+ interrupt-map = <
+ /* IDSEL 0x1b */
+ d800 0 0 1 &mpic 2 1
+
+ /* IDSEL 0x1c*/
+ e000 0 0 1 &mpic 1 1
+ e000 0 0 2 &mpic 1 1
+ e000 0 0 3 &mpic 1 1
+ e000 0 0 4 &mpic 1 1
+
+ /* IDSEL 0x1f */
+ f800 0 0 1 &mpic 3 0
+ f800 0 0 2 &mpic 0 1
+ >;
+
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ ranges = <02000000 0 a0000000
+ 02000000 0 a0000000
+ 0 10000000
+ 01000000 0 00000000
+ 01000000 0 00000000
+ 0 00100000>;
+ uli1575@0 {
+ reg = <0 0 0 0 0>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ ranges = <02000000 0 a0000000
+ 02000000 0 a0000000
+ 0 10000000
+ 01000000 0 00000000
+ 01000000 0 00000000
+ 0 00100000>;
+ };
+ };
+ };
+};
--
1.5.3
^ permalink raw reply related
* [PATCH 2/5] Add initial MPC8610 HPCD Platform files.
From: Jon Loeliger @ 2007-10-03 20:09 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
From: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loelier <jdl@freescale.com>
---
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 267 ++++++++++++++++++++++++++++
1 files changed, 267 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/platforms/86xx/mpc8610_hpcd.c
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
new file mode 100644
index 0000000..ba73163
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -0,0 +1,267 @@
+/*
+ * MPC8610 HPCD board specific routines
+ *
+ * Initial author: Xianghua Xiao <x.xiao@freescale.com>
+ * Recode: Jason Jin <jason.jin@freescale.com>
+ *
+ * Rewrite the interrupt routing. remove the 8259PIC support,
+ * All the integrated device in ULI use sideband interrupt.
+ *
+ * Copyright 2007 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/seq_file.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <asm/mpc86xx.h>
+#include <asm/prom.h>
+#include <mm/mmu_decl.h>
+#include <asm/udbg.h>
+
+#include <asm/mpic.h>
+
+#include <sysdev/fsl_pci.h>
+#include <sysdev/fsl_soc.h>
+
+#include "mpc86xx.h"
+
+#define MPC86XX_RSTCR_OFFSET (0xe00b0) /* Reset Control Register */
+
+
+void __init
+mpc86xx_hpcd_init_irq(void)
+{
+ struct mpic *mpic1;
+ struct device_node *np;
+ struct resource res;
+
+ /* Determine PIC address. */
+ np = of_find_node_by_type(NULL, "open-pic");
+ if (np == NULL)
+ return;
+ of_address_to_resource(np, 0, &res);
+
+ /* Alloc mpic structure and per isu has 16 INT entries. */
+ mpic1 = mpic_alloc(np, res.start,
+ MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
+ 0, 256, " MPIC ");
+ BUG_ON(mpic1 == NULL);
+
+ mpic_init(mpic1);
+
+}
+
+
+#ifdef CONFIG_PCI
+static void __devinit quirk_uli1575(struct pci_dev *dev)
+{
+ u32 temp32;
+
+ /* Disable INTx */
+ pci_read_config_dword(dev, 0x48, &temp32);
+ pci_write_config_dword(dev, 0x48, (temp32 | 1<<26));
+
+ /* Enable sideband interrupt */
+ pci_read_config_dword(dev, 0x90, &temp32);
+ pci_write_config_dword(dev, 0x90, (temp32 | 1<<22));
+}
+
+
+static void __devinit quirk_uli5288(struct pci_dev *dev)
+{
+ unsigned char c;
+ unsigned short temp;
+
+ /* Interrupt Disable, Needed when SATA disabled */
+ pci_read_config_word(dev, PCI_COMMAND, &temp);
+ temp |= 1<<10;
+ pci_write_config_word(dev, PCI_COMMAND, temp);
+
+ pci_read_config_byte(dev, 0x83, &c);
+ c |= 0x80;
+ pci_write_config_byte(dev, 0x83, c);
+
+ pci_write_config_byte(dev, PCI_CLASS_PROG, 0x01);
+ pci_write_config_byte(dev, PCI_CLASS_DEVICE, 0x06);
+
+ pci_read_config_byte(dev, 0x83, &c);
+ c &= 0x7f;
+ pci_write_config_byte(dev, 0x83, c);
+}
+
+
+/*
+ * Since 8259PIC was disabled on the board, the IDE device can not
+ * use the legacy IRQ, we need to let the IDE device work under
+ * native mode and use the interrupt line like other PCI devices.
+ * IRQ14 is a sideband interrupt from IDE device to CPU and we use this
+ * as the interrupt for IDE device.
+ */
+static void __devinit quirk_uli5229(struct pci_dev *dev)
+{
+ unsigned char c;
+
+ pci_read_config_byte(dev, 0x4b, &c);
+ c |= 0x10;
+ pci_write_config_byte(dev, 0x4b, c);
+}
+
+
+/*
+ * SATA interrupt pin bug fix
+ * There's a chip bug for 5288, The interrupt pin should be 2,
+ * not the read only value 1, So it use INTB#, not INTA# which
+ * actually used by the IDE device 5229.
+ * As of this bug, during the PCI initialization, 5288 read the
+ * irq of IDE device from the device tree, this function fix this
+ * bug by re-assigning a correct irq to 5288.
+ *
+ */
+static void __devinit final_uli5288(struct pci_dev *dev)
+{
+ struct pci_controller *hose = pci_bus_to_host(dev->bus);
+ struct device_node *hosenode = hose ? hose->arch_data : NULL;
+ struct of_irq oirq;
+ int virq, pin = 2;
+ u32 laddr[3];
+
+ if (!hosenode)
+ return;
+
+ laddr[0] = (hose->first_busno << 16) | (PCI_DEVFN(31, 0) << 8);
+ laddr[1] = laddr[2] = 0;
+ of_irq_map_raw(hosenode, &pin, 1, laddr, &oirq);
+ virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
+ oirq.size);
+ dev->irq = virq;
+}
+
+
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x1575, quirk_uli1575);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5288, quirk_uli5288);
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AL, 0x5229, quirk_uli5229);
+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, 0x5288, final_uli5288);
+#endif /* CONFIG_PCI */
+
+
+static void __init
+mpc86xx_hpcd_setup_arch(void)
+{
+#ifdef CONFIG_PCI
+ struct device_node *np;
+#endif
+ if (ppc_md.progress)
+ ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0);
+
+#ifdef CONFIG_PCI
+ for_each_node_by_type(np, "pci") {
+ if (of_device_is_compatible(np, "fsl,mpc8610-pci")
+ || of_device_is_compatible(np, "fsl,mpc8641-pcie")) {
+ struct resource rsrc;
+ of_address_to_resource(np, 0, &rsrc);
+ if ((rsrc.start & 0xfffff) == 0xa000)
+ fsl_add_bridge(np, 1);
+ else
+ fsl_add_bridge(np, 0);
+ }
+ }
+#endif
+
+ printk("MPC86xx HPCD board from Freescale Semiconductor\n");
+}
+
+
+void
+mpc86xx_hpcd_show_cpuinfo(struct seq_file *m)
+{
+ struct device_node *root;
+ uint memsize = total_memory;
+ const char *model = "";
+ uint svid = mfspr(SPRN_SVR);
+
+ seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
+
+ root = of_find_node_by_path("/");
+ if (root)
+ model = of_get_property(root, "model", NULL);
+ seq_printf(m, "Machine\t\t: %s\n", model);
+ of_node_put(root);
+
+ seq_printf(m, "SVR\t\t: 0x%x\n", svid);
+ seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
+}
+
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init mpc86xx_hpcd_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "fsl,MPC8610HPCD"))
+ return 1; /* Looks good */
+
+ return 0;
+}
+
+
+void
+mpc86xx_restart(char *cmd)
+{
+ void __iomem *rstcr;
+
+ rstcr = ioremap(get_immrbase() + MPC86XX_RSTCR_OFFSET, 0x100);
+
+ local_irq_disable();
+
+ /* Assert reset request to Reset Control Register */
+ out_be32(rstcr, 0x2);
+
+ /* not reached */
+}
+
+
+long __init
+mpc86xx_time_init(void)
+{
+ unsigned int temp;
+
+ /* Set the time base to zero */
+ mtspr(SPRN_TBWL, 0);
+ mtspr(SPRN_TBWU, 0);
+
+ temp = mfspr(SPRN_HID0);
+ temp |= HID0_TBEN;
+ mtspr(SPRN_HID0, temp);
+ asm volatile("isync");
+
+ return 0;
+}
+
+define_machine(mpc86xx_hpcd) {
+ .name = "MPC86xx HPCD",
+ .probe = mpc86xx_hpcd_probe,
+ .setup_arch = mpc86xx_hpcd_setup_arch,
+ .init_IRQ = mpc86xx_hpcd_init_irq,
+ .show_cpuinfo = mpc86xx_hpcd_show_cpuinfo,
+ .get_irq = mpic_get_irq,
+ .restart = mpc86xx_restart,
+ .time_init = mpc86xx_time_init,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+};
--
1.5.3
^ permalink raw reply related
* [PATCH 3/5] Treat 8610 host bridge as transparent
From: Jon Loeliger @ 2007-10-03 20:09 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
From: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
---
arch/powerpc/sysdev/fsl_pci.c | 1 +
include/linux/pci_ids.h | 1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 34cad96..98290f4 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -259,3 +259,4 @@ DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8572E, quirk_fsl_pcie_transpare
DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8572, quirk_fsl_pcie_transparent);
DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_transparent);
DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_transparent);
+DECLARE_PCI_FIXUP_EARLY(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_transparent);
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index 545f24c..bb244a4 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2104,6 +2104,7 @@
#define PCI_DEVICE_ID_MPC8572 0x0041
#define PCI_DEVICE_ID_MPC8641 0x7010
#define PCI_DEVICE_ID_MPC8641D 0x7011
+#define PCI_DEVICE_ID_MPC8610 0x7018
#define PCI_VENDOR_ID_PASEMI 0x1959
--
1.5.3
^ permalink raw reply related
* [PATCH 4/5] Add initial MPC8610 HPCD Kconfig and Makefiles.
From: Jon Loeliger @ 2007-10-03 20:09 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
From: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Xianghua Xiao <x.xiao@freescale.com>
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
---
arch/powerpc/platforms/86xx/Kconfig | 13 +++++++++++++
arch/powerpc/platforms/86xx/Makefile | 1 +
2 files changed, 14 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 685b2fb..21d1135 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -11,6 +11,12 @@ config MPC8641_HPCN
help
This option enables support for the MPC8641 HPCN board.
+config MPC8610_HPCD
+ bool "Freescale MPC8610 HPCD"
+ select DEFAULT_UIMAGE
+ help
+ This option enables support for the MPC8610 HPCD board.
+
endchoice
config MPC8641
@@ -19,3 +25,10 @@ config MPC8641
select PPC_UDBG_16550
select MPIC
default y if MPC8641_HPCN
+
+config MPC8610
+ bool
+ select FSL_PCI if PCI
+ select PPC_UDBG_16550
+ select MPIC
+ default y if MPC8610_HPCD
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 3376c77..c967063 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -4,3 +4,4 @@
obj-$(CONFIG_SMP) += mpc86xx_smp.o
obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
+obj-$(CONFIG_MPC8610_HPCD) += mpc8610_hpcd.o
--
1.5.3
^ permalink raw reply related
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