* Re: [PATCH 17/21] [POWERPC] Base support for 440SPe "Katmai" eval board
From: Stephen Rothwell @ 2007-12-22 0:21 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <20071221043938.9C15EDDFBF@ozlabs.org>
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On Fri, 21 Dec 2007 15:39:34 +1100 Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> +++ linux-merge/arch/powerpc/platforms/44x/katmai.c 2007-12-21 14:34:33.000000000 +1100
> +
> +static struct of_device_id katmai_of_bus[] = {
__initdata (preferably) or const, please.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
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^ permalink raw reply
* Re: [PATCH 10/21] [POWERPC] Base support for 440GX Taishan eval board
From: Stephen Rothwell @ 2007-12-22 0:12 UTC (permalink / raw)
To: Hugh Blemings; +Cc: linuxppc-dev
In-Reply-To: <20071221043932.C2FA1DDEDD@ozlabs.org>
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On Fri, 21 Dec 2007 15:39:28 +1100 Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> +++ linux-merge/arch/powerpc/platforms/44x/taishan.c 2007-12-21 14:20:04.000000000 +1100
> +
> +static struct of_device_id taishan_of_bus[] = {
__initdata (preferably) or const, please.
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
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^ permalink raw reply
* Re: [PATCH 3/4] [POWERPC] CPM2: implement GPIO API
From: Anton Vorontsov @ 2007-12-21 23:58 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev
In-Reply-To: <200712212216.32922.arnd@arndb.de>
On Fri, Dec 21, 2007 at 10:16:32PM +0100, Arnd Bergmann wrote:
> On Friday 21 December 2007, Anton Vorontsov wrote:
> >
> > +static spinlock_t cpm2_port_lock = __SPIN_LOCK_UNLOCKED(cpm2_port_lock);
>
> This needs to be
>
> static DEFINE_SPINLOCK(cpm2_port_lock);
These are equivalents.
#define DEFINE_SPINLOCK(x) spinlock_t x = __SPIN_LOCK_UNLOCKED(x)
> I think at least lockdep doesn't work the way you do it here.
Is it anyhow special regarding what exact macro is used?..
spinlocks.txt says:
SPIN_LOCK_UNLOCKED and RW_LOCK_UNLOCKED defeat lockdep state tracking and
are hence deprecated.
Please use DEFINE_SPINLOCK()/DEFINE_RWLOCK() or
__SPIN_LOCK_UNLOCKED()/__RW_LOCK_UNLOCKED() as appropriate for static
initialization.
-
..should be equivalent, though I prefer open-coded version, until
it fits 80 column width. ;-)
> > +int cpm2_init_par_io(void)
> > +{
> > + struct device_node *np;
> > + const u32 *num_ports;
> > +
> > + np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pario");
> > + if (!np)
> > + return -ENOENT;
> > +
> > + num_ports = of_get_property(np, "num-ports", NULL);
> > + if (!num_ports) {
> > + of_node_put(np);
> > + return -ENOENT;
> > + }
> > + cpm2_num_ports = *num_ports;
> > +
> > + np->data = &of_gpio_chip;
> > +
> > + return 0;
> > +}
>
> This function should also do the call to of_iomap, so you don't
> need to pull the address out of the cpm2_immr, which I believe
> we're trying to get rid of.
Yup, thanks!
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH 8/21] [POWERPC] EP405 boards support for arch/powerpc
From: Benjamin Herrenschmidt @ 2007-12-22 0:01 UTC (permalink / raw)
To: Stephen Rothwell; +Cc: linuxppc-dev
In-Reply-To: <20071222102424.bc96d03c.sfr@canb.auug.org.au>
On Sat, 2007-12-22 at 10:24 +1100, Stephen Rothwell wrote:
> > +++ linux-merge/arch/powerpc/boot/4xx.c 2007-12-21 14:19:46.000000000 +1100
> > @@ -179,13 +179,16 @@ void ibm40x_dbcr_reset(void)
> > #define EMAC_RESET 0x20000000
> > void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1)
> > {
> > - /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't do this for us */
> > + /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't
> > + * do this for us
> > + */
> > if (emac0)
> > *emac0 = EMAC_RESET;
> > if (emac1)
> > *emac1 = EMAC_RESET;
> >
> > mtdcr(DCRN_MAL0_CFG, MAL_RESET);
> > + while (mfdcr(DCRN_MAL0_CFG) & MAL_RESET) {};
>
> You need the {} or the ; but not both and please put them indented on the
> next line so that it is very clear that this is an empty loop.
Code was copy/pasted from somewhere else... we can always do a fixup
later.
> > + if (cpc0_cr0 & 0x80) {
> > + /* uart0 uses the external clock */
> > + uart0 = ser_clk;
> > + } else {
> > + uart0 = cpu / udiv;
> > + }
>
> The braces aren't really needed. (Yes, I noticed that you just moved the
> code here)
Yup :-)
> > + if (cpc0_cr0 & 0x40) {
> > + /* uart1 uses the external clock */
> > + uart1 = ser_clk;
> > + } else {
> > + uart1 = cpu / udiv;
> > + }
>
> And again.
I'd rather do cleanups separately. I won't send new patches until I'm
back from vacation so Josh, if you want to fix those little nits up,
feel free.
> > +++ linux-merge/arch/powerpc/platforms/40x/ep405.c 2007-12-21 14:19:46.000000000 +1100
> > +
> > +static struct of_device_id ep405_of_bus[] = {
>
> __initdata (preferably) or const
Ben.
^ permalink raw reply
* Re: Oops: Kernel access of bad area
From: Christian Kujau @ 2007-12-21 23:34 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Nathan Lynch
In-Reply-To: <20071220214705.GA28696@localdomain>
On Thu, 20 Dec 2007, Nathan Lynch wrote:
> Better to include the full stack trace in such reports,
Hm, I did not want to clutter the mail with all this stuff, but you're
right, in this case it would've made sense...
> So it looks like the kernel oopsed while firefox was dumping core,
> yuck. It's a real bug. Hopefully someone on the list can help...
As it's the first time this happened and I could not reproduce it so far
(the only thing I can reproduce is the ffox crash :)), I doubt it'll be
"fixable" somehow...
Thanks,
Christian.
--
BOFH excuse #247:
Due to Federal Budget problems we have been forced to cut back on the number of users able to access the system at one time. (namely none allowed....)
^ permalink raw reply
* Re: [PATCH 8/21] [POWERPC] EP405 boards support for arch/powerpc
From: Stephen Rothwell @ 2007-12-21 23:24 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <20071221043931.1A5CCDDEC0@ozlabs.org>
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Hi Ben,
Just a couple of trivial things.
On Fri, 21 Dec 2007 15:39:26 +1100 Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> +++ linux-merge/arch/powerpc/boot/4xx.c 2007-12-21 14:19:46.000000000 +1100
> @@ -179,13 +179,16 @@ void ibm40x_dbcr_reset(void)
> #define EMAC_RESET 0x20000000
> void ibm4xx_quiesce_eth(u32 *emac0, u32 *emac1)
> {
> - /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't do this for us */
> + /* Quiesce the MAL and EMAC(s) since PIBS/OpenBIOS don't
> + * do this for us
> + */
> if (emac0)
> *emac0 = EMAC_RESET;
> if (emac1)
> *emac1 = EMAC_RESET;
>
> mtdcr(DCRN_MAL0_CFG, MAL_RESET);
> + while (mfdcr(DCRN_MAL0_CFG) & MAL_RESET) {};
You need the {} or the ; but not both and please put them indented on the
next line so that it is very clear that this is an empty loop.
> + if (cpc0_cr0 & 0x80) {
> + /* uart0 uses the external clock */
> + uart0 = ser_clk;
> + } else {
> + uart0 = cpu / udiv;
> + }
The braces aren't really needed. (Yes, I noticed that you just moved the
code here)
> + if (cpc0_cr0 & 0x40) {
> + /* uart1 uses the external clock */
> + uart1 = ser_clk;
> + } else {
> + uart1 = cpu / udiv;
> + }
And again.
> +++ linux-merge/arch/powerpc/platforms/40x/ep405.c 2007-12-21 14:19:46.000000000 +1100
> +
> +static struct of_device_id ep405_of_bus[] = {
__initdata (preferably) or const
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
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^ permalink raw reply
* Re: [PATCH 18/21] [POWERPC] bamboo: remove bogus "ranges" property in EBC node
From: Josh Boyer @ 2007-12-21 22:08 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev
In-Reply-To: <1198271815.6737.4.camel@pasglop>
On Sat, 22 Dec 2007 08:16:55 +1100
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> On Fri, 2007-12-21 at 06:09 -0600, Josh Boyer wrote:
> > On Fri, 21 Dec 2007 15:39:35 +1100
> > Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> >
> > > This removes a bogus empty "ranges" property in the EBC device node
> > > of the Bamboo board device-tree.
> > >
> > > The "ranges" property will be created by the boot wrapper, there is
> > > no need to have an empty property there, and that causes recent
> > > dtc to complain.
> >
> > The wrapper doesn't do anything with EBC for bamboo because the EBC
> > stuff is a nightmare on this board. The patch can stand, but I'll
> > fixup the comments in the changelog.
>
> The wrapper could still create ranges for the chip select settings no ?
It could. It doesn't though. Perhaps our interpretation of "will be
created" differed.
> In any case, empty "ranges" is bogus.
Correct. Which is why I said I'd just edit the changelog :).
josh
^ permalink raw reply
* Re: [DTC PATCH 1/2] Add yyerrorf() for formatted error messages.
From: Scott Wood @ 2007-12-21 21:28 UTC (permalink / raw)
To: jdl, linuxppc-dev, u-boot-users
In-Reply-To: <20071221000439.GC2665@localhost.localdomain>
On Fri, Dec 21, 2007 at 11:04:39AM +1100, David Gibson wrote:
> On Thu, Dec 20, 2007 at 10:48:23AM -0600, Scott Wood wrote:
> > Signed-off-by: Scott Wood <scottwood@freescale.com>
>
> No need for a new function. If yyerror() is defined as a varargs
> function it's still compatible with bison's built-in usage.
Not if yyerror() is called with a percent symbol in the string, which
looks possible if a percent token is added and verbose syntax errors are
enabled.
-Scott
^ permalink raw reply
* Re: Enable RTC for Ebony and Walnut
From: Olof Johansson @ 2007-12-21 21:29 UTC (permalink / raw)
To: Josh Boyer, Paul Mackerras, linuxppc-dev
In-Reply-To: <20071221022130.GI2665@localhost.localdomain>
Hi,
On Fri, Dec 21, 2007 at 01:21:30PM +1100, David Gibson wrote:
> Index: working-2.6/arch/powerpc/platforms/Kconfig
> ===================================================================
> --- working-2.6.orig/arch/powerpc/platforms/Kconfig 2007-12-10 10:52:44.000000000 +1100
> +++ working-2.6/arch/powerpc/platforms/Kconfig 2007-12-21 13:11:34.000000000 +1100
> @@ -315,6 +315,9 @@ config FSL_ULI1575
> config CPM
> bool
>
> +config OF_RTC
> + bool
> +
New config options should have descriptions, even if they're silent
ones.
Thanks,
-Olof
^ permalink raw reply
* Re: [PATCH 4/4] PowerPC: Add PCI node to 440GRx Rainier DTS.
From: Benjamin Herrenschmidt @ 2007-12-21 21:21 UTC (permalink / raw)
To: Valentine Barshak; +Cc: linuxppc-dev
In-Reply-To: <20071221162708.GA1724@ru.mvista.com>
On Fri, 2007-12-21 at 19:27 +0300, Valentine Barshak wrote:
> + /* All PCI interrupts are routed to IRQ 67 */
> + interrupt-map-mask = <0000 0 0 0>;
> + interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
> + };
Same question as for Sequoia...
Ben.
^ permalink raw reply
* Re: [PATCH 3/4] PowerPC: Add PCI entry to 440EPx Sequoia DTS.
From: Benjamin Herrenschmidt @ 2007-12-21 21:21 UTC (permalink / raw)
To: Valentine Barshak; +Cc: linuxppc-dev
In-Reply-To: <20071221162601.GA1700@ru.mvista.com>
On Fri, 2007-12-21 at 19:26 +0300, Valentine Barshak wrote:
> +
> + /* All PCI interrupts are routed to IRQ 67 */
> + interrupt-map-mask = <0000 0 0 0>;
> + interrupt-map = < 0000 0 0 0 &UIC2 3 8 >;
> + };
> };
Wow, all 4 lines of all slots ?
Ben.
^ permalink raw reply
* Re: [PATCH 1/3] [POWERPC] FSL UPM: routines to manage FSL UPMs
From: Olof Johansson @ 2007-12-21 21:28 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071221203925.GA4829@localhost.localdomain>
On Fri, Dec 21, 2007 at 11:39:25PM +0300, Anton Vorontsov wrote:
> Here are few routines needed to manage FSL UPMs. It doesn't include
> UPM programming, yet. So far u-boot manages to program everything.
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> ---
> arch/powerpc/Kconfig | 3 +
> arch/powerpc/sysdev/Makefile | 1 +
> arch/powerpc/sysdev/fsl_upm.c | 65 +++++++++++++++++++++++++++++
> include/asm-powerpc/fsl_upm.h | 90 +++++++++++++++++++++++++++++++++++++++++
> 4 files changed, 159 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/sysdev/fsl_upm.c
> create mode 100644 include/asm-powerpc/fsl_upm.h
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index a4fa173..aab8106 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -463,6 +463,9 @@ config FSL_PCI
> bool
> select PPC_INDIRECT_PCI
>
> +config FSL_UPM
> + bool
Please describe new config options, even if they're silent ones.
-Olof
^ permalink raw reply
* Re: [PATCH 1/4] [POWERPC] qe_lib and users: get rid of device_type and model
From: Olof Johansson @ 2007-12-21 21:25 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071221202054.GA4502@localhost.localdomain>
Hi,
On Fri, Dec 21, 2007 at 11:20:54PM +0300, Anton Vorontsov wrote:
> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
> index e6c63a5..a152bf8 100644
> --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
> +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
> @@ -94,7 +94,8 @@ static void __init mpc85xx_mds_setup_arch(void)
> #endif
>
> #ifdef CONFIG_QUICC_ENGINE
> - if ((np = of_find_node_by_name(NULL, "qe")) != NULL) {
> + np = of_find_node_by_name(NULL, "fsl,qe");
> + if (np) {
That won't work. Did you mean of_find_compatible_node()? If so, you
still need to fall back to looking up by name for older device trees
that don't have the compatible field.
-Olof
^ permalink raw reply
* Re: [PATCH 0/4] PowerPC: implement GPIO API
From: Grant Likely @ 2007-12-21 21:17 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071221210445.GA5190@localhost.localdomain>
On 12/21/07, Anton Vorontsov <avorontsov@ru.mvista.com> wrote:
> As I've probably said once already: if there are plans to build single
> kernel with QE+CPM1+CPM2 inside tomorrow -- then of course, I'd better
> wait.
>
> But if these plans are distant enough, I see no reason why we can't
> enjoy of current API.
Oh, I'm not saying don't enjoy it. :-) I'm just saying keep it out
of mainline. I've got a bunch of Virtex stuff that falls into that
category. Those who are interested can pick the non mainlined patches
out of my git tree.
I suggest doing the same with the GPIO support. Either that or do our
own simple ppc specific GPIO multiplexer until the common stuff has
its act together. :-) We can always migrate over later.
I don't want to see more barriers added to prevent all of 8xxx going
multiplatform.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* Re: [PATCH 18/21] [POWERPC] bamboo: remove bogus "ranges" property in EBC node
From: Benjamin Herrenschmidt @ 2007-12-21 21:16 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <20071221060921.4ae5bc20@zod.rchland.ibm.com>
On Fri, 2007-12-21 at 06:09 -0600, Josh Boyer wrote:
> On Fri, 21 Dec 2007 15:39:35 +1100
> Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> > This removes a bogus empty "ranges" property in the EBC device node
> > of the Bamboo board device-tree.
> >
> > The "ranges" property will be created by the boot wrapper, there is
> > no need to have an empty property there, and that causes recent
> > dtc to complain.
>
> The wrapper doesn't do anything with EBC for bamboo because the EBC
> stuff is a nightmare on this board. The patch can stand, but I'll
> fixup the comments in the changelog.
The wrapper could still create ranges for the chip select settings no ?
In any case, empty "ranges" is bogus.
Ben.
^ permalink raw reply
* Re: [PATCH 3/4] [POWERPC] CPM2: implement GPIO API
From: Arnd Bergmann @ 2007-12-21 21:16 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20071221203123.GC4633@localhost.localdomain>
On Friday 21 December 2007, Anton Vorontsov wrote:
>
> +static spinlock_t cpm2_port_lock = __SPIN_LOCK_UNLOCKED(cpm2_port_lock);
This needs to be
static DEFINE_SPINLOCK(cpm2_port_lock);
I think at least lockdep doesn't work the way you do it here.
> +int cpm2_init_par_io(void)
> +{
> + struct device_node *np;
> + const u32 *num_ports;
> +
> + np = of_find_compatible_node(NULL, NULL, "fsl,cpm2-pario");
> + if (!np)
> + return -ENOENT;
> +
> + num_ports = of_get_property(np, "num-ports", NULL);
> + if (!num_ports) {
> + of_node_put(np);
> + return -ENOENT;
> + }
> + cpm2_num_ports = *num_ports;
> +
> + np->data = &of_gpio_chip;
> +
> + return 0;
> +}
This function should also do the call to of_iomap, so you don't
need to pull the address out of the cpm2_immr, which I believe
we're trying to get rid of.
Arnd <><
^ permalink raw reply
* Re: [PATCH 1/21] [POWERPC] Reworking machine check handling and Fix 440/440A
From: Benjamin Herrenschmidt @ 2007-12-21 21:16 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <20071221060136.611eb899@zod.rchland.ibm.com>
On Fri, 2007-12-21 at 06:01 -0600, Josh Boyer wrote:
> On Fri, 21 Dec 2007 15:39:21 +1100
> Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
>
> > Index: linux-merge/include/asm-ppc/reg_booke.h
> > ===================================================================
> > --- linux-merge.orig/include/asm-ppc/reg_booke.h 2007-09-28 11:42:10.000000000 +1000
> > +++ linux-merge/include/asm-ppc/reg_booke.h 2007-12-20 11:35:40.000000000 +1100
> > @@ -207,7 +207,7 @@
> > #define CCR1_TCS 0x00000080 /* Timer Clock Select */
> >
> > /* Bit definitions for the MCSR. */
> > -#ifdef CONFIG_440A
> > +#ifdef CONFIG_44x
>
> Should be #ifdef CONFIG_4xx as I pointed out last time. I'll fix it
> when I commit.
Ah weird, I though I fixed it... I must have fixed powerpc and not ppc.
Ben.
^ permalink raw reply
* Re: [PATCH POWERPC] i2c: adds support for i2c bus on Frescale CPM1/CPM2 controllers
From: Vitaly Bordug @ 2007-12-21 21:11 UTC (permalink / raw)
To: Jochen Friedrich; +Cc: Scott Wood, linuxppc-dev, khali, linux-kernel, i2c
In-Reply-To: <476C15BC.3090807@scram.de>
On Fri, 21 Dec 2007 20:36:28 +0100
Jochen Friedrich wrote:
> Using the port of 2.4 code from Vitaly Bordug
> <vitb@kernel.crashing.org> and the actual algorithm used by the i2c
> driver of the DBox code on cvs.tuxboc.org from Tmbinc, Gillem
> (htoa@gmx.net). Renamed i2c-rpx.c and i2c-algo-8xx.c to i2c-cpm.c and
> converted the driver to an of_platform_driver.
>
I had an attempt a while ago to do this but haven't had enough time to get it completed, so
I am glad to see it finally picked up. There was some sort of discussion that time, you seem to have some of those points
addressed but something not, please
check: http://lkml.org/lkml/2007/5/8/45
(for instance, cpm_i2c_shutdown() and i2c_cpm_del_bus() are void because they cant' fail)
Also, why this was directed to Scott? This is lm-sensors stuff and is
Jean Delvare <khali@linux-fr.org> material...
--
Sincerely, Vitaly
^ permalink raw reply
* Re: [PATCH 0/4] PowerPC: implement GPIO API
From: Anton Vorontsov @ 2007-12-21 21:04 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40712211250l2645d34dr45c5be2bf1c9006d@mail.gmail.com>
On Fri, Dec 21, 2007 at 01:50:10PM -0700, Grant Likely wrote:
> On 12/21/07, Anton Vorontsov <avorontsov@ru.mvista.com> wrote:
> > Also, in the upcoming kernels, there will be GPIOLIB[1] addition to
> > the generic GPIO API, to support off-chip GPIO expanders (like MFDs
> > on I2C/LBC). But so far we support on-chip GPIOs only, with single
> > controller built-in.
> >
> > Changes since RFC:
> > - Implemented #gpio-cells handling;
> > - Per-bank spinlocks removed;
> > - Added a patch which implements GPIO API for CPM1;
> > - Few minor fixes.
>
> Also need to add documentation to booting-without-of.txt.
>
> In general this looks like a good direction, but I do not like the
> hard linking for QE and CPM gpios to the 'top level' gpio API. I
> think I'd prefer this stuff to stay out of mainline until the gpiolib
Well, generally I'm okay to wait for gpiolib. Though...
> stuff gets merged (which should be soon IIRC).
^^^^ I doubt about that. :-)
I'm looking after gpiolib development (and, well, I also partipiated
in the discussion of earlier versions with former name "gpiodev") for
almost a _year_.
And they're still arguing about fluffy details of implementation.. :-/
As I've probably said once already: if there are plans to build single
kernel with QE+CPM1+CPM2 inside tomorrow -- then of course, I'd better
wait.
But if these plans are distant enough, I see no reason why we can't
enjoy of current API.
Thanks!
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH 0/4] PowerPC: implement GPIO API
From: Grant Likely @ 2007-12-21 20:50 UTC (permalink / raw)
To: avorontsov; +Cc: linuxppc-dev
In-Reply-To: <20071221202824.GA4607@localhost.localdomain>
On 12/21/07, Anton Vorontsov <avorontsov@ru.mvista.com> wrote:
> Also, in the upcoming kernels, there will be GPIOLIB[1] addition to
> the generic GPIO API, to support off-chip GPIO expanders (like MFDs
> on I2C/LBC). But so far we support on-chip GPIOs only, with single
> controller built-in.
>
> Changes since RFC:
> - Implemented #gpio-cells handling;
> - Per-bank spinlocks removed;
> - Added a patch which implements GPIO API for CPM1;
> - Few minor fixes.
Also need to add documentation to booting-without-of.txt.
In general this looks like a good direction, but I do not like the
hard linking for QE and CPM gpios to the 'top level' gpio API. I
think I'd prefer this stuff to stay out of mainline until the gpiolib
stuff gets merged (which should be soon IIRC).
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
grant.likely@secretlab.ca
(403) 399-0195
^ permalink raw reply
* [PATCH 3/3] [POWERPC] MPC8360E-RDK: add support for NAND on UPM
From: Anton Vorontsov @ 2007-12-21 20:41 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <20071221203552.GA4738@localhost.localdomain>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/boot/dts/mpc836x_rdk.dts | 19 +++++++++++++++++--
arch/powerpc/platforms/83xx/Kconfig | 1 +
2 files changed, 18 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
index 3f8d2b0..43420b1 100644
--- a/arch/powerpc/boot/dts/mpc836x_rdk.dts
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -126,7 +126,8 @@
reg = <0x700 0x100>;
};
- par_io@1400 {
+ qe_pio: par_io@1400 {
+ #gpio-cells = <2>;
compatible = "fsl,qe-pario";
reg = <0x1400 0x100>;
num-ports = <7>;
@@ -292,7 +293,8 @@
compatible = "fsl,mpc8360-localbus",
"fsl,pq2pro-localbus";
reg = <0xe0005000 0xd8>;
- ranges = <0 0 0xff800000 0x800000>;
+ ranges = <0 0 0xff800000 0x800000
+ 1 0 0x60000000 0x001000>;
nor-flash@0,0 {
compatible = "intel,PC28F640P30T85", "cfi-flash";
@@ -300,6 +302,19 @@
bank-width = <2>;
device-width = <1>;
};
+
+ nand-flash@1,0 {
+ compatible = "stmicro,NAND512W3A2BN6E", "fsl,upm-nand";
+ reg = <1 0 1>;
+ width = <1>;
+ upm = "A";
+ upm-addr-offset = <16>;
+ upm-cmd-offset = <8>;
+ gpios = <4 18>;
+ gpio-parent = <&qe_pio>;
+ wait-pattern;
+ wait-write;
+ };
};
pci0: pci@e0008500 {
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 0d5a87c..723a8fe 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -88,6 +88,7 @@ config PPC_MPC836x
bool
select PPC_UDBG_16550
select PPC_INDIRECT_PCI
+ select FSL_UPM
default y if MPC836x_MDS || MPC836x_RDK
config PPC_MPC837x
--
1.5.2.2
^ permalink raw reply related
* [PATCH 2/3] [POWERPC][NAND] FSL UPM NAND driver
From: Anton Vorontsov @ 2007-12-21 20:41 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, linux-mtd
In-Reply-To: <20071221203552.GA4738@localhost.localdomain>
It's using FSL UPM infrastructure. So far only 8 bit accessors
are implemented.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
drivers/mtd/nand/Kconfig | 7 +
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/fsl_upm.c | 313 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 321 insertions(+), 0 deletions(-)
create mode 100644 drivers/mtd/nand/fsl_upm.c
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 246d451..91b448f 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -306,4 +306,11 @@ config MTD_ALAUDA
These two (and possibly other) Alauda-based cardreaders for
SmartMedia and xD allow raw flash access.
+config MTD_NAND_FSL_UPM
+ tristate "MTD driver for NAND on Freescale UPM"
+ depends on MTD_NAND && FSL_UPM && GENERIC_GPIO
+ help
+ Enables support for NAND Flash wired to Freescale processors'
+ localbus with pre-programmed User-Programmable Machine.
+
endif # MTD_NAND
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 3ad6c01..d553ea3 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -29,5 +29,6 @@ obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o
obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o
obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o
obj-$(CONFIG_MTD_ALAUDA) += alauda.o
+obj-$(CONFIG_MTD_NAND_FSL_UPM) += fsl_upm.o
nand-objs := nand_base.o nand_bbt.o
diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c
new file mode 100644
index 0000000..ac26199
--- /dev/null
+++ b/drivers/mtd/nand/fsl_upm.c
@@ -0,0 +1,313 @@
+/*
+ * Freescale UPM NAND driver.
+ *
+ * Copyright (c) 2007 MontaVista Software, Inc.
+ * Copyright (c) 2007 Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/nand_ecc.h>
+#include <linux/mtd/partitions.h>
+#include <linux/mtd/mtd.h>
+#include <linux/of_platform.h>
+#include <linux/io.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <asm/fsl_upm.h>
+
+struct upm_data {
+ struct device *dev;
+ struct mtd_info mtd;
+ struct nand_chip chip;
+ int last_ctrl;
+#ifdef CONFIG_MTD_PARTITIONS
+ struct mtd_partition *parts;
+#endif
+
+ struct fsl_upm upm;
+
+ int width;
+ int upm_addr_offset;
+ int upm_cmd_offset;
+ void __iomem *io_base;
+ int rnb_gpio;
+ const u32 *wait_pattern;
+ const u32 *wait_write;
+ int chip_delay;
+};
+
+#define to_upm_data(mtd) container_of(mtd, struct upm_data, mtd)
+
+static int upm_chip_ready(struct mtd_info *mtd)
+{
+ struct upm_data *ud = to_upm_data(mtd);
+
+ if (gpio_get_value(ud->rnb_gpio))
+ return 1;
+
+ dev_vdbg(ud->dev, "busy\n");
+ return 0;
+}
+
+static void upm_wait_rnb(struct upm_data *ud)
+{
+ int cnt = 1000000;
+
+ if (ud->rnb_gpio >= 0) {
+ while (--cnt && !upm_chip_ready(&ud->mtd))
+ cpu_relax();
+ }
+
+ if (!cnt)
+ dev_err(ud->dev, "tired waiting for RNB\n");
+}
+
+static void upm_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+ struct upm_data *ud = to_upm_data(mtd);
+
+ if (!(ctrl & ud->last_ctrl)) {
+ fsl_upm_end_pattern(&ud->upm);
+
+ if (cmd == NAND_CMD_NONE)
+ return;
+
+ ud->last_ctrl = ctrl & (NAND_ALE | NAND_CLE);
+ }
+
+ if (ctrl & NAND_CTRL_CHANGE) {
+ if (ctrl & NAND_ALE)
+ fsl_upm_start_pattern(&ud->upm, ud->upm_addr_offset);
+ else if (ctrl & NAND_CLE)
+ fsl_upm_start_pattern(&ud->upm, ud->upm_cmd_offset);
+ }
+
+ fsl_upm_run_pattern(&ud->upm, ud->io_base, ud->width, cmd);
+
+ if (ud->wait_pattern)
+ upm_wait_rnb(ud);
+}
+
+static uint8_t upm_read_byte(struct mtd_info *mtd)
+{
+ struct upm_data *ud = to_upm_data(mtd);
+
+ return in_8(ud->chip.IO_ADDR_R);
+}
+
+static void upm_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ struct upm_data *ud = to_upm_data(mtd);
+ int i;
+
+ for (i = 0; i < len; i++)
+ buf[i] = in_8(ud->chip.IO_ADDR_R);
+}
+
+static void upm_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
+{
+ struct upm_data *ud = to_upm_data(mtd);
+ int i;
+
+ for (i = 0; i < len; i++) {
+ out_8(ud->chip.IO_ADDR_W, buf[i]);
+ if (ud->wait_write)
+ upm_wait_rnb(ud);
+ }
+}
+
+static int __devinit upm_chip_init(struct upm_data *ud)
+{
+ int ret;
+#ifdef CONFIG_MTD_PARTITIONS
+ static const char *part_types[] = { "cmdlinepart", NULL, };
+#endif
+
+ ud->chip.IO_ADDR_R = ud->io_base;
+ ud->chip.IO_ADDR_W = ud->io_base;
+ ud->chip.cmd_ctrl = upm_cmd_ctrl;
+ ud->chip.chip_delay = ud->chip_delay;
+ ud->chip.read_byte = upm_read_byte;
+ ud->chip.read_buf = upm_read_buf;
+ ud->chip.write_buf = upm_write_buf;
+ ud->chip.ecc.mode = NAND_ECC_SOFT;
+
+ if (ud->rnb_gpio >= 0)
+ ud->chip.dev_ready = upm_chip_ready;
+
+ ud->mtd.priv = &ud->chip;
+ ud->mtd.owner = THIS_MODULE;
+
+ ret = nand_scan(&ud->mtd, 1);
+ if (ret)
+ return ret;
+
+ ud->mtd.name = ud->dev->bus_id;
+
+#ifdef CONFIG_MTD_PARTITIONS
+ ret = parse_mtd_partitions(&ud->mtd, part_types, &ud->parts, 0);
+ if (ret > 0)
+ return add_mtd_partitions(&ud->mtd, ud->parts, ret);
+#endif
+ return add_mtd_device(&ud->mtd);
+}
+
+static int __devinit upm_chip_probe(struct of_device *ofdev,
+ const struct of_device_id *ofid)
+{
+ struct upm_data *ud;
+ struct resource io_res;
+ const u32 *prop;
+ int ret;
+ int size;
+
+ ud = kzalloc(sizeof(*ud), GFP_KERNEL);
+ if (!ud)
+ return -ENOMEM;
+
+ ret = of_address_to_resource(ofdev->node, 0, &io_res);
+ if (ret) {
+ dev_err(&ofdev->dev, "can't get IO base\n");
+ goto err;
+ }
+
+ prop = of_get_property(ofdev->node, "width", &size);
+ if (!prop || size != sizeof(u32)) {
+ dev_err(&ofdev->dev, "can't get chip width\n");
+ goto err;
+ }
+ ud->width = *prop * 8;
+
+ prop = of_get_property(ofdev->node, "upm", &size);
+ if (!prop || size < 1) {
+ dev_err(&ofdev->dev, "can't get UPM to use\n");
+ ret = -EINVAL;
+ goto err;
+ }
+
+ ret = fsl_upm_get_for(ofdev->node, (const char *)prop, &ud->upm);
+ if (ret) {
+ dev_err(&ofdev->dev, "can't get FSL UPM\n");
+ goto err;
+ }
+
+ prop = of_get_property(ofdev->node, "upm-addr-offset", &size);
+ if (!prop || size != sizeof(u32)) {
+ dev_err(&ofdev->dev, "can't get UPM address offset\n");
+ ret = -EINVAL;
+ goto err;
+ }
+ ud->upm_addr_offset = *prop;
+
+ prop = of_get_property(ofdev->node, "upm-cmd-offset", &size);
+ if (!prop || size != sizeof(u32)) {
+ dev_err(&ofdev->dev, "can't get UPM command offset\n");
+ ret = -EINVAL;
+ goto err;
+ }
+ ud->upm_cmd_offset = *prop;
+
+ ud->rnb_gpio = of_get_gpio(ofdev->node, 0);
+ if (ud->rnb_gpio >= 0) {
+ ret = gpio_request(ud->rnb_gpio, ofdev->dev.bus_id);
+ if (ret) {
+ dev_err(&ofdev->dev, "can't request RNB gpio\n");
+ goto err;
+ }
+ gpio_direction_input(ud->rnb_gpio);
+ } else if (ud->rnb_gpio == -EINVAL) {
+ dev_err(&ofdev->dev, "specified RNB gpio is invalid\n");
+ goto err;
+ }
+
+ ud->io_base = devm_ioremap_nocache(&ofdev->dev, io_res.start,
+ io_res.end - io_res.start + 1);
+ if (!ud->io_base) {
+ ret = -ENOMEM;
+ goto err;
+ }
+
+ ud->dev = &ofdev->dev;
+ ud->last_ctrl = NAND_CLE;
+ ud->wait_pattern = of_get_property(ofdev->node, "wait-pattern", NULL);
+ ud->wait_write = of_get_property(ofdev->node, "wait-write", NULL);
+
+ prop = of_get_property(ofdev->node, "chip-delay", NULL);
+ if (prop)
+ ud->chip_delay = *prop;
+ else
+ ud->chip_delay = 50;
+
+ ret = upm_chip_init(ud);
+ if (ret)
+ goto err;
+
+ dev_set_drvdata(&ofdev->dev, ud);
+
+ return 0;
+
+err:
+ if (fsl_upm_got(&ud->upm))
+ fsl_upm_free(&ud->upm);
+
+ if (ud->rnb_gpio >= 0)
+ gpio_free(ud->rnb_gpio);
+
+ kfree(ud);
+
+ return ret;
+}
+
+static int __devexit upm_chip_remove(struct of_device *ofdev)
+{
+ struct upm_data *ud = dev_get_drvdata(&ofdev->dev);
+
+ nand_release(&ud->mtd);
+
+ fsl_upm_free(&ud->upm);
+
+ if (ud->rnb_gpio >= 0)
+ gpio_free(ud->rnb_gpio);
+
+ kfree(ud);
+
+ return 0;
+}
+
+static struct of_device_id of_upm_nand_match[] = {
+ { .compatible = "fsl,upm-nand" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, of_upm_nand_match);
+
+static struct of_platform_driver of_upm_chip_driver = {
+ .name = "fsl_upm_nand",
+ .match_table = of_upm_nand_match,
+ .probe = upm_chip_probe,
+ .remove = __devexit_p(upm_chip_remove),
+};
+
+static int __init upm_nand_init(void)
+{
+ return of_register_platform_driver(&of_upm_chip_driver);
+}
+
+static void __exit upm_nand_exit(void)
+{
+ of_unregister_platform_driver(&of_upm_chip_driver);
+}
+
+module_init(upm_nand_init);
+module_exit(upm_nand_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
+MODULE_DESCRIPTION("Driver for NAND chips working through Freescale "
+ "LocalBus User-Programmable Machine");
--
1.5.2.2
^ permalink raw reply related
* [PATCH 1/3] [POWERPC] FSL UPM: routines to manage FSL UPMs
From: Anton Vorontsov @ 2007-12-21 20:39 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <20071221203552.GA4738@localhost.localdomain>
Here are few routines needed to manage FSL UPMs. It doesn't include
UPM programming, yet. So far u-boot manages to program everything.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/Kconfig | 3 +
arch/powerpc/sysdev/Makefile | 1 +
arch/powerpc/sysdev/fsl_upm.c | 65 +++++++++++++++++++++++++++++
include/asm-powerpc/fsl_upm.h | 90 +++++++++++++++++++++++++++++++++++++++++
4 files changed, 159 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/sysdev/fsl_upm.c
create mode 100644 include/asm-powerpc/fsl_upm.h
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index a4fa173..aab8106 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -463,6 +463,9 @@ config FSL_PCI
bool
select PPC_INDIRECT_PCI
+config FSL_UPM
+ bool
+
# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
config MCA
bool
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 99a77d7..98dbfdd 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_U3_DART) += dart_iommu.o
obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
obj-$(CONFIG_FSL_SOC) += fsl_soc.o
obj-$(CONFIG_FSL_PCI) += fsl_pci.o
+obj-$(CONFIG_FSL_UPM) += fsl_upm.o
obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/
diff --git a/arch/powerpc/sysdev/fsl_upm.c b/arch/powerpc/sysdev/fsl_upm.c
new file mode 100644
index 0000000..6e35bf4
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_upm.c
@@ -0,0 +1,65 @@
+/*
+ * Freescale UPM routines.
+ *
+ * Copyright (c) 2007 MontaVista Software, Inc.
+ * Copyright (c) 2007 Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <asm/fsl_upm.h>
+
+spinlock_t upm_lock = __SPIN_LOCK_UNLOCKED(upm_lock);
+unsigned long upm_lock_flags;
+
+int fsl_upm_get_for(struct device_node *node, const char *name,
+ struct fsl_upm *upm)
+{
+ int ret;
+ struct device_node *lbus;
+ struct resource lbc_res;
+ ptrdiff_t mxmr_offs;
+
+ lbus = of_get_parent(node);
+ if (!lbus) {
+ pr_err("FSL UPM: can't get parent local bus node\n");
+ return -ENOENT;
+ }
+
+ ret = of_address_to_resource(lbus, 0, &lbc_res);
+ if (ret) {
+ pr_err("FSL UPM: can't get parent local bus base\n");
+ return -ENOMEM;
+ }
+
+ switch (name[0]) {
+ case 'A':
+ mxmr_offs = LBC_MAMR;
+ break;
+ case 'B':
+ mxmr_offs = LBC_MBMR;
+ break;
+ case 'C':
+ mxmr_offs = LBC_MCMR;
+ break;
+ default:
+ pr_err("FSL UPM: unknown UPM requested\n");
+ return -EINVAL;
+ break;
+ }
+
+ upm->lbc_base = ioremap_nocache(lbc_res.start,
+ lbc_res.end - lbc_res.start + 1);
+ if (!upm->lbc_base)
+ return -ENOMEM;
+
+ upm->mxmr = upm->lbc_base + mxmr_offs;
+ upm->mar = upm->lbc_base + LBC_MAR;
+
+ return 0;
+}
diff --git a/include/asm-powerpc/fsl_upm.h b/include/asm-powerpc/fsl_upm.h
new file mode 100644
index 0000000..fe5a5d9
--- /dev/null
+++ b/include/asm-powerpc/fsl_upm.h
@@ -0,0 +1,90 @@
+/*
+ * Freescale UPM routines.
+ *
+ * Copyright (c) 2007 MontaVista Software, Inc.
+ * Copyright (c) 2007 Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __ASM_POWERPC_FSL_UPM
+#define __ASM_POWERPC_FSL_UPM
+
+#include <linux/spinlock.h>
+#include <asm/io.h>
+
+#define LBC_MAR 0x68
+#define LBC_MAMR 0x70
+#define LBC_MBMR 0x74
+#define LBC_MCMR 0x78
+
+#define LBC_MXMR_RUNP 0x30000000
+
+struct fsl_upm {
+ void __iomem *lbc_base;
+ void __iomem *mxmr;
+ void __iomem *mar;
+};
+
+extern spinlock_t upm_lock;
+extern unsigned long upm_lock_flags;
+
+extern int fsl_upm_get_for(struct device_node *node, const char *name,
+ struct fsl_upm *upm);
+
+static inline void fsl_upm_free(struct fsl_upm *upm)
+{
+ iounmap(upm->lbc_base);
+ upm->lbc_base = NULL;
+}
+
+static inline int fsl_upm_got(struct fsl_upm *upm)
+{
+ return !!upm->lbc_base;
+}
+
+static inline void fsl_upm_start_pattern(struct fsl_upm *upm, u32 pat_offset)
+{
+ spin_lock_irqsave(&upm_lock, upm_lock_flags);
+
+ out_be32(upm->mxmr, LBC_MXMR_RUNP | pat_offset);
+}
+
+static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
+{
+ out_be32(upm->mxmr, 0x0);
+
+ while (in_be32(upm->mxmr) != 0x0)
+ cpu_relax();
+
+ spin_unlock_irqrestore(&upm_lock, upm_lock_flags);
+}
+
+static inline int fsl_upm_run_pattern(struct fsl_upm *upm,
+ void __iomem *io_base,
+ int width, u32 cmd)
+{
+ out_be32(upm->mar, cmd << (32 - width));
+
+ switch (width) {
+ case 8:
+ out_8(io_base, 0x0);
+ break;
+ case 16:
+ out_be16(io_base, 0x0);
+ break;
+ case 32:
+ out_be32(io_base, 0x0);
+ break;
+ default:
+ return -EINVAL;
+ break;
+ }
+
+ return 0;
+}
+
+#endif /* __ASM_POWERPC_FSL_UPM */
--
1.5.2.2
^ permalink raw reply related
* [PATCH 0/3] fsl upm, nand driver and MPC8360E-RDK as its first user
From: Anton Vorontsov @ 2007-12-21 20:35 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
Hi all,
Here is the FSL UPM infrastructure and FSL UPM NAND driver which is
using it. This patchset depends on GPIO API.
Changes since RFC:
- Lockless variant removed;
- Implemented "width" property;
- Few cosmetic changes.
Thanks,
--
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2
^ permalink raw reply
* [PATCH 4/4] [POWERPC] CPM1: implement GPIO API
From: Anton Vorontsov @ 2007-12-21 20:34 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <20071221202824.GA4607@localhost.localdomain>
From: Jochen Friedrich <jochen@scram.de>
Signed-off-by: Jochen Friedrich <jochen@scram.de>
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
Jochen, I kept your Signed-off-by, though this isn't your original
patch. Hope you're okay with it. I also hope you'll test it. ;-)
arch/powerpc/platforms/8xx/Kconfig | 1 +
arch/powerpc/sysdev/commproc.c | 178 +++++++++++++++++++++++++++++++++++-
2 files changed, 178 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index 91fbe42..6962914 100644
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -4,6 +4,7 @@ config FADS
config CPM1
bool
select CPM
+ select GENERIC_GPIO
choice
prompt "8xx Machine Type"
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index 621bc6c..8aea29c 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -27,6 +27,7 @@
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
+#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
@@ -36,6 +37,7 @@
#include <asm/8xx_immap.h>
#include <asm/commproc.h>
#include <asm/io.h>
+#include <asm/gpio.h>
#include <asm/tlbflush.h>
#include <asm/rheap.h>
#include <asm/prom.h>
@@ -56,6 +58,39 @@ static cpic8xx_t __iomem *cpic_reg;
static struct irq_host *cpm_pic_host;
+static spinlock_t cpm1_port_lock = __SPIN_LOCK_UNLOCKED(cpm1_port_lock);
+static int cpm1_num_ports;
+
+static int par_io_xlate(struct device_node *np, int index)
+{
+ return __of_parse_gpio_bank_pin(np, index, 32, cpm1_num_ports);
+}
+
+static struct of_gpio_chip of_gpio_chip = {
+ .xlate = par_io_xlate,
+};
+
+int cpm_init_par_io(void)
+{
+ struct device_node *np;
+ const u32 *num_ports;
+
+ np = of_find_node_by_name(NULL, "fsl,cpm1-pario");
+ if (!np)
+ return -ENOENT;
+
+ num_ports = of_get_property(np, "num-ports", NULL);
+ if (!num_ports) {
+ of_node_put(np);
+ return -ENOENT;
+ }
+ cpm1_num_ports = *num_ports;
+
+ np->data = &of_gpio_chip;
+
+ return 0;
+}
+
static void cpm_mask_irq(unsigned int irq)
{
unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
@@ -199,6 +234,7 @@ end:
void __init cpm_reset(void)
{
sysconf8xx_t __iomem *siu_conf;
+ int ret;
mpc8xx_immr = ioremap(get_immrbase(), 0x4000);
if (!mpc8xx_immr) {
@@ -238,6 +274,10 @@ void __init cpm_reset(void)
/* Reclaim the DP memory for our use. */
m8xx_cpm_dpinit();
#endif
+
+ ret = cpm_init_par_io();
+ if (ret)
+ pr_warning("CPM PIO not initialized!\n");
}
static DEFINE_SPINLOCK(cmd_lock);
@@ -441,7 +481,7 @@ struct cpm_ioport16 {
};
struct cpm_ioport32 {
- __be32 dir, par, sor;
+ __be32 dir, par, sor, dat;
};
static void cpm1_set_pin32(int port, int pin, int flags)
@@ -486,6 +526,39 @@ static void cpm1_set_pin32(int port, int pin, int flags)
}
}
+static void cpm1_set_value32(int port, int pin, int value)
+{
+ struct cpm_ioport32 __iomem *iop;
+ pin = 1 << (31 - pin);
+
+ if (port == CPM_PORTB)
+ iop = (struct cpm_ioport32 __iomem *)
+ &mpc8xx_immr->im_cpm.cp_pbdir;
+ else
+ iop = (struct cpm_ioport32 __iomem *)
+ &mpc8xx_immr->im_cpm.cp_pedir;
+
+ if (value)
+ setbits32(&iop->dat, pin);
+ else
+ clrbits32(&iop->dat, pin);
+}
+
+static int cpm1_get_value32(int port, int pin)
+{
+ struct cpm_ioport32 __iomem *iop;
+ pin = 1 << (31 - pin);
+
+ if (port == CPM_PORTB)
+ iop = (struct cpm_ioport32 __iomem *)
+ &mpc8xx_immr->im_cpm.cp_pbdir;
+ else
+ iop = (struct cpm_ioport32 __iomem *)
+ &mpc8xx_immr->im_cpm.cp_pedir;
+
+ return !!(in_be32(&iop->dat) & pin);
+}
+
static void cpm1_set_pin16(int port, int pin, int flags)
{
struct cpm_ioport16 __iomem *iop =
@@ -520,6 +593,35 @@ static void cpm1_set_pin16(int port, int pin, int flags)
}
}
+static void cpm1_set_value16(int port, int pin, int value)
+{
+ struct cpm_ioport16 __iomem *iop =
+ (struct cpm_ioport16 __iomem *)&mpc8xx_immr->im_ioport;
+
+ pin = 1 << (15 - pin);
+
+ if (port != 0)
+ iop += port - 1;
+
+ if (value)
+ setbits16(&iop->dat, pin);
+ else
+ clrbits16(&iop->dat, pin);
+}
+
+static int cpm1_get_value16(int port, int pin)
+{
+ struct cpm_ioport16 __iomem *iop =
+ (struct cpm_ioport16 __iomem *)&mpc8xx_immr->im_ioport;
+
+ pin = 1 << (15 - pin);
+
+ if (port != 0)
+ iop += port - 1;
+
+ return !!(in_be16(&iop->dat) & pin);
+}
+
void cpm1_set_pin(enum cpm_port port, int pin, int flags)
{
if (port == CPM_PORTB || port == CPM_PORTE)
@@ -648,3 +750,77 @@ int cpm1_clk_setup(enum cpm_clk_target target, int clock, int mode)
return 0;
}
+
+int gpio_request(unsigned int gpio, const char *label)
+{
+ if (gpio / 32 >= cpm1_num_ports)
+ return -EINVAL;
+ return 0;
+}
+EXPORT_SYMBOL_GPL(gpio_request);
+
+int gpio_direction_input(unsigned int gpio)
+{
+ unsigned long flags;
+ int port = gpio / 32;
+ int pin = gpio % 32;
+
+ spin_lock_irqsave(&cpm1_port_lock, flags);
+
+ cpm1_set_pin(port, pin, CPM_PIN_INPUT | CPM_PIN_GPIO);
+
+ spin_unlock_irqrestore(&cpm1_port_lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(gpio_direction_input);
+
+int gpio_direction_output(unsigned int gpio, int value)
+{
+ int port = gpio / 32;
+ int pin = gpio % 32;
+ unsigned long flags;
+
+ spin_lock_irqsave(&cpm1_port_lock, flags);
+
+ cpm1_set_pin(port, pin, CPM_PIN_OUTPUT | CPM_PIN_GPIO);
+
+ if (port == CPM_PORTB || port == CPM_PORTE)
+ cpm1_set_value32(port, pin, value);
+ else
+ cpm1_set_value16(port, pin, value);
+
+ spin_unlock_irqrestore(&cpm1_port_lock, flags);
+ return 0;
+}
+EXPORT_SYMBOL_GPL(gpio_direction_output);
+
+int gpio_get_value(unsigned int gpio)
+{
+ int port = gpio / 32;
+ int pin = gpio % 32;
+
+ if (port == CPM_PORTB || port == CPM_PORTE)
+ return cpm1_get_value32(port, pin);
+ else
+ return cpm1_get_value16(port, pin);
+}
+EXPORT_SYMBOL_GPL(gpio_get_value);
+
+int gpio_set_value(unsigned int gpio, int value)
+{
+ int port = gpio / 32;
+ int pin = gpio % 32;
+ unsigned long flags;
+
+ spin_lock_irqsave(&cpm1_port_lock, flags);
+
+ if (port == CPM_PORTB || port == CPM_PORTE)
+ cpm1_set_value32(port, pin, value);
+ else
+ cpm1_set_value16(port, pin, value);
+
+ spin_unlock_irqrestore(&cpm1_port_lock, flags);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(gpio_set_value);
--
1.5.2.2
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