LinuxPPC-Dev Archive on lore.kernel.org
 help / color / mirror / Atom feed
* Re: [PATCH 3/4] powerpc: Katana750i - Add DTS file
From: Mark A. Greer @ 2008-01-17  2:28 UTC (permalink / raw)
  To: Mark A. Greer, linuxppc-dev
In-Reply-To: <20080117010634.GA11567@localhost.localdomain>

On Thu, Jan 17, 2008 at 12:06:34PM +1100, David Gibson wrote:
> On Wed, Jan 16, 2008 at 01:48:09PM -0700, Mark A. Greer wrote:
> > On Wed, Jan 16, 2008 at 11:22:28AM +1100, David Gibson wrote:
> > > On Tue, Jan 15, 2008 at 12:08:06PM -0700, Mark A. Greer wrote:
> > > > On Tue, Jan 15, 2008 at 10:34:06AM +1100, David Gibson wrote:
> > > > > On Mon, Jan 14, 2008 at 03:59:26PM -0700, Mark A. Greer wrote:
> > > > > > From: Mark A. Greer <mgreer@mvista.com>
> > > > 
> > > > Hi David.  Thanks for the review.
> > > > 
> > > > > > Add DTS file for the Emerson Katana 750i & 752i platforms.
> > > > > 
> > > > > [snip]
> > > > > > +/dts-v1/;
> > > > > > +
> > > > > > +/ {
> > > > > > +	#address-cells = <1>;
> > > > > > +	#size-cells = <1>;
> > > > > > +	model = "Katana-75xi";	/* Default */
> > > > > > +	compatible = "emerson,katana-750i";
> > > > > > +	coherency-off;
> > > > > 
> > > > > Where is this flag used from?
> > > > 
> > > > Its used in the bootwrapper if & when you use the mv64x60 code to setup
> > > > some of the windows to the I/O ctlrs.  This port does use that code
> > > > (because firmware doesn't do it properly) so I need the flag.
> > > 
> > > Hrm.. ok.  I'm just wondering if a new flag is really the right
> > > approach for this, or whether you should be basing the setup off the
> > > compatible property, either for the board or for the main bridge.
> > 
> > I'd prefer to keep the flag.  Otherwise, the bootwrapper will need a
> > table to look up the compatible field to see if coherency is supposed
> > to be on or off.  We'd have to add an entry to that table for any
> > compatible that need coherency off, etc.  A flag seems cleaner.
> 
> Hrm.  Except that you already have such a table in the cuboot file,
> adding another flag to that wouldn't be hard.
> 
> What piece of hardware is it that actually determines whether
> coherency works or not?  The CPU?  The bridge?

The bridge + the platform.  There's a hw erratum that some boards have
worked around and other haven't.

Spoze I can just code it in the cuboot file as you say.
I'll have to remove the sanity check in the kernel that ensures
that coherency-off & CONFIG_NOT_COHERENT_CACHE match.

> [snip]
> > > > > > +		CUNIT: cunit@f200 {
> > > > > 
> > > > > What is this device?  It needs some sort of "compatible" value.
> > > > 
> > > > Does it?  Its a separate block of regs but its only used in the mpsc
> > > > node--its never looked up on its own by kernel code.  Do all nodes need
> > > > "compatible" even when it'll never be used?  (Just want to know.)
> > > 
> > > Hrm.. if it's really just extra mpsc registers, should it be a
> > > seperate device, or just another range in the mpsc's "reg" property?
> > 
> > Okay, putting into the reg property makes sense.  Its values will be
> > put into both mpsc@xxx 'reg' properties since its share.  That doesn't
> > matter, correct?
> 
> Ah, sorry, I forgot there were multiple mpscs.  Their reg properties
> certainly shouldn't overlap, so you will need a separate node.

Okay.

> However, you could combine your several nodes with MPSC common
> registers into a single "mpsc-common" (or something) block.  That
> would also reduce the number of phandles you need in the mpsc nodes,
> too.

True, that will help.

> Or possibly this should be arranged as for the multiethernet.

Do you mean putting sdma/brg/... as subnodes of the mpsc node?
I remember debating this way back when.  IIRC, leaving them out seemed
like the right thing to do (tm).  If you think that's better, I can do
that.

> > Also, would you mind letting it go thru as it is now and I'll make a
> > separate patch to change this dts, the prpmc2800.dts, and related code
> > afterwards?
> 
> Well, that's not really up to me.

Yeah, but paulus is looing to you to monitor bootwrapper stuff so... :)

> [snip]
> > > Yes :(.  I've looked at this before, though obviously I never got to
> > > figuring out what to do about it.
> > > 
> > > > IMHO we need a way to change the default cmdline in the field so
> > > > sysadmins can change it per board and not have to type it in every time
> > > > they boot.  /chosen/bootargs and __builtin_cmdline can both do that.
> > > > We don't need both, though.  And, since bootargs is specified by OF
> > > > and documented in booting-without-of.txt, can we finally get rid of
> > > > __builtin_cmdline?  I'd sure like to.
> > > > 
> > > > We can probably get rid of CONFIG_CMDLINE too since everyone uses DTs
> > > > now and they can have a /chosen/bootargs.  Anyone have a reason to keep
> > > > CONFIG_CMDLINE around?
> > > > 
> > > > Would you mind elaborating on why you are opposed to /chosen/bootargs?
> > > 
> > > Just because it's nasty for people to have to go in and change the dts
> > > just to change their default command line - which they might well want
> > > to do for things as simple as setting a default root device.
> > 
> > Yeah, but changing CONFIG_CMDLINE requires a kernel rebuild so
> > that's not great either.  Modifying __builtin_cmdline is probably the
> > easiest way to change things in the field (assuming you have a zImage)
> > but its also the least standard way of the three. :(
> 
> But since the device tree is built into the zImage, changing it there
> will also require a rebuild.

Nope, you can run the wrapper script to change it without rebuilding the
kernel.  You just need the dts file and a working dtc (and the wrapper
script).  Goes back to paulus' original intent with the wrapper script.

> No difference from that PoV.  I'd really
> suggest leaving this with CONFIG_CMDLINE just for similarity to other
> platforms until we figure out how to clean up the commandline
> confusion more generally.

I think (hope) your opinion may change when you see my previous comment.

Mark

^ permalink raw reply

* Re: [PATCH 4/4 v2] powerpc: Katana750i - Add platform support
From: David Gibson @ 2008-01-17  1:58 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <20080116221210.GC7228@mag.az.mvista.com>

On Wed, Jan 16, 2008 at 03:12:10PM -0700, Mark A. Greer wrote:
> From: Mark A. Greer <mgreer@mvista.com>
> 
> Add support for the Emerson Katana 750i & 752i platforms.
> 
> Signed-off-by: Mark A. Greer <mgreer@mvista.com>
[snip]
> +typedef enum {
> +	BOARD_TYPE_750I,
> +	BOARD_TYPE_752I,
> +} katana750i_board_type;

This enum appears to be pointless.  You never use it as a type, and
there's no reason to explicitly give array indices for the
board_info[] array.

> +struct katana750i_board_info {
> +	char	cpld_prod_id;
> +	char	*model;
> +	char	*bridge_type;
> +};
> +
> +static struct katana750i_board_info katana750i_board_info[] = {
> +	[BOARD_TYPE_750I] = {
> +		.cpld_prod_id	= KATANA750I_PRODUCT_ID_750I,
> +		.model		= "Katana-750i",
> +		.bridge_type	= "mv64360",
> +	},
> +	[BOARD_TYPE_752I] = {
> +		.cpld_prod_id	= KATANA750I_PRODUCT_ID_752I,
> +		.model		= "Katana-752i",
> +		.bridge_type	= "mv64460",
> +	},
> +};
[...]

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

^ permalink raw reply

* Re: [PATCH 1/3] 8xx: Analogue & Micro Adder875 board support.
From: Bryan O'Donoghue @ 2008-01-17  1:34 UTC (permalink / raw)
  To: Vitaly Bordug; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <20080116091607.6aa76d11@kernel.crashing.org>

On Wed, 2008-01-16 at 09:16 +0300, Vitaly Bordug wrote:

Greetings Vitaly !

> On Tue, 15 Jan 2008 23:25:02 +0000
> Bryan O'Donoghue wrote:
> 
> > Greetings Scott.
> > 
> > I've tried both of the procedures you've outlined on the Adder875 with
> > the patches supplied against the paulus git tree to no avail.
> > 
> > Pass #1 :
> > 
> > Doing it safe with cuImage.8xx
> > 
> 
> [...]
> > => bootm 0x400000
> > ## Booting image at 00400000 ...
> >    Image Name:   Linux-2.6.24-rc6-g4f43143f-dirty
> >    Image Type:   PowerPC Linux Kernel Image (gzip compressed)
> >    Data Size:    1032266 Bytes = 1008.1 kB
> >    Load Address: 00400000
> >    Entry Point:  00400554
> >    Verifying Checksum ... OK
> >    Uncompressing Kernel Image ... OK
> > 
> > I haven't as yet tried to single step through the bootup process -
> > but, just to say that assuming the above procedure isn't _too_ far
> > wrong - the stuff posted to the list agains the tree you've
> > recommended doesn't seem to work..
> > 
> yes the sequence seems correct, so I'd check cmdline params, contents of chosen node in dts, etc to make sure stuff is being written to the proper UART with proper settings.

Indeed - thing is for the cuImage.8xx it's definitely _not_ something
simple like a UART not set at the expected baud rate.

Using an Adder875 booted from U-Boot and cuImage.8xx with a  a bdi2000
as a debugger - after the jump to kernel startup we don't even hit
start_kernel ! There's no question about it - for whatever reason the
cuImage.8xx for this board is definitely broken.

I've been doing some experiments in the last hour or so mapping vmlinux
to 0x400554 in gdb - since that's the entry point above - and setting an
instruction breakpoint to do some instruction stepping.

When I do that with cuImage.8xx I find that in kernel/head_8xx.S the
code dies before going into virtual memory mode - haven't nailed down
exactly where yet.

Point being if I boot a uImage + dtb

bootm 0x400000 - 0x500000 with a breakpoint set at start_kernel - then
the uImage + dtb version _will_ hit start_kernel - where we are in
virtual mode...

_something_ wierd is for sure wrong with the cuImage.8xx and
unfortunately it's not a simple as a silly baud rate.

> > 
> following the u-boot way (which is more correct imo) you'll need to add some code that fixes up frequencies and stuff inside dtb, or you may try to hardcode those values inside dts(if you know exactly what should be  there). Just adding CONFIG_*LIBFDT is not going to work.

I agree, makes sense to go with the flow of things tbh.

It still leaves as unanswered why exactly the ucImage.8xx kernel dies
suddenly before hitting start_kernel - whereas the uImage + dtb boy is
getting much further along in the boot.

I suppose I'll do some debug with the uImage - and try to see what else
it wants to complete the boot though, it'd be nice if the cuImage worked
so there'd be a safety net to use as a comparison to get the uImage +
dtb running properly.

^ permalink raw reply

* Re: [PATCH 3/4] powerpc: Katana750i - Add DTS file
From: David Gibson @ 2008-01-17  1:06 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <20080116204809.GA24595@mag.az.mvista.com>

On Wed, Jan 16, 2008 at 01:48:09PM -0700, Mark A. Greer wrote:
> On Wed, Jan 16, 2008 at 11:22:28AM +1100, David Gibson wrote:
> > On Tue, Jan 15, 2008 at 12:08:06PM -0700, Mark A. Greer wrote:
> > > On Tue, Jan 15, 2008 at 10:34:06AM +1100, David Gibson wrote:
> > > > On Mon, Jan 14, 2008 at 03:59:26PM -0700, Mark A. Greer wrote:
> > > > > From: Mark A. Greer <mgreer@mvista.com>
> > > 
> > > Hi David.  Thanks for the review.
> > > 
> > > > > Add DTS file for the Emerson Katana 750i & 752i platforms.
> > > > 
> > > > [snip]
> > > > > +/dts-v1/;
> > > > > +
> > > > > +/ {
> > > > > +	#address-cells = <1>;
> > > > > +	#size-cells = <1>;
> > > > > +	model = "Katana-75xi";	/* Default */
> > > > > +	compatible = "emerson,katana-750i";
> > > > > +	coherency-off;
> > > > 
> > > > Where is this flag used from?
> > > 
> > > Its used in the bootwrapper if & when you use the mv64x60 code to setup
> > > some of the windows to the I/O ctlrs.  This port does use that code
> > > (because firmware doesn't do it properly) so I need the flag.
> > 
> > Hrm.. ok.  I'm just wondering if a new flag is really the right
> > approach for this, or whether you should be basing the setup off the
> > compatible property, either for the board or for the main bridge.
> 
> I'd prefer to keep the flag.  Otherwise, the bootwrapper will need a
> table to look up the compatible field to see if coherency is supposed
> to be on or off.  We'd have to add an entry to that table for any
> compatible that need coherency off, etc.  A flag seems cleaner.

Hrm.  Except that you already have such a table in the cuboot file,
adding another flag to that wouldn't be hard.

What piece of hardware is it that actually determines whether
coherency works or not?  The CPU?  The bridge?

[snip]
> > > > > +		CUNIT: cunit@f200 {
> > > > 
> > > > What is this device?  It needs some sort of "compatible" value.
> > > 
> > > Does it?  Its a separate block of regs but its only used in the mpsc
> > > node--its never looked up on its own by kernel code.  Do all nodes need
> > > "compatible" even when it'll never be used?  (Just want to know.)
> > 
> > Hrm.. if it's really just extra mpsc registers, should it be a
> > seperate device, or just another range in the mpsc's "reg" property?
> 
> Okay, putting into the reg property makes sense.  Its values will be
> put into both mpsc@xxx 'reg' properties since its share.  That doesn't
> matter, correct?

Ah, sorry, I forgot there were multiple mpscs.  Their reg properties
certainly shouldn't overlap, so you will need a separate node.
However, you could combine your several nodes with MPSC common
registers into a single "mpsc-common" (or something) block.  That
would also reduce the number of phandles you need in the mpsc nodes,
too.

Or possibly this should be arranged as for the multiethernet.

> Also, would you mind letting it go thru as it is now and I'll make a
> separate patch to change this dts, the prpmc2800.dts, and related code
> afterwards?

Well, that's not really up to me.

[snip]
> > Yes :(.  I've looked at this before, though obviously I never got to
> > figuring out what to do about it.
> > 
> > > IMHO we need a way to change the default cmdline in the field so
> > > sysadmins can change it per board and not have to type it in every time
> > > they boot.  /chosen/bootargs and __builtin_cmdline can both do that.
> > > We don't need both, though.  And, since bootargs is specified by OF
> > > and documented in booting-without-of.txt, can we finally get rid of
> > > __builtin_cmdline?  I'd sure like to.
> > > 
> > > We can probably get rid of CONFIG_CMDLINE too since everyone uses DTs
> > > now and they can have a /chosen/bootargs.  Anyone have a reason to keep
> > > CONFIG_CMDLINE around?
> > > 
> > > Would you mind elaborating on why you are opposed to /chosen/bootargs?
> > 
> > Just because it's nasty for people to have to go in and change the dts
> > just to change their default command line - which they might well want
> > to do for things as simple as setting a default root device.
> 
> Yeah, but changing CONFIG_CMDLINE requires a kernel rebuild so
> that's not great either.  Modifying __builtin_cmdline is probably the
> easiest way to change things in the field (assuming you have a zImage)
> but its also the least standard way of the three. :(

But since the device tree is built into the zImage, changing it there
will also require a rebuild.  No difference from that PoV.  I'd really
suggest leaving this with CONFIG_CMDLINE just for similarity to other
platforms until we figure out how to clean up the commandline
confusion more generally.

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

^ permalink raw reply

* Re: [PATCH 1/4] powerpc: mv64x60 - Use early_* PCI accessors for hotswap reg
From: Mark A. Greer @ 2008-01-17  0:47 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1200523739.6755.33.camel@pasglop>

On Thu, Jan 17, 2008 at 09:48:59AM +1100, Benjamin Herrenschmidt wrote:
> 
> On Mon, 2008-01-14 at 15:51 -0700, Mark A. Greer wrote:
> > From: Mark A. Greer <mgreer@mvista.com>
> > 
> > The mv64x60 Hotswap register is on the first hose of the mv64x60
> > hostbridge.  To access it, manually find the hose structure and
> > use the early_* PCI accessor routines because the hostbridge is
> > normally hidden.
> 
> Can't we unhide the NB instead ?

Hi Ben.

Possibly but it may cause issues since many hostbridge have BARs
that don't comply with the PCI spec which may get hosed when scanning
the PCI bus.  Maybe fixups/quirks/whatever will help but I'm not sure
that's any cleaner.  TBH, I'm not familiar enough with the PCI subsystem
to answer this intelligently.

Mark

^ permalink raw reply

* Re: [PATCH 4/4 v2] powerpc: Katana750i - Add platform support
From: Mark A. Greer @ 2008-01-17  0:35 UTC (permalink / raw)
  To: Stephen Rothwell; +Cc: linuxppc-dev
In-Reply-To: <20080117102702.5e21fc22.sfr@canb.auug.org.au>

On Thu, Jan 17, 2008 at 10:27:02AM +1100, Stephen Rothwell wrote:
> Hi Mark,
> 
> On Wed, 16 Jan 2008 15:12:10 -0700 "Mark A. Greer" <mgreer@mvista.com> wrote:
> >
> > +static void __init katana750i_setup_arch(void)
> > +{
> > +	struct device_node *np;
> > +	phys_addr_t paddr;
> > +	const unsigned int *reg;
> > +
> > +	np = of_find_compatible_node(NULL, NULL, "katana750i,cpld");
> > +	if (!np)
> > +		printk(KERN_WARNING "No CPLD DT node; functionality reduced\n");
> > +	else {
> > +		reg = of_get_property(np, "reg", NULL);
> > +		if (!reg)
> > +			printk(KERN_WARNING "No CPLD reg property; "
> > +					"functionality reduced\n");
> > +		else {
> > +			paddr = of_translate_address(np, reg);
> > +			of_node_put(np);
> > +			cpld_base = ioremap(paddr, reg[1]);
> > +		}
> > +	}
> 
> You need an of_node_put(np) for the !reg case above.  Maybe you should
> just put it after the else clause instead of in it.

Erg, yes...duh.

Thanks again, Stephen.

Mark

^ permalink raw reply

* Re: [Add mpc5121 support PATCH v2 2/8] Add mpc512x ipic support
From: David Gibson @ 2008-01-17  0:16 UTC (permalink / raw)
  To: John Rigby; +Cc: linuxppc-dev
In-Reply-To: <1200519447-25555-2-git-send-email-jrigby@freescale.com>

On Wed, Jan 16, 2008 at 02:37:21PM -0700, John Rigby wrote:
> Added ipic_info entries for vectors used by 512x that
> were previously unused by 83xx.

I've always wondered what these great big tables in the ipic driver
were for.  Are they anything that could be better repsresented in the
device tree?

> diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
> index 7274750..4c016da 100644
> --- a/arch/powerpc/sysdev/ipic.c
> +++ b/arch/powerpc/sysdev/ipic.c
> @@ -48,6 +48,13 @@ static struct ipic_info ipic_info[] = {
>  		.bit	= 17,
>  		.prio_mask = 1,
>  	},
> +	[3] = {
> +		.mask	= IPIC_SIMSR_H,
> +		.prio	= IPIC_SIPRR_C,
> +		.force	= IPIC_SIFCR_H,
> +		.bit	= 18,
> +		.prio_mask = 2,
> +	},
>  	[4] = {
>  		.mask	= IPIC_SIMSR_H,
>  		.prio	= IPIC_SIPRR_C,
> @@ -55,6 +62,34 @@ static struct ipic_info ipic_info[] = {
>  		.bit	= 19,
>  		.prio_mask = 3,
>  	},
> +	[5] = {
> +		.mask	= IPIC_SIMSR_H,
> +		.prio	= IPIC_SIPRR_C,
> +		.force	= IPIC_SIFCR_H,
> +		.bit	= 20,
> +		.prio_mask = 4,
> +	},
[...]

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

^ permalink raw reply

* Re: [PATCH] MTD for Taco
From: Sean MacLennan @ 2008-01-16 23:51 UTC (permalink / raw)
  To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <20080116173421.4c886514@zod.rchland.ibm.com>

Josh Boyer wrote:
> On Wed, 16 Jan 2008 16:25:23 -0500
> Sean MacLennan <smaclennan@pikatech.com> wrote:
>
>   
>> Sean MacLennan wrote:
>>     
>>> How about adding a config option that lets you specify 8 bit access? 
>>> Something like CONFIG_NDFC_8BIT_ACCESS. We could default it to no and 
>>> put a little blurb that says something like:
>>>
>>> On some platforms the 32bit read/writes cause a machine access 
>>> exception. If you get a machine access exception while reading the NAND 
>>> bad block table, try turning on 8 bit access.
>>>   
>>>       
>> I know it would be better if 32 bit access just worked, but nobody 
>> actively objected to this idea, so here is a patch ;)
>>     
>
> I'm objecting, but not on the bit access reasons :).
>
> 1) Needs to go to the linux-mtd@lists.infradead.org list with the
> maintainer CC'd (Thomas Gleixner)
>   
Ok.
> 2) I don't want this driver enabled in mainline for boards in
> arch/powerpc until it fully understands how to parse device trees.
>   
Fair enough. I thought it would be better to have a driver that compiles 
and is usable for arch/powerpc, even if not quite correct. We (PIKA) are 
going to be using a NAND flash, so we need the ndfc driver working. But 
I can understand wanting it "right" before you put it in the kernel.

Cheers,
   Sean

^ permalink raw reply

* Re: Fixed phy
From: Anton Vorontsov @ 2008-01-16 23:26 UTC (permalink / raw)
  To: Rune Torgersen; +Cc: linuxppc-dev
In-Reply-To: <DCEAAC0833DD314AB0B58112AD99B93B039BA0D3@ismail.innsys.innovsys.com>

Hello Rune,

On Wed, Jan 16, 2008 at 10:50:53AM -0600, Rune Torgersen wrote:
> 
> Hi
> We're doing a port to 2.6.24-rc7, and we need to set up two ethernets
> with fixed phy's as they have phyless interfaces to a switch.
> WE cannot find any good examples on how to do this. We've found the
> fixed speed PHY emulation in the configuration, but are unsure on
> how to set the PHY's up in the device tree.
> 
> This is using a 8280 cpu and ethernet on the FCC's

See these patches:

Fixed phy subsystem rework:
http://ozlabs.org/pipermail/linuxppc-dev/2007-December/047777.html

Fixed phy generic dts parsing & gianfar support:
http://ozlabs.org/pipermail/linuxppc-dev/2007-December/047778.html

Fixed phy support for fs_enet driver (SCC/FCC/FEC):
http://ozlabs.org/pipermail/linuxppc-dev/2007-December/048090.html

Example of usage:
http://ozlabs.org/pipermail/linuxppc-dev/2007-December/047779.html

-- 
Anton Vorontsov
email: cbou@mail.ru
backup email: ya-cbou@yandex.ru
irc://irc.freenode.net/bd2

^ permalink raw reply

* Re: [PATCH 1/5] Warp Base Platform
From: Josh Boyer @ 2008-01-16 23:39 UTC (permalink / raw)
  To: Stephen Rothwell; +Cc: linuxppc-dev, Stefan Roese, Sean MacLennan
In-Reply-To: <20080117103648.e225e9f5.sfr@canb.auug.org.au>

On Thu, 17 Jan 2008 10:36:48 +1100
Stephen Rothwell <sfr@canb.auug.org.au> wrote:

> On Wed, 16 Jan 2008 18:29:45 -0500 Sean MacLennan <smaclennan@pikatech.com> wrote:
> >
> > Everybody happy with this patch?
> 
> I am happy (about this patch at least :-))

Yes, I have this queued up.

josh

^ permalink raw reply

* Re: [PATCH 1/5] Warp Base Platform
From: Stephen Rothwell @ 2008-01-16 23:36 UTC (permalink / raw)
  To: Sean MacLennan; +Cc: linuxppc-dev, Stefan Roese
In-Reply-To: <478E9369.5090605@pikatech.com>

[-- Attachment #1: Type: text/plain, Size: 278 bytes --]

On Wed, 16 Jan 2008 18:29:45 -0500 Sean MacLennan <smaclennan@pikatech.com> wrote:
>
> Everybody happy with this patch?

I am happy (about this patch at least :-))

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

^ permalink raw reply

* Re: [PATCH] MTD for Taco
From: Josh Boyer @ 2008-01-16 23:34 UTC (permalink / raw)
  To: Sean MacLennan; +Cc: linuxppc-dev, Stefan Roese
In-Reply-To: <478E7643.5040804@pikatech.com>

On Wed, 16 Jan 2008 16:25:23 -0500
Sean MacLennan <smaclennan@pikatech.com> wrote:

> Sean MacLennan wrote:
> > How about adding a config option that lets you specify 8 bit access? 
> > Something like CONFIG_NDFC_8BIT_ACCESS. We could default it to no and 
> > put a little blurb that says something like:
> >
> > On some platforms the 32bit read/writes cause a machine access 
> > exception. If you get a machine access exception while reading the NAND 
> > bad block table, try turning on 8 bit access.
> >   
> I know it would be better if 32 bit access just worked, but nobody 
> actively objected to this idea, so here is a patch ;)

I'm objecting, but not on the bit access reasons :).

1) Needs to go to the linux-mtd@lists.infradead.org list with the
maintainer CC'd (Thomas Gleixner)

2) I don't want this driver enabled in mainline for boards in
arch/powerpc until it fully understands how to parse device trees.

You could separate out the 8-bit access option and send that to
linux-mtd though

josh

^ permalink raw reply

* Re: [PATCH 1/5] Warp Base Platform
From: Sean MacLennan @ 2008-01-16 23:29 UTC (permalink / raw)
  To: Stephen Rothwell; +Cc: linuxppc-dev, Stefan Roese
In-Reply-To: <20080113113545.f08d9199.sfr@canb.auug.org.au>

Everybody happy with this patch?

Cheers,
   Sean

^ permalink raw reply

* Re: [PATCH 4/4 v2] powerpc: Katana750i - Add platform support
From: Stephen Rothwell @ 2008-01-16 23:27 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <20080116221210.GC7228@mag.az.mvista.com>

[-- Attachment #1: Type: text/plain, Size: 930 bytes --]

Hi Mark,

On Wed, 16 Jan 2008 15:12:10 -0700 "Mark A. Greer" <mgreer@mvista.com> wrote:
>
> +static void __init katana750i_setup_arch(void)
> +{
> +	struct device_node *np;
> +	phys_addr_t paddr;
> +	const unsigned int *reg;
> +
> +	np = of_find_compatible_node(NULL, NULL, "katana750i,cpld");
> +	if (!np)
> +		printk(KERN_WARNING "No CPLD DT node; functionality reduced\n");
> +	else {
> +		reg = of_get_property(np, "reg", NULL);
> +		if (!reg)
> +			printk(KERN_WARNING "No CPLD reg property; "
> +					"functionality reduced\n");
> +		else {
> +			paddr = of_translate_address(np, reg);
> +			of_node_put(np);
> +			cpld_base = ioremap(paddr, reg[1]);
> +		}
> +	}

You need an of_node_put(np) for the !reg case above.  Maybe you should
just put it after the else clause instead of in it.

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

^ permalink raw reply

* Re: [Add mpc5121 support PATCH v2 3/8] Basic Freescale MPC512x support
From: Stephen Rothwell @ 2008-01-16 23:02 UTC (permalink / raw)
  To: John Rigby; +Cc: linuxppc-dev
In-Reply-To: <1200519447-25555-3-git-send-email-jrigby@freescale.com>

[-- Attachment #1: Type: text/plain, Size: 569 bytes --]

Hi John,

On Wed, 16 Jan 2008 14:37:22 -0700 John Rigby <jrigby@freescale.com> wrote:
>
> +++ b/arch/powerpc/platforms/512x/mpc5121_ads.c

> +static void __init mpc5121_ads_init_IRQ(void)
> +{
> +	struct device_node *np;
> +
> +	np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
> +	if (!np)
> +		return;
> +
> +	ipic_init(np, 0);

You need an op_node_put(np) here.  ipic_init will do another of_node_get()
if it keeps a reference to np.

-- 
Cheers,
Stephen Rothwell                    sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/

[-- Attachment #2: Type: application/pgp-signature, Size: 189 bytes --]

^ permalink raw reply

* Re: [PATCH 1/4] powerpc: mv64x60 - Use early_* PCI accessors for hotswap reg
From: Benjamin Herrenschmidt @ 2008-01-16 22:48 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <20080114225150.GB21940@mag.az.mvista.com>


On Mon, 2008-01-14 at 15:51 -0700, Mark A. Greer wrote:
> From: Mark A. Greer <mgreer@mvista.com>
> 
> The mv64x60 Hotswap register is on the first hose of the mv64x60
> hostbridge.  To access it, manually find the hose structure and
> use the early_* PCI accessor routines because the hostbridge is
> normally hidden.

Can't we unhide the NB instead ?

Cheers,
Ben.

> Signed-off-by: Mark A. Greer <mgreer@mvista.com>
> ---
>  arch/powerpc/sysdev/mv64x60.h     |   22 ++++++++++++++++++++++
>  arch/powerpc/sysdev/mv64x60_pci.c |   25 +++++++++++++++----------
>  2 files changed, 37 insertions(+), 10 deletions(-)
> 
> diff --git a/arch/powerpc/sysdev/mv64x60.h b/arch/powerpc/sysdev/mv64x60.h
> index 4f618fa..27e22f4 100644
> --- a/arch/powerpc/sysdev/mv64x60.h
> +++ b/arch/powerpc/sysdev/mv64x60.h
> @@ -3,10 +3,32 @@
>  
>  #include <linux/init.h>
>  
> +#include <asm/prom.h>
> +#include <asm/pci-bridge.h>
> +
>  extern void __init mv64x60_init_irq(void);
>  extern unsigned int mv64x60_get_irq(void);
>  
>  extern void __init mv64x60_pci_init(void);
>  extern void __init mv64x60_init_early(void);
>  
> +static inline struct pci_controller *mv64x60_find_hose(u32 idx)
> +{
> +	struct device_node *phb;
> +	struct pci_controller *hose;
> +	const u32 *prop;
> +	int len;
> +
> +	for_each_compatible_node(phb, "pci", "marvell,mv64360-pci") {
> +		prop = of_get_property(phb, "cell-index", &len);
> +		if (prop && (len == sizeof(prop)) && (*prop == idx)) {
> +			hose = pci_find_hose_for_OF_device(phb);
> +			of_node_put(phb);
> +			return hose;
> +		}
> +	}
> +
> +	return NULL;
> +}
> +
>  #endif /* __MV64X60_H__ */
> diff --git a/arch/powerpc/sysdev/mv64x60_pci.c b/arch/powerpc/sysdev/mv64x60_pci.c
> index 1456015..2115177 100644
> --- a/arch/powerpc/sysdev/mv64x60_pci.c
> +++ b/arch/powerpc/sysdev/mv64x60_pci.c
> @@ -17,6 +17,8 @@
>  #include <asm/prom.h>
>  #include <asm/pci-bridge.h>
>  
> +#include <sysdev/mv64x60.h>
> +
>  #define PCI_HEADER_TYPE_INVALID		0x7f	/* Invalid PCI header type */
>  
>  #ifdef CONFIG_SYSFS
> @@ -24,11 +26,12 @@
>  #define MV64X60_VAL_LEN_MAX		11
>  #define MV64X60_PCICFG_CPCI_HOTSWAP	0x68
>  
> +/* cPCI Hotswap register only supported on PCI 0 interface */
>  static ssize_t mv64x60_hs_reg_read(struct kobject *kobj,
>  				   struct bin_attribute *attr, char *buf,
>  				   loff_t off, size_t count)
>  {
> -	struct pci_dev *phb;
> +	struct pci_controller *hose;
>  	u32 v;
>  
>  	if (off > 0)
> @@ -36,11 +39,12 @@ static ssize_t mv64x60_hs_reg_read(struct kobject *kobj,
>  	if (count < MV64X60_VAL_LEN_MAX)
>  		return -EINVAL;
>  
> -	phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
> -	if (!phb)
> +	hose = mv64x60_find_hose(0);
> +	if (!hose)
>  		return -ENODEV;
> -	pci_read_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, &v);
> -	pci_dev_put(phb);
> +
> +	early_read_config_dword(hose, 0, PCI_DEVFN(0, 0),
> +			MV64X60_PCICFG_CPCI_HOTSWAP, &v);
>  
>  	return sprintf(buf, "0x%08x\n", v);
>  }
> @@ -49,7 +53,7 @@ static ssize_t mv64x60_hs_reg_write(struct kobject *kobj,
>  				    struct bin_attribute *attr, char *buf,
>  				    loff_t off, size_t count)
>  {
> -	struct pci_dev *phb;
> +	struct pci_controller *hose;
>  	u32 v;
>  
>  	if (off > 0)
> @@ -60,11 +64,12 @@ static ssize_t mv64x60_hs_reg_write(struct kobject *kobj,
>  	if (sscanf(buf, "%i", &v) != 1)
>  		return -EINVAL;
>  
> -	phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
> -	if (!phb)
> +	hose = mv64x60_find_hose(0);
> +	if (!hose)
>  		return -ENODEV;
> -	pci_write_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, v);
> -	pci_dev_put(phb);
> +
> +	early_write_config_dword(hose, 0, PCI_DEVFN(0, 0),
> +			MV64X60_PCICFG_CPCI_HOTSWAP, v);
>  
>  	return count;
>  }
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-dev

^ permalink raw reply

* [PATCH 4/4 v2] powerpc: Katana750i - Add platform support
From: Mark A. Greer @ 2008-01-16 22:12 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <20080114230057.GC22862@mag.az.mvista.com>

From: Mark A. Greer <mgreer@mvista.com>

Add support for the Emerson Katana 750i & 752i platforms.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
---
This patch should address all of Stephen's comments.
I also did some cleanup that I missed the first time through.

 arch/powerpc/boot/Makefile                      |    3 
 arch/powerpc/boot/cuboot-katana750i.c           |  248 ++
 arch/powerpc/configs/katana750i_defconfig       | 1315 ++++++++++++++
 arch/powerpc/platforms/embedded6xx/Kconfig      |   10 
 arch/powerpc/platforms/embedded6xx/Makefile     |    1 
 arch/powerpc/platforms/embedded6xx/katana750i.c |  312 +++
 6 files changed, 1888 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index d1e625c..b04ecc0 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -62,7 +62,7 @@ src-plat := of.c cuboot-52xx.c cuboot-83xx.c cuboot-85xx.c holly.c \
 		ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
 		cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c cuboot-bamboo.c \
 		fixed-head.S ep88xc.c cuboot-hpc2.c ep405.c cuboot-taishan.c \
-		cuboot-katmai.c cuboot-rainier.c
+		cuboot-katmai.c cuboot-rainier.c cuboot-katana750i.c
 src-boot := $(src-wlib) $(src-plat) empty.c
 
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -206,6 +206,7 @@ image-$(CONFIG_RAINIER)			+= cuImage.rainier
 image-$(CONFIG_WALNUT)			+= treeImage.walnut
 image-$(CONFIG_TAISHAN)			+= cuImage.taishan
 image-$(CONFIG_KATMAI)			+= cuImage.katmai
+image-$(CONFIG_PPC_KATANA750I)		+= cuImage.katana750i
 endif
 
 # For 32-bit powermacs, build the COFF and miboot images
diff --git a/arch/powerpc/boot/cuboot-katana750i.c b/arch/powerpc/boot/cuboot-katana750i.c
new file mode 100644
index 0000000..996d65f
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-katana750i.c
@@ -0,0 +1,248 @@
+/*
+ * Emerson Katana-750i/752i
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2007 (c) MontaVista, Software, Inc.  This file is licensed under
+ * the terms of the GNU General Public License version 2.  This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ */
+
+#include "stdio.h"
+#include "io.h"
+#include "ops.h"
+#include "cuboot.h"
+#include "ppcboot.h"
+#include "mv64x60.h"
+
+static u8 *bridge_base;
+static u8 *cpld_base;
+static bd_t bd;
+
+#define KATANA750I_CPLD_RST_CMD			0x00001000
+#define KATANA750I_CPLD_RST_CMD_HR		0x01
+
+#define KATANA750I_CPLD_PRODUCT_ID		0x00004000
+#define KATANA750I_PRODUCT_ID_750I		0x02
+#define KATANA750I_PRODUCT_ID_752I		0x04
+
+#define KATANA750I_CPLD_BD_CFG_0		0x00009000
+#define KATANA750I_CPLD_BD_CFG_0_SYSCLK_MASK	0xc0
+#define KATANA750I_CPLD_BD_CFG_0_SYSCLK_200	0x00
+#define KATANA750I_CPLD_BD_CFG_0_SYSCLK_166	0x80
+#define KATANA750I_CPLD_BD_CFG_0_SYSCLK_133	0xc0
+#define KATANA750I_CPLD_BD_CFG_0_SYSCLK_100	0x40
+
+#define BOARD_MODEL_MAX	32
+
+typedef enum {
+	BOARD_TYPE_750I,
+	BOARD_TYPE_752I,
+} katana750i_board_type;
+
+struct katana750i_board_info {
+	char	cpld_prod_id;
+	char	*model;
+	char	*bridge_type;
+};
+
+static struct katana750i_board_info katana750i_board_info[] = {
+	[BOARD_TYPE_750I] = {
+		.cpld_prod_id	= KATANA750I_PRODUCT_ID_750I,
+		.model		= "Katana-750i",
+		.bridge_type	= "mv64360",
+	},
+	[BOARD_TYPE_752I] = {
+		.cpld_prod_id	= KATANA750I_PRODUCT_ID_752I,
+		.model		= "Katana-752i",
+		.bridge_type	= "mv64460",
+	},
+};
+
+static struct katana750i_board_info *katana750i_get_bip(void)
+{
+	struct katana750i_board_info *bip;
+	int i;
+	u8 id;
+
+	id = in_8(cpld_base + KATANA750I_CPLD_PRODUCT_ID);
+
+	for (i = 0, bip = katana750i_board_info;
+			i < ARRAY_SIZE(katana750i_board_info); i++, bip++)
+		if (bip->cpld_prod_id == id)
+			return bip;
+
+	return NULL;
+}
+
+static void katana750i_bridge_setup(void)
+{
+	u32 i, v[12], enables, acc_bits;
+	u32 pci_base_hi, pci_base_lo, size, buf[2];
+	unsigned long cpu_base;
+	int rc;
+	void *devp;
+	u8 *bridge_pbase, is_coherent;
+	struct mv64x60_cpu2pci_win *tbl;
+
+	bridge_pbase = mv64x60_get_bridge_pbase();
+	is_coherent = mv64x60_is_coherent();
+
+	if (is_coherent)
+		acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB
+			| MV64x60_PCI_ACC_CNTL_SWAP_NONE
+			| MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES
+			| MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES;
+	else
+		acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE
+			| MV64x60_PCI_ACC_CNTL_SWAP_NONE
+			| MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES
+			| MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES;
+
+	mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent);
+	mv64x60_config_pci_windows(bridge_base, bridge_pbase, 1, 0, acc_bits);
+
+	/* Get the cpu -> pci i/o & mem mappings from the device tree */
+	devp = finddevice("/mv64x60/pci");
+	if (devp == NULL)
+		fatal("Error: Missing /mv64x60/pci device tree node\n\r");
+
+	rc = getprop(devp, "ranges", v, sizeof(v));
+	if (rc != sizeof(v))
+		fatal("Error: Can't find /mv64x60/pci/ranges property\n\r");
+
+	/* Get the cpu -> pci i/o & mem mappings from the device tree */
+	devp = finddevice("/mv64x60");
+	if (devp == NULL)
+		fatal("Error: Missing /mv64x60 device tree node\n\r");
+
+	enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE));
+	enables |= 0x0007fe00; /* Disable all cpu->pci windows */
+	out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
+
+	for (i=0; i<12; i+=6) {
+		switch (v[i] & 0xff000000) {
+		case 0x01000000: /* PCI I/O Space */
+			tbl = mv64x60_cpu2pci_io;
+			break;
+		case 0x02000000: /* PCI MEM Space */
+			tbl = mv64x60_cpu2pci_mem;
+			break;
+		default:
+			continue;
+		}
+
+		pci_base_hi = v[i+1];
+		pci_base_lo = v[i+2];
+		cpu_base = v[i+3];
+		size = v[i+5];
+
+		buf[0] = cpu_base;
+		buf[1] = size;
+
+		if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base))
+			fatal("Error: Can't translate PCI address 0x%x\n\r",
+					(u32)cpu_base);
+
+		mv64x60_config_cpu2pci_window(bridge_base, 1, pci_base_hi,
+				pci_base_lo, cpu_base, size, tbl);
+	}
+
+	enables &= ~0x0000c000; /* Enable cpu->pci1 i/o, cpu->pci1 mem0 */
+	out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
+}
+
+static void katana750i_fixups(void)
+{
+	void *devp;
+	struct katana750i_board_info *bip;
+	u32 v[2];
+
+	katana750i_bridge_setup();
+
+	bip = katana750i_get_bip();
+	if (!bip) {
+		printf("Can't identify Katana board. Using DT defaults.\n\r");
+		return;
+	}
+
+	devp = finddevice("/");
+	if (devp == NULL)
+		fatal("Error: Missing '/' device tree node\n\r");
+	setprop(devp, "model", bip->model, strlen(bip->model) + 1);
+
+	dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
+	dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 4, bd.bi_busfreq);
+
+	devp = finddevice("/mv64x60");
+	if (devp == NULL)
+		fatal("Error: Missing /mv64x60 device tree node\n\r");
+	setprop(devp, "model", bip->bridge_type, strlen(bip->bridge_type) + 1);
+
+	devp = finddevice("/mv64x60/flash");
+	if (devp == NULL)
+		fatal("Error: Missing '/mv64x60/flash' device tree node\n\r");
+	v[0] = bd.bi_flashstart;
+	v[1] = bd.bi_flashsize & 0xfff00000;
+	setprop(devp, "reg", v, 2 * sizeof(v[0]));
+
+	devp = finddevice("/mv64x60/brg@b200");
+	if (devp == NULL)
+		fatal("Error:Missing '/mv64x60/brg@b200' device tree node\n\r");
+	v[0] = bd.bi_baudrate;
+	setprop(devp, "current-speed", v, sizeof(v[0]));
+}
+
+static void katana750i_reset(void)
+{
+	udelay(5000000);
+
+	if (bridge_base)
+		out_8(cpld_base + KATANA750I_CPLD_RST_CMD,
+				KATANA750I_CPLD_RST_CMD_HR);
+	for (;;);
+}
+
+static u8 *katana750i_get_cpld_base(void)
+{
+	u32 v;
+	void *devp;
+
+	devp = finddevice("/mv64x60/cpld");
+	if (devp == NULL)
+		goto err_out;
+	if (getprop(devp, "virtual-reg", &v, sizeof(v)) != sizeof(v))
+		goto err_out;
+
+	return (u8 *)v;
+
+err_out:
+	return 0;
+}
+
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+	CUBOOT_INIT();
+	fdt_init(_dtb_start);
+
+	bridge_base = mv64x60_get_bridge_base();
+	cpld_base = katana750i_get_cpld_base();
+
+	platform_ops.fixups = katana750i_fixups;
+	platform_ops.exit = katana750i_reset;
+
+	serial_console_init();
+}
+
+/* _zimage_start called very early--need to turn off external interrupts */
+asm ("		.globl _zimage_start\n\
+	_zimage_start:\n\
+		mfmsr	10\n\
+		rlwinm	10,10,0,~(1<<15)	/* Clear MSR_EE */\n\
+		sync\n\
+		mtmsr	10\n\
+		isync\n\
+		b _zimage_start_lib\n\
+");
diff --git a/arch/powerpc/configs/katana750i_defconfig b/arch/powerpc/configs/katana750i_defconfig
new file mode 100644
index 0000000..b55dd55
--- /dev/null
+++ b/arch/powerpc/configs/katana750i_defconfig
@@ -0,0 +1,1315 @@
+#
+# Automatically generated make config: don't edit
+# Linux kernel version: 2.6.24-rc6
+# Mon Jan 14 14:39:14 2008
+#
+# CONFIG_PPC64 is not set
+
+#
+# Processor support
+#
+CONFIG_6xx=y
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+# CONFIG_40x is not set
+# CONFIG_44x is not set
+# CONFIG_E200 is not set
+CONFIG_PPC_FPU=y
+CONFIG_ALTIVEC=y
+CONFIG_PPC_STD_MMU=y
+CONFIG_PPC_STD_MMU_32=y
+# CONFIG_PPC_MM_SLICES is not set
+# CONFIG_SMP is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_CHECK_CACHE_COHERENCY=y
+CONFIG_PPC32=y
+CONFIG_WORD_SIZE=32
+CONFIG_PPC_MERGE=y
+CONFIG_MMU=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_TIME=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_HARDIRQS=y
+CONFIG_IRQ_PER_CPU=y
+CONFIG_RWSEM_XCHGADD_ALGORITHM=y
+CONFIG_ARCH_HAS_ILOG2_U32=y
+CONFIG_GENERIC_HWEIGHT=y
+CONFIG_GENERIC_CALIBRATE_DELAY=y
+CONFIG_GENERIC_FIND_NEXT_BIT=y
+# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
+CONFIG_PPC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_GENERIC_NVRAM=y
+CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_PPC_OF=y
+CONFIG_OF=y
+# CONFIG_PPC_UDBG_16550 is not set
+# CONFIG_GENERIC_TBSYNC is not set
+CONFIG_AUDIT_ARCH=y
+CONFIG_GENERIC_BUG=y
+# CONFIG_DEFAULT_UIMAGE is not set
+# CONFIG_PPC_DCR_NATIVE is not set
+# CONFIG_PPC_DCR_MMIO is not set
+CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
+
+#
+# General setup
+#
+CONFIG_EXPERIMENTAL=y
+CONFIG_BROKEN_ON_SMP=y
+CONFIG_INIT_ENV_ARG_LIMIT=32
+CONFIG_LOCALVERSION=""
+CONFIG_LOCALVERSION_AUTO=y
+CONFIG_SWAP=y
+CONFIG_SYSVIPC=y
+CONFIG_SYSVIPC_SYSCTL=y
+CONFIG_POSIX_MQUEUE=y
+# CONFIG_BSD_PROCESS_ACCT is not set
+# CONFIG_TASKSTATS is not set
+# CONFIG_USER_NS is not set
+# CONFIG_PID_NS is not set
+# CONFIG_AUDIT is not set
+# CONFIG_IKCONFIG is not set
+CONFIG_LOG_BUF_SHIFT=14
+# CONFIG_CGROUPS is not set
+# CONFIG_FAIR_GROUP_SCHED is not set
+# CONFIG_SYSFS_DEPRECATED is not set
+# CONFIG_RELAY is not set
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_INITRAMFS_SOURCE=""
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_SYSCTL=y
+# CONFIG_EMBEDDED is not set
+CONFIG_SYSCTL_SYSCALL=y
+CONFIG_KALLSYMS=y
+# CONFIG_KALLSYMS_EXTRA_PASS is not set
+CONFIG_HOTPLUG=y
+CONFIG_PRINTK=y
+CONFIG_BUG=y
+CONFIG_ELF_CORE=y
+CONFIG_BASE_FULL=y
+CONFIG_FUTEX=y
+CONFIG_ANON_INODES=y
+CONFIG_EPOLL=y
+CONFIG_SIGNALFD=y
+CONFIG_EVENTFD=y
+CONFIG_SHMEM=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_SLUB_DEBUG=y
+# CONFIG_SLAB is not set
+CONFIG_SLUB=y
+# CONFIG_SLOB is not set
+CONFIG_RT_MUTEXES=y
+# CONFIG_TINY_SHMEM is not set
+CONFIG_BASE_SMALL=0
+# CONFIG_MODULES is not set
+CONFIG_BLOCK=y
+CONFIG_LBD=y
+# CONFIG_BLK_DEV_IO_TRACE is not set
+# CONFIG_LSF is not set
+# CONFIG_BLK_DEV_BSG is not set
+
+#
+# IO Schedulers
+#
+CONFIG_IOSCHED_NOOP=y
+CONFIG_IOSCHED_AS=y
+# CONFIG_IOSCHED_DEADLINE is not set
+# CONFIG_IOSCHED_CFQ is not set
+CONFIG_DEFAULT_AS=y
+# CONFIG_DEFAULT_DEADLINE is not set
+# CONFIG_DEFAULT_CFQ is not set
+# CONFIG_DEFAULT_NOOP is not set
+CONFIG_DEFAULT_IOSCHED="anticipatory"
+
+#
+# Platform support
+#
+CONFIG_PPC_MULTIPLATFORM=y
+# CONFIG_PPC_82xx is not set
+# CONFIG_PPC_83xx is not set
+# CONFIG_PPC_86xx is not set
+CONFIG_CLASSIC32=y
+# CONFIG_PPC_CHRP is not set
+# CONFIG_PPC_MPC52xx is not set
+# CONFIG_PPC_MPC5200 is not set
+# CONFIG_PPC_EFIKA is not set
+# CONFIG_PPC_LITE5200 is not set
+# CONFIG_PPC_PMAC is not set
+# CONFIG_PPC_CELL is not set
+# CONFIG_PPC_CELL_NATIVE is not set
+# CONFIG_PQ2ADS is not set
+CONFIG_EMBEDDED6xx=y
+# CONFIG_LINKSTATION is not set
+# CONFIG_MPC7448HPC2 is not set
+# CONFIG_PPC_HOLLY is not set
+# CONFIG_PPC_PRPMC2800 is not set
+CONFIG_PPC_KATANA750I=y
+CONFIG_MV64X60=y
+# CONFIG_MPIC is not set
+# CONFIG_MPIC_WEIRD is not set
+# CONFIG_PPC_I8259 is not set
+# CONFIG_PPC_RTAS is not set
+# CONFIG_MMIO_NVRAM is not set
+# CONFIG_PPC_MPC106 is not set
+# CONFIG_PPC_970_NAP is not set
+# CONFIG_PPC_INDIRECT_IO is not set
+# CONFIG_GENERIC_IOMAP is not set
+# CONFIG_CPU_FREQ is not set
+# CONFIG_TAU is not set
+# CONFIG_CPM2 is not set
+# CONFIG_FSL_ULI1575 is not set
+
+#
+# Kernel options
+#
+CONFIG_HIGHMEM=y
+CONFIG_TICK_ONESHOT=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+# CONFIG_HZ_300 is not set
+# CONFIG_HZ_1000 is not set
+CONFIG_HZ=250
+CONFIG_PREEMPT_NONE=y
+# CONFIG_PREEMPT_VOLUNTARY is not set
+# CONFIG_PREEMPT is not set
+CONFIG_BINFMT_ELF=y
+CONFIG_BINFMT_MISC=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+# CONFIG_KEXEC is not set
+CONFIG_ARCH_FLATMEM_ENABLE=y
+CONFIG_ARCH_POPULATES_NODE_MAP=y
+CONFIG_SELECT_MEMORY_MODEL=y
+CONFIG_FLATMEM_MANUAL=y
+# CONFIG_DISCONTIGMEM_MANUAL is not set
+# CONFIG_SPARSEMEM_MANUAL is not set
+CONFIG_FLATMEM=y
+CONFIG_FLAT_NODE_MEM_MAP=y
+# CONFIG_SPARSEMEM_STATIC is not set
+# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_SPLIT_PTLOCK_CPUS=4
+# CONFIG_RESOURCES_64BIT is not set
+CONFIG_ZONE_DMA_FLAG=1
+CONFIG_BOUNCE=y
+CONFIG_VIRT_TO_BUS=y
+CONFIG_PROC_DEVICETREE=y
+# CONFIG_CMDLINE_BOOL is not set
+# CONFIG_PM is not set
+CONFIG_SUSPEND_UP_POSSIBLE=y
+CONFIG_HIBERNATION_UP_POSSIBLE=y
+# CONFIG_SECCOMP is not set
+CONFIG_WANT_DEVICE_TREE=y
+CONFIG_DEVICE_TREE="katana750i.dts"
+CONFIG_ISA_DMA_API=y
+
+#
+# Bus options
+#
+CONFIG_ZONE_DMA=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_PPC_INDIRECT_PCI=y
+CONFIG_PCI=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_SYSCALL=y
+# CONFIG_PCIEPORTBUS is not set
+CONFIG_ARCH_SUPPORTS_MSI=y
+# CONFIG_PCI_MSI is not set
+CONFIG_PCI_LEGACY=y
+# CONFIG_PCCARD is not set
+# CONFIG_HOTPLUG_PCI is not set
+
+#
+# Advanced setup
+#
+# CONFIG_ADVANCED_OPTIONS is not set
+
+#
+# Default settings for advanced configuration options are used
+#
+CONFIG_HIGHMEM_START=0xfe000000
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_KERNEL_START=0xc0000000
+CONFIG_TASK_SIZE=0xc0000000
+CONFIG_CONSISTENT_START=0xff100000
+CONFIG_CONSISTENT_SIZE=0x00200000
+CONFIG_BOOT_LOAD=0x00800000
+
+#
+# Networking
+#
+CONFIG_NET=y
+
+#
+# Networking options
+#
+CONFIG_PACKET=y
+# CONFIG_PACKET_MMAP is not set
+CONFIG_UNIX=y
+CONFIG_XFRM=y
+CONFIG_XFRM_USER=y
+# CONFIG_XFRM_SUB_POLICY is not set
+# CONFIG_XFRM_MIGRATE is not set
+# CONFIG_NET_KEY is not set
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+# CONFIG_IP_ADVANCED_ROUTER is not set
+CONFIG_IP_FIB_HASH=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+# CONFIG_IP_PNP_RARP is not set
+# CONFIG_NET_IPIP is not set
+# CONFIG_NET_IPGRE is not set
+# CONFIG_IP_MROUTE is not set
+# CONFIG_ARPD is not set
+CONFIG_SYN_COOKIES=y
+# CONFIG_INET_AH is not set
+# CONFIG_INET_ESP is not set
+# CONFIG_INET_IPCOMP is not set
+# CONFIG_INET_XFRM_TUNNEL is not set
+# CONFIG_INET_TUNNEL is not set
+CONFIG_INET_XFRM_MODE_TRANSPORT=y
+CONFIG_INET_XFRM_MODE_TUNNEL=y
+CONFIG_INET_XFRM_MODE_BEET=y
+# CONFIG_INET_LRO is not set
+CONFIG_INET_DIAG=y
+CONFIG_INET_TCP_DIAG=y
+# CONFIG_TCP_CONG_ADVANCED is not set
+CONFIG_TCP_CONG_CUBIC=y
+CONFIG_DEFAULT_TCP_CONG="cubic"
+# CONFIG_TCP_MD5SIG is not set
+# CONFIG_IPV6 is not set
+# CONFIG_INET6_XFRM_TUNNEL is not set
+# CONFIG_INET6_TUNNEL is not set
+# CONFIG_NETWORK_SECMARK is not set
+# CONFIG_NETFILTER is not set
+# CONFIG_IP_DCCP is not set
+# CONFIG_IP_SCTP is not set
+# CONFIG_TIPC is not set
+# CONFIG_ATM is not set
+# CONFIG_BRIDGE is not set
+# CONFIG_VLAN_8021Q is not set
+# CONFIG_DECNET is not set
+# CONFIG_LLC2 is not set
+# CONFIG_IPX is not set
+# CONFIG_ATALK is not set
+# CONFIG_X25 is not set
+# CONFIG_LAPB is not set
+# CONFIG_ECONET is not set
+# CONFIG_WAN_ROUTER is not set
+# CONFIG_NET_SCHED is not set
+
+#
+# Network testing
+#
+# CONFIG_NET_PKTGEN is not set
+# CONFIG_HAMRADIO is not set
+# CONFIG_IRDA is not set
+# CONFIG_BT is not set
+# CONFIG_AF_RXRPC is not set
+
+#
+# Wireless
+#
+# CONFIG_CFG80211 is not set
+# CONFIG_WIRELESS_EXT is not set
+# CONFIG_MAC80211 is not set
+# CONFIG_IEEE80211 is not set
+# CONFIG_RFKILL is not set
+# CONFIG_NET_9P is not set
+
+#
+# Device Drivers
+#
+
+#
+# Generic Driver Options
+#
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_STANDALONE=y
+CONFIG_PREVENT_FIRMWARE_BUILD=y
+# CONFIG_FW_LOADER is not set
+# CONFIG_SYS_HYPERVISOR is not set
+# CONFIG_CONNECTOR is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+CONFIG_MTD_CFI_INTELEXT=y
+# CONFIG_MTD_CFI_AMDSTD is not set
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+# CONFIG_MTD_NAND is not set
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
+CONFIG_OF_DEVICE=y
+# CONFIG_PARPORT is not set
+CONFIG_BLK_DEV=y
+# CONFIG_BLK_DEV_FD is not set
+# CONFIG_BLK_CPQ_DA is not set
+# CONFIG_BLK_CPQ_CISS_DA is not set
+# CONFIG_BLK_DEV_DAC960 is not set
+# CONFIG_BLK_DEV_UMEM is not set
+# CONFIG_BLK_DEV_COW_COMMON is not set
+CONFIG_BLK_DEV_LOOP=y
+# CONFIG_BLK_DEV_CRYPTOLOOP is not set
+# CONFIG_BLK_DEV_NBD is not set
+# CONFIG_BLK_DEV_SX8 is not set
+# CONFIG_BLK_DEV_UB is not set
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_COUNT=16
+CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
+# CONFIG_CDROM_PKTCDVD is not set
+# CONFIG_ATA_OVER_ETH is not set
+CONFIG_MISC_DEVICES=y
+# CONFIG_PHANTOM is not set
+# CONFIG_EEPROM_93CX6 is not set
+# CONFIG_SGI_IOC4 is not set
+# CONFIG_TIFM_CORE is not set
+CONFIG_IDE=y
+CONFIG_BLK_DEV_IDE=y
+
+#
+# Please see Documentation/ide.txt for help/info on IDE drives
+#
+# CONFIG_BLK_DEV_IDE_SATA is not set
+CONFIG_BLK_DEV_IDEDISK=y
+# CONFIG_IDEDISK_MULTI_MODE is not set
+# CONFIG_BLK_DEV_IDECD is not set
+# CONFIG_BLK_DEV_IDETAPE is not set
+# CONFIG_BLK_DEV_IDEFLOPPY is not set
+# CONFIG_BLK_DEV_IDESCSI is not set
+# CONFIG_IDE_TASK_IOCTL is not set
+CONFIG_IDE_PROC_FS=y
+
+#
+# IDE chipset support/bugfixes
+#
+CONFIG_IDE_GENERIC=y
+# CONFIG_BLK_DEV_PLATFORM is not set
+
+#
+# PCI IDE chipsets support
+#
+CONFIG_BLK_DEV_IDEPCI=y
+# CONFIG_IDEPCI_SHARE_IRQ is not set
+CONFIG_IDEPCI_PCIBUS_ORDER=y
+# CONFIG_BLK_DEV_OFFBOARD is not set
+CONFIG_BLK_DEV_GENERIC=y
+# CONFIG_BLK_DEV_OPTI621 is not set
+CONFIG_BLK_DEV_IDEDMA_PCI=y
+# CONFIG_BLK_DEV_AEC62XX is not set
+# CONFIG_BLK_DEV_ALI15X3 is not set
+# CONFIG_BLK_DEV_AMD74XX is not set
+# CONFIG_BLK_DEV_CMD64X is not set
+# CONFIG_BLK_DEV_TRIFLEX is not set
+# CONFIG_BLK_DEV_CY82C693 is not set
+# CONFIG_BLK_DEV_CS5520 is not set
+# CONFIG_BLK_DEV_CS5530 is not set
+# CONFIG_BLK_DEV_HPT34X is not set
+# CONFIG_BLK_DEV_HPT366 is not set
+# CONFIG_BLK_DEV_JMICRON is not set
+# CONFIG_BLK_DEV_SC1200 is not set
+# CONFIG_BLK_DEV_PIIX is not set
+# CONFIG_BLK_DEV_IT8213 is not set
+# CONFIG_BLK_DEV_IT821X is not set
+# CONFIG_BLK_DEV_NS87415 is not set
+# CONFIG_BLK_DEV_PDC202XX_OLD is not set
+CONFIG_BLK_DEV_PDC202XX_NEW=y
+# CONFIG_BLK_DEV_SVWKS is not set
+# CONFIG_BLK_DEV_SIIMAGE is not set
+# CONFIG_BLK_DEV_SL82C105 is not set
+# CONFIG_BLK_DEV_SLC90E66 is not set
+# CONFIG_BLK_DEV_TRM290 is not set
+# CONFIG_BLK_DEV_VIA82CXXX is not set
+# CONFIG_BLK_DEV_TC86C001 is not set
+# CONFIG_IDE_ARM is not set
+CONFIG_BLK_DEV_IDEDMA=y
+CONFIG_IDE_ARCH_OBSOLETE_INIT=y
+# CONFIG_BLK_DEV_HD is not set
+
+#
+# SCSI device support
+#
+# CONFIG_RAID_ATTRS is not set
+CONFIG_SCSI=y
+CONFIG_SCSI_DMA=y
+# CONFIG_SCSI_TGT is not set
+# CONFIG_SCSI_NETLINK is not set
+CONFIG_SCSI_PROC_FS=y
+
+#
+# SCSI support type (disk, tape, CD-ROM)
+#
+CONFIG_BLK_DEV_SD=y
+# CONFIG_CHR_DEV_ST is not set
+# CONFIG_CHR_DEV_OSST is not set
+# CONFIG_BLK_DEV_SR is not set
+# CONFIG_CHR_DEV_SG is not set
+# CONFIG_CHR_DEV_SCH is not set
+
+#
+# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
+#
+# CONFIG_SCSI_MULTI_LUN is not set
+# CONFIG_SCSI_CONSTANTS is not set
+# CONFIG_SCSI_LOGGING is not set
+# CONFIG_SCSI_SCAN_ASYNC is not set
+
+#
+# SCSI Transports
+#
+# CONFIG_SCSI_SPI_ATTRS is not set
+# CONFIG_SCSI_FC_ATTRS is not set
+# CONFIG_SCSI_ISCSI_ATTRS is not set
+# CONFIG_SCSI_SAS_LIBSAS is not set
+# CONFIG_SCSI_SRP_ATTRS is not set
+CONFIG_SCSI_LOWLEVEL=y
+# CONFIG_ISCSI_TCP is not set
+# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
+# CONFIG_SCSI_3W_9XXX is not set
+# CONFIG_SCSI_ACARD is not set
+# CONFIG_SCSI_AACRAID is not set
+# CONFIG_SCSI_AIC7XXX is not set
+# CONFIG_SCSI_AIC7XXX_OLD is not set
+# CONFIG_SCSI_AIC79XX is not set
+# CONFIG_SCSI_AIC94XX is not set
+# CONFIG_SCSI_DPT_I2O is not set
+# CONFIG_SCSI_ADVANSYS is not set
+# CONFIG_SCSI_ARCMSR is not set
+# CONFIG_MEGARAID_NEWGEN is not set
+# CONFIG_MEGARAID_LEGACY is not set
+# CONFIG_MEGARAID_SAS is not set
+# CONFIG_SCSI_HPTIOP is not set
+# CONFIG_SCSI_BUSLOGIC is not set
+# CONFIG_SCSI_DMX3191D is not set
+# CONFIG_SCSI_EATA is not set
+# CONFIG_SCSI_FUTURE_DOMAIN is not set
+# CONFIG_SCSI_GDTH is not set
+# CONFIG_SCSI_IPS is not set
+# CONFIG_SCSI_INITIO is not set
+# CONFIG_SCSI_INIA100 is not set
+# CONFIG_SCSI_STEX is not set
+# CONFIG_SCSI_SYM53C8XX_2 is not set
+# CONFIG_SCSI_IPR is not set
+# CONFIG_SCSI_QLOGIC_1280 is not set
+# CONFIG_SCSI_QLA_FC is not set
+# CONFIG_SCSI_QLA_ISCSI is not set
+# CONFIG_SCSI_LPFC is not set
+# CONFIG_SCSI_DC395x is not set
+# CONFIG_SCSI_DC390T is not set
+# CONFIG_SCSI_NSP32 is not set
+# CONFIG_SCSI_DEBUG is not set
+# CONFIG_SCSI_SRP is not set
+CONFIG_ATA=y
+# CONFIG_ATA_NONSTANDARD is not set
+# CONFIG_SATA_AHCI is not set
+# CONFIG_SATA_SVW is not set
+# CONFIG_ATA_PIIX is not set
+CONFIG_SATA_MV=y
+# CONFIG_SATA_NV is not set
+# CONFIG_PDC_ADMA is not set
+# CONFIG_SATA_QSTOR is not set
+# CONFIG_SATA_PROMISE is not set
+# CONFIG_SATA_SX4 is not set
+# CONFIG_SATA_SIL is not set
+# CONFIG_SATA_SIL24 is not set
+# CONFIG_SATA_SIS is not set
+# CONFIG_SATA_ULI is not set
+# CONFIG_SATA_VIA is not set
+# CONFIG_SATA_VITESSE is not set
+# CONFIG_SATA_INIC162X is not set
+# CONFIG_PATA_ALI is not set
+# CONFIG_PATA_AMD is not set
+# CONFIG_PATA_ARTOP is not set
+# CONFIG_PATA_ATIIXP is not set
+# CONFIG_PATA_CMD640_PCI is not set
+# CONFIG_PATA_CMD64X is not set
+# CONFIG_PATA_CS5520 is not set
+# CONFIG_PATA_CS5530 is not set
+# CONFIG_PATA_CYPRESS is not set
+# CONFIG_PATA_EFAR is not set
+# CONFIG_ATA_GENERIC is not set
+# CONFIG_PATA_HPT366 is not set
+# CONFIG_PATA_HPT37X is not set
+# CONFIG_PATA_HPT3X2N is not set
+# CONFIG_PATA_HPT3X3 is not set
+# CONFIG_PATA_IT821X is not set
+# CONFIG_PATA_IT8213 is not set
+# CONFIG_PATA_JMICRON is not set
+# CONFIG_PATA_TRIFLEX is not set
+# CONFIG_PATA_MARVELL is not set
+# CONFIG_PATA_MPIIX is not set
+# CONFIG_PATA_OLDPIIX is not set
+# CONFIG_PATA_NETCELL is not set
+# CONFIG_PATA_NS87410 is not set
+# CONFIG_PATA_NS87415 is not set
+# CONFIG_PATA_OPTI is not set
+# CONFIG_PATA_OPTIDMA is not set
+# CONFIG_PATA_PDC_OLD is not set
+# CONFIG_PATA_RADISYS is not set
+# CONFIG_PATA_RZ1000 is not set
+# CONFIG_PATA_SC1200 is not set
+# CONFIG_PATA_SERVERWORKS is not set
+# CONFIG_PATA_PDC2027X is not set
+# CONFIG_PATA_SIL680 is not set
+# CONFIG_PATA_SIS is not set
+# CONFIG_PATA_VIA is not set
+# CONFIG_PATA_WINBOND is not set
+# CONFIG_MD is not set
+# CONFIG_FUSION is not set
+
+#
+# IEEE 1394 (FireWire) support
+#
+# CONFIG_FIREWIRE is not set
+# CONFIG_IEEE1394 is not set
+# CONFIG_I2O is not set
+CONFIG_MACINTOSH_DRIVERS=y
+# CONFIG_MAC_EMUMOUSEBTN is not set
+# CONFIG_WINDFARM is not set
+CONFIG_NETDEVICES=y
+# CONFIG_NETDEVICES_MULTIQUEUE is not set
+# CONFIG_DUMMY is not set
+# CONFIG_BONDING is not set
+# CONFIG_MACVLAN is not set
+# CONFIG_EQUALIZER is not set
+# CONFIG_TUN is not set
+# CONFIG_VETH is not set
+# CONFIG_IP1000 is not set
+# CONFIG_ARCNET is not set
+CONFIG_PHYLIB=y
+
+#
+# MII PHY device drivers
+#
+# CONFIG_MARVELL_PHY is not set
+# CONFIG_DAVICOM_PHY is not set
+# CONFIG_QSEMI_PHY is not set
+# CONFIG_LXT_PHY is not set
+# CONFIG_CICADA_PHY is not set
+# CONFIG_VITESSE_PHY is not set
+# CONFIG_SMSC_PHY is not set
+# CONFIG_BROADCOM_PHY is not set
+# CONFIG_ICPLUS_PHY is not set
+# CONFIG_FIXED_PHY is not set
+# CONFIG_MDIO_BITBANG is not set
+CONFIG_NET_ETHERNET=y
+CONFIG_MII=y
+# CONFIG_HAPPYMEAL is not set
+# CONFIG_SUNGEM is not set
+# CONFIG_CASSINI is not set
+# CONFIG_NET_VENDOR_3COM is not set
+# CONFIG_NET_TULIP is not set
+# CONFIG_HP100 is not set
+# CONFIG_IBM_NEW_EMAC_ZMII is not set
+# CONFIG_IBM_NEW_EMAC_RGMII is not set
+# CONFIG_IBM_NEW_EMAC_TAH is not set
+# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
+CONFIG_NET_PCI=y
+# CONFIG_PCNET32 is not set
+# CONFIG_AMD8111_ETH is not set
+# CONFIG_ADAPTEC_STARFIRE is not set
+# CONFIG_B44 is not set
+# CONFIG_FORCEDETH is not set
+# CONFIG_EEPRO100 is not set
+CONFIG_E100=y
+# CONFIG_FEALNX is not set
+# CONFIG_NATSEMI is not set
+# CONFIG_NE2K_PCI is not set
+# CONFIG_8139CP is not set
+CONFIG_8139TOO=y
+# CONFIG_8139TOO_PIO is not set
+# CONFIG_8139TOO_TUNE_TWISTER is not set
+# CONFIG_8139TOO_8129 is not set
+# CONFIG_8139_OLD_RX_RESET is not set
+# CONFIG_SIS900 is not set
+# CONFIG_EPIC100 is not set
+# CONFIG_SUNDANCE is not set
+# CONFIG_TLAN is not set
+# CONFIG_VIA_RHINE is not set
+# CONFIG_SC92031 is not set
+CONFIG_NETDEV_1000=y
+# CONFIG_ACENIC is not set
+# CONFIG_DL2K is not set
+CONFIG_E1000=y
+# CONFIG_E1000_NAPI is not set
+# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
+# CONFIG_E1000E is not set
+# CONFIG_NS83820 is not set
+# CONFIG_HAMACHI is not set
+# CONFIG_YELLOWFIN is not set
+# CONFIG_R8169 is not set
+# CONFIG_SIS190 is not set
+# CONFIG_SKGE is not set
+# CONFIG_SKY2 is not set
+# CONFIG_SK98LIN is not set
+# CONFIG_VIA_VELOCITY is not set
+# CONFIG_TIGON3 is not set
+# CONFIG_BNX2 is not set
+CONFIG_MV643XX_ETH=y
+# CONFIG_QLA3XXX is not set
+# CONFIG_ATL1 is not set
+CONFIG_NETDEV_10000=y
+# CONFIG_CHELSIO_T1 is not set
+# CONFIG_CHELSIO_T3 is not set
+# CONFIG_IXGBE is not set
+# CONFIG_IXGB is not set
+# CONFIG_S2IO is not set
+# CONFIG_MYRI10GE is not set
+# CONFIG_NETXEN_NIC is not set
+# CONFIG_NIU is not set
+# CONFIG_MLX4_CORE is not set
+# CONFIG_TEHUTI is not set
+# CONFIG_TR is not set
+
+#
+# Wireless LAN
+#
+# CONFIG_WLAN_PRE80211 is not set
+# CONFIG_WLAN_80211 is not set
+
+#
+# USB Network Adapters
+#
+# CONFIG_USB_CATC is not set
+# CONFIG_USB_KAWETH is not set
+# CONFIG_USB_PEGASUS is not set
+# CONFIG_USB_RTL8150 is not set
+# CONFIG_USB_USBNET is not set
+# CONFIG_WAN is not set
+# CONFIG_FDDI is not set
+# CONFIG_HIPPI is not set
+# CONFIG_PPP is not set
+# CONFIG_SLIP is not set
+# CONFIG_NET_FC is not set
+# CONFIG_SHAPER is not set
+# CONFIG_NETCONSOLE is not set
+# CONFIG_NETPOLL is not set
+# CONFIG_NET_POLL_CONTROLLER is not set
+# CONFIG_ISDN is not set
+# CONFIG_PHONE is not set
+
+#
+# Input device support
+#
+CONFIG_INPUT=y
+# CONFIG_INPUT_FF_MEMLESS is not set
+# CONFIG_INPUT_POLLDEV is not set
+
+#
+# Userland interfaces
+#
+CONFIG_INPUT_MOUSEDEV=y
+CONFIG_INPUT_MOUSEDEV_PSAUX=y
+CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
+CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
+# CONFIG_INPUT_JOYDEV is not set
+# CONFIG_INPUT_EVDEV is not set
+# CONFIG_INPUT_EVBUG is not set
+
+#
+# Input Device Drivers
+#
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+# CONFIG_INPUT_JOYSTICK is not set
+# CONFIG_INPUT_TABLET is not set
+# CONFIG_INPUT_TOUCHSCREEN is not set
+# CONFIG_INPUT_MISC is not set
+
+#
+# Hardware I/O ports
+#
+# CONFIG_SERIO is not set
+# CONFIG_GAMEPORT is not set
+
+#
+# Character devices
+#
+CONFIG_VT=y
+CONFIG_VT_CONSOLE=y
+CONFIG_HW_CONSOLE=y
+# CONFIG_VT_HW_CONSOLE_BINDING is not set
+# CONFIG_SERIAL_NONSTANDARD is not set
+
+#
+# Serial drivers
+#
+# CONFIG_SERIAL_8250 is not set
+
+#
+# Non-8250 serial port support
+#
+CONFIG_SERIAL_MPSC=y
+CONFIG_SERIAL_MPSC_CONSOLE=y
+# CONFIG_SERIAL_UARTLITE is not set
+CONFIG_SERIAL_CORE=y
+CONFIG_SERIAL_CORE_CONSOLE=y
+# CONFIG_SERIAL_JSM is not set
+CONFIG_UNIX98_PTYS=y
+CONFIG_LEGACY_PTYS=y
+CONFIG_LEGACY_PTY_COUNT=256
+# CONFIG_IPMI_HANDLER is not set
+# CONFIG_HW_RANDOM is not set
+# CONFIG_NVRAM is not set
+CONFIG_GEN_RTC=y
+# CONFIG_GEN_RTC_X is not set
+# CONFIG_R3964 is not set
+# CONFIG_APPLICOM is not set
+# CONFIG_RAW_DRIVER is not set
+# CONFIG_TCG_TPM is not set
+CONFIG_DEVPORT=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+
+#
+# I2C Algorithms
+#
+# CONFIG_I2C_ALGOBIT is not set
+# CONFIG_I2C_ALGOPCF is not set
+# CONFIG_I2C_ALGOPCA is not set
+
+#
+# I2C Hardware Bus support
+#
+# CONFIG_I2C_ALI1535 is not set
+# CONFIG_I2C_ALI1563 is not set
+# CONFIG_I2C_ALI15X3 is not set
+# CONFIG_I2C_AMD756 is not set
+# CONFIG_I2C_AMD8111 is not set
+# CONFIG_I2C_I801 is not set
+# CONFIG_I2C_I810 is not set
+# CONFIG_I2C_PIIX4 is not set
+# CONFIG_I2C_MPC is not set
+# CONFIG_I2C_NFORCE2 is not set
+# CONFIG_I2C_OCORES is not set
+# CONFIG_I2C_PARPORT_LIGHT is not set
+# CONFIG_I2C_PROSAVAGE is not set
+# CONFIG_I2C_SAVAGE4 is not set
+# CONFIG_I2C_SIMTEC is not set
+# CONFIG_I2C_SIS5595 is not set
+# CONFIG_I2C_SIS630 is not set
+# CONFIG_I2C_SIS96X is not set
+# CONFIG_I2C_TAOS_EVM is not set
+# CONFIG_I2C_TINY_USB is not set
+# CONFIG_I2C_VIA is not set
+# CONFIG_I2C_VIAPRO is not set
+# CONFIG_I2C_VOODOO3 is not set
+CONFIG_I2C_MV64XXX=y
+
+#
+# Miscellaneous I2C Chip support
+#
+# CONFIG_SENSORS_DS1337 is not set
+# CONFIG_SENSORS_DS1374 is not set
+# CONFIG_DS1682 is not set
+# CONFIG_SENSORS_EEPROM is not set
+# CONFIG_SENSORS_PCF8574 is not set
+# CONFIG_SENSORS_PCA9539 is not set
+# CONFIG_SENSORS_PCF8591 is not set
+# CONFIG_SENSORS_M41T00 is not set
+# CONFIG_SENSORS_MAX6875 is not set
+# CONFIG_SENSORS_TSL2550 is not set
+# CONFIG_I2C_DEBUG_CORE is not set
+# CONFIG_I2C_DEBUG_ALGO is not set
+# CONFIG_I2C_DEBUG_BUS is not set
+# CONFIG_I2C_DEBUG_CHIP is not set
+
+#
+# SPI support
+#
+# CONFIG_SPI is not set
+# CONFIG_SPI_MASTER is not set
+# CONFIG_W1 is not set
+# CONFIG_POWER_SUPPLY is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+# CONFIG_SENSORS_LM75 is not set
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
+# CONFIG_WATCHDOG is not set
+
+#
+# Sonics Silicon Backplane
+#
+CONFIG_SSB_POSSIBLE=y
+# CONFIG_SSB is not set
+
+#
+# Multifunction device drivers
+#
+# CONFIG_MFD_SM501 is not set
+
+#
+# Multimedia devices
+#
+# CONFIG_VIDEO_DEV is not set
+# CONFIG_DVB_CORE is not set
+# CONFIG_DAB is not set
+
+#
+# Graphics support
+#
+# CONFIG_AGP is not set
+# CONFIG_DRM is not set
+# CONFIG_VGASTATE is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_FB is not set
+# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
+
+#
+# Display device support
+#
+# CONFIG_DISPLAY_SUPPORT is not set
+
+#
+# Console display driver support
+#
+CONFIG_VGA_CONSOLE=y
+# CONFIG_VGACON_SOFT_SCROLLBACK is not set
+CONFIG_DUMMY_CONSOLE=y
+
+#
+# Sound
+#
+# CONFIG_SOUND is not set
+CONFIG_HID_SUPPORT=y
+CONFIG_HID=y
+# CONFIG_HID_DEBUG is not set
+# CONFIG_HIDRAW is not set
+
+#
+# USB Input Devices
+#
+CONFIG_USB_HID=y
+# CONFIG_USB_HIDINPUT_POWERBOOK is not set
+# CONFIG_HID_FF is not set
+# CONFIG_USB_HIDDEV is not set
+CONFIG_USB_SUPPORT=y
+CONFIG_USB_ARCH_HAS_HCD=y
+CONFIG_USB_ARCH_HAS_OHCI=y
+CONFIG_USB_ARCH_HAS_EHCI=y
+CONFIG_USB=y
+# CONFIG_USB_DEBUG is not set
+
+#
+# Miscellaneous USB options
+#
+CONFIG_USB_DEVICEFS=y
+# CONFIG_USB_DEVICE_CLASS is not set
+# CONFIG_USB_DYNAMIC_MINORS is not set
+# CONFIG_USB_OTG is not set
+
+#
+# USB Host Controller Drivers
+#
+CONFIG_USB_EHCI_HCD=y
+# CONFIG_USB_EHCI_SPLIT_ISO is not set
+# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
+# CONFIG_USB_EHCI_TT_NEWSCHED is not set
+# CONFIG_USB_ISP116X_HCD is not set
+CONFIG_USB_OHCI_HCD=y
+# CONFIG_USB_OHCI_HCD_PPC_OF is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
+# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
+CONFIG_USB_OHCI_LITTLE_ENDIAN=y
+# CONFIG_USB_UHCI_HCD is not set
+# CONFIG_USB_SL811_HCD is not set
+# CONFIG_USB_R8A66597_HCD is not set
+
+#
+# USB Device Class drivers
+#
+# CONFIG_USB_ACM is not set
+# CONFIG_USB_PRINTER is not set
+
+#
+# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
+#
+
+#
+# may also be needed; see USB_STORAGE Help for more information
+#
+# CONFIG_USB_STORAGE is not set
+# CONFIG_USB_LIBUSUAL is not set
+
+#
+# USB Imaging devices
+#
+# CONFIG_USB_MDC800 is not set
+# CONFIG_USB_MICROTEK is not set
+CONFIG_USB_MON=y
+
+#
+# USB port drivers
+#
+
+#
+# USB Serial Converter support
+#
+# CONFIG_USB_SERIAL is not set
+
+#
+# USB Miscellaneous drivers
+#
+# CONFIG_USB_EMI62 is not set
+# CONFIG_USB_EMI26 is not set
+# CONFIG_USB_ADUTUX is not set
+# CONFIG_USB_AUERSWALD is not set
+# CONFIG_USB_RIO500 is not set
+# CONFIG_USB_LEGOTOWER is not set
+# CONFIG_USB_LCD is not set
+# CONFIG_USB_BERRY_CHARGE is not set
+# CONFIG_USB_LED is not set
+# CONFIG_USB_CYPRESS_CY7C63 is not set
+# CONFIG_USB_CYTHERM is not set
+# CONFIG_USB_PHIDGET is not set
+# CONFIG_USB_IDMOUSE is not set
+# CONFIG_USB_FTDI_ELAN is not set
+# CONFIG_USB_APPLEDISPLAY is not set
+# CONFIG_USB_SISUSBVGA is not set
+# CONFIG_USB_LD is not set
+# CONFIG_USB_TRANCEVIBRATOR is not set
+# CONFIG_USB_IOWARRIOR is not set
+# CONFIG_USB_TEST is not set
+
+#
+# USB DSL modem support
+#
+
+#
+# USB Gadget Support
+#
+# CONFIG_USB_GADGET is not set
+# CONFIG_MMC is not set
+# CONFIG_NEW_LEDS is not set
+# CONFIG_INFINIBAND is not set
+# CONFIG_EDAC is not set
+CONFIG_RTC_LIB=y
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_HCTOSYS=y
+CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
+# CONFIG_RTC_DEBUG is not set
+
+#
+# RTC interfaces
+#
+CONFIG_RTC_INTF_SYSFS=y
+CONFIG_RTC_INTF_PROC=y
+CONFIG_RTC_INTF_DEV=y
+# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
+# CONFIG_RTC_DRV_TEST is not set
+
+#
+# I2C RTC drivers
+#
+CONFIG_RTC_DRV_DS1307=y
+# CONFIG_RTC_DRV_DS1374 is not set
+# CONFIG_RTC_DRV_DS1672 is not set
+# CONFIG_RTC_DRV_MAX6900 is not set
+# CONFIG_RTC_DRV_RS5C372 is not set
+# CONFIG_RTC_DRV_ISL1208 is not set
+# CONFIG_RTC_DRV_X1205 is not set
+# CONFIG_RTC_DRV_PCF8563 is not set
+# CONFIG_RTC_DRV_PCF8583 is not set
+# CONFIG_RTC_DRV_M41T80 is not set
+
+#
+# SPI RTC drivers
+#
+
+#
+# Platform RTC drivers
+#
+# CONFIG_RTC_DRV_CMOS is not set
+# CONFIG_RTC_DRV_DS1553 is not set
+# CONFIG_RTC_DRV_STK17TA8 is not set
+# CONFIG_RTC_DRV_DS1742 is not set
+# CONFIG_RTC_DRV_M48T86 is not set
+# CONFIG_RTC_DRV_M48T59 is not set
+# CONFIG_RTC_DRV_V3020 is not set
+
+#
+# on-CPU RTC drivers
+#
+
+#
+# Userspace I/O
+#
+# CONFIG_UIO is not set
+
+#
+# File systems
+#
+CONFIG_EXT2_FS=y
+# CONFIG_EXT2_FS_XATTR is not set
+# CONFIG_EXT2_FS_XIP is not set
+CONFIG_EXT3_FS=y
+CONFIG_EXT3_FS_XATTR=y
+# CONFIG_EXT3_FS_POSIX_ACL is not set
+# CONFIG_EXT3_FS_SECURITY is not set
+# CONFIG_EXT4DEV_FS is not set
+CONFIG_JBD=y
+CONFIG_FS_MBCACHE=y
+# CONFIG_REISERFS_FS is not set
+# CONFIG_JFS_FS is not set
+# CONFIG_FS_POSIX_ACL is not set
+# CONFIG_XFS_FS is not set
+# CONFIG_GFS2_FS is not set
+# CONFIG_OCFS2_FS is not set
+# CONFIG_MINIX_FS is not set
+# CONFIG_ROMFS_FS is not set
+CONFIG_INOTIFY=y
+CONFIG_INOTIFY_USER=y
+# CONFIG_QUOTA is not set
+CONFIG_DNOTIFY=y
+# CONFIG_AUTOFS_FS is not set
+# CONFIG_AUTOFS4_FS is not set
+# CONFIG_FUSE_FS is not set
+
+#
+# CD-ROM/DVD Filesystems
+#
+# CONFIG_ISO9660_FS is not set
+# CONFIG_UDF_FS is not set
+
+#
+# DOS/FAT/NT Filesystems
+#
+# CONFIG_MSDOS_FS is not set
+# CONFIG_VFAT_FS is not set
+# CONFIG_NTFS_FS is not set
+
+#
+# Pseudo filesystems
+#
+CONFIG_PROC_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_PROC_SYSCTL=y
+CONFIG_SYSFS=y
+CONFIG_TMPFS=y
+# CONFIG_TMPFS_POSIX_ACL is not set
+# CONFIG_HUGETLB_PAGE is not set
+# CONFIG_CONFIGFS_FS is not set
+
+#
+# Miscellaneous filesystems
+#
+# CONFIG_ADFS_FS is not set
+# CONFIG_AFFS_FS is not set
+# CONFIG_HFS_FS is not set
+# CONFIG_HFSPLUS_FS is not set
+# CONFIG_BEFS_FS is not set
+# CONFIG_BFS_FS is not set
+# CONFIG_EFS_FS is not set
+# CONFIG_JFFS2_FS is not set
+# CONFIG_CRAMFS is not set
+# CONFIG_VXFS_FS is not set
+# CONFIG_HPFS_FS is not set
+# CONFIG_QNX4FS_FS is not set
+# CONFIG_SYSV_FS is not set
+# CONFIG_UFS_FS is not set
+CONFIG_NETWORK_FILESYSTEMS=y
+CONFIG_NFS_FS=y
+# CONFIG_NFS_V3 is not set
+# CONFIG_NFS_V4 is not set
+# CONFIG_NFS_DIRECTIO is not set
+# CONFIG_NFSD is not set
+CONFIG_ROOT_NFS=y
+CONFIG_LOCKD=y
+CONFIG_NFS_COMMON=y
+CONFIG_SUNRPC=y
+# CONFIG_SUNRPC_BIND34 is not set
+# CONFIG_RPCSEC_GSS_KRB5 is not set
+# CONFIG_RPCSEC_GSS_SPKM3 is not set
+# CONFIG_SMB_FS is not set
+# CONFIG_CIFS is not set
+# CONFIG_NCP_FS is not set
+# CONFIG_CODA_FS is not set
+# CONFIG_AFS_FS is not set
+
+#
+# Partition Types
+#
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_ACORN_PARTITION is not set
+# CONFIG_OSF_PARTITION is not set
+# CONFIG_AMIGA_PARTITION is not set
+# CONFIG_ATARI_PARTITION is not set
+# CONFIG_MAC_PARTITION is not set
+CONFIG_MSDOS_PARTITION=y
+# CONFIG_BSD_DISKLABEL is not set
+# CONFIG_MINIX_SUBPARTITION is not set
+# CONFIG_SOLARIS_X86_PARTITION is not set
+# CONFIG_UNIXWARE_DISKLABEL is not set
+# CONFIG_LDM_PARTITION is not set
+# CONFIG_SGI_PARTITION is not set
+# CONFIG_ULTRIX_PARTITION is not set
+# CONFIG_SUN_PARTITION is not set
+# CONFIG_KARMA_PARTITION is not set
+# CONFIG_EFI_PARTITION is not set
+# CONFIG_SYSV68_PARTITION is not set
+# CONFIG_NLS is not set
+# CONFIG_DLM is not set
+# CONFIG_UCC_SLOW is not set
+
+#
+# Library routines
+#
+CONFIG_BITREVERSE=y
+# CONFIG_CRC_CCITT is not set
+# CONFIG_CRC16 is not set
+# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC32=y
+# CONFIG_CRC7 is not set
+# CONFIG_LIBCRC32C is not set
+CONFIG_PLIST=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT=y
+CONFIG_HAS_DMA=y
+# CONFIG_INSTRUMENTATION is not set
+
+#
+# Kernel hacking
+#
+# CONFIG_PRINTK_TIME is not set
+CONFIG_ENABLE_WARN_DEPRECATED=y
+CONFIG_ENABLE_MUST_CHECK=y
+# CONFIG_MAGIC_SYSRQ is not set
+# CONFIG_UNUSED_SYMBOLS is not set
+# CONFIG_DEBUG_FS is not set
+# CONFIG_HEADERS_CHECK is not set
+# CONFIG_DEBUG_KERNEL is not set
+# CONFIG_SLUB_DEBUG_ON is not set
+CONFIG_DEBUG_BUGVERBOSE=y
+# CONFIG_SAMPLES is not set
+# CONFIG_BOOTX_TEXT is not set
+# CONFIG_PPC_EARLY_DEBUG is not set
+
+#
+# Security options
+#
+# CONFIG_KEYS is not set
+# CONFIG_SECURITY is not set
+# CONFIG_SECURITY_FILE_CAPABILITIES is not set
+# CONFIG_CRYPTO is not set
+# CONFIG_PPC_CLOCK is not set
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 8924095..7e0d9ec 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -46,6 +46,16 @@ config PPC_PRPMC2800
 	help
 	  This option enables support for the Motorola PrPMC2800 board
 
+config PPC_KATANA750I
+	bool "Emerson-Katana750i"
+	depends on EMBEDDED6xx
+	select MV64X60
+	select NOT_COHERENT_CACHE
+	select WANT_DEVICE_TREE
+	help
+	  This option enables support for the Emerson Katana-750i and
+	  Katana-752i platforms.
+
 config TSI108_BRIDGE
 	bool
 	depends on MPC7448HPC2 || PPC_HOLLY
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile
index 844947c..6ede1de 100644
--- a/arch/powerpc/platforms/embedded6xx/Makefile
+++ b/arch/powerpc/platforms/embedded6xx/Makefile
@@ -5,3 +5,4 @@ obj-$(CONFIG_MPC7448HPC2)	+= mpc7448_hpc2.o
 obj-$(CONFIG_LINKSTATION)	+= linkstation.o ls_uart.o
 obj-$(CONFIG_PPC_HOLLY)		+= holly.o
 obj-$(CONFIG_PPC_PRPMC2800)	+= prpmc2800.o
+obj-$(CONFIG_PPC_KATANA750I)	+= katana750i.o
diff --git a/arch/powerpc/platforms/embedded6xx/katana750i.c b/arch/powerpc/platforms/embedded6xx/katana750i.c
new file mode 100644
index 0000000..7368aea
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/katana750i.c
@@ -0,0 +1,312 @@
+/*
+ * Board setup routines for the Emerson Katana-750i/752i
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * Based on code prpmc2800.c by Dale Farnsworth <dale@farnsworth.org>
+ * and original katana port by Tim Montgomery <timm@artesyncp.com>
+ *
+ * Copyright (C) Emerson.
+ * Copyright (C) MontaVista Software, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/stddef.h>
+#include <linux/kernel.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/i2c.h>
+#include <linux/seq_file.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/prom.h>
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/pci-bridge.h>
+#include <asm/kexec.h>
+
+#include <mm/mmu_decl.h>
+
+#include <sysdev/mv64x60.h>
+
+#define MV64X60_MPP_CNTL_0		0x0000
+#define MV64X60_MPP_CNTL_2		0x0008
+
+#define MV64X60_GPP_IO_CNTL		0x0000
+#define MV64X60_GPP_LEVEL_CNTL		0x0010
+#define MV64X60_GPP_VALUE_SET		0x0018
+
+#define MV64X60_PCICFG_CPCI_HOTSWAP	0x0068
+#define MV64X60_PCICFG_CPCI_HOTSWAP_LOO	(1 << 19)
+
+#define CPLD_RST_CMD			0x00001000
+#define CPLD_RST_CMD_HR			0x01
+#define CPLD_PRODUCT_ID			0x00004000
+#define CPLD_HARDWARE_VER		0x00007000
+#define CPLD_PLD_VER			0x00008000
+#define CPLD_RESET_OUT			0x0000e000
+#define CPLD_RESET_OUT_PORTSEL		0x80
+
+#define HSL_PLD_BASE			0x00010000
+#define HSL_PLD_HOT_SWAP_OFF		6
+#define HSL_PLD_HOT_SWAP_LED_BIT	0x1
+
+#define PLATFORM_NAME_MAX		32
+
+typedef enum {
+	LED_OFF,
+	LED_ON,
+} led_cmd;
+
+typedef enum { /* Type of Katana board */
+	KATANA750I_BD_TYPE_750I,
+	KATANA750I_BD_TYPE_752I,
+} bd_type;
+
+static bd_type board_type;
+
+static char katana750i_platform_name[PLATFORM_NAME_MAX];
+
+static void __iomem *cpld_base;
+
+
+static void katana750i_set_led(led_cmd cmd)
+{
+	/* Turn on blue LED to indicate its okay to remove */
+	if (board_type == KATANA750I_BD_TYPE_750I) {
+		struct pci_controller *hose;
+		u32 hs;
+
+		hose = mv64x60_find_hose(0);
+		if (!hose)
+			return;
+
+		early_read_config_dword(hose, 0, PCI_DEVFN(0, 0),
+			MV64X60_PCICFG_CPCI_HOTSWAP, &hs);
+
+		if (cmd == LED_ON)
+			hs |= MV64X60_PCICFG_CPCI_HOTSWAP_LOO;
+		else
+			hs &= ~MV64X60_PCICFG_CPCI_HOTSWAP_LOO;
+
+		early_write_config_dword(hose, 0, PCI_DEVFN(0, 0),
+			MV64X60_PCICFG_CPCI_HOTSWAP, hs);
+	} else if (board_type == KATANA750I_BD_TYPE_752I) {
+		u8 v;
+
+		if (cpld_base) {
+			v = in_8(cpld_base + HSL_PLD_BASE+HSL_PLD_HOT_SWAP_OFF);
+			if (cmd == LED_ON)
+				v |= HSL_PLD_HOT_SWAP_LED_BIT;
+			else
+				v &= ~HSL_PLD_HOT_SWAP_LED_BIT;
+			out_8(cpld_base + HSL_PLD_BASE+HSL_PLD_HOT_SWAP_OFF, v);
+		}
+	}
+}
+
+static void __init katana750i_clear_hotswap_events(void)
+{
+	struct pci_controller *hose;
+	u32 hs;
+
+	hose = mv64x60_find_hose(0);
+	if (!hose)
+		return;
+
+	/* Mask ENUM#, clear insertion & extraction bits. */
+	early_read_config_dword(hose, 0, PCI_DEVFN(0, 0),
+		MV64X60_PCICFG_CPCI_HOTSWAP, &hs);
+	hs |= ((1 << 17) | (1 << 22) | (1 << 23));
+	early_write_config_dword(hose, 0, PCI_DEVFN(0, 0),
+		MV64X60_PCICFG_CPCI_HOTSWAP, hs);
+}
+
+static void __init katana750i_enable_ipmi(void)
+{
+	u8 reset_out;
+
+	/* Enable access to IPMI ctlr by clearing IPMI PORTSEL bit in CPLD */
+	if (cpld_base) {
+		reset_out = in_8(cpld_base + CPLD_RESET_OUT);
+		reset_out &= ~CPLD_RESET_OUT_PORTSEL;
+		out_8(cpld_base + CPLD_RESET_OUT, reset_out);
+	}
+}
+
+static void __init katana750i_setup_arch(void)
+{
+	struct device_node *np;
+	phys_addr_t paddr;
+	const unsigned int *reg;
+
+	np = of_find_compatible_node(NULL, NULL, "katana750i,cpld");
+	if (!np)
+		printk(KERN_WARNING "No CPLD DT node; functionality reduced\n");
+	else {
+		reg = of_get_property(np, "reg", NULL);
+		if (!reg)
+			printk(KERN_WARNING "No CPLD reg property; "
+					"functionality reduced\n");
+		else {
+			paddr = of_translate_address(np, reg);
+			of_node_put(np);
+			cpld_base = ioremap(paddr, reg[1]);
+		}
+	}
+
+	mv64x60_pci_init();
+
+	katana750i_enable_ipmi();
+	katana750i_clear_hotswap_events();
+	katana750i_set_led(LED_OFF);
+
+	printk(KERN_INFO "Emerson %s\n", katana750i_platform_name);
+}
+
+struct __initdata i2c_board_info i2c_info;
+
+static int __init katana750i_register_rtc(void)
+{
+	struct device_node *np;
+	const u32 *addr;
+	int len;
+
+	np = of_find_compatible_node(NULL, NULL, "dallas,ds1307");
+	if (np) {
+		addr = of_get_property(np, "reg", &len);
+		if (!addr || (len != sizeof(len))) {
+			printk(KERN_WARNING "Invalid I2C/RTC DT entry\n");
+			goto exit;
+		}
+
+		i2c_info.irq = irq_of_parse_and_map(np, 0);
+		if (i2c_info.irq == NO_IRQ)
+			i2c_info.irq = -1;
+
+		i2c_info.addr = *addr;
+		strlcpy(i2c_info.driver_name, "rtc-ds1307", KOBJ_NAME_LEN);
+		strlcpy(i2c_info.type, "ds1307", I2C_NAME_SIZE);
+
+		i2c_register_board_info(0, &i2c_info, 1);
+	}
+
+exit:
+	of_node_put(np);
+	return 0;
+}
+arch_initcall(katana750i_register_rtc);
+
+static int __init katana750i_register_mtd(void)
+{
+	struct device_node *np;
+
+	for_each_compatible_node(np, NULL, "cfi-flash")
+		of_platform_device_create(np, NULL, NULL);
+
+	return 0;
+}
+device_initcall(katana750i_register_mtd);
+
+static void __init katana750i_fixup_resources(struct pci_dev *dev)
+{
+	u16 v16;
+
+	pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES >> 2);
+
+	pci_read_config_word(dev, PCI_COMMAND, &v16);
+	v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK;
+	pci_write_config_word(dev, PCI_COMMAND, v16);
+}
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV64360,
+		katana750i_fixup_resources);
+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_MARVELL, PCI_DEVICE_ID_MARVELL_MV64460,
+		katana750i_fixup_resources);
+
+static void katana750i_restart(char *cmd)
+{
+	ulong	i = 10000000;
+
+	katana750i_set_led(LED_ON);
+
+	/* issue hard reset to the reset command register */
+	if (cpld_base) {
+		out_8(cpld_base + CPLD_RST_CMD, CPLD_RST_CMD_HR);
+		while (i-- > 0);
+	}
+}
+
+static void katana750i_halt(void)
+{
+	katana750i_set_led(LED_ON);
+}
+
+#ifdef CONFIG_NOT_COHERENT_CACHE
+#define KATANA750I_COHERENCY_SETTING "off"
+#else
+#define KATANA750I_COHERENCY_SETTING "on"
+#endif
+
+void katana750i_show_cpuinfo(struct seq_file *m)
+{
+	seq_printf(m, "Vendor\t\t: Emerson\n");
+	if (cpld_base) {
+		seq_printf(m, "product id\t: 0x%x\n",
+				in_8(cpld_base + CPLD_PRODUCT_ID));
+		seq_printf(m, "hardware rev\t: 0x%x\n",
+				in_8(cpld_base + CPLD_HARDWARE_VER));
+		seq_printf(m, "pld rev\t\t: 0x%x\n",
+				in_8(cpld_base + CPLD_PLD_VER));
+	}
+	seq_printf(m, "coherency\t: %s\n", KATANA750I_COHERENCY_SETTING);
+}
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init katana750i_probe(void)
+{
+	unsigned long root = of_get_flat_dt_root();
+	unsigned long len = PLATFORM_NAME_MAX;
+	void *m;
+
+	if (!of_flat_dt_is_compatible(root, "emerson,katana-750i"))
+		return 0;
+
+	/* Update ppc_md.name with name from dt */
+	m = of_get_flat_dt_prop(root, "model", &len);
+	if (m)
+		strncpy(katana750i_platform_name, m,
+			min((int)len, PLATFORM_NAME_MAX - 1));
+
+	board_type = KATANA750I_BD_TYPE_750I;
+	if (!strncmp(m, "Katana-752i", PLATFORM_NAME_MAX))
+		board_type = KATANA750I_BD_TYPE_752I;
+
+	_set_L2CR(_get_L2CR() | L2CR_L2E | L2CR_L2PE);
+	return 1;
+}
+
+define_machine(katana750i){
+	.name			= katana750i_platform_name,
+	.probe			= katana750i_probe,
+	.setup_arch		= katana750i_setup_arch,
+	.init_early		= mv64x60_init_early,
+	.show_cpuinfo		= katana750i_show_cpuinfo,
+	.init_IRQ		= mv64x60_init_irq,
+	.get_irq		= mv64x60_get_irq,
+	.restart		= katana750i_restart,
+	.halt			= katana750i_halt,
+	.power_off		= katana750i_halt,
+	.calibrate_decr		= generic_calibrate_decr,
+#ifdef CONFIG_KEXEC
+	.machine_kexec		= default_machine_kexec,
+	.machine_kexec_prepare	= default_machine_kexec_prepare,
+	.machine_crash_shutdown	= default_machine_crash_shutdown,
+#endif
+};

^ permalink raw reply related

* [PATCH 3/4 v2] powerpc: Katana750i - Add DTS file
From: Mark A. Greer @ 2008-01-16 22:04 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <20080114225926.GB22862@mag.az.mvista.com>

From: Mark A. Greer <mgreer@mvista.com>

Add DTS file for the Emerson Katana 750i & 752i platforms.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
---
This patch should address most of David's comments.

Some notes:
- Even though there are still several virtual-reg's remaining, all
  are used by the bootwrapper.
- I'll make a separate patch to get rid fo the cunit & mpscrouting nodes.
- I left /chosen/bootargs since its nice to have the default cmdline
  printed by the bootwrapper and then have the opportunity to edit it.

 arch/powerpc/boot/dts/katana750i.dts |  360 +++++++++++++++++++++++++
 1 file changed, 360 insertions(+)

diff --git a/arch/powerpc/boot/dts/katana750i.dts b/arch/powerpc/boot/dts/katana750i.dts
new file mode 100644
index 0000000..a4806da
--- /dev/null
+++ b/arch/powerpc/boot/dts/katana750i.dts
@@ -0,0 +1,360 @@
+/* Device Tree Source for Emerson Katana 750i/752i
+ *
+ * Author: Mark A. Greer <mgreer@mvista.com>
+ *
+ * 2007 (c) MontaVista, Software, Inc.  This file is licensed under
+ * the terms of the GNU General Public License version 2.  This program
+ * is licensed "as is" without any warranty of any kind, whether express
+ * or implied.
+ *
+ * Property values that are labeled as "Default" will be updated by bootwrapper
+ * if it can determine the exact PrPMC type.
+ */
+
+/dts-v1/;
+
+/ {
+	#address-cells = <1>;
+	#size-cells = <1>;
+	model = "Katana-75xi";	/* Default */
+	compatible = "emerson,katana-750i";
+	coherency-off;
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		PowerPC,750 {
+			device_type = "cpu";
+			reg = <0>;
+			clock-frequency = <733333333>;		/* Default */
+			bus-frequency = <133333333>;		/* Default */
+			timebase-frequency = <33333333>;	/* Default */
+			i-cache-line-size = <0x20>;
+			d-cache-line-size = <0x20>;
+			i-cache-size = <0x8000>;
+			d-cache-size = <0x8000>;
+		};
+	};
+
+	memory {
+		device_type = "memory";
+		reg = <0x00000000 0x04000000>;	/* Default (64MB) */
+	};
+
+	mv64x60@f8100000 { /* Marvell Discovery */
+		#address-cells = <1>;
+		#size-cells = <1>;
+		model = "mv64360";	/* Default */
+		compatible = "marvell,mv64360";
+		clock-frequency = <133333333>;
+		hs_reg_valid;
+		reg = <0xf8100000 0x00010000>;
+		virtual-reg = <0xf8100000>;
+		ranges = <0xb0000000 0xb0000000 0x04000000 /* PCI 1 I/O Space */
+			  0x80000000 0x80000000 0x30000000 /* PCI 1 MEM Space */
+			  0xe8000000 0xe8000000 0x10000000 /* User FLASH */
+			  0x00000000 0xf8100000 0x00010000 /* Bridge's regs */
+			  0xf8080000 0xf8080000 0x00010000 /* PCI 0 I/O Space */
+			  0xf8090000 0xf8090000 0x00010000 /* PCI 0 MEM Space */
+			  0xf8200000 0xf8200000 0x00200000 /* CPLD & HSL Regs */
+			  0xf8300000 0xf8300000 0x00040000>;/* Integrated SRAM*/
+
+		cpld@f8200000 {
+			compatible = "katana750i,cpld";
+			reg = <0xf8200000 0x00200000>;
+			virtual-reg = <0xf8200000>;
+		};
+
+		flash@e8000000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "cfi-flash";
+			bank-width = <4>;
+			device-width = <2>;
+			reg = <0xe8000000 0x04000000>;
+			partition@0 {
+				label = "Monitor";
+				reg = <0x00000000 0x00100000>;
+			};
+			partition@100000 {
+				label = "Primary Kernel";
+				reg = <0x00100000 0x00180000>;
+			};
+			partition@280000 {
+				label = "Primary Filesystem";
+				reg = <0x00280000 0x01e00000>;
+			};
+			partition@2080000 {
+				label = "Secondary Kernel";
+				reg = <0x02080000 0x00180000>;
+			};
+			partition@2200000 {
+				label = "Secondary Filesystem";
+				reg = <0x02200000 0x01e00000>;
+			};
+			partition_overlay@100000 { /* overlay all but monitor */
+				label = "User FLASH";
+				reg = <0x00100000 0x03f00000>;
+			};
+		};
+
+		mdio {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "marvell,mv64360-mdio";
+			PHY0: ethernet-phy@12 {
+				device_type = "ethernet-phy";
+				compatible = "broadcom,bcm5461";
+				reg = <12>;
+			};
+			PHY1: ethernet-phy@11 {
+				device_type = "ethernet-phy";
+				compatible = "broadcom,bcm5461";
+				reg = <11>;
+			};
+			PHY2: ethernet-phy@4 {
+				device_type = "ethernet-phy";
+				compatible = "broadcom,bcm5461";
+				reg = <4>;
+			};
+		};
+
+		multiethernet@2000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "marvell,mv64360-multieth";
+			reg = <0x2000 0x2000>;
+			ethernet@0 {
+				device_type = "network";
+				compatible = "marvell,mv64360-eth";
+				reg = <0>;
+				interrupts = <32>;
+				interrupt-parent = <&PIC>;
+				phy = <&PHY0>;
+				local-mac-address = [ 00 00 00 00 00 00 ];
+			};
+			ethernet@1 {
+				device_type = "network";
+				compatible = "marvell,mv64360-eth";
+				reg = <1>;
+				interrupts = <33>;
+				interrupt-parent = <&PIC>;
+				phy = <&PHY1>;
+				local-mac-address = [ 00 00 00 00 00 00 ];
+			};
+			ethernet@2 {
+				device_type = "network";
+				compatible = "marvell,mv64360-eth";
+				reg = <2>;
+				interrupts = <34>;
+				interrupt-parent = <&PIC>;
+				phy = <&PHY2>;
+				local-mac-address = [ 00 00 00 00 00 00 ];
+			};
+		};
+
+		SDMA0: sdma@4000 {
+			compatible = "marvell,mv64360-sdma";
+			reg = <0x4000 0xc18>;
+			virtual-reg = <0xf8104000>;
+			interrupt-base = <0>;
+			interrupts = <36>;
+			interrupt-parent = <&PIC>;
+		};
+
+		SDMA1: sdma@6000 {
+			compatible = "marvell,mv64360-sdma";
+			reg = <0x6000 0xc18>;
+			virtual-reg = <0xf8106000>;
+			interrupt-base = <0>;
+			interrupts = <38>;
+			interrupt-parent = <&PIC>;
+		};
+
+		BRG0: brg@b200 {
+			compatible = "marvell,mv64360-brg";
+			reg = <0xb200 0x8>;
+			clock-src = <8>;
+			clock-frequency = <133333333>;
+			current-speed = <9600>;
+			bcr = <0>;
+		};
+
+		BRG1: brg@b208 {
+			compatible = "marvell,mv64360-brg";
+			reg = <0xb208 0x8>;
+			clock-src = <8>;
+			clock-frequency = <133333333>;
+			current-speed = <9600>;
+			bcr = <0>;
+		};
+
+		CUNIT: cunit@f200 {
+			reg = <0xf200 0x200>;
+		};
+
+		MPSCROUTING: mpscrouting@b400 {
+			reg = <0xb400 0xc>;
+		};
+
+		MPSCINTR: mpscintr@b800 {
+			reg = <0xb800 0x100>;
+			virtual-reg = <0xf810b800>;
+		};
+
+		mpsc@8000 {
+			device_type = "serial";
+			compatible = "marvell,mv64360-mpsc";
+			reg = <0x8000 0x38>;
+			virtual-reg = <0xf8108000>;
+			sdma = <&SDMA0>;
+			brg = <&BRG0>;
+			cunit = <&CUNIT>;
+			mpscrouting = <&MPSCROUTING>;
+			mpscintr = <&MPSCINTR>;
+			cell-index = <0>;
+			max_idle = <40>;
+			chr_1 = <0>;
+			chr_2 = <0>;
+			chr_10 = <3>;
+			mpcr = <0>;
+			interrupts = <40>;
+			interrupt-parent = <&PIC>;
+		};
+
+		mpsc@9000 {
+			device_type = "serial";
+			compatible = "marvell,mv64360-mpsc";
+			reg = <0x9000 0x38>;
+			virtual-reg = <0xf8109000>;
+			sdma = <&SDMA1>;
+			brg = <&BRG1>;
+			cunit = <&CUNIT>;
+			mpscrouting = <&MPSCROUTING>;
+			mpscintr = <&MPSCINTR>;
+			cell-index = <1>;
+			max_idle = <40>;
+			chr_1 = <0>;
+			chr_2 = <0>;
+			chr_10 = <3>;
+			mpcr = <0>;
+			interrupts = <42>;
+			interrupt-parent = <&PIC>;
+		};
+
+		wdt@b410 {			/* watchdog timer */
+			compatible = "marvell,mv64360-wdt";
+			reg = <0xb410 0x8>;
+		};
+
+		i2c@c000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "marvell,mv64360-i2c";
+			reg = <0xc000 0x20>;
+			freq_m = <8>;
+			freq_n = <3>;
+			interrupts = <37>;
+			interrupt-parent = <&PIC>;
+			rtc@68 {
+				compatible = "dallas,ds1307";
+				reg = <0x68>;
+			};
+		};
+
+		PIC: pic {
+			#interrupt-cells = <1>;
+			#address-cells = <0>;
+			compatible = "marvell,mv64360-pic";
+			reg = <0x0000 0x88>;
+			interrupt-controller;
+		};
+
+		pci@80000000 {
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			device_type = "pci";
+			compatible = "marvell,mv64360-pci";
+			cell-index = <1>;
+			reg = <0x0c78 0x8>;
+			ranges = <0x01000000 0x0 0x0
+					0xb0000000 0x0 0x04000000
+				  0x02000000 0x0 0x80000000
+					0x80000000 0x0 0x30000000>;
+			bus-range = <0x0 0xfe>;
+			clock-frequency = <66000000>;
+			interrupt-pci-iack = <0x0cb4>;
+			interrupt-parent = <&PIC>;
+			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+			interrupt-map = <
+				/* IDSEL 0x04 - PMC 1 */
+				0x2000 0 0 1 &PIC 73
+				0x2000 0 0 2 &PIC 74
+				0x2000 0 0 3 &PIC 78
+				0x2000 0 0 4 &PIC 72
+
+				/* IDSEL 0x05 - PMC 2 */
+				0x2800 0 0 1 &PIC 74
+				0x2800 0 0 2 &PIC 78
+				0x2800 0 0 3 &PIC 72
+				0x2800 0 0 4 &PIC 73
+
+				/* IDSEL 0x06 - T8110 */
+				0x3000 0 0 1 &PIC 78
+
+				/* IDSEL 0x08 - i82544 */
+				0x4000 0 0 1 &PIC 78
+			>;
+		};
+
+		pci@f8080000 { /* Required to acces Hotswap register */
+			#address-cells = <3>;
+			#size-cells = <2>;
+			#interrupt-cells = <1>;
+			device_type = "pci";
+			compatible = "marvell,mv64360-pci";
+			cell-index = <0>;
+			reg = <0x0cf8 0x8>;
+			ranges = <0x01000000 0x0 0x0
+					0xf8080000 0x0 0x00010000
+				  0x02000000 0x0 0xf8090000
+					0xf8090000 0x0 0x00010000>;
+			bus-range = <0xff 0xff>;
+		};
+
+		cpu-error@70 {
+			compatible = "marvell,mv64360-cpu-error";
+			reg = <0x0070 0x10 0x0128 0x28>;
+			interrupts = <3>;
+			interrupt-parent = <&PIC>;
+		};
+
+		sram-ctrl@380 {
+			compatible = "marvell,mv64360-sram-ctrl";
+			reg = <0x0380 0x80>;
+			interrupts = <13>;
+			interrupt-parent = <&PIC>;
+		};
+
+		pci-error@1d40 {
+			compatible = "marvell,mv64360-pci-error";
+			reg = <0x1d40 0x40 0x0c28 0x4>;
+			interrupts = <12>;
+			interrupt-parent = <&PIC>;
+		};
+
+		mem-ctrl@1400 {
+			compatible = "marvell,mv64360-mem-ctrl";
+			reg = <0x1400 0x60>;
+			interrupts = <17>;
+			interrupt-parent = <&PIC>;
+		};
+	};
+
+	chosen {
+		bootargs = "ip=on";
+		linux,stdout-path = "/mv64x60@f8100000/mpsc@8000";
+	};
+};

^ permalink raw reply related

* [PATCH 1/4 v2] powerpc: mv64x60 - Use early_* PCI accessors for hotswap reg
From: Mark A. Greer @ 2008-01-16 22:00 UTC (permalink / raw)
  To: Mark A. Greer; +Cc: linuxppc-dev
In-Reply-To: <20080114225150.GB21940@mag.az.mvista.com>

From: Mark A. Greer <mgreer@mvista.com>

The mv64x60 Hotswap register is on the first hose of the mv64x60
hostbridge.  To access it, manually find the hose structure and
use the early_* PCI accessor routines because the hostbridge is
normally hidden.

Signed-off-by: Mark A. Greer <mgreer@mvista.com>
---
This patch should address all of Stephen's comments.

 arch/powerpc/sysdev/mv64x60.h     |    4 ++
 arch/powerpc/sysdev/mv64x60_pci.c |   46 +++++++++++++++++++++-------
 2 files changed, 39 insertions(+), 11 deletions(-)

diff --git a/arch/powerpc/sysdev/mv64x60.h b/arch/powerpc/sysdev/mv64x60.h
index 4f618fa..51c4293 100644
--- a/arch/powerpc/sysdev/mv64x60.h
+++ b/arch/powerpc/sysdev/mv64x60.h
@@ -2,11 +2,15 @@
 #define __MV64X60_H__
 
 #include <linux/init.h>
+#include <linux/of.h>
+
+#include <asm/pci-bridge.h>
 
 extern void __init mv64x60_init_irq(void);
 extern unsigned int mv64x60_get_irq(void);
 
 extern void __init mv64x60_pci_init(void);
 extern void __init mv64x60_init_early(void);
+extern struct pci_controller *mv64x60_find_hose(u32 idx);
 
 #endif /* __MV64X60_H__ */
diff --git a/arch/powerpc/sysdev/mv64x60_pci.c b/arch/powerpc/sysdev/mv64x60_pci.c
index 1456015..1e6f186 100644
--- a/arch/powerpc/sysdev/mv64x60_pci.c
+++ b/arch/powerpc/sysdev/mv64x60_pci.c
@@ -13,10 +13,12 @@
 #include <linux/kernel.h>
 #include <linux/init.h>
 #include <linux/pci.h>
+#include <linux/of.h>
 
-#include <asm/prom.h>
 #include <asm/pci-bridge.h>
 
+#include <sysdev/mv64x60.h>
+
 #define PCI_HEADER_TYPE_INVALID		0x7f	/* Invalid PCI header type */
 
 #ifdef CONFIG_SYSFS
@@ -24,11 +26,31 @@
 #define MV64X60_VAL_LEN_MAX		11
 #define MV64X60_PCICFG_CPCI_HOTSWAP	0x68
 
+struct pci_controller *mv64x60_find_hose(u32 idx)
+{
+	struct device_node *phb;
+	struct pci_controller *hose;
+	const u32 *prop;
+	int len;
+
+	for_each_compatible_node(phb, "pci", "marvell,mv64360-pci") {
+		prop = of_get_property(phb, "cell-index", &len);
+		if (prop && (len == sizeof(prop)) && (*prop == idx)) {
+			hose = pci_find_hose_for_OF_device(phb);
+			of_node_put(phb);
+			return hose;
+		}
+	}
+
+	return NULL;
+}
+
+/* cPCI Hotswap register only supported on PCI 0 interface */
 static ssize_t mv64x60_hs_reg_read(struct kobject *kobj,
 				   struct bin_attribute *attr, char *buf,
 				   loff_t off, size_t count)
 {
-	struct pci_dev *phb;
+	struct pci_controller *hose;
 	u32 v;
 
 	if (off > 0)
@@ -36,11 +58,12 @@ static ssize_t mv64x60_hs_reg_read(struct kobject *kobj,
 	if (count < MV64X60_VAL_LEN_MAX)
 		return -EINVAL;
 
-	phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
-	if (!phb)
+	hose = mv64x60_find_hose(0);
+	if (!hose)
 		return -ENODEV;
-	pci_read_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, &v);
-	pci_dev_put(phb);
+
+	early_read_config_dword(hose, 0, PCI_DEVFN(0, 0),
+			MV64X60_PCICFG_CPCI_HOTSWAP, &v);
 
 	return sprintf(buf, "0x%08x\n", v);
 }
@@ -49,7 +72,7 @@ static ssize_t mv64x60_hs_reg_write(struct kobject *kobj,
 				    struct bin_attribute *attr, char *buf,
 				    loff_t off, size_t count)
 {
-	struct pci_dev *phb;
+	struct pci_controller *hose;
 	u32 v;
 
 	if (off > 0)
@@ -60,11 +83,12 @@ static ssize_t mv64x60_hs_reg_write(struct kobject *kobj,
 	if (sscanf(buf, "%i", &v) != 1)
 		return -EINVAL;
 
-	phb = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
-	if (!phb)
+	hose = mv64x60_find_hose(0);
+	if (!hose)
 		return -ENODEV;
-	pci_write_config_dword(phb, MV64X60_PCICFG_CPCI_HOTSWAP, v);
-	pci_dev_put(phb);
+
+	early_write_config_dword(hose, 0, PCI_DEVFN(0, 0),
+			MV64X60_PCICFG_CPCI_HOTSWAP, v);
 
 	return count;
 }

^ permalink raw reply related

* [Add mpc5121 support PATCH v2 0/8]
From: John Rigby @ 2008-01-16 21:47 UTC (permalink / raw)
  To: linuxppc-dev

This is a new improved set of patches based on the
comments that I received in response to the previous set.

I believe I addressed all the concerns raised but
I'm sure there will be new ones.

^ permalink raw reply

* [Add mpc5121 support PATCH v2 1/8] Add IPIC config option
From: John Rigby @ 2008-01-16 21:37 UTC (permalink / raw)
  To: linuxppc-dev

IPIC is not just for 83xx anymore so make it a separate
config option.

Signed-off-by: John Rigby <jrigby@freescale.com>
---
 arch/powerpc/platforms/Kconfig |    5 +++++
 arch/powerpc/sysdev/Makefile   |    2 +-
 2 files changed, 6 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index ea22cad..ad9b1c0 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -22,6 +22,7 @@ config PPC_83xx
 	depends on 6xx
 	select FSL_SOC
 	select 83xx
+	select IPIC
 	select WANT_DEVICE_TREE
 
 config PPC_86xx
@@ -80,6 +81,10 @@ config XICS
 	bool
 	default y
 
+config IPIC
+	bool
+	default n
+
 config MPIC
 	bool
 	default n
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 9a20ef4..66fe39c 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_AXON_RAM)		+= axonram.o
 ifeq ($(CONFIG_PPC_MERGE),y)
 obj-$(CONFIG_PPC_INDIRECT_PCI)	+= indirect_pci.o
 obj-$(CONFIG_PPC_I8259)		+= i8259.o
-obj-$(CONFIG_PPC_83xx)		+= ipic.o
+obj-$(CONFIG_IPIC)		+= ipic.o
 obj-$(CONFIG_4xx)		+= uic.o
 obj-$(CONFIG_XILINX_VIRTEX)	+= xilinx_intc.o
 ifeq ($(CONFIG_PCI),y)
-- 
1.5.3.5.726.g41a7a

^ permalink raw reply related

* [Add mpc5121 support PATCH v2 5/8] Separate MPC52xx PSC FIFO registers from rest of PSC
From: John Rigby @ 2008-01-16 21:37 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <1200519447-25555-4-git-send-email-jrigby@freescale.com>

This is in preparation for the addition of MPC512x
PSC support.  The main difference in the 512x is
in the fifo registers.

Signed-off-by: John Rigby <jrigby@freescale.com>
---
 drivers/serial/mpc52xx_uart.c     |   10 ++++++----
 include/asm-powerpc/mpc52xx_psc.h |    3 +++
 include/asm-ppc/mpc52xx_psc.h     |    3 +++
 3 files changed, 12 insertions(+), 4 deletions(-)

diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index ec36ad7..25a91c9 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -111,6 +111,7 @@ static void mpc52xx_uart_of_enumerate(void);
 #endif
 
 #define PSC(port) ((struct mpc52xx_psc __iomem *)((port)->membase))
+#define FIFO(port) ((struct mpc52xx_psc_fifo __iomem *)(PSC(port)+1))
 
 
 /* Forward declaration of the interruption handling routine */
@@ -222,6 +223,7 @@ static int
 mpc52xx_uart_startup(struct uart_port *port)
 {
 	struct mpc52xx_psc __iomem *psc = PSC(port);
+	struct mpc52xx_psc_fifo __iomem *fifo = FIFO(port);
 	int ret;
 
 	/* Request IRQ */
@@ -238,10 +240,10 @@ mpc52xx_uart_startup(struct uart_port *port)
 
 	out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
 
-	out_8(&psc->rfcntl, 0x00);
-	out_be16(&psc->rfalarm, 0x1ff);
-	out_8(&psc->tfcntl, 0x07);
-	out_be16(&psc->tfalarm, 0x80);
+	out_8(&fifo->rfcntl, 0x00);
+	out_be16(&fifo->rfalarm, 0x1ff);
+	out_8(&fifo->tfcntl, 0x07);
+	out_be16(&fifo->tfalarm, 0x80);
 
 	port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
 	out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
diff --git a/include/asm-powerpc/mpc52xx_psc.h b/include/asm-powerpc/mpc52xx_psc.h
index 26690d2..bea42b9 100644
--- a/include/asm-powerpc/mpc52xx_psc.h
+++ b/include/asm-powerpc/mpc52xx_psc.h
@@ -153,6 +153,9 @@ struct mpc52xx_psc {
 	u8		reserved16[3];
 	u8		irfdr;		/* PSC + 0x54 */
 	u8		reserved17[3];
+};
+
+struct mpc52xx_psc_fifo {
 	u16		rfnum;		/* PSC + 0x58 */
 	u16		reserved18;
 	u16		tfnum;		/* PSC + 0x5c */
diff --git a/include/asm-ppc/mpc52xx_psc.h b/include/asm-ppc/mpc52xx_psc.h
index c82b8d4..39fcd02 100644
--- a/include/asm-ppc/mpc52xx_psc.h
+++ b/include/asm-ppc/mpc52xx_psc.h
@@ -159,6 +159,9 @@ struct mpc52xx_psc {
 	u8		reserved16[3];
 	u8		irfdr;		/* PSC + 0x54 */
 	u8		reserved17[3];
+};
+
+struct mpc52xx_psc_fifo {
 	u16		rfnum;		/* PSC + 0x58 */
 	u16		reserved18;
 	u16		tfnum;		/* PSC + 0x5c */
-- 
1.5.3.5.726.g41a7a

^ permalink raw reply related

* [Add mpc5121 support PATCH v2 3/8] Basic Freescale MPC512x support
From: John Rigby @ 2008-01-16 21:37 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <1200519447-25555-2-git-send-email-jrigby@freescale.com>

512x is very similar to 83xx and most
of this is patterned after code from 83xx.

New platform:
    changed:
	arch/powerpc/Kconfig
	arch/powerpc/platforms/Kconfig
	arch/powerpc/platforms/Kconfig.cputype
	arch/powerpc/platforms/Makefile
    new:
	arch/powerpc/platforms/512x/*
	include/asm-powerpc/mpc512x.h

Signed-off-by: John Rigby <jrigby@freescale.com>
---
 arch/powerpc/Kconfig                      |    2 +-
 arch/powerpc/platforms/512x/Kconfig       |   20 ++++++
 arch/powerpc/platforms/512x/Makefile      |    4 +
 arch/powerpc/platforms/512x/mpc5121_ads.c |  103 +++++++++++++++++++++++++++++
 arch/powerpc/platforms/Kconfig            |    1 +
 arch/powerpc/platforms/Kconfig.cputype    |    6 +-
 arch/powerpc/platforms/Makefile           |    1 +
 include/asm-powerpc/mpc512x.h             |   22 ++++++
 8 files changed, 155 insertions(+), 4 deletions(-)
 create mode 100644 arch/powerpc/platforms/512x/Kconfig
 create mode 100644 arch/powerpc/platforms/512x/Makefile
 create mode 100644 arch/powerpc/platforms/512x/mpc5121_ads.c
 create mode 100644 include/asm-powerpc/mpc512x.h

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 66a3d8c..e4efd0c 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -470,7 +470,7 @@ config PCI
 	bool "PCI support" if 40x || CPM2 || PPC_83xx || PPC_85xx || PPC_86xx \
 		|| PPC_MPC52xx || (EMBEDDED && (PPC_PSERIES || PPC_ISERIES)) \
 		|| PPC_PS3
-	default y if !40x && !CPM2 && !8xx && !PPC_83xx \
+	default y if !40x && !CPM2 && !8xx && !PPC_MPC512x && !PPC_83xx \
 		&& !PPC_85xx && !PPC_86xx
 	default PCI_PERMEDIA if !4xx && !CPM2 && !8xx
 	default PCI_QSPAN if !4xx && !CPM2 && 8xx
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
new file mode 100644
index 0000000..c6fa49e
--- /dev/null
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -0,0 +1,20 @@
+config PPC_MPC512x
+	bool
+	select FSL_SOC
+	select IPIC
+	default n
+
+config PPC_MPC5121
+	bool
+	select PPC_MPC512x
+	default n
+
+config MPC5121_ADS
+	bool "Freescale MPC5121E ADS"
+	depends on PPC_MULTIPLATFORM && PPC32
+	select DEFAULT_UIMAGE
+	select WANT_DEVICE_TREE
+	select PPC_MPC5121
+	help
+	  This option enables support for the MPC5121E ADS board.
+	default n
diff --git a/arch/powerpc/platforms/512x/Makefile b/arch/powerpc/platforms/512x/Makefile
new file mode 100644
index 0000000..232c89f
--- /dev/null
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -0,0 +1,4 @@
+#
+# Makefile for the Freescale PowerPC 512x linux kernel.
+#
+obj-$(CONFIG_MPC5121_ADS)	+= mpc5121_ads.o
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
new file mode 100644
index 0000000..c19cbe8
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, <jrigby@freescale.com>, Thur Mar 29 2007
+ *
+ * Description:
+ * MPC5121 ADS board setup
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+
+/**
+ * 	mpc512x_find_ips_freq - Find the IPS bus frequency for a device
+ * 	@node:	device node
+ *
+ * 	Returns IPS bus frequency, or 0 if the bus frequency cannot be found.
+ */
+unsigned long
+mpc512x_find_ips_freq(struct device_node *node)
+{
+	struct device_node *np;
+	const unsigned int *p_ips_freq = NULL;
+
+	of_node_get(node);
+	while (node) {
+		p_ips_freq = of_get_property(node, "bus-frequency", NULL);
+		if (p_ips_freq)
+			break;
+
+		np = of_get_parent(node);
+		of_node_put(node);
+		node = np;
+	}
+	if (node)
+		of_node_put(node);
+
+	return p_ips_freq ? *p_ips_freq : 0;
+}
+EXPORT_SYMBOL(mpc512x_find_ips_freq);
+
+static struct of_device_id __initdata of_bus_ids[] = {
+	{ .name = "soc", },
+	{ .name = "localbus", },
+	{},
+};
+
+static void __init mpc5121_ads_declare_of_platform_devices(void)
+{
+	/* Find every child of the SOC node and add it to of_platform */
+	if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
+		printk(KERN_ERR __FILE__ ": "
+			"Error while probing of_platform bus\n");
+}
+
+static void __init mpc5121_ads_init_IRQ(void)
+{
+	struct device_node *np;
+
+	np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
+	if (!np)
+		return;
+
+	ipic_init(np, 0);
+
+	/*
+	 * Initialize the default interrupt mapping priorities,
+	 * in case the boot rom changed something on us.
+	 */
+	ipic_set_default_priority();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc5121_ads_probe(void)
+{
+	unsigned long root = of_get_flat_dt_root();
+
+	return of_flat_dt_is_compatible(root, "fsl,mpc5121ads");
+}
+
+define_machine(mpc5121_ads) {
+	.name			= "MPC5121 ADS",
+	.probe			= mpc5121_ads_probe,
+	.init			= mpc5121_ads_declare_of_platform_devices,
+	.init_IRQ		= mpc5121_ads_init_IRQ,
+	.get_irq		= ipic_get_irq,
+	.calibrate_decr		= generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index ad9b1c0..8dfdf61 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -41,6 +41,7 @@ config CLASSIC32
 source "arch/powerpc/platforms/pseries/Kconfig"
 source "arch/powerpc/platforms/iseries/Kconfig"
 source "arch/powerpc/platforms/chrp/Kconfig"
+source "arch/powerpc/platforms/512x/Kconfig"
 source "arch/powerpc/platforms/52xx/Kconfig"
 source "arch/powerpc/platforms/powermac/Kconfig"
 source "arch/powerpc/platforms/prep/Kconfig"
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index c3ee0b5..fb86300 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -14,7 +14,7 @@ choice
 	  There are five families of 32 bit PowerPC chips supported.
 	  The most common ones are the desktop and server CPUs (601, 603,
 	  604, 740, 750, 74xx) CPUs from Freescale and IBM, with their
-	  embedded 52xx/82xx/83xx/86xx counterparts.
+	  embedded 512x/52xx/82xx/83xx/86xx counterparts.
 	  The other embeeded parts, namely 4xx, 8xx, e200 (55xx) and e500
 	  (85xx) each form a family of their own that is not compatible
 	  with the others.
@@ -22,7 +22,7 @@ choice
 	  If unsure, select 52xx/6xx/7xx/74xx/82xx/83xx/86xx.
 
 config 6xx
-	bool "52xx/6xx/7xx/74xx/82xx/83xx/86xx"
+	bool "512x/52xx/6xx/7xx/74xx/82xx/83xx/86xx"
 	select PPC_FPU
 
 config PPC_85xx
@@ -229,7 +229,7 @@ config NR_CPUS
 
 config NOT_COHERENT_CACHE
 	bool
-	depends on 4xx || 8xx || E200
+	depends on 4xx || 8xx || E200 || PPC_MPC512x
 	default y
 
 config CHECK_CACHE_COHERENCY
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index 6d9079d..a984894 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -11,6 +11,7 @@ endif
 obj-$(CONFIG_PPC_CHRP)		+= chrp/
 obj-$(CONFIG_40x)		+= 40x/
 obj-$(CONFIG_44x)		+= 44x/
+obj-$(CONFIG_PPC_MPC512x)	+= 512x/
 obj-$(CONFIG_PPC_MPC52xx)	+= 52xx/
 obj-$(CONFIG_PPC_8xx)		+= 8xx/
 obj-$(CONFIG_PPC_82xx)		+= 82xx/
diff --git a/include/asm-powerpc/mpc512x.h b/include/asm-powerpc/mpc512x.h
new file mode 100644
index 0000000..c48a165
--- /dev/null
+++ b/include/asm-powerpc/mpc512x.h
@@ -0,0 +1,22 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+ *
+ * Author: John Rigby, <jrigby@freescale.com>, Friday Apr 13 2007
+ *
+ * Description:
+ * MPC5121 Prototypes and definitions
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_POWERPC_MPC512x_H__
+#define __ASM_POWERPC_MPC512x_H__
+
+extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
+
+#endif /* __ASM_POWERPC_MPC512x_H__ */
+
-- 
1.5.3.5.726.g41a7a

^ permalink raw reply related

* [Add mpc5121 support PATCH v2 2/8] Add mpc512x ipic support
From: John Rigby @ 2008-01-16 21:37 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <1200519447-25555-1-git-send-email-jrigby@freescale.com>

Added ipic_info entries for vectors used by 512x that
were previously unused by 83xx.

Signed-off-by: John Rigby <jrigby@freescale.com>
---
 arch/powerpc/sysdev/ipic.c |   62 ++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 62 insertions(+), 0 deletions(-)

diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 7274750..4c016da 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -48,6 +48,13 @@ static struct ipic_info ipic_info[] = {
 		.bit	= 17,
 		.prio_mask = 1,
 	},
+	[3] = {
+		.mask	= IPIC_SIMSR_H,
+		.prio	= IPIC_SIPRR_C,
+		.force	= IPIC_SIFCR_H,
+		.bit	= 18,
+		.prio_mask = 2,
+	},
 	[4] = {
 		.mask	= IPIC_SIMSR_H,
 		.prio	= IPIC_SIPRR_C,
@@ -55,6 +62,34 @@ static struct ipic_info ipic_info[] = {
 		.bit	= 19,
 		.prio_mask = 3,
 	},
+	[5] = {
+		.mask	= IPIC_SIMSR_H,
+		.prio	= IPIC_SIPRR_C,
+		.force	= IPIC_SIFCR_H,
+		.bit	= 20,
+		.prio_mask = 4,
+	},
+	[6] = {
+		.mask	= IPIC_SIMSR_H,
+		.prio	= IPIC_SIPRR_C,
+		.force	= IPIC_SIFCR_H,
+		.bit	= 21,
+		.prio_mask = 5,
+	},
+	[7] = {
+		.mask	= IPIC_SIMSR_H,
+		.prio	= IPIC_SIPRR_C,
+		.force	= IPIC_SIFCR_H,
+		.bit	= 22,
+		.prio_mask = 6,
+	},
+	[8] = {
+		.mask	= IPIC_SIMSR_H,
+		.prio	= IPIC_SIPRR_C,
+		.force	= IPIC_SIFCR_H,
+		.bit	= 23,
+		.prio_mask = 7,
+	},
 	[9] = {
 		.mask	= IPIC_SIMSR_H,
 		.prio	= IPIC_SIPRR_D,
@@ -223,6 +258,20 @@ static struct ipic_info ipic_info[] = {
 		.bit	= 7,
 		.prio_mask = 7,
 	},
+	[40] = {
+		.mask	= IPIC_SIMSR_H,
+		.prio	= IPIC_SIPRR_B,
+		.force	= IPIC_SIFCR_H,
+		.bit	= 8,
+		.prio_mask = 0,
+	},
+	[41] = {
+		.mask	= IPIC_SIMSR_H,
+		.prio	= IPIC_SIPRR_B,
+		.force	= IPIC_SIFCR_H,
+		.bit	= 9,
+		.prio_mask = 1,
+	},
 	[42] = {
 		.mask	= IPIC_SIMSR_H,
 		.prio	= IPIC_SIPRR_B,
@@ -230,6 +279,13 @@ static struct ipic_info ipic_info[] = {
 		.bit	= 10,
 		.prio_mask = 2,
 	},
+	[43] = {
+		.mask	= IPIC_SIMSR_H,
+		.prio	= IPIC_SIPRR_B,
+		.force	= IPIC_SIFCR_H,
+		.bit	= 11,
+		.prio_mask = 3,
+	},
 	[44] = {
 		.mask	= IPIC_SIMSR_H,
 		.prio	= IPIC_SIPRR_B,
@@ -387,6 +443,12 @@ static struct ipic_info ipic_info[] = {
 		.force	= IPIC_SIFCR_L,
 		.bit	= 18,
 	},
+	[83] = {
+		.mask	= IPIC_SIMSR_L,
+		.prio	= 0,
+		.force	= IPIC_SIFCR_L,
+		.bit	= 19,
+	},
 	[84] = {
 		.mask	= IPIC_SIMSR_L,
 		.prio	= 0,
-- 
1.5.3.5.726.g41a7a

^ permalink raw reply related

* [Add mpc5121 support PATCH v2 6/8] Cleanup checkpatch.pl problems in mpc52xx_uart.c
From: John Rigby @ 2008-01-16 21:37 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <1200519447-25555-5-git-send-email-jrigby@freescale.com>

In preparation of adding MPC5121 support
cleanup some things that checkpatch.pl complains
about also some minor fixes suggested by
Stephen Rothwell.

Signed-off-by: John Rigby <jrigby@freescale.com>
---
 drivers/serial/mpc52xx_uart.c |  204 ++++++++++++++++++++++-------------------
 1 files changed, 109 insertions(+), 95 deletions(-)

diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index 25a91c9..9bf4521 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -36,7 +36,7 @@
  * DCD. However, the pin multiplexing aren't changed and should be set either
  * by the bootloader or in the platform init code.
  *
- * The idx field must be equal to the PSC index ( e.g. 0 for PSC1, 1 for PSC2,
+ * The idx field must be equal to the PSC index (e.g. 0 for PSC1, 1 for PSC2,
  * and so on). So the PSC1 is mapped to /dev/ttyPSC0, PSC2 to /dev/ttyPSC1 and
  * so on. But be warned, it's an ABSOLUTE REQUIREMENT ! This is needed mainly
  * fpr the console code : without this 1:1 mapping, at early boot time, when we
@@ -68,11 +68,11 @@
 #include <linux/sysrq.h>
 #include <linux/console.h>
 
-#include <asm/delay.h>
-#include <asm/io.h>
+#include <linux/delay.h>
+#include <linux/io.h>
 
 #if defined(CONFIG_PPC_MERGE)
-#include <asm/of_platform.h>
+#include <linux/of_platform.h>
 #else
 #include <linux/platform_device.h>
 #endif
@@ -115,19 +115,20 @@ static void mpc52xx_uart_of_enumerate(void);
 
 
 /* Forward declaration of the interruption handling routine */
-static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id);
+static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id);
 
 
 /* Simple macro to test if a port is console or not. This one is taken
  * for serial_core.c and maybe should be moved to serial_core.h ? */
 #ifdef CONFIG_SERIAL_CORE_CONSOLE
-#define uart_console(port)	((port)->cons && (port)->cons->index == (port)->line)
+#define uart_console(port) \
+	((port)->cons && (port)->cons->index == (port)->line)
 #else
 #define uart_console(port)	(0)
 #endif
 
 #if defined(CONFIG_PPC_MERGE)
-static struct of_device_id mpc52xx_uart_of_match[] = {
+static const struct of_device_id mpc52xx_uart_of_match[] = {
 	{ .type = "serial", .compatible = "mpc5200-psc-uart", },
 	{},
 };
@@ -163,7 +164,7 @@ mpc52xx_uart_stop_tx(struct uart_port *port)
 {
 	/* port->lock taken by caller */
 	port->read_status_mask &= ~MPC52xx_PSC_IMR_TXRDY;
-	out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
+	out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
 }
 
 static void
@@ -171,7 +172,7 @@ mpc52xx_uart_start_tx(struct uart_port *port)
 {
 	/* port->lock taken by caller */
 	port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
-	out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
+	out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
 }
 
 static void
@@ -185,7 +186,7 @@ mpc52xx_uart_send_xchar(struct uart_port *port, char ch)
 		/* Make sure tx interrupts are on */
 		/* Truly necessary ??? They should be anyway */
 		port->read_status_mask |= MPC52xx_PSC_IMR_TXRDY;
-		out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
+		out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
 	}
 
 	spin_unlock_irqrestore(&port->lock, flags);
@@ -196,7 +197,7 @@ mpc52xx_uart_stop_rx(struct uart_port *port)
 {
 	/* port->lock taken by caller */
 	port->read_status_mask &= ~MPC52xx_PSC_IMR_RXRDY;
-	out_be16(&PSC(port)->mpc52xx_psc_imr,port->read_status_mask);
+	out_be16(&PSC(port)->mpc52xx_psc_imr, port->read_status_mask);
 }
 
 static void
@@ -211,10 +212,10 @@ mpc52xx_uart_break_ctl(struct uart_port *port, int ctl)
 	unsigned long flags;
 	spin_lock_irqsave(&port->lock, flags);
 
-	if ( ctl == -1 )
-		out_8(&PSC(port)->command,MPC52xx_PSC_START_BRK);
+	if (ctl == -1)
+		out_8(&PSC(port)->command, MPC52xx_PSC_START_BRK);
 	else
-		out_8(&PSC(port)->command,MPC52xx_PSC_STOP_BRK);
+		out_8(&PSC(port)->command, MPC52xx_PSC_STOP_BRK);
 
 	spin_unlock_irqrestore(&port->lock, flags);
 }
@@ -233,10 +234,10 @@ mpc52xx_uart_startup(struct uart_port *port)
 		return ret;
 
 	/* Reset/activate the port, clear and enable interrupts */
-	out_8(&psc->command,MPC52xx_PSC_RST_RX);
-	out_8(&psc->command,MPC52xx_PSC_RST_TX);
+	out_8(&psc->command, MPC52xx_PSC_RST_RX);
+	out_8(&psc->command, MPC52xx_PSC_RST_TX);
 
-	out_be32(&psc->sicr,0);	/* UART mode DCD ignored */
+	out_be32(&psc->sicr, 0);	/* UART mode DCD ignored */
 
 	out_be16(&psc->mpc52xx_psc_clock_select, 0xdd00); /* /16 prescaler on */
 
@@ -246,10 +247,10 @@ mpc52xx_uart_startup(struct uart_port *port)
 	out_be16(&fifo->tfalarm, 0x80);
 
 	port->read_status_mask |= MPC52xx_PSC_IMR_RXRDY | MPC52xx_PSC_IMR_TXRDY;
-	out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
+	out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
 
-	out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
-	out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
+	out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
+	out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
 
 	return 0;
 }
@@ -260,12 +261,12 @@ mpc52xx_uart_shutdown(struct uart_port *port)
 	struct mpc52xx_psc __iomem *psc = PSC(port);
 
 	/* Shut down the port.  Leave TX active if on a console port */
-	out_8(&psc->command,MPC52xx_PSC_RST_RX);
+	out_8(&psc->command, MPC52xx_PSC_RST_RX);
 	if (!uart_console(port))
-		out_8(&psc->command,MPC52xx_PSC_RST_TX);
+		out_8(&psc->command, MPC52xx_PSC_RST_TX);
 
 	port->read_status_mask = 0;
-	out_be16(&psc->mpc52xx_psc_imr,port->read_status_mask);
+	out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask);
 
 	/* Release interrupt */
 	free_irq(port->irq, port);
@@ -273,7 +274,7 @@ mpc52xx_uart_shutdown(struct uart_port *port)
 
 static void
 mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
-                         struct ktermios *old)
+			 struct ktermios *old)
 {
 	struct mpc52xx_psc __iomem *psc = PSC(port);
 	unsigned long flags;
@@ -285,14 +286,14 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
 	mr1 = 0;
 
 	switch (new->c_cflag & CSIZE) {
-		case CS5:	mr1 |= MPC52xx_PSC_MODE_5_BITS;
-				break;
-		case CS6:	mr1 |= MPC52xx_PSC_MODE_6_BITS;
-				break;
-		case CS7:	mr1 |= MPC52xx_PSC_MODE_7_BITS;
-				break;
-		case CS8:
-		default:	mr1 |= MPC52xx_PSC_MODE_8_BITS;
+	case CS5:	mr1 |= MPC52xx_PSC_MODE_5_BITS;
+		break;
+	case CS6:	mr1 |= MPC52xx_PSC_MODE_6_BITS;
+		break;
+	case CS7:	mr1 |= MPC52xx_PSC_MODE_7_BITS;
+		break;
+	case CS8:
+	default:	mr1 |= MPC52xx_PSC_MODE_8_BITS;
 	}
 
 	if (new->c_cflag & PARENB) {
@@ -334,24 +335,24 @@ mpc52xx_uart_set_termios(struct uart_port *port, struct ktermios *new,
 		udelay(1);
 
 	if (!j)
-		printk(	KERN_ERR "mpc52xx_uart.c: "
+		printk(KERN_ERR "mpc52xx_uart.c: "
 			"Unable to flush RX & TX fifos in-time in set_termios."
-			"Some chars may have been lost.\n" );
+			"Some chars may have been lost.\n");
 
 	/* Reset the TX & RX */
-	out_8(&psc->command,MPC52xx_PSC_RST_RX);
-	out_8(&psc->command,MPC52xx_PSC_RST_TX);
+	out_8(&psc->command, MPC52xx_PSC_RST_RX);
+	out_8(&psc->command, MPC52xx_PSC_RST_TX);
 
 	/* Send new mode settings */
-	out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
-	out_8(&psc->mode,mr1);
-	out_8(&psc->mode,mr2);
-	out_8(&psc->ctur,ctr >> 8);
-	out_8(&psc->ctlr,ctr & 0xff);
+	out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
+	out_8(&psc->mode, mr1);
+	out_8(&psc->mode, mr2);
+	out_8(&psc->ctur, ctr >> 8);
+	out_8(&psc->ctlr, ctr & 0xff);
 
 	/* Reenable TX & RX */
-	out_8(&psc->command,MPC52xx_PSC_TX_ENABLE);
-	out_8(&psc->command,MPC52xx_PSC_RX_ENABLE);
+	out_8(&psc->command, MPC52xx_PSC_TX_ENABLE);
+	out_8(&psc->command, MPC52xx_PSC_RX_ENABLE);
 
 	/* We're all set, release the lock */
 	spin_unlock_irqrestore(&port->lock, flags);
@@ -366,7 +367,8 @@ mpc52xx_uart_type(struct uart_port *port)
 static void
 mpc52xx_uart_release_port(struct uart_port *port)
 {
-	if (port->flags & UPF_IOREMAP) { /* remapped by us ? */
+	/* remapped by us ? */
+	if (port->flags & UPF_IOREMAP) {
 		iounmap(port->membase);
 		port->membase = NULL;
 	}
@@ -381,7 +383,7 @@ mpc52xx_uart_request_port(struct uart_port *port)
 
 	if (port->flags & UPF_IOREMAP) /* Need to remap ? */
 		port->membase = ioremap(port->mapbase,
-		                        sizeof(struct mpc52xx_psc));
+					sizeof(struct mpc52xx_psc));
 
 	if (!port->membase)
 		return -EINVAL;
@@ -400,22 +402,22 @@ mpc52xx_uart_request_port(struct uart_port *port)
 static void
 mpc52xx_uart_config_port(struct uart_port *port, int flags)
 {
-	if ( (flags & UART_CONFIG_TYPE) &&
-	     (mpc52xx_uart_request_port(port) == 0) )
-	     	port->type = PORT_MPC52xx;
+	if ((flags & UART_CONFIG_TYPE)
+		&& (mpc52xx_uart_request_port(port) == 0))
+		port->type = PORT_MPC52xx;
 }
 
 static int
 mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser)
 {
-	if ( ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx )
+	if (ser->type != PORT_UNKNOWN && ser->type != PORT_MPC52xx)
 		return -EINVAL;
 
-	if ( (ser->irq != port->irq) ||
-	     (ser->io_type != SERIAL_IO_MEM) ||
-	     (ser->baud_base != port->uartclk)  ||
-	     (ser->iomem_base != (void*)port->mapbase) ||
-	     (ser->hub6 != 0 ) )
+	if ((ser->irq != port->irq) ||
+	    (ser->io_type != SERIAL_IO_MEM) ||
+	    (ser->baud_base != port->uartclk)  ||
+	    (ser->iomem_base != (void *)port->mapbase) ||
+	    (ser->hub6 != 0))
 		return -EINVAL;
 
 	return 0;
@@ -457,8 +459,8 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
 	unsigned short status;
 
 	/* While we can read, do so ! */
-	while ( (status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
-	        MPC52xx_PSC_SR_RXRDY) {
+	while ((status = in_be16(&PSC(port)->mpc52xx_psc_status)) &
+		MPC52xx_PSC_SR_RXRDY) {
 
 		/* Get the char */
 		ch = in_8(&PSC(port)->mpc52xx_psc_buffer_8);
@@ -476,9 +478,9 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
 		flag = TTY_NORMAL;
 		port->icount.rx++;
 
-		if ( status & (MPC52xx_PSC_SR_PE |
-		               MPC52xx_PSC_SR_FE |
-		               MPC52xx_PSC_SR_RB) ) {
+		if (status & (MPC52xx_PSC_SR_PE |
+			      MPC52xx_PSC_SR_FE |
+			      MPC52xx_PSC_SR_RB)) {
 
 			if (status & MPC52xx_PSC_SR_RB) {
 				flag = TTY_BREAK;
@@ -489,7 +491,7 @@ mpc52xx_uart_int_rx_chars(struct uart_port *port)
 				flag = TTY_FRAME;
 
 			/* Clear error condition */
-			out_8(&PSC(port)->command,MPC52xx_PSC_RST_ERR_STAT);
+			out_8(&PSC(port)->command, MPC52xx_PSC_RST_ERR_STAT);
 
 		}
 		tty_insert_flip_char(tty, ch, flag);
@@ -570,16 +572,16 @@ mpc52xx_uart_int(int irq, void *dev_id)
 
 		/* Do we need to receive chars ? */
 		/* For this RX interrupts must be on and some chars waiting */
-		if ( status & MPC52xx_PSC_IMR_RXRDY )
+		if (status & MPC52xx_PSC_IMR_RXRDY)
 			keepgoing |= mpc52xx_uart_int_rx_chars(port);
 
 		/* Do we need to send chars ? */
 		/* For this, TX must be ready and TX interrupt enabled */
-		if ( status & MPC52xx_PSC_IMR_TXRDY )
+		if (status & MPC52xx_PSC_IMR_TXRDY)
 			keepgoing |= mpc52xx_uart_int_tx_chars(port);
 
 		/* Limit number of iteration */
-		if ( !(--pass) )
+		if (!(--pass))
 			keepgoing = 0;
 
 	} while (keepgoing);
@@ -598,7 +600,7 @@ mpc52xx_uart_int(int irq, void *dev_id)
 
 static void __init
 mpc52xx_console_get_options(struct uart_port *port,
-                            int *baud, int *parity, int *bits, int *flow)
+			    int *baud, int *parity, int *bits, int *flow)
 {
 	struct mpc52xx_psc __iomem *psc = PSC(port);
 	unsigned char mr1;
@@ -606,7 +608,7 @@ mpc52xx_console_get_options(struct uart_port *port,
 	pr_debug("mpc52xx_console_get_options(port=%p)\n", port);
 
 	/* Read the mode registers */
-	out_8(&psc->command,MPC52xx_PSC_SEL_MODE_REG_1);
+	out_8(&psc->command, MPC52xx_PSC_SEL_MODE_REG_1);
 	mr1 = in_8(&psc->mode);
 
 	/* CT{U,L}R are write-only ! */
@@ -618,11 +620,18 @@ mpc52xx_console_get_options(struct uart_port *port,
 
 	/* Parse them */
 	switch (mr1 & MPC52xx_PSC_MODE_BITS_MASK) {
-		case MPC52xx_PSC_MODE_5_BITS:	*bits = 5; break;
-		case MPC52xx_PSC_MODE_6_BITS:	*bits = 6; break;
-		case MPC52xx_PSC_MODE_7_BITS:	*bits = 7; break;
-		case MPC52xx_PSC_MODE_8_BITS:
-		default:			*bits = 8;
+	case MPC52xx_PSC_MODE_5_BITS:
+		*bits = 5;
+		break;
+	case MPC52xx_PSC_MODE_6_BITS:
+		*bits = 6;
+		break;
+	case MPC52xx_PSC_MODE_7_BITS:
+		*bits = 7;
+		break;
+	case MPC52xx_PSC_MODE_8_BITS:
+	default:
+		*bits = 8;
 	}
 
 	if (mr1 & MPC52xx_PSC_MODE_PARNONE)
@@ -659,7 +668,7 @@ mpc52xx_console_write(struct console *co, const char *s, unsigned int count)
 		/* Wait the TX buffer to be empty */
 		j = 20000;	/* Maximum wait */
 		while (!(in_be16(&psc->mpc52xx_psc_status) &
-		         MPC52xx_PSC_SR_TXEMP) && --j)
+			 MPC52xx_PSC_SR_TXEMP) && --j)
 			udelay(1);
 	}
 
@@ -732,16 +741,18 @@ mpc52xx_console_setup(struct console *co, char *options)
 	}
 
 	pr_debug("Console on ttyPSC%x is %s\n",
-	         co->index, mpc52xx_uart_nodes[co->index]->full_name);
+		 co->index, mpc52xx_uart_nodes[co->index]->full_name);
 
 	/* Fetch register locations */
-	if ((ret = of_address_to_resource(np, 0, &res)) != 0) {
+	ret = of_address_to_resource(np, 0, &res);
+	if (ret) {
 		pr_debug("Could not get resources for PSC%x\n", co->index);
 		return ret;
 	}
 
 	/* Search for bus-frequency property in this node or a parent */
-	if ((ipb_freq = mpc52xx_find_ipb_freq(np)) == 0) {
+	ipb_freq = mpc52xx_find_ipb_freq(np);
+	if (ipb_freq == 0) {
 		pr_debug("Could not find IPB bus frequency!\n");
 		return -EINVAL;
 	}
@@ -759,7 +770,8 @@ mpc52xx_console_setup(struct console *co, char *options)
 		return -EINVAL;
 
 	pr_debug("mpc52xx-psc uart at %p, mapped to %p, irq=%x, freq=%i\n",
-	         (void*)port->mapbase, port->membase, port->irq, port->uartclk);
+		 (void *)port->mapbase, port->membase,
+		 port->irq, port->uartclk);
 
 	/* Setup the port parameters accoding to options */
 	if (options)
@@ -768,7 +780,7 @@ mpc52xx_console_setup(struct console *co, char *options)
 		mpc52xx_console_get_options(port, &baud, &parity, &bits, &flow);
 
 	pr_debug("Setting console parameters: %i %i%c1 flow=%c\n",
-	         baud, bits, parity, flow);
+		 baud, bits, parity, flow);
 
 	return uart_set_options(port, co, baud, parity, bits, flow);
 }
@@ -783,7 +795,7 @@ static struct console mpc52xx_console = {
 	.device	= uart_console_device,
 	.setup	= mpc52xx_console_setup,
 	.flags	= CON_PRINTBUFFER,
-	.index	= -1,	/* Specified on the cmdline (e.g. console=ttyPSC0 ) */
+	.index	= -1,	/* Specified on the cmdline (e.g. console=ttyPSC0) */
 	.data	= &mpc52xx_uart_driver,
 };
 
@@ -811,7 +823,6 @@ console_initcall(mpc52xx_console_init);
 /* ======================================================================== */
 
 static struct uart_driver mpc52xx_uart_driver = {
-	.owner		= THIS_MODULE,
 	.driver_name	= "mpc52xx_psc_uart",
 	.dev_name	= "ttyPSC",
 	.major		= SERIAL_PSC_MAJOR,
@@ -839,7 +850,7 @@ mpc52xx_uart_probe(struct platform_device *dev)
 	if (idx < 0 || idx >= MPC52xx_PSC_MAXNUM)
 		return -EINVAL;
 
-	if (!mpc52xx_match_psc_function(idx,"uart"))
+	if (!mpc52xx_match_psc_function(idx, "uart"))
 		return -ENODEV;
 
 	/* Init the port structure */
@@ -850,13 +861,13 @@ mpc52xx_uart_probe(struct platform_device *dev)
 	port->fifosize	= 512;
 	port->iotype	= UPIO_MEM;
 	port->flags	= UPF_BOOT_AUTOCONF |
-			  ( uart_console(port) ? 0 : UPF_IOREMAP );
+			  (uart_console(port) ? 0 : UPF_IOREMAP);
 	port->line	= idx;
 	port->ops	= &mpc52xx_uart_ops;
 	port->dev	= &dev->dev;
 
 	/* Search for IRQ and mapbase */
-	for (i=0 ; i<dev->num_resources ; i++, res++) {
+	for (i = 0 ; i < dev->num_resources ; i++, res++) {
 		if (res->flags & IORESOURCE_MEM)
 			port->mapbase = res->start;
 		else if (res->flags & IORESOURCE_IRQ)
@@ -868,7 +879,7 @@ mpc52xx_uart_probe(struct platform_device *dev)
 	/* Add the port to the uart sub-system */
 	ret = uart_add_one_port(&mpc52xx_uart_driver, port);
 	if (!ret)
-		platform_set_drvdata(dev, (void*)port);
+		platform_set_drvdata(dev, (void *)port);
 
 	return ret;
 }
@@ -919,6 +930,7 @@ static struct platform_driver mpc52xx_uart_platform_driver = {
 	.resume		= mpc52xx_uart_resume,
 #endif
 	.driver		= {
+		.owner	= THIS_MODULE,
 		.name	= "mpc52xx-psc",
 	},
 };
@@ -948,10 +960,11 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
 	if (idx >= MPC52xx_PSC_MAXNUM)
 		return -EINVAL;
 	pr_debug("Found %s assigned to ttyPSC%x\n",
-	         mpc52xx_uart_nodes[idx]->full_name, idx);
+		 mpc52xx_uart_nodes[idx]->full_name, idx);
 
 	/* Search for bus-frequency property in this node or a parent */
-	if ((ipb_freq = mpc52xx_find_ipb_freq(op->node)) == 0) {
+	ipb_freq = mpc52xx_find_ipb_freq(op->node);
+	if (ipb_freq == 0) {
 		dev_dbg(&op->dev, "Could not find IPB bus frequency!\n");
 		return -EINVAL;
 	}
@@ -964,22 +977,23 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
 	port->fifosize	= 512;
 	port->iotype	= UPIO_MEM;
 	port->flags	= UPF_BOOT_AUTOCONF |
-			  ( uart_console(port) ? 0 : UPF_IOREMAP );
+			  (uart_console(port) ? 0 : UPF_IOREMAP);
 	port->line	= idx;
 	port->ops	= &mpc52xx_uart_ops;
 	port->dev	= &op->dev;
 
 	/* Search for IRQ and mapbase */
-	if ((ret = of_address_to_resource(op->node, 0, &res)) != 0)
+	ret = of_address_to_resource(op->node, 0, &res);
+	if (ret)
 		return ret;
 
 	port->mapbase = res.start;
 	port->irq = irq_of_parse_and_map(op->node, 0);
 
 	dev_dbg(&op->dev, "mpc52xx-psc uart at %p, irq=%x, freq=%i\n",
-	        (void*)port->mapbase, port->irq, port->uartclk);
+		(void *)port->mapbase, port->irq, port->uartclk);
 
-	if ((port->irq==NO_IRQ) || !port->mapbase) {
+	if ((port->irq == NO_IRQ) || !port->mapbase) {
 		printk(KERN_ERR "Could not allocate resources for PSC\n");
 		return -EINVAL;
 	}
@@ -987,7 +1001,7 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match)
 	/* Add the port to the uart sub-system */
 	ret = uart_add_one_port(&mpc52xx_uart_driver, port);
 	if (!ret)
-		dev_set_drvdata(&op->dev, (void*)port);
+		dev_set_drvdata(&op->dev, (void *)port);
 
 	return ret;
 }
@@ -1050,6 +1064,7 @@ mpc52xx_uart_of_assign(struct device_node *np, int idx)
 	if (idx < 0)
 		return; /* No free slot; abort */
 
+	of_node_get(np);
 	/* If the slot is already occupied, then swap slots */
 	if (mpc52xx_uart_nodes[idx] && (free_idx != -1))
 		mpc52xx_uart_nodes[free_idx] = mpc52xx_uart_nodes[idx];
@@ -1059,7 +1074,7 @@ mpc52xx_uart_of_assign(struct device_node *np, int idx)
 static void
 mpc52xx_uart_of_enumerate(void)
 {
-	static int enum_done = 0;
+	static int enum_done;
 	struct device_node *np;
 	const unsigned int *devno;
 	int i;
@@ -1073,7 +1088,7 @@ mpc52xx_uart_of_enumerate(void)
 
 		/* Is a particular device number requested? */
 		devno = of_get_property(np, "port-number", NULL);
-		mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1);
+		mpc52xx_uart_of_assign(np, devno ? *devno : -1);
 	}
 
 	enum_done = 1;
@@ -1081,15 +1096,13 @@ mpc52xx_uart_of_enumerate(void)
 	for (i = 0; i < MPC52xx_PSC_MAXNUM; i++) {
 		if (mpc52xx_uart_nodes[i])
 			pr_debug("%s assigned to ttyPSC%x\n",
-			         mpc52xx_uart_nodes[i]->full_name, i);
+				 mpc52xx_uart_nodes[i]->full_name, i);
 	}
 }
 
 MODULE_DEVICE_TABLE(of, mpc52xx_uart_of_match);
 
 static struct of_platform_driver mpc52xx_uart_of_driver = {
-	.owner		= THIS_MODULE,
-	.name		= "mpc52xx-psc-uart",
 	.match_table	= mpc52xx_uart_of_match,
 	.probe		= mpc52xx_uart_of_probe,
 	.remove		= mpc52xx_uart_of_remove,
@@ -1115,7 +1128,8 @@ mpc52xx_uart_init(void)
 
 	printk(KERN_INFO "Serial: MPC52xx PSC UART driver\n");
 
-	if ((ret = uart_register_driver(&mpc52xx_uart_driver)) != 0) {
+	ret = uart_register_driver(&mpc52xx_uart_driver);
+	if (ret) {
 		printk(KERN_ERR "%s: uart_register_driver failed (%i)\n",
 		       __FILE__, ret);
 		return ret;
-- 
1.5.3.5.726.g41a7a

^ permalink raw reply related


This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox