* Please pull powerpc.git merge branch
From: Paul Mackerras @ 2008-03-27 23:08 UTC (permalink / raw)
To: torvalds; +Cc: linuxppc-dev, akpm, linux-kernel
Linus,
Olof Johansson has a defconfig update for the pasemi platform that he
would like to have in 2.6.25, so please do:
git pull \
git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc.git merge
Thanks,
Paul.
arch/powerpc/configs/pasemi_defconfig | 142 ++++++++++++++++++++-------------
1 files changed, 88 insertions(+), 54 deletions(-)
commit 5c29934de29ddd7ecd913d83cad28e872f2e8c78
Author: Olof Johansson <olof@lixom.net>
Date: Tue Mar 25 10:28:26 2008 -0500
[POWERPC] update pasemi_defconfig
Disable GEN_RTC since it conflicts with the i2c rtc drivers registering,
besides that keep most of the new defaults.
Signed-off-by: Olof Johansson <olof@lixom.net>
^ permalink raw reply
* [PATCH 2/2 v2] pasemi_mac: Netpoll support
From: Olof Johansson @ 2008-03-27 22:40 UTC (permalink / raw)
To: jgarzik; +Cc: linuxppc-dev, pasemi-linux, ncase, netdev
In-Reply-To: <20080326015801.GC23103@lixom.net>
Add netpoll support to allow use of netconsole.
Signed-off-by: Nate Case <ncase@xes-inc.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
---
Changed the interrupt handler arguments as found by Valentine. Will push
through powerpc.git with Jeff's ACKs (that were already given).
-Olof
diff --git a/drivers/net/pasemi_mac.c b/drivers/net/pasemi_mac.c
index abb1dc4..965f2e4 100644
--- a/drivers/net/pasemi_mac.c
+++ b/drivers/net/pasemi_mac.c
@@ -1648,6 +1648,26 @@ static int pasemi_mac_poll(struct napi_struct *napi, int budget)
return pkts;
}
+#ifdef CONFIG_NET_POLL_CONTROLLER
+/*
+ * Polling 'interrupt' - used by things like netconsole to send skbs
+ * without having to re-enable interrupts. It's not called while
+ * the interrupt routine is executing.
+ */
+static void pasemi_mac_netpoll(struct net_device *dev)
+{
+ const struct pasemi_mac *mac = netdev_priv(dev);
+
+ disable_irq(mac->tx->chan.irq);
+ pasemi_mac_tx_intr(mac->tx->chan.irq, mac->tx);
+ enable_irq(mac->tx->chan.irq);
+
+ disable_irq(mac->rx->chan.irq);
+ pasemi_mac_rx_intr(mac->rx->chan.irq, mac->rx);
+ enable_irq(mac->rx->chan.irq);
+}
+#endif
+
static int pasemi_mac_change_mtu(struct net_device *dev, int new_mtu)
{
struct pasemi_mac *mac = netdev_priv(dev);
@@ -1807,6 +1827,9 @@ pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
dev->mtu = PE_DEF_MTU;
/* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
mac->bufsz = dev->mtu + ETH_HLEN + ETH_FCS_LEN + LOCAL_SKB_ALIGN + 128;
+#ifdef CONFIG_NET_POLL_CONTROLLER
+ dev->poll_controller = pasemi_mac_netpoll;
+#endif
dev->change_mtu = pasemi_mac_change_mtu;
dev->ethtool_ops = &pasemi_mac_ethtool_ops;
^ permalink raw reply related
* Re: [PATCH 2/11] cell: generalize io-workarounds code
From: Benjamin Herrenschmidt @ 2008-03-27 21:08 UTC (permalink / raw)
To: Ishizaki Kou; +Cc: linuxppc-dev, paulus
In-Reply-To: <20080327.200215.-1300539001.kouish@swc.toshiba.co.jp>
On Thu, 2008-03-27 at 20:02 +0900, Ishizaki Kou wrote:
>
> > I'll try to have a closer look next week, but I'm a bit worried by
> > having all IO go through 2 level of function pointers, the PPE isn't
> > very good at it and this will slow things down more than they
> already
> > are.
>
> Only on celleb, all IO go through 2 level of function pointers.
>
> On cell blades, you can set global variable "ppc_pci_io" up at
> function
> spider_pci_workaround_init() directly instead of calling function
> io_workaround_init(), so all IO on cell blades use only one level of
> function pointer which is stored in ppc_pci_io.
But I would probably want to also use the PCI Express stuff for cell
blades...
> As you said, if read/write/in/out functions take device parameter,
> taking I/O function pointers into the dev_archdata structure should be
> the best solution. But they don't take device parameter, and they must
> search I/O function pointers with address parameter. I think it's
> better they search pointers from bus bridges, because access mothod
> for a device on its parent bus bridge, not device itself.
What I meant is that if the pointers are in dev_archdata, we can
populate with a different set of pointers for PCI vs. PCI-E.
Ben.
^ permalink raw reply
* [patch 3/6 v2] PS3: Bootwrapper improvements
From: Geoff Levand @ 2008-03-27 20:41 UTC (permalink / raw)
To: paulus; +Cc: Geert Uytterhoeven, linuxppc-dev
In-Reply-To: <47EAEC76.7000006@am.sony.com>
Improve the debugging support of the PS3 bootwraper code:
o Increase the size of the PS3 bootwrapper overlay from 256 to 512 bytes to
allow for more debugging code in the overlay.
o Use the dot symbol to set the size of __system_reset_overlay. The
assembler will then emit an error if the overlay code is too big.
o Remove some unused instructions.
o Update the text describing the PS3 bootwrapper overlay.
o Add a check for null pointer writes.
o Change hcall return value from s64.
Signed-off-by: Geoff Levand <geoffrey.levand@am.sony.com>
---
v2:
o Cleanup null check code.
arch/powerpc/boot/ps3-head.S | 25 ++++++++++++++++---------
arch/powerpc/boot/ps3.c | 23 +++++++++++++++--------
arch/powerpc/boot/wrapper | 21 +++++++++++----------
3 files changed, 42 insertions(+), 27 deletions(-)
--- a/arch/powerpc/boot/ps3-head.S
+++ b/arch/powerpc/boot/ps3-head.S
@@ -27,8 +27,9 @@
/*
* __system_reset_overlay - The PS3 first stage entry.
*
- * The bootwraper build script copies the 0x100 bytes at symbol
- * __system_reset_overlay to offset 0x100 of the rom image.
+ * The bootwraper build script copies the 512 bytes at symbol
+ * __system_reset_overlay to offset 0x100 of the rom image. This symbol
+ * must occupy 512 or less bytes.
*
* The PS3 has a single processor with two threads.
*/
@@ -47,8 +48,6 @@ __system_reset_overlay:
mfspr r3, 0x88
cntlzw. r3, r3
- li r4, 0
- li r5, 0
beq 1f
/* Secondary goes to __secondary_hold in kernel. */
@@ -57,8 +56,14 @@ __system_reset_overlay:
mtctr r4
bctr
- /* Primary delays then goes to _zimage_start in wrapper. */
1:
+ /* Save the value at addr zero for a null pointer write check later. */
+
+ li r4, 0
+ lwz r3, 0(r4)
+
+ /* Primary delays then goes to _zimage_start in wrapper. */
+
or 31, 31, 31 /* db16cyc */
or 31, 31, 31 /* db16cyc */
@@ -67,16 +72,18 @@ __system_reset_overlay:
mtctr r4
bctr
+ . = __system_reset_overlay + 512
+
/*
* __system_reset_kernel - Place holder for the kernel reset vector.
*
- * The bootwrapper build script copies 0x100 bytes from offset 0x100
+ * The bootwrapper build script copies 512 bytes from offset 0x100
* of the rom image to the symbol __system_reset_kernel. At runtime
- * the bootwrapper program copies the 0x100 bytes at __system_reset_kernel
- * to ram address 0x100. This symbol must occupy 0x100 bytes.
+ * the bootwrapper program copies the 512 bytes at __system_reset_kernel
+ * to ram address 0x100. This symbol must occupy 512 bytes.
*/
.globl __system_reset_kernel
__system_reset_kernel:
- . = __system_reset_kernel + 0x100
+ . = __system_reset_kernel + 512
--- a/arch/powerpc/boot/ps3.c
+++ b/arch/powerpc/boot/ps3.c
@@ -27,10 +27,10 @@
#include "page.h"
#include "ops.h"
-extern s64 lv1_panic(u64 in_1);
-extern s64 lv1_get_logical_partition_id(u64 *out_1);
-extern s64 lv1_get_logical_ppe_id(u64 *out_1);
-extern s64 lv1_get_repository_node_value(u64 in_1, u64 in_2, u64 in_3,
+extern int lv1_panic(u64 in_1);
+extern int lv1_get_logical_partition_id(u64 *out_1);
+extern int lv1_get_logical_ppe_id(u64 *out_1);
+extern int lv1_get_repository_node_value(u64 in_1, u64 in_2, u64 in_3,
u64 in_4, u64 in_5, u64 *out_1, u64 *out_2);
#ifdef DEBUG
@@ -46,6 +46,7 @@ BSS_STACK(4096);
* edit the command line passed to vmlinux (by setting /chosen/bootargs).
* The buffer is put in it's own section so that tools may locate it easier.
*/
+
static char cmdline[COMMAND_LINE_SIZE]
__attribute__((__section__("__builtin_cmdline")));
@@ -75,7 +76,7 @@ static void ps3_exit(void)
static int ps3_repository_read_rm_size(u64 *rm_size)
{
- s64 result;
+ int result;
u64 lpar_id;
u64 ppe_id;
u64 v2;
@@ -114,16 +115,17 @@ void ps3_copy_vectors(void)
{
extern char __system_reset_kernel[];
- memcpy((void *)0x100, __system_reset_kernel, 0x100);
- flush_cache((void *)0x100, 0x100);
+ memcpy((void *)0x100, __system_reset_kernel, 512);
+ flush_cache((void *)0x100, 512);
}
-void platform_init(void)
+void platform_init(unsigned long null_check)
{
const u32 heapsize = 0x1000000 - (u32)_end; /* 16MiB */
void *chosen;
unsigned long ft_addr;
u64 rm_size;
+ unsigned long val;
console_ops.write = ps3_console_write;
platform_ops.exit = ps3_exit;
@@ -151,6 +153,11 @@ void platform_init(void)
printf(" flat tree at 0x%lx\n\r", ft_addr);
+ val = *(unsigned long *)0;
+
+ if (val != null_check)
+ printf("null check failed: %lx != %lx\n\r", val, null_check);
+
((kernel_entry_t)0)(ft_addr, 0, NULL);
ps3_exit();
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -298,15 +298,16 @@ treeboot*)
exit 0
;;
ps3)
- # The ps3's loader supports loading gzipped binary images from flash
- # rom to addr zero. The loader enters the image at addr 0x100. A
- # bootwrapper overlay is use to arrange for the kernel to be loaded
- # to addr zero and to have a suitable bootwrapper entry at 0x100.
- # To construct the rom image, 0x100 bytes from offset 0x100 in the
- # kernel is copied to the bootwrapper symbol __system_reset_kernel.
- # The 0x100 bytes at the bootwrapper symbol __system_reset_overlay is
- # then copied to offset 0x100. At runtime the bootwrapper program
- # copies the 0x100 bytes at __system_reset_kernel to addr 0x100.
+ # The ps3's loader supports loading a gzipped binary image from flash
+ # rom to ram addr zero. The loader then enters the system reset
+ # vector at addr 0x100. A bootwrapper overlay is used to arrange for
+ # a binary image of the kernel to be at addr zero, and yet have a
+ # suitable bootwrapper entry at 0x100. To construct the final rom
+ # image 512 bytes from offset 0x100 is copied to the bootwrapper
+ # place holder at symbol __system_reset_kernel. The 512 bytes of the
+ # bootwrapper entry code at symbol __system_reset_overlay is then
+ # copied to offset 0x100. At runtime the bootwrapper program copies
+ # the data at __system_reset_kernel back to addr 0x100.
system_reset_overlay=0x`${CROSS}nm "$ofile" \
| grep ' __system_reset_overlay$' \
@@ -317,7 +318,7 @@ ps3)
| cut -d' ' -f1`
system_reset_kernel=`printf "%d" $system_reset_kernel`
overlay_dest="256"
- overlay_size="256"
+ overlay_size="512"
${CROSS}objcopy -O binary "$ofile" "$ofile.bin"
^ permalink raw reply
* Re: ppc platform for AMCC-440EPx - ELDK to the rescue
From: Steve Heflin @ 2008-03-27 20:36 UTC (permalink / raw)
To: linuxppc-embedded
>In reply to my message <20080326130837.762DBDE2FB@ozlabs.org>
> > I finally resolved my nightmare of getting linux-2.6.24/5... to work
> > on my AMCC-440Epx - Sequoia spinoff board. Following a clue I derived
> > from a reply from Wolfgang Denx, I went to the DENX Engineering site
> > where I discoved and downloaded the ELDK for the ppc_4xxFP. the ELDK
> > uses the ppc platform instead of the powerpc platform. FINALLY the
Wolfgang replied At 06:22 PM 3/26/2008:
>This is not exactly correct. Actually it supports both.
Ah thank you for that info. I only said what I said because the
4xxFP installation set things up to use the arch/ppc and to my
delight, it worked! I look forward to and will do all I can to help
get the arch/powerpc platform working on my Sequoia spin-off board.
I sent you email regarding my inability to do a ELDK build from
scratch, did you get that? I'm trying to build it under a fully
updated Fedora 7 system, and it hits the error:
LD unable to locate -lssabi_krb5 . Any clue?
thanks so much for your help,
Steve
^ permalink raw reply
* Re: [PATCH 4/5] i2c: MPC837xRDB Power Management and GPIO expander driver
From: Anton Vorontsov @ 2008-03-27 20:02 UTC (permalink / raw)
To: i2c; +Cc: linuxppc-dev
In-Reply-To: <20080327171044.GA1582@localhost.localdomain>
Incidentally I used some weird .config without preemption and
CONFIG_ENABLE_MUST_CHECK. Heh.
[...]
> + * I don't have specifications for the MCU firmware that is used on the
> + * MPC8349E-mITX/MPC837XRDB boards, I found this register and bits positions
> + * by the trial&error method.
> + */
> +#define MCU_REG_CTRL 0x20
> +#define MCU_CTRL_POFF 0x40
> +#define MCU_NUM_GPIO 2
> +
> +struct mcu {
> + spinlock_t lock;
This should be mutex of course, otherwise preemptable kernel
will complain.
[...]
> + gpiochip_remove(&mcu->of_gc.gc);
Should check return value.
--
Anton Vorontsov
email: cboumailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* [PATCH] [POWERPC] Clean up some linker and symbol usage
From: Kumar Gala @ 2008-03-27 19:53 UTC (permalink / raw)
To: linuxppc-dev
* use _stext and _end sybmols when reserving kernel text in the lmb. Use
of these symbols is a bit more robust way to determine the physical start
and size of the kernel text.
* PAGE_OFFSET is not always the start of code, use _stext instead.
* grab PAGE_SIZE and KERNELBASE from asm/page.h like ppc64 does. Makes the
code a bit more common and provide a single place to manipulate the defines
for things like kdump.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/kernel/prom.c | 2 +-
arch/powerpc/kernel/setup_32.c | 2 +-
arch/powerpc/kernel/setup_64.c | 2 +-
arch/powerpc/kernel/vmlinux.lds.S | 4 +---
4 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 9330920..60ef7d1 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -1124,7 +1124,7 @@ void __init early_init_devtree(void *params)
parse_early_param();
/* Reserve LMB regions used by kernel, initrd, dt, etc... */
- lmb_reserve(PHYSICAL_START, __pa(klimit) - PHYSICAL_START);
+ lmb_reserve(__pa(_stext), _end - _stext);
reserve_kdump_trampoline();
reserve_crashkernel();
early_reserve_mem();
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index cd870a8..b0989ca 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -277,7 +277,7 @@ void __init setup_arch(char **cmdline_p)
if (ppc_md.panic)
setup_panic();
- init_mm.start_code = PAGE_OFFSET;
+ init_mm.start_code = (unsigned long)_stext;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
init_mm.brk = klimit;
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 2c2d831..0205d40 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -510,7 +510,7 @@ void __init setup_arch(char **cmdline_p)
if (ppc_md.panic)
setup_panic();
- init_mm.start_code = PAGE_OFFSET;
+ init_mm.start_code = (unsigned long)_stext;
init_mm.end_code = (unsigned long) _etext;
init_mm.end_data = (unsigned long) _edata;
init_mm.brk = klimit;
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 0afb9e3..b5a76bc 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -1,11 +1,9 @@
#ifdef CONFIG_PPC64
-#include <asm/page.h>
#define PROVIDE32(x) PROVIDE(__unused__##x)
#else
-#define PAGE_SIZE 4096
-#define KERNELBASE CONFIG_KERNEL_START
#define PROVIDE32(x) PROVIDE(x)
#endif
+#include <asm/page.h>
#include <asm-generic/vmlinux.lds.h>
#include <asm/cache.h>
--
1.5.4.1
^ permalink raw reply related
* Re: [PATCH 0/2] Two more pasemi_mac patches for 2.6.26
From: Jeff Garzik @ 2008-03-27 19:41 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev, pasemi-linux, netdev
In-Reply-To: <20080327192204.GA17881@lixom.net>
Olof Johansson wrote:
> On Wed, Mar 26, 2008 at 12:12:30AM -0400, Jeff Garzik wrote:
>> Olof Johansson wrote:
>>> Hi Jeff,
>>>
>>> The below two patches go on top of the previous patches that were acked
>>> by you but applied to pasemi.git for feed up through powerpc.git.
>>>
>>> One is a couple of fixes for various corner cases in the jumbo support
>>> configuration. The second is addition of netpoll support, from Nate
>>> Case.
>>>
>>> Review/ack would be appreciated, I'll feed them up the same path as the
>>> other changes.
>> ACK 1-2, though I would consider closely patch #2, whether you need
>> disable_irq() or spin_lock_irqsave() -- which is best for your specific
>> driver + platform?
>
> I'm tempted to leave the disable/enable_irq() in there. It's certainly
> heavier than doing cpu-side irq masking, but adding a spinlock to the
> common interrupt path seems worse to me. I didn't think we considered
> the polling to be a hot path anyway...
Definitely not a hot path :)
^ permalink raw reply
* Re: [PATCH] fsldma: The MPC8377MDS board device tree node for fsldma driver
From: Dan Williams @ 2008-03-27 19:37 UTC (permalink / raw)
To: Zhang Wei, Andrew Morton; +Cc: linuxppc-dev, Linux Kernel
In-Reply-To: <1206517356-11209-2-git-send-email-wei.zhang@freescale.com>
On Wed, Mar 26, 2008 at 12:42 AM, Zhang Wei <wei.zhang@freescale.com> wrote:
> The fsldma driver is tested on MPC8377MDS board.
> The patch adds fsldma driver support into MPC8377MDS device tree.
>
> Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
> ---
> arch/powerpc/boot/dts/mpc8377_mds.dts | 27 +++++++++++++++++++++++++++
> 1 files changed, 27 insertions(+), 0 deletions(-)
I think this patch should probably go through the powerpc tree, or
-mm. I'll pick up the ones that touch either drivers/dma or
crypto/async_tx.
--
Dan
^ permalink raw reply
* RE: Xilinx Temac Timer ?
From: khollan @ 2008-03-27 19:31 UTC (permalink / raw)
To: linuxppc-embedded
In-Reply-To: <20080326194837.096A66A80EE@mail125-dub.bigfish.com>
John Linn wrote:
>
> Hi Kevin,
>
> I didn't write the code but I know the driver somewhat.
>
> I think the intention of stopping the timer is to prevent the reentrancy
> as the comment says because there is a function, gmii_poll, that is
> setup on the timer to go read the phy registers to see if anything
> changed in the phy.
>
> Stopping the timer prevents a phy read from happening in gmii_poll in
> the middle of the ioctl phy read which could hose things up.
>
> I don't see why you couldn't change that timer stop to some other form
> of synchronization/mutual exclusion so that the phy reads don't collide.
>
> As I look at it, it appears to me the spinlock should provide the
> synchronization needed without stopping the timer, but maybe I'm missing
> something. I CCed John Bonesio as he's the guy that developed this code
> I believe and maybe he'll have more insight here.
>
> Thanks,
> John
>
I removed the timer code, and it seems to be working correctly, hopefully
the spin lock is all I need to lock out the polling function. Thanks for
you help
Kevin
--
View this message in context: http://www.nabble.com/Xilinx-Temac-Timer---tp16306218p16332251.html
Sent from the linuxppc-embedded mailing list archive at Nabble.com.
^ permalink raw reply
* Re: [PATCH 0/2] Two more pasemi_mac patches for 2.6.26
From: Olof Johansson @ 2008-03-27 19:22 UTC (permalink / raw)
To: Jeff Garzik; +Cc: linuxppc-dev, pasemi-linux, netdev
In-Reply-To: <47E9CD2E.7040203@pobox.com>
On Wed, Mar 26, 2008 at 12:12:30AM -0400, Jeff Garzik wrote:
> Olof Johansson wrote:
>> Hi Jeff,
>>
>> The below two patches go on top of the previous patches that were acked
>> by you but applied to pasemi.git for feed up through powerpc.git.
>>
>> One is a couple of fixes for various corner cases in the jumbo support
>> configuration. The second is addition of netpoll support, from Nate
>> Case.
>>
>> Review/ack would be appreciated, I'll feed them up the same path as the
>> other changes.
>
> ACK 1-2, though I would consider closely patch #2, whether you need
> disable_irq() or spin_lock_irqsave() -- which is best for your specific
> driver + platform?
I'm tempted to leave the disable/enable_irq() in there. It's certainly
heavier than doing cpu-side irq masking, but adding a spinlock to the
common interrupt path seems worse to me. I didn't think we considered
the polling to be a hot path anyway...
-Olof
^ permalink raw reply
* Re: [PATCH 15/18] ide: remove broken/dangerous HDIO_[UNREGISTER, SCAN]_HWIF ioctls
From: Sergei Shtylyov @ 2008-03-27 17:38 UTC (permalink / raw)
To: Bartlomiej Zolnierkiewicz; +Cc: linux-ide, linux-kernel, linuxppc-dev
In-Reply-To: <20080208004606.17746.90799.sendpatchset@localhost.localdomain>
Bartlomiej Zolnierkiewicz wrote:
> hdparm explicitely marks HDIO_[UNREGISTER,SCAN]_HWIF ioctls as DANGEROUS
> and given the number of bugs we can assume that there are no real users:
> * DMA has no chance of working because DMA resources are released by
> ide_unregister() and they are never allocated again.
> * Since ide_init_hwif_ports() is used for ->io_ports[] setup the ioctls
> don't work for almost all hosts with "non-standard" (== non ISA-like)
> layout of IDE taskfile registers (there is a lot of such host drivers).
> * ide_port_init_devices() is not called when probing IDE devices so:
> - drive->autotune is never set and IDE host/devices are not programmed
> for the correct PIO/DMA transfer modes (=> possible data corruption)
> - host specific I/O 32-bit and IRQ unmasking settings are not applied
> (=> possible data corruption)
> - host specific ->port_init_devs method is not called (=> no luck with
> ht6560b, qd65xx and opti621 host drivers)
> * ->rw_disk method is not preserved (=> no HPT3xxN chipsets support).
> * ->serialized flag is not preserved (=> possible data corruption when
> using icside, aec62xx (ATP850UF chipset), cmd640, cs5530, hpt366
> (HPT3xxN chipsets), rz1000, sc1200, dtc2278 and ht6560b host drivers).
> * ->ack_intr method is not preserved (=> needed by ide-cris, buddha,
> gayle and macide host drivers).
> * ->sata_scr[] and sata_misc[] is cleared by ide_unregister() and it
> isn't initialized again (SiI3112 support needs them).
> * To issue an ioctl() there need to be at least one IDE device present
> in the system.
> * ->cable_detect method is not preserved + it is not called when probing
> IDE devices so cable detection is broken (however since DMA support is
> also broken it doesn't really matter ;-).
> * Some objects which may have already been freed in ide_unregister()
> are restored by ide_hwif_restore() (i.e. ->hwgroup).
> * ide_register_hw() may unregister unrelated IDE ports if free ide_hwifs[]
> slot cannot be found.
> * When IDE host drivers are modular unregistered port may be re-used by
> different host driver that owned it first causing subtle bugs.
> Since we now have a proper warm-plug support remove these ioctls,
> then remove no longer needed:
> - ide_register_hw() and ide_hwif_restore() functions
> - 'init_default' and 'restore' arguments of ide_unregister()
> - zeroeing of hwif->{dma,extra}_* fields in ide_unregister()
> As an added bonus IDE core code size shrinks by ~3kB (x86-32).
> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
> Index: b/drivers/ide/ide-pnp.c
> ===================================================================
> --- a/drivers/ide/ide-pnp.c
> +++ b/drivers/ide/ide-pnp.c
[...]
> @@ -655,52 +530,6 @@ void ide_init_port_hw(ide_hwif_t *hwif,
> }
> EXPORT_SYMBOL_GPL(ide_init_port_hw);
>
> -/**
> - * ide_register_hw - register IDE interface
> - * @hw: hardware registers
> - * @quirkproc: quirkproc function
> - * @hwifp: pointer to returned hwif
> - *
> - * Register an IDE interface, specifying exactly the registers etc.
> - *
> - * Returns -1 on error.
> - */
> -
> -static int ide_register_hw(hw_regs_t *hw, void (*quirkproc)(ide_drive_t *),
> - ide_hwif_t **hwifp)
> -{
> - int index, retry = 1;
> - ide_hwif_t *hwif;
> - u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
> -
> - do {
> - hwif = ide_find_port(hw->io_ports[IDE_DATA_OFFSET]);
> - index = hwif->index;
> - if (hwif)
> - goto found;
Hm, I remember there was a patch that fixed the above bug where hwif is
dereferenced before being checked for NULL, I wonder how come it was lost?
WBR, Sergei
^ permalink raw reply
* Re: [PATCH 3/5] leds: implement OpenFirmare GPIO LEDs driver
From: Anton Vorontsov @ 2008-03-27 17:10 UTC (permalink / raw)
To: Richard Purdie; +Cc: linuxppc-dev
In-Reply-To: <20080326202453.GC1772@localhost.localdomain>
On Wed, Mar 26, 2008 at 11:24:53PM +0300, Anton Vorontsov wrote:
> Despite leds-gpio and leds-of-gpio similar names and purposes, there
> is actually very few code can be shared between the two (both drivers
> are mostly the driver bindings anyway).
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> ---
>
> This patch depends on the not yet applied OF/PowerPC GPIO patches, so
> please consider this for RFC only.
>
> Thanks.
Here is updated patch with new linux,brightness OF property (needed for
MPC8349E-mITX board -- pwr led should be "on" by default).
p.s. I tend to do documentation as a separate patch: I don't want this
patch to depend on the booting-without-of.txt -- it may produce
conflicts easily.
- - - -
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Subject: leds: implement OpenFirmare GPIO LEDs driver
Despite leds-gpio and leds-of-gpio similar names and purposes, there
is actually very few code can be shared between the two (both drivers
are mostly the driver bindings anyway).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
drivers/leds/Kconfig | 8 ++
drivers/leds/Makefile | 1 +
drivers/leds/leds-of-gpio.c | 204 +++++++++++++++++++++++++++++++++++++++++++
3 files changed, 213 insertions(+), 0 deletions(-)
create mode 100644 drivers/leds/leds-of-gpio.c
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index 09aac5d..48a1077 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -113,6 +113,14 @@ config LEDS_GPIO
outputs. To be useful the particular board must have LEDs
and they must be connected to the GPIO lines.
+config LEDS_OF_GPIO
+ tristate "LED Support for GPIO connected LEDs (OpenFirmware bindings)"
+ depends on LEDS_CLASS && OF_GPIO
+ help
+ This option enables support for the LEDs connected to GPIO
+ outputs. To be useful the particular board must have LEDs
+ and they must be connected to the GPIO lines.
+
config LEDS_CM_X270
tristate "LED Support for the CM-X270 LEDs"
depends on LEDS_CLASS && MACH_ARMCORE
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index 84ced3b..78926ca 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -18,6 +18,7 @@ obj-$(CONFIG_LEDS_H1940) += leds-h1940.o
obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-cobalt-qube.o
obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o
obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
+obj-$(CONFIG_LEDS_OF_GPIO) += leds-of-gpio.o
obj-$(CONFIG_LEDS_CM_X270) += leds-cm-x270.o
obj-$(CONFIG_LEDS_CLEVO_MAIL) += leds-clevo-mail.o
obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx.o
diff --git a/drivers/leds/leds-of-gpio.c b/drivers/leds/leds-of-gpio.c
new file mode 100644
index 0000000..d9b7dcd
--- /dev/null
+++ b/drivers/leds/leds-of-gpio.c
@@ -0,0 +1,204 @@
+/*
+ * LEDs driver for GPIOs (OpenFirmware bindings)
+ *
+ * Copyright (C) 2007 8D Technologies inc.
+ * Raphael Assenat <raph@8d.com>
+ * Copyright (C) 2008 MontaVista Software, Inc.
+ * Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+#include <linux/of_gpio.h>
+#include <linux/leds.h>
+#include <linux/workqueue.h>
+
+struct of_gpio_led {
+ struct device_node *np;
+ struct led_classdev cdev;
+ struct work_struct work;
+ unsigned int gpio;
+ bool new_level;
+ bool can_sleep;
+ bool active_low;
+};
+
+static void gpio_led_work(struct work_struct *work)
+{
+ struct of_gpio_led *led = container_of(work, struct of_gpio_led, work);
+
+ gpio_set_value_cansleep(led->gpio, led->new_level);
+}
+
+static void gpio_led_set(struct led_classdev *led_cdev,
+ enum led_brightness value)
+{
+ struct of_gpio_led *led = container_of(led_cdev, struct of_gpio_led,
+ cdev);
+ bool level;
+
+ if (value == LED_OFF)
+ level = false;
+ else
+ level = true;
+
+ if (led->active_low)
+ level = !level;
+
+ /* setting GPIOs with I2C/etc requires a preemptible task context */
+ if (led->can_sleep) {
+ if (preempt_count()) {
+ led->new_level = level;
+ schedule_work(&led->work);
+ } else {
+ gpio_set_value_cansleep(led->gpio, level);
+ }
+ } else {
+ gpio_set_value(led->gpio, level);
+ }
+}
+
+static int __devinit of_gpio_leds_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ int ret;
+ struct of_gpio_led *led;
+ struct device_node *np = ofdev->node;
+ const int *brightness;
+ int size;
+
+ led = kzalloc(sizeof(*led), GFP_KERNEL);
+ if (!led)
+ return -ENOMEM;
+
+ led->np = np;
+
+ ret = of_get_gpio(np, 0);
+ if (!gpio_is_valid(ret)) {
+ dev_err(&ofdev->dev, "gpio is invalid\n");
+ goto err_get_gpio;
+ }
+ led->gpio = ret;
+ led->can_sleep = gpio_cansleep(led->gpio);
+
+ led->cdev.name = of_get_property(np, "linux,name", NULL);
+ if (!led->cdev.name)
+ led->cdev.name = ofdev->dev.bus_id;
+ led->cdev.default_trigger = of_get_property(np,
+ "linux,default-trigger", NULL);
+ led->active_low = of_get_property(np, "linux,active-low", NULL) ?
+ 1 : 0;
+ led->cdev.brightness_set = gpio_led_set;
+ led->cdev.brightness = LED_OFF;
+ brightness = of_get_property(np, "linux,brightness", &size);
+ if (!brightness || size != sizeof(u32))
+ led->cdev.brightness = LED_OFF;
+ else
+ led->cdev.brightness = *brightness;
+
+ ret = gpio_request(led->gpio, ofdev->dev.bus_id);
+ if (ret < 0) {
+ dev_err(&ofdev->dev, "could not request gpio, status is %d\n",
+ ret);
+ goto err_gpio;
+ }
+
+ ret = gpio_direction_output(led->gpio, led->active_low);
+ if (ret) {
+ dev_err(&ofdev->dev, "gpio could not be an output, "
+ "status is %d\n", ret);
+ goto err_gpio;
+ }
+
+ INIT_WORK(&led->work, gpio_led_work);
+ gpio_led_set(&led->cdev, led->cdev.brightness);
+
+ ret = led_classdev_register(&ofdev->dev, &led->cdev);
+ if (ret < 0) {
+ dev_err(&ofdev->dev, "could register led cdev, status is %d\n",
+ ret);
+ gpio_free(led->gpio);
+ goto err_reg_cdev;
+ }
+
+ dev_set_drvdata(&ofdev->dev, led);
+
+ return 0;
+
+err_reg_cdev:
+ cancel_work_sync(&led->work);
+err_gpio:
+ gpio_free(led->gpio);
+err_get_gpio:
+ kfree(led);
+ return ret;
+}
+
+static int __devexit of_gpio_leds_remove(struct of_device *ofdev)
+{
+ struct of_gpio_led *led = dev_get_drvdata(&ofdev->dev);
+
+ led_classdev_unregister(&led->cdev);
+ cancel_work_sync(&led->work);
+ gpio_free(led->gpio);
+ of_node_put(led->np);
+ kfree(led);
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+static int of_gpio_led_suspend(struct of_device *ofdev, pm_message_t state)
+{
+ struct of_gpio_led *led = dev_get_drvdata(&ofdev->dev);
+
+ led_classdev_suspend(&led->cdev);
+ return 0;
+}
+
+static int of_gpio_led_resume(struct of_device *ofdev)
+{
+ struct of_gpio_led *led = dev_get_drvdata(&ofdev->dev);
+
+ led_classdev_resume(&led->cdev);
+ return 0;
+}
+#else
+#define of_gpio_led_suspend NULL
+#define of_gpio_led_resume NULL
+#endif /* CONFIG_PM */
+
+static const struct of_device_id of_gpio_leds_match[] = {
+ { .compatible = "gpio-led", },
+ {},
+};
+MODULE_DEVICE_TABLE(of, of_gpio_leds_match);
+
+static struct of_platform_driver of_gpio_leds_drv = {
+ .name = "of_gpio_leds",
+ .match_table = of_gpio_leds_match,
+ .probe = of_gpio_leds_probe,
+ .remove = __devexit_p(of_gpio_leds_remove),
+ .suspend = of_gpio_led_suspend,
+ .resume = of_gpio_led_resume,
+};
+
+static int __init of_gpio_leds_init(void)
+{
+ return of_register_platform_driver(&of_gpio_leds_drv);
+}
+module_init(of_gpio_leds_init);
+
+static void __exit of_gpio_leds_exit(void)
+{
+ of_unregister_platform_driver(&of_gpio_leds_drv);
+}
+module_exit(of_gpio_leds_exit);
+
+MODULE_DESCRIPTION("OF-platform GPIO LEDs driver");
+MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
+MODULE_LICENSE("GPL");
--
1.5.2.2
^ permalink raw reply related
* Re: [PATCH 4/5] i2c: MPC837xRDB Power Management and GPIO expander driver
From: Anton Vorontsov @ 2008-03-27 17:10 UTC (permalink / raw)
To: Anton Vorontsov; +Cc: linuxppc-dev, Timur Tabi, i2c
In-Reply-To: <20080326225611.GA2799@zarina>
On Thu, Mar 27, 2008 at 01:56:11AM +0300, Anton Vorontsov wrote:
> On Wed, Mar 26, 2008 at 03:56:37PM -0500, Timur Tabi wrote:
> > Anton Vorontsov wrote:
> >
> > > +config MCU_MPC837XRDB
> > > + tristate "MPC837XRDB MCU driver"
> > > + depends on I2C && MPC837x_RDB && OF_GPIO
> >
> > The MPC8349E-mITX also has this chip. Can you include support for that board as
> > well?
>
> Well, only if it has the same (or compatible) firmware.. then yes.
Ok, they're the same and everything works fine. Except one mitx-specific
thing though... on the power-off call I can see that MCU is driving its
PTA1 pin low as expected, but the board doesn't turn off. PTA1 pin is
wired to the J19 jumper pin1, pin2 is PORESET# and pin3 is RESET#.
It doesn't work in both [1-2] and [2-3] positions...
This is surely not a software issue though. And just in case, on the
board I have the PWR button isn't functional, so this is hw issues (or
just need to find another jumper somewhere ;-).
Updated patch follows.
- - - -
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Subject: [POWERPC] mpc8349emitx/mpc837xrdb: add support for MCU
MCU is an external Freescale MC9S08QG8 microcontroller, mainly used to
provide soft power-off function, but also exports two GPIOs (wired to
the LEDs, but also available from the external headers).
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
arch/powerpc/boot/dts/mpc8349emitx.dts | 39 ++++++++++++++++++++++++++++-
arch/powerpc/boot/dts/mpc8377_rdb.dts | 29 ++++++++++++++++++++-
arch/powerpc/boot/dts/mpc8378_rdb.dts | 29 ++++++++++++++++++++-
arch/powerpc/boot/dts/mpc8379_rdb.dts | 29 ++++++++++++++++++++-
arch/powerpc/platforms/83xx/mpc834x_itx.c | 1 +
arch/powerpc/platforms/83xx/mpc837x_rdb.c | 1 +
arch/powerpc/sysdev/fsl_soc.c | 1 +
7 files changed, 125 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 9426676..0ad85af 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -51,6 +51,8 @@
soc8349@e0000000 {
#address-cells = <1>;
#size-cells = <1>;
+ compatible = "fsl,immr-mpc8349e", "fsl,immr", "fsl,soc",
+ "simple-bus";
device_type = "soc";
ranges = <0x0 0xe0000000 0x00100000>;
reg = <0xe0000000 0x00000200>;
@@ -66,11 +68,46 @@
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
- compatible = "fsl-i2c";
+ compatible = "fsl-i2c", "simple-bus";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
dfsrr;
+
+ rtc@68 {
+ device_type = "rtc";
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+
+ mcu_pio: mcu@0a {
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #gpio-cells = <1>;
+ compatible = "fsl,mc9s08qg8-mpc8349emitx",
+ "fsl,mcu-mpc8349emitx",
+ "simple-bus";
+ reg = <0x0a>;
+ gpio-controller;
+
+ led@0 {
+ compatible = "fsl,mcu-mpc8349emitx-led2",
+ "gpio-led";
+ linux,name = "pwr";
+ linux,brightness = <1>;
+ linux,active-low;
+ gpios = <&mcu_pio 0>;
+ };
+
+ led@1 {
+ compatible = "fsl,mcu-mpc8349emitx-led1",
+ "gpio-led";
+ linux,name = "hdd";
+ linux,default-trigger = "ide-disk";
+ linux,active-low;
+ gpios = <&mcu_pio 1>;
+ };
+ };
};
i2c@3100 {
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index 440aa4d..20d7e29 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -111,7 +111,7 @@
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
- compatible = "fsl-i2c";
+ compatible = "fsl-i2c", "simple-bus";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
@@ -121,6 +121,33 @@
compatible = "dallas,ds1339";
reg = <0x68>;
};
+ mcu_pio: mcu@0a {
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #gpio-cells = <1>;
+ compatible = "fsl,mc9s08qg8-mpc837xrdb",
+ "fsl,mcu-mpc837xrdb",
+ "fsl,mcu-mpc8349emitx",
+ "simple-bus";
+ reg = <0x0a>;
+ gpio-controller;
+
+ led@0 {
+ compatible = "fsl,mcu-mpc837xrdb-led2",
+ "gpio-led";
+ linux,name = "mcu2";
+ linux,active-low;
+ gpios = <&mcu_pio 0>;
+ };
+
+ led@1 {
+ compatible = "fsl,mcu-mpc837xrdb-led1",
+ "gpio-led";
+ linux,name = "mcu1";
+ linux,active-low;
+ gpios = <&mcu_pio 1>;
+ };
+ };
};
i2c@3100 {
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 9271153..fdd2e9b 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -111,7 +111,7 @@
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
- compatible = "fsl-i2c";
+ compatible = "fsl-i2c", "simple-bus";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
@@ -121,6 +121,33 @@
compatible = "dallas,ds1339";
reg = <0x68>;
};
+ mcu_pio: mcu@0a {
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #gpio-cells = <1>;
+ compatible = "fsl,mc9s08qg8-mpc837xrdb",
+ "fsl,mcu-mpc837xrdb",
+ "fsl,mcu-mpc8349emitx",
+ "simple-bus";
+ reg = <0x0a>;
+ gpio-controller;
+
+ led@0 {
+ compatible = "fsl,mcu-mpc837xrdb-led2",
+ "gpio-led";
+ linux,name = "mcu2";
+ linux,active-low;
+ gpios = <&mcu_pio 0>;
+ };
+
+ led@1 {
+ compatible = "fsl,mcu-mpc837xrdb-led1",
+ "gpio-led";
+ linux,name = "mcu1";
+ linux,active-low;
+ gpios = <&mcu_pio 1>;
+ };
+ };
};
i2c@3100 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 0dda2fc..c7a0152 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -111,7 +111,7 @@
#address-cells = <1>;
#size-cells = <0>;
cell-index = <0>;
- compatible = "fsl-i2c";
+ compatible = "fsl-i2c", "simple-bus";
reg = <0x3000 0x100>;
interrupts = <14 0x8>;
interrupt-parent = <&ipic>;
@@ -121,6 +121,33 @@
compatible = "dallas,ds1339";
reg = <0x68>;
};
+ mcu_pio: mcu@0a {
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #gpio-cells = <1>;
+ compatible = "fsl,mc9s08qg8-mpc837xrdb",
+ "fsl,mcu-mpc837xrdb",
+ "fsl,mcu-mpc8349emitx",
+ "simple-bus";
+ reg = <0x0a>;
+ gpio-controller;
+
+ led@0 {
+ compatible = "fsl,mcu-mpc837xrdb-led2",
+ "gpio-led";
+ linux,name = "mcu2";
+ linux,active-low;
+ gpios = <&mcu_pio 0>;
+ };
+
+ led@1 {
+ compatible = "fsl,mcu-mpc837xrdb-led1",
+ "gpio-led";
+ linux,name = "mcu1";
+ linux,active-low;
+ gpios = <&mcu_pio 1>;
+ };
+ };
};
i2c@3100 {
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index 50e8f63..1b3451c 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -40,6 +40,7 @@
static struct of_device_id __initdata mpc834x_itx_ids[] = {
{ .compatible = "fsl,pq2pro-localbus", },
+ { .compatible = "simple-bus", },
{},
};
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 2293ae5..c00356b 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -46,6 +46,7 @@ static void __init mpc837x_rdb_setup_arch(void)
static struct of_device_id mpc837x_ids[] = {
{ .type = "soc", },
{ .compatible = "soc", },
+ { .compatible = "simple-bus", },
{},
};
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 7ad9bce..e8fe369 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -410,6 +410,7 @@ static struct i2c_driver_device i2c_devices[] __initdata = {
{"dallas,ds1340", "rtc-ds1307", "ds1340",},
{"stm,m41t00", "rtc-ds1307", "m41t00"},
{"dallas,ds1374", "rtc-ds1374", "rtc-ds1374",},
+ {"fsl,mcu-mpc8349emitx", "mcu-mpc8349emitx", "mcu-mpc8349emitx"},
};
static int __init of_find_i2c_driver(struct device_node *node,
--
1.5.2.2
^ permalink raw reply related
* Re: [PATCH 4/5] i2c: MPC837xRDB Power Management and GPIO expander driver
From: Anton Vorontsov @ 2008-03-27 17:10 UTC (permalink / raw)
To: i2c; +Cc: linuxppc-dev
In-Reply-To: <20080326202511.GD1772@localhost.localdomain>
On Wed, Mar 26, 2008 at 11:25:11PM +0300, Anton Vorontsov wrote:
> On the MPC837xRDB boards there is MC9S08QG8 (MCU) chip with the custom
> firmware pre-programmed. This firmware offers to control some of the MCU
> GPIO pins via I2C (two pins, connected to the LEDs, but also available
> from the J28 and J43 headers, plus another (third) pin is a GPIO as well
> but on this board it is reserved for Power-Off function). MCU have some
> other functions, but these are not implemented yet.
>
> Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
> ---
>
> This patch depends on the not yet applied OF/PowerPC GPIO patches, so
> please consider this for RFC only.
>
> Thanks.
Since the same chip with the identical firmware also found on the
MPC8349E-mITXE board (thanks to Timur Tabi for noticing) here is an updated
patch. MPC8349E-mITX board predates MPC837X-RDB boards, so I renamed this
driver to mcu_mpc8349emitx.
- - - -
From: Anton Vorontsov <avorontsov@ru.mvista.com>
Subject: i2c: MPC8349E-mITX/MPC837x-RDB Power Management and GPIO expander driver
On the MPC8349E-mITX and MPC837x-RDB boards there is MC9S08QG8 (MCU) chip
with the custom firmware pre-programmed. This firmware offers to control
some of the MCU GPIO pins (used for LEDs and soft power-off) via I2C. MCU
have some other functions, but these are not implemented yet.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
---
drivers/i2c/chips/Kconfig | 11 ++
drivers/i2c/chips/Makefile | 1 +
drivers/i2c/chips/mcu_mpc8349emitx.c | 189 ++++++++++++++++++++++++++++++++++
3 files changed, 201 insertions(+), 0 deletions(-)
create mode 100644 drivers/i2c/chips/mcu_mpc8349emitx.c
diff --git a/drivers/i2c/chips/Kconfig b/drivers/i2c/chips/Kconfig
index 09d4937..d3e3bfb 100644
--- a/drivers/i2c/chips/Kconfig
+++ b/drivers/i2c/chips/Kconfig
@@ -150,4 +150,15 @@ config OZ99X
This driver can also be built as a module. If so, the module
will be called oz99x.
+config MCU_MPC8349EMITX
+ tristate "MPC8349E-mITX/MPC837X-RDB MCU driver"
+ depends on I2C && (MPC834x_ITX || MPC837x_RDB)
+ select GENERIC_GPIO
+ select HAVE_GPIO_LIB
+ help
+ Say Y here to enable soft power-off functionality on the Freescale
+ MPC8349E-mITX and MPC837X-RDB boards, plus this driver will register
+ MCU GPIOs as a generic GPIO API chip, so you'll able to use some MCU
+ pins as a GPIOs and LEDs.
+
endmenu
diff --git a/drivers/i2c/chips/Makefile b/drivers/i2c/chips/Makefile
index c69f891..89c92df 100644
--- a/drivers/i2c/chips/Makefile
+++ b/drivers/i2c/chips/Makefile
@@ -14,6 +14,7 @@ obj-$(CONFIG_TPS65010) += tps65010.o
obj-$(CONFIG_MENELAUS) += menelaus.o
obj-$(CONFIG_SENSORS_TSL2550) += tsl2550.o
obj-$(CONFIG_OZ99X) += oz99x.o
+obj-$(CONFIG_MCU_MPC8349EMITX) += mcu_mpc8349emitx.o
ifeq ($(CONFIG_I2C_DEBUG_CHIP),y)
EXTRA_CFLAGS += -DDEBUG
diff --git a/drivers/i2c/chips/mcu_mpc8349emitx.c b/drivers/i2c/chips/mcu_mpc8349emitx.c
new file mode 100644
index 0000000..b90dbe9
--- /dev/null
+++ b/drivers/i2c/chips/mcu_mpc8349emitx.c
@@ -0,0 +1,189 @@
+/*
+ * MPC8349E-mITX/MPC837x-RDB Power Management and GPIO expander driver
+ *
+ * On the MPC8349E-mITX and MPC837x-RDB boards there is MC9S08QG8 (MCU) chip
+ * with the custom firmware pre-programmed. This firmware offers to control
+ * some of the MCU GPIO pins (used for LEDs and soft power-off) via I2C. MCU
+ * have some other functions, but these are not implemented yet.
+ *
+ * Copyright (c) 2008 MontaVista Software, Inc.
+ *
+ * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/spinlock.h>
+#include <linux/i2c.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <asm/machdep.h>
+
+/*
+ * I don't have specifications for the MCU firmware that is used on the
+ * MPC8349E-mITX/MPC837XRDB boards, I found this register and bits positions
+ * by the trial&error method.
+ */
+#define MCU_REG_CTRL 0x20
+#define MCU_CTRL_POFF 0x40
+#define MCU_NUM_GPIO 2
+
+struct mcu {
+ spinlock_t lock;
+ struct device_node *np;
+ struct i2c_client *client;
+ struct of_gpio_chip of_gc;
+ u8 reg_ctrl;
+};
+
+static struct mcu *glob_mcu;
+
+static void mcu_power_off(void)
+{
+ struct mcu *mcu = glob_mcu;
+
+ pr_info("Sending power-off request to the MCU...\n");
+ spin_lock(&mcu->lock);
+ i2c_smbus_write_byte_data(glob_mcu->client, MCU_REG_CTRL,
+ mcu->reg_ctrl | MCU_CTRL_POFF);
+ spin_unlock(&mcu->lock);
+}
+
+static void mcu_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ struct of_gpio_chip *of_gc = to_of_gpio_chip(gc);
+ struct mcu *mcu = container_of(of_gc, struct mcu, of_gc);
+ u8 bit = 1 << (4 + gpio);
+
+ spin_lock(&mcu->lock);
+ if (val)
+ mcu->reg_ctrl |= bit;
+ else
+ mcu->reg_ctrl &= ~bit;
+
+ i2c_smbus_write_byte_data(mcu->client, MCU_REG_CTRL, mcu->reg_ctrl);
+ spin_unlock(&mcu->lock);
+}
+
+static int mcu_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
+{
+ mcu_gpio_set(gc, gpio, val);
+ return 0;
+}
+
+static int mcu_gpiochip_add(struct mcu *mcu)
+{
+ struct device_node *np;
+ struct of_gpio_chip *of_gc = &mcu->of_gc;
+ struct gpio_chip *gc = &of_gc->gc;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mcu-mpc8349emitx");
+ if (!np)
+ return -ENODEV;
+
+ gc->label = np->full_name;
+ gc->can_sleep = 1;
+ gc->ngpio = MCU_NUM_GPIO;
+ gc->base = -1;
+ gc->set = mcu_gpio_set;
+ gc->direction_output = mcu_gpio_dir_out;
+ of_gc->gpio_cells = 1;
+ of_gc->xlate = of_gpio_simple_xlate;
+
+ np->data = of_gc;
+ mcu->np = np;
+
+ /*
+ * We don't want to lose the node, its ->data and ->full_name...
+ * So, there is no of_node_put(np); here.
+ */
+ return gpiochip_add(gc);
+}
+
+static void mcu_gpiochip_remove(struct mcu *mcu)
+{
+ gpiochip_remove(&mcu->of_gc.gc);
+ of_node_put(mcu->np);
+}
+
+static int mcu_probe(struct i2c_client *client)
+{
+ struct mcu *mcu;
+ int ret;
+
+ mcu = kzalloc(sizeof(*mcu), GFP_KERNEL);
+ if (!mcu)
+ return -ENOMEM;
+
+ spin_lock_init(&mcu->lock);
+ mcu->client = client;
+ i2c_set_clientdata(client, mcu);
+
+ ret = i2c_smbus_read_byte_data(mcu->client, MCU_REG_CTRL);
+ if (ret < 0)
+ goto err_iic_read;
+ mcu->reg_ctrl = ret;
+
+ ret = mcu_gpiochip_add(mcu);
+ if (ret)
+ goto err_gpio;
+
+ /* XXX: this is potentionally racy, but there is no ppc_md lock */
+ if (!ppc_md.power_off) {
+ glob_mcu = mcu;
+ ppc_md.power_off = mcu_power_off;
+ dev_info(&client->dev, "will provide power-off service\n");
+ }
+
+ return 0;
+err_gpio:
+ mcu_gpiochip_remove(mcu);
+err_iic_read:
+ kfree(mcu);
+ return ret;
+}
+
+static int mcu_remove(struct i2c_client *client)
+{
+ struct mcu *mcu = i2c_get_clientdata(client);
+
+ if (glob_mcu == mcu) {
+ ppc_md.power_off = NULL;
+ glob_mcu = NULL;
+ }
+
+ i2c_set_clientdata(client, NULL);
+ mcu_gpiochip_remove(mcu);
+ kfree(mcu);
+ return 0;
+}
+
+static struct i2c_driver mcu_driver = {
+ .driver = {
+ .name = "mcu-mpc8349emitx",
+ .owner = THIS_MODULE,
+ },
+ .probe = mcu_probe,
+ .remove = mcu_remove,
+};
+
+static int __init mcu_init(void)
+{
+ return i2c_add_driver(&mcu_driver);
+}
+module_init(mcu_init);
+
+static void __exit mcu_exit(void)
+{
+ i2c_del_driver(&mcu_driver);
+}
+module_exit(mcu_exit);
+
+MODULE_DESCRIPTION("MPC8349E-mITX/MPC837x-RDB Power Management and GPIO "
+ "expander driver");
+MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
+MODULE_LICENSE("GPL");
--
1.5.2.2
^ permalink raw reply related
* Re: [PATCH] Enable CONFIG_FORCE_MAX_ZONEORDER for all PowerPC, and make selectable
From: Timur Tabi @ 2008-03-27 16:56 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <1206480932-30190-1-git-send-email-timur@freescale.com>
Timur Tabi wrote:
> This patch enables the FORCE_MAX_ZONEORDER Kconfig option for all PowerPC
> systems. Previously, it was enabled only for 64-bit systems. We also make
> the option selectable from the menu, so that the user can specify different
> values. This is useful for 32-bit systems that need to allocate more than
> 4MB of physically contiguous memory.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
If there are no objections, I'd like this patch picked up for 2.6.26.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCHv2 2/3] ep8248e: Reference SMC parameter RAM base in the device tree.
From: Scott Wood @ 2008-03-27 15:39 UTC (permalink / raw)
To: Laurent Pinchart; +Cc: linuxppc-dev
In-Reply-To: <200803271010.33825.laurentp@cse-semaphore.com>
On Thu, Mar 27, 2008 at 10:10:33AM +0100, Laurent Pinchart wrote:
> On Wednesday 26 March 2008 17:59, Scott Wood wrote:
> > This breaks the bootwrapper console.
>
> And of course I forgot about that :-)
>
> The boot wrapper code doesn't have any dpram allocator. Any objection against
> using a chunk of dpram at a fixed location ? What about at the beginning of
> the dpram ? The DTS muram node would then exclude a chunk of dpram at offset
> 0x0000 instead of 0x1100.
I'm not entirely comfortable with using a chunk outside of what's in the
muram node, and assuming that it's for the SMC pram -- what if there's
microcode or something there?
Since udbg is only for debugging, and is marked as potentially dangerous,
how about just using the end of muram (as described in the device tree)?
If the muram is fully allocated, it won't happen until after the real
serial console is initialized.
-Scott
^ permalink raw reply
* [PATCH] [POWERPC] 4xx: Only reset PCIe PHY on 405EX systems when no link is detected
From: Stefan Roese @ 2008-03-27 15:34 UTC (permalink / raw)
To: linuxppc-dev
Since the arch/powerpc PCI subsystem now does a complete re-assignment of
the resources, we can move from the unconditional PCIe PHY reset to the
conditional version. Now the PHY is only reset, if no link is established yet.
An additional PHY reset (one is already done in U-Boot) leads to problems
with some Atheros PCIe boards and some HP FPGA PCIe designs.
Signed-off-by: Stefan Roese <sr@denx.de>
---
arch/powerpc/sysdev/ppc4xx_pci.c | 8 --------
1 files changed, 0 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index 5abfcd1..9e633f8 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -830,17 +830,9 @@ static int ppc405ex_pciex_init_port_hw(struct ppc4xx_pciex_port *port)
* PCIe boards don't show this problem.
* This has to be re-tested and fixed in a later release!
*/
-#if 0 /* XXX FIXME: Not resetting the PHY will leave all resources
- * configured as done previously by U-Boot. Then Linux will currently
- * not reassign them. So the PHY reset is now done always. This will
- * lead to problems with the Atheros PCIe board again.
- */
val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
if (!(val & 0x00001000))
ppc405ex_pcie_phy_reset(port);
-#else
- ppc405ex_pcie_phy_reset(port);
-#endif
dcr_write(port->dcrs, DCRO_PEGPL_CFG, 0x10000000); /* guarded on */
--
1.5.4.4
^ permalink raw reply related
* ksoftirqd_CPU0 uses 100% CPU
From: Wojciech Kromer @ 2008-03-27 14:50 UTC (permalink / raw)
To: linuxppc-embedded
Hello.
When I plug off ethernet cable ksoftirqd_CPU0 starts using 100% od CPU.
After pluging it back or downing eth0 interface it comes back to normal load.
Any sollution?
I'm using 2.4.25 on ppc 8250.
Regards.
^ permalink raw reply
* [PATCH 1/2] ibm_newemac: PowerPC 440GX EMAC PHY clock workaround
From: Valentine Barshak @ 2008-03-27 14:40 UTC (permalink / raw)
To: linuxppc-dev; +Cc: jeff, netdev
In-Reply-To: <20080327085353.6ac04886@zod.rchland.ibm.com>
The PowerPC 440GX Taishan board fails to reset EMAC3 (reset timeout error)
if there's no link. Because of that it fails to find PHY chip. The older ibm_emac
driver had a workaround for that: the EMAC_CLK_INTERNAL/EMAC_CLK_EXTERNAL macros,
which toggle the Ethernet Clock Select bit in the SDR0_MFR register. This patch
does the same for "ibm,emac-440gx" compatible chips. The workaround forces
clock on -all- EMACs, so we select clock under global emac_phy_map_lock.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
---
drivers/net/ibm_newemac/core.c | 16 +++++++++++++++-
drivers/net/ibm_newemac/core.h | 8 ++++++--
2 files changed, 21 insertions(+), 3 deletions(-)
diff -pruN linux-2.6.orig/drivers/net/ibm_newemac/core.c linux-2.6/drivers/net/ibm_newemac/core.c
--- linux-2.6.orig/drivers/net/ibm_newemac/core.c 2008-02-22 19:56:26.000000000 +0300
+++ linux-2.6/drivers/net/ibm_newemac/core.c 2008-02-22 20:38:47.000000000 +0300
@@ -43,6 +43,8 @@
#include <asm/io.h>
#include <asm/dma.h>
#include <asm/uaccess.h>
+#include <asm/dcr.h>
+#include <asm/dcr-regs.h>
#include "core.h"
@@ -2323,6 +2325,10 @@ static int __devinit emac_init_phy(struc
dev->phy.mdio_read = emac_mdio_read;
dev->phy.mdio_write = emac_mdio_write;
+ /* Enable internal clock source */
+ if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
+ dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS);
+
/* Configure EMAC with defaults so we can at least use MDIO
* This is needed mostly for 440GX
*/
@@ -2355,6 +2361,11 @@ static int __devinit emac_init_phy(struc
if (!emac_mii_phy_probe(&dev->phy, i))
break;
}
+
+ /* Enable external clock source */
+ if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
+ dcri_clrset(SDR0, SDR0_MFR, SDR0_MFR_ECS, 0);
+
mutex_unlock(&emac_phy_map_lock);
if (i == 0x20) {
printk(KERN_WARNING "%s: can't find PHY!\n", np->full_name);
@@ -2480,8 +2491,11 @@ static int __devinit emac_init_config(st
}
/* Check EMAC version */
- if (of_device_is_compatible(np, "ibm,emac4"))
+ if (of_device_is_compatible(np, "ibm,emac4")) {
dev->features |= EMAC_FTR_EMAC4;
+ if (of_device_is_compatible(np, "ibm,emac-440gx"))
+ dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX;
+ }
/* Fixup some feature bits based on the device tree */
if (of_get_property(np, "has-inverted-stacr-oc", NULL))
diff -pruN linux-2.6.orig/drivers/net/ibm_newemac/core.h linux-2.6/drivers/net/ibm_newemac/core.h
--- linux-2.6.orig/drivers/net/ibm_newemac/core.h 2008-02-21 16:45:36.000000000 +0300
+++ linux-2.6/drivers/net/ibm_newemac/core.h 2008-02-22 19:57:44.000000000 +0300
@@ -301,6 +301,10 @@ struct emac_instance {
* Set if we have new type STACR with STAOPC
*/
#define EMAC_FTR_HAS_NEW_STACR 0x00000040
+/*
+ * Set if we need phy clock workaround for 440gx
+ */
+#define EMAC_FTR_440GX_PHY_CLK_FIX 0x00000080
/* Right now, we don't quite handle the always/possible masks on the
@@ -312,8 +316,8 @@ enum {
EMAC_FTRS_POSSIBLE =
#ifdef CONFIG_IBM_NEW_EMAC_EMAC4
- EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR |
- EMAC_FTR_STACR_OC_INVERT |
+ EMAC_FTR_EMAC4 | EMAC_FTR_HAS_NEW_STACR |
+ EMAC_FTR_STACR_OC_INVERT | EMAC_FTR_440GX_PHY_CLK_FIX |
#endif
#ifdef CONFIG_IBM_NEW_EMAC_TAH
EMAC_FTR_HAS_TAH |
^ permalink raw reply
* [PATCH 2/2] ibm_newemac: PowerPC 440EP/440GR EMAC PHY clock workaround
From: Valentine Barshak @ 2008-03-27 14:42 UTC (permalink / raw)
To: linuxppc-dev; +Cc: jeff, netdev
In-Reply-To: <20080327085353.6ac04886@zod.rchland.ibm.com>
This patch adds ibm_newemac PHY clock workaround for 440EP/440GR EMAC
attached to a PHY which doesn't generate RX clock if there is no link.
The code is based on the previous ibm_emac driver stuff. The 440EP/440GR
allows controlling each EMAC clock separately as opposed to global clock
selection for 440GX.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
---
drivers/net/ibm_newemac/core.c | 34 ++++++++++++++++++++++++++++++++--
drivers/net/ibm_newemac/core.h | 6 +++++-
2 files changed, 37 insertions(+), 3 deletions(-)
diff -pruN linux-2.6.orig/drivers/net/ibm_newemac/core.c linux-2.6/drivers/net/ibm_newemac/core.c
--- linux-2.6.orig/drivers/net/ibm_newemac/core.c 2008-02-26 16:32:33.000000000 +0300
+++ linux-2.6/drivers/net/ibm_newemac/core.c 2008-02-26 16:37:52.000000000 +0300
@@ -129,10 +129,29 @@ static struct device_node *emac_boot_lis
static inline void emac_report_timeout_error(struct emac_instance *dev,
const char *error)
{
- if (net_ratelimit())
+ if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX |
+ EMAC_FTR_440EP_PHY_CLK_FIX))
+ DBG(dev, "%s" NL, error);
+ else if (net_ratelimit())
printk(KERN_ERR "%s: %s\n", dev->ndev->name, error);
}
+/* EMAC PHY clock workaround:
+ * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX,
+ * which allows controlling each EMAC clock
+ */
+static inline void emac_rx_clk_tx(struct emac_instance *dev)
+{
+ if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
+ dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS >> dev->cell_index);
+}
+
+static inline void emac_rx_clk_default(struct emac_instance *dev)
+{
+ if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
+ dcri_clrset(SDR0, SDR0_MFR, SDR0_MFR_ECS >> dev->cell_index, 0);
+}
+
/* PHY polling intervals */
#define PHY_POLL_LINK_ON HZ
#define PHY_POLL_LINK_OFF (HZ / 5)
@@ -1089,9 +1112,11 @@ static int emac_open(struct net_device *
int link_poll_interval;
if (dev->phy.def->ops->poll_link(&dev->phy)) {
dev->phy.def->ops->read_link(&dev->phy);
+ emac_rx_clk_default(dev);
netif_carrier_on(dev->ndev);
link_poll_interval = PHY_POLL_LINK_ON;
} else {
+ emac_rx_clk_tx(dev);
netif_carrier_off(dev->ndev);
link_poll_interval = PHY_POLL_LINK_OFF;
}
@@ -1169,6 +1194,7 @@ static void emac_link_timer(struct work_
if (dev->phy.def->ops->poll_link(&dev->phy)) {
if (!netif_carrier_ok(dev->ndev)) {
+ emac_rx_clk_default(dev);
/* Get new link parameters */
dev->phy.def->ops->read_link(&dev->phy);
@@ -1181,6 +1207,7 @@ static void emac_link_timer(struct work_
link_poll_interval = PHY_POLL_LINK_ON;
} else {
if (netif_carrier_ok(dev->ndev)) {
+ emac_rx_clk_tx(dev);
netif_carrier_off(dev->ndev);
netif_tx_disable(dev->ndev);
emac_reinitialize(dev);
@@ -2325,9 +2352,12 @@ static int __devinit emac_init_phy(struc
dev->phy.mdio_read = emac_mdio_read;
dev->phy.mdio_write = emac_mdio_write;
- /* Enable internal clock source */
+ /* EMAC PHY clock workaround */
if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
+ /* Enable internal clock source */
dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS);
+ else
+ emac_rx_clk_tx(dev);
/* Configure EMAC with defaults so we can at least use MDIO
* This is needed mostly for 440GX
@@ -2495,6 +2525,10 @@ static int __devinit emac_init_config(st
dev->features |= EMAC_FTR_EMAC4;
if (of_device_is_compatible(np, "ibm,emac-440gx"))
dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX;
+ } else {
+ if (of_device_is_compatible(np, "ibm,emac-440ep") ||
+ of_device_is_compatible(np, "ibm,emac-440gr"))
+ dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
}
/* Fixup some feature bits based on the device tree */
diff -pruN linux-2.6.orig/drivers/net/ibm_newemac/core.h linux-2.6/drivers/net/ibm_newemac/core.h
--- linux-2.6.orig/drivers/net/ibm_newemac/core.h 2008-02-26 16:32:33.000000000 +0300
+++ linux-2.6/drivers/net/ibm_newemac/core.h 2008-02-26 16:37:52.000000000 +0300
@@ -305,6 +305,10 @@ struct emac_instance {
* Set if we need phy clock workaround for 440gx
*/
#define EMAC_FTR_440GX_PHY_CLK_FIX 0x00000080
+/*
+ * Set if we need phy clock workaround for 440ep or 440gr
+ */
+#define EMAC_FTR_440EP_PHY_CLK_FIX 0x00000100
/* Right now, we don't quite handle the always/possible masks on the
@@ -328,7 +332,7 @@ enum {
#ifdef CONFIG_IBM_NEW_EMAC_RGMII
EMAC_FTR_HAS_RGMII |
#endif
- 0,
+ EMAC_FTR_440EP_PHY_CLK_FIX,
};
static inline int emac_has_feature(struct emac_instance *dev,
^ permalink raw reply
* [PATCH] ibm_newemac: emac_tx_csum typo fix
From: Valentine Barshak @ 2008-03-27 14:43 UTC (permalink / raw)
To: linuxppc-dev; +Cc: jeff, netdev
In-Reply-To: <20080327085353.6ac04886@zod.rchland.ibm.com>
Move the "&& skb->ip_summed == CHECKSUM_PARTIAL" part out of
emac_has_feature parameters.
Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
---
drivers/net/ibm_newemac/core.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff -pruN linux-2.6.orig/drivers/net/ibm_newemac/core.c linux-2.6/drivers/net/ibm_newemac/core.c
--- linux-2.6.orig/drivers/net/ibm_newemac/core.c 2008-02-21 16:45:36.000000000 +0300
+++ linux-2.6/drivers/net/ibm_newemac/core.c 2008-02-22 19:55:29.000000000 +0300
@@ -1235,8 +1235,8 @@ static int emac_close(struct net_device
static inline u16 emac_tx_csum(struct emac_instance *dev,
struct sk_buff *skb)
{
- if (emac_has_feature(dev, EMAC_FTR_HAS_TAH &&
- skb->ip_summed == CHECKSUM_PARTIAL)) {
+ if (emac_has_feature(dev, EMAC_FTR_HAS_TAH) &&
+ (skb->ip_summed == CHECKSUM_PARTIAL)) {
++dev->stats.tx_packets_csum;
return EMAC_TX_CTRL_TAH_CSUM;
}
^ permalink raw reply
* [PATCH] [POWERPC] 4xx: Create common ppc4xx_reset_system() in ppc4xx_soc.c
From: Stefan Roese @ 2008-03-27 14:43 UTC (permalink / raw)
To: linuxppc-dev
This patch creates a common system reset routine for all 40x and 44x
systems. Previously only a 44x routine existed. But since this system
reset via the debug control register is common for 40x and 44x let's
share this code for all those platforms in ppc4xx_soc.c.
This patch also enables CONFIG_4xx_SOC for all 40x and 44x platforms.
Tested on Kilauea (405EX) and Canyonlands (440EX).
Signed-off-by: Stefan Roese <sr@denx.de>
---
This patch applies to the linux-next tree of today (2008-03-27).
arch/powerpc/platforms/40x/ep405.c | 2 ++
arch/powerpc/platforms/40x/kilauea.c | 4 +++-
arch/powerpc/platforms/40x/makalu.c | 2 ++
arch/powerpc/platforms/40x/virtex.c | 2 ++
arch/powerpc/platforms/40x/walnut.c | 4 +++-
arch/powerpc/platforms/44x/44x.h | 1 -
arch/powerpc/platforms/44x/Kconfig | 1 -
arch/powerpc/platforms/44x/bamboo.c | 15 +++++++--------
arch/powerpc/platforms/44x/canyonlands.c | 5 ++---
arch/powerpc/platforms/44x/ebony.c | 5 ++---
arch/powerpc/platforms/44x/katmai.c | 5 ++---
arch/powerpc/platforms/44x/misc_44x.S | 11 -----------
arch/powerpc/platforms/44x/rainier.c | 4 ++--
arch/powerpc/platforms/44x/sequoia.c | 4 +---
arch/powerpc/platforms/44x/taishan.c | 5 ++---
arch/powerpc/platforms/44x/warp.c | 6 ++----
arch/powerpc/platforms/Kconfig.cputype | 2 ++
arch/powerpc/sysdev/ppc4xx_soc.c | 11 +++++++++++
include/asm-powerpc/ppc4xx.h | 18 ++++++++++++++++++
19 files changed, 63 insertions(+), 44 deletions(-)
create mode 100644 include/asm-powerpc/ppc4xx.h
diff --git a/arch/powerpc/platforms/40x/ep405.c b/arch/powerpc/platforms/40x/ep405.c
index 13d1345..ae2e7f6 100644
--- a/arch/powerpc/platforms/40x/ep405.c
+++ b/arch/powerpc/platforms/40x/ep405.c
@@ -29,6 +29,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
+#include <asm/ppc4xx.h>
static struct device_node *bcsr_node;
static void __iomem *bcsr_regs;
@@ -119,5 +120,6 @@ define_machine(ep405) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/40x/kilauea.c b/arch/powerpc/platforms/40x/kilauea.c
index f9206a7..1dd24ff 100644
--- a/arch/powerpc/platforms/40x/kilauea.c
+++ b/arch/powerpc/platforms/40x/kilauea.c
@@ -1,7 +1,7 @@
/*
* Kilauea board specific routines
*
- * Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ * Copyright 2007-2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
*
* Based on the Walnut code by
* Josh Boyer <jwboyer@linux.vnet.ibm.com>
@@ -20,6 +20,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id kilauea_of_bus[] = {
{ .compatible = "ibm,plb4", },
@@ -54,5 +55,6 @@ define_machine(kilauea) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/40x/makalu.c b/arch/powerpc/platforms/40x/makalu.c
index 4e4df72..a6a1d60 100644
--- a/arch/powerpc/platforms/40x/makalu.c
+++ b/arch/powerpc/platforms/40x/makalu.c
@@ -20,6 +20,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id makalu_of_bus[] = {
{ .compatible = "ibm,plb4", },
@@ -54,5 +55,6 @@ define_machine(makalu) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/40x/virtex.c b/arch/powerpc/platforms/40x/virtex.c
index 0422590..fc7fb00 100644
--- a/arch/powerpc/platforms/40x/virtex.c
+++ b/arch/powerpc/platforms/40x/virtex.c
@@ -14,6 +14,7 @@
#include <asm/prom.h>
#include <asm/time.h>
#include <asm/xilinx_intc.h>
+#include <asm/ppc4xx.h>
static struct of_device_id xilinx_of_bus_ids[] __initdata = {
{ .compatible = "xlnx,plb-v46-1.00.a", },
@@ -48,5 +49,6 @@ define_machine(virtex) {
.probe = virtex_probe,
.init_IRQ = xilinx_intc_init_tree,
.get_irq = xilinx_intc_get_irq,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/40x/walnut.c b/arch/powerpc/platforms/40x/walnut.c
index b8b257e..335df91 100644
--- a/arch/powerpc/platforms/40x/walnut.c
+++ b/arch/powerpc/platforms/40x/walnut.c
@@ -26,6 +26,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id walnut_of_bus[] = {
{ .compatible = "ibm,plb3", },
@@ -61,5 +62,6 @@ define_machine(walnut) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
- .calibrate_decr = generic_calibrate_decr,
+ .restart = ppc4xx_reset_system,
+ .calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index 42eabf8..dbc4d2b 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -3,6 +3,5 @@
extern u8 as1_readb(volatile u8 __iomem *addr);
extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
-extern void ppc44x_reset_system(char *cmd);
#endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 5fc28aa..6abe913 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -129,7 +129,6 @@ config 440GP
config 440GX
bool
- select 4xx_SOC
select IBM_NEW_EMAC_EMAC4
select IBM_NEW_EMAC_RGMII
select IBM_NEW_EMAC_ZMII #test only
diff --git a/arch/powerpc/platforms/44x/bamboo.c b/arch/powerpc/platforms/44x/bamboo.c
index fb9a22a..cef169e 100644
--- a/arch/powerpc/platforms/44x/bamboo.c
+++ b/arch/powerpc/platforms/44x/bamboo.c
@@ -22,8 +22,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
-
-#include "44x.h"
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id bamboo_of_bus[] = {
{ .compatible = "ibm,plb4", },
@@ -53,11 +52,11 @@ static int __init bamboo_probe(void)
}
define_machine(bamboo) {
- .name = "Bamboo",
- .probe = bamboo_probe,
- .progress = udbg_progress,
- .init_IRQ = uic_init_tree,
- .get_irq = uic_get_irq,
- .restart = ppc44x_reset_system,
+ .name = "Bamboo",
+ .probe = bamboo_probe,
+ .progress = udbg_progress,
+ .init_IRQ = uic_init_tree,
+ .get_irq = uic_get_irq,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/44x/canyonlands.c b/arch/powerpc/platforms/44x/canyonlands.c
index dac5b32..3949289 100644
--- a/arch/powerpc/platforms/44x/canyonlands.c
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -23,8 +23,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
-
-#include "44x.h"
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id canyonlands_of_bus[] = {
{ .compatible = "ibm,plb4", },
@@ -59,6 +58,6 @@ define_machine(canyonlands) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
- .restart = ppc44x_reset_system,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/44x/ebony.c b/arch/powerpc/platforms/44x/ebony.c
index 1a8d467..a0e8fe4 100644
--- a/arch/powerpc/platforms/44x/ebony.c
+++ b/arch/powerpc/platforms/44x/ebony.c
@@ -26,8 +26,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
-
-#include "44x.h"
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id ebony_of_bus[] = {
{ .compatible = "ibm,plb4", },
@@ -66,6 +65,6 @@ define_machine(ebony) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
- .restart = ppc44x_reset_system,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/44x/katmai.c b/arch/powerpc/platforms/44x/katmai.c
index 1113412..44f4b3a 100644
--- a/arch/powerpc/platforms/44x/katmai.c
+++ b/arch/powerpc/platforms/44x/katmai.c
@@ -22,8 +22,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
-
-#include "44x.h"
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id katmai_of_bus[] = {
{ .compatible = "ibm,plb4", },
@@ -58,6 +57,6 @@ define_machine(katmai) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
- .restart = ppc44x_reset_system,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/44x/misc_44x.S b/arch/powerpc/platforms/44x/misc_44x.S
index 3bce71d..dc12b80 100644
--- a/arch/powerpc/platforms/44x/misc_44x.S
+++ b/arch/powerpc/platforms/44x/misc_44x.S
@@ -44,14 +44,3 @@ _GLOBAL(as1_writeb)
sync
isync
blr
-
-/*
- * void ppc44x_reset_system(char *cmd)
- *
- * At present, this routine just applies a system reset.
- */
-_GLOBAL(ppc44x_reset_system)
- mfspr r13,SPRN_DBCR0
- oris r13,r13,DBCR0_RST_SYSTEM@h
- mtspr SPRN_DBCR0,r13
- b . /* Just in case the reset doesn't work */
diff --git a/arch/powerpc/platforms/44x/rainier.c b/arch/powerpc/platforms/44x/rainier.c
index a7fae1c..4f1ff84 100644
--- a/arch/powerpc/platforms/44x/rainier.c
+++ b/arch/powerpc/platforms/44x/rainier.c
@@ -22,7 +22,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
-#include "44x.h"
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id rainier_of_bus[] = {
{ .compatible = "ibm,plb4", },
@@ -57,6 +57,6 @@ define_machine(rainier) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
- .restart = ppc44x_reset_system,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/44x/sequoia.c b/arch/powerpc/platforms/44x/sequoia.c
index d279db4..1782d41 100644
--- a/arch/powerpc/platforms/44x/sequoia.c
+++ b/arch/powerpc/platforms/44x/sequoia.c
@@ -23,8 +23,6 @@
#include <asm/uic.h>
#include <asm/pci-bridge.h>
-#include "44x.h"
-
static __initdata struct of_device_id sequoia_of_bus[] = {
{ .compatible = "ibm,plb4", },
{ .compatible = "ibm,opb", },
@@ -58,6 +56,6 @@ define_machine(sequoia) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
- .restart = ppc44x_reset_system,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/44x/taishan.c b/arch/powerpc/platforms/44x/taishan.c
index 28ab7e2..49c78b2 100644
--- a/arch/powerpc/platforms/44x/taishan.c
+++ b/arch/powerpc/platforms/44x/taishan.c
@@ -29,8 +29,7 @@
#include <asm/time.h>
#include <asm/uic.h>
#include <asm/pci-bridge.h>
-
-#include "44x.h"
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id taishan_of_bus[] = {
{ .compatible = "ibm,plb4", },
@@ -68,6 +67,6 @@ define_machine(taishan) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
- .restart = ppc44x_reset_system,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
index da5b7b7..39cf615 100644
--- a/arch/powerpc/platforms/44x/warp.c
+++ b/arch/powerpc/platforms/44x/warp.c
@@ -18,9 +18,7 @@
#include <asm/udbg.h>
#include <asm/time.h>
#include <asm/uic.h>
-
-#include "44x.h"
-
+#include <asm/ppc4xx.h>
static __initdata struct of_device_id warp_of_bus[] = {
{ .compatible = "ibm,plb4", },
@@ -49,7 +47,7 @@ define_machine(warp) {
.progress = udbg_progress,
.init_IRQ = uic_init_tree,
.get_irq = uic_get_irq,
- .restart = ppc44x_reset_system,
+ .restart = ppc4xx_reset_system,
.calibrate_decr = generic_calibrate_decr,
};
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 0c3face..5fc7fac 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -41,11 +41,13 @@ config 40x
bool "AMCC 40x"
select PPC_DCR_NATIVE
select PPC_UDBG_16550
+ select 4xx_SOC
config 44x
bool "AMCC 44x"
select PPC_DCR_NATIVE
select PPC_UDBG_16550
+ select 4xx_SOC
config E200
bool "Freescale e200"
diff --git a/arch/powerpc/sysdev/ppc4xx_soc.c b/arch/powerpc/sysdev/ppc4xx_soc.c
index 4b8617e..5b32adc 100644
--- a/arch/powerpc/sysdev/ppc4xx_soc.c
+++ b/arch/powerpc/sysdev/ppc4xx_soc.c
@@ -23,6 +23,7 @@
#include <asm/dcr.h>
#include <asm/dcr-regs.h>
+#include <asm/reg.h>
static u32 dcrbase_l2c;
@@ -187,3 +188,13 @@ static int __init ppc4xx_l2c_probe(void)
return 0;
}
arch_initcall(ppc4xx_l2c_probe);
+
+/*
+ * At present, this routine just applies a system reset.
+ */
+void ppc4xx_reset_system(char *cmd)
+{
+ mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_RST_SYSTEM);
+ while (1)
+ ; /* Just in case the reset doesn't work */
+}
diff --git a/include/asm-powerpc/ppc4xx.h b/include/asm-powerpc/ppc4xx.h
new file mode 100644
index 0000000..033039a
--- /dev/null
+++ b/include/asm-powerpc/ppc4xx.h
@@ -0,0 +1,18 @@
+/*
+ * PPC4xx Prototypes and definitions
+ *
+ * Copyright 2008 DENX Software Engineering, Stefan Roese <sr@denx.de>
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#ifndef __ASM_POWERPC_PPC4xx_H__
+#define __ASM_POWERPC_PPC4xx_H__
+
+extern void ppc4xx_reset_system(char *cmd);
+
+#endif /* __ASM_POWERPC_PPC4xx_H__ */
--
1.5.4.4
^ permalink raw reply related
* Re: OF compatible MTD platform RAM driver ?
From: Laurent Pinchart @ 2008-03-27 14:31 UTC (permalink / raw)
To: David Gibson; +Cc: ben, linux-mtd, linuxppc-dev
In-Reply-To: <20080327100304.GC10397@localhost.localdomain>
On Thursday 27 March 2008 11:03, David Gibson wrote:
> On Thu, Mar 27, 2008 at 10:13:32AM +0100, Laurent Pinchart wrote:
> > On Wednesday 26 March 2008 13:53, Sergei Shtylyov wrote:
> > > Laurent Pinchart wrote:
> [snip]
> > > Heh, we've gone thru "physmap" before -- it was labelled
> > > Linux-specific name (well, I'd agree with that).
> >=20
> > physmap stands for physically mapped. That doesn't sound
> > Linux-specific to me, the fact that the MTD driver has the same name
> > is a pure coincidence. linmap-rom and linmap-rom sound even more
> > Linux-specific :-)
>=20
> It may not be Linux specific per se, but it's a bad name, because the
> fact that the device is physically direct mapped isn't a useful
> distinguishing feature of the device. Main memory is also direct
> physically mapped, after all, but that's not what you want to cover
> with this description. In general how a device is wired is described
> by where it sits in the tree, not by its properties.
>=20
> It only seems like a usefully distinguishing name because it's the
> Linux "physmap_of" driver that uses it. So in this sense it is a
> Linux specific name after all. In fact, physmap_of is itself very
> badly named - right now it only handles direct mapped mtds, but that's
> not inherent; it could be trivially extended to also instantiate a
> non-direct-mapped device (as long as the underlying mtd layer
> supported it, of course). It bears no relation at all to the
> "physmap" driver, except historical accident.
>=20
> > Could we agree on a name ? I'd like to submit a new patch.
>=20
> For ROMs I think just plain "rom" should be sufficient. For RAMs we
> need something to indicate that it's memory but intended for secondary
> storage, not as main memory. Unfortunately, I'm finding myself unable
> to think of something.
What about "storage-ram", "auxiliary-ram", "secondary-ram", "application-ra=
m",
"user-ram" or "ramdisk" ?
=2D-=20
Laurent Pinchart
CSE Semaphore Belgium
Chauss=E9e de Bruxelles, 732A
B-1410 Waterloo
Belgium
T +32 (2) 387 42 59
=46 +32 (2) 387 42 75
^ permalink raw reply
* Re: [PATCH 2/2] ibm_newemac: PowerPC 440EP/440GR EMAC PHY clock workaround
From: Josh Boyer @ 2008-03-27 13:53 UTC (permalink / raw)
To: Valentine Barshak; +Cc: linuxppc-dev
In-Reply-To: <47EBA616.9070705@ru.mvista.com>
On Thu, 27 Mar 2008 16:50:14 +0300
Valentine Barshak <vbarshak@ru.mvista.com> wrote:
> Josh Boyer wrote:
> > On Tue, 25 Mar 2008 10:22:15 +1100
> > Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> >
> >> On Thu, 2008-03-06 at 16:43 +0300, Valentine Barshak wrote:
> >>> This patch adds ibm_newemac PHY clock workaround for 440EP/440GR EMAC
> >>> attached to a PHY which doesn't generate RX clock if there is no link.
> >>> The code is based on the previous ibm_emac driver stuff. The 440EP/440GR
> >>> allows controlling each EMAC clock separately as opposed to global clock
> >>> selection for 440GX.
> >>>
> >>> Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
> >> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> >
> > This never went to netdev or Jeff from what I can see.
> >
> > josh
>
> Do I need to resend these and the other one from
> http://ozlabs.org/pipermail/linuxppc-dev/2008-February/052114.html
> cc'ing Jeff?
Can't hurt.
> I thought it was decided that Ben collects and sends all emac patches to
> netdev.
So did I.
josh
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