* [PATCH 3/3 v3] Move the paca array into the BSS.
From: Tony Breeds @ 2008-04-23 4:06 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev
In-Reply-To: <d54206d25b690c9160401f65a583f586004dcd5d.1208923391.git.tony@bakeyournoodle.com>
With NR_CPUS=1024
text data bss dec hex filename
137 1704032 0 1704169 1a00e9 arch/powerpc/kernel/paca.o :Before
121 1179744 524288 1704153 1a00d9 arch/powerpc/kernel/paca.o :After
Now that we're not statically allocating the paca, we don't need the
NR_STATIC_PACAS #define anymore.
Also remove unneeded #includes.
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
---
Changes since v1:
- none
Changes since v2:
- none
arch/powerpc/kernel/paca.c | 64 +++-----------------------------------------
include/asm-powerpc/paca.h | 17 -----------
2 files changed, 4 insertions(+), 77 deletions(-)
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index 4c7db2e..c9bf17e 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -7,26 +7,11 @@
* 2 of the License, or (at your option) any later version.
*/
-#include <linux/types.h>
#include <linux/threads.h>
#include <linux/module.h>
-#include <asm/processor.h>
-#include <asm/ptrace.h>
-#include <asm/page.h>
#include <asm/lppaca.h>
#include <asm/paca.h>
-#include <asm/mmu.h>
-
-/*
- * In order to handle "strange" values of NR_CPUS, Make sure we use
- * max(NR_CPUS, NR_STATIC_PACAS) for array sizes below
- */
-#if NR_CPUS > NR_STATIC_PACAS
-#define MAX_CPUS NR_CPUS
-#else
-#define MAX_CPUS NR_STATIC_PACAS
-#endif
/* This symbol is provided by the linker - let it fill in the paca
* field correctly */
@@ -42,7 +27,7 @@ extern unsigned long __toc_start;
* will suffice to ensure that it doesn't cross a page boundary.
*/
struct lppaca lppaca[] = {
- [0 ... (MAX_CPUS-1)] = {
+ [0 ... (NR_CPUS-1)] = {
.desc = 0xd397d781, /* "LpPa" */
.size = sizeof(struct lppaca),
.dyn_proc_status = 2,
@@ -59,7 +44,7 @@ struct lppaca lppaca[] = {
* initially, hence will all be invaild until we actually write them.
*/
struct slb_shadow slb_shadow[] __cacheline_aligned = {
- [0 ... (MAX_CPUS-1)] = {
+ [0 ... (NR_CPUS-1)] = {
.persistent = SLB_NUM_BOLTED,
.buffer_length = sizeof(struct slb_shadow),
},
@@ -74,50 +59,9 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = {
* processors. The processor VPD array needs one entry per physical
* processor (not thread).
*/
-#define PACA_INIT(number) \
-{ \
- .lppaca_ptr = &lppaca[number], \
- .lock_token = 0x8000, \
- .paca_index = (number), /* Paca Index */ \
- .kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL, \
- .hw_cpu_id = 0xffff, \
- .slb_shadow_ptr = &slb_shadow[number], \
- .__current = &init_task, \
-}
-
-struct paca_struct paca[MAX_CPUS] = {
- PACA_INIT(0),
-#if NR_CPUS > 1
- PACA_INIT( 1), PACA_INIT( 2), PACA_INIT( 3),
-#if NR_CPUS > 4
- PACA_INIT( 4), PACA_INIT( 5), PACA_INIT( 6), PACA_INIT( 7),
-#if NR_CPUS > 8
- PACA_INIT( 8), PACA_INIT( 9), PACA_INIT( 10), PACA_INIT( 11),
- PACA_INIT( 12), PACA_INIT( 13), PACA_INIT( 14), PACA_INIT( 15),
- PACA_INIT( 16), PACA_INIT( 17), PACA_INIT( 18), PACA_INIT( 19),
- PACA_INIT( 20), PACA_INIT( 21), PACA_INIT( 22), PACA_INIT( 23),
- PACA_INIT( 24), PACA_INIT( 25), PACA_INIT( 26), PACA_INIT( 27),
- PACA_INIT( 28), PACA_INIT( 29), PACA_INIT( 30), PACA_INIT( 31),
-#if NR_CPUS > 32
- PACA_INIT( 32), PACA_INIT( 33), PACA_INIT( 34), PACA_INIT( 35),
- PACA_INIT( 36), PACA_INIT( 37), PACA_INIT( 38), PACA_INIT( 39),
- PACA_INIT( 40), PACA_INIT( 41), PACA_INIT( 42), PACA_INIT( 43),
- PACA_INIT( 44), PACA_INIT( 45), PACA_INIT( 46), PACA_INIT( 47),
- PACA_INIT( 48), PACA_INIT( 49), PACA_INIT( 50), PACA_INIT( 51),
- PACA_INIT( 52), PACA_INIT( 53), PACA_INIT( 54), PACA_INIT( 55),
- PACA_INIT( 56), PACA_INIT( 57), PACA_INIT( 58), PACA_INIT( 59),
- PACA_INIT( 60), PACA_INIT( 61), PACA_INIT( 62), PACA_INIT( 63),
-#endif
-#endif
-#endif
-#endif
-};
+struct paca_struct paca[NR_CPUS];
EXPORT_SYMBOL(paca);
-/*
- * The first few (NR_STATIC_PACAS) paca entires are initiialised
- * statically. populate the rest.
- */
void __init initialise_pacas(void)
{
int cpu;
@@ -128,7 +72,7 @@ void __init initialise_pacas(void)
unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
/* Can't use for_each_*_cpu, as they aren't functional yet */
- for (cpu = NR_STATIC_PACAS; cpu < NR_CPUS; cpu++) {
+ for (cpu = 0; cpu < NR_CPUS; cpu++) {
struct paca_struct *new_paca = &paca[cpu];
new_paca->lppaca_ptr = &lppaca[cpu];
diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h
index 2a05cc0..0bfc180 100644
--- a/include/asm-powerpc/paca.h
+++ b/include/asm-powerpc/paca.h
@@ -22,23 +22,6 @@
#include <asm/lppaca.h>
#include <asm/mmu.h>
-/*
- * iSeries needs the paca to be statically allocated and initialised.
- * We will allocated this many, based on NR_CPUS.
- */
-#if NR_CPUS > 32
-#define NR_STATIC_PACAS 64
-#elif NR_CPUS > 8
-#define NR_STATIC_PACAS 32
-#elif NR_CPUS > 4
-#define NR_STATIC_PACAS 8
-#elif NR_CPUS > 1
-#define NR_STATIC_PACAS 4
-#else
-#define NR_STATIC_PACAS 1
-#endif
-
-
register struct paca_struct *local_paca asm("r13");
#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
--
1.5.5.1
^ permalink raw reply related
* [PATCH 2/3 v3] Make iSeries spin on __secondary_hold_spinloop, like pSeries.
From: Tony Breeds @ 2008-04-23 4:06 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev; +Cc: Stephen Rothwell
In-Reply-To: <d54206d25b690c9160401f65a583f586004dcd5d.1208923391.git.tony@bakeyournoodle.com>
Currently all iSeries secondary CPU's spin directly on the cpu_start in thier
paca. Make them spin on the global __secondary_hold_spinloop, until after the
pacas have been initialised.
As sfr points out this works because __secondary_hold_spinloop is being set
already, but iSeries isn't looking at it :)
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
Changes since v1:
- Updated commit message.
Changes since v2:
- Fixed my brain damage, and split out the code that should be in 3/3
arch/powerpc/platforms/iseries/exception.S | 27 ++++++++++++++++++++++++++-
1 files changed, 26 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index c775cd4..8ff330d 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -59,8 +59,33 @@ system_reset_iSeries:
andc r4,r4,r5
mtspr SPRN_CTRLT,r4
+/* Spin on __secondary_hold_spinloop until it is updated by the boot cpu. */
+/* In the UP case we'll yeild() later, and we will not access the paca anyway */
+#ifdef CONFIG_SMP
1:
HMT_LOW
+ LOAD_REG_IMMEDIATE(r23, __secondary_hold_spinloop)
+ ld r23,0(r23)
+ sync
+ LOAD_REG_IMMEDIATE(r3,current_set)
+ sldi r28,r24,3 /* get current_set[cpu#] */
+ ldx r3,r3,r28
+ addi r1,r3,THREAD_SIZE
+ subi r1,r1,STACK_FRAME_OVERHEAD
+
+ cmpwi 0,r23,0 /* Keep poking the Hypervisor until */
+ bne 2f /* we're released */
+ /* Let the Hypervisor know we are alive */
+ /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
+ lis r3,0x8002
+ rldicr r3,r3,32,15 /* r0 = (r3 << 32) & 0xffff000000000000 */
+ li r0,-1 /* r0=-1 indicates a Hypervisor call */
+ sc /* Invoke the hypervisor via a system call */
+ b 1b
+#endif
+
+2:
+ HMT_LOW
#ifdef CONFIG_SMP
lbz r23,PACAPROCSTART(r13) /* Test if this processor
* should start */
@@ -91,7 +116,7 @@ iSeries_secondary_smp_loop:
li r0,-1 /* r0=-1 indicates a Hypervisor call */
sc /* Invoke the hypervisor via a system call */
mfspr r13,SPRN_SPRG3 /* Put r13 back ???? */
- b 1b /* If SMP not configured, secondaries
+ b 2b /* If SMP not configured, secondaries
* loop forever */
/*** ISeries-LPAR interrupt handlers ***/
--
1.5.5.1
^ permalink raw reply related
* [PATCH 1/3 v3] Raise the upper limit of NR_CPUS.
From: Tony Breeds @ 2008-04-23 4:06 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev
As the pacas are statically initialised increasing NR_CPUS beyond 128,
means that any additional pacas will be empty ... which is bad.
This patch adds the required functionality to fill in any excess pacas
at runtime.
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
---
Changes since v1:
- Addressed thinko pointed out by sfr.
- Addeed nicely worded comment about paca->kernel_toc from Segher
Changes since v2:
- none
Paul, please consider before -rc1
arch/powerpc/kernel/paca.c | 61 +++++++++++++++++++++-----------
arch/powerpc/kernel/setup_64.c | 3 ++
arch/powerpc/platforms/Kconfig.cputype | 4 +-
include/asm-powerpc/paca.h | 20 ++++++++++
4 files changed, 65 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index ac163bd..4c7db2e 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -18,6 +18,15 @@
#include <asm/paca.h>
#include <asm/mmu.h>
+/*
+ * In order to handle "strange" values of NR_CPUS, Make sure we use
+ * max(NR_CPUS, NR_STATIC_PACAS) for array sizes below
+ */
+#if NR_CPUS > NR_STATIC_PACAS
+#define MAX_CPUS NR_CPUS
+#else
+#define MAX_CPUS NR_STATIC_PACAS
+#endif
/* This symbol is provided by the linker - let it fill in the paca
* field correctly */
@@ -33,7 +42,7 @@ extern unsigned long __toc_start;
* will suffice to ensure that it doesn't cross a page boundary.
*/
struct lppaca lppaca[] = {
- [0 ... (NR_CPUS-1)] = {
+ [0 ... (MAX_CPUS-1)] = {
.desc = 0xd397d781, /* "LpPa" */
.size = sizeof(struct lppaca),
.dyn_proc_status = 2,
@@ -50,7 +59,7 @@ struct lppaca lppaca[] = {
* initially, hence will all be invaild until we actually write them.
*/
struct slb_shadow slb_shadow[] __cacheline_aligned = {
- [0 ... (NR_CPUS-1)] = {
+ [0 ... (MAX_CPUS-1)] = {
.persistent = SLB_NUM_BOLTED,
.buffer_length = sizeof(struct slb_shadow),
},
@@ -76,7 +85,7 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = {
.__current = &init_task, \
}
-struct paca_struct paca[] = {
+struct paca_struct paca[MAX_CPUS] = {
PACA_INIT(0),
#if NR_CPUS > 1
PACA_INIT( 1), PACA_INIT( 2), PACA_INIT( 3),
@@ -98,27 +107,37 @@ struct paca_struct paca[] = {
PACA_INIT( 52), PACA_INIT( 53), PACA_INIT( 54), PACA_INIT( 55),
PACA_INIT( 56), PACA_INIT( 57), PACA_INIT( 58), PACA_INIT( 59),
PACA_INIT( 60), PACA_INIT( 61), PACA_INIT( 62), PACA_INIT( 63),
-#if NR_CPUS > 64
- PACA_INIT( 64), PACA_INIT( 65), PACA_INIT( 66), PACA_INIT( 67),
- PACA_INIT( 68), PACA_INIT( 69), PACA_INIT( 70), PACA_INIT( 71),
- PACA_INIT( 72), PACA_INIT( 73), PACA_INIT( 74), PACA_INIT( 75),
- PACA_INIT( 76), PACA_INIT( 77), PACA_INIT( 78), PACA_INIT( 79),
- PACA_INIT( 80), PACA_INIT( 81), PACA_INIT( 82), PACA_INIT( 83),
- PACA_INIT( 84), PACA_INIT( 85), PACA_INIT( 86), PACA_INIT( 87),
- PACA_INIT( 88), PACA_INIT( 89), PACA_INIT( 90), PACA_INIT( 91),
- PACA_INIT( 92), PACA_INIT( 93), PACA_INIT( 94), PACA_INIT( 95),
- PACA_INIT( 96), PACA_INIT( 97), PACA_INIT( 98), PACA_INIT( 99),
- PACA_INIT(100), PACA_INIT(101), PACA_INIT(102), PACA_INIT(103),
- PACA_INIT(104), PACA_INIT(105), PACA_INIT(106), PACA_INIT(107),
- PACA_INIT(108), PACA_INIT(109), PACA_INIT(110), PACA_INIT(111),
- PACA_INIT(112), PACA_INIT(113), PACA_INIT(114), PACA_INIT(115),
- PACA_INIT(116), PACA_INIT(117), PACA_INIT(118), PACA_INIT(119),
- PACA_INIT(120), PACA_INIT(121), PACA_INIT(122), PACA_INIT(123),
- PACA_INIT(124), PACA_INIT(125), PACA_INIT(126), PACA_INIT(127),
-#endif
#endif
#endif
#endif
#endif
};
EXPORT_SYMBOL(paca);
+
+/*
+ * The first few (NR_STATIC_PACAS) paca entires are initiialised
+ * statically. populate the rest.
+ */
+void __init initialise_pacas(void)
+{
+ int cpu;
+
+ /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
+ * of the TOC can be addressed using a single machine instruction.
+ */
+ unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
+
+ /* Can't use for_each_*_cpu, as they aren't functional yet */
+ for (cpu = NR_STATIC_PACAS; cpu < NR_CPUS; cpu++) {
+ struct paca_struct *new_paca = &paca[cpu];
+
+ new_paca->lppaca_ptr = &lppaca[cpu];
+ new_paca->lock_token = 0x8000;
+ new_paca->paca_index = cpu;
+ new_paca->kernel_toc = kernel_toc;
+ new_paca->hw_cpu_id = 0xffff;
+ new_paca->slb_shadow_ptr = &slb_shadow[cpu];
+ new_paca->__current = &init_task;
+
+ }
+}
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 31ada9f..5e382ac 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -170,6 +170,9 @@ void __init setup_paca(int cpu)
void __init early_setup(unsigned long dt_ptr)
{
+ /* Fill in any unititialised pacas */
+ initialise_pacas();
+
/* Identify CPU type */
identify_cpu(0, mfspr(SPRN_PVR));
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 5fc7fac..f7efaa9 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -220,8 +220,8 @@ config SMP
If you don't know what to do here, say N.
config NR_CPUS
- int "Maximum number of CPUs (2-128)"
- range 2 128
+ int "Maximum number of CPUs (2-1024)"
+ range 2 1024
depends on SMP
default "32" if PPC64
default "4"
diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h
index eb61b9c..2a05cc0 100644
--- a/include/asm-powerpc/paca.h
+++ b/include/asm-powerpc/paca.h
@@ -16,10 +16,29 @@
#define _ASM_POWERPC_PACA_H
#ifdef __KERNEL__
+#include <linux/threads.h>
+
#include <asm/types.h>
#include <asm/lppaca.h>
#include <asm/mmu.h>
+/*
+ * iSeries needs the paca to be statically allocated and initialised.
+ * We will allocated this many, based on NR_CPUS.
+ */
+#if NR_CPUS > 32
+#define NR_STATIC_PACAS 64
+#elif NR_CPUS > 8
+#define NR_STATIC_PACAS 32
+#elif NR_CPUS > 4
+#define NR_STATIC_PACAS 8
+#elif NR_CPUS > 1
+#define NR_STATIC_PACAS 4
+#else
+#define NR_STATIC_PACAS 1
+#endif
+
+
register struct paca_struct *local_paca asm("r13");
#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
@@ -108,6 +127,7 @@ struct paca_struct {
};
extern struct paca_struct paca[];
+extern void initialise_pacas(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_PACA_H */
--
1.5.5.1
^ permalink raw reply related
* Re: [PATCH 2/2] Make iSeries spin on __secondary_hold_spinloop, like pSeries.
From: Tony Breeds @ 2008-04-23 3:47 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev; +Cc: Stephen Rothwell
In-Reply-To: <ace554946afc94d0b62634b3c5dedeaa5a49f0da.1208921988.git.tony@bakeyournoodle.com>
On Wed, Apr 23, 2008 at 01:44:16PM +1000, Tony Breeds wrote:
> Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
> Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
> ---
> Changes since v1:
> - Updated commit message.
Oops some how I got git to merge patches 2 and 3. Please ignore this
and I'll fix it up here and resend.
Sorry for the noise.
Yours Tony
linux.conf.au http://www.marchsouth.org/
Jan 19 - 24 2009 The Australian Linux Technical Conference!
^ permalink raw reply
* [PATCH 1/2 v2] Raise the upper limit of NR_CPUS.
From: Tony Breeds @ 2008-04-23 3:44 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev
As the pacas are statically initialised increasing NR_CPUS beyond 128,
means that any additional pacas will be empty ... which is bad.
This patch adds the required functionality to fill in any excess pacas
at runtime.
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
---
Changes since v1:
- Addressed thinko pointed out by sfr.
- Addeed nicely worded comment about paca->kernel_toc from Segher
Paul, please consider befoer -rc1
arch/powerpc/kernel/paca.c | 61 +++++++++++++++++++++-----------
arch/powerpc/kernel/setup_64.c | 3 ++
arch/powerpc/platforms/Kconfig.cputype | 4 +-
include/asm-powerpc/paca.h | 20 ++++++++++
4 files changed, 65 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index ac163bd..4c7db2e 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -18,6 +18,15 @@
#include <asm/paca.h>
#include <asm/mmu.h>
+/*
+ * In order to handle "strange" values of NR_CPUS, Make sure we use
+ * max(NR_CPUS, NR_STATIC_PACAS) for array sizes below
+ */
+#if NR_CPUS > NR_STATIC_PACAS
+#define MAX_CPUS NR_CPUS
+#else
+#define MAX_CPUS NR_STATIC_PACAS
+#endif
/* This symbol is provided by the linker - let it fill in the paca
* field correctly */
@@ -33,7 +42,7 @@ extern unsigned long __toc_start;
* will suffice to ensure that it doesn't cross a page boundary.
*/
struct lppaca lppaca[] = {
- [0 ... (NR_CPUS-1)] = {
+ [0 ... (MAX_CPUS-1)] = {
.desc = 0xd397d781, /* "LpPa" */
.size = sizeof(struct lppaca),
.dyn_proc_status = 2,
@@ -50,7 +59,7 @@ struct lppaca lppaca[] = {
* initially, hence will all be invaild until we actually write them.
*/
struct slb_shadow slb_shadow[] __cacheline_aligned = {
- [0 ... (NR_CPUS-1)] = {
+ [0 ... (MAX_CPUS-1)] = {
.persistent = SLB_NUM_BOLTED,
.buffer_length = sizeof(struct slb_shadow),
},
@@ -76,7 +85,7 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = {
.__current = &init_task, \
}
-struct paca_struct paca[] = {
+struct paca_struct paca[MAX_CPUS] = {
PACA_INIT(0),
#if NR_CPUS > 1
PACA_INIT( 1), PACA_INIT( 2), PACA_INIT( 3),
@@ -98,27 +107,37 @@ struct paca_struct paca[] = {
PACA_INIT( 52), PACA_INIT( 53), PACA_INIT( 54), PACA_INIT( 55),
PACA_INIT( 56), PACA_INIT( 57), PACA_INIT( 58), PACA_INIT( 59),
PACA_INIT( 60), PACA_INIT( 61), PACA_INIT( 62), PACA_INIT( 63),
-#if NR_CPUS > 64
- PACA_INIT( 64), PACA_INIT( 65), PACA_INIT( 66), PACA_INIT( 67),
- PACA_INIT( 68), PACA_INIT( 69), PACA_INIT( 70), PACA_INIT( 71),
- PACA_INIT( 72), PACA_INIT( 73), PACA_INIT( 74), PACA_INIT( 75),
- PACA_INIT( 76), PACA_INIT( 77), PACA_INIT( 78), PACA_INIT( 79),
- PACA_INIT( 80), PACA_INIT( 81), PACA_INIT( 82), PACA_INIT( 83),
- PACA_INIT( 84), PACA_INIT( 85), PACA_INIT( 86), PACA_INIT( 87),
- PACA_INIT( 88), PACA_INIT( 89), PACA_INIT( 90), PACA_INIT( 91),
- PACA_INIT( 92), PACA_INIT( 93), PACA_INIT( 94), PACA_INIT( 95),
- PACA_INIT( 96), PACA_INIT( 97), PACA_INIT( 98), PACA_INIT( 99),
- PACA_INIT(100), PACA_INIT(101), PACA_INIT(102), PACA_INIT(103),
- PACA_INIT(104), PACA_INIT(105), PACA_INIT(106), PACA_INIT(107),
- PACA_INIT(108), PACA_INIT(109), PACA_INIT(110), PACA_INIT(111),
- PACA_INIT(112), PACA_INIT(113), PACA_INIT(114), PACA_INIT(115),
- PACA_INIT(116), PACA_INIT(117), PACA_INIT(118), PACA_INIT(119),
- PACA_INIT(120), PACA_INIT(121), PACA_INIT(122), PACA_INIT(123),
- PACA_INIT(124), PACA_INIT(125), PACA_INIT(126), PACA_INIT(127),
-#endif
#endif
#endif
#endif
#endif
};
EXPORT_SYMBOL(paca);
+
+/*
+ * The first few (NR_STATIC_PACAS) paca entires are initiialised
+ * statically. populate the rest.
+ */
+void __init initialise_pacas(void)
+{
+ int cpu;
+
+ /* The TOC register (GPR2) points 32kB into the TOC, so that 64kB
+ * of the TOC can be addressed using a single machine instruction.
+ */
+ unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
+
+ /* Can't use for_each_*_cpu, as they aren't functional yet */
+ for (cpu = NR_STATIC_PACAS; cpu < NR_CPUS; cpu++) {
+ struct paca_struct *new_paca = &paca[cpu];
+
+ new_paca->lppaca_ptr = &lppaca[cpu];
+ new_paca->lock_token = 0x8000;
+ new_paca->paca_index = cpu;
+ new_paca->kernel_toc = kernel_toc;
+ new_paca->hw_cpu_id = 0xffff;
+ new_paca->slb_shadow_ptr = &slb_shadow[cpu];
+ new_paca->__current = &init_task;
+
+ }
+}
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 31ada9f..5e382ac 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -170,6 +170,9 @@ void __init setup_paca(int cpu)
void __init early_setup(unsigned long dt_ptr)
{
+ /* Fill in any unititialised pacas */
+ initialise_pacas();
+
/* Identify CPU type */
identify_cpu(0, mfspr(SPRN_PVR));
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 5fc7fac..f7efaa9 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -220,8 +220,8 @@ config SMP
If you don't know what to do here, say N.
config NR_CPUS
- int "Maximum number of CPUs (2-128)"
- range 2 128
+ int "Maximum number of CPUs (2-1024)"
+ range 2 1024
depends on SMP
default "32" if PPC64
default "4"
diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h
index eb61b9c..2a05cc0 100644
--- a/include/asm-powerpc/paca.h
+++ b/include/asm-powerpc/paca.h
@@ -16,10 +16,29 @@
#define _ASM_POWERPC_PACA_H
#ifdef __KERNEL__
+#include <linux/threads.h>
+
#include <asm/types.h>
#include <asm/lppaca.h>
#include <asm/mmu.h>
+/*
+ * iSeries needs the paca to be statically allocated and initialised.
+ * We will allocated this many, based on NR_CPUS.
+ */
+#if NR_CPUS > 32
+#define NR_STATIC_PACAS 64
+#elif NR_CPUS > 8
+#define NR_STATIC_PACAS 32
+#elif NR_CPUS > 4
+#define NR_STATIC_PACAS 8
+#elif NR_CPUS > 1
+#define NR_STATIC_PACAS 4
+#else
+#define NR_STATIC_PACAS 1
+#endif
+
+
register struct paca_struct *local_paca asm("r13");
#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
@@ -108,6 +127,7 @@ struct paca_struct {
};
extern struct paca_struct paca[];
+extern void initialise_pacas(void);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_PACA_H */
--
1.5.5.1
^ permalink raw reply related
* [PATCH 2/2] Make iSeries spin on __secondary_hold_spinloop, like pSeries.
From: Tony Breeds @ 2008-04-23 3:44 UTC (permalink / raw)
To: Paul Mackerras, linuxppc-dev; +Cc: Stephen Rothwell
In-Reply-To: <d54206d25b690c9160401f65a583f586004dcd5d.1208921988.git.tony@bakeyournoodle.com>
Currently all iSeries secondary CPU's spin directly on the cpu_start in thier
paca. Make them spin on the global __secondary_hold_spinloop, until after the
pacas have been initialised.
As sfr points out this works because __secondary_hold_spinloop is being set
already, but iSeries isn't looking at it :)
Signed-off-by: Tony Breeds <tony@bakeyournoodle.com>
Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
---
Changes since v1:
- Updated commit message.
arch/powerpc/kernel/paca.c | 64 ++--------------------------
arch/powerpc/platforms/iseries/exception.S | 27 +++++++++++-
include/asm-powerpc/paca.h | 17 -------
3 files changed, 30 insertions(+), 78 deletions(-)
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index 4c7db2e..c9bf17e 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -7,26 +7,11 @@
* 2 of the License, or (at your option) any later version.
*/
-#include <linux/types.h>
#include <linux/threads.h>
#include <linux/module.h>
-#include <asm/processor.h>
-#include <asm/ptrace.h>
-#include <asm/page.h>
#include <asm/lppaca.h>
#include <asm/paca.h>
-#include <asm/mmu.h>
-
-/*
- * In order to handle "strange" values of NR_CPUS, Make sure we use
- * max(NR_CPUS, NR_STATIC_PACAS) for array sizes below
- */
-#if NR_CPUS > NR_STATIC_PACAS
-#define MAX_CPUS NR_CPUS
-#else
-#define MAX_CPUS NR_STATIC_PACAS
-#endif
/* This symbol is provided by the linker - let it fill in the paca
* field correctly */
@@ -42,7 +27,7 @@ extern unsigned long __toc_start;
* will suffice to ensure that it doesn't cross a page boundary.
*/
struct lppaca lppaca[] = {
- [0 ... (MAX_CPUS-1)] = {
+ [0 ... (NR_CPUS-1)] = {
.desc = 0xd397d781, /* "LpPa" */
.size = sizeof(struct lppaca),
.dyn_proc_status = 2,
@@ -59,7 +44,7 @@ struct lppaca lppaca[] = {
* initially, hence will all be invaild until we actually write them.
*/
struct slb_shadow slb_shadow[] __cacheline_aligned = {
- [0 ... (MAX_CPUS-1)] = {
+ [0 ... (NR_CPUS-1)] = {
.persistent = SLB_NUM_BOLTED,
.buffer_length = sizeof(struct slb_shadow),
},
@@ -74,50 +59,9 @@ struct slb_shadow slb_shadow[] __cacheline_aligned = {
* processors. The processor VPD array needs one entry per physical
* processor (not thread).
*/
-#define PACA_INIT(number) \
-{ \
- .lppaca_ptr = &lppaca[number], \
- .lock_token = 0x8000, \
- .paca_index = (number), /* Paca Index */ \
- .kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL, \
- .hw_cpu_id = 0xffff, \
- .slb_shadow_ptr = &slb_shadow[number], \
- .__current = &init_task, \
-}
-
-struct paca_struct paca[MAX_CPUS] = {
- PACA_INIT(0),
-#if NR_CPUS > 1
- PACA_INIT( 1), PACA_INIT( 2), PACA_INIT( 3),
-#if NR_CPUS > 4
- PACA_INIT( 4), PACA_INIT( 5), PACA_INIT( 6), PACA_INIT( 7),
-#if NR_CPUS > 8
- PACA_INIT( 8), PACA_INIT( 9), PACA_INIT( 10), PACA_INIT( 11),
- PACA_INIT( 12), PACA_INIT( 13), PACA_INIT( 14), PACA_INIT( 15),
- PACA_INIT( 16), PACA_INIT( 17), PACA_INIT( 18), PACA_INIT( 19),
- PACA_INIT( 20), PACA_INIT( 21), PACA_INIT( 22), PACA_INIT( 23),
- PACA_INIT( 24), PACA_INIT( 25), PACA_INIT( 26), PACA_INIT( 27),
- PACA_INIT( 28), PACA_INIT( 29), PACA_INIT( 30), PACA_INIT( 31),
-#if NR_CPUS > 32
- PACA_INIT( 32), PACA_INIT( 33), PACA_INIT( 34), PACA_INIT( 35),
- PACA_INIT( 36), PACA_INIT( 37), PACA_INIT( 38), PACA_INIT( 39),
- PACA_INIT( 40), PACA_INIT( 41), PACA_INIT( 42), PACA_INIT( 43),
- PACA_INIT( 44), PACA_INIT( 45), PACA_INIT( 46), PACA_INIT( 47),
- PACA_INIT( 48), PACA_INIT( 49), PACA_INIT( 50), PACA_INIT( 51),
- PACA_INIT( 52), PACA_INIT( 53), PACA_INIT( 54), PACA_INIT( 55),
- PACA_INIT( 56), PACA_INIT( 57), PACA_INIT( 58), PACA_INIT( 59),
- PACA_INIT( 60), PACA_INIT( 61), PACA_INIT( 62), PACA_INIT( 63),
-#endif
-#endif
-#endif
-#endif
-};
+struct paca_struct paca[NR_CPUS];
EXPORT_SYMBOL(paca);
-/*
- * The first few (NR_STATIC_PACAS) paca entires are initiialised
- * statically. populate the rest.
- */
void __init initialise_pacas(void)
{
int cpu;
@@ -128,7 +72,7 @@ void __init initialise_pacas(void)
unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
/* Can't use for_each_*_cpu, as they aren't functional yet */
- for (cpu = NR_STATIC_PACAS; cpu < NR_CPUS; cpu++) {
+ for (cpu = 0; cpu < NR_CPUS; cpu++) {
struct paca_struct *new_paca = &paca[cpu];
new_paca->lppaca_ptr = &lppaca[cpu];
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index c775cd4..8ff330d 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -59,8 +59,33 @@ system_reset_iSeries:
andc r4,r4,r5
mtspr SPRN_CTRLT,r4
+/* Spin on __secondary_hold_spinloop until it is updated by the boot cpu. */
+/* In the UP case we'll yeild() later, and we will not access the paca anyway */
+#ifdef CONFIG_SMP
1:
HMT_LOW
+ LOAD_REG_IMMEDIATE(r23, __secondary_hold_spinloop)
+ ld r23,0(r23)
+ sync
+ LOAD_REG_IMMEDIATE(r3,current_set)
+ sldi r28,r24,3 /* get current_set[cpu#] */
+ ldx r3,r3,r28
+ addi r1,r3,THREAD_SIZE
+ subi r1,r1,STACK_FRAME_OVERHEAD
+
+ cmpwi 0,r23,0 /* Keep poking the Hypervisor until */
+ bne 2f /* we're released */
+ /* Let the Hypervisor know we are alive */
+ /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
+ lis r3,0x8002
+ rldicr r3,r3,32,15 /* r0 = (r3 << 32) & 0xffff000000000000 */
+ li r0,-1 /* r0=-1 indicates a Hypervisor call */
+ sc /* Invoke the hypervisor via a system call */
+ b 1b
+#endif
+
+2:
+ HMT_LOW
#ifdef CONFIG_SMP
lbz r23,PACAPROCSTART(r13) /* Test if this processor
* should start */
@@ -91,7 +116,7 @@ iSeries_secondary_smp_loop:
li r0,-1 /* r0=-1 indicates a Hypervisor call */
sc /* Invoke the hypervisor via a system call */
mfspr r13,SPRN_SPRG3 /* Put r13 back ???? */
- b 1b /* If SMP not configured, secondaries
+ b 2b /* If SMP not configured, secondaries
* loop forever */
/*** ISeries-LPAR interrupt handlers ***/
diff --git a/include/asm-powerpc/paca.h b/include/asm-powerpc/paca.h
index 2a05cc0..0bfc180 100644
--- a/include/asm-powerpc/paca.h
+++ b/include/asm-powerpc/paca.h
@@ -22,23 +22,6 @@
#include <asm/lppaca.h>
#include <asm/mmu.h>
-/*
- * iSeries needs the paca to be statically allocated and initialised.
- * We will allocated this many, based on NR_CPUS.
- */
-#if NR_CPUS > 32
-#define NR_STATIC_PACAS 64
-#elif NR_CPUS > 8
-#define NR_STATIC_PACAS 32
-#elif NR_CPUS > 4
-#define NR_STATIC_PACAS 8
-#elif NR_CPUS > 1
-#define NR_STATIC_PACAS 4
-#else
-#define NR_STATIC_PACAS 1
-#endif
-
-
register struct paca_struct *local_paca asm("r13");
#if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
--
1.5.5.1
^ permalink raw reply related
* AMCC PPC440EPx/sequoia stability question...
From: Dave Littell @ 2008-04-23 3:33 UTC (permalink / raw)
To: linuxppc-embedded, u-boot-users
Hi all,
I'm working on an AMCC PPC440EPx-based platform that's similar to the
Sequoia. The board runs pretty well, but occasionally takes exceptions
both in U-Boot and while running Linux. The exceptions vary from
Illegal Instructions to FP Unavailable to FP Unimplemented to ITLB and
DTLB Errors, to DSI, etc., which made us believe there's a problem with
SDRAM. Sometimes there are simple hard lockups from which even the JTAG
can't regain control. However, the SDRAM physical/electrical and DDR
Controller configurations have been investigated in detail (and some
corrections made) with no resulting improvement in the exception behavior.
We see problems primarily at 667 MHz but have noted some issues at 533
MHz as well. Some boards seem particularly susceptible to this while
others rarely (if ever) exhibit the problem.
At this point all possibilities are on the table and I'm looking for any
input from anyone with experience (good, bad, or whatever) with this
processor and/or designs similar to the Sequoia.
Thanks very much,
Dave
^ permalink raw reply
* Re: [RFC POWERPC] booting-without-of: bindings for FHCI USB, GPIO LEDs, MCU, and NAND on UPM
From: Grant Likely @ 2008-04-23 3:22 UTC (permalink / raw)
To: cbouatmailru; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <20080423003730.GA7589@zarina>
On Tue, Apr 22, 2008 at 6:37 PM, Anton Vorontsov <cbouatmailru@gmail.com> wrote:
> On Tue, Apr 22, 2008 at 02:08:45PM -0600, Grant Likely wrote:
>
> > On Tue, Apr 22, 2008 at 1:41 PM, Anton Vorontsov
> > <avorontsov@ru.mvista.com> wrote:
> > > Hi all,
> > >
> > > Here is purposed bindings draft for the new drivers that I would like to
> > > send for this or next merge window, depending on results of this RFC. ;-)
> > > (The new bindings needs to be in-tree or at least Acked before I could
> > > send the drivers.)
> > >
> > > Comments and suggestions are highly appreciated.
> >
> > Thanks for cc'ing me. Mostly looks good, comments below.
>
> Thanks for the comments!
np.
> > > + Example:
> > > +
> > > + usb-pram@8b00 {
> > > + compatible = "fsl,mpc8360-qe-muram-usb-pram",
> > > + "fsl,qe-muram-usb-pram",
> > > + "fsl,cpm-muram-usb-pram";
> > > + reg = <0x8b00 0x100>;
> > > + };
> > > +
> > > + t) Freescale QUICC Engine USB Controller
> > > +
> > > + Required properties:
> > > + - compatible : should be "fsl,<chip>-qe-usb", "fsl,qe-usb",
> > > + "fsl,usb-fhci"
> >
> > Again, I'd leave out "fsl,qe-usb" and "fsl,usb-fhci".
>
> Given that mpc8323 is the first (IIRC) chip that supports QE USB,
> do I understand correctly that you're purposing something like this
> (e.g. for mpc8360):
>
> usb@6c0 {
> compatible = "fsl,mpc8360-qe-usb", "fsl,mpc8323-qe-usb";
>
> Or... do I have to write somthing like this in the driver itself:
>
> static const struct of_device_id of_fhci_match[] = {
> { .compatible = "fsl,mpc8323-qe-usb", },
> { .compatible = "fsl,mpc8360-qe-usb", },
> { ...new chips... }
> {},
> };
>
> And specify only "fsl,mpc8360-qe-usb" (for mpc8360 case again)?
>
> I have no objections to either of this, just want some clarity.
*Both* are perfectly valid options. Personally, I'd choose the first
option as it keeps the size of the driver match table small. However,
the option is always there to add entries to the match table if
somebody ships a board with wonky firmware that has a
never-before-seen value in compatible (so the system is
fault-tolerant).
> > > + - reg : should contain gtm registers location and length.
> > > + - interrupts : should contain USB interrupt.
> > > + - interrupt-parent : interrupt source phandle.
> > > + - fsl,fullspeed-clock : specifies the full speed USB clock source.
> > > + - fsl,lowspeed-clock : specifies the low speed USB clock source.
> >
> > What is the format of the clock properties?
>
> I'll make it clear in the next revision (the format is "clk<NUM>" or
> "brg<NUM>").
Does the clock come from another device that is represented in the
tree? If so, should it have a phandle to that node?
> > > + v) Freescale MCU with MPC8349E-mITX compatible firmware
> > > +
> > > + Required properties:
> > > + - compatible : "fsl,<mcu-chip>-<board>", "fsl,mcu-mpc8349emitx",
> > > + "simple-bus";
> >
> > I don't think "simple-bus" is appropriate here. This device doesn't
> > have any sub nodes so is not a bus. (I'm talking about the binding
> > here; and I understand that simple-bus is convenient for causing
> > subnodes to be picked up into of_platform and that you'll be putting
> > the LED nodes as children of this one. It just shouldn't be part of
> > this binding documentation.)
>
> Ok, I'll remove simple-bus from the bindings.
>
>
> > Also, since this node describes a device+firmware instead of just a
> > device, then "fsl,mcu-mpc8349emitx" should uniquely identify the
> > device from all other possibilities. It appears to be a very board
> > specific thing.
>
> Yes, it is board specific. For example, for MPC8377E-RDB boards I'll
> write this:
>
> compatible = "fsl,mc9s08qg8-mpc8377erdb", "fsl,mcu-mpc8349emitx",
> "simple-bus";
>
> I.e. "very-specific", "device-that-compatible", "simple-bus".
>
> Is that ok?
Ah; okay. I think I understand what you're doing now. Yes, this is fine.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [RFC POWERPC] booting-without-of: bindings for FHCI USB, GPIO LEDs, MCU, and NAND on UPM
From: Anton Vorontsov @ 2008-04-23 0:37 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev
In-Reply-To: <1208897422.6654.61.camel@vader.jdub.homelinux.org>
On Tue, Apr 22, 2008 at 03:50:22PM -0500, Josh Boyer wrote:
> On Tue, 2008-04-22 at 14:08 -0600, Grant Likely wrote:
> > On Tue, Apr 22, 2008 at 1:41 PM, Anton Vorontsov
> > <avorontsov@ru.mvista.com> wrote:
> > > Hi all,
> > > + w) NAND on UPM-driven Freescale Localbus
> > > +
> > > + Required properties:
> > > + - compatible : "fsl,upm-nand".
> > > + - reg : should specify localbus chip select and size used for the chip.
> > > + - width : should specify port size in bytes.
> > > + - fsl,upm-addr-offset : UPM pattern offset for the address latch.
> > > + - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
> > > + - fsl,wait-pattern : should be present if NAND chip requires waiting
> > > + for Ready-Not-Busy pin after each executed pattern.
> > > + - fsl,wait-write : should be present if NAND chip needs waiting on
> > > + Ready-Not-Busy pin after each write cycle.
> > > + - linux,chip-delay : optional, may contain delay value in milliseconds
> > > + (in case when Ready-Not-Busy pin was unspecified).
> > > + - gpios : may specify optional GPIO connected to the Ready-Not-Busy pin.
> >
> > I'm not competent to comment on this binding; I haven't spent any time
> > looking at NAND binding conventions.
>
> That's because there are none, and every time someone proposes one it's
> like this. Full of weird $board specific stuff that have nothing to do
> with the actual NAND chip.
>
> For example, why is fsl,wait-write defined as an fsl specific property?
> It seems generic to the NAND chip itself. Also, why in the example is
> the specific NAND chip part number listed, followed by fsl,upm-nand?
> It's almost as if people want to mix the NAND chip and NAND controller
> definitions together. Maybe there is a good reason for it, but it's
> really confusing.
Much thanks for the idea, I should indeed separate UPM NAND controller
and NAND chip itself.
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [RFC POWERPC] booting-without-of: bindings for FHCI USB, GPIO LEDs, MCU, and NAND on UPM
From: Anton Vorontsov @ 2008-04-23 0:37 UTC (permalink / raw)
To: Grant Likely; +Cc: Scott Wood, linuxppc-dev
In-Reply-To: <fa686aa40804221308w5960ces1f03a6a8c049edd4@mail.gmail.com>
On Tue, Apr 22, 2008 at 02:08:45PM -0600, Grant Likely wrote:
> On Tue, Apr 22, 2008 at 1:41 PM, Anton Vorontsov
> <avorontsov@ru.mvista.com> wrote:
> > Hi all,
> >
> > Here is purposed bindings draft for the new drivers that I would like to
> > send for this or next merge window, depending on results of this RFC. ;-)
> > (The new bindings needs to be in-tree or at least Acked before I could
> > send the drivers.)
> >
> > Comments and suggestions are highly appreciated.
>
> Thanks for cc'ing me. Mostly looks good, comments below.
Thanks for the comments!
> Cheers,
> g.
>
> > diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
> > index c350623..38fe3e9 100644
> > --- a/Documentation/powerpc/booting-without-of.txt
> > +++ b/Documentation/powerpc/booting-without-of.txt
> > @@ -59,6 +59,11 @@ Table of Contents
> > p) Freescale Synchronous Serial Interface
> > q) USB EHCI controllers
> > r) Freescale General-purpose Timers Module
> > + s) Freescale USB Parameter RAM:
> > + t) Freescale QUICC Engine USB Controller
> > + u) LEDs on GPIOs
> > + v) Freescale MCU with MPC8349E-mITX compatible firmware
> > + w) NAND on UPM-driven Freescale Localbus
> >
> > VII - Marvell Discovery mv64[345]6x System Controller chips
> > 1) The /system-controller node
> > @@ -2866,6 +2871,139 @@ platforms are moved over to use the flattened-device-tree model.
> > clock-frequency = <0>;
> > };
> >
> > + s) Freescale USB Parameter RAM:
> > +
> > + Required properties:
> > + - compatible : should be "fsl,<chip>-qe-muram-usb-pram",
> > + "fsl,qe-muram-usb-pram", "fsl,cpm-muram-usb-pram".
> > + - reg : should contain USB PRAM location and length.
> > +
>
> Personally, I'd leave out "fsl,qe-muram-usb-pram" and
> "fsl,cpm-muram-usb-pram", but otherwise looks good to me.
Per Scott comment I'll try to fold pram address into usb node,
so this node isn't relevant anymore.
> > + Example:
> > +
> > + usb-pram@8b00 {
> > + compatible = "fsl,mpc8360-qe-muram-usb-pram",
> > + "fsl,qe-muram-usb-pram",
> > + "fsl,cpm-muram-usb-pram";
> > + reg = <0x8b00 0x100>;
> > + };
> > +
> > + t) Freescale QUICC Engine USB Controller
> > +
> > + Required properties:
> > + - compatible : should be "fsl,<chip>-qe-usb", "fsl,qe-usb",
> > + "fsl,usb-fhci"
>
> Again, I'd leave out "fsl,qe-usb" and "fsl,usb-fhci".
Given that mpc8323 is the first (IIRC) chip that supports QE USB,
do I understand correctly that you're purposing something like this
(e.g. for mpc8360):
usb@6c0 {
compatible = "fsl,mpc8360-qe-usb", "fsl,mpc8323-qe-usb";
Or... do I have to write somthing like this in the driver itself:
static const struct of_device_id of_fhci_match[] = {
{ .compatible = "fsl,mpc8323-qe-usb", },
{ .compatible = "fsl,mpc8360-qe-usb", },
{ ...new chips... }
{},
};
And specify only "fsl,mpc8360-qe-usb" (for mpc8360 case again)?
I have no objections to either of this, just want some clarity.
> > + - reg : should contain gtm registers location and length.
> > + - interrupts : should contain USB interrupt.
> > + - interrupt-parent : interrupt source phandle.
> > + - fsl,fullspeed-clock : specifies the full speed USB clock source.
> > + - fsl,lowspeed-clock : specifies the low speed USB clock source.
>
> What is the format of the clock properties?
I'll make it clear in the next revision (the format is "clk<NUM>" or
"brg<NUM>").
> > + - fsl,usb-mode : should be "host".
>
> What other options are there? Is this something that would be better
> encoded into "compatible" for driver binding? (I've seen both
> approaches; I don't have a firm opinion on which is best)
Well, no. QE USB is the same device, but it can be used as either host
or gadget (peripheral). Peripheral mode isn't yet supported, so binding
lists only host mode.
> > + - linux,hub-power-budget : optional, USB power budget for the root hub
> > + in mA.
> > + - gpios : should specify GPIOs in this order: USBOE, USBTP, USBTN, USBRP,
> > + USBRN, SPEED (optional), and SUSPEND (optional).
> > +
> > + Example:
> > +
> > + usb@6c0 {
> > + compatible = "fsl,mpc8360-qe-usb", "fsl,qe-usb",
> > + "fsl,usb-fhci";
> > + reg = <0x6c0 0x40>;
> > + interrupts = <11>;
> > + interrupt-parent = <&qeic>;
> > + fsl,fullspeed-clock = "clk21";
> > + fsl,usb-mode = "host";
> > + gpios = <&qe_pio_b 2 0 /* USBOE */
> > + &qe_pio_b 3 0 /* USBTP */
> > + &qe_pio_b 8 0 /* USBTN */
> > + &qe_pio_b 9 0 /* USBRP */
> > + &qe_pio_b 11 0 /* USBRN */
> > + &qe_pio_e 20 0 /* SPEED */
> > + &qe_pio_e 21 0 /* SUSPN */>;
> > + };
> > +
> > + u) LEDs on GPIOs
> > +
> > + Required properties:
> > + - compatible : should be "linux,gpio-led".
> > + - linux,name : LED name.
> > + - linux,active-low : property should be present if LED wired as
> > + active-low.
> > + - linux,default-trigger : Linux default trigger for this LED.
> > + - linux,brightness : default brightness.
> > + - gpios : should specify LED GPIO.
>
> Looks good to me.
>
> > +
> > + Example:
> > +
> > + led@0 {
> > + compatible = "linux,gpio-led";
> > + linux,name = "pwr";
> > + linux,brightness = <1>;
> > + linux,active-low;
> > + gpios = <&mcu_pio 0>;
> > + };
> > +
> > + led@1 {
> > + compatible = "linux,gpio-led";
> > + linux,name = "hdd";
> > + linux,default-trigger = "ide-disk";
> > + linux,active-low;
> > + gpios = <&mcu_pio 1>;
> > + };
> > +
> > + v) Freescale MCU with MPC8349E-mITX compatible firmware
> > +
> > + Required properties:
> > + - compatible : "fsl,<mcu-chip>-<board>", "fsl,mcu-mpc8349emitx",
> > + "simple-bus";
>
> I don't think "simple-bus" is appropriate here. This device doesn't
> have any sub nodes so is not a bus. (I'm talking about the binding
> here; and I understand that simple-bus is convenient for causing
> subnodes to be picked up into of_platform and that you'll be putting
> the LED nodes as children of this one. It just shouldn't be part of
> this binding documentation.)
Ok, I'll remove simple-bus from the bindings.
> Also, since this node describes a device+firmware instead of just a
> device, then "fsl,mcu-mpc8349emitx" should uniquely identify the
> device from all other possibilities. It appears to be a very board
> specific thing.
Yes, it is board specific. For example, for MPC8377E-RDB boards I'll
write this:
compatible = "fsl,mc9s08qg8-mpc8377erdb", "fsl,mcu-mpc8349emitx",
"simple-bus";
I.e. "very-specific", "device-that-compatible", "simple-bus".
Is that ok?
> > + "simple-bus";
>
> > + - reg : should specify I2C address (0x0a).
> > + - #address-cells : should be 0.
> > + - #size-cells : should be 0.
> > + - #gpio-cells : should be 1.
> > + - gpio-controller : should be present;
> > +
> > + Example:
> > +
> > + mcu_pio: mcu@0a {
> > + #address-cells = <0>;
> > + #size-cells = <0>;
> > + #gpio-cells = <1>;
> > + compatible = "fsl,mc9s08qg8-mpc8349emitx",
> > + "fsl,mcu-mpc8349emitx",
> > + "simple-bus";
> > + reg = <0x0a>;
> > + gpio-controller;
> > + };
> > +
> > + w) NAND on UPM-driven Freescale Localbus
> > +
> > + Required properties:
> > + - compatible : "fsl,upm-nand".
> > + - reg : should specify localbus chip select and size used for the chip.
> > + - width : should specify port size in bytes.
> > + - fsl,upm-addr-offset : UPM pattern offset for the address latch.
> > + - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
> > + - fsl,wait-pattern : should be present if NAND chip requires waiting
> > + for Ready-Not-Busy pin after each executed pattern.
> > + - fsl,wait-write : should be present if NAND chip needs waiting on
> > + Ready-Not-Busy pin after each write cycle.
> > + - linux,chip-delay : optional, may contain delay value in milliseconds
> > + (in case when Ready-Not-Busy pin was unspecified).
> > + - gpios : may specify optional GPIO connected to the Ready-Not-Busy pin.
>
> I'm not competent to comment on this binding; I haven't spent any time
> looking at NAND binding conventions.
Thanks for bringing it up though, Josh Boyer evolved it into neat idea. :-)
> > +
> > + Example:
> > +
> > + flash@1,0 {
> > + compatible = "stmicro,NAND512W3A2BN6E", "fsl,upm-nand";
> > + reg = <1 0 1>;
> > + width = <1>;
> > + fsl,upm-addr-offset = <16>;
> > + fsl,upm-cmd-offset = <8>;
> > + fsl,wait-pattern;
> > + fsl,wait-write;
> > + gpios = <&qe_pio_e 18 0>;
> > + };
> > +
> > VII - Marvell Discovery mv64[345]6x System Controller chips
> > ===========================================================
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: Xilinx PowerPC
From: Yoshio Kashiwagi @ 2008-04-23 0:04 UTC (permalink / raw)
To: David H. Lynch Jr., Grant Likely; +Cc: linuxppc-embedded
In-Reply-To: <480BD66B.90001@dlasys.net>
Hi,
I am writing the Non-Xilinx XPS_LL_TEMAC driver.
Checksum offloading is incomplete although NAPI and KGDBOE are supported.
Basic operation is working on EDK9.2 and EDK10.1.
Furthermore, although the simple Non-Interrupt version for u-boot is
also written, it is not known where I should post.
Best Regards,
Yoshio Kashiwagi - Nissin Systems
/*
*
* Xilinx Gigabit System Referece Design Ethenet driver
*
* Driver for Xilinx Virtex-4FX Based Platform
*
* Author: Yoshio Kashiwagi
*
* Copyright (c) 2008 Nissin Systems Co.,Ltd.
*
* March 2008 created
*
* This program is free software; you can redistribute it and/or modify
it
* under the terms of the GNU General Public License as published by
the
* Free Software Foundation; either version 2 of the License, or (at
your
* option) any later version.
*
*/
#include <linux/autoconf.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/init.h>
#include <linux/in.h>
#include <linux/moduleparam.h>
#include <linux/spinlock.h>
#include <linux/pci.h>
#include <asm/io.h>
#include <asm/delay.h>
#include <platforms/4xx/xparameters/xparameters.h>
#include <linux/inet.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/ethtool.h>
#include <net/sock.h>
#include <net/checksum.h>
#include <linux/if_ether.h>
#include <linux/if_arp.h>
#include <linux/ip.h>
#include <linux/tcp.h>
#include <linux/udp.h>
#include <linux/percpu.h>
#define S_DMA_CTRL_BASEADDR XPAR_LLTEMAC_0_LLINK_CONNECTED_BASEADDR
#define XPS_LLTEMAC_BASEADDR XPAR_LLTEMAC_0_BASEADDR
/* XPS_LL_TEMAC SDMA registers definition */
#define TX_NXTDESC_PTR 0x00
#define TX_CURBUF_ADDR 0x04
#define TX_CURBUF_LENGTH 0x08
#define TX_CURDESC_PTR 0x0c
#define TX_TAILDESC_PTR 0x10
#define TX_CHNL_CTRL 0x14
#define TX_IRQ_REG 0x18
#define TX_CHNL_STS 0x1c
#define RX_NXTDESC_PTR 0x20
#define RX_CURBUF_ADDR 0x24
#define RX_CURBUF_LENGTH 0x28
#define RX_CURDESC_PTR 0x2c
#define RX_TAILDESC_PTR 0x30
#define RX_CHNL_CTRL 0x34
#define RX_IRQ_REG 0x38
#define RX_CHNL_STS 0x3c
#define DMA_CONTROL_REG 0x40
/* XPS_LL_TEMAC direct registers definition */
#define TEMAC_RAF0 0x00
#define TEMAC_TPF0 0x04
#define TEMAC_IFGP0 0x08
#define TEMAC_IS0 0x0c
#define TEMAC_IP0 0x10
#define TEMAC_IE0 0x14
#define TEMAC_MSW0 0x20
#define TEMAC_LSW0 0x24
#define TEMAC_CTL0 0x28
#define TEMAC_RDY0 0x2c
#define XTE_RSE_MIIM_RR_MASK 0x0002
#define XTE_RSE_MIIM_WR_MASK 0x0004
#define XTE_RSE_CFG_RR_MASK 0x0020
#define XTE_RSE_CFG_WR_MASK 0x0040
/* XPS_LL_TEMAC indirect registers offset definition */
#define RCW0 0x200
#define RCW1 0x240
#define TC 0x280
#define FCC 0x2c0
#define EMMC 0x300
#define PHYC 0x320
#define MC 0x340
#define UAW0 0x380
#define UAW1 0x384
#define MAW0 0x388
#define MAW1 0x38c
#define AFM 0x390
#define TIS 0x3a0
#define TIE 0x3a4
#define MIIMWD 0x3b0
#define MIIMAI 0x3b4
#define CNTLREG_WRITE_ENABLE_MASK 0x8000
#define CNTLREG_EMAC1SEL_MASK 0x0400
#define CNTLREG_ADDRESSCODE_MASK 0x03ff
#define MDIO_ENABLE_MASK 0x40
#define MDIO_CLOCK_DIV_MASK 0x3F
#define MDIO_CLOCK_DIV_100MHz 0x28
#define ETHER_MTU 1500
#define EMAC_PHY_ID 7
/* CDMAC descriptor status bit definitions */
#define BDSTAT_ERROR_MASK 0x80000000
#define BDSTAT_INT_ON_END_MASK 0x40000000
#define BDSTAT_STOP_ON_END_MASK 0x20000000
#define BDSTAT_COMPLETED_MASK 0x10000000
#define BDSTAT_SOP_MASK 0x08000000
#define BDSTAT_EOP_MASK 0x04000000
#define BDSTAT_CHANBUSY_MASK 0x02000000
#define BDSTAT_CHANRESET_MASK 0x01000000
#define TEMAC_MAC_ADDR_SIZE 6
#define TEMAC_MTU 1500
#define TEMAC_JUMBO_MTU 9000
#define TEMAC_HDR_SIZE 14
#define TEMAC_HDR_VLAN_SIZE 18
#define TEMAC_TRL_SIZE 4
#define TEMAC_MAX_FRAME_SIZE (TEMAC_MTU + TEMAC_HDR_SIZE + TEMAC_
TRL_SIZE)
#define TEMAC_MAX_VLAN_FRAME_SIZE (TEMAC_MTU + TEMAC_HDR_VLAN_SIZE +
TEMAC_TRL_SIZE)
#define TEMAC_MAX_JUMBO_FRAME_SIZE (TEMAC_JUMBO_MTU + TEMAC_HDR_SIZE +
TEMAC_TRL_SIZE)
#define TX_CONTROL_CALC_CSUM_MASK 1
#define SDMA_MASTER_IRQ (1 << 7)
#define SDMA_COA_IRQ (1)
#define SDMA_DLY_IRQ (1 << 1)
#define SDMA_ERR_IRQ (1 << 2)
#define ALIGNMENT 32
#define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
#define MULTICAST_CAM_TABLE_NUM 4
#define TX_BD_NUM 64
#define RX_BD_NUM 128
#define XEM_MAX_FRAME_SIZE TEMAC_MAX_JUMBO_FRAME_SIZE
#define XILINX_GSRD3_NAPI
#define sdma_reg_write(dev, offset, value) (*(unsigned int *)(dev->
sdma_reg_base + offset) = value)
#define sdma_reg_read(dev, offset) (*(volatile unsigned int *)(dev->
sdma_reg_base + offset))
#define temac_reg_write(dev, offset, value) (*(unsigned int *)(dev->
temac_reg_base + offset) = value)
#define temac_reg_read(dev, offset) (*(volatile unsigned int *)(dev->
temac_reg_base + offset))
struct net_local {
struct net_device_stats stats;
struct net_device *next_dev;
int index;
unsigned int sdma_reg_base;
unsigned int temac_reg_base;
int tx_irq;
int rx_irq;
struct timer_list phy_timer;
};
typedef struct cdmac_bd_t {
struct cdmac_bd_t *next_p;
unsigned char *phys_buf_p;
unsigned long buf_len;
unsigned long app0;
unsigned long app1;
unsigned long app2;
unsigned long app3;
unsigned long app4;
} cdmac_bd ;
typedef struct cdmac_tx_bd_t {
cdmac_bd tx_bd[TX_BD_NUM];
} cdmac_tx_bd ;
typedef struct cdmac_rx_bd_t {
cdmac_bd rx_bd[RX_BD_NUM];
} cdmac_rx_bd ;
static cdmac_tx_bd *cdmac_tx_bd_virt_p;
static cdmac_rx_bd *cdmac_rx_bd_virt_p;
static cdmac_tx_bd *cdmac_tx_bd_phys_p;
static cdmac_rx_bd *cdmac_rx_bd_phys_p;
static struct sk_buff *rx_skb[RX_BD_NUM];
static volatile int cur_tx_bd = 0;
static volatile int next_tx_bd = 0;
static volatile int tail_tx_bd = 0;
static int cur_rx_bd = 0;
static struct net_device *dev_list = NULL;
static spinlock_t dev_lock;
static spinlock_t rcv_lock;
static spinlock_t xmt_lock;
static int xps_ll_temac_xmit(struct sk_buff *skb, struct net_device *dev)
;
static struct net_device_stats *xps_ll_temac_get_stats(struct net_device
*dev);
static void xps_ll_temac_hostif_set(struct net_device *dev, int emac,
int phy_addr, int reg_addr, int phy_data)
{
struct net_local *lp = (struct net_local *)dev->priv;
temac_reg_write(lp, TEMAC_LSW0, phy_data);
temac_reg_write(lp, TEMAC_CTL0, CNTLREG_WRITE_ENABLE_MASK | MIIMWD);
temac_reg_write(lp, TEMAC_LSW0, ((phy_addr << 5) | (reg_addr)));
temac_reg_write(lp, TEMAC_CTL0, CNTLREG_WRITE_ENABLE_MASK | MIIMAI |
(emac << 10));
while(!(temac_reg_read(lp, TEMAC_RDY0) & XTE_RSE_MIIM_WR_MASK));
}
static unsigned int xps_ll_temac_hostif_get(struct net_device *dev, int
emac, int phy_addr, int reg_addr)
{
struct net_local *lp = (struct net_local *)dev->priv;
temac_reg_write(lp, TEMAC_LSW0, ((phy_addr << 5) | (reg_addr)));
temac_reg_write(lp, TEMAC_CTL0, MIIMAI | (emac << 10));
while(!(temac_reg_read(lp, TEMAC_RDY0) & XTE_RSE_MIIM_RR_MASK));
return temac_reg_read(lp, TEMAC_LSW0);
}
static void xps_ll_temac_indirect_set(struct net_device *dev, int emac,
int reg_offset, int reg_data)
{
struct net_local *lp = (struct net_local *)dev->priv;
temac_reg_write(lp, TEMAC_LSW0, reg_data);
temac_reg_write(lp, TEMAC_CTL0, (CNTLREG_WRITE_ENABLE_MASK | (emac <
< 10) | reg_offset));
while(!(temac_reg_read(lp, TEMAC_RDY0) & XTE_RSE_CFG_WR_MASK));
}
static void xps_ll_temac_phy_ctrl(struct net_device *dev)
{
unsigned int result;
result = xps_ll_temac_hostif_get(dev, 0, EMAC_PHY_ID, 10);
if((result & 0x0800) == 0x0800) {
xps_ll_temac_indirect_set(dev, 0, EMMC, 0x80000000);
printk("1000BASE-T/FD\n");
return;
}
result = xps_ll_temac_hostif_get(dev, 0, EMAC_PHY_ID, 5);
if((result & 0x0100) == 0x0100) {
xps_ll_temac_indirect_set(dev, 0, EMMC, 0x40000000);
printk("100BASE-T/FD\n");
} else if((result & 0x0040) == 0x0040) {
xps_ll_temac_indirect_set(dev, 0, EMMC, 0x00000000);
printk("10BASE-T/FD\n");
} else {
printk("Half Duplex not supported\n");
}
}
static int xps_ll_temac_set_address(struct net_device *dev, void *p)
{
struct sockaddr *sa = p;
memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN);
xps_ll_temac_indirect_set(dev, 0, UAW0, (dev->dev_addr[0] &
0x000000ff) |
((dev->dev_addr[1] << 8) & 0x0000ff00) |
((dev->dev_addr[2] << 16)& 0x00ff0000) |
((dev->dev_addr[3] << 24) & 0xff000000));
xps_ll_temac_indirect_set(dev, 0, UAW1, (dev->dev_addr[4] &
0x000000ff) |
((dev->dev_addr[5] << 8) & 0x0000ff00));
return 0;
}
static void __set_rx_mode (struct net_device *dev)
{
unsigned long waddr_msw, waddr_lsw;
int i;
if(dev->flags & IFF_PROMISC) {
printk(KERN_NOTICE "%s: Promiscuos mode enabled.\n", dev->name);
xps_ll_temac_indirect_set(dev, 0, AFM, 0x80000000);
} else {
struct dev_mc_list *mclist;
for(i = 0, mclist = dev->mc_list; mclist && i < dev->mc_count;
i++, mclist = mclist->next) {
if(i >= MULTICAST_CAM_TABLE_NUM) break;
waddr_msw = ((mclist->dmi_addr[3] << 24) | (mclist->dmi_
addr[2] << 16) |
(mclist->dmi_addr[1] << 8) | mclist->dmi_addr[0]);
xps_ll_temac_indirect_set(dev, 0, MAW0, waddr_msw);
waddr_lsw = ((mclist->dmi_addr[5] << 8) | mclist->dmi_addr[4]
);
waddr_lsw |= (i << 16);
xps_ll_temac_indirect_set(dev, 0, MAW1, waddr_lsw);
}
}
}
static void xps_ll_temac_set_rx_mode (struct net_device *dev)
{
spin_lock(&dev_lock);
__set_rx_mode(dev);
spin_unlock(&dev_lock);
}
static int xps_ll_temac_xmit_done(struct net_device *dev)
{
struct net_local *lp = (struct net_local *)dev->priv;
cdmac_bd *cur_p;
unsigned int stat = 0;
unsigned int flags;
spin_lock_irqsave(&xmt_lock, flags);
cur_p = &cdmac_tx_bd_virt_p->tx_bd[cur_tx_bd];
stat = cur_p->app0;
while(stat & BDSTAT_COMPLETED_MASK) {
pci_unmap_single(NULL, (unsigned long)cur_p->phys_buf_p,
cur_p->buf_len, PCI_DMA_TODEVICE);
if (cur_p->app4)
dev_kfree_skb_irq((struct sk_buff *)cur_p->app4);
cur_p->app0 = 0;
lp->stats.tx_packets++;
lp->stats.tx_bytes += cur_p->buf_len;
cur_tx_bd++;
if (cur_tx_bd >= TX_BD_NUM) cur_tx_bd = 0;
cur_p = &cdmac_tx_bd_virt_p->tx_bd[cur_tx_bd];
stat = cur_p->app0;
}
spin_unlock_irqrestore(&xmt_lock, flags);
if(netif_queue_stopped(dev)) {
netif_wake_queue(dev);
}
}
static int xps_ll_temac_xmit(struct sk_buff *skb, struct net_device *dev)
{
struct net_local *lp = (struct net_local *)dev->priv;
cdmac_bd *cur_p, *start_p, *tail_p;
int i;
unsigned long num_frag;
skb_frag_t *frag;
spin_lock(&xmt_lock);
num_frag = skb_shinfo(skb)->nr_frags;
frag = &skb_shinfo(skb)->frags[0];
start_p = &cdmac_tx_bd_phys_p->tx_bd[tail_tx_bd];
cur_p = &cdmac_tx_bd_virt_p->tx_bd[tail_tx_bd];
if(cur_p->app0 & BDSTAT_COMPLETED_MASK) {
if(!netif_queue_stopped(dev)) {
netif_stop_queue(dev);
spin_unlock(&xmt_lock);
return NETDEV_TX_BUSY;
}
return NETDEV_TX_BUSY;
}
cur_p->app0 = 0;
if(skb->ip_summed == CHECKSUM_PARTIAL) {
const struct iphdr *ip = skb->nh.iph;
int length, start, insert, headlen;
switch(ip->protocol) {
case IPPROTO_TCP:
start = sizeof(struct iphdr) + ETH_HLEN;
insert = sizeof(struct iphdr) + ETH_HLEN + 16;
length = ip->tot_len - sizeof(struct iphdr);
headlen = ETH_HLEN + sizeof(struct iphdr) + sizeof(struct
tcphdr);
break;
case IPPROTO_UDP:
start = sizeof(struct iphdr) + ETH_HLEN;
insert = sizeof(struct iphdr) + ETH_HLEN + 6;
length = ip->tot_len - sizeof(struct iphdr);
headlen = ETH_HLEN + sizeof(struct iphdr) + sizeof(struct
udphdr);
break;
default:
break;
}
cur_p->app1 = ((start << 16) | insert);
cur_p->app2 = csum_tcpudp_magic(ip->saddr, ip->daddr,
length, ip->protocol, 0);
skb->data[insert] = 0;
skb->data[insert + 1] = 0;
}
cur_p->app0 |= BDSTAT_SOP_MASK;
cur_p->buf_len = skb_headlen(skb);
cur_p->phys_buf_p = (unsigned char *)pci_map_single(NULL, skb->data,
skb->len, PCI_DMA_TODEVICE);
cur_p->app4 = (unsigned long)skb;
for(i = 0;i < num_frag;i++) {
tail_tx_bd++;
if (tail_tx_bd >= TX_BD_NUM) tail_tx_bd = 0;
cur_p = &cdmac_tx_bd_virt_p->tx_bd[tail_tx_bd];
cur_p->phys_buf_p = (unsigned char *)pci_map_single(NULL,
(void *)page_address(frag->page) + frag->page_offset, frag->
size, PCI_DMA_TODEVICE);
cur_p->buf_len = frag->size;
cur_p->app0 = 0;
frag++;
}
cur_p->app0 |= BDSTAT_EOP_MASK;
tail_p = &cdmac_tx_bd_phys_p->tx_bd[tail_tx_bd];
tail_tx_bd++;
if (tail_tx_bd >= TX_BD_NUM) tail_tx_bd = 0;
if(!(sdma_reg_read(lp, TX_CHNL_STS) & 2)) {
sdma_reg_write(lp, TX_CURDESC_PTR, start_p);
sdma_reg_write(lp, TX_TAILDESC_PTR, tail_p); // DMA start
} else {
}
spin_unlock(&xmt_lock);
return 0;
}
static int xps_ll_temac_poll(struct net_device *dev, int *budget)
{
struct net_local *lp = (struct net_local *)dev->priv;
struct sk_buff *skb, *new_skb;
unsigned int bdstat;
unsigned long align;
cdmac_bd *cur_p, *tail_p;
int length;
unsigned long skb_vaddr;
unsigned int flags;
tail_p = &cdmac_rx_bd_phys_p->rx_bd[cur_rx_bd];
cur_p = &cdmac_rx_bd_virt_p->rx_bd[cur_rx_bd];
bdstat = cur_p->app0;
while((bdstat & BDSTAT_COMPLETED_MASK) && *budget > 0) {
skb = rx_skb[cur_rx_bd];
length = cur_p->app4;
skb_vaddr = virt_to_bus(skb->data);
pci_unmap_single(NULL, skb_vaddr, length, PCI_DMA_FROMDEVICE);
skb_put(skb, length);
skb->dev = dev;
skb->protocol = eth_type_trans(skb, dev);
skb->ip_summed = CHECKSUM_NONE;
netif_receive_skb(skb);
dev->last_rx = jiffies;
lp->stats.rx_packets++;
lp->stats.rx_bytes += length;
new_skb = alloc_skb(XEM_MAX_FRAME_SIZE + ALIGNMENT, GFP_ATOMIC);
if(new_skb == 0) {
printk("no memory for new sk_buff\n");
spin_unlock_irqrestore(&rcv_lock, flags);
return -ENOMEM;
}
align = BUFFER_ALIGN(new_skb->data);
if(align) skb_reserve(new_skb, align);
cur_p->app0 = BDSTAT_INT_ON_END_MASK;
cur_p->phys_buf_p = (unsigned char *)
pci_map_single(NULL, new_skb->data,
XEM_MAX_FRAME_SIZE,
PCI_DMA_FROMDEVICE);
cur_p->buf_len = XEM_MAX_FRAME_SIZE;
rx_skb[cur_rx_bd] = new_skb;
cur_rx_bd++;
if(cur_rx_bd >= RX_BD_NUM) cur_rx_bd = 0;
cur_p = &cdmac_rx_bd_virt_p->rx_bd[cur_rx_bd];
bdstat = cur_p->app0 ;
(*budget)--;
}
netif_rx_complete(dev);
sdma_reg_write(lp, RX_CHNL_CTRL,
sdma_reg_read(lp, RX_CHNL_CTRL) | SDMA_MASTER_IRQ);
sdma_reg_write(lp, RX_TAILDESC_PTR, tail_p);
return 0;
}
static void xps_ll_temac_recv(struct net_device *dev)
{
struct net_local *lp = (struct net_local *)dev->priv;
struct sk_buff *skb, *new_skb;
unsigned int bdstat;
unsigned long align;
cdmac_bd *cur_p, *tail_p;
int length;
unsigned long skb_vaddr;
unsigned int flags;
spin_lock_irqsave(&rcv_lock, flags);
tail_p = &cdmac_rx_bd_phys_p->rx_bd[cur_rx_bd];
cur_p = &cdmac_rx_bd_virt_p->rx_bd[cur_rx_bd];
bdstat = cur_p->app0;
while((bdstat & BDSTAT_COMPLETED_MASK)) {
skb = rx_skb[cur_rx_bd];
length = cur_p->app4;
skb_vaddr = virt_to_bus(skb->data);
pci_unmap_single(NULL, skb_vaddr, length, PCI_DMA_FROMDEVICE);
skb_put(skb, length);
skb->dev = dev;
skb->protocol = eth_type_trans(skb, dev);
skb->ip_summed = CHECKSUM_NONE;
netif_rx(skb);
lp->stats.rx_packets++;
lp->stats.rx_bytes += length;
new_skb = alloc_skb(XEM_MAX_FRAME_SIZE + ALIGNMENT, GFP_ATOMIC);
if(new_skb == 0) {
printk("no memory for new sk_buff\n");
spin_unlock_irqrestore(&rcv_lock, flags);
return;
}
align = BUFFER_ALIGN(new_skb->data);
if(align) skb_reserve(new_skb, align);
cur_p->app0 = BDSTAT_INT_ON_END_MASK;
cur_p->phys_buf_p = (unsigned char *)
pci_map_single(NULL, new_skb->data,
XEM_MAX_FRAME_SIZE,
PCI_DMA_FROMDEVICE);
cur_p->buf_len = XEM_MAX_FRAME_SIZE;
rx_skb[cur_rx_bd] = new_skb;
cur_rx_bd++;
if(cur_rx_bd >= RX_BD_NUM) cur_rx_bd = 0;
cur_p = &cdmac_rx_bd_virt_p->rx_bd[cur_rx_bd];
bdstat = cur_p->app0;
}
sdma_reg_write(lp, RX_TAILDESC_PTR, tail_p);
spin_unlock_irqrestore(&rcv_lock, flags);
}
static irqreturn_t
xps_ll_temac_tx_int(int irq, void * dev_id, struct pt_regs *regs)
{
unsigned int status;
struct net_device *dev = (struct net_device *)dev_id;
struct net_local *lp = (struct net_local *)dev->priv;
status = sdma_reg_read(lp, TX_IRQ_REG);
sdma_reg_write(lp, TX_IRQ_REG, status);
if(status & 3) xps_ll_temac_xmit_done(dev);
if(status & 0x080) printk("DMA error 0x%x\n", status);
return IRQ_HANDLED;
}
static irqreturn_t
xps_ll_temac_rx_int(int irq, void * dev_id, struct pt_regs *regs)
{
unsigned int status;
struct net_device *dev = (struct net_device *)dev_id;
struct net_local *lp = (struct net_local *)dev->priv;
status = sdma_reg_read(lp, RX_IRQ_REG);
sdma_reg_write(lp, RX_IRQ_REG, status);
#ifdef XPS_LL_TEMAC_NAPI
if(status & 1) {
if(likely(netif_rx_schedule_prep(dev))) {
sdma_reg_write(lp, RX_CHNL_CTRL,
sdma_reg_read(lp, RX_CHNL_CTRL) & ~SDMA_MASTER_IRQ);
__netif_rx_schedule(dev);
}
}
#else
if(status & 3) xps_ll_temac_recv(dev);
#endif
return IRQ_HANDLED;
}
static void xps_ll_temac_netpoll(struct net_device *dev)
{
//struct net_local *lp = (struct net_local *)dev->priv;
disable_irq(XPAR_XPS_INTC_0_DDR_SDRAM_SDMA2_TX_INTOUT_INTR);
disable_irq(XPAR_XPS_INTC_0_DDR_SDRAM_SDMA2_RX_INTOUT_INTR);
xps_ll_temac_rx_int(XPAR_XPS_INTC_0_DDR_SDRAM_SDMA2_RX_INTOUT_INTR,
dev, 0);
xps_ll_temac_tx_int(XPAR_XPS_INTC_0_DDR_SDRAM_SDMA2_TX_INTOUT_INTR,
dev, 0);
enable_irq(XPAR_XPS_INTC_0_DDR_SDRAM_SDMA2_TX_INTOUT_INTR);
enable_irq(XPAR_XPS_INTC_0_DDR_SDRAM_SDMA2_RX_INTOUT_INTR);
}
static struct net_device_stats *xps_ll_temac_get_stats(struct net_device
*dev)
{
return netdev_priv(dev);
}
static int xps_ll_temac_init_descriptor(void)
{
struct sk_buff *skb;
unsigned long align;
int i;
cdmac_tx_bd_virt_p = dma_alloc_coherent(NULL, sizeof(struct cdmac_
tx_bd_t),
(dma_addr_t *)&cdmac_tx_bd_phys_p, GFP_KERNEL);
cdmac_rx_bd_virt_p = dma_alloc_coherent(NULL, sizeof(struct cdmac_
rx_bd_t),
(dma_addr_t *)&cdmac_rx_bd_phys_p, GFP_KERNEL);
for(i = 0;i < TX_BD_NUM;i++) {
memset((char *)&cdmac_tx_bd_virt_p->tx_bd[i], 0, sizeof(struct
cdmac_bd_t));
if(i == (TX_BD_NUM - 1)) {
cdmac_tx_bd_virt_p->tx_bd[i].next_p =
&cdmac_tx_bd_phys_p->tx_bd[0];
} else {
cdmac_tx_bd_virt_p->tx_bd[i].next_p =
&cdmac_tx_bd_phys_p->tx_bd[i + 1];
}
}
for(i = 0;i < RX_BD_NUM;i++) {
memset((char *)&cdmac_rx_bd_virt_p->rx_bd[i], 0, sizeof(struct
cdmac_bd_t));
if(i == (RX_BD_NUM - 1)) {
cdmac_rx_bd_virt_p->rx_bd[i].next_p =
&cdmac_rx_bd_phys_p->rx_bd[0];
} else {
cdmac_rx_bd_virt_p->rx_bd[i].next_p =
&cdmac_rx_bd_phys_p->rx_bd[i + 1];
}
skb = alloc_skb(XEM_MAX_FRAME_SIZE + ALIGNMENT, GFP_ATOMIC);
if(skb == 0) {
printk("alloc_skb error %d\n", i);
return -1;
}
rx_skb[i] = skb;
align = BUFFER_ALIGN(skb->data);
if(align) skb_reserve(skb, align);
cdmac_rx_bd_virt_p->rx_bd[i].phys_buf_p =
(unsigned char *)pci_map_single(NULL,
skb->data, XEM_MAX_FRAME_SIZE,
PCI_DMA_FROMDEVICE);
cdmac_rx_bd_virt_p->rx_bd[i].buf_len = XEM_MAX_FRAME_SIZE;
cdmac_rx_bd_virt_p->rx_bd[i].app0 = BDSTAT_INT_ON_END_MASK;
}
return 0;
}
static int xps_ll_temac_changemtu(struct net_device *dev, int newmtu)
{
printk("[xilinx_enet]new MTU %d\n", newmtu);
dev->mtu = newmtu;
return 0;
}
static int xps_ll_temac_open(struct net_device *dev)
{
return 0;
}
static int xps_ll_temac_close(struct net_device *dev)
{
return 0;
}
static struct net_device **xps_ll_temacs;
static int __init xps_ll_temac_init_one(int index)
{
struct net_device *dev = alloc_etherdev(sizeof(struct net_local));
struct net_local *lp;
int err = 0;
if (!dev) return -ENOMEM;
sprintf(dev->name, "eth%d", index);
/* Initialize the device structure. */
dev->get_stats = xps_ll_temac_get_stats;
dev->hard_start_xmit = xps_ll_temac_xmit;
dev->open = xps_ll_temac_open;
dev->stop = xps_ll_temac_close;
#ifdef XPS_LL_TEMAC_NAPI
dev->poll = &xps_ll_temac_poll;
#endif
dev->weight = 64;
dev->set_multicast_list = &xps_ll_temac_set_rx_mode;
dev->set_mac_address = xps_ll_temac_set_address;
dev->poll_controller = xps_ll_temac_netpoll;
SET_MODULE_OWNER(dev);
#if 1
// dev->features = NETIF_F_SG | NETIF_F_FRAGLIST
// | NETIF_F_IP_CSUM;
dev->features = NETIF_F_SG | NETIF_F_FRAGLIST;
#else
dev->features = NETIF_F_SG | NETIF_F_FRAGLIST
| NETIF_F_TSO | NETIF_F_IP_CSUM;
#endif
ether_setup(dev);
lp = (struct net_local *)dev->priv;
memset(lp, 0, sizeof(struct net_local));
lp->index = index;
lp->next_dev = dev_list;
lp->sdma_reg_base = ioremap(S_DMA_CTRL_BASEADDR, 128);
lp->temac_reg_base = ioremap(XPS_LLTEMAC_BASEADDR, 128);
dev_list = dev;
dev->tx_queue_len = 0;
dev->change_mtu = xps_ll_temac_changemtu;
sdma_reg_write(lp, DMA_CONTROL_REG, 1);
printk(KERN_INFO "%s: Xilinx Embedded Tri-Mode Ethernet MAC\n", dev-
>name);
xps_ll_temac_init_descriptor();
dev->dev_addr[0] = 0x00;
dev->dev_addr[1] = 0x80;
dev->dev_addr[2] = 0x49;
dev->dev_addr[3] = 0x00;
dev->dev_addr[4] = 0x00;
dev->dev_addr[5] = 0x00;
request_irq(XPAR_XPS_INTC_0_DDR_SDRAM_SDMA2_TX_INTOUT_INTR,
&xps_ll_temac_tx_int, 0, dev->name, dev);
request_irq(XPAR_XPS_INTC_0_DDR_SDRAM_SDMA2_RX_INTOUT_INTR,
&xps_ll_temac_rx_int, 0, dev->name, dev);
xps_ll_temac_indirect_set(dev, 0, MC, MDIO_ENABLE_MASK | MDIO_CLOCK_
DIV_100MHz);
xps_ll_temac_indirect_set(dev, 0, RCW1, 0x10000000); // Enable
Receiver
xps_ll_temac_indirect_set(dev, 0, TC, 0x10000000); // Enable
Transmitter
xps_ll_temac_indirect_set(dev, 0, EMMC, 0x84000000);
xps_ll_temac_indirect_set(dev, 0, UAW0, (dev->dev_addr[0] &
0x000000ff) |
((dev->dev_addr[1] << 8) & 0x0000ff00) |
((dev->dev_addr[2] << 16)& 0x00ff0000) |
((dev->dev_addr[3] << 24) & 0xff000000));
xps_ll_temac_indirect_set(dev, 0, UAW1, (dev->dev_addr[4] &
0x000000ff) |
((dev->dev_addr[5] << 8) & 0x0000ff00));
xps_ll_temac_indirect_set(dev, 0, AFM, 0x00000000);
xps_ll_temac_phy_ctrl(dev);
sdma_reg_write(lp, TX_CHNL_CTRL, 0x10220483);
//sdma_reg_write(lp, TX_CHNL_CTRL, 0x00100483);
sdma_reg_write(lp, RX_CHNL_CTRL, 0xff010283);
sdma_reg_write(lp, RX_CURDESC_PTR, (unsigned int)&cdmac_rx_bd_phys_
p->rx_bd[0]);
sdma_reg_write(lp, RX_TAILDESC_PTR, (unsigned int)&cdmac_rx_bd_phys_
p->rx_bd[RX_BD_NUM - 1]);
if ((err = register_netdev(dev))) {
free_netdev(dev);
dev = NULL;
} else {
xps_ll_temacs[index] = dev;
}
return 0;
}
static void xps_ll_temac_free_one(int index)
{
unregister_netdev(xps_ll_temacs[index]);
free_netdev(xps_ll_temacs[index]);
}
static int __init xps_ll_temac_init_module(void)
{
int err = 0;
xps_ll_temacs = kmalloc(sizeof(void *), GFP_KERNEL);
if (!xps_ll_temacs) return -ENOMEM;
spin_lock_init(&dev_lock);
spin_lock_init(&rcv_lock);
spin_lock_init(&xmt_lock);
if((err = xps_ll_temac_init_one(0))) xps_ll_temac_free_one(0);
return err;
}
static void __exit xps_ll_temac_cleanup_module(void)
{
xps_ll_temac_free_one(0);
kfree(xps_ll_temacs);
}
module_init(xps_ll_temac_init_module);
module_exit(xps_ll_temac_cleanup_module);
MODULE_LICENSE("GPL");
> Thanks,
>
> I have alot of work to do on our stuff, I might as well see if I
can
> move to the powerpc tree at the same time.
>
> BTW is there even the beginings of a non-xilinx lltemac driver out
> there ? There were hints on the list, but I have not seen anything.
>
> I would be happy to help advance the ball on anything anyone has
> started.
>
>
>
> Grant Likely wrote:
> > On Sun, Apr 20, 2008 at 2:31 PM, David H. Lynch Jr. <dhlii@dlasys.net
> wrote:
> >
> >> Thanks.
> >>
> >> I am running linus's 2.6.25-rc9, but I can pull the Xilinx tree
or
> >> yours - when your server is up.
> >>
> >> I can not find any Xilinx powerpc configs in arch/powerpc/
config
> >> Do I just need to do a
> >> make ARCH=powerpc menuconfig and create one from scratch ?
> >>
> >
> > That's right; I haven't merged any defconfigs. Roll your own.
> >
> >
> >> Is simpleboot in your tree or the xilinx tree, if can not find
it
> >> in Linus's ?
> >>
> >
> > If you want to use the "simpleboot" wrapper; then you'll need to
pull
> > paulus' tree (Linus hasn't yet pulled his tree; but he probably will
> > any moment now).
> >
> > Cheers,
> > g.
> >
> >
>
>
> --
> Dave Lynch DLA Systems
> Software Development: Embedded Linux
> 717.627.3770 dhlii@dlasys.net http://www.dlasys.net
> fax: 1.253.369.9244 Cell: 1.717.587.7774
> Over 25 years' experience in platforms, languages, and technologies
too numerous to list.
>
> "Any intelligent fool can make things bigger and more complex... It
takes a touch of genius - and a lot of courage to move in the opposite
direction."
> Albert Einstein
>
> _______________________________________________
> Linuxppc-embedded mailing list
> Linuxppc-embedded@ozlabs.org
> https://ozlabs.org/mailman/listinfo/linuxppc-embedded
>
※ ４月から所属・部署が変更になりました
------------------------------------------------------------------
柏木良夫
株式会社日新システムズ 東日本営業部
本 社 〒600-8482 京都市下京区堀川通四条下ル東側 堀川四条ビル
TEL 075-344-7977 FAX 075-344-7887
東京事務所 〒101-0024 東京都千代田区神田和泉町1番地 神田和泉町ビル
TEL 03-5825-2081 FAX 03-5821-1259
E-Mail kashiwagi@co-nss.co.jp HTTP http://www.co-nss.co.jp/
------------------------------------------------------------------
^ permalink raw reply
* Re: Question on MPC83xx interrupts
From: Michael Ellerman @ 2008-04-22 22:57 UTC (permalink / raw)
To: Scott Wood; +Cc: Andre Schwarz, linux-ppc list
In-Reply-To: <20080422172306.GA17992@ld0162-tx32.am.freescale.net>
[-- Attachment #1: Type: text/plain, Size: 762 bytes --]
On Tue, 2008-04-22 at 12:23 -0500, Scott Wood wrote:
> On Tue, Apr 22, 2008 at 06:58:33PM +0200, Andre Schwarz wrote:
> > I wonder if the IRQ number should match the vector of the datasheet ...
> > giving :
>
> No. The numbers in /proc/interrupts are virtual IRQ numbers, which are a
> purely Linux-internal construct.
You can see the mapping between virq and hwirq numbers by turning on
CONFIG_VIRQ_DEBUG and looking in /sys/kernel/debug/powerpc/virq_mapping
(after mounting debugfs).
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Re: [PATCH 1/3] radeonfb: Fix 64 bits resources on 32 bits archs
From: Benjamin Herrenschmidt @ 2008-04-22 22:21 UTC (permalink / raw)
To: Christian Ehrhardt
Cc: linux-fbdev-devel, Hollis Blanchard, adaplas, linux-kernel,
linuxppc-dev, Andrew Morton, Detlev Zundel
In-Reply-To: <480E0A54.9010203@linux.vnet.ibm.com>
On Tue, 2008-04-22 at 17:55 +0200, Christian Ehrhardt wrote:
> I wanted to ask if there are any known workarounds atm that would
> allow me to use my X11 for now?
X is doing a mmap of /dev/mem instead of /dev/fb ?
You can normally map the fb mapping /dev/fb and then map the registers
using /dev/fb at an offset beyond the framebuffer (fix->smem_len).
If X is using /dev/mem instead, then it's being stupid and needs to be
fixed...
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 3/3] atyfb: Fix 64 bits resources on 32 bits archs
From: Benjamin Herrenschmidt @ 2008-04-22 22:20 UTC (permalink / raw)
To: Sergei Shtylyov
Cc: linuxppc-dev, Andrew Morton, linux-fbdev-devel, linux-kernel,
adaplas
In-Reply-To: <480E07BC.3050107@ru.mvista.com>
On Tue, 2008-04-22 at 19:43 +0400, Sergei Shtylyov wrote:
> Not sure what that change gives us -- this function mostly treats 'addr'
> as unsigned long (casting it to char/void *), ot compares it to 'unsigned
> long' 'base' variable -- which should be made 'resource_size_t' in its turn
> being assigned resource's start value. So, this part of patch looks incomplete
> (and yet I'm not sure if SPARC really needs all that)...
I just wanted to make sure both setup functions has the same prototype.
I think sparc doesn't need fixing in there.
Ben.
^ permalink raw reply
* Re: pci issue - wrong detection of pci ressources
From: Benjamin Herrenschmidt @ 2008-04-22 22:18 UTC (permalink / raw)
To: Christian Ehrhardt; +Cc: linuxppc-dev, Detlev Zundel, Hollis Blanchard
In-Reply-To: <480DF46F.9090900@linux.vnet.ibm.com>
> >> radeonfb: EDID probed
> >> Parsing EDID data for panel info
> >> Setting up default mode based on panel info
> >> radeonfb (0000:00:0a.0): ATI Radeon Y`
> >
> > Hm, what's that Y`?
>
> Thats the final message in the radeonfb driver ater initializing everything.
> printk ("radeonfb (%s): %s\n", pci_name(rinfo->pdev), rinfo->name);
> I wonder why that rinfo->name is clobbered - maybe another issue, I have to keep that in mind.
Nah, that's normal. ATI used to use nice letters for their PCI ID, and
we used to print that as that's also what they used in some docs etc...
but a few years ago, they started using other characters (running out of
letters). I think there's a patch floating around to print it in hex
instead.
Cheers,
Ben.
^ permalink raw reply
* RE: Xilinx PowerPC
From: Koss, Mike (Mission Systems) @ 2008-04-22 22:15 UTC (permalink / raw)
To: David H. Lynch Jr., Grant Likely; +Cc: linuxppc-embedded
In-Reply-To: <480BD66B.90001@dlasys.net>
I have the start of a lltemac based on the new XPS_LL_TEMAC from EDK
9.2. I'm currently in the process of upgrading my design to 9.2. So I
will be very much interested in the driver working ;).
I'll see what I can get cleaned up and posted somewhere, if you'd like
to take a look at it.
-- Mike
(sorry for the double post, if it happens but it seems that my last
e-mail was blank per my records.)=20
-----Original Message-----
From: David H. Lynch Jr. [mailto:dhlii@dlasys.net]=20
Sent: Sunday, April 20, 2008 7:49 PM
To: Grant Likely
Cc: linuxppc-embedded
Subject: Re: Xilinx PowerPC
Thanks,
I have alot of work to do on our stuff, I might as well see if I can
move to the powerpc tree at the same time.
BTW is there even the beginings of a non-xilinx lltemac driver out
there ? There were hints on the list, but I have not seen anything.
I would be happy to help advance the ball on anything anyone has
started.
=20
Grant Likely wrote:
> On Sun, Apr 20, 2008 at 2:31 PM, David H. Lynch Jr. <dhlii@dlasys.net>
wrote:
> =20
>> Thanks.
>>
>> I am running linus's 2.6.25-rc9, but I can pull the Xilinx tree=20
>> or yours - when your server is up.
>>
>> I can not find any Xilinx powerpc configs in arch/powerpc/config
>> Do I just need to do a
>> make ARCH=3Dpowerpc menuconfig and create one from scratch ?
>> =20
>
> That's right; I haven't merged any defconfigs. Roll your own.
>
> =20
>> Is simpleboot in your tree or the xilinx tree, if can not find=20
>> it in Linus's ?
>> =20
>
> If you want to use the "simpleboot" wrapper; then you'll need to pull=20
> paulus' tree (Linus hasn't yet pulled his tree; but he probably will=20
> any moment now).
>
> Cheers,
> g.
>
> =20
--=20
Dave Lynch DLA Systems
Software Development: Embedded Linux
717.627.3770 dhlii@dlasys.net http://www.dlasys.net
fax: 1.253.369.9244 Cell: 1.717.587.7774
Over 25 years' experience in platforms, languages, and technologies too
numerous to list.
"Any intelligent fool can make things bigger and more complex... It
takes a touch of genius - and a lot of courage to move in the opposite
direction."
Albert Einstein
^ permalink raw reply
* Re: [PATCH 5/5] IB/ehca: Bump version number to 0026
From: Roland Dreier @ 2008-04-22 20:55 UTC (permalink / raw)
To: Joachim Fenkes
Cc: LKML, OF-EWG, LinuxPPC-Dev, Christoph Raisch, OF-General,
Stefan Roscher
In-Reply-To: <200804211008.17023.fenkes@de.ibm.com>
thanks, applied all 5.
^ permalink raw reply
* Re: SecretLab 2.6.24 with USB
From: Aaron Sells @ 2008-04-22 20:46 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-embedded
In-Reply-To: <fa686aa40804221309g7d0749e8qc329ad72389f0138@mail.gmail.com>
Grant Likely wrote:
> 1. Post your boot log
Linux/PPC load: console=ttyUL0,9600 root=/dev/nfs rw
nfsroot=172.16.100.6:/opt/oe/console ip=dhcp
Uncompressing Linux...done.
Now booting the kernel
[ 0.000000] Linux version 2.6.24-rc8-xlnx-dirty
(sellsa@SS-SBIR-Ubuntu) (gcc version 4.2.2) #2 Tue Apr 22 12:04:46 EDT 2008
[ 0.000000] Xilinx Generic PowerPC board support package (Xilinx
ML403) (Virtex-4 FX)
[ 0.000000] Zone PFN ranges:
[ 0.000000] DMA 0 -> 16384
[ 0.000000] Normal 16384 -> 16384
[ 0.000000] Movable zone start PFN for each node
[ 0.000000] early_node_map[1] active PFN ranges
[ 0.000000] 0: 0 -> 16384
[ 0.000000] Built 1 zonelists in Zone order, mobility grouping on.
Total pages: 16256
[ 0.000000] Kernel command line: console=ttyUL0,9600 root=/dev/nfs rw
nfsroot=172.16.100.6:/opt/oe/console ip=dhcp
[ 0.000000] Xilinx INTC #0 at 0x81800000 mapped to 0xFDFFF000
[ 0.000000] PID hash table entries: 256 (order: 8, 1024 bytes)
[ 0.000258] Console: colour dummy device 80x25
[ 0.000922] Dentry cache hash table entries: 8192 (order: 3, 32768 bytes)
[ 0.002038] Inode-cache hash table entries: 4096 (order: 2, 16384 bytes)
[ 0.021346] Memory: 61312k available (2616k kernel code, 868k data,
132k init, 0k highmem)
[ 0.108742] Mount-cache hash table entries: 512
[ 0.116268] net_namespace: 152 bytes
[ 0.119536] NET: Registered protocol family 16
[ 0.123901] Registering device uartlite:0
[ 0.125230] Fixup MAC address for xilinx_lltemac:0
[ 0.125289] Registering device xilinx_lltemac:0
[ 0.126444] Registering device xilinx_iic:0
[ 0.171651] SCSI subsystem initialized
[ 0.175959] usbcore: registered new interface driver usbfs
[ 0.178205] usbcore: registered new interface driver hub
[ 0.179810] usbcore: registered new device driver usb
[ 0.218553] NET: Registered protocol family 2
[ 0.256930] IP route cache hash table entries: 1024 (order: 0, 4096
bytes)
[ 0.260235] TCP established hash table entries: 2048 (order: 2, 16384
bytes)
[ 0.260666] TCP bind hash table entries: 2048 (order: 1, 8192 bytes)
[ 0.260912] TCP: Hash tables configured (established 2048 bind 2048)
[ 0.260955] TCP reno registered
[ 0.283619] Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
[ 0.285708] JFFS2 version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
[ 0.287381] io scheduler noop registered
[ 0.287442] io scheduler anticipatory registered (default)
[ 0.287481] io scheduler deadline registered
[ 0.287740] io scheduler cfq registered
[ 0.373233] Macintosh non-volatile memory driver v1.1
[ 0.374364] Serial: 8250/16550 driver $Revision: 1.90 $ 4 ports, IRQ
sharing disabled
[ 0.382613] uartlite.0: ttyUL0 at MMIO 0x84000003 (irq = 7) is a uartlite
[ 0.382713] console [ttyUL0] enabled
[ 3.227497] brd: module loaded
[ 3.259241] loop: module loaded
[ 3.285114] Xilinx SystemACE device driver, major=254
[ 3.348555] nbd: registered device at major 43
[ 3.426028] usbcore: registered new interface driver ub
[ 3.472247] tun: Universal TUN/TAP device driver, 1.6
[ 3.532134] tun: (C) 1999-2004 Max Krasnyansky <maxk@qualcomm.com>
[ 3.609161] xilinx_lltemac xilinx_lltemac.0: MAC address is now 0:
a:35: 1: 2: 3
[ 3.696055] xilinx_lltemac xilinx_lltemac.0: XLlTemac: using FIFO
direct interrupt driven mode.
[ 3.800113] XLlTemac: Fifo base address: 0xc5052000
[ 3.861023] XTemac: No PHY detected. Assuming a PHY at address 0
[ 3.936569] xilinx_lltemac xilinx_lltemac.0: eth0: Xilinx TEMAC at
0x81C00000 mapped to 0xC5054000, irq=2
[ 4.048559] Linux video capture interface: v2.00
[ 4.106344] block2mtd: version $Revision: 1.30 $
[ 4.156087] usbmon: debugfs is not available
[ 4.209164] Initializing USB Mass Storage driver...
[ 4.268301] usbcore: registered new interface driver usb-storage
[ 4.336109] USB Mass Storage support registered.
[ 4.392985] i8042.c: No controller found.
[ 4.444206] mice: PS/2 mouse device common for all mice
[ 4.507075] i2c /dev entries driver
[ 4.561419] xilinx_iic.0 #0 at 0x81600000 mapped to 0xC5060000, irq=3
[ 4.625626] usbcore: registered new interface driver usbhid
[ 4.688119] drivers/hid/usbhid/hid-core.c: v2.6:USB HID core driver
[ 4.765302] Advanced Linux Sound Architecture Driver Version
1.0.16rc2 (Thu Jan 31 16:40:16 2008 UTC).
[ 4.880392] ALSA device list:
[ 4.908042] No soundcards found.
[ 4.958069] TCP cubic registered
[ 4.988228] NET: Registered protocol family 1
[ 5.040274] NET: Registered protocol family 17
[ 5.097536] RPC: Registered udp transport module.
[ 5.152077] RPC: Registered tcp transport module.
[ 5.717327] eth0: XLlTemac: Options: 0x3fa
[ 5.748106] eth0: XLlTemac: allocating interrupt 0 for fifo mode.
[ 7.832825] eth0: XLlTemac: speed set to 100Mb/s
[ 8.876099] Sending DHCP requests ., OK
[ 8.920092] IP-Config: Got DHCP answer from 0.0.0.0, my address is
172.16.100.199
[ 8.998117] IP-Config: Complete:
[ 9.032048] device=eth0, addr=172.16.100.199,
mask=255.255.255.0, gw=172.16.100.1,
[ 9.124032] host=172.16.100.199, domain=zin.net, nis-domain=(none),
[ 9.204160] bootserver=0.0.0.0, rootserver=172.16.100.6, rootpath=
[ 9.288645] Looking up port of RPC 100003/2 on 172.16.100.6
[ 9.370826] Looking up port of RPC 100005/1 on 172.16.100.6
[ 9.872124] eth0: XLlTemac: PHY Link carrier lost.
[ 11.922151] eth0: XLlTemac: speed set to 100Mb/s
[ 11.960020] eth0: XLlTemac: PHY Link carrier restored.
[ 14.569232] VFS: Mounted root (nfs filesystem).
[ 14.608501] Freeing unused kernel memory: 132k init
INIT: version 2.86 booting
Starting the hotplug events dispatcher udevd
Synthesizing the initial hotplug events
[ 32.666441] nbd13: Attempted send on closed socket
[ 32.708098] end_request: I/O error, dev nbd13, sector 0
[ 32.781692] nbd11: Attempted send on closed socket
[ 32.828123] end_request: I/O error, dev nbd11, sector 0
[ 32.892778] nbd12: Attempted send on closed socket
[ 32.948107] end_request: I/O error, dev nbd12, sector 0
[ 33.021755] nbd1: Attempted send on closed socket
[ 33.064057] end_request: I/O error, dev nbd1, sector 0
[ 33.178423] nbd15: Attempted send on closed socket
[ 33.220102] end_request: I/O error, dev nbd15, sector 0
[ 33.296955] nbd10: Attempted send on closed socket
[ 33.340105] end_request: I/O error, dev nbd10, sector 0
[ 33.412948] nbd0: Attempted send on closed socket
[ 33.456319] end_request: I/O error, dev nbd0, sector 0
[ 33.749262] nbd2: Attempted send on closed socket
[ 33.788077] end_request: I/O error, dev nbd2, sector 0
[ 33.910500] nbd14: Attempted send on closed socket
[ 33.952068] end_request: I/O error, dev nbd14, sector 0
[ 35.643604] FAT: unable to read boot sector
[ 35.726130] FAT: unable to read boot sector
[ 35.767178] FAT: unable to read boot sector
[ 35.808826] FAT: unable to read boot sector
[ 35.883115] FAT: unable to read boot sector
[ 35.985109] FAT: unable to read boot sector
[ 36.046253] FAT: unable to read boot sector
[ 36.130150] FAT: unable to read boot sector
[ 36.176588] FAT: unable to read boot sector
[ 37.434412] nbd3: Attempted send on closed socket
[ 37.472068] end_request: I/O error, dev nbd3, sector 0
[ 37.619660] nbd7: Attempted send on closed socket
[ 37.660096] end_request: I/O error, dev nbd7, sector 0
[ 37.879683] nbd4: Attempted send on closed socket
[ 37.920090] end_request: I/O error, dev nbd4, sector 0
[ 37.994513] nbd6: Attempted send on closed socket
[ 38.036165] end_request: I/O error, dev nbd6, sector 0
[ 38.189853] nbd5: Attempted send on closed socket
[ 38.228057] end_request: I/O error, dev nbd5, sector 0
[ 38.307332] nbd8: Attempted send on closed socket
[ 38.348365] end_request: I/O error, dev nbd8, sector 0
[ 38.422145] nbd9: Attempted send on closed socket
[ 38.464063] end_request: I/O error, dev nbd9, sector 0
[ 39.476587] FAT: unable to read boot sector
[ 39.572328] FAT: unable to read boot sector
[ 39.715495] FAT: unable to read boot sector
[ 39.811415] FAT: unable to read boot sector
[ 39.920564] FAT: unable to read boot sector
[ 39.972659] FAT: unable to read boot sector
[ 40.101692] FAT: unable to read boot sector
Remounting root file system...
Setting up IP spoofing protection: rp_filter.
Configuring network interfaces... udhcpc (v1.9.1) started
Sending discover...
Sending select for 172.16.100.199...
Lease of 172.16.100.199 obtained, lease time 604800
done.
Starting portmap daemon: portmap.
hwclock: can't open '/dev/misc/rtc': No such file or directory
Nothing to be done
INIT: Entering runlevel: 5
Starting Dropbear SSH server: dropbear.
Starting system message bus: dbus.
Starting syslogd/klogd: start-stop-daemon: lseek: Invalid argument
* Starting Avahi mDNS/DNS-SD Daemon: avahi-daemon
[ ok ]
> 2. Make sure a platform device for the usb controller is getting
> registered with the kernel.
Correct me if I'm wrong, but it does not look like my Cypress CY7C6300
USB host controller is getting registered with the kernel. Any ideas?
Regards,
Aaron Sells
^ permalink raw reply
* Re: SecretLab 2.6.24 with USB
From: Grant Likely @ 2008-04-22 20:55 UTC (permalink / raw)
To: Aaron Sells; +Cc: linuxppc-embedded
In-Reply-To: <480E4EBD.3010202@zin-tech.com>
On Tue, Apr 22, 2008 at 2:46 PM, Aaron Sells <aaron.sells@zin-tech.com> wrote:
> Grant Likely wrote:
>
> > 2. Make sure a platform device for the usb controller is getting
> > registered with the kernel.
> >
>
> Correct me if I'm wrong, but it does not look like my Cypress CY7C6300 USB
> host controller is getting registered with the kernel. Any ideas?
Compare arch/ppc/syslib/virtex_devices.c with the one in my git tree.
Add the relevant missing bits.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [RFC POWERPC] booting-without-of: bindings for FHCI USB, GPIO LEDs, MCU, and NAND on UPM
From: Josh Boyer @ 2008-04-22 20:50 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40804221308w5960ces1f03a6a8c049edd4@mail.gmail.com>
On Tue, 2008-04-22 at 14:08 -0600, Grant Likely wrote:
> On Tue, Apr 22, 2008 at 1:41 PM, Anton Vorontsov
> <avorontsov@ru.mvista.com> wrote:
> > Hi all,
> > + w) NAND on UPM-driven Freescale Localbus
> > +
> > + Required properties:
> > + - compatible : "fsl,upm-nand".
> > + - reg : should specify localbus chip select and size used for the chip.
> > + - width : should specify port size in bytes.
> > + - fsl,upm-addr-offset : UPM pattern offset for the address latch.
> > + - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
> > + - fsl,wait-pattern : should be present if NAND chip requires waiting
> > + for Ready-Not-Busy pin after each executed pattern.
> > + - fsl,wait-write : should be present if NAND chip needs waiting on
> > + Ready-Not-Busy pin after each write cycle.
> > + - linux,chip-delay : optional, may contain delay value in milliseconds
> > + (in case when Ready-Not-Busy pin was unspecified).
> > + - gpios : may specify optional GPIO connected to the Ready-Not-Busy pin.
>
> I'm not competent to comment on this binding; I haven't spent any time
> looking at NAND binding conventions.
That's because there are none, and every time someone proposes one it's
like this. Full of weird $board specific stuff that have nothing to do
with the actual NAND chip.
For example, why is fsl,wait-write defined as an fsl specific property?
It seems generic to the NAND chip itself. Also, why in the example is
the specific NAND chip part number listed, followed by fsl,upm-nand?
It's almost as if people want to mix the NAND chip and NAND controller
definitions together. Maybe there is a good reason for it, but it's
really confusing.
josh
^ permalink raw reply
* Re: [RFC POWERPC] booting-without-of: bindings for FHCI USB, GPIO LEDs, MCU, and NAND on UPM
From: Grant Likely @ 2008-04-22 20:26 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20080422202023.GA23165@ld0162-tx32.am.freescale.net>
On Tue, Apr 22, 2008 at 2:20 PM, Scott Wood <scottwood@freescale.com> wrote:
> On Tue, Apr 22, 2008 at 02:08:45PM -0600, Grant Likely wrote:
> > > + Example:
> > > +
> > > + usb-pram@8b00 {
> > > + compatible = "fsl,mpc8360-qe-muram-usb-pram",
> > > + "fsl,qe-muram-usb-pram",
> > > + "fsl,cpm-muram-usb-pram";
> > > + reg = <0x8b00 0x100>;
> > > + };
>
> Why not put it as an additional reg resource on the ucc node, instead of
> in its own node? That's how existing CPM bindings do it.
hmmm, yeah, that sounds like a better approach.
>
> > > + t) Freescale QUICC Engine USB Controller
> > > +
> > > + Required properties:
> > > + - compatible : should be "fsl,<chip>-qe-usb", "fsl,qe-usb",
> > > + "fsl,usb-fhci"
> >
> > Again, I'd leave out "fsl,qe-usb" and "fsl,usb-fhci".
>
> QE is the name of a specific IP block, and is unlikely to be broken in a
> non-backwards-compatible manner without having a new name such as QE2. I
> think this is taking "no generic names" too far.
I'll just leave my comment as "I disagree" and resist the temptation
to rehash my argument. :-)
> If these names *are*
> left out, then at least document which chip we're supposed to pick out of
> a hat to claim compatibility with.
I agree with that.
>
> -Scott
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [RFC POWERPC] booting-without-of: bindings for FHCI USB, GPIO LEDs, MCU, and NAND on UPM
From: Scott Wood @ 2008-04-22 20:20 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40804221308w5960ces1f03a6a8c049edd4@mail.gmail.com>
On Tue, Apr 22, 2008 at 02:08:45PM -0600, Grant Likely wrote:
> > + Example:
> > +
> > + usb-pram@8b00 {
> > + compatible = "fsl,mpc8360-qe-muram-usb-pram",
> > + "fsl,qe-muram-usb-pram",
> > + "fsl,cpm-muram-usb-pram";
> > + reg = <0x8b00 0x100>;
> > + };
Why not put it as an additional reg resource on the ucc node, instead of
in its own node? That's how existing CPM bindings do it.
> > + t) Freescale QUICC Engine USB Controller
> > +
> > + Required properties:
> > + - compatible : should be "fsl,<chip>-qe-usb", "fsl,qe-usb",
> > + "fsl,usb-fhci"
>
> Again, I'd leave out "fsl,qe-usb" and "fsl,usb-fhci".
QE is the name of a specific IP block, and is unlikely to be broken in a
non-backwards-compatible manner without having a new name such as QE2. I
think this is taking "no generic names" too far. If these names *are*
left out, then at least document which chip we're supposed to pick out of
a hat to claim compatibility with.
-Scott
^ permalink raw reply
* Re: [PATCH 1/2] [MTD] Add support for RAM & ROM mappings in the physmap_of MTD driver.
From: David Woodhouse @ 2008-04-22 20:18 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: ben, linuxppc-dev, linux-mtd, David Gibson
In-Reply-To: <480E479C.7040408@ru.mvista.com>
On Wed, 2008-04-23 at 00:16 +0400, Sergei Shtylyov wrote:
> David Woodhouse wrote:
>
> >>Ok. I'll submit a new patch as soon as we agree on a compatible name.
>
> > Did we?
>
> IIRC, The latest agreement was that we don't need the "compatible" and
> will match on node name.
Ok. Is there a current patch I should be merging?
--
dwmw2
^ permalink raw reply
* Re: [PATCH 1/2] [MTD] Add support for RAM & ROM mappings in the physmap_of MTD driver.
From: Sergei Shtylyov @ 2008-04-22 20:16 UTC (permalink / raw)
To: David Woodhouse; +Cc: ben, linuxppc-dev, linux-mtd, David Gibson
In-Reply-To: <1208894995.9212.669.camel@pmac.infradead.org>
David Woodhouse wrote:
>>Ok. I'll submit a new patch as soon as we agree on a compatible name.
> Did we?
IIRC, The latest agreement was that we don't need the "compatible" and
will match on node name.
WBR, Sergei
^ permalink raw reply
* Re: SecretLab 2.6.24 with USB
From: Grant Likely @ 2008-04-22 20:09 UTC (permalink / raw)
To: aaronsells; +Cc: linuxppc-embedded
In-Reply-To: <16825460.post@talk.nabble.com>
On Tue, Apr 22, 2008 at 1:23 PM, aaronsells <aaron.sells@zin-tech.com> wrote:
>
>
> Grant Likely-2 wrote:
> >
> > Your best bet is to use
> > Xilinx's git tree and manually patch in the c67x00 driver from Peter
> > Korsgaard's driver.
> >
> > http://www.mail-archive.com/linux-usb@vger.kernel.org/msg01907.html
> > http://www.mail-archive.com/linux-usb@vger.kernel.org/msg01908.html
> > http://www.mail-archive.com/linux-usb@vger.kernel.org/msg01906.html
> > http://www.mail-archive.com/linux-usb@vger.kernel.org/msg01907.html
> >
>
> I've tried this on my ML403 board with no success. My Xilinx git tree is
> current. I'm using Peter's most recent patches from
> http://peter.korsgaard.com/patches/linux/. I'm using an OpenEmbedded
> console-image mounted via nfs as my root filesystem. I don't receive any
> messages when I plug USB devices into the board (keyboard, mouse, webcam).
> Any ideas on how I can troubleshoot this?
1. Post your boot log
2. Make sure a platform device for the usb controller is getting
registered with the kernel.
Cheers,
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox