* Re: [PATCH v2] update crypto node definition and device tree instances
From: Segher Boessenkool @ 2008-06-30 16:55 UTC (permalink / raw)
To: Kim Phillips; +Cc: linuxppc-dev
In-Reply-To: <20080630110410.7ee097ed.kim.phillips@freescale.com>
>> Also, these made-up names make you do more work: you'll need to
>
> who said they were made up?
I did. These names do not refer to some physical part you can buy.
>> write up a binding for them, explaining exactly what a 1.0 device
>> etc. is (or at least point to documentation for it). If you use
>> a name that refers to some device that people can easily google
>> for documentation, you can skip this (well, you might need to
>> write a binding anyway; but at least you won't have to explain
>> what the device _is_).
>
> documentation is available in the usual places, and it specifically
> points out which SEC version it references.
I can't find a manual online for "freescale sec"; googling
for "freescale sec-1.0" finds a manual for the PowerQUICC I;
is that the right one? I don't know, so the binding needs
to explain it to me.
Going from SoC name -> SEC version is easy, but the other way around
not so.
Anyway, minor stuff.
> Plus, as I mentioned
> before, a lot of the differences between the SEC versions are miniscule
> feature bits scattered across the programming model.
I don't see how this is relevant, sorry.
>> Using actual model names also reduces the namespace pollution
>> (hopefully Freescale will not create some other MPC8272 device
>> ever, so "fsl,mpc8272-whatever" will never be a nice name to
>> use for any other device; OTOH, it's likely that Freescale will
>> create some other device called "SEC" (there are only so many
>> TLAs, after all), so "fsl,sec-n.m" isn't as future-proof.
>
> I doubt that; the SEC has been around for about a decade now and that
> hasn't happened.
You'll have to admit a three-letter acronym is a bigger namespace
squatter than a nice long name is. But it's your namespace, I don't
care.
i tried googling for "freescale sec" to find any other devices called
SEC, but that didn't work out. What is "insider trading"? ;-)
Segher
^ permalink raw reply
* RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.
From: John Linn @ 2008-06-30 16:49 UTC (permalink / raw)
To: Stephen Neuendorffer, grant.likely; +Cc: linuxppc-dev, git, dwg
In-Reply-To: <977C41F842E66D4CB2E41332313B6150062A27B7@XSJ-EXCHVS1.xlnx.xilinx.com>
I'll give it a try, sounds easy.
-- John
-----Original Message-----
From: Stephen Neuendorffer =
Sent: Monday, June 30, 2008 10:49 AM
To: grant.likely@secretlab.ca; John Linn
Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
Subject: RE: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
Ah.. good idea... hadn't thought of that, I guess.
John Linn: I have no time to look at this. Can you see if such a fix
fixes the problem?
Steve
> -----Original Message-----
> From: Grant Likely [mailto:glikely@secretlab.ca] On Behalf Of Grant
Likely
> Sent: Monday, June 30, 2008 9:34 AM
> To: Stephen Neuendorffer
> Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
> Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
> =
> Stephen Neuendorffer wrote:
> > Grant Likely wrote:
> > > > I think the easiest solution is to change the Kconfig so that
> > > > PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX. I've
done this
> > > > in my tree, but I've been swamped with other things at the
moment, so I
> > > > haven't verified it.
> > >
> > > This is an easy solution, but it is not a good one. Doing so
would
> > > break UDBG on other 405 boards when building multiplatform
kernels.
> > > It would be better to teach legacy serial about the shift and
offset.
> > > Alternately, add code to add_legacy_soc_port() to skip it if the
> > > shift/offset properties are present.
> >
> > Is there really much of a chance of that, given the differences
> > with the bootwrappers? Does anyone care enough about legacy_serial
> > for this to matter? My impression was that legacy serial was not
> > preferred anyway...
> =
> You never know, a single kernel build can be wrapped multiple times,
and
> besides, it is a trivial fix. Just add a test for the presence of
> reg-shift and bail if it is present.
> =
> I don't know much about the history of legacy serial, but I do not
> support adding multiplatform restrictions when not needed.
> legacy_serial may be crusty, but it does have the advantage of
> supporting UDBG which is a useful feature. It may or may not go away.
> =
> Cheers,
> g.
> =
This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.
^ permalink raw reply
* RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.
From: Stephen Neuendorffer @ 2008-06-30 16:48 UTC (permalink / raw)
To: Grant Likely, John Linn; +Cc: linuxppc-dev, git, dwg
In-Reply-To: <20080630163429.GE17916@secretlab.ca>
Ah.. good idea... hadn't thought of that, I guess.
John Linn: I have no time to look at this. Can you see if such a fix
fixes the problem?
Steve
> -----Original Message-----
> From: Grant Likely [mailto:glikely@secretlab.ca] On Behalf Of Grant
Likely
> Sent: Monday, June 30, 2008 9:34 AM
> To: Stephen Neuendorffer
> Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
> Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
> =
> Stephen Neuendorffer wrote:
> > Grant Likely wrote:
> > > > I think the easiest solution is to change the Kconfig so that
> > > > PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX. I've
done this
> > > > in my tree, but I've been swamped with other things at the
moment, so I
> > > > haven't verified it.
> > >
> > > This is an easy solution, but it is not a good one. Doing so
would
> > > break UDBG on other 405 boards when building multiplatform
kernels.
> > > It would be better to teach legacy serial about the shift and
offset.
> > > Alternately, add code to add_legacy_soc_port() to skip it if the
> > > shift/offset properties are present.
> >
> > Is there really much of a chance of that, given the differences
> > with the bootwrappers? Does anyone care enough about legacy_serial
> > for this to matter? My impression was that legacy serial was not
> > preferred anyway...
> =
> You never know, a single kernel build can be wrapped multiple times,
and
> besides, it is a trivial fix. Just add a test for the presence of
> reg-shift and bail if it is present.
> =
> I don't know much about the history of legacy serial, but I do not
> support adding multiplatform restrictions when not needed.
> legacy_serial may be crusty, but it does have the advantage of
> supporting UDBG which is a useful feature. It may or may not go away.
> =
> Cheers,
> g.
> =
This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.
^ permalink raw reply
* Re: MPC83xx ipic problem
From: Segher Boessenkool @ 2008-06-30 16:36 UTC (permalink / raw)
To: André Schwarz; +Cc: Scott Wood, linux-ppc list
In-Reply-To: <4868FCE9.1060103@matrix-vision.de>
> interrupt-map = <0x5800 0 0 1 &ipic 0x30 0x8 -> FPGA @ IRQ0
> 0x6000 0 0 1 &ipic 0x11 0x8 -> miniPCI INTA @
> IRQ1
> 0x6000 0 0 2 &ipic 0x11 0x8>; -> miniPCI INTB @
> IRQ1
>
> Is it legal to use a single irq pin twice ?
The device tree simply describes the hardware; if the hardware
connects both INTXs to the same IPIC interrupt pin, then it is
correct. You'll have to ask a hardware designer whether it is
okay to just tie the two lines together; I believe it is, for
PCI, but you better ask someone who really knows :-)
Segher
^ permalink raw reply
* Re: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.
From: Grant Likely @ 2008-06-30 16:34 UTC (permalink / raw)
To: Stephen Neuendorffer; +Cc: linuxppc-dev, git, dwg
In-Reply-To: <20080630034548.A10A81750069@mail131-sin.bigfish.com>
Stephen Neuendorffer wrote:
> Grant Likely wrote:
> > > I think the easiest solution is to change the Kconfig so that
> > > PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX. I've done this
> > > in my tree, but I've been swamped with other things at the moment, so I
> > > haven't verified it.
> >
> > This is an easy solution, but it is not a good one. Doing so would
> > break UDBG on other 405 boards when building multiplatform kernels.
> > It would be better to teach legacy serial about the shift and offset.
> > Alternately, add code to add_legacy_soc_port() to skip it if the
> > shift/offset properties are present.
>
> Is there really much of a chance of that, given the differences
> with the bootwrappers? Does anyone care enough about legacy_serial
> for this to matter? My impression was that legacy serial was not
> preferred anyway...
You never know, a single kernel build can be wrapped multiple times, and
besides, it is a trivial fix. Just add a test for the presence of
reg-shift and bail if it is present.
I don't know much about the history of legacy serial, but I do not
support adding multiplatform restrictions when not needed.
legacy_serial may be crusty, but it does have the advantage of
supporting UDBG which is a useful feature. It may or may not go away.
Cheers,
g.
^ permalink raw reply
* Re: [PATCH 19/60] microblaze_v4: checksum support
From: Segher Boessenkool @ 2008-06-30 16:25 UTC (permalink / raw)
To: Michal Simek
Cc: linux-arch, Michal Simek, vapier.adi, arnd, matthew,
microblaze-uclinux, linux-kernel, John.Linn, linuxppc-dev, alan,
hpa, drepper, john.williams, will.newton
In-Reply-To: <4117.6640-711-1819091302-1214810290@seznam.cz>
> you find bug because there is microblaze asm code in generic folder.
No, I found it because I was reading the code, I didn't even notice
this was in asm-generic :-)
> Big thanks. I'll fix it and I'll look at parameters too.
Thanks.
Segher
^ permalink raw reply
* Re: [POWERPC] mpc7448hpc2.dts: remove chosen node from dts
From: Segher Boessenkool @ 2008-06-30 16:22 UTC (permalink / raw)
To: chunbo.luo; +Cc: linuxppc-dev
In-Reply-To: <1214795032.9125.7.camel@pek-cluo>
> Modern versions of u-boot create a chosen node automatically. So if
> we set the chosen node in the dts file, there will be 2 chosen nodes
> passed in to the kernel,
That's a bug in uboot, then: when it creates a property, it should
delete an already existing property with the same name in that node.
> and the kernel command line will be taken from
> the wrong node. So, remove the extra chosen node from the dts file.
This will cause a regression for people using an older version of
uboot. No idea how important that is.
Segher
^ permalink raw reply
* Re: [PATCH v2] powerpc/bootwrapper: Add documentation of boot wrapper targets
From: Grant Likely @ 2008-06-30 16:15 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, john.linn
In-Reply-To: <18536.26913.342478.867665@cargo.ozlabs.ibm.com>
On Mon, Jun 30, 2008 at 03:03:29PM +1000, Paul Mackerras wrote:
> Grant Likely writes:
> > +simpleboot-*)
> > + platformo="$object/simpleboot.o"
> > + binary=y
> > + ;;
> > esac
>
> Evidently your patch does more than just "Add documentation"...
Ugh.
While writing the documentation, I noticed that part of the simpleboot
target was missing. I fixed it and made a mental note to either split
it off into a separate patch or document the change better...
Apparently my mental notes need tuning.
Sorry, I'll split it off and repost.
Cheers,
g.
^ permalink raw reply
* [PATCH V3] Keep 3 high personality bytes across exec
From: Eric Munson @ 2008-06-30 16:12 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Eric Munson, linux-kernel
In-Reply-To: <20080628000813.GA19960@us.ibm.com>
Currently when a 32 bit process is exec'd on a powerpc 64 bit host the value
in the top three bytes of the personality is clobbered. This patch adds a
check in the SET_PERSONALITY macro that will carry all the values in the top
three bytes across the exec.
These three bytes currently carry flags to disable address randomisation,
limit the address space, force zeroing of an mmapped page, etc. Should an
application set any of these bits they will be maintained and honoured on
homogeneous environment but discarded and ignored on a heterogeneous
environment. So if an application requires all mmapped pages to be initialised
to zero and a wrapper is used to setup the personality and exec the target,
these flags will remain set on an all 32 or all 64 bit envrionment, but they
will be lost in the exec on a mixed 32/64 bit environment. Losing these bits
means that the same application would behave differently in different
environments. Tested on a POWER5+ machine with 64bit kernel and a mixed
64/32 bit user space.
Signed-off-by: Eric B Munson <ebmunson@us.ibm.com>
---
V3
Based on 2.6.26-rc8
Changes from V2:
Use ~PER_MASK instead of PER_INHERIT
Remove PER_INHERIT
Rebase to 2.6.26-rc8
Changes from V1:
Updated changelog with a better description of why this change is useful
include/asm-powerpc/elf.h | 3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/include/asm-powerpc/elf.h b/include/asm-powerpc/elf.h
index 9080d85..5eee73e 100644
--- a/include/asm-powerpc/elf.h
+++ b/include/asm-powerpc/elf.h
@@ -257,7 +257,8 @@ do { \
else \
clear_thread_flag(TIF_ABI_PENDING); \
if (personality(current->personality) != PER_LINUX32) \
- set_personality(PER_LINUX); \
+ set_personality(PER_LINUX | \
+ (current->personality & (~PER_MASK))); \
} while (0)
/*
* An executable for which elf_read_implies_exec() returns TRUE will
--
1.5.6.1
^ permalink raw reply related
* Re: [PATCH v2] update crypto node definition and device tree instances
From: Kim Phillips @ 2008-06-30 16:04 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: linuxppc-dev
In-Reply-To: <2b97f7566925ed86b78b364ff5724644@kernel.crashing.org>
On Sun, 29 Jun 2008 01:37:12 +0200
Segher Boessenkool <segher@kernel.crashing.org> wrote:
> > I'm really don't like "fsl,sec1.0" or any of the variants as a
> > compatible property either because it can easily be abused (it's not
> > anchored to a specific physical part so the meaning can shift over
> > time); but that is another argument and it is well documented in other
> > email threads
> > (http://thread.gmane.org/gmane.linux.ports.ppc64.devel/38977/
> > focus=39147)
>
> Also, these made-up names make you do more work: you'll need to
who said they were made up?
> write up a binding for them, explaining exactly what a 1.0 device
> etc. is (or at least point to documentation for it). If you use
> a name that refers to some device that people can easily google
> for documentation, you can skip this (well, you might need to
> write a binding anyway; but at least you won't have to explain
> what the device _is_).
documentation is available in the usual places, and it specifically
points out which SEC version it references. Plus, as I mentioned
before, a lot of the differences between the SEC versions are miniscule
feature bits scattered across the programming model.
> Using actual model names also reduces the namespace pollution
> (hopefully Freescale will not create some other MPC8272 device
> ever, so "fsl,mpc8272-whatever" will never be a nice name to
> use for any other device; OTOH, it's likely that Freescale will
> create some other device called "SEC" (there are only so many
> TLAs, after all), so "fsl,sec-n.m" isn't as future-proof.
I doubt that; the SEC has been around for about a decade now and that
hasn't happened. The SEC is on par with the TSEC ethernet controller
as far as this goes.
Kim
^ permalink raw reply
* Re: [PATCH V2] Keep 3 high personality bytes across exec
From: Eric B Munson @ 2008-06-30 15:56 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <18536.38684.384039.662264@cargo.ozlabs.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 921 bytes --]
On Mon, 30 Jun 2008, Paul Mackerras wrote:
> Eric B Munson writes:
>
> > --- a/include/asm-powerpc/elf.h
> > +++ b/include/asm-powerpc/elf.h
> > @@ -257,7 +257,8 @@ do { \
> > else \
> > clear_thread_flag(TIF_ABI_PENDING); \
> > if (personality(current->personality) != PER_LINUX32) \
> > - set_personality(PER_LINUX); \
> > + set_personality(PER_LINUX | \
> > + (current->personality & PER_INHERIT)); \
>
> Couldn't we use ~PER_MASK here instead of PER_INHERIT? That would
> mean we wouldn't have to modify include/linux/personality.h, and we
> wouldn't have to keep updating PER_INHERIT as more flags get added.
>
> (Nice patch description, BTW. Thanks.)
>
> Paul.
>
Yeah, ~PER_MASK will work fine. I used PER_INHERIT first because I
was not sure if there were values that should not be carried forward.
I will have an updated patch out shortly.
Eric
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 189 bytes --]
^ permalink raw reply
* Re: [PATCH v2] update crypto node definition and device tree instances
From: Kim Phillips @ 2008-06-30 15:56 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40806272229s795067d5he962c8a1750a260@mail.gmail.com>
On Fri, 27 Jun 2008 22:29:59 -0700
"Grant Likely" <grant.likely@secretlab.ca> wrote:
> On Fri, Jun 27, 2008 at 9:52 AM, Kim Phillips
> <kim.phillips@freescale.com> wrote:
> > delete obsolete device-type property, delete model property
> > (use compatible property instead), prepend "fsl," to Freescale
> > specific properties. Add nodes to device trees that are missing them,
> > and fix broken property values in other trees.
> >
> > Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
>
> Are there any drivers in mainline which use this node? Do these
there's one sitting on kernel.org's cryptodev-2.6 tree.
> changes break backwards compatibility with already deployed boards?
> (I know; this patch doesn't change any code; but I'm asking whether
> the driver will need to support both old and new bindings).
Since the driver won't go in until 2.6.27 (and hopefully this patch),
I'm guessing no. There are out-of-tree drivers that will need to be
updated to handle the new bindings, however.
> > ---
> > diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
> > index 46e2da3..9a3881d 100644
> > --- a/arch/powerpc/boot/dts/mpc8272ads.dts
> > +++ b/arch/powerpc/boot/dts/mpc8272ads.dts
> > @@ -226,22 +226,15 @@
> > compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
> > };
> >
> > -/* May need to remove if on a part without crypto engine */
> > crypto@30000 {
> > - device_type = "crypto";
> > - model = "SEC2";
> > - compatible = "fsl,mpc8272-talitos-sec2",
> > - "fsl,talitos-sec2",
> > - "fsl,talitos",
> > - "talitos";
> > + compatible = "fsl,sec1.0";
>
> Should really be encoding the SoC model in the compatible property.
> At the very least, compatible should be:
> compatible = "fsl,mpc8272-sec", "fsl,sec1.0";
>
> I'm really don't like "fsl,sec1.0" or any of the variants as a
> compatible property either because it can easily be abused (it's not
> anchored to a specific physical part so the meaning can shift over
> time); but that is another argument and it is well documented in other
> email threads (http://thread.gmane.org/gmane.linux.ports.ppc64.devel/38977/focus=39147)
I don't follow - afaict, the thread you are referring to had a
more generic name (no version number for the device). Meanwhile, the
"fsl,secX.Y" designation /is/ anchored to one or more specific parts
and thus its meaning will not shift over time. In fact, different
revisions of the mpc834x have different revisions of the SEC device
(the node gets up-revved in u-boot), so compatible = "fsl,mpc8349-sec"
is, in fact, ambiguous.
Kim
^ permalink raw reply
* RE: [PATCH]: [MPC5200] (v2) Add ATA DMA support
From: Daniel Schnell @ 2008-06-30 15:40 UTC (permalink / raw)
To: Tim Yamin, linuxppc-dev
In-Reply-To: <792f5f410806270544p69c773b9o9df4a5618d4babe1@mail.gmail.com>
Hi,
Against which kernel is this patch against ?
Regards,
Daniel.
Tim Yamin wrote:
> Changes from previous version:
>=20
> - Add FIFO status error checking code before a DMA transaction starts
> and after it is completed.=20
> - Fix an incorrect check in the previous patch causing spurious "dma
> table too small" errors.=20
>=20
> Tim
^ permalink raw reply
* [PATCH] [V2] powerpc: Xilinx: PS2: Added new XPS PS2 driver
From: John Linn @ 2008-06-30 15:38 UTC (permalink / raw)
To: linuxppc-dev, linux-input; +Cc: Sadanand, John Linn
Added a new driver for Xilinx XPS PS2 IP. This driver is
a flat driver to better match the Linux driver pattern.
Signed-off-by: Sadanand <sadanan@xilinx.com>
Signed-off-by: John Linn <john.linn@xilinx.com>
---
V2
Changes from v1:
Ran the scripts/checkpatch.pl on the patch as I should have done
before sending it (thanks to Stephen).
drivers/input/serio/Kconfig | 5 +
drivers/input/serio/Makefile | 1 +
drivers/input/serio/xilinx_ps2.c | 460 ++++++++++++++++++++++++++++++++++++++
drivers/input/serio/xilinx_ps2.h | 97 ++++++++
4 files changed, 563 insertions(+), 0 deletions(-)
create mode 100644 drivers/input/serio/xilinx_ps2.c
create mode 100644 drivers/input/serio/xilinx_ps2.h
diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index ec4b661..0e62b39 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -190,4 +190,9 @@ config SERIO_RAW
To compile this driver as a module, choose M here: the
module will be called serio_raw.
+config SERIO_XILINX_XPS_PS2
+ tristate "Xilinx XPS PS/2 Controller Support"
+ help
+ This driver supports XPS PS/2 IP from Xilinx EDK.
+
endif
diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
index 38b8868..9b6c813 100644
--- a/drivers/input/serio/Makefile
+++ b/drivers/input/serio/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_SERIO_PCIPS2) += pcips2.o
obj-$(CONFIG_SERIO_MACEPS2) += maceps2.o
obj-$(CONFIG_SERIO_LIBPS2) += libps2.o
obj-$(CONFIG_SERIO_RAW) += serio_raw.o
+obj-$(CONFIG_SERIO_XILINX_XPS_PS2) += xilinx_ps2.o
diff --git a/drivers/input/serio/xilinx_ps2.c b/drivers/input/serio/xilinx_ps2.c
new file mode 100644
index 0000000..d368827
--- /dev/null
+++ b/drivers/input/serio/xilinx_ps2.c
@@ -0,0 +1,460 @@
+/*
+ * xilinx_ps2.c
+ *
+ * Xilinx PS/2 driver to interface PS/2 component to Linux
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * (c) 2005 MontaVista Software, Inc.
+ * (c) 2008 Xilinx Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/module.h>
+#include <linux/serio.h>
+#include <linux/interrupt.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/io.h>
+
+#ifdef CONFIG_OF /* For open firmware */
+ #include <linux/of_device.h>
+ #include <linux/of_platform.h>
+#endif /* CONFIG_OF */
+
+#include "xilinx_ps2.h"
+
+#define DRIVER_NAME "xilinx_ps2"
+#define DRIVER_DESCRIPTION "Xilinx XPS PS/2 driver"
+
+#define XPS2_NAME_DESC "Xilinx XPS PS/2 Port #%d"
+#define XPS2_PHYS_DESC "xilinxps2/serio%d"
+
+
+static DECLARE_MUTEX(cfg_sem);
+
+/*********************/
+/* Interrupt handler */
+/*********************/
+static irqreturn_t xps2_interrupt(int irq, void *dev_id)
+{
+ struct xps2data *drvdata = (struct xps2data *)dev_id;
+ u32 intr_sr;
+ u32 ier;
+ u8 c;
+ u8 retval;
+
+ /* Get the PS/2 interrupts and clear them */
+ intr_sr = in_be32(drvdata->base_address + XPS2_IPISR_OFFSET);
+ out_be32(drvdata->base_address + XPS2_IPISR_OFFSET, intr_sr);
+
+ /* Check which interrupt is active */
+ if (intr_sr & XPS2_IPIXR_RX_OVF)
+ printk(KERN_ERR "%s: receive overrun error\n",
+ drvdata->serio.name);
+
+ if (intr_sr & XPS2_IPIXR_RX_ERR)
+ drvdata->dfl |= SERIO_PARITY;
+
+ if (intr_sr & (XPS2_IPIXR_TX_NOACK | XPS2_IPIXR_WDT_TOUT))
+ drvdata->dfl |= SERIO_TIMEOUT;
+
+ if (intr_sr & XPS2_IPIXR_RX_FULL) {
+ retval = xps2_recv(drvdata, &drvdata->rxb);
+
+ /* Error, if 1 byte is not received */
+ if (retval != 1)
+ printk(KERN_ERR
+ "%s: wrong rcvd byte count (%d)\n",
+ drvdata->serio.name, retval);
+ c = drvdata->rxb;
+ serio_interrupt(&drvdata->serio, c, drvdata->dfl);
+ drvdata->dfl = 0;
+ }
+
+ if (intr_sr & XPS2_IPIXR_TX_ACK) {
+
+ /* Disable the TX interrupts after the transmission is
+ * complete */
+ ier = in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
+ ier &= (~(XPS2_IPIXR_TX_ACK & XPS2_IPIXR_ALL));
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
+ drvdata->dfl = 0;
+ }
+
+ return IRQ_HANDLED;
+}
+
+/*******************/
+/* serio callbacks */
+/*******************/
+
+/*
+ * sxps2_write() sends a byte out through the PS/2 interface.
+ *
+ * The sole purpose of drvdata->tx_end is to prevent the driver
+ * from locking up in the do {} while; loop when nothing is connected
+ * to the given PS/2 port. That's why we do not try to recover
+ * from the transmission failure.
+ * drvdata->tx_end needs not to be initialized to some "far in the
+ * future" value, as the very first attempt to xps2_send() a byte
+ * is always successful, and drvdata->tx_end will be set to a proper
+ * value at that moment - before the 1st use in the comparison.
+ */
+static int sxps2_write(struct serio *pserio, unsigned char c)
+{
+ struct xps2data *drvdata = pserio->port_data;
+ unsigned long flags;
+ int retval;
+
+ do {
+ spin_lock_irqsave(&drvdata->lock, flags);
+ retval = xps2_send(drvdata, &c);
+ spin_unlock_irqrestore(&drvdata->lock, flags);
+
+ if (retval == 1) {
+ drvdata->tx_end = jiffies + HZ;
+ return 0; /* success */
+ }
+ } while (!time_after(jiffies, drvdata->tx_end));
+
+ return 1; /* transmission is frozen */
+}
+
+/*
+ * sxps2_open() is called when a port is open by the higher layer.
+ */
+static int sxps2_open(struct serio *pserio)
+{
+ struct xps2data *drvdata = pserio->port_data;
+ int retval;
+
+ retval = request_irq(drvdata->irq, &xps2_interrupt, 0,
+ DRIVER_NAME, drvdata);
+ if (retval) {
+ printk(KERN_ERR
+ "%s: Couldn't allocate interrupt %d\n",
+ drvdata->serio.name, drvdata->irq);
+ return retval;
+ }
+
+ /* start reception by enabling the interrupts */
+ out_be32(drvdata->base_address + XPS2_GIER_OFFSET, XPS2_GIER_GIE_MASK);
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, XPS2_IPIXR_RX_ALL);
+ (void)xps2_recv(drvdata, &drvdata->rxb);
+
+ return 0; /* success */
+}
+
+/*
+ * sxps2_close() frees the interrupt.
+ */
+static void sxps2_close(struct serio *pserio)
+{
+ struct xps2data *drvdata = pserio->port_data;
+
+ /* Disable the PS2 interrupts */
+ out_be32(drvdata->base_address + XPS2_GIER_OFFSET, 0x00);
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0x00);
+ free_irq(drvdata->irq, drvdata);
+}
+
+/*************************/
+/* XPS PS/2 driver calls */
+/*************************/
+
+/*
+ * xps2_initialize() initializes the Xilinx PS/2 device.
+ */
+static int xps2_initialize(struct xps2data *drvdata)
+{
+ /* Disable all the interrupts just in case */
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0);
+
+ /* Reset the PS2 device and abort any current transaction, to make sure
+ * we have the PS2 in a good state */
+ out_be32(drvdata->base_address + XPS2_SRST_OFFSET, XPS2_SRST_RESET);
+
+ return 0;
+}
+
+/*
+ * xps2_send() sends the specified byte of data to the PS/2 port in interrupt
+ * mode.
+ */
+static u8 xps2_send(struct xps2data *drvdata, u8 *byte)
+{
+ u32 sr;
+ u32 ier;
+ u8 retval = 0;
+
+ /* Enter a critical region by disabling the PS/2 transmit interrupts to
+ * allow this call to stop a previous operation that may be interrupt
+ * driven. Only stop the transmit interrupt since this critical region
+ * is not really exited in the normal manner */
+ ier = in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
+ ier &= (~(XPS2_IPIXR_TX_ALL & XPS2_IPIXR_ALL));
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
+
+ /* If the PS/2 transmitter is empty send a byte of data */
+ sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
+ if ((sr & XPS2_STATUS_TX_FULL) == 0) {
+ out_be32(drvdata->base_address + XPS2_TX_DATA_OFFSET, *byte);
+ retval = 1;
+ }
+
+ /* Enable the TX interrupts to track the status of the transmission */
+ ier = in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
+ ier |= ((XPS2_IPIXR_TX_ALL | XPS2_IPIXR_WDT_TOUT));
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
+
+ return retval; /* no. of bytes sent */
+}
+
+/*
+ * xps2_recv() will attempt to receive a byte of data from the PS/2 port.
+ */
+static u8 xps2_recv(struct xps2data *drvdata, u8 *byte)
+{
+ u32 sr;
+ u8 retval = 0;
+
+ /* If there is data available in the PS/2 receiver, read it */
+ sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
+ if (sr & XPS2_STATUS_RX_FULL) {
+ *byte = in_be32(drvdata->base_address + XPS2_RX_DATA_OFFSET);
+ retval = 1;
+ }
+
+ return retval; /* no. of bytes received */
+}
+
+/******************************/
+/* The platform device driver */
+/******************************/
+
+static int xps2_probe(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+
+ struct resource *irq_res = NULL; /* Interrupt resources */
+ struct resource *regs_res = NULL; /* IO mem resources */
+
+ if (!dev) {
+ dev_err(dev, "Probe called with NULL param\n");
+ return -EINVAL;
+ }
+
+ /* Find irq number, map the control registers in */
+ irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ return xps2_setup(dev, pdev->id, regs_res, irq_res);
+}
+
+/*
+ * Shared device initialization code.
+ */
+static int xps2_setup(struct device *dev, int id, struct resource *regs_res,
+ struct resource *irq_res)
+{
+ struct xps2data *drvdata;
+ unsigned long remap_size;
+ int retval;
+
+ if (!dev)
+ return -EINVAL;
+
+ drvdata = kzalloc(sizeof(struct xps2data), GFP_KERNEL);
+ if (!drvdata) {
+ dev_err(dev, "Couldn't allocate device private record\n");
+ return -ENOMEM;
+ }
+ spin_lock_init(&drvdata->lock);
+ dev_set_drvdata(dev, (void *)drvdata);
+
+ if (!regs_res || !irq_res) {
+ dev_err(dev, "IO resource(s) not found\n");
+ retval = -EFAULT;
+ goto failed1;
+ }
+
+ drvdata->irq = irq_res->start;
+ remap_size = regs_res->end - regs_res->start + 1;
+ if (!request_mem_region(regs_res->start, remap_size, DRIVER_NAME)) {
+
+ dev_err(dev, "Couldn't lock memory region at 0x%08X\n",
+ (unsigned int)regs_res->start);
+ retval = -EBUSY;
+ goto failed1;
+ }
+
+ /* Fill in configuration data and add them to the list */
+ drvdata->phys_addr = regs_res->start;
+ drvdata->remap_size = remap_size;
+ drvdata->base_address = ioremap(regs_res->start, remap_size);
+ if (drvdata->base_address == NULL) {
+
+ dev_err(dev, "Couldn't ioremap memory at 0x%08X\n",
+ (unsigned int)regs_res->start);
+ retval = -EFAULT;
+ goto failed2;
+ }
+
+ /* Initialize the PS/2 interface */
+ down(&cfg_sem);
+ if (xps2_initialize(drvdata)) {
+ up(&cfg_sem);
+ dev_err(dev, "Could not initialize device\n");
+ retval = -ENODEV;
+ goto failed3;
+ }
+ up(&cfg_sem);
+
+ dev_info(dev, "Xilinx PS2 at 0x%08X mapped to 0x%08X, irq=%d\n",
+ drvdata->phys_addr, (u32)drvdata->base_address, drvdata->irq);
+
+ drvdata->serio.id.type = SERIO_8042;
+ drvdata->serio.write = sxps2_write;
+ drvdata->serio.open = sxps2_open;
+ drvdata->serio.close = sxps2_close;
+ drvdata->serio.port_data = drvdata;
+ drvdata->serio.dev.parent = dev;
+ snprintf(drvdata->serio.name, sizeof(drvdata->serio.name),
+ XPS2_NAME_DESC, id);
+ snprintf(drvdata->serio.phys, sizeof(drvdata->serio.phys),
+ XPS2_PHYS_DESC, id);
+ serio_register_port(&drvdata->serio);
+
+ return 0; /* success */
+
+failed3:
+ iounmap(drvdata->base_address);
+
+failed2:
+ release_mem_region(regs_res->start, remap_size);
+
+failed1:
+ kfree(drvdata);
+ dev_set_drvdata(dev, NULL);
+
+ return retval;
+}
+
+/*
+ * xps2_remove() dissociates the driver with the Xilinx PS/2 device.
+ */
+static int xps2_remove(struct device *dev)
+{
+ struct xps2data *drvdata;
+
+ if (!dev)
+ return -EINVAL;
+
+ drvdata = (struct xps2data *)dev_get_drvdata(dev);
+
+ serio_unregister_port(&drvdata->serio);
+
+ iounmap(drvdata->base_address);
+
+ release_mem_region(drvdata->phys_addr, drvdata->remap_size);
+
+ kfree(drvdata);
+ dev_set_drvdata(dev, NULL);
+
+ return 0; /* success */
+}
+
+static struct device_driver xps2_driver = {
+ .name = DRIVER_NAME,
+ .bus = &platform_bus_type,
+ .probe = xps2_probe,
+ .remove = xps2_remove
+};
+
+#ifdef CONFIG_OF
+static int __devinit xps2_of_probe(struct of_device *ofdev,
+ const struct of_device_id *match)
+{
+ struct resource r_irq_struct;
+ struct resource r_mem_struct;
+ struct resource *r_irq = &r_irq_struct; /* Interrupt resources */
+ struct resource *r_mem = &r_mem_struct; /* IO mem resources */
+ int rc = 0;
+ const unsigned int *id;
+
+ printk(KERN_INFO "Device Tree Probing \'%s\'\n",
+ ofdev->node->name);
+
+ /* Get iospace for the device */
+ rc = of_address_to_resource(ofdev->node, 0, r_mem);
+ if (rc) {
+ dev_warn(&ofdev->dev, "invalid address\n");
+ return rc;
+ }
+
+ /* Get IRQ for the device */
+ rc = of_irq_to_resource(ofdev->node, 0, r_irq);
+ if (rc == NO_IRQ) {
+ dev_warn(&ofdev->dev, "no IRQ found\n");
+ return rc;
+ }
+
+ id = of_get_property(ofdev->node, "port-number", NULL);
+ return xps2_setup(&ofdev->dev, id ? *id : -1, r_mem, r_irq);
+}
+
+static int __devexit xps2_of_remove(struct of_device *dev)
+{
+ return xps2_remove(&dev->dev);
+}
+
+static struct of_device_id __devinitdata xps2_of_match[] = {
+ { .compatible = "xlnx,xps-ps2-1.00.a", },
+ { /* end of list */ },
+};
+
+MODULE_DEVICE_TABLE(of, xps2_of_match);
+
+static struct of_platform_driver xps2_of_driver = {
+ .name = DRIVER_NAME,
+ .match_table = xps2_of_match,
+ .probe = xps2_of_probe,
+ .remove = __devexit_p(xps2_of_remove),
+};
+#endif /* CONFIG_OF */
+
+static int __init xps2_init(void)
+{
+ int status = driver_register(&xps2_driver);
+#ifdef CONFIG_OF
+ status |= of_register_platform_driver(&xps2_of_driver);
+#endif /* CONFIG_OF */
+ return status;
+}
+
+static void __exit xps2_cleanup(void)
+{
+ driver_unregister(&xps2_driver);
+#ifdef CONFIG_OF
+ of_unregister_platform_driver(&xps2_of_driver);
+#endif /* CONFIG_OF */
+}
+
+module_init(xps2_init);
+module_exit(xps2_cleanup);
+
+MODULE_AUTHOR("Xilinx, Inc.");
+MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
+MODULE_LICENSE("GPL");
+
diff --git a/drivers/input/serio/xilinx_ps2.h b/drivers/input/serio/xilinx_ps2.h
new file mode 100644
index 0000000..4db73ca
--- /dev/null
+++ b/drivers/input/serio/xilinx_ps2.h
@@ -0,0 +1,97 @@
+/*****************************************************************************
+ *
+ * Author: Xilinx, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
+ * AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
+ * SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
+ * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
+ * APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
+ * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
+ * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
+ * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
+ * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
+ * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
+ * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
+ * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE.
+ *
+ * Xilinx products are not intended for use in life support appliances,
+ * devices, or systems. Use in such applications is expressly prohibited.
+ *
+ * (c) Copyright 2008 Xilinx Inc.
+ * All rights reserved.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *****************************************************************************/
+
+#ifndef XILINX_PS2_H_ /* prevent circular inclusions */
+#define XILINX_PS2_H_ /* by using protection macros */
+
+/* Register offsets for the xps2 device */
+#define XPS2_SRST_OFFSET 0x00000000 /* Software Reset register */
+#define XPS2_STATUS_OFFSET 0x00000004 /* Status register */
+#define XPS2_RX_DATA_OFFSET 0x00000008 /* Receive Data register */
+#define XPS2_TX_DATA_OFFSET 0x0000000C /* Transmit Data register */
+#define XPS2_GIER_OFFSET 0x0000002C /* Global Interrupt Enable reg */
+#define XPS2_IPISR_OFFSET 0x00000030 /* Interrupt Status register */
+#define XPS2_IPIER_OFFSET 0x00000038 /* Interrupt Enable register */
+
+/* Reset Register Bit Definitions */
+#define XPS2_SRST_RESET 0x0000000A /* Software Reset */
+
+/* Status Register Bit Positions */
+#define XPS2_STATUS_RX_FULL 0x00000001 /* Receive Full */
+#define XPS2_STATUS_TX_FULL 0x00000002 /* Transmit Full */
+
+/* Bit definitions for ISR/IER registers. Both the registers have the same bit
+ * definitions and are only defined once. */
+#define XPS2_IPIXR_WDT_TOUT 0x00000001 /* Watchdog Timeout Interrupt */
+#define XPS2_IPIXR_TX_NOACK 0x00000002 /* Transmit No ACK Interrupt */
+#define XPS2_IPIXR_TX_ACK 0x00000004 /* Transmit ACK (Data) Interrupt */
+#define XPS2_IPIXR_RX_OVF 0x00000008 /* Receive Overflow Interrupt */
+#define XPS2_IPIXR_RX_ERR 0x00000010 /* Receive Error Interrupt */
+#define XPS2_IPIXR_RX_FULL 0x00000020 /* Receive Data Interrupt */
+
+/* Mask for all the Transmit Interrupts */
+#define XPS2_IPIXR_TX_ALL (XPS2_IPIXR_TX_NOACK | XPS2_IPIXR_TX_ACK)
+
+/* Mask for all the Receive Interrupts */
+#define XPS2_IPIXR_RX_ALL (XPS2_IPIXR_RX_OVF | XPS2_IPIXR_RX_ERR | \
+ XPS2_IPIXR_RX_FULL)
+
+/* Mask for all the Interrupts */
+#define XPS2_IPIXR_ALL (XPS2_IPIXR_TX_ALL | XPS2_IPIXR_RX_ALL | \
+ XPS2_IPIXR_WDT_TOUT)
+
+/* Global Interrupt Enable mask */
+#define XPS2_GIER_GIE_MASK 0x80000000
+
+struct xps2data {
+ int irq;
+ u32 phys_addr;
+ u32 remap_size;
+ spinlock_t lock;
+ u8 rxb; /* Rx buffer */
+ void __iomem *base_address; /* virt. address of control registers */
+ unsigned long tx_end;
+ unsigned int dfl;
+ struct serio serio; /* serio */
+};
+
+static u8 xps2_send(struct xps2data *drvdata, u8 *buffer_ptr);
+static u8 xps2_recv(struct xps2data *drvdata, u8 *buffer_ptr);
+static int xps2_initialize(struct xps2data *drvdata);
+static int xps2_setup(struct device *dev, int id, struct resource *regs_res,
+ struct resource *irq_res);
+
+#endif /* end of protection macro */
+
--
1.5.2.1
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply related
* Re: [PATCH v2] powerpc: Add dma nodes to 83xx, 85xx and 86xx boards
From: Kumar Gala @ 2008-06-30 15:38 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev@ozlabs.org list, Timur Tabi
In-Reply-To: <20080630153513.GD13950@loki.buserror.net>
On Jun 30, 2008, at 10:35 AM, Scott Wood wrote:
> On Mon, Jun 30, 2008 at 02:15:25PM +1000, David Gibson wrote:
>> On Fri, Jun 27, 2008 at 04:10:17PM -0500, Kumar Gala wrote:
>>> Added DMA nodes for the elo/elo-plus DMA engines.
>>>
>>> Renamed the interrupt controller alias in mpc832x_rdb.dts to ipic
>>> so that
>>> its the same as all the other boards.
>>>
>>> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
>>
>> [snip]
>>> diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/
>>> powerpc/boot/dts/asp834x-redboot.dts
>>> index 972cf78..8b1bb0e 100644
>>> --- a/arch/powerpc/boot/dts/asp834x-redboot.dts
>>> +++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
>>> @@ -118,6 +118,41 @@
>>> mode = "cpu";
>>> };
>>>
>>> + dma@82a8 {
>>> + #address-cells = <1>;
>>> + #size-cells = <1>;
>>> + compatible = "fsl,mpc8347-dma", "fsl,elo-dma";
>>> + reg = <0x82a8 4>;
>>> + ranges = <0 0x8100 0x1a8>;
>>> + interrupt-parent = <&ipic>;
>>> + interrupts = <71 8>;
>>> + cell-index = <0>;
>>
>> What's the cell-index in these nodes used to index? Given the
>> confusion there's been about the proper use of this property, a
>> comment indicating which shared registers this is used to index is
>> probably a good idea.
>
> There's supposed to be a cell-index in the *channels* to index into
> the
> shared summary register (the "reg" of the dma node itself). I don't
> see any
> purpose for a cell-index in the main dma node, though.
I believe this comes into play when we have more than one DMA
controller and sometimes there are special uses like on 8610.
- k
^ permalink raw reply
* Re: [PATCH v2] powerpc: Add dma nodes to 83xx, 85xx and 86xx boards
From: Scott Wood @ 2008-06-30 15:35 UTC (permalink / raw)
To: Kumar Gala, linuxppc-dev
In-Reply-To: <20080630041525.GD24012@yookeroo.seuss>
On Mon, Jun 30, 2008 at 02:15:25PM +1000, David Gibson wrote:
> On Fri, Jun 27, 2008 at 04:10:17PM -0500, Kumar Gala wrote:
> > Added DMA nodes for the elo/elo-plus DMA engines.
> >
> > Renamed the interrupt controller alias in mpc832x_rdb.dts to ipic so that
> > its the same as all the other boards.
> >
> > Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
>
> [snip]
> > diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
> > index 972cf78..8b1bb0e 100644
> > --- a/arch/powerpc/boot/dts/asp834x-redboot.dts
> > +++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
> > @@ -118,6 +118,41 @@
> > mode = "cpu";
> > };
> >
> > + dma@82a8 {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + compatible = "fsl,mpc8347-dma", "fsl,elo-dma";
> > + reg = <0x82a8 4>;
> > + ranges = <0 0x8100 0x1a8>;
> > + interrupt-parent = <&ipic>;
> > + interrupts = <71 8>;
> > + cell-index = <0>;
>
> What's the cell-index in these nodes used to index? Given the
> confusion there's been about the proper use of this property, a
> comment indicating which shared registers this is used to index is
> probably a good idea.
There's supposed to be a cell-index in the *channels* to index into the
shared summary register (the "reg" of the dma node itself). I don't see any
purpose for a cell-index in the main dma node, though.
-Scott
^ permalink raw reply
* MPC83xx ipic problem
From: André Schwarz @ 2008-06-30 15:34 UTC (permalink / raw)
To: Scott Wood; +Cc: linux-ppc list
Scott,
actually I'm having trouble with my PCI interrupts.
We are running 2.6.26-rc6 on a MPC8343 based board.
There are two external PCI devices connected (FPGA + miniPCI socket).
The FPGA is working fine and uses IRQ0 for its PCI_INTA line.
As soon there's a miniPCI module present and the driver loaded (actually=20
an ath5k WiFi module) the system complains after a while :
irq 48: nobody cared
handlers: .... location of the FPGA irq handler
Disabling IRQ #48
-> This is weird since the FPGA isn't working at all and IRQ0 is *not*=20
asserted !
Of course the miniPCI irq is routed to a different pin on the CPU=20
(IRQ1). Having a look at the irq count it's obvious that the WiFi irqs=20
are handled (ath module). The FPGA irq handler is located in the=20
"mvbcdma0" module which is running rock solid without miniPCI present !
mvBL-M7> cat /proc/interrupts
CPU0
16: 1826 IPIC Level i2c-mpc
17: 9 IPIC Level i2c-mpc
18: 201 IPIC Level ath
19: 2896 IPIC Level serial
21: 0 IPIC Level mpc83xx_spi
32: 2 IPIC Level enet_tx
33: 257 IPIC Level enet_rx
34: 0 IPIC Level enet_error
48: 100000 IPIC Level mvbcdma0
BAD: 0
The irq mapping insides the dts :
interrupt-map =3D <0x5800 0 0 1 &ipic 0x30 0x8 -> FPGA @ IRQ0
0x6000 0 0 1 &ipic 0x11 0x8 -> miniPCI INTA @ IRQ1
0x6000 0 0 2 &ipic 0x11 0x8>; -> miniPCI INTB @ IRQ1
Is it legal to use a single irq pin twice ?
After all the ath5k doesn't use/assert the INTB line at all ...
If I do all the above after removing the FPGA module and releasing irq48=20
the system doesn't complain anymore ... but hangs after a while with the=20
IRQ1 line being unserviced.
What do you think ?
Any hints ?
Am I doing anything obviously wrong ?
regards,
Andr=E9
MATRIX VISION GmbH, Talstra=DFe 16, DE-71570 Oppenweiler - Registergeric=
ht: Amtsgericht Stuttgart, HRB 271090
Gesch=E4ftsf=FChrer: Gerhard Thullner, Werner Armingeon, Uwe Furtner
^ permalink raw reply
* RE: [PATCH] powerpc: Xilinx: PS2: Added new XPS PS2 driver
From: John Linn @ 2008-06-30 14:46 UTC (permalink / raw)
To: Peter Korsgaard; +Cc: linuxppc-dev, Sadanand Mutyala
In-Reply-To: <87y74ndlsf.fsf@macbook.be.48ers.dk>
Thanks Peter, will do.
-----Original Message-----
From: Peter Korsgaard [mailto:jacmet@gmail.com] On Behalf Of Peter
Korsgaard
Sent: Monday, June 30, 2008 8:45 AM
To: John Linn
Cc: linuxppc-dev@ozlabs.org; Sadanand Mutyala
Subject: Re: [PATCH] powerpc: Xilinx: PS2: Added new XPS PS2 driver
>>>>> "John" =3D=3D John Linn <john.linn@xilinx.com> writes:
> Added a new driver for Xilinx XPS PS2 IP. This driver is
> a flat driver to better match the Linux driver pattern.
This should probably go to the linux-input@ list as well.
> Signed-off-by: Sadanand <sadanan@xilinx.com>
> Signed-off-by: John Linn <john.linn@xilinx.com>
> ---
> drivers/input/serio/Kconfig | 5 +
> drivers/input/serio/Makefile | 1 +
> drivers/input/serio/xilinx_ps2.c | 464
++++++++++++++++++++++++++++++++++++++
> drivers/input/serio/xilinx_ps2.h | 97 ++++++++
> 4 files changed, 567 insertions(+), 0 deletions(-)
> create mode 100644 drivers/input/serio/xilinx_ps2.c
> create mode 100644 drivers/input/serio/xilinx_ps2.h
> diff --git a/drivers/input/serio/Kconfig
b/drivers/input/serio/Kconfig
> index ec4b661..0e62b39 100644
> --- a/drivers/input/serio/Kconfig
> +++ b/drivers/input/serio/Kconfig
> @@ -190,4 +190,9 @@ config SERIO_RAW
> To compile this driver as a module, choose M here: the
> module will be called serio_raw.
=
> +config SERIO_XILINX_XPS_PS2
> + tristate "Xilinx XPS PS/2 Controller Support"
> + help
> + This driver supports XPS PS/2 IP from Xilinx EDK.
> +
> endif
> diff --git a/drivers/input/serio/Makefile
b/drivers/input/serio/Makefile
> index 38b8868..9b6c813 100644
> --- a/drivers/input/serio/Makefile
> +++ b/drivers/input/serio/Makefile
> @@ -21,3 +21,4 @@ obj-$(CONFIG_SERIO_PCIPS2) +=3D pcips2.o
> obj-$(CONFIG_SERIO_MACEPS2) +=3D maceps2.o
> obj-$(CONFIG_SERIO_LIBPS2) +=3D libps2.o
> obj-$(CONFIG_SERIO_RAW) +=3D serio_raw.o
> +obj-$(CONFIG_SERIO_XILINX_XPS_PS2) +=3D xilinx_ps2.o
> diff --git a/drivers/input/serio/xilinx_ps2.c
b/drivers/input/serio/xilinx_ps2.c
> new file mode 100644
> index 0000000..670d47f
> --- /dev/null
> +++ b/drivers/input/serio/xilinx_ps2.c
> @@ -0,0 +1,464 @@
> +/*
> + * xilinx_ps2.c
> + *
> + * Xilinx PS/2 driver to interface PS/2 component to Linux
> + *
> + * Author: MontaVista Software, Inc.
> + * source@mvista.com
> + *
> + * (c) 2005 MontaVista Software, Inc.
> + * (c) 2008 Xilinx Inc.
> + *
Is the montavista stuff still valid?
> + * This program is free software; you can redistribute it and/or
modify it
> + * under the terms of the GNU General Public License as published by
the
> + * Free Software Foundation; either version 2 of the License, or (at
your
> + * option) any later version.
> + *
> + * You should have received a copy of the GNU General Public License
along
> + * with this program; if not, write to the Free Software Foundation,
Inc.,
> + * 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +
> +#include <linux/module.h>
> +#include <linux/serio.h>
> +#include <linux/interrupt.h>
> +#include <linux/errno.h>
> +#include <linux/init.h>
> +#include <linux/list.h>
> +#include <asm/io.h>
linux/io.h please.
> +
> +#ifdef CONFIG_OF /* For open firmware */
Why support !CONFIG_OF? =
> + #include <linux/of_device.h>
> + #include <linux/of_platform.h>
> +#endif /* CONFIG_OF */
> +
> +#include "xilinx_ps2.h"
Why the seperate header? You're the only user of it, right?
> +
> +#define DRIVER_NAME "xilinx_ps2"
> +#define DRIVER_DESCRIPTION "Xilinx XPS PS/2 driver"
> +
> +#define XPS2_NAME_DESC "Xilinx XPS PS/2 Port #%d"
> +#define XPS2_PHYS_DESC "xilinxps2/serio%d"
Why have defines to stuff only used once?
...
> +
> +/******************************/
> +/* The platform device driver */
> +/******************************/
> +
> +static int xps2_probe(struct device *dev)
__devinit please.
> +{
> + struct platform_device *pdev =3D to_platform_device(dev);
> +
> + struct resource *irq_res =3D NULL; /* Interrupt resources
*/
> + struct resource *regs_res =3D NULL; /* IO mem resources */
> +
> + if (!dev) {
> + dev_err(dev, "Probe called with NULL param\n");
> + return -EINVAL;
> + }
> +
> + /* Find irq number, map the control registers in */
> + irq_res =3D platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> + regs_res =3D platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + return xps2_setup(dev, pdev->id, regs_res, irq_res);
> +}
...
> +
> +/*
> + * xps2_remove() dissociates the driver with the Xilinx PS/2 device.
> + */
> +static int xps2_remove(struct device *dev)
__devexit please.
> +{
> + struct xps2data *drvdata;
> +
> + if (!dev)
> + return -EINVAL;
> +
> + drvdata =3D (struct xps2data *)dev_get_drvdata(dev);
> +
> + serio_unregister_port(&drvdata->serio);
> +
> + iounmap(drvdata->base_address);
> +
> + release_mem_region(drvdata->phys_addr, drvdata->remap_size);
> +
> + kfree(drvdata);
> + dev_set_drvdata(dev, NULL);
> +
> + return 0; /* success */
> +}
> +
> +static struct device_driver xps2_driver =3D {
Please use a real struct platform_driver instead.
> + .name =3D DRIVER_NAME,
> + .bus =3D &platform_bus_type,
> + .probe =3D xps2_probe,
> + .remove =3D xps2_remove
> +};
> +
-- =
Bye, Peter Korsgaard
This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.
^ permalink raw reply
* Re: [PATCH] powerpc: Xilinx: PS2: Added new XPS PS2 driver
From: Peter Korsgaard @ 2008-06-30 14:45 UTC (permalink / raw)
To: John Linn; +Cc: linuxppc-dev, Sadanand
In-Reply-To: <20080630142451.516A41D1006C@mail57-sin.bigfish.com>
>>>>> "John" == John Linn <john.linn@xilinx.com> writes:
> Added a new driver for Xilinx XPS PS2 IP. This driver is
> a flat driver to better match the Linux driver pattern.
This should probably go to the linux-input@ list as well.
> Signed-off-by: Sadanand <sadanan@xilinx.com>
> Signed-off-by: John Linn <john.linn@xilinx.com>
> ---
> drivers/input/serio/Kconfig | 5 +
> drivers/input/serio/Makefile | 1 +
> drivers/input/serio/xilinx_ps2.c | 464 ++++++++++++++++++++++++++++++++++++++
> drivers/input/serio/xilinx_ps2.h | 97 ++++++++
> 4 files changed, 567 insertions(+), 0 deletions(-)
> create mode 100644 drivers/input/serio/xilinx_ps2.c
> create mode 100644 drivers/input/serio/xilinx_ps2.h
> diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
> index ec4b661..0e62b39 100644
> --- a/drivers/input/serio/Kconfig
> +++ b/drivers/input/serio/Kconfig
> @@ -190,4 +190,9 @@ config SERIO_RAW
> To compile this driver as a module, choose M here: the
> module will be called serio_raw.
> +config SERIO_XILINX_XPS_PS2
> + tristate "Xilinx XPS PS/2 Controller Support"
> + help
> + This driver supports XPS PS/2 IP from Xilinx EDK.
> +
> endif
> diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
> index 38b8868..9b6c813 100644
> --- a/drivers/input/serio/Makefile
> +++ b/drivers/input/serio/Makefile
> @@ -21,3 +21,4 @@ obj-$(CONFIG_SERIO_PCIPS2) += pcips2.o
> obj-$(CONFIG_SERIO_MACEPS2) += maceps2.o
> obj-$(CONFIG_SERIO_LIBPS2) += libps2.o
> obj-$(CONFIG_SERIO_RAW) += serio_raw.o
> +obj-$(CONFIG_SERIO_XILINX_XPS_PS2) += xilinx_ps2.o
> diff --git a/drivers/input/serio/xilinx_ps2.c b/drivers/input/serio/xilinx_ps2.c
> new file mode 100644
> index 0000000..670d47f
> --- /dev/null
> +++ b/drivers/input/serio/xilinx_ps2.c
> @@ -0,0 +1,464 @@
> +/*
> + * xilinx_ps2.c
> + *
> + * Xilinx PS/2 driver to interface PS/2 component to Linux
> + *
> + * Author: MontaVista Software, Inc.
> + * source@mvista.com
> + *
> + * (c) 2005 MontaVista Software, Inc.
> + * (c) 2008 Xilinx Inc.
> + *
Is the montavista stuff still valid?
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + *
> + * You should have received a copy of the GNU General Public License along
> + * with this program; if not, write to the Free Software Foundation, Inc.,
> + * 675 Mass Ave, Cambridge, MA 02139, USA.
> + */
> +
> +
> +#include <linux/module.h>
> +#include <linux/serio.h>
> +#include <linux/interrupt.h>
> +#include <linux/errno.h>
> +#include <linux/init.h>
> +#include <linux/list.h>
> +#include <asm/io.h>
linux/io.h please.
> +
> +#ifdef CONFIG_OF /* For open firmware */
Why support !CONFIG_OF?
> + #include <linux/of_device.h>
> + #include <linux/of_platform.h>
> +#endif /* CONFIG_OF */
> +
> +#include "xilinx_ps2.h"
Why the seperate header? You're the only user of it, right?
> +
> +#define DRIVER_NAME "xilinx_ps2"
> +#define DRIVER_DESCRIPTION "Xilinx XPS PS/2 driver"
> +
> +#define XPS2_NAME_DESC "Xilinx XPS PS/2 Port #%d"
> +#define XPS2_PHYS_DESC "xilinxps2/serio%d"
Why have defines to stuff only used once?
...
> +
> +/******************************/
> +/* The platform device driver */
> +/******************************/
> +
> +static int xps2_probe(struct device *dev)
__devinit please.
> +{
> + struct platform_device *pdev = to_platform_device(dev);
> +
> + struct resource *irq_res = NULL; /* Interrupt resources */
> + struct resource *regs_res = NULL; /* IO mem resources */
> +
> + if (!dev) {
> + dev_err(dev, "Probe called with NULL param\n");
> + return -EINVAL;
> + }
> +
> + /* Find irq number, map the control registers in */
> + irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
> + regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + return xps2_setup(dev, pdev->id, regs_res, irq_res);
> +}
...
> +
> +/*
> + * xps2_remove() dissociates the driver with the Xilinx PS/2 device.
> + */
> +static int xps2_remove(struct device *dev)
__devexit please.
> +{
> + struct xps2data *drvdata;
> +
> + if (!dev)
> + return -EINVAL;
> +
> + drvdata = (struct xps2data *)dev_get_drvdata(dev);
> +
> + serio_unregister_port(&drvdata->serio);
> +
> + iounmap(drvdata->base_address);
> +
> + release_mem_region(drvdata->phys_addr, drvdata->remap_size);
> +
> + kfree(drvdata);
> + dev_set_drvdata(dev, NULL);
> +
> + return 0; /* success */
> +}
> +
> +static struct device_driver xps2_driver = {
Please use a real struct platform_driver instead.
> + .name = DRIVER_NAME,
> + .bus = &platform_bus_type,
> + .probe = xps2_probe,
> + .remove = xps2_remove
> +};
> +
--
Bye, Peter Korsgaard
^ permalink raw reply
* RE: [PATCH] [POWERPC] Xilinx: add compatibility for 'simple-bus'.
From: John Linn @ 2008-06-30 14:39 UTC (permalink / raw)
To: Stephen Neuendorffer, grant.likely; +Cc: linuxppc-dev, git, dwg
In-Reply-To: <977C41F842E66D4CB2E41332313B615019F061@XSJ-EXCHVS1.xlnx.xilinx.com>
I still have bad dreams about the of_serial patch I did as a newbie
related to reg_shift and reg_offset ;)
I'm still a newbie, but we'll do whatever needs to be done. =
Any thoughts from Josh?
-- John
-----Original Message-----
From: Stephen Neuendorffer =
Sent: Sunday, June 29, 2008 9:42 PM
To: grant.likely@secretlab.ca
Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
Subject: RE: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
Is there really much of a chance of that, given the differences with the
bootwrappers?
Does anyone care enough about legacy_serial for this to matter? My
impression was that legacy serial was not preferred anyway...
Steve
-----Original Message-----
From: glikely@secretlab.ca on behalf of Grant Likely
Sent: Sat 6/28/2008 1:33 PM
To: Stephen Neuendorffer
Cc: dwg@au1.ibm.com; jwboyer@linux.vnet.ibm.com;
linuxppc-dev@ozlabs.org; git
Subject: Re: [PATCH] [POWERPC] Xilinx: add compatibility for
'simple-bus'.
=
On Fri, Jun 6, 2008 at 10:16 AM, Stephen Neuendorffer
<stephen.neuendorffer@xilinx.com> wrote:
>
> legacy_serial identifies a valid ns16550 on a simple-bus, but the
> legacy_serial driver doesn't understand the shift and offset flags
> necessary to get it to work, which results in no console.
>
> I think the easiest solution is to change the Kconfig so that
> PPC_UDBG_16550 is only selected based on !XILINX_VIRTEX. I've done
this
> in my tree, but I've been swamped with other things at the moment, so
I
> haven't verified it.
This is an easy solution, but it is not a good one. Doing so would
break UDBG on other 405 boards when building multiplatform kernels.
It would be better to teach legacy serial about the shift and offset.
Alternately, add code to add_legacy_soc_port() to skip it if the
shift/offset properties are present.
Cheers,
g.
-- =
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
This email and any attachments are intended for the sole use of the named r=
ecipient(s) and contain(s) confidential information that may be proprietary=
, privileged or copyrighted under applicable law. If you are not the intend=
ed recipient, do not read, copy, or forward this email message or any attac=
hments. Delete this email message and any attachments immediately.
^ permalink raw reply
* Re: [RFC: 2.6 patch] powerpc: asm/elf.h: reduce userspace header
From: Christoph Hellwig @ 2008-06-30 14:28 UTC (permalink / raw)
To: Adrian Bunk; +Cc: linuxppc-dev, paulus
In-Reply-To: <20080623174828.GG4756@cs181140183.pp.htv.fi>
On Mon, Jun 23, 2008 at 08:48:28PM +0300, Adrian Bunk wrote:
> This patch makes asm/elf.h export less non-userspace stuff to userspace.
I don't think this header should be exported at all. There's a
userspace elf.h that should be used instead.
^ permalink raw reply
* [PATCH] powerpc: Xilinx: PS2: Added new XPS PS2 driver
From: John Linn @ 2008-06-30 14:24 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Sadanand, John Linn
Added a new driver for Xilinx XPS PS2 IP. This driver is
a flat driver to better match the Linux driver pattern.
Signed-off-by: Sadanand <sadanan@xilinx.com>
Signed-off-by: John Linn <john.linn@xilinx.com>
---
drivers/input/serio/Kconfig | 5 +
drivers/input/serio/Makefile | 1 +
drivers/input/serio/xilinx_ps2.c | 464 ++++++++++++++++++++++++++++++++++++++
drivers/input/serio/xilinx_ps2.h | 97 ++++++++
4 files changed, 567 insertions(+), 0 deletions(-)
create mode 100644 drivers/input/serio/xilinx_ps2.c
create mode 100644 drivers/input/serio/xilinx_ps2.h
diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index ec4b661..0e62b39 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -190,4 +190,9 @@ config SERIO_RAW
To compile this driver as a module, choose M here: the
module will be called serio_raw.
+config SERIO_XILINX_XPS_PS2
+ tristate "Xilinx XPS PS/2 Controller Support"
+ help
+ This driver supports XPS PS/2 IP from Xilinx EDK.
+
endif
diff --git a/drivers/input/serio/Makefile b/drivers/input/serio/Makefile
index 38b8868..9b6c813 100644
--- a/drivers/input/serio/Makefile
+++ b/drivers/input/serio/Makefile
@@ -21,3 +21,4 @@ obj-$(CONFIG_SERIO_PCIPS2) += pcips2.o
obj-$(CONFIG_SERIO_MACEPS2) += maceps2.o
obj-$(CONFIG_SERIO_LIBPS2) += libps2.o
obj-$(CONFIG_SERIO_RAW) += serio_raw.o
+obj-$(CONFIG_SERIO_XILINX_XPS_PS2) += xilinx_ps2.o
diff --git a/drivers/input/serio/xilinx_ps2.c b/drivers/input/serio/xilinx_ps2.c
new file mode 100644
index 0000000..670d47f
--- /dev/null
+++ b/drivers/input/serio/xilinx_ps2.c
@@ -0,0 +1,464 @@
+/*
+ * xilinx_ps2.c
+ *
+ * Xilinx PS/2 driver to interface PS/2 component to Linux
+ *
+ * Author: MontaVista Software, Inc.
+ * source@mvista.com
+ *
+ * (c) 2005 MontaVista Software, Inc.
+ * (c) 2008 Xilinx Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/module.h>
+#include <linux/serio.h>
+#include <linux/interrupt.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_OF /* For open firmware */
+ #include <linux/of_device.h>
+ #include <linux/of_platform.h>
+#endif /* CONFIG_OF */
+
+#include "xilinx_ps2.h"
+
+#define DRIVER_NAME "xilinx_ps2"
+#define DRIVER_DESCRIPTION "Xilinx XPS PS/2 driver"
+
+#define XPS2_NAME_DESC "Xilinx XPS PS/2 Port #%d"
+#define XPS2_PHYS_DESC "xilinxps2/serio%d"
+
+
+static DECLARE_MUTEX(cfg_sem);
+
+/*********************/
+/* Interrupt handler */
+/*********************/
+static irqreturn_t xps2_interrupt(int irq, void *dev_id)
+{
+ struct xps2data *drvdata = (struct xps2data *)dev_id;
+ u32 intr_sr;
+ u32 ier;
+ u8 c;
+ u8 retval;
+
+ /* Get the PS/2 interrupts and clear them */
+ intr_sr = in_be32(drvdata->base_address + XPS2_IPISR_OFFSET);
+ out_be32(drvdata->base_address + XPS2_IPISR_OFFSET, intr_sr);
+
+ /* Check which interrupt is active */
+ if (intr_sr & XPS2_IPIXR_RX_OVF) {
+ printk(KERN_ERR "%s: receive overrun error\n",
+ drvdata->serio.name);
+ }
+
+ if (intr_sr & XPS2_IPIXR_RX_ERR) {
+ drvdata->dfl |= SERIO_PARITY;
+ }
+
+ if (intr_sr & (XPS2_IPIXR_TX_NOACK | XPS2_IPIXR_WDT_TOUT)) {
+ drvdata->dfl |= SERIO_TIMEOUT;
+ }
+
+ if (intr_sr & XPS2_IPIXR_RX_FULL) {
+ retval = xps2_recv(drvdata, &drvdata->rxb);
+
+ /* Error, if 1 byte is not received */
+ if (retval != 1) {
+ printk(KERN_ERR
+ "%s: wrong rcvd byte count (%d)\n",
+ drvdata->serio.name, retval);
+ }
+ c = drvdata->rxb;
+ serio_interrupt(&drvdata->serio, c, drvdata->dfl);
+ drvdata->dfl = 0;
+ }
+
+ if (intr_sr & XPS2_IPIXR_TX_ACK) {
+
+ /* Disable the TX interrupts after the transmission is
+ * complete */
+ ier = in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
+ ier &= (~(XPS2_IPIXR_TX_ACK & XPS2_IPIXR_ALL ));
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
+ drvdata->dfl = 0;
+ }
+
+ return IRQ_HANDLED;
+}
+
+/*******************/
+/* serio callbacks */
+/*******************/
+
+/*
+ * sxps2_write() sends a byte out through the PS/2 interface.
+ *
+ * The sole purpose of drvdata->tx_end is to prevent the driver
+ * from locking up in the do {} while; loop when nothing is connected
+ * to the given PS/2 port. That's why we do not try to recover
+ * from the transmission failure.
+ * drvdata->tx_end needs not to be initialized to some "far in the
+ * future" value, as the very first attempt to xps2_send() a byte
+ * is always successful, and drvdata->tx_end will be set to a proper
+ * value at that moment - before the 1st use in the comparison.
+ */
+static int sxps2_write(struct serio *pserio, unsigned char c)
+{
+ struct xps2data *drvdata = pserio->port_data;
+ unsigned long flags;
+ int retval;
+
+ do {
+ spin_lock_irqsave(&drvdata->lock, flags);
+ retval = xps2_send(drvdata, &c);
+ spin_unlock_irqrestore(&drvdata->lock, flags);
+
+ if (retval == 1) {
+ drvdata->tx_end = jiffies + HZ;
+ return 0; /* success */
+ }
+ } while (!time_after(jiffies, drvdata->tx_end));
+
+ return 1; /* transmission is frozen */
+}
+
+/*
+ * sxps2_open() is called when a port is open by the higher layer.
+ */
+static int sxps2_open(struct serio *pserio)
+{
+ struct xps2data *drvdata = pserio->port_data;
+ int retval;
+
+ retval = request_irq(drvdata->irq, &xps2_interrupt, 0,
+ DRIVER_NAME, drvdata);
+ if (retval) {
+ printk(KERN_ERR
+ "%s: Couldn't allocate interrupt %d\n",
+ drvdata->serio.name, drvdata->irq);
+ return retval;
+ }
+
+ /* start reception by enabling the interrupts */
+ out_be32(drvdata->base_address + XPS2_GIER_OFFSET, XPS2_GIER_GIE_MASK);
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, XPS2_IPIXR_RX_ALL);
+ (void)xps2_recv(drvdata, &drvdata->rxb);
+
+ return 0; /* success */
+}
+
+/*
+ * sxps2_close() frees the interrupt.
+ */
+static void sxps2_close(struct serio *pserio)
+{
+ struct xps2data *drvdata = pserio->port_data;
+
+ /* Disable the PS2 interrupts */
+ out_be32(drvdata->base_address + XPS2_GIER_OFFSET, 0x00);
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0x00);
+ free_irq(drvdata->irq, drvdata);
+}
+
+/*************************/
+/* XPS PS/2 driver calls */
+/*************************/
+
+/*
+ * xps2_initialize() initializes the Xilinx PS/2 device.
+ */
+static int xps2_initialize(struct xps2data *drvdata)
+{
+ /* Disable all the interrupts just in case */
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, 0);
+
+ /* Reset the PS2 device and abort any current transaction, to make sure
+ * we have the PS2 in a good state */
+ out_be32(drvdata->base_address + XPS2_SRST_OFFSET, XPS2_SRST_RESET);
+
+ return 0;
+}
+
+/*
+ * xps2_send() sends the specified byte of data to the PS/2 port in interrupt
+ * mode.
+ */
+static u8 xps2_send(struct xps2data *drvdata, u8 *byte)
+{
+ u32 sr;
+ u32 ier;
+ u8 retval = 0;
+
+ /* Enter a critical region by disabling the PS/2 transmit interrupts to
+ * allow this call to stop a previous operation that may be interrupt
+ * driven. Only stop the transmit interrupt since this critical region
+ * is not really exited in the normal manner */
+ ier = in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
+ ier &= (~(XPS2_IPIXR_TX_ALL & XPS2_IPIXR_ALL ));
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
+
+ /* If the PS/2 transmitter is empty send a byte of data */
+ sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
+ if ((sr & XPS2_STATUS_TX_FULL) == 0) {
+ out_be32(drvdata->base_address + XPS2_TX_DATA_OFFSET, *byte);
+ retval = 1;
+ }
+
+ /* Enable the TX interrupts to track the status of the transmission */
+ ier = in_be32(drvdata->base_address + XPS2_IPIER_OFFSET);
+ ier |= ((XPS2_IPIXR_TX_ALL | XPS2_IPIXR_WDT_TOUT ));
+ out_be32(drvdata->base_address + XPS2_IPIER_OFFSET, ier);
+
+ return retval; /* no. of bytes sent */
+}
+
+/*
+ * xps2_recv() will attempt to receive a byte of data from the PS/2 port.
+ */
+static u8 xps2_recv(struct xps2data *drvdata, u8 *byte)
+{
+ u32 sr;
+ u8 retval = 0;
+
+ /* If there is data available in the PS/2 receiver, read it */
+ sr = in_be32(drvdata->base_address + XPS2_STATUS_OFFSET);
+ if (sr & XPS2_STATUS_RX_FULL) {
+ *byte = in_be32(drvdata->base_address + XPS2_RX_DATA_OFFSET);
+ retval = 1;
+ }
+
+ return retval; /* no. of bytes received */
+}
+
+/******************************/
+/* The platform device driver */
+/******************************/
+
+static int xps2_probe(struct device *dev)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+
+ struct resource *irq_res = NULL; /* Interrupt resources */
+ struct resource *regs_res = NULL; /* IO mem resources */
+
+ if (!dev) {
+ dev_err(dev, "Probe called with NULL param\n");
+ return -EINVAL;
+ }
+
+ /* Find irq number, map the control registers in */
+ irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ regs_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ return xps2_setup(dev, pdev->id, regs_res, irq_res);
+}
+
+/*
+ * Shared device initialization code.
+ */
+static int xps2_setup(struct device *dev, int id, struct resource *regs_res,
+ struct resource *irq_res)
+{
+ struct xps2data *drvdata;
+ unsigned long remap_size;
+ int retval;
+
+ if (!dev)
+ return -EINVAL;
+
+ drvdata = kzalloc(sizeof(struct xps2data), GFP_KERNEL);
+ if (!drvdata) {
+ dev_err(dev, "Couldn't allocate device private record\n");
+ return -ENOMEM;
+ }
+ spin_lock_init(&drvdata->lock);
+ dev_set_drvdata(dev, (void *)drvdata);
+
+ if (!regs_res || !irq_res) {
+ dev_err(dev, "IO resource(s) not found\n");
+ retval = -EFAULT;
+ goto failed1;
+ }
+
+ drvdata->irq = irq_res->start;
+ remap_size = regs_res->end - regs_res->start + 1;
+ if (!request_mem_region(regs_res->start, remap_size, DRIVER_NAME)) {
+
+ dev_err(dev,"Couldn't lock memory region at 0x%08X\n",
+ (unsigned int)regs_res->start);
+ retval = -EBUSY;
+ goto failed1;
+ }
+
+ /* Fill in configuration data and add them to the list */
+ drvdata->phys_addr = regs_res->start;
+ drvdata->remap_size = remap_size;
+ drvdata->base_address = ioremap(regs_res->start, remap_size);
+ if (drvdata->base_address == NULL) {
+
+ dev_err(dev,"Couldn't ioremap memory at 0x%08X\n",
+ (unsigned int)regs_res->start);
+ retval = -EFAULT;
+ goto failed2;
+ }
+
+ /* Initialize the PS/2 interface */
+ down(&cfg_sem);
+ if (xps2_initialize(drvdata)) {
+ up(&cfg_sem);
+ dev_err(dev,"Could not initialize device\n");
+ retval = -ENODEV;
+ goto failed3;
+ }
+ up(&cfg_sem);
+
+ dev_info(dev, "Xilinx PS2 at 0x%08X mapped to 0x%08X, irq=%d\n",
+ drvdata->phys_addr, (u32)drvdata->base_address, drvdata->irq);
+
+ drvdata->serio.id.type = SERIO_8042;
+ drvdata->serio.write = sxps2_write;
+ drvdata->serio.open = sxps2_open;
+ drvdata->serio.close = sxps2_close;
+ drvdata->serio.port_data = drvdata;
+ drvdata->serio.dev.parent = dev;
+ snprintf(drvdata->serio.name, sizeof(drvdata->serio.name),
+ XPS2_NAME_DESC, id);
+ snprintf(drvdata->serio.phys, sizeof(drvdata->serio.phys),
+ XPS2_PHYS_DESC, id);
+ serio_register_port(&drvdata->serio);
+
+ return 0; /* success */
+
+failed3:
+ iounmap(drvdata->base_address);
+
+failed2:
+ release_mem_region(regs_res->start, remap_size);
+
+failed1:
+ kfree(drvdata);
+ dev_set_drvdata(dev, NULL);
+
+ return retval;
+}
+
+/*
+ * xps2_remove() dissociates the driver with the Xilinx PS/2 device.
+ */
+static int xps2_remove(struct device *dev)
+{
+ struct xps2data *drvdata;
+
+ if (!dev)
+ return -EINVAL;
+
+ drvdata = (struct xps2data *)dev_get_drvdata(dev);
+
+ serio_unregister_port(&drvdata->serio);
+
+ iounmap(drvdata->base_address);
+
+ release_mem_region(drvdata->phys_addr, drvdata->remap_size);
+
+ kfree(drvdata);
+ dev_set_drvdata(dev, NULL);
+
+ return 0; /* success */
+}
+
+static struct device_driver xps2_driver = {
+ .name = DRIVER_NAME,
+ .bus = &platform_bus_type,
+ .probe = xps2_probe,
+ .remove = xps2_remove
+};
+
+#ifdef CONFIG_OF
+static int __devinit xps2_of_probe(struct of_device *ofdev, const struct
+ of_device_id *match)
+{
+ struct resource r_irq_struct;
+ struct resource r_mem_struct;
+ struct resource *r_irq = &r_irq_struct; /* Interrupt resources */
+ struct resource *r_mem = &r_mem_struct; /* IO mem resources */
+ int rc = 0;
+ const unsigned int *id;
+
+ printk(KERN_INFO "Device Tree Probing \'%s\'\n",
+ ofdev->node->name);
+
+ /* Get iospace for the device */
+ rc = of_address_to_resource(ofdev->node, 0, r_mem);
+ if(rc) {
+ dev_warn(&ofdev->dev, "invalid address\n");
+ return rc;
+ }
+
+ /* Get IRQ for the device */
+ rc = of_irq_to_resource(ofdev->node, 0, r_irq);
+ if(rc == NO_IRQ) {
+ dev_warn(&ofdev->dev, "no IRQ found\n");
+ return rc;
+ }
+
+ id = of_get_property(ofdev->node, "port-number", NULL);
+ return xps2_setup(&ofdev->dev, id ? *id : -1, r_mem, r_irq);
+}
+
+static int __devexit xps2_of_remove(struct of_device *dev)
+{
+ return xps2_remove(&dev->dev);
+}
+
+static struct of_device_id __devinitdata xps2_of_match[] = {
+ { .compatible = "xlnx,xps-ps2-1.00.a", },
+ { /* end of list */ },
+};
+
+MODULE_DEVICE_TABLE(of, xps2_of_match);
+
+static struct of_platform_driver xps2_of_driver = {
+ .name = DRIVER_NAME,
+ .match_table = xps2_of_match,
+ .probe = xps2_of_probe,
+ .remove = __devexit_p(xps2_of_remove),
+};
+#endif /* CONFIG_OF */
+
+static int __init xps2_init(void)
+{
+ int status = driver_register(&xps2_driver);
+#ifdef CONFIG_OF
+ status |= of_register_platform_driver(&xps2_of_driver);
+#endif /* CONFIG_OF */
+ return status;
+}
+
+static void __exit xps2_cleanup(void)
+{
+ driver_unregister(&xps2_driver);
+#ifdef CONFIG_OF
+ of_unregister_platform_driver(&xps2_of_driver);
+#endif /* CONFIG_OF */
+}
+
+module_init(xps2_init);
+module_exit(xps2_cleanup);
+
+MODULE_AUTHOR("Xilinx, Inc.");
+MODULE_DESCRIPTION(DRIVER_DESCRIPTION);
+MODULE_LICENSE("GPL");
+
diff --git a/drivers/input/serio/xilinx_ps2.h b/drivers/input/serio/xilinx_ps2.h
new file mode 100644
index 0000000..4db73ca
--- /dev/null
+++ b/drivers/input/serio/xilinx_ps2.h
@@ -0,0 +1,97 @@
+/*****************************************************************************
+ *
+ * Author: Xilinx, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS"
+ * AS A COURTESY TO YOU, SOLELY FOR USE IN DEVELOPING PROGRAMS AND
+ * SOLUTIONS FOR XILINX DEVICES. BY PROVIDING THIS DESIGN, CODE,
+ * OR INFORMATION AS ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE,
+ * APPLICATION OR STANDARD, XILINX IS MAKING NO REPRESENTATION
+ * THAT THIS IMPLEMENTATION IS FREE FROM ANY CLAIMS OF INFRINGEMENT,
+ * AND YOU ARE RESPONSIBLE FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE
+ * FOR YOUR IMPLEMENTATION. XILINX EXPRESSLY DISCLAIMS ANY
+ * WARRANTY WHATSOEVER WITH RESPECT TO THE ADEQUACY OF THE
+ * IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO ANY WARRANTIES OR
+ * REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE FROM CLAIMS OF
+ * INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE.
+ *
+ * Xilinx products are not intended for use in life support appliances,
+ * devices, or systems. Use in such applications is expressly prohibited.
+ *
+ * (c) Copyright 2008 Xilinx Inc.
+ * All rights reserved.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *****************************************************************************/
+
+#ifndef XILINX_PS2_H_ /* prevent circular inclusions */
+#define XILINX_PS2_H_ /* by using protection macros */
+
+/* Register offsets for the xps2 device */
+#define XPS2_SRST_OFFSET 0x00000000 /* Software Reset register */
+#define XPS2_STATUS_OFFSET 0x00000004 /* Status register */
+#define XPS2_RX_DATA_OFFSET 0x00000008 /* Receive Data register */
+#define XPS2_TX_DATA_OFFSET 0x0000000C /* Transmit Data register */
+#define XPS2_GIER_OFFSET 0x0000002C /* Global Interrupt Enable reg */
+#define XPS2_IPISR_OFFSET 0x00000030 /* Interrupt Status register */
+#define XPS2_IPIER_OFFSET 0x00000038 /* Interrupt Enable register */
+
+/* Reset Register Bit Definitions */
+#define XPS2_SRST_RESET 0x0000000A /* Software Reset */
+
+/* Status Register Bit Positions */
+#define XPS2_STATUS_RX_FULL 0x00000001 /* Receive Full */
+#define XPS2_STATUS_TX_FULL 0x00000002 /* Transmit Full */
+
+/* Bit definitions for ISR/IER registers. Both the registers have the same bit
+ * definitions and are only defined once. */
+#define XPS2_IPIXR_WDT_TOUT 0x00000001 /* Watchdog Timeout Interrupt */
+#define XPS2_IPIXR_TX_NOACK 0x00000002 /* Transmit No ACK Interrupt */
+#define XPS2_IPIXR_TX_ACK 0x00000004 /* Transmit ACK (Data) Interrupt */
+#define XPS2_IPIXR_RX_OVF 0x00000008 /* Receive Overflow Interrupt */
+#define XPS2_IPIXR_RX_ERR 0x00000010 /* Receive Error Interrupt */
+#define XPS2_IPIXR_RX_FULL 0x00000020 /* Receive Data Interrupt */
+
+/* Mask for all the Transmit Interrupts */
+#define XPS2_IPIXR_TX_ALL (XPS2_IPIXR_TX_NOACK | XPS2_IPIXR_TX_ACK)
+
+/* Mask for all the Receive Interrupts */
+#define XPS2_IPIXR_RX_ALL (XPS2_IPIXR_RX_OVF | XPS2_IPIXR_RX_ERR | \
+ XPS2_IPIXR_RX_FULL)
+
+/* Mask for all the Interrupts */
+#define XPS2_IPIXR_ALL (XPS2_IPIXR_TX_ALL | XPS2_IPIXR_RX_ALL | \
+ XPS2_IPIXR_WDT_TOUT)
+
+/* Global Interrupt Enable mask */
+#define XPS2_GIER_GIE_MASK 0x80000000
+
+struct xps2data {
+ int irq;
+ u32 phys_addr;
+ u32 remap_size;
+ spinlock_t lock;
+ u8 rxb; /* Rx buffer */
+ void __iomem *base_address; /* virt. address of control registers */
+ unsigned long tx_end;
+ unsigned int dfl;
+ struct serio serio; /* serio */
+};
+
+static u8 xps2_send(struct xps2data *drvdata, u8 *buffer_ptr);
+static u8 xps2_recv(struct xps2data *drvdata, u8 *buffer_ptr);
+static int xps2_initialize(struct xps2data *drvdata);
+static int xps2_setup(struct device *dev, int id, struct resource *regs_res,
+ struct resource *irq_res);
+
+#endif /* end of protection macro */
+
--
1.5.2.1
This email and any attachments are intended for the sole use of the named recipient(s) and contain(s) confidential information that may be proprietary, privileged or copyrighted under applicable law. If you are not the intended recipient, do not read, copy, or forward this email message or any attachments. Delete this email message and any attachments immediately.
^ permalink raw reply related
* Re: [PATCH] [POWERPC] 85xx: TQM8548: add missing support for RTC and LM75
From: Wolfgang Grandegger @ 2008-06-30 13:08 UTC (permalink / raw)
To: Kumar Gala; +Cc: Linuxppc-dev
In-Reply-To: <D0B930D5-3211-4199-94B9-586065A0F116@kernel.crashing.org>
Kumar Gala wrote:
>
> On Jun 26, 2008, at 9:13 AM, Wolfgang Grandegger wrote:
>
>> Kumar Gala wrote:
>>> On Jun 26, 2008, at 8:15 AM, Wolfgang Grandegger wrote:
>>>> It adds the missing RTC node to tqm8548.dts and enables support for
>>>> I2C, DS1307 and LM75 in the default configuration.
>>>>
>>>> Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
>>>> ---
>>>> arch/powerpc/boot/dts/tqm8548.dts | 5
>>>> arch/powerpc/configs/85xx/tqm8548_defconfig | 143
>>>> ++++++++++++++++++++++++++--
>>>> 2 files changed, 142 insertions(+), 6 deletions(-)
>>> your mailer is wrapping things.
>>
>> Hm, I can apply the patch extracted from my mail without problems.
>>
>>> Also, can you test out the mpc85xx_defconfig and make sure it works
>>> with the tqm85xx boards (and provide a second patch that enables
>>> whatever drivers you need in there)
>>
>> OK, will do so beginning of next week. For the TQM8548 I use the ELDK
>> ppc_85xxDP and for all others the ppc_85xx tool chain. Does a mixed
>> image for both types of MPC85xx CPUs make sense?
>
> I'm just trying to keep the mpc85xx_defconfig as a subset of all the
> other defconfigs for 85xx so it gives people doing testing one defconfig
> to build and try and sure that the other defconfigs will continue to work.
A subset or superset? The existing mpc85xx_defconfig does not work on
the TQM8560, because support for the CPM2 UART is missing. I have
attached the patch for mpc85xx_defconfig to support the TQM85xx modules
(tested with TQM8540, TQM8548 and TQM8560) with one image.
Hope it's what you are looking for.
BTW: "WARNING: modpost: Found 1 section mismatch(es)." shows up when
enabling the FS ENET driver.
Wolfgang.
---
arch/powerpc/configs/mpc85xx_defconfig | 382 ++++++++++++++++++++++++++-------
1 file changed, 302 insertions(+), 80 deletions(-)
Index: linux-2.6-galak/arch/powerpc/configs/mpc85xx_defconfig
===================================================================
--- linux-2.6-galak.orig/arch/powerpc/configs/mpc85xx_defconfig
+++ linux-2.6-galak/arch/powerpc/configs/mpc85xx_defconfig
@@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
-# Linux kernel version: 2.6.25-rc7
-# Mon Mar 31 11:37:08 2008
+# Linux kernel version: 2.6.26-rc5
+# Mon Jun 30 14:22:18 2008
#
# CONFIG_PPC64 is not set
@@ -15,6 +15,7 @@ CONFIG_PPC_85xx=y
# CONFIG_44x is not set
# CONFIG_E200 is not set
CONFIG_E500=y
+# CONFIG_PPC_E500MC is not set
CONFIG_BOOKE=y
CONFIG_FSL_BOOKE=y
CONFIG_FSL_EMB_PERFMON=y
@@ -32,6 +33,8 @@ CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_HARDIRQS=y
# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
CONFIG_IRQ_PER_CPU=y
+CONFIG_STACKTRACE_SUPPORT=y
+CONFIG_LOCKDEP_SUPPORT=y
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
CONFIG_ARCH_HAS_ILOG2_U32=y
CONFIG_GENERIC_HWEIGHT=y
@@ -90,6 +93,7 @@ CONFIG_INITRAMFS_SOURCE=""
CONFIG_SYSCTL=y
CONFIG_EMBEDDED=y
CONFIG_SYSCTL_SYSCALL=y
+CONFIG_SYSCTL_SYSCALL_CHECK=y
CONFIG_KALLSYMS=y
CONFIG_KALLSYMS_ALL=y
CONFIG_KALLSYMS_EXTRA_PASS=y
@@ -117,12 +121,14 @@ CONFIG_HAVE_OPROFILE=y
# CONFIG_KPROBES is not set
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
+# CONFIG_HAVE_DMA_ATTRS is not set
CONFIG_PROC_PAGE_MONITOR=y
CONFIG_SLABINFO=y
CONFIG_RT_MUTEXES=y
# CONFIG_TINY_SHMEM is not set
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
+# CONFIG_MODULE_FORCE_LOAD is not set
CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
@@ -162,9 +168,11 @@ CONFIG_MPC8560_ADS=y
CONFIG_MPC85xx_CDS=y
CONFIG_MPC85xx_MDS=y
CONFIG_MPC85xx_DS=y
+# CONFIG_KSI8560 is not set
# CONFIG_STX_GP3 is not set
CONFIG_TQM8540=y
CONFIG_TQM8541=y
+# CONFIG_TQM8548 is not set
CONFIG_TQM8555=y
CONFIG_TQM8560=y
CONFIG_SBC8548=y
@@ -221,11 +229,13 @@ CONFIG_FLATMEM=y
CONFIG_FLAT_NODE_MEM_MAP=y
# CONFIG_SPARSEMEM_STATIC is not set
# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
+CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_SPLIT_PTLOCK_CPUS=4
# CONFIG_RESOURCES_64BIT is not set
CONFIG_ZONE_DMA_FLAG=1
CONFIG_BOUNCE=y
CONFIG_VIRT_TO_BUS=y
+CONFIG_FORCE_MAX_ZONEORDER=11
CONFIG_PROC_DEVICETREE=y
# CONFIG_CMDLINE_BOOL is not set
# CONFIG_PM is not set
@@ -240,16 +250,20 @@ CONFIG_GENERIC_ISA_DMA=y
CONFIG_PPC_INDIRECT_PCI=y
CONFIG_FSL_SOC=y
CONFIG_FSL_PCI=y
+CONFIG_FSL_LBC=y
CONFIG_PCI=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_SYSCALL=y
-# CONFIG_PCIEPORTBUS is not set
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCIEAER=y
+# CONFIG_PCIEASPM is not set
CONFIG_ARCH_SUPPORTS_MSI=y
# CONFIG_PCI_MSI is not set
CONFIG_PCI_LEGACY=y
# CONFIG_PCI_DEBUG is not set
# CONFIG_PCCARD is not set
# CONFIG_HOTPLUG_PCI is not set
+# CONFIG_HAS_RAPIDIO is not set
#
# Advanced setup
@@ -259,11 +273,12 @@ CONFIG_PCI_LEGACY=y
#
# Default settings for advanced configuration options are used
#
-CONFIG_HIGHMEM_START=0xfe000000
CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_PAGE_OFFSET=0xc0000000
CONFIG_KERNEL_START=0xc0000000
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PHYSICAL_ALIGN=0x10000000
CONFIG_TASK_SIZE=0xc0000000
-CONFIG_BOOT_LOAD=0x00800000
#
# Networking
@@ -334,8 +349,10 @@ CONFIG_INET6_XFRM_MODE_TUNNEL=y
CONFIG_INET6_XFRM_MODE_BEET=y
# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
CONFIG_IPV6_SIT=y
+CONFIG_IPV6_NDISC_NODETYPE=y
# CONFIG_IPV6_TUNNEL is not set
# CONFIG_IPV6_MULTIPLE_TABLES is not set
+# CONFIG_IPV6_MROUTE is not set
# CONFIG_NETWORK_SECMARK is not set
# CONFIG_NETFILTER is not set
# CONFIG_IP_DCCP is not set
@@ -395,8 +412,97 @@ CONFIG_FW_LOADER=y
# CONFIG_DEBUG_DEVRES is not set
# CONFIG_SYS_HYPERVISOR is not set
# CONFIG_CONNECTOR is not set
-# CONFIG_MTD is not set
+CONFIG_MTD=y
+# CONFIG_MTD_DEBUG is not set
+CONFIG_MTD_CONCAT=y
+CONFIG_MTD_PARTITIONS=y
+# CONFIG_MTD_REDBOOT_PARTS is not set
+# CONFIG_MTD_CMDLINE_PARTS is not set
+CONFIG_MTD_OF_PARTS=y
+# CONFIG_MTD_AR7_PARTS is not set
+
+#
+# User Modules And Translation Layers
+#
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLKDEVS=y
+CONFIG_MTD_BLOCK=y
+# CONFIG_FTL is not set
+# CONFIG_NFTL is not set
+# CONFIG_INFTL is not set
+# CONFIG_RFD_FTL is not set
+# CONFIG_SSFDC is not set
+# CONFIG_MTD_OOPS is not set
+
+#
+# RAM/ROM/Flash chip drivers
+#
+CONFIG_MTD_CFI=y
+# CONFIG_MTD_JEDECPROBE is not set
+CONFIG_MTD_GEN_PROBE=y
+# CONFIG_MTD_CFI_ADV_OPTIONS is not set
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
+# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+# CONFIG_MTD_CFI_I4 is not set
+# CONFIG_MTD_CFI_I8 is not set
+# CONFIG_MTD_CFI_INTELEXT is not set
+CONFIG_MTD_CFI_AMDSTD=y
+# CONFIG_MTD_CFI_STAA is not set
+CONFIG_MTD_CFI_UTIL=y
+# CONFIG_MTD_RAM is not set
+# CONFIG_MTD_ROM is not set
+# CONFIG_MTD_ABSENT is not set
+
+#
+# Mapping drivers for chip access
+#
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+# CONFIG_MTD_PHYSMAP is not set
+CONFIG_MTD_PHYSMAP_OF=y
+# CONFIG_MTD_INTEL_VR_NOR is not set
+# CONFIG_MTD_PLATRAM is not set
+
+#
+# Self-contained MTD device drivers
+#
+# CONFIG_MTD_PMC551 is not set
+# CONFIG_MTD_SLRAM is not set
+# CONFIG_MTD_PHRAM is not set
+# CONFIG_MTD_MTDRAM is not set
+# CONFIG_MTD_BLOCK2MTD is not set
+
+#
+# Disk-On-Chip Device Drivers
+#
+# CONFIG_MTD_DOC2000 is not set
+# CONFIG_MTD_DOC2001 is not set
+# CONFIG_MTD_DOC2001PLUS is not set
+CONFIG_MTD_NAND=y
+# CONFIG_MTD_NAND_VERIFY_WRITE is not set
+# CONFIG_MTD_NAND_ECC_SMC is not set
+# CONFIG_MTD_NAND_MUSEUM_IDS is not set
+CONFIG_MTD_NAND_IDS=y
+# CONFIG_MTD_NAND_DISKONCHIP is not set
+# CONFIG_MTD_NAND_CAFE is not set
+# CONFIG_MTD_NAND_NANDSIM is not set
+# CONFIG_MTD_NAND_PLATFORM is not set
+# CONFIG_MTD_ALAUDA is not set
+# CONFIG_MTD_NAND_FSL_ELBC is not set
+CONFIG_MTD_NAND_FSL_UPM=y
+# CONFIG_MTD_ONENAND is not set
+
+#
+# UBI - Unsorted block images
+#
+# CONFIG_MTD_UBI is not set
CONFIG_OF_DEVICE=y
+CONFIG_OF_I2C=y
# CONFIG_PARPORT is not set
CONFIG_BLK_DEV=y
# CONFIG_BLK_DEV_FD is not set
@@ -503,7 +609,11 @@ CONFIG_SCSI_LOWLEVEL=y
# CONFIG_SCSI_SRP is not set
CONFIG_ATA=y
# CONFIG_ATA_NONSTANDARD is not set
+CONFIG_SATA_PMP=y
CONFIG_SATA_AHCI=y
+# CONFIG_SATA_SIL24 is not set
+# CONFIG_SATA_FSL is not set
+CONFIG_ATA_SFF=y
# CONFIG_SATA_SVW is not set
# CONFIG_ATA_PIIX is not set
# CONFIG_SATA_MV is not set
@@ -513,13 +623,11 @@ CONFIG_SATA_AHCI=y
# CONFIG_SATA_PROMISE is not set
# CONFIG_SATA_SX4 is not set
# CONFIG_SATA_SIL is not set
-# CONFIG_SATA_SIL24 is not set
# CONFIG_SATA_SIS is not set
# CONFIG_SATA_ULI is not set
# CONFIG_SATA_VIA is not set
# CONFIG_SATA_VITESSE is not set
# CONFIG_SATA_INIC162X is not set
-# CONFIG_SATA_FSL is not set
CONFIG_PATA_ALI=y
# CONFIG_PATA_AMD is not set
# CONFIG_PATA_ARTOP is not set
@@ -559,6 +667,7 @@ CONFIG_PATA_ALI=y
# CONFIG_PATA_VIA is not set
# CONFIG_PATA_WINBOND is not set
# CONFIG_PATA_PLATFORM is not set
+# CONFIG_PATA_SCH is not set
# CONFIG_MD is not set
# CONFIG_FUSION is not set
@@ -594,7 +703,7 @@ CONFIG_VITESSE_PHY=y
# CONFIG_ICPLUS_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_FIXED_PHY is not set
-# CONFIG_MDIO_BITBANG is not set
+CONFIG_MDIO_BITBANG=y
CONFIG_NET_ETHERNET=y
CONFIG_MII=y
# CONFIG_HAPPYMEAL is not set
@@ -609,7 +718,10 @@ CONFIG_MII=y
# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
# CONFIG_NET_PCI is not set
# CONFIG_B44 is not set
-# CONFIG_FS_ENET is not set
+CONFIG_FS_ENET=y
+# CONFIG_FS_ENET_HAS_SCC is not set
+CONFIG_FS_ENET_HAS_FCC=y
+CONFIG_FS_ENET_MDIO_FCC=y
CONFIG_NETDEV_1000=y
# CONFIG_ACENIC is not set
# CONFIG_DL2K is not set
@@ -625,7 +737,6 @@ CONFIG_NETDEV_1000=y
# CONFIG_SIS190 is not set
# CONFIG_SKGE is not set
# CONFIG_SKY2 is not set
-# CONFIG_SK98LIN is not set
# CONFIG_VIA_VELOCITY is not set
# CONFIG_TIGON3 is not set
# CONFIG_BNX2 is not set
@@ -646,6 +757,7 @@ CONFIG_NETDEV_10000=y
# CONFIG_MLX4_CORE is not set
# CONFIG_TEHUTI is not set
# CONFIG_BNX2X is not set
+# CONFIG_SFC is not set
# CONFIG_TR is not set
#
@@ -653,6 +765,7 @@ CONFIG_NETDEV_10000=y
#
# CONFIG_WLAN_PRE80211 is not set
# CONFIG_WLAN_80211 is not set
+# CONFIG_IWLWIFI_LEDS is not set
#
# USB Network Adapters
@@ -717,6 +830,7 @@ CONFIG_VT=y
CONFIG_VT_CONSOLE=y
CONFIG_HW_CONSOLE=y
# CONFIG_VT_HW_CONSOLE_BINDING is not set
+CONFIG_DEVKMEM=y
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_NOZOMI is not set
@@ -740,7 +854,14 @@ CONFIG_SERIAL_8250_RSA=y
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
-# CONFIG_SERIAL_CPM is not set
+CONFIG_SERIAL_CPM=y
+CONFIG_SERIAL_CPM_CONSOLE=y
+CONFIG_SERIAL_CPM_SCC1=y
+# CONFIG_SERIAL_CPM_SCC2 is not set
+# CONFIG_SERIAL_CPM_SCC3 is not set
+# CONFIG_SERIAL_CPM_SCC4 is not set
+# CONFIG_SERIAL_CPM_SMC1 is not set
+# CONFIG_SERIAL_CPM_SMC2 is not set
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_OF_PLATFORM is not set
# CONFIG_SERIAL_QE is not set
@@ -750,7 +871,6 @@ CONFIG_LEGACY_PTY_COUNT=256
# CONFIG_IPMI_HANDLER is not set
# CONFIG_HW_RANDOM is not set
CONFIG_NVRAM=y
-# CONFIG_GEN_RTC is not set
# CONFIG_R3964 is not set
# CONFIG_APPLICOM is not set
# CONFIG_RAW_DRIVER is not set
@@ -761,13 +881,6 @@ CONFIG_I2C_BOARDINFO=y
# CONFIG_I2C_CHARDEV is not set
#
-# I2C Algorithms
-#
-# CONFIG_I2C_ALGOBIT is not set
-# CONFIG_I2C_ALGOPCF is not set
-# CONFIG_I2C_ALGOPCA is not set
-
-#
# I2C Hardware Bus support
#
# CONFIG_I2C_ALI1535 is not set
@@ -794,6 +907,7 @@ CONFIG_I2C_MPC=y
# CONFIG_I2C_VIA is not set
# CONFIG_I2C_VIAPRO is not set
# CONFIG_I2C_VOODOO3 is not set
+# CONFIG_I2C_PCA_PLATFORM is not set
#
# Miscellaneous I2C Chip support
@@ -803,22 +917,69 @@ CONFIG_SENSORS_EEPROM=y
# CONFIG_SENSORS_PCF8574 is not set
# CONFIG_PCF8575 is not set
# CONFIG_SENSORS_PCF8591 is not set
-# CONFIG_TPS65010 is not set
# CONFIG_SENSORS_MAX6875 is not set
# CONFIG_SENSORS_TSL2550 is not set
# CONFIG_I2C_DEBUG_CORE is not set
# CONFIG_I2C_DEBUG_ALGO is not set
# CONFIG_I2C_DEBUG_BUS is not set
# CONFIG_I2C_DEBUG_CHIP is not set
-
-#
-# SPI support
-#
# CONFIG_SPI is not set
-# CONFIG_SPI_MASTER is not set
# CONFIG_W1 is not set
# CONFIG_POWER_SUPPLY is not set
-# CONFIG_HWMON is not set
+CONFIG_HWMON=y
+# CONFIG_HWMON_VID is not set
+# CONFIG_SENSORS_AD7418 is not set
+# CONFIG_SENSORS_ADM1021 is not set
+# CONFIG_SENSORS_ADM1025 is not set
+# CONFIG_SENSORS_ADM1026 is not set
+# CONFIG_SENSORS_ADM1029 is not set
+# CONFIG_SENSORS_ADM1031 is not set
+# CONFIG_SENSORS_ADM9240 is not set
+# CONFIG_SENSORS_ADT7470 is not set
+# CONFIG_SENSORS_ADT7473 is not set
+# CONFIG_SENSORS_ATXP1 is not set
+# CONFIG_SENSORS_DS1621 is not set
+# CONFIG_SENSORS_I5K_AMB is not set
+# CONFIG_SENSORS_F71805F is not set
+# CONFIG_SENSORS_F71882FG is not set
+# CONFIG_SENSORS_F75375S is not set
+# CONFIG_SENSORS_GL518SM is not set
+# CONFIG_SENSORS_GL520SM is not set
+# CONFIG_SENSORS_IT87 is not set
+# CONFIG_SENSORS_LM63 is not set
+CONFIG_SENSORS_LM75=y
+# CONFIG_SENSORS_LM77 is not set
+# CONFIG_SENSORS_LM78 is not set
+# CONFIG_SENSORS_LM80 is not set
+# CONFIG_SENSORS_LM83 is not set
+# CONFIG_SENSORS_LM85 is not set
+# CONFIG_SENSORS_LM87 is not set
+# CONFIG_SENSORS_LM90 is not set
+# CONFIG_SENSORS_LM92 is not set
+# CONFIG_SENSORS_LM93 is not set
+# CONFIG_SENSORS_MAX1619 is not set
+# CONFIG_SENSORS_MAX6650 is not set
+# CONFIG_SENSORS_PC87360 is not set
+# CONFIG_SENSORS_PC87427 is not set
+# CONFIG_SENSORS_SIS5595 is not set
+# CONFIG_SENSORS_DME1737 is not set
+# CONFIG_SENSORS_SMSC47M1 is not set
+# CONFIG_SENSORS_SMSC47M192 is not set
+# CONFIG_SENSORS_SMSC47B397 is not set
+# CONFIG_SENSORS_ADS7828 is not set
+# CONFIG_SENSORS_THMC50 is not set
+# CONFIG_SENSORS_VIA686A is not set
+# CONFIG_SENSORS_VT1211 is not set
+# CONFIG_SENSORS_VT8231 is not set
+# CONFIG_SENSORS_W83781D is not set
+# CONFIG_SENSORS_W83791D is not set
+# CONFIG_SENSORS_W83792D is not set
+# CONFIG_SENSORS_W83793 is not set
+# CONFIG_SENSORS_W83L785TS is not set
+# CONFIG_SENSORS_W83L786NG is not set
+# CONFIG_SENSORS_W83627HF is not set
+# CONFIG_SENSORS_W83627EHF is not set
+# CONFIG_HWMON_DEBUG_CHIP is not set
# CONFIG_THERMAL is not set
# CONFIG_WATCHDOG is not set
@@ -832,13 +993,33 @@ CONFIG_SSB_POSSIBLE=y
# Multifunction device drivers
#
# CONFIG_MFD_SM501 is not set
+# CONFIG_HTC_PASIC3 is not set
#
# Multimedia devices
#
+
+#
+# Multimedia core support
+#
# CONFIG_VIDEO_DEV is not set
CONFIG_DVB_CORE=m
-# CONFIG_DVB_CORE_ATTACH is not set
+CONFIG_VIDEO_MEDIA=m
+
+#
+# Multimedia drivers
+#
+# CONFIG_MEDIA_ATTACH is not set
+CONFIG_MEDIA_TUNER=m
+# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
+CONFIG_MEDIA_TUNER_SIMPLE=m
+CONFIG_MEDIA_TUNER_TDA8290=m
+CONFIG_MEDIA_TUNER_TDA9887=m
+CONFIG_MEDIA_TUNER_TEA5761=m
+CONFIG_MEDIA_TUNER_TEA5767=m
+CONFIG_MEDIA_TUNER_MT20XX=m
+CONFIG_MEDIA_TUNER_XC2028=m
+CONFIG_MEDIA_TUNER_XC5000=m
CONFIG_DVB_CAPTURE_DRIVERS=y
#
@@ -881,14 +1062,17 @@ CONFIG_DVB_CAPTURE_DRIVERS=y
#
# DVB-S (satellite) frontends
#
-# CONFIG_DVB_STV0299 is not set
# CONFIG_DVB_CX24110 is not set
# CONFIG_DVB_CX24123 is not set
-# CONFIG_DVB_TDA8083 is not set
# CONFIG_DVB_MT312 is not set
-# CONFIG_DVB_VES1X93 is not set
# CONFIG_DVB_S5H1420 is not set
+# CONFIG_DVB_STV0299 is not set
+# CONFIG_DVB_TDA8083 is not set
# CONFIG_DVB_TDA10086 is not set
+# CONFIG_DVB_VES1X93 is not set
+# CONFIG_DVB_TUNER_ITD1000 is not set
+# CONFIG_DVB_TDA826X is not set
+# CONFIG_DVB_TUA6100 is not set
#
# DVB-T (terrestrial) frontends
@@ -906,6 +1090,7 @@ CONFIG_DVB_CAPTURE_DRIVERS=y
# CONFIG_DVB_DIB3000MC is not set
# CONFIG_DVB_DIB7000M is not set
# CONFIG_DVB_DIB7000P is not set
+# CONFIG_DVB_TDA10048 is not set
#
# DVB-C (cable) frontends
@@ -924,27 +1109,21 @@ CONFIG_DVB_CAPTURE_DRIVERS=y
# CONFIG_DVB_BCM3510 is not set
# CONFIG_DVB_LGDT330X is not set
# CONFIG_DVB_S5H1409 is not set
+# CONFIG_DVB_AU8522 is not set
+# CONFIG_DVB_S5H1411 is not set
#
-# Tuners/PLL support
+# Digital terrestrial only tuners/PLL
#
# CONFIG_DVB_PLL is not set
-# CONFIG_DVB_TDA826X is not set
-# CONFIG_DVB_TDA827X is not set
-# CONFIG_DVB_TDA18271 is not set
-# CONFIG_DVB_TUNER_QT1010 is not set
-# CONFIG_DVB_TUNER_MT2060 is not set
-# CONFIG_DVB_TUNER_MT2266 is not set
-# CONFIG_DVB_TUNER_MT2131 is not set
# CONFIG_DVB_TUNER_DIB0070 is not set
-# CONFIG_DVB_TUNER_XC5000 is not set
#
-# Miscellaneous devices
+# SEC control devices for DVB-S
#
# CONFIG_DVB_LNBP21 is not set
+# CONFIG_DVB_ISL6405 is not set
# CONFIG_DVB_ISL6421 is not set
-# CONFIG_DVB_TUA6100 is not set
CONFIG_DAB=y
# CONFIG_USB_DABUSB is not set
@@ -1011,6 +1190,7 @@ CONFIG_SND_AC97_CODEC=y
# CONFIG_SND_AU8810 is not set
# CONFIG_SND_AU8820 is not set
# CONFIG_SND_AU8830 is not set
+# CONFIG_SND_AW2 is not set
# CONFIG_SND_AZT3328 is not set
# CONFIG_SND_BT87X is not set
# CONFIG_SND_CA0106 is not set
@@ -1085,11 +1265,11 @@ CONFIG_SND_INTEL8X0=y
# CONFIG_SND_SOC is not set
#
-# SoC Audio support for SuperH
+# ALSA SoC audio for Freescale SOCs
#
#
-# ALSA SoC audio for Freescale SOCs
+# SoC Audio for the Texas Instruments OMAP
#
#
@@ -1124,16 +1304,20 @@ CONFIG_USB_DEVICEFS=y
CONFIG_USB_DEVICE_CLASS=y
# CONFIG_USB_DYNAMIC_MINORS is not set
# CONFIG_USB_OTG is not set
+# CONFIG_USB_OTG_WHITELIST is not set
+# CONFIG_USB_OTG_BLACKLIST_HUB is not set
#
# USB Host Controller Drivers
#
+# CONFIG_USB_C67X00_HCD is not set
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
# CONFIG_USB_EHCI_FSL is not set
CONFIG_USB_EHCI_HCD_PPC_OF=y
# CONFIG_USB_ISP116X_HCD is not set
+# CONFIG_USB_ISP1760_HCD is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_HCD_PPC_OF=y
CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
@@ -1151,6 +1335,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
#
# CONFIG_USB_ACM is not set
# CONFIG_USB_PRINTER is not set
+# CONFIG_USB_WDM is not set
#
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -1170,7 +1355,9 @@ CONFIG_USB_STORAGE=y
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
+# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
+# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_LIBUSUAL is not set
#
@@ -1208,10 +1395,12 @@ CONFIG_USB_MON=y
# CONFIG_USB_TRANCEVIBRATOR is not set
# CONFIG_USB_IOWARRIOR is not set
# CONFIG_USB_TEST is not set
+# CONFIG_USB_ISIGHTFW is not set
# CONFIG_USB_GADGET is not set
# CONFIG_MMC is not set
# CONFIG_MEMSTICK is not set
# CONFIG_NEW_LEDS is not set
+# CONFIG_ACCESSIBILITY is not set
# CONFIG_INFINIBAND is not set
# CONFIG_EDAC is not set
CONFIG_RTC_LIB=y
@@ -1232,7 +1421,7 @@ CONFIG_RTC_INTF_DEV=y
#
# I2C RTC drivers
#
-# CONFIG_RTC_DRV_DS1307 is not set
+CONFIG_RTC_DRV_DS1307=y
# CONFIG_RTC_DRV_DS1374 is not set
# CONFIG_RTC_DRV_DS1672 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
@@ -1263,11 +1452,8 @@ CONFIG_RTC_DRV_CMOS=y
#
# on-CPU RTC drivers
#
+# CONFIG_RTC_DRV_PPC is not set
# CONFIG_DMADEVICES is not set
-
-#
-# Userspace I/O
-#
# CONFIG_UIO is not set
#
@@ -1287,7 +1473,6 @@ CONFIG_FS_MBCACHE=y
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
-# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
CONFIG_DNOTIFY=y
CONFIG_INOTIFY=y
@@ -1342,6 +1527,7 @@ CONFIG_BEFS_FS=m
# CONFIG_BEFS_DEBUG is not set
CONFIG_BFS_FS=m
CONFIG_EFS_FS=m
+# CONFIG_JFFS2_FS is not set
CONFIG_CRAMFS=y
CONFIG_VXFS_FS=m
# CONFIG_MINIX_FS is not set
@@ -1357,10 +1543,9 @@ CONFIG_NFS_FS=y
CONFIG_NFS_V3=y
# CONFIG_NFS_V3_ACL is not set
CONFIG_NFS_V4=y
-# CONFIG_NFS_DIRECTIO is not set
CONFIG_NFSD=y
# CONFIG_NFSD_V3 is not set
-CONFIG_NFSD_TCP=y
+# CONFIG_NFSD_V4 is not set
CONFIG_ROOT_NFS=y
CONFIG_LOCKD=y
CONFIG_LOCKD_V4=y
@@ -1439,14 +1624,16 @@ CONFIG_NLS_DEFAULT="iso8859-1"
# CONFIG_NLS_KOI8_U is not set
CONFIG_NLS_UTF8=m
# CONFIG_DLM is not set
+# CONFIG_QE_GPIO is not set
#
# Library routines
#
CONFIG_BITREVERSE=y
+# CONFIG_GENERIC_FIND_FIRST_BIT is not set
# CONFIG_CRC_CCITT is not set
# CONFIG_CRC16 is not set
-# CONFIG_CRC_ITU_T is not set
+CONFIG_CRC_ITU_T=m
CONFIG_CRC32=y
# CONFIG_CRC7 is not set
CONFIG_LIBCRC32C=m
@@ -1455,6 +1642,7 @@ CONFIG_PLIST=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y
+CONFIG_HAVE_LMB=y
#
# Kernel hacking
@@ -1462,6 +1650,7 @@ CONFIG_HAS_DMA=y
# CONFIG_PRINTK_TIME is not set
CONFIG_ENABLE_WARN_DEPRECATED=y
CONFIG_ENABLE_MUST_CHECK=y
+CONFIG_FRAME_WARN=1024
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_DEBUG_FS is not set
@@ -1472,6 +1661,7 @@ CONFIG_DETECT_SOFTLOCKUP=y
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# CONFIG_TIMER_STATS is not set
+# CONFIG_DEBUG_OBJECTS is not set
# CONFIG_SLUB_DEBUG_ON is not set
# CONFIG_SLUB_STATS is not set
# CONFIG_DEBUG_RT_MUTEXES is not set
@@ -1485,6 +1675,7 @@ CONFIG_SCHED_DEBUG=y
# CONFIG_DEBUG_BUGVERBOSE is not set
CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_VM is not set
+# CONFIG_DEBUG_WRITECOUNT is not set
# CONFIG_DEBUG_LIST is not set
# CONFIG_DEBUG_SG is not set
# CONFIG_BOOT_PRINTK_DELAY is not set
@@ -1497,6 +1688,7 @@ CONFIG_DEBUG_INFO=y
# CONFIG_DEBUG_PAGEALLOC is not set
# CONFIG_DEBUGGER is not set
# CONFIG_KGDB_CONSOLE is not set
+# CONFIG_IRQSTACKS is not set
# CONFIG_BDI_SWITCH is not set
# CONFIG_PPC_EARLY_DEBUG is not set
@@ -1507,53 +1699,83 @@ CONFIG_DEBUG_INFO=y
# CONFIG_SECURITY is not set
# CONFIG_SECURITY_FILE_CAPABILITIES is not set
CONFIG_CRYPTO=y
+
+#
+# Crypto core or helper
+#
CONFIG_CRYPTO_ALGAPI=y
CONFIG_CRYPTO_BLKCIPHER=y
-# CONFIG_CRYPTO_SEQIV is not set
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_MANAGER=y
+# CONFIG_CRYPTO_GF128MUL is not set
+# CONFIG_CRYPTO_NULL is not set
+# CONFIG_CRYPTO_CRYPTD is not set
+# CONFIG_CRYPTO_AUTHENC is not set
+# CONFIG_CRYPTO_TEST is not set
+
+#
+# Authenticated Encryption with Associated Data
+#
+# CONFIG_CRYPTO_CCM is not set
+# CONFIG_CRYPTO_GCM is not set
+# CONFIG_CRYPTO_SEQIV is not set
+
+#
+# Block modes
+#
+CONFIG_CRYPTO_CBC=y
+# CONFIG_CRYPTO_CTR is not set
+# CONFIG_CRYPTO_CTS is not set
+# CONFIG_CRYPTO_ECB is not set
+# CONFIG_CRYPTO_LRW is not set
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_XTS is not set
+
+#
+# Hash modes
+#
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_XCBC is not set
-# CONFIG_CRYPTO_NULL is not set
+
+#
+# Digest
+#
+# CONFIG_CRYPTO_CRC32C is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=y
+# CONFIG_CRYPTO_MICHAEL_MIC is not set
CONFIG_CRYPTO_SHA1=m
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
-# CONFIG_CRYPTO_WP512 is not set
# CONFIG_CRYPTO_TGR192 is not set
-# CONFIG_CRYPTO_GF128MUL is not set
-# CONFIG_CRYPTO_ECB is not set
-CONFIG_CRYPTO_CBC=y
-CONFIG_CRYPTO_PCBC=m
-# CONFIG_CRYPTO_LRW is not set
-# CONFIG_CRYPTO_XTS is not set
-# CONFIG_CRYPTO_CTR is not set
-# CONFIG_CRYPTO_GCM is not set
-# CONFIG_CRYPTO_CCM is not set
-# CONFIG_CRYPTO_CRYPTD is not set
-CONFIG_CRYPTO_DES=y
-# CONFIG_CRYPTO_FCRYPT is not set
-# CONFIG_CRYPTO_BLOWFISH is not set
-# CONFIG_CRYPTO_TWOFISH is not set
-# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_WP512 is not set
+
+#
+# Ciphers
+#
# CONFIG_CRYPTO_AES is not set
+# CONFIG_CRYPTO_ANUBIS is not set
+# CONFIG_CRYPTO_ARC4 is not set
+# CONFIG_CRYPTO_BLOWFISH is not set
+# CONFIG_CRYPTO_CAMELLIA is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
-# CONFIG_CRYPTO_TEA is not set
-# CONFIG_CRYPTO_ARC4 is not set
+CONFIG_CRYPTO_DES=y
+# CONFIG_CRYPTO_FCRYPT is not set
# CONFIG_CRYPTO_KHAZAD is not set
-# CONFIG_CRYPTO_ANUBIS is not set
-# CONFIG_CRYPTO_SEED is not set
# CONFIG_CRYPTO_SALSA20 is not set
+# CONFIG_CRYPTO_SEED is not set
+# CONFIG_CRYPTO_SERPENT is not set
+# CONFIG_CRYPTO_TEA is not set
+# CONFIG_CRYPTO_TWOFISH is not set
+
+#
+# Compression
+#
# CONFIG_CRYPTO_DEFLATE is not set
-# CONFIG_CRYPTO_MICHAEL_MIC is not set
-# CONFIG_CRYPTO_CRC32C is not set
-# CONFIG_CRYPTO_CAMELLIA is not set
-# CONFIG_CRYPTO_TEST is not set
-# CONFIG_CRYPTO_AUTHENC is not set
# CONFIG_CRYPTO_LZO is not set
CONFIG_CRYPTO_HW=y
# CONFIG_CRYPTO_DEV_HIFN_795X is not set
# CONFIG_PPC_CLOCK is not set
CONFIG_PPC_LIB_RHEAP=y
+# CONFIG_VIRTUALIZATION is not set
^ permalink raw reply
* Re: [PATCH 4/5] Helper routines for parsing drconf memory
From: Paul Mackerras @ 2008-06-30 12:41 UTC (permalink / raw)
To: Nathan Fontenot; +Cc: linuxppc-dev
In-Reply-To: <485C226B.6050807@austin.ibm.com>
Nathan Fontenot writes:
> This patch pulls several pieces of exisitng code for parsing memory under
> the ibm,dynamic-reconfiguration-memory node of the device tree into helper
> routines. This is in preparation for the next patch that will also use these
> same helper routines. There are no functional changes in this patch.
I went to apply this, but it is whitespace-damaged...
Paul.
^ permalink raw reply
* High Memory problem on 2.4.22 Linux, 2GB ppc card
From: Ruksen INANIR @ 2008-06-30 9:22 UTC (permalink / raw)
To: linuxppc-embedded
Hi all,
I am working on a PPC Motorola card, which runs Linux 2.4.22. The
card has 2 GB onboard memory. But with use 1456 MB of the available
memory. To increase the memory capacity i need to increase the used
memory at least 64 MB. With CONFIG_HIGHMEM option all of the 2 GB memory
can be used but, but the fc driver on the card has no high memory
support, so this caused problems.
Then i saw that the memory is limited to 1456 by
#define MAX_LOW_MEM 0x5B000000 setting in pgtable.c. I tried
to increase it by 64 MB but i could only increase the value of
MAX_LOW_MEM by 47 MB (1503 MB) without CONFIG_HIGHMEM option.
1)Is there any other setting that i should set other than
MAX_LOW_MEM to increase the usable memory to 1520 ?
2)I knew that the addressable physical memory without high memory
option was 1 G. How was it possible to address 1503 MB without
CONFIG_HIGHMEM ? What is the max usable memory for 2.4.22 kernel?
Thanks,
Rinanir.
^ permalink raw reply
page: next (older) | prev (newer) | latest
- recent:[subjects (threaded)|topics (new)|topics (active)]
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox