* Re: [PATCH] fec fix: Use OF 'ethernet' device as a provider of dma ops.
From: Grant Likely @ 2009-04-03 14:18 UTC (permalink / raw)
To: Grzegorz Bernacki; +Cc: linuxppc-dev
In-Reply-To: <12387682193290-git-send-email-gjb@semihalf.com>
This is already fixed in the netdev tree
g.
On Fri, Apr 3, 2009 at 8:16 AM, Grzegorz Bernacki <gjb@semihalf.com> wrote:
> Commit 4ae0ff6 "powerpc: expect all devices calling dma
> ops to have archdata set" assumes that all devices use
> correct dma ops. However FEC uses dma ops from 'eth'
> device which doesn't have proper archdata. This patch
> makes FEC use dma operation from OF 'ethernet' device,
> similarly to what other drivers (like gianfar) do.
>
> Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
> ---
> This is fix for not working FEC. Mounting root
> filesystem via NFS ends up with:
>
> Kernel BUG at c021b788 [verbose debug info unavailable]
> Oops: Exception in kernel mode, sig: 5 [#1]
> mpc5200-simple-platform
> Modules linked in:
> NIP: c021b788 LR: c021b758 CTR: 00000000
> REGS: c3825d40 TRAP: 0700 =A0 Not tainted =A0(2.6.29-07103-gd0b70e8)
> MSR: 00029032 <EE,ME,CE,IR,DR> =A0CR: 42008048 =A0XER: 20000000
> TASK =3D c3820000[1] 'swapper' THREAD: c3824000
> [...]
>
> =A0drivers/net/fec_mpc52xx.c | =A0 31 +++++++++++++++++++++----------
> =A01 files changed, 21 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c
> index cd8e98b..960b239 100644
> --- a/drivers/net/fec_mpc52xx.c
> +++ b/drivers/net/fec_mpc52xx.c
> @@ -58,6 +58,8 @@ struct mpc52xx_fec_priv {
> =A0 =A0 =A0 =A0spinlock_t lock;
> =A0 =A0 =A0 =A0int msg_enable;
>
> + =A0 =A0 =A0 struct of_device *ofdev;
> +
> =A0 =A0 =A0 =A0/* MDIO link details */
> =A0 =A0 =A0 =A0int phy_addr;
> =A0 =A0 =A0 =A0unsigned int phy_speed;
> @@ -124,18 +126,23 @@ static int mpc52xx_fec_set_mac_address(struct net_d=
evice *dev, void *addr)
>
> =A0static void mpc52xx_fec_free_rx_buffers(struct net_device *dev, struct=
bcom_task *s)
> =A0{
> + =A0 =A0 =A0 struct mpc52xx_fec_priv *priv =3D netdev_priv(dev);
> +
> =A0 =A0 =A0 =A0while (!bcom_queue_empty(s)) {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0struct bcom_fec_bd *bd;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0struct sk_buff *skb;
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0skb =3D bcom_retrieve_buffer(s, NULL, (str=
uct bcom_bd **)&bd);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dma_unmap_single(&dev->dev, bd->skb_pa, skb=
->len, DMA_FROM_DEVICE);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 dma_unmap_single(&priv->ofdev->dev, bd->skb=
_pa, skb->len,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 DMA_FROM_DEVICE);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0kfree_skb(skb);
> =A0 =A0 =A0 =A0}
> =A0}
>
> =A0static int mpc52xx_fec_alloc_rx_buffers(struct net_device *dev, struct=
bcom_task *rxtsk)
> =A0{
> + =A0 =A0 =A0 struct mpc52xx_fec_priv *priv =3D netdev_priv(dev);
> +
> =A0 =A0 =A0 =A0while (!bcom_queue_full(rxtsk)) {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0struct sk_buff *skb;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0struct bcom_fec_bd *bd;
> @@ -150,8 +157,8 @@ static int mpc52xx_fec_alloc_rx_buffers(struct net_de=
vice *dev, struct bcom_task
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bd =3D (struct bcom_fec_bd *)bcom_prepare_=
next_buffer(rxtsk);
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bd->status =3D FEC_RX_BUFFER_SIZE;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 bd->skb_pa =3D dma_map_single(&dev->dev, sk=
b->data,
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 FEC_RX_BUFF=
ER_SIZE, DMA_FROM_DEVICE);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 bd->skb_pa =3D dma_map_single(&priv->ofdev-=
>dev, skb->data,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE);
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bcom_submit_next_buffer(rxtsk, skb);
> =A0 =A0 =A0 =A0}
> @@ -388,7 +395,8 @@ static int mpc52xx_fec_hard_start_xmit(struct sk_buff=
*skb, struct net_device *d
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bcom_prepare_next_buffer(priv->tx_dmatsk);
>
> =A0 =A0 =A0 =A0bd->status =3D skb->len | BCOM_FEC_TX_BD_TFD | BCOM_FEC_TX=
_BD_TC;
> - =A0 =A0 =A0 bd->skb_pa =3D dma_map_single(&dev->dev, skb->data, skb->le=
n, DMA_TO_DEVICE);
> + =A0 =A0 =A0 bd->skb_pa =3D dma_map_single(&priv->ofdev->dev, skb->data,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 =A0 =A0 skb->len, DMA_TO_DEVICE);
>
> =A0 =A0 =A0 =A0bcom_submit_next_buffer(priv->tx_dmatsk, skb);
>
> @@ -430,7 +438,8 @@ static irqreturn_t mpc52xx_fec_tx_interrupt(int irq, =
void *dev_id)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0struct bcom_fec_bd *bd;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0skb =3D bcom_retrieve_buffer(priv->tx_dmat=
sk, NULL,
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0(struct bc=
om_bd **)&bd);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dma_unmap_single(&dev->dev, bd->skb_pa, skb=
->len, DMA_TO_DEVICE);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 dma_unmap_single(&priv->ofdev->dev, bd->skb=
_pa, skb->len,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 DMA_TO_DEVICE);
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_kfree_skb_irq(skb);
> =A0 =A0 =A0 =A0}
> @@ -455,7 +464,8 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, =
void *dev_id)
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0rskb =3D bcom_retrieve_buffer(priv->rx_dma=
tsk, &status,
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0(struct bc=
om_bd **)&bd);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dma_unmap_single(&dev->dev, bd->skb_pa, rsk=
b->len, DMA_FROM_DEVICE);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 dma_unmap_single(&priv->ofdev->dev, bd->skb=
_pa, rskb->len,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 DMA_FROM_DEVICE);
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0/* Test for errors in received frame */
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (status & BCOM_FEC_RX_BD_ERRORS) {
> @@ -464,8 +474,9 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, =
void *dev_id)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bcom_prepa=
re_next_buffer(priv->rx_dmatsk);
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bd->status =3D FEC_RX_BUFF=
ER_SIZE;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bd->skb_pa =3D dma_map_sing=
le(&dev->dev, rskb->data,
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 FEC_RX_BUFFER_SIZE, DMA_FROM_DEVICE);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 bd->skb_pa =3D dma_map_sing=
le(&priv->ofdev->dev,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 rskb->data, FEC_RX_BUFFER_SIZE,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 DMA_FROM_DEVICE);
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bcom_submit_next_buffer(pr=
iv->rx_dmatsk, rskb);
>
> @@ -499,7 +510,7 @@ static irqreturn_t mpc52xx_fec_rx_interrupt(int irq, =
void *dev_id)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bcom_prepare_next_buffer(p=
riv->rx_dmatsk);
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bd->status =3D FEC_RX_BUFFER_SIZE;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 bd->skb_pa =3D dma_map_single(&dev->dev, sk=
b->data,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 bd->skb_pa =3D dma_map_single(&priv->ofdev-=
>dev, skb->data,
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0FEC_RX_BUF=
FER_SIZE, DMA_FROM_DEVICE);
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bcom_submit_next_buffer(priv->rx_dmatsk, s=
kb);
> @@ -910,7 +921,7 @@ mpc52xx_fec_probe(struct of_device *op, const struct =
of_device_id *match)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0return -ENOMEM;
>
> =A0 =A0 =A0 =A0priv =3D netdev_priv(ndev);
> -
> + =A0 =A0 =A0 priv->ofdev =3D op;
> =A0 =A0 =A0 =A0/* Reserve FEC control zone */
> =A0 =A0 =A0 =A0rv =3D of_address_to_resource(op->node, 0, &mem);
> =A0 =A0 =A0 =A0if (rv) {
> --
> 1.5.2.2
>
>
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH] powerpc: Keep track of emulated instructions
From: Kumar Gala @ 2009-04-03 14:15 UTC (permalink / raw)
To: Geert Uytterhoeven; +Cc: Linux/PPC Development
In-Reply-To: <alpine.LRH.2.00.0904031404450.32353@vixen.sonytel.be>
On Apr 3, 2009, at 7:08 AM, Geert Uytterhoeven wrote:
> Hi Ben, Kumar,
>
> Finally (after ca. 1.5 years), he're an updated version of my patch
> to keep
> track of emulated instructions. In the light of Kumar's `Emulate
> enough of SPE
> instructions to make gcc happy' patch, he probably also wants to
> keep track of
> the actual runtime overhead.
>
> Changes since last version:
> - arch/powerpc/kernel/sysfs.c is now compiled on ppc32, so we can
> provide
> counters in sysfs on ppc32, too,
> - WARN_EMULATED() is a no-op if CONFIG_SYSCTL is disabled,
> - Add warnings for altivec,
> - Add warnings for recently introduced emulation of vsx and isel
> instructions.
pretty cool. Do we think counters should be sysfs or debugfs?
Also it would be nice to be able to zero out the counters.
- k
^ permalink raw reply
* Re: [PATCH] mtd: physmap_of: Add multiple regions and concatenation support
From: Grant Likely @ 2009-04-03 14:04 UTC (permalink / raw)
To: Stefan Roese; +Cc: linuxppc-dev, devicetree-discuss, linux-mtd
In-Reply-To: <1238752534-7718-1-git-send-email-sr@denx.de>
On Fri, Apr 3, 2009 at 3:55 AM, Stefan Roese <sr@denx.de> wrote:
> This patch adds support to handle multiple non-identical chips in one
> flash device tree node. It also adds concat support to physmap_of. This
> makes it possible to support e.g. the Intel P30 48F4400 chips which
> internally consists of 2 non-identical NOR chips on one die. Additionally
> partitions now can span over multiple chips.
>
> To describe such a chip's, multiple "reg" tuples are now supported in one
> flash device tree node. Here an dts example:
>
> =A0 =A0 =A0 =A0flash@f0000000,0 {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "cfi-flash";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0reg =3D <0 0x00000000 0x02000000
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 0 0x02000000 0x02000000>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0bank-width =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0partition@0 {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0label =3D "test-part1";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0reg =3D <0 0x04000000>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0};
> =A0 =A0 =A0 =A0};
Binding looks good to me. Add a variant of this blurb to
Documentation/powerpc/booting-without-of.txt. For extra credit,
factor out the MTD stuff and move it to
Documentation/powerpc/dts-bindings/. Remember to cc: the
devicetree-discuss@ozlabs.org list when you post the binding
documentation.
> Signed-off-by: Stefan Roese <sr@denx.de>
> CC: Grant Likely <grant.likely@secretlab.ca>
> ---
> =A0drivers/mtd/maps/physmap_of.c | =A0174 ++++++++++++++++++++++++++++---=
----------
> =A01 files changed, 120 insertions(+), 54 deletions(-)
>
> diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.=
c
> index 5fcfec0..c1c2d08 100644
> --- a/drivers/mtd/maps/physmap_of.c
> +++ b/drivers/mtd/maps/physmap_of.c
> @@ -20,13 +20,17 @@
> =A0#include <linux/mtd/mtd.h>
> =A0#include <linux/mtd/map.h>
> =A0#include <linux/mtd/partitions.h>
> +#include <linux/mtd/concat.h>
> =A0#include <linux/of.h>
> =A0#include <linux/of_platform.h>
>
> +#define MAX_RESOURCES =A0 =A0 =A0 =A0 =A04
> +
Why is this static? Instead you could define:
struct of_flash_list {
struct mtd_info *mtd;
struct map_info map;
struct resource *res;
};
struct of_flash {
struct mtd_info *cmtd;
#ifdef CONFIG_MTD_PARTITIONS
struct mtd_partition *parts;
#endif
int list_size; /* number of elements in of_flash_list */
struct of_flash_list list[0];
};
Using a zero length array at the end of the structure allows you to do
this after counting the number of reg tuples:
f =3D kzalloc(sizeof(struct of_flash) + sizeof(struct of_flash_list)*num_ch=
ips);
That eliminates a needless hard limit to the number of flash chips.
> =A0struct of_flash {
> - =A0 =A0 =A0 struct mtd_info =A0 =A0 =A0 =A0 *mtd;
> - =A0 =A0 =A0 struct map_info =A0 =A0 =A0 =A0 map;
> - =A0 =A0 =A0 struct resource =A0 =A0 =A0 =A0 *res;
> + =A0 =A0 =A0 struct mtd_info =A0 =A0 =A0 =A0 *mtd[MAX_RESOURCES];
> + =A0 =A0 =A0 struct mtd_info =A0 =A0 =A0 =A0 *cmtd;
> + =A0 =A0 =A0 struct map_info =A0 =A0 =A0 =A0 map[MAX_RESOURCES];
> + =A0 =A0 =A0 struct resource =A0 =A0 =A0 =A0 *res[MAX_RESOURCES];
> =A0#ifdef CONFIG_MTD_PARTITIONS
> =A0 =A0 =A0 =A0struct mtd_partition =A0 =A0*parts;
> =A0#endif
> @@ -88,28 +92,40 @@ static int parse_obsolete_partitions(struct of_device=
*dev,
> =A0static int of_flash_remove(struct of_device *dev)
> =A0{
> =A0 =A0 =A0 =A0struct of_flash *info;
> + =A0 =A0 =A0 int i;
>
> =A0 =A0 =A0 =A0info =3D dev_get_drvdata(&dev->dev);
> =A0 =A0 =A0 =A0if (!info)
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0return 0;
> =A0 =A0 =A0 =A0dev_set_drvdata(&dev->dev, NULL);
>
> - =A0 =A0 =A0 if (info->mtd) {
> +#ifdef CONFIG_MTD_CONCAT
> + =A0 =A0 =A0 if (info->cmtd !=3D info->mtd[0]) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 del_mtd_device(info->cmtd);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 mtd_concat_destroy(info->cmtd);
> + =A0 =A0 =A0 }
> +#endif
> +
> + =A0 =A0 =A0 if (info->cmtd) {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (OF_FLASH_PARTS(info)) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 del_mtd_partitions(info->mt=
d);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 del_mtd_partitions(info->cm=
td);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0kfree(OF_FLASH_PARTS(info)=
);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0} else {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 del_mtd_device(info->mtd);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 del_mtd_device(info->cmtd);
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0}
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 map_destroy(info->mtd);
> =A0 =A0 =A0 =A0}
>
> - =A0 =A0 =A0 if (info->map.virt)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(info->map.virt);
> + =A0 =A0 =A0 for (i =3D 0; i < MAX_RESOURCES; i++) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (info->mtd[i])
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 map_destroy(info->mtd[i]);
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (info->map[i].virt)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 iounmap(info->map[i].virt);
>
> - =A0 =A0 =A0 if (info->res) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 release_resource(info->res);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 kfree(info->res);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (info->res[i]) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 release_resource(info->res[=
i]);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 kfree(info->res[i]);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 }
> =A0 =A0 =A0 =A0}
>
> =A0 =A0 =A0 =A0return 0;
> @@ -164,15 +180,25 @@ static int __devinit of_flash_probe(struct of_devic=
e *dev,
> =A0 =A0 =A0 =A0const char *probe_type =3D match->data;
> =A0 =A0 =A0 =A0const u32 *width;
> =A0 =A0 =A0 =A0int err;
> -
> - =A0 =A0 =A0 err =3D -ENXIO;
> - =A0 =A0 =A0 if (of_address_to_resource(dp, 0, &res)) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 dev_err(&dev->dev, "Can't get IO address fr=
om device tree\n");
> + =A0 =A0 =A0 int i;
> + =A0 =A0 =A0 int count;
> + =A0 =A0 =A0 const u32 *p;
> + =A0 =A0 =A0 int devices_found =3D 0;
> +
> + =A0 =A0 =A0 /*
> + =A0 =A0 =A0 =A0* Get number of "reg" tuples. Scan for MTD devices on ar=
ea's
> + =A0 =A0 =A0 =A0* described by each "reg" region. This makes it possible=
(including
> + =A0 =A0 =A0 =A0* the concat support) to support the Intel P30 48F4400 c=
hips which
> + =A0 =A0 =A0 =A0* consists internally of 2 non-identical NOR chips on on=
e die.
> + =A0 =A0 =A0 =A0*/
> + =A0 =A0 =A0 p =3D of_get_property(dp, "reg", &count);
> + =A0 =A0 =A0 if (count % 12 !=3D 0) {
This doesn't work. You cannot know the size of each reg tuple until
#address-cells/#size-cells is parsed for the parent node. It won't
always be 12. Use of_n_addr_cells() + of_n_size_cells() to determine
size of each tuple.
Other than that, I think it looks good, but I'll look again when you repost=
.
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* [PATCH] ps3vram: Replace mutex by spinlock + list
From: Geert Uytterhoeven @ 2009-04-03 13:05 UTC (permalink / raw)
To: Jens Axboe; +Cc: Geert Uytterhoeven, linuxppc-dev, linux-kernel, cbe-oss-dev
In-Reply-To: <1238763938-7076-3-git-send-email-Geert.Uytterhoeven@sonycom.com>
Remove the mutex serializing access to the cache.
Instead, queue up new requests on a list if the driver is busy.
This improves sequential write performance by ca. 2%.
Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
---
drivers/block/ps3vram.c | 55 ++++++++++++++++++++++++++++++++++------------
1 files changed, 40 insertions(+), 15 deletions(-)
diff --git a/drivers/block/ps3vram.c b/drivers/block/ps3vram.c
index 3c9ad19..1396038 100644
--- a/drivers/block/ps3vram.c
+++ b/drivers/block/ps3vram.c
@@ -81,8 +81,8 @@ struct ps3vram_priv {
struct ps3vram_cache cache;
- /* Used to serialize cache/DMA operations */
- struct mutex lock;
+ spinlock_t lock; /* protecting list of bios */
+ struct bio *tail;
};
@@ -449,8 +449,6 @@ static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
offset = (unsigned int) (from & (priv->cache.page_size - 1));
avail = priv->cache.page_size - offset;
- mutex_lock(&priv->lock);
-
entry = ps3vram_cache_match(dev, from);
cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
@@ -462,8 +460,6 @@ static int ps3vram_read(struct ps3_system_bus_device *dev, loff_t from,
avail = count;
memcpy(buf, priv->xdr_buf + cached, avail);
- mutex_unlock(&priv->lock);
-
buf += avail;
count -= avail;
from += avail;
@@ -494,8 +490,6 @@ static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
offset = (unsigned int) (to & (priv->cache.page_size - 1));
avail = priv->cache.page_size - offset;
- mutex_lock(&priv->lock);
-
entry = ps3vram_cache_match(dev, to);
cached = CACHE_OFFSET + entry * priv->cache.page_size + offset;
@@ -509,8 +503,6 @@ static int ps3vram_write(struct ps3_system_bus_device *dev, loff_t to,
priv->cache.tags[entry].flags |= CACHE_PAGE_DIRTY;
- mutex_unlock(&priv->lock);
-
buf += avail;
count -= avail;
to += avail;
@@ -552,17 +544,17 @@ static void __devinit ps3vram_proc_init(struct ps3_system_bus_device *dev)
dev_warn(&dev->core, "failed to create /proc entry\n");
}
-static int ps3vram_make_request(struct request_queue *q, struct bio *bio)
+static struct bio *ps3vram_do_bio(struct ps3_system_bus_device *dev,
+ struct bio *bio)
{
- struct ps3_system_bus_device *dev = q->queuedata;
+ struct ps3vram_priv *priv = dev->core.driver_data;
int write = bio_data_dir(bio) == WRITE;
const char *op = write ? "write" : "read";
loff_t offset = bio->bi_sector << 9;
int error = 0;
struct bio_vec *bvec;
unsigned int i;
-
- dev_dbg(&dev->core, "%s\n", __func__);
+ struct bio *next;
bio_for_each_segment(bvec, bio, i) {
/* PS3 is ppc64, so we don't handle highmem */
@@ -593,7 +585,40 @@ static int ps3vram_make_request(struct request_queue *q, struct bio *bio)
dev_dbg(&dev->core, "%s completed\n", op);
out:
+ spin_lock_irq(&priv->lock);
+ next = bio->bi_next;
+ if (!next)
+ priv->tail = NULL;
+ else
+ bio->bi_next = NULL;
+ spin_unlock_irq(&priv->lock);
+
bio_endio(bio, error);
+ return next;
+}
+
+static int ps3vram_make_request(struct request_queue *q, struct bio *bio)
+{
+ struct ps3_system_bus_device *dev = q->queuedata;
+ struct ps3vram_priv *priv = dev->core.driver_data;
+
+ dev_dbg(&dev->core, "%s\n", __func__);
+
+ spin_lock_irq(&priv->lock);
+ if (priv->tail) {
+ priv->tail->bi_next = bio;
+ priv->tail = bio;
+ spin_unlock_irq(&priv->lock);
+ return 0;
+ }
+
+ priv->tail = bio;
+ spin_unlock_irq(&priv->lock);
+
+ do {
+ bio = ps3vram_do_bio(dev, bio);
+ } while (bio);
+
return 0;
}
@@ -613,7 +638,7 @@ static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
goto fail;
}
- mutex_init(&priv->lock);
+ spin_lock_init(&priv->lock);
dev->core.driver_data = priv;
priv = dev->core.driver_data;
--
1.6.0.4
^ permalink raw reply related
* [PATCH] ps3vram: Correct exchanged gotos in ps3vram_probe() error path
From: Geert Uytterhoeven @ 2009-04-03 13:05 UTC (permalink / raw)
To: Jens Axboe
Cc: Geert Uytterhoeven, linuxppc-dev, linux-kernel, Jim Paris,
cbe-oss-dev
In-Reply-To: <1238763938-7076-2-git-send-email-Geert.Uytterhoeven@sonycom.com>
From: Jim Paris <jim@jtan.com>
From: Jim Paris <jim@jtan.com>
Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
---
drivers/block/ps3vram.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/block/ps3vram.c b/drivers/block/ps3vram.c
index 6e73868..3c9ad19 100644
--- a/drivers/block/ps3vram.c
+++ b/drivers/block/ps3vram.c
@@ -635,7 +635,7 @@ static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
if (ps3_open_hv_device(dev)) {
dev_err(&dev->core, "ps3_open_hv_device failed\n");
error = -EAGAIN;
- goto out_close_gpu;
+ goto out_free_xdr_buf;
}
/* Request memory */
@@ -659,7 +659,7 @@ static int __devinit ps3vram_probe(struct ps3_system_bus_device *dev)
dev_err(&dev->core, "lv1_gpu_memory_allocate failed %d\n",
status);
error = -ENOMEM;
- goto out_free_xdr_buf;
+ goto out_close_gpu;
}
/* Request context */
--
1.6.0.4
^ permalink raw reply related
* [PATCH] ps3vram: Use proc_create_data() instead of proc_create()
From: Geert Uytterhoeven @ 2009-04-03 13:05 UTC (permalink / raw)
To: Jens Axboe; +Cc: Geert Uytterhoeven, linuxppc-dev, linux-kernel, cbe-oss-dev
In-Reply-To: <1238763938-7076-1-git-send-email-Geert.Uytterhoeven@sonycom.com>
Use proc_create_data() to avoid race conditions.
Reported-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
---
drivers/block/ps3vram.c | 8 +++-----
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/block/ps3vram.c b/drivers/block/ps3vram.c
index 2e79d2c..6e73868 100644
--- a/drivers/block/ps3vram.c
+++ b/drivers/block/ps3vram.c
@@ -546,12 +546,10 @@ static void __devinit ps3vram_proc_init(struct ps3_system_bus_device *dev)
struct ps3vram_priv *priv = dev->core.driver_data;
struct proc_dir_entry *pde;
- pde = proc_create(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops);
- if (!pde) {
+ pde = proc_create_data(DEVICE_NAME, 0444, NULL, &ps3vram_proc_fops,
+ priv);
+ if (!pde)
dev_warn(&dev->core, "failed to create /proc entry\n");
- return;
- }
- pde->data = priv;
}
static int ps3vram_make_request(struct request_queue *q, struct bio *bio)
--
1.6.0.4
^ permalink raw reply related
* [PATCH] ps3vram: Fix error path (return -EIO) for short read/write
From: Geert Uytterhoeven @ 2009-04-03 13:05 UTC (permalink / raw)
To: Jens Axboe; +Cc: Geert Uytterhoeven, linuxppc-dev, linux-kernel, cbe-oss-dev
Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
---
drivers/block/ps3vram.c | 1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/block/ps3vram.c b/drivers/block/ps3vram.c
index 8eddef3..2e79d2c 100644
--- a/drivers/block/ps3vram.c
+++ b/drivers/block/ps3vram.c
@@ -585,6 +585,7 @@ static int ps3vram_make_request(struct request_queue *q, struct bio *bio)
if (retlen != len) {
dev_err(&dev->core, "Short %s\n", op);
+ error = -EIO;
goto out;
}
--
1.6.0.4
^ permalink raw reply related
* Re: [PATCH] powerpc ptrace block-step
From: Frank Ch. Eigler @ 2009-04-03 12:10 UTC (permalink / raw)
To: Josh Boyer; +Cc: linuxppc-dev, Roland McGrath, utrace-devel
In-Reply-To: <20090403011327.GA16881@zod.rchland.ibm.com>
Josh Boyer <jwboyer@linux.vnet.ibm.com> writes:
> [...] While I would love to believe that systemtap should work
> everywhere, I can't really see it running on an embedded board at
> this point.
FWIW, we have had people running (not compiling) systemtap probe
modules on embedded systems. See "stap -p4" or "stap-server".
- FChE
^ permalink raw reply
* [PATCH] powerpc: Keep track of emulated instructions
From: Geert Uytterhoeven @ 2009-04-03 12:08 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Kumar Gala; +Cc: Linux/PPC Development
Hi Ben, Kumar,
Finally (after ca. 1.5 years), he're an updated version of my patch to keep
track of emulated instructions. In the light of Kumar's `Emulate enough of SPE
instructions to make gcc happy' patch, he probably also wants to keep track of
the actual runtime overhead.
Changes since last version:
- arch/powerpc/kernel/sysfs.c is now compiled on ppc32, so we can provide
counters in sysfs on ppc32, too,
- WARN_EMULATED() is a no-op if CONFIG_SYSCTL is disabled,
- Add warnings for altivec,
- Add warnings for recently introduced emulation of vsx and isel
instructions.
Tested with `mfpvr' on PS3 and AMCC `Sequoia' EV-440EPX.
---
>From 8df6f7d77f28c9a5b82c9512b9dd7688d94d4e33 Mon Sep 17 00:00:00 2001
From: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
Date: Thu, 26 Mar 2009 17:00:12 +0100
Subject: [PATCH] powerpc: Keep track of emulated instructions
Counters for the various classes of emulated instructions are available under
/sys/devices/system/cpu/cpu*/emulated/.
Optionally (controlled by /proc/sys/kernel/cpu_emulation_warnings, if
CONFIG_SYSCTL=y), rate-limited warnings can be printed to the console when
instructions are emulated.
Signed-off-by: Geert Uytterhoeven <Geert.Uytterhoeven@sonycom.com>
---
arch/powerpc/include/asm/emulated_ops.h | 63 +++++++++++++++++++++++++
arch/powerpc/kernel/align.c | 18 ++++++--
arch/powerpc/kernel/sysfs.c | 78 ++++++++++++++++++++++++++++++-
arch/powerpc/kernel/traps.c | 60 +++++++++++++++++++++++-
4 files changed, 212 insertions(+), 7 deletions(-)
create mode 100644 arch/powerpc/include/asm/emulated_ops.h
diff --git a/arch/powerpc/include/asm/emulated_ops.h b/arch/powerpc/include/asm/emulated_ops.h
new file mode 100644
index 0000000..e655034
--- /dev/null
+++ b/arch/powerpc/include/asm/emulated_ops.h
@@ -0,0 +1,63 @@
+/*
+ * Copyright 2007 Sony Corp.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#ifndef _ASM_POWERPC_EMULATED_OPS_H
+#define _ASM_POWERPC_EMULATED_OPS_H
+
+#include <linux/percpu.h>
+
+#include <asm/atomic.h>
+
+#ifdef CONFIG_ALTIVEC
+DECLARE_PER_CPU(atomic_long_t, emulated_altivec);
+#endif
+DECLARE_PER_CPU(atomic_long_t, emulated_dcba);
+DECLARE_PER_CPU(atomic_long_t, emulated_dcbz);
+DECLARE_PER_CPU(atomic_long_t, emulated_fp_pair);
+DECLARE_PER_CPU(atomic_long_t, emulated_isel);
+DECLARE_PER_CPU(atomic_long_t, emulated_mcrxr);
+DECLARE_PER_CPU(atomic_long_t, emulated_mfpvr);
+DECLARE_PER_CPU(atomic_long_t, emulated_multiple);
+DECLARE_PER_CPU(atomic_long_t, emulated_popcntb);
+DECLARE_PER_CPU(atomic_long_t, emulated_spe);
+DECLARE_PER_CPU(atomic_long_t, emulated_string);
+#ifdef CONFIG_MATH_EMULATION
+DECLARE_PER_CPU(atomic_long_t, emulated_math);
+#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
+DECLARE_PER_CPU(atomic_long_t, emulated_8xx);
+#endif
+#ifdef CONFIG_VSX
+DECLARE_PER_CPU(atomic_long_t, emulated_vsx);
+#endif
+
+extern void warn_emulated_print(const char *type);
+
+#ifdef CONFIG_SYSCTL
+extern int sysctl_warn_emulated;
+#else
+#define sysctl_warn_emulated 0
+#endif
+
+#define WARN_EMULATED(type) \
+ do { \
+ atomic_long_inc(&per_cpu(emulated_ ## type, \
+ raw_smp_processor_id())); \
+ if (sysctl_warn_emulated) \
+ warn_emulated_print(#type); \
+ } while (0)
+
+#endif /* _ASM_POWERPC_EMULATED_OPS_H */
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index 5ffcfaa..0f3c31b 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -24,6 +24,7 @@
#include <asm/system.h>
#include <asm/cache.h>
#include <asm/cputable.h>
+#include <asm/emulated_ops.h>
struct aligninfo {
unsigned char len;
@@ -730,8 +731,10 @@ int fix_alignment(struct pt_regs *regs)
areg = dsisr & 0x1f; /* register to update */
#ifdef CONFIG_SPE
- if ((instr >> 26) == 0x4)
+ if ((instr >> 26) == 0x4) {
+ WARN_EMULATED(spe);
return emulate_spe(regs, reg, instr);
+ }
#endif
instr = (dsisr >> 10) & 0x7f;
@@ -783,23 +786,28 @@ int fix_alignment(struct pt_regs *regs)
flags |= SPLT;
nb = 8;
}
+ WARN_EMULATED(vsx);
return emulate_vsx(addr, reg, areg, regs, flags, nb);
}
#endif
/* A size of 0 indicates an instruction we don't support, with
* the exception of DCBZ which is handled as a special case here
*/
- if (instr == DCBZ)
+ if (instr == DCBZ) {
+ WARN_EMULATED(dcbz);
return emulate_dcbz(regs, addr);
+ }
if (unlikely(nb == 0))
return 0;
/* Load/Store Multiple instructions are handled in their own
* function
*/
- if (flags & M)
+ if (flags & M) {
+ WARN_EMULATED(multiple);
return emulate_multiple(regs, addr, reg, nb,
flags, instr, swiz);
+ }
/* Verify the address of the operand */
if (unlikely(user_mode(regs) &&
@@ -816,8 +824,10 @@ int fix_alignment(struct pt_regs *regs)
}
/* Special case for 16-byte FP loads and stores */
- if (nb == 16)
+ if (nb == 16) {
+ WARN_EMULATED(fp_pair);
return emulate_fp_pair(addr, reg, flags);
+ }
/* If we are loading, get the data from user space, else
* get it from register values
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index f41aec8..344d03f 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -17,6 +17,7 @@
#include <asm/prom.h>
#include <asm/machdep.h>
#include <asm/smp.h>
+#include <asm/emulated_ops.h>
#include "cacheinfo.h"
@@ -322,12 +323,82 @@ static struct sysdev_attribute pa6t_attrs[] = {
#endif /* HAS_PPC_PMC_PA6T */
#endif /* HAS_PPC_PMC_CLASSIC */
+#define SYSFS_EMULATED_SETUP(type) \
+DEFINE_PER_CPU(atomic_long_t, emulated_ ## type); \
+static ssize_t show_emulated_ ## type (struct sys_device *dev, \
+ struct sysdev_attribute *attr, \
+ char *buf) \
+{ \
+ struct cpu *cpu = container_of(dev, struct cpu, sysdev); \
+ \
+ return sprintf(buf, "%lu\n", \
+ atomic_long_read(&per_cpu(emulated_ ## type, \
+ cpu->sysdev.id))); \
+} \
+ \
+static struct sysdev_attribute emulated_ ## type ## _attr = { \
+ .attr = { .name = #type, .mode = 0400 }, \
+ .show = show_emulated_ ## type, \
+};
+
+#ifdef CONFIG_ALTIVEC
+SYSFS_EMULATED_SETUP(altivec);
+#endif
+SYSFS_EMULATED_SETUP(dcba);
+SYSFS_EMULATED_SETUP(dcbz);
+SYSFS_EMULATED_SETUP(fp_pair);
+SYSFS_EMULATED_SETUP(isel);
+SYSFS_EMULATED_SETUP(mcrxr);
+SYSFS_EMULATED_SETUP(mfpvr);
+SYSFS_EMULATED_SETUP(multiple);
+SYSFS_EMULATED_SETUP(popcntb);
+SYSFS_EMULATED_SETUP(spe);
+SYSFS_EMULATED_SETUP(string);
+#ifdef CONFIG_MATH_EMULATION
+SYSFS_EMULATED_SETUP(math);
+#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
+SYSFS_EMULATED_SETUP(8xx);
+#endif
+#ifdef CONFIG_VSX
+SYSFS_EMULATED_SETUP(vsx);
+#endif
+
+static struct attribute *emulated_attrs[] = {
+#ifdef CONFIG_ALTIVEC
+ &emulated_altivec_attr.attr,
+#endif
+ &emulated_dcba_attr.attr,
+ &emulated_dcbz_attr.attr,
+ &emulated_fp_pair_attr.attr,
+ &emulated_isel_attr.attr,
+ &emulated_mcrxr_attr.attr,
+ &emulated_mfpvr_attr.attr,
+ &emulated_multiple_attr.attr,
+ &emulated_popcntb_attr.attr,
+ &emulated_spe_attr.attr,
+ &emulated_string_attr.attr,
+#ifdef CONFIG_MATH_EMULATION
+ &emulated_math_attr.attr,
+#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
+ &emulated_8xx_attr.attr,
+#endif
+#ifdef CONFIG_VSX
+ &emulated_vsx_attr.attr,
+#endif
+ NULL
+};
+
+static struct attribute_group emulated_attr_group = {
+ .attrs = emulated_attrs,
+ .name = "emulated"
+};
+
static void __cpuinit register_cpu_online(unsigned int cpu)
{
struct cpu *c = &per_cpu(cpu_devices, cpu);
struct sys_device *s = &c->sysdev;
struct sysdev_attribute *attrs, *pmc_attrs;
- int i, nattrs;
+ int i, nattrs, res;
#ifdef CONFIG_PPC64
if (!firmware_has_feature(FW_FEATURE_ISERIES) &&
@@ -387,6 +458,11 @@ static void __cpuinit register_cpu_online(unsigned int cpu)
#endif /* CONFIG_PPC64 */
cacheinfo_cpu_online(cpu);
+
+ res = sysfs_create_group(&s->kobj, &emulated_attr_group);
+ if (res)
+ pr_warning("Cannot create emulated sysfs group for cpu %u\n",
+ cpu);
}
#ifdef CONFIG_HOTPLUG_CPU
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 678fbff..6cf1e13 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -33,7 +33,9 @@
#include <linux/backlight.h>
#include <linux/bug.h>
#include <linux/kdebug.h>
+#include <linux/sysctl.h>
+#include <asm/emulated_ops.h>
#include <asm/pgtable.h>
#include <asm/uaccess.h>
#include <asm/system.h>
@@ -757,36 +759,44 @@ static int emulate_instruction(struct pt_regs *regs)
/* Emulate the mfspr rD, PVR. */
if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) {
+ WARN_EMULATED(mfpvr);
rd = (instword >> 21) & 0x1f;
regs->gpr[rd] = mfspr(SPRN_PVR);
return 0;
}
/* Emulating the dcba insn is just a no-op. */
- if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA)
+ if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) {
+ WARN_EMULATED(dcba);
return 0;
+ }
/* Emulate the mcrxr insn. */
if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) {
int shift = (instword >> 21) & 0x1c;
unsigned long msk = 0xf0000000UL >> shift;
+ WARN_EMULATED(mcrxr);
regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
regs->xer &= ~0xf0000000UL;
return 0;
}
/* Emulate load/store string insn. */
- if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING)
+ if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) {
+ WARN_EMULATED(string);
return emulate_string_inst(regs, instword);
+ }
/* Emulate the popcntb (Population Count Bytes) instruction. */
if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) {
+ WARN_EMULATED(popcntb);
return emulate_popcntb_inst(regs, instword);
}
/* Emulate isel (Integer Select) instruction */
if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) {
+ WARN_EMULATED(isel);
return emulate_isel(regs, instword);
}
@@ -984,6 +994,8 @@ void SoftwareEmulation(struct pt_regs *regs)
#ifdef CONFIG_MATH_EMULATION
errcode = do_mathemu(regs);
+ if (errcode >= 0)
+ WARN_EMULATED(math);
switch (errcode) {
case 0:
@@ -1005,6 +1017,9 @@ void SoftwareEmulation(struct pt_regs *regs)
#elif defined(CONFIG_8XX_MINIMAL_FPEMU)
errcode = Soft_emulate_8xx(regs);
+ if (errcode >= 0)
+ WARN_EMULATED(8xx);
+
switch (errcode) {
case 0:
emulate_single_step(regs);
@@ -1088,6 +1103,7 @@ void altivec_assist_exception(struct pt_regs *regs)
flush_altivec_to_thread(current);
+ WARN_EMULATED(altivec);
err = emulate_altivec(regs);
if (err == 0) {
regs->nip += 4; /* skip emulated instruction */
@@ -1286,3 +1302,43 @@ void kernel_bad_stack(struct pt_regs *regs)
void __init trap_init(void)
{
}
+
+#ifdef CONFIG_SYSCTL
+int sysctl_warn_emulated;
+
+static ctl_table warn_emulated_ctl_table[] = {
+ {
+ .procname = "cpu_emulation_warnings",
+ .data = &sysctl_warn_emulated,
+ .maxlen = sizeof(int),
+ .mode = 0644,
+ .proc_handler = &proc_dointvec,
+ },
+ {}
+};
+
+static ctl_table warn_emulated_sysctl_root[] = {
+ {
+ .ctl_name = CTL_KERN,
+ .procname = "kernel",
+ .mode = 0555,
+ .child = warn_emulated_ctl_table,
+ },
+ {}
+};
+
+void warn_emulated_print(const char *type)
+{
+ if (printk_ratelimit())
+ pr_warning("%s used emulated %s instruction\n", current->comm,
+ type);
+}
+
+static inline int __init warn_emulated_sysctl_register(void)
+{
+ register_sysctl_table(warn_emulated_sysctl_root);
+ return 0;
+}
+
+device_initcall(warn_emulated_sysctl_register);
+#endif /* !CONFIG_SYSCTL */
--
1.6.0.4
With kind regards,
Geert Uytterhoeven
Software Architect
Sony Techsoft Centre Europe
The Corporate Village · Da Vincilaan 7-D1 · B-1935 Zaventem · Belgium
Phone: +32 (0)2 700 8453
Fax: +32 (0)2 700 8622
E-mail: Geert.Uytterhoeven@sonycom.com
Internet: http://www.sony-europe.com/
A division of Sony Europe (Belgium) N.V.
VAT BE 0413.825.160 · RPR Brussels
Fortis · BIC GEBABEBB · IBAN BE41293037680010
^ permalink raw reply related
* Re: [PATCH 1/1] Fix 64bit Mapple Host Bridge Address and Size Nodes
From: tiejun.china @ 2009-04-03 10:46 UTC (permalink / raw)
To: linuxppc-dev, benh, akpm, michael
Benjamin Herrenschmidt wrote:
> > Thanks.
> >
Firstly sorry for the delay response.
> > Now, is there any reason you can't fold the fix inside the existing
> > fixup_device_tree_maple() fixup ? IE. Does it apply to any Maple board
> > or only this ATCA6101 ?
> >
I really don't validate this on every Maple board since it's impossible to access them for me. I'm glad to improve everything if someone can hold my hand.
> > If not (if it does only apply to this specific board), then give the
> > function a better name, such as fixup_device_tree_atca6101() and make it
> > check for the /model property of the device-tree to make sure you only
> > hit that board and nothing else.
> >
So I have to do the later as you said and please check my v1 patch.
Michael,
Fortunately this patch could be fix something as you expect when you comments one patch about CPC925 on atca6101.
Hope helpful!
Best Regards
Tiejun
> > Cheers,
> > Ben.
> >
> > On Fri, 2009-02-27 at 09:55 +0800, Tiejun Chen wrote:
>> >>
>> >> 2009/2/27 Benjamin Herrenschmidt <benh@kernel.crashing.org>
>> >> On Thu, 2009-02-26 at 18:08 +0800, Tiejun Chen wrote:
>> >> > In the DTB tree created by firmware on Maple 64bit target,
>> >> host bridge
>> >> > parent
>> >> > node has specified both of these two properties to be 2.
>> >> However, the
>> >> > actual
>> >> > "cell" value for host bridge node is 1. we have to provide
>> >> one fixup
>> >> > function.
>> >>
>> >>
>> >> Hi !
>> >>
>> >> Thanks for the patch. A couple of things tho: Can you make it
>> >> a bit
>> >> more robust by properly checking the board type first ?
>> >>
>> >> That is ATCA 6101 and the following is from the MOTLoad firmware.
>> >> ------
>> >> Copyright Motorola Inc. 1999-2006, All Rights Reserved
>> >> MOTLoad RTOS Version 2.0, PAL Version 1.1 RM01
>> >> Built on Tue Jun 13 10:31:56 EDT 2006 by q3316c
>> >> bbs 2.0 build 38
>> >>
>> >> Part Number =01-W3930F04A
>> >> Serial Number =0000001
>> >>
>> >> MPU-Type =PPC970FX DD3.1
>> >> MPU-Int Clock Speed =1800MHz
>> >> Memory Speed =333MHz
>> >>
>> >> PCI bus instance 1 =64 bit, 100 MHz, PCI-X
>> >> PCI bus instance 2 =64 bit, 100 MHz, PCI-X
>> >> PCI bus instance 3 =64 bit, 100 MHz, PCI-X
>> >> PCI bus instance 4 =64 bit, 100 MHz, PCI-X
>> >> PCI bus instance 5 =32 bit, 33 MHz, PCI
>> >>
>> >> HT Link instance 1 =16 bit, 400 MHz
>> >> HT Link instance 2 = 8 bit, 600 MHz
>> >> HT Link instance 3 = 8 bit, 200 MHz
>> >>
>> >> MOTLoad FLASH Image =FLASH Bank A
>> >>
>> >> Local Memory Found =080000000 (&2147483648)
>> >> User Download Buffer =0611A5000:0613A4FFF
>> >> ------
>> >>
>> >> Here is some board information I can know:
>> >> ------
>> >> Board revision: 01
>> >> Boot loader version: 2.0
>> >> Silicon revision: 3.1 (pvr 003c 0301)
>> >> ------
>> >>
>> >>
>> >>
>> >>
>> >> Also, what is this "hostbridge" node ? ie, what does it
>> >> represent ?
>> >>
>> >> That means IBM CPC925 system controller resided on the ATCA 6101.
>> >>
>> >>
>> >>
>> >>
>> >> Can you send me a full dump of /proc/device-tree from the
>> >> machine ?
>> >> (ie tar it up)
>> >>
>> >> See the attachment.
>> >>
>> >>
>> >>
>> >> Finally, it looks like your patch was whitespace damaged by
>> >> your mailer.
>> >>
>> >> After you confirm others is ok I will send v2 improved patch.
>> >>
>> >> Thanks & Best Regards
>> >> Tiejun
>> >>
>> >>
>> >> Cheers,
>> >> Ben.
>> >>
>> >>
>> >>
>> >> > Signed-off-by: Tiejun Chen <tiejun.china@gmail.com>
>> >> > ---
>> >> > arch/powerpc/kernel/prom_init.c | 42
>> >> > +++++++++++++++++++++++++++++++++++++++
>> >> > 1 files changed, 42 insertions(+), 0 deletions(-)
>> >> >
>> >> > diff --git a/arch/powerpc/kernel/prom_init.c
>> >> > b/arch/powerpc/kernel/prom_init.c
>> >> > index 2445945..9cd23b6 100644
>> >> > --- a/arch/powerpc/kernel/prom_init.c
>> >> > +++ b/arch/powerpc/kernel/prom_init.c
>> >> > @@ -1948,8 +1948,49 @@ static void __init
>> >> > fixup_device_tree_maple(void)
>> >> > prom_setprop(isa, name, "ranges",
>> >> > isa_ranges, sizeof(isa_ranges));
>> >> > }
>> >> > +
>> >> > +/* On Maple 64bit target host bridge parent node has
>> >> specified
>> >> > address and
>> >> > + * size properties to be 2. But the actual "cell" value for
>> >> host
>> >> > bridge node
>> >> > + * is 1 since early MOTLoad internal bug. */
>> >> > +static void __init fixup_device_tree_maple_hb(void)
>> >> > +{
>> >> > + phandle hb;
>> >> > + u32 hb_ranges[4];
>> >> > + u32 size_cell, addr_cell;
>> >> > + struct prom_t *_prom = &RELOC(prom);
>> >> > + char *name;
>> >> > +
>> >> > + name = "/hostbridge@f8000000";
>> >> > + hb = call_prom("finddevice", 1, 1, ADDR(name));
>> >> > + if (!PHANDLE_VALID(hb))
>> >> > + return;
>> >> > +
>> >> > + if (prom_getproplen(hb, "reg") != 8)
>> >> > + return;
>> >> > +
>> >> > + if (prom_getprop(hb, "reg", hb_ranges,
>> >> (sizeof(hb_ranges))/2)
>> >> > + == PROM_ERROR)
>> >> > + return;
>> >> > +
>> >> > + prom_getprop(_prom->root, "#address-cells",
>> >> &addr_cell,
>> >> > sizeof(addr_cell));
>> >> > + prom_getprop(_prom->root, "#size-cells", &size_cell,
>> >> > sizeof(size_cell));
>> >> > +
>> >> > + if ((addr_cell != 2) || (size_cell != 2) ||
>> >> > + (hb_ranges[0] != 0xf8000000))
>> >> > + return;
>> >> > +
>> >> > + prom_printf("Fixing up bogus HOSTBRIDGE reg on
>> >> > Maple/Apache...\n");
>> >> > +
>> >> > + hb_ranges[3] = hb_ranges[1];
>> >> > + hb_ranges[1] = hb_ranges[0];
>> >> > + hb_ranges[0] = hb_ranges[2] = 0;
>> >> > + prom_setprop(hb, name, "reg",
>> >> > + hb_ranges, sizeof(hb_ranges));
>> >> > +}
>> >> > +
>> >> > #else
>> >> > #define fixup_device_tree_maple()
>> >> > +#define fixup_device_tree_maple_hb()
>> >> > #endif
>> >> >
>> >> > #ifdef CONFIG_PPC_CHRP
>> >> > @@ -2190,6 +2231,7 @@ static void __init
>> >> fixup_device_tree_efika(void)
>> >> > static void __init fixup_device_tree(void)
>> >> > {
>> >> > fixup_device_tree_maple();
>> >> > + fixup_device_tree_maple_hb();
>> >> > fixup_device_tree_chrp();
>> >> > fixup_device_tree_pmac();
>> >> > fixup_device_tree_efika();
>> >> > --
>> >> > 1.5.6
>> >> >
>> >> >
>> >> >
>> >>
>> >>
>> >>
> >
> > _______________________________________________
> > Linuxppc-dev mailing list
> > Linuxppc-dev@ozlabs.org
> > https://ozlabs.org/mailman/listinfo/linuxppc-dev
> >
^ permalink raw reply
* [v1 PATCH 1/1] Fix 64bit Maple Host Bridge Address and Size Nodes
From: tiejun.china @ 2009-04-03 10:46 UTC (permalink / raw)
To: linuxppc-dev, benh, akpm, michael
In-Reply-To: <1238755594-18869-1-git-send-email-tiejun.china@gmail.com>
In the DTB tree created by firmware on some Maple 64bit targets, such as ATCA6101,
these two properties, address&size, should be 2. But the actual corresponding values
of host bridge node are set 1 incorrectly by the firmware, we have to provide one
fixup function to fix that.
Signed-off-by: Tiejun Chen <tiejun.china@gmail.com>
---
arch/powerpc/kernel/prom_init.c | 51 ++++++++++++++++++++++++++++++++++++++-
1 files changed, 50 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 2445945..7848b45 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1907,14 +1907,63 @@ static void __init flatten_device_tree(void)
}
#ifdef CONFIG_PPC_MAPLE
+/* On ATCA6101 64bit target host bridge parent node has specified address and
+ * size properties to be 2. But the actual "cell" value for host bridge node
+ * is 1 since early MOTLoad internal bug. */
+static void __init fixup_device_tree_atca6101(void)
+{
+ phandle hb;
+ u32 hb_ranges[4];
+ u32 size_cell, addr_cell;
+ struct prom_t *_prom = &RELOC(prom);
+ char *name;
+
+ name = "/hostbridge@f8000000";
+ hb = call_prom("finddevice", 1, 1, ADDR(name));
+ if (!PHANDLE_VALID(hb))
+ return;
+
+ if (prom_getproplen(hb, "reg") != 8)
+ return;
+
+ if (prom_getprop(hb, "reg", hb_ranges, (sizeof(hb_ranges))/2)
+ == PROM_ERROR)
+ return;
+
+ prom_getprop(_prom->root, "#address-cells", &addr_cell, sizeof(addr_cell));
+ prom_getprop(_prom->root, "#size-cells", &size_cell, sizeof(size_cell));
+
+ if ((addr_cell != 2) || (size_cell != 2) ||
+ (hb_ranges[0] != 0xf8000000))
+ return;
+
+ prom_printf("Fixing up bogus HOSTBRIDGE reg on ATCA6101...\n");
+
+ hb_ranges[3] = hb_ranges[1];
+ hb_ranges[1] = hb_ranges[0];
+ hb_ranges[0] = hb_ranges[2] = 0;
+ prom_setprop(hb, name, "reg",
+ hb_ranges, sizeof(hb_ranges));
+}
/* PIBS Version 1.05.0000 04/26/2005 has an incorrect /ht/isa/ranges property.
- * The values are bad, and it doesn't even have the right number of cells. */
+ * The values are bad, and it doesn't even have the right number of cells.
+ * Additionally, the early MOTLoad generate incorrect address&size cells on
+ * some Maple platform such as ATCA6101. */
static void __init fixup_device_tree_maple(void)
{
phandle isa;
u32 rloc = 0x01002000; /* IO space; PCI device = 4 */
u32 isa_ranges[6];
char *name;
+ u32 node;
+ char prop[64];
+ int model;
+
+ /* FIXME: This may be used for more Maple targets not only ATCA6101. */
+ node = call_prom("finddevice", 1, 1, ADDR("/"));
+ model = prom_getprop(node, "model", prop, sizeof(prop));
+ if (model != PROM_ERROR && (strcmp(prop, "Motorola,ATCA-6101") == 0))
+ fixup_device_tree_atca6101();
name = "/ht@0/isa@4";
isa = call_prom("finddevice", 1, 1, ADDR(name));
--
1.5.6
^ permalink raw reply related
* net/mv643xx fix: now rely on 6xx (for Pegasos2 Chrp)
From: Nico Macrionitis @ 2009-04-03 11:16 UTC (permalink / raw)
To: linuxppc-dev
Testing 2.6.29-git9 on Pegasos2 Chrp machine equipped with Marvell Discovery II i was unable to see MV643xx gigabit nic option.
32-bit platforms that relied on PPC32 && PPC_MULTIPLATFORM now rely
on 6xx then this one must be updated too.
-N
---
drivers/net/{Kconfig.orig => Kconfig} | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/net/Kconfig.orig b/drivers/net/Kconfig
index f062b42..6f40f55 100644
--- a/drivers/net/Kconfig.orig
+++ b/drivers/net/Kconfig
@@ -2328,7 +2328,7 @@ config UGETH_TX_ON_DEMAND
config MV643XX_ETH
tristate "Marvell Discovery (643XX) and Orion ethernet support"
- depends on MV64360 || MV64X60 || (PPC_MULTIPLATFORM && PPC32) || PLAT_ORION
+ depends on MV64360 || MV64X60 || 6xx || PLAT_ORION
select INET_LRO
select PHYLIB
help
--
GNU/Linux on Power Architecture
CRUX PPC - http://cruxppc.crux.it/
^ permalink raw reply related
* Re: Interrupt ID number on mpc8347
From: Michael Ellerman @ 2009-04-03 10:57 UTC (permalink / raw)
To: yamazaki seiji; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <20090403163928.4679.YAMAZAKI.SEIJI@kk.jp.panasonic.com>
[-- Attachment #1: Type: text/plain, Size: 820 bytes --]
On Fri, 2009-04-03 at 16:51 +0900, yamazaki seiji wrote:
> I set the Interrupt ID number 17.
> But kernel gives the Interrupt ID number 19.
>
> I wont to know the reasen.
> Please tell me.
It's because the irqs are remapped by the kernel, the number in the
device tree is a hardware irq number. The number you're printing out is
a virtual irq number.
of_irq_to_resource() is doing the remapping for you.
You can turn on CONFIG_VIRQ_DEBUG and you'll get a file in debugfs that
shows the mapping between hardware numbers and virtual numbers.
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply
* [tip:tracing/kmemtrace-v2] tracing, powerpc: fix powerpc tree and tracing tree interaction
From: Stephen Rothwell @ 2009-04-03 10:33 UTC (permalink / raw)
To: linux-tip-commits
Cc: sfr, linux-kernel, linuxppc-dev, srostedt, mingo, paulus, hpa,
tglx, mingo
In-Reply-To: <20090327230834.93d0221d.sfr@canb.auug.org.au>
Commit-ID: a095bdbb136f7bed96b7adf5aa1dd27bb2f839bf
Gitweb: http://git.kernel.org/tip/a095bdbb136f7bed96b7adf5aa1dd27bb2f839bf
Author: Stephen Rothwell <sfr@canb.auug.org.au>
AuthorDate: Fri, 27 Mar 2009 23:08:34 +1100
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Thu, 2 Apr 2009 00:50:24 +0200
tracing, powerpc: fix powerpc tree and tracing tree interaction
Today's linux-next build (powerpc allyesconfig) failed like this:
arch/powerpc/kernel/ftrace.c: In function 'prepare_ftrace_return':
arch/powerpc/kernel/ftrace.c:612: warning: passing argument 3 of 'ftrace_push_return_trace' makes pointer from integer without a cast
arch/powerpc/kernel/ftrace.c:612: error: too many arguments to function 'ftrace_push_return_trace'
Caused by commit 5d1a03dc541dc6672e60e57249ed22f40654ca47
("function-graph: moved the timestamp from arch to generic code") from
the tracing tree which (removed an argument from
ftrace_push_return_trace()) interacting with commit
6794c78243bfda020ab184d6d578944f8e90d26c ("powerpc64: port of the
function graph tracer") from the powerpc tree.
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
Cc: Steven Rostedt <srostedt@redhat.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: <linuxppc-dev@ozlabs.org>
LKML-Reference: <20090327230834.93d0221d.sfr@canb.auug.org.au>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/powerpc/kernel/ftrace.c | 6 +-----
1 files changed, 1 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index 5b5d16b..5455943 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -557,7 +557,6 @@ extern void mod_return_to_handler(void);
void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
{
unsigned long old;
- unsigned long long calltime;
int faulted;
struct ftrace_graph_ent trace;
unsigned long return_hooker = (unsigned long)&return_to_handler;
@@ -606,10 +605,7 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
return;
}
- calltime = cpu_clock(raw_smp_processor_id());
-
- if (ftrace_push_return_trace(old, calltime,
- self_addr, &trace.depth) == -EBUSY) {
+ if (ftrace_push_return_trace(old, self_addr, &trace.depth) == -EBUSY) {
*parent = old;
return;
}
^ permalink raw reply related
* Re: [v1 PATCH 3/3] EDAC: CPC925 MC platform device setup
From: Harry Ciao @ 2009-04-03 10:06 UTC (permalink / raw)
To: michael; +Cc: norsk5, bluesmoke-devel, linux-kernel, linuxppc-dev
In-Reply-To: <1238741478.6802.44.camel@localhost>
Michael Ellerman 写道:
> On Fri, 2009-04-03 at 14:10 +0800, Harry Ciao wrote:
>
>> Setup a platform device for the CPC925 Memory Controller during system
>> booting up, against which CPC925 MC EDAC driver would be matched.
>>
>> Signed-off-by: Harry Ciao <qingtao.cao@windriver.com>
>> ---
>> arch/powerpc/platforms/maple/setup.c | 47 ++++++++++++++++++++++++++++++++++
>> 1 files changed, 47 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
>> index bfd60e4..ca8a3ff 100644
>> --- a/arch/powerpc/platforms/maple/setup.c
>> +++ b/arch/powerpc/platforms/maple/setup.c
>> @@ -335,3 +335,50 @@ define_machine(maple) {
>> .progress = maple_progress,
>> .power_save = power4_idle,
>> };
>> +
>> +#ifdef CONFIG_EDAC
>> +#define CPC925_MC_START 0xf8000000
>> +#define CPC925_MC_END 0xf8ffffff /* sizeof 16MB */
>> +/* Register a platform device for CPC925 memory controller */
>> +static int __init maple_cpc925_edac_setup(void)
>> +{
>> + struct platform_device *pdev;
>> + struct device_node *np = NULL;
>> + struct resource r;
>> +
>> + np = of_find_node_by_name(NULL, "hostbridge");
>>
>
> This is way too generic IMHO. You're going to match on any node called
> "hostbridge" on any 64-bit powerpc machine, there's a good chance there
> are other firmwares out there with such a node, or will be in the
> future.
>
> Is there no compatible or model property you can look for, so you're at
> least somewhat confident you're actually looking at a CPC925?
>
> If not this should be a machine_initcall() for Maple only.
>
>
>> + if (of_address_to_resource(np, 0, &r)) {
>> + /*
>> + * of_address_to_resource() would get the #address-cells
>> + * and #size-cells properties for a node from its parent.
>> + * On Maple 64bit target hostbridge parent node has specified
>> + * both of these two properties to be 2. However, the actual
>> + * "cell" value for host bridge node is 1. Since we can't
>> + * fix this firmware-generated DTB, we have to setup a
>> + * resource structure manually.
>> + */
>> + memset(&r, 0, sizeof(r));
>> + r.start = CPC925_MC_START;
>> + r.end = CPC925_MC_END;
>> + r.name = "hostbridge";
>> + r.flags = IORESOURCE_MEM;
>>
>
> We do have fixups for bogus firmware including maple, look in
> prom_init.c:fixup_device_tree_maple(). Although that's for actual
> firmware, not a DTB.
>
> cheers
>
>
Hi Michael,
Thanks a lot for your comments! I can see it would be much better than
mine. Next whole week I will be on vacation, I will give some serious
thoughts about your ideas and improve my patch in v2 after I come back.
Best regards,
Harry
^ permalink raw reply
* [PATCH] mtd: physmap_of: Add multiple regions and concatenation support
From: Stefan Roese @ 2009-04-03 9:55 UTC (permalink / raw)
To: linux-mtd, linuxppc-dev
This patch adds support to handle multiple non-identical chips in one
flash device tree node. It also adds concat support to physmap_of. This
makes it possible to support e.g. the Intel P30 48F4400 chips which
internally consists of 2 non-identical NOR chips on one die. Additionally
partitions now can span over multiple chips.
To describe such a chip's, multiple "reg" tuples are now supported in one
flash device tree node. Here an dts example:
flash@f0000000,0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000
0 0x02000000 0x02000000>;
bank-width = <2>;
partition@0 {
label = "test-part1";
reg = <0 0x04000000>;
};
};
Signed-off-by: Stefan Roese <sr@denx.de>
CC: Grant Likely <grant.likely@secretlab.ca>
---
drivers/mtd/maps/physmap_of.c | 174 ++++++++++++++++++++++++++++-------------
1 files changed, 120 insertions(+), 54 deletions(-)
diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c
index 5fcfec0..c1c2d08 100644
--- a/drivers/mtd/maps/physmap_of.c
+++ b/drivers/mtd/maps/physmap_of.c
@@ -20,13 +20,17 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
+#include <linux/mtd/concat.h>
#include <linux/of.h>
#include <linux/of_platform.h>
+#define MAX_RESOURCES 4
+
struct of_flash {
- struct mtd_info *mtd;
- struct map_info map;
- struct resource *res;
+ struct mtd_info *mtd[MAX_RESOURCES];
+ struct mtd_info *cmtd;
+ struct map_info map[MAX_RESOURCES];
+ struct resource *res[MAX_RESOURCES];
#ifdef CONFIG_MTD_PARTITIONS
struct mtd_partition *parts;
#endif
@@ -88,28 +92,40 @@ static int parse_obsolete_partitions(struct of_device *dev,
static int of_flash_remove(struct of_device *dev)
{
struct of_flash *info;
+ int i;
info = dev_get_drvdata(&dev->dev);
if (!info)
return 0;
dev_set_drvdata(&dev->dev, NULL);
- if (info->mtd) {
+#ifdef CONFIG_MTD_CONCAT
+ if (info->cmtd != info->mtd[0]) {
+ del_mtd_device(info->cmtd);
+ mtd_concat_destroy(info->cmtd);
+ }
+#endif
+
+ if (info->cmtd) {
if (OF_FLASH_PARTS(info)) {
- del_mtd_partitions(info->mtd);
+ del_mtd_partitions(info->cmtd);
kfree(OF_FLASH_PARTS(info));
} else {
- del_mtd_device(info->mtd);
+ del_mtd_device(info->cmtd);
}
- map_destroy(info->mtd);
}
- if (info->map.virt)
- iounmap(info->map.virt);
+ for (i = 0; i < MAX_RESOURCES; i++) {
+ if (info->mtd[i])
+ map_destroy(info->mtd[i]);
+
+ if (info->map[i].virt)
+ iounmap(info->map[i].virt);
- if (info->res) {
- release_resource(info->res);
- kfree(info->res);
+ if (info->res[i]) {
+ release_resource(info->res[i]);
+ kfree(info->res[i]);
+ }
}
return 0;
@@ -164,15 +180,25 @@ static int __devinit of_flash_probe(struct of_device *dev,
const char *probe_type = match->data;
const u32 *width;
int err;
-
- err = -ENXIO;
- if (of_address_to_resource(dp, 0, &res)) {
- dev_err(&dev->dev, "Can't get IO address from device tree\n");
+ int i;
+ int count;
+ const u32 *p;
+ int devices_found = 0;
+
+ /*
+ * Get number of "reg" tuples. Scan for MTD devices on area's
+ * described by each "reg" region. This makes it possible (including
+ * the concat support) to support the Intel P30 48F4400 chips which
+ * consists internally of 2 non-identical NOR chips on one die.
+ */
+ p = of_get_property(dp, "reg", &count);
+ if (count % 12 != 0) {
+ dev_err(&dev->dev, "Malformed reg property on %s\n",
+ dev->node->full_name);
+ err = -EINVAL;
goto err_out;
}
-
- dev_dbg(&dev->dev, "of_flash device: %.8llx-%.8llx\n",
- (unsigned long long)res.start, (unsigned long long)res.end);
+ count /= 12;
err = -ENOMEM;
info = kzalloc(sizeof(*info), GFP_KERNEL);
@@ -181,50 +207,90 @@ static int __devinit of_flash_probe(struct of_device *dev,
dev_set_drvdata(&dev->dev, info);
- err = -EBUSY;
- info->res = request_mem_region(res.start, res.end - res.start + 1,
- dev_name(&dev->dev));
- if (!info->res)
- goto err_out;
+ for (i = 0; i < count; i++) {
+ err = -ENXIO;
+ if (of_address_to_resource(dp, i, &res)) {
+ dev_err(&dev->dev, "Can't get IO address from device"
+ " tree\n");
+ goto err_out;
+ }
- err = -ENXIO;
- width = of_get_property(dp, "bank-width", NULL);
- if (!width) {
- dev_err(&dev->dev, "Can't get bank width from device tree\n");
- goto err_out;
- }
+ dev_dbg(&dev->dev, "of_flash device: %.8llx-%.8llx\n",
+ (unsigned long long)res.start,
+ (unsigned long long)res.end);
+
+ err = -EBUSY;
+ info->res[i] = request_mem_region(res.start, res.end -
+ res.start + 1,
+ dev_name(&dev->dev));
+ if (!info->res[i])
+ goto err_out;
+
+ err = -ENXIO;
+ width = of_get_property(dp, "bank-width", NULL);
+ if (!width) {
+ dev_err(&dev->dev, "Can't get bank width from device"
+ " tree\n");
+ goto err_out;
+ }
- info->map.name = dev_name(&dev->dev);
- info->map.phys = res.start;
- info->map.size = res.end - res.start + 1;
- info->map.bankwidth = *width;
+ info->map[i].name = dev_name(&dev->dev);
+ info->map[i].phys = res.start;
+ info->map[i].size = res.end - res.start + 1;
+ info->map[i].bankwidth = *width;
+
+ err = -ENOMEM;
+ info->map[i].virt = ioremap(info->map[i].phys,
+ info->map[i].size);
+ if (!info->map[i].virt) {
+ dev_err(&dev->dev, "Failed to ioremap() flash"
+ " region\n");
+ goto err_out;
+ }
- err = -ENOMEM;
- info->map.virt = ioremap(info->map.phys, info->map.size);
- if (!info->map.virt) {
- dev_err(&dev->dev, "Failed to ioremap() flash region\n");
- goto err_out;
- }
+ simple_map_init(&info->map[i]);
- simple_map_init(&info->map);
+ if (probe_type)
+ info->mtd[i] = do_map_probe(probe_type, &info->map[i]);
+ else
+ info->mtd[i] = obsolete_probe(dev, &info->map[i]);
- if (probe_type)
- info->mtd = do_map_probe(probe_type, &info->map);
- else
- info->mtd = obsolete_probe(dev, &info->map);
+ err = -ENXIO;
+ if (!info->mtd[i]) {
+ dev_err(&dev->dev, "do_map_probe() failed\n");
+ goto err_out;
+ } else {
+ devices_found++;
+ }
+ info->mtd[i]->owner = THIS_MODULE;
+ }
- err = -ENXIO;
- if (!info->mtd) {
- dev_err(&dev->dev, "do_map_probe() failed\n");
- goto err_out;
+ err = 0;
+ if (devices_found == 1) {
+ info->cmtd = info->mtd[0];
+ } else if (devices_found > 1) {
+ /*
+ * We detected multiple devices. Concatenate them together.
+ */
+#ifdef CONFIG_MTD_CONCAT
+ info->cmtd = mtd_concat_create(info->mtd, devices_found,
+ dev_name(&dev->dev));
+ if (info->cmtd == NULL)
+ err = -ENXIO;
+#else
+ printk(KERN_ERR "physmap_of: multiple devices "
+ "found but MTD concat support disabled.\n");
+ err = -ENXIO;
+#endif
}
- info->mtd->owner = THIS_MODULE;
+ if (err)
+ goto err_out;
#ifdef CONFIG_MTD_PARTITIONS
/* First look for RedBoot table or partitions on the command
* line, these take precedence over device tree information */
- err = parse_mtd_partitions(info->mtd, part_probe_types,
- &info->parts, 0);
+ err = parse_mtd_partitions(info->cmtd, part_probe_types,
+ &info->parts, 0);
if (err < 0)
return err;
@@ -243,10 +309,10 @@ static int __devinit of_flash_probe(struct of_device *dev,
}
if (err > 0)
- add_mtd_partitions(info->mtd, info->parts, err);
+ add_mtd_partitions(info->cmtd, info->parts, err);
else
#endif
- add_mtd_device(info->mtd);
+ add_mtd_device(info->cmtd);
return 0;
--
1.6.2.2
^ permalink raw reply related
* Interrupt ID number on mpc8347
From: yamazaki seiji @ 2009-04-03 7:51 UTC (permalink / raw)
To: linuxppc-dev@ozlabs.org
Hi all,
I am running the Linux kernel 2.6.28.7 on my PPC8347 BRD.
I have another problem.
I use many external Interrupts.
one of them ,I setup
localbus@f0000000 { //WDT,SW etc.k
reg = <0xf0000000 0x20>;
pci_inta@2{
interrupt-parent = <&ipic>;
interrupts = <17 0x8>;
};
};
on dts file.
And I programmed
struct device_node *np;
struct resource irq_res;
int ret;
char *irqs[]={
"pci_inta",
NULL};
for(i=0;;i++){
if(irqs[i]==NULL){
break;
}
np = of_find_node_by_name(NULL, irqs[i]);
if (np == NULL) {
printk("No %s in DTB. Has it been eaten by wild dogs?\n",irqs[i]);
return -ENODEV;
}
if (!of_device_is_available(np)){
printk("No %s in DTB. of_device_is_availables?\n",irqs[i]);
return -ENODEV;
}
ret = of_irq_to_resource(np, 0, &irq_res);
if (ret == NO_IRQ)
irq_res.start = irq_res.end = 0;
else
irq_res.flags = 0;
printk("********************************* %s irq_res.start=%d,irq_res.end=%d\n",irqs[i],irq_res.start,irq_res.end);
}
printk result is
********************************* pci_inta irq_res.start=19,irq_res.end=19
I set the Interrupt ID number 17.
But kernel gives the Interrupt ID number 19.
I wont to know the reasen.
Please tell me.
-Seiji Yamazaki
--
yamazaki seiji <yamazaki.seiji@kk.jp.panasonic.com>
^ permalink raw reply
* Re: [v0 PATCH 5/5] EDAC: CPC925 MC platform device setup
From: Harry Ciao @ 2009-04-03 3:17 UTC (permalink / raw)
To: Arnd Bergmann; +Cc: linuxppc-dev, norsk5, linux-kernel, bluesmoke-devel
In-Reply-To: <200904021436.44822.arnd@arndb.de>
Arnd Bergmann 写道:
> On Thursday 02 April 2009, Harry Ciao wrote:
>
>> +#ifdef CONFIG_EDAC
>> +#define CPC925_MC_START 0xf8000000
>> +#define CPC925_MC_END 0xf8ffffff /* sizeof 16MB */
>> +/* Register a platform device for CPC925 memory controller */
>> +static int __init maple_cpc925_edac_setup(void)
>>
>
> It's not good to have these encoded as magic numbers.
> Can't you find the addresses in the device tree? Maybe it's
> even possible to make this an of_platform_driver if you
> find a good node to bind to.
>
> Does the driver also work on a G5 Mac, or is it limited
> to the maple platform?
>
> Arnd <><
>
>
Hi Arnd,
I did try to get resource information from its DTB node first, the
"hostbridge" node do can be found successfully, however, unfortunately,
as I put in the notes in that function, the #address-cells and
#size-cells specified by its parent node are both 2, but the cell number
used in its "reg" property is actually 1, as
reg = <0xf8000000 0x1000000>;
which will make of_address_to_resource() failed with -EINVAL; that's why
I have to set it up from scratch manually.
Cheers,
Harry
^ permalink raw reply
* Re: [v1 PATCH 3/3] EDAC: CPC925 MC platform device setup
From: Michael Ellerman @ 2009-04-03 6:51 UTC (permalink / raw)
To: Harry Ciao; +Cc: norsk5, bluesmoke-devel, linux-kernel, linuxppc-dev
In-Reply-To: <1238739044-19926-2-git-send-email-qingtao.cao@windriver.com>
[-- Attachment #1: Type: text/plain, Size: 2630 bytes --]
On Fri, 2009-04-03 at 14:10 +0800, Harry Ciao wrote:
> Setup a platform device for the CPC925 Memory Controller during system
> booting up, against which CPC925 MC EDAC driver would be matched.
>
> Signed-off-by: Harry Ciao <qingtao.cao@windriver.com>
> ---
> arch/powerpc/platforms/maple/setup.c | 47 ++++++++++++++++++++++++++++++++++
> 1 files changed, 47 insertions(+), 0 deletions(-)
>
> diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
> index bfd60e4..ca8a3ff 100644
> --- a/arch/powerpc/platforms/maple/setup.c
> +++ b/arch/powerpc/platforms/maple/setup.c
> @@ -335,3 +335,50 @@ define_machine(maple) {
> .progress = maple_progress,
> .power_save = power4_idle,
> };
> +
> +#ifdef CONFIG_EDAC
> +#define CPC925_MC_START 0xf8000000
> +#define CPC925_MC_END 0xf8ffffff /* sizeof 16MB */
> +/* Register a platform device for CPC925 memory controller */
> +static int __init maple_cpc925_edac_setup(void)
> +{
> + struct platform_device *pdev;
> + struct device_node *np = NULL;
> + struct resource r;
> +
> + np = of_find_node_by_name(NULL, "hostbridge");
This is way too generic IMHO. You're going to match on any node called
"hostbridge" on any 64-bit powerpc machine, there's a good chance there
are other firmwares out there with such a node, or will be in the
future.
Is there no compatible or model property you can look for, so you're at
least somewhat confident you're actually looking at a CPC925?
If not this should be a machine_initcall() for Maple only.
> + if (of_address_to_resource(np, 0, &r)) {
> + /*
> + * of_address_to_resource() would get the #address-cells
> + * and #size-cells properties for a node from its parent.
> + * On Maple 64bit target hostbridge parent node has specified
> + * both of these two properties to be 2. However, the actual
> + * "cell" value for host bridge node is 1. Since we can't
> + * fix this firmware-generated DTB, we have to setup a
> + * resource structure manually.
> + */
> + memset(&r, 0, sizeof(r));
> + r.start = CPC925_MC_START;
> + r.end = CPC925_MC_END;
> + r.name = "hostbridge";
> + r.flags = IORESOURCE_MEM;
We do have fixups for bogus firmware including maple, look in
prom_init.c:fixup_device_tree_maple(). Although that's for actual
firmware, not a DTB.
cheers
--
Michael Ellerman
OzLabs, IBM Australia Development Lab
wwweb: http://michael.ellerman.id.au
phone: +61 2 6212 1183 (tie line 70 21183)
We do not inherit the earth from our ancestors,
we borrow it from our children. - S.M.A.R.T Person
[-- Attachment #2: This is a digitally signed message part --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply
* [v1 PATCH 3/3] EDAC: CPC925 MC platform device setup
From: Harry Ciao @ 2009-04-03 6:10 UTC (permalink / raw)
To: norsk5, bluesmoke-devel, linuxppc-dev; +Cc: linux-kernel
In-Reply-To: <1238739044-19926-1-git-send-email-qingtao.cao@windriver.com>
Setup a platform device for the CPC925 Memory Controller during system
booting up, against which CPC925 MC EDAC driver would be matched.
Signed-off-by: Harry Ciao <qingtao.cao@windriver.com>
---
arch/powerpc/platforms/maple/setup.c | 47 ++++++++++++++++++++++++++++++++++
1 files changed, 47 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index bfd60e4..ca8a3ff 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -335,3 +335,50 @@ define_machine(maple) {
.progress = maple_progress,
.power_save = power4_idle,
};
+
+#ifdef CONFIG_EDAC
+#define CPC925_MC_START 0xf8000000
+#define CPC925_MC_END 0xf8ffffff /* sizeof 16MB */
+/* Register a platform device for CPC925 memory controller */
+static int __init maple_cpc925_edac_setup(void)
+{
+ struct platform_device *pdev;
+ struct device_node *np = NULL;
+ struct resource r;
+
+ np = of_find_node_by_name(NULL, "hostbridge");
+ if (!np) {
+ printk(KERN_ERR "%s: Unable to find hostbridge node\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ if (of_address_to_resource(np, 0, &r)) {
+ /*
+ * of_address_to_resource() would get the #address-cells
+ * and #size-cells properties for a node from its parent.
+ * On Maple 64bit target hostbridge parent node has specified
+ * both of these two properties to be 2. However, the actual
+ * "cell" value for host bridge node is 1. Since we can't
+ * fix this firmware-generated DTB, we have to setup a
+ * resource structure manually.
+ */
+ memset(&r, 0, sizeof(r));
+ r.start = CPC925_MC_START;
+ r.end = CPC925_MC_END;
+ r.name = "hostbridge";
+ r.flags = IORESOURCE_MEM;
+ }
+
+ of_node_put(np);
+
+ pdev = platform_device_register_simple("cpc925_edac", 0, &r, 1);
+ if (IS_ERR(pdev))
+ return PTR_ERR(pdev);
+
+ printk(KERN_INFO "%s: CPC925 platform device created\n", __func__);
+
+ return 0;
+}
+arch_initcall(maple_cpc925_edac_setup);
+#endif
--
1.5.6.2
^ permalink raw reply related
* [v1 PATCH 3/3] EDAC: CPC925 MC platform device setup
From: Harry Ciao @ 2009-04-03 6:10 UTC (permalink / raw)
To: norsk5, bluesmoke-devel, linuxppc-dev; +Cc: linux-kernel
Hi,
Sorry, my git-send-mail died and failed to send out 3/3 patch.
Harry
^ permalink raw reply
* [v1 PATCH 2/3] EDAC: Add edac_device_alloc_index()
From: Harry Ciao @ 2009-04-03 6:09 UTC (permalink / raw)
To: norsk5, bluesmoke-devel, linuxppc-dev; +Cc: linux-kernel
In-Reply-To: <1238738996-19901-1-git-send-email-qingtao.cao@windriver.com>
Add edac_device_alloc_index(), because for MAPLE platform there may
exist several EDAC driver modules that could make use of
edac_device_ctl_info structure at the same time. The index allocation
for these structures should be taken care of by EDAC core.
Signed-off-by: Harry Ciao <qingtao.cao@windriver.com>
---
drivers/edac/amd8111_edac.c | 3 +--
drivers/edac/edac_core.h | 1 +
drivers/edac/edac_device.c | 13 +++++++++++++
3 files changed, 15 insertions(+), 2 deletions(-)
--- a/drivers/edac/amd8111_edac.c
+++ b/drivers/edac/amd8111_edac.c
@@ -37,7 +37,6 @@
#define AMD8111_EDAC_MOD_STR "amd8111_edac"
#define PCI_DEVICE_ID_AMD_8111_PCI 0x7460
-static int edac_dev_idx;
enum amd8111_edac_devs {
LPC_BRIDGE = 0,
@@ -377,7 +376,7 @@ static int amd8111_dev_probe(struct pci_
* edac_device_ctl_info, but make use of existing
* one instead.
*/
- dev_info->edac_idx = edac_dev_idx++;
+ dev_info->edac_idx = edac_device_alloc_index();
dev_info->edac_dev =
edac_device_alloc_ctl_info(0, dev_info->ctl_name, 1,
NULL, 0, 0,
--- a/drivers/edac/edac_core.h
+++ b/drivers/edac/edac_core.h
@@ -819,6 +819,7 @@ extern void edac_device_handle_ue(struct
int inst_nr, int block_nr, const char *msg);
extern void edac_device_handle_ce(struct edac_device_ctl_info *edac_dev,
int inst_nr, int block_nr, const char *msg);
+extern int edac_device_alloc_index(void);
/*
* edac_pci APIs
--- a/drivers/edac/edac_device.c
+++ b/drivers/edac/edac_device.c
@@ -37,6 +37,7 @@
*/
static DEFINE_MUTEX(device_ctls_mutex);
static LIST_HEAD(edac_device_list);
+static atomic_t device_indexes = ATOMIC_INIT(0);
#ifdef CONFIG_EDAC_DEBUG
static void edac_device_dump_device(struct edac_device_ctl_info *edac_dev)
@@ -490,6 +491,18 @@ void edac_device_reset_delay_period(stru
mutex_unlock(&device_ctls_mutex);
}
+/*
+ * edac_device_alloc_index: Allocate a unique device index number
+ *
+ * Return:
+ * allocated index number
+ */
+int edac_device_alloc_index(void)
+{
+ return atomic_inc_return(&device_indexes) - 1;
+}
+EXPORT_SYMBOL_GPL(edac_device_alloc_index);
+
/**
* edac_device_add_device: Insert the 'edac_dev' structure into the
* edac_device global list and create sysfs entries associated with
^ permalink raw reply
* [v1 PATCH 2/3] EDAC: Add edac_device_alloc_index()
From: Harry Ciao @ 2009-04-03 6:09 UTC (permalink / raw)
To: norsk5, bluesmoke-devel, linuxppc-dev; +Cc: linux-kernel
Hi,
Sorry, my git-send-mail died and failed to send out the 2/3 patch.
Harry
^ permalink raw reply
* [v1 PATCH 1/3] EDAC: Add CPC925 Memory Controller driver
From: Harry Ciao @ 2009-04-03 5:59 UTC (permalink / raw)
To: norsk5, bluesmoke-devel, linuxppc-dev; +Cc: linux-kernel
In-Reply-To: <1238738360-19839-1-git-send-email-qingtao.cao@windriver.com>
Introduce IBM CPC925 EDAC driver, which makes use of ECC, CPU and
HyperTransport Link error detections and corrections on the IBM
CPC925 Bridge and Memory Controller.
Signed-off-by: Harry Ciao <qingtao.cao@windriver.com>
---
drivers/edac/Kconfig | 9 +
drivers/edac/Makefile | 1 +
drivers/edac/cpc925_edac.c | 1020 ++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 1030 insertions(+), 0 deletions(-)
create mode 100644 drivers/edac/cpc925_edac.c
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index 13ccec6..1a320b4 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -188,4 +188,13 @@ config EDAC_AMD8131
Support for error detection and correction on the
AMD8131 HyperTransport PCI-X Tunnel chip.
+config EDAC_CPC925
+ tristate "IBM CPC925 Memory Controller (PPC970FX)"
+ depends on EDAC_MM_EDAC && PPC64
+ help
+ Support for error detection and correction on the
+ IBM CPC925 Bridge and Memory Controller, which is
+ a companion chip to the PowerPC 970 family of
+ processors.
+
endif # EDAC
diff --git a/drivers/edac/Makefile b/drivers/edac/Makefile
index 407601f..b4e0d86 100644
--- a/drivers/edac/Makefile
+++ b/drivers/edac/Makefile
@@ -36,4 +36,5 @@ obj-$(CONFIG_EDAC_MV64X60) += mv64x60_edac.o
obj-$(CONFIG_EDAC_CELL) += cell_edac.o
obj-$(CONFIG_EDAC_AMD8111) += amd8111_edac.o
obj-$(CONFIG_EDAC_AMD8131) += amd8131_edac.o
+obj-$(CONFIG_EDAC_CPC925) += cpc925_edac.o
diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c
new file mode 100644
index 0000000..7236847
--- /dev/null
+++ b/drivers/edac/cpc925_edac.c
@@ -0,0 +1,1020 @@
+/*
+ * cpc925_edac.c, EDAC driver for IBM CPC925 Bridge and Memory Controller.
+ *
+ * Copyright (c) 2008 Wind River Systems, Inc.
+ *
+ * Authors: Cao Qingtao <qingtao.cao@windriver.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ * See the GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/io.h>
+#include <linux/edac.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+
+#include "edac_core.h"
+#include "edac_module.h"
+
+#define CPC925_EDAC_REVISION " Ver: 1.0.0 " __DATE__
+#define CPC925_EDAC_MOD_STR "cpc925_edac"
+
+#define cpc925_printk(level, fmt, arg...) \
+ edac_printk(level, "CPC925", fmt, ##arg)
+
+#define cpc925_mc_printk(mci, level, fmt, arg...) \
+ edac_mc_chipset_printk(mci, level, "CPC925", fmt, ##arg)
+
+/*
+ * CPC925 registers are of 32 bits with bit0 defined at the
+ * most significant bit and bit31 at that of least significant.
+ */
+#define CPC925_BITS_PER_REG 32
+#define CPC925_BIT(nr) (1UL << (CPC925_BITS_PER_REG - 1 - nr))
+
+/*
+ * EDAC device names for the error detections of
+ * CPU Interface and Hypertransport Link.
+ */
+#define CPC925_CPU_ERR_DEV "cpu"
+#define CPC925_HT_LINK_DEV "htlink"
+
+/* Suppose DDR Refresh cycle is 15.6 microsecond */
+#define CPC925_REF_FREQ 0xFA69
+#define CPC925_SCRUB_BLOCK_SIZE 64 /* bytes */
+#define CPC925_NR_CSROWS 8
+
+/*
+ * All registers and bits definitions are taken from
+ * "CPC925 Bridge and Memory Controller User Manual, SA14-2761-02".
+ */
+
+/*
+ * CPU and Memory Controller Registers
+ */
+/************************************************************
+ * Processor Interface Exception Mask Register (APIMASK)
+ ************************************************************/
+#define REG_APIMASK_OFFSET 0x30070
+enum apimask_bits {
+ APIMASK_DART = CPC925_BIT(0), /* DART Exception */
+ APIMASK_ADI0 = CPC925_BIT(1), /* Handshake Error on PI0_ADI */
+ APIMASK_ADI1 = CPC925_BIT(2), /* Handshake Error on PI1_ADI */
+ APIMASK_STAT = CPC925_BIT(3), /* Status Exception */
+ APIMASK_DERR = CPC925_BIT(4), /* Data Error Exception */
+ APIMASK_ADRS0 = CPC925_BIT(5), /* Addressing Exception on PI0 */
+ APIMASK_ADRS1 = CPC925_BIT(6), /* Addressing Exception on PI1 */
+ /* BIT(7) Reserved */
+ APIMASK_ECC_UE_H = CPC925_BIT(8), /* UECC upper */
+ APIMASK_ECC_CE_H = CPC925_BIT(9), /* CECC upper */
+ APIMASK_ECC_UE_L = CPC925_BIT(10), /* UECC lower */
+ APIMASK_ECC_CE_L = CPC925_BIT(11), /* CECC lower */
+
+ CPU_MASK_ENABLE = (APIMASK_DART | APIMASK_ADI0 | APIMASK_ADI1 |
+ APIMASK_STAT | APIMASK_DERR | APIMASK_ADRS0 |
+ APIMASK_ADRS1),
+ ECC_MASK_ENABLE = (APIMASK_ECC_UE_H | APIMASK_ECC_CE_H |
+ APIMASK_ECC_UE_L | APIMASK_ECC_CE_L),
+};
+
+/************************************************************
+ * Processor Interface Exception Register (APIEXCP)
+ ************************************************************/
+#define REG_APIEXCP_OFFSET 0x30060
+enum apiexcp_bits {
+ APIEXCP_DART = CPC925_BIT(0), /* DART Exception */
+ APIEXCP_ADI0 = CPC925_BIT(1), /* Handshake Error on PI0_ADI */
+ APIEXCP_ADI1 = CPC925_BIT(2), /* Handshake Error on PI1_ADI */
+ APIEXCP_STAT = CPC925_BIT(3), /* Status Exception */
+ APIEXCP_DERR = CPC925_BIT(4), /* Data Error Exception */
+ APIEXCP_ADRS0 = CPC925_BIT(5), /* Addressing Exception on PI0 */
+ APIEXCP_ADRS1 = CPC925_BIT(6), /* Addressing Exception on PI1 */
+ /* BIT(7) Reserved */
+ APIEXCP_ECC_UE_H = CPC925_BIT(8), /* UECC upper */
+ APIEXCP_ECC_CE_H = CPC925_BIT(9), /* CECC upper */
+ APIEXCP_ECC_UE_L = CPC925_BIT(10), /* UECC lower */
+ APIEXCP_ECC_CE_L = CPC925_BIT(11), /* CECC lower */
+
+ CPU_EXCP_DETECTED = (APIEXCP_DART | APIEXCP_ADI0 | APIEXCP_ADI1 |
+ APIEXCP_STAT | APIEXCP_DERR | APIEXCP_ADRS0 |
+ APIEXCP_ADRS1),
+ UECC_EXCP_DETECTED = (APIEXCP_ECC_UE_H | APIEXCP_ECC_UE_L),
+ CECC_EXCP_DETECTED = (APIEXCP_ECC_CE_H | APIEXCP_ECC_CE_L),
+ ECC_EXCP_DETECTED = (UECC_EXCP_DETECTED | CECC_EXCP_DETECTED),
+};
+
+/************************************************************
+ * Memory Bus Configuration Register (MBCR)
+************************************************************/
+#define REG_MBCR_OFFSET 0x2190
+#define MBCR_64BITCFG_SHIFT 23
+#define MBCR_64BITCFG_MASK (1UL << MBCR_64BITCFG_SHIFT)
+#define MBCR_64BITBUS_SHIFT 22
+#define MBCR_64BITBUS_MASK (1UL << MBCR_64BITBUS_SHIFT)
+
+/************************************************************
+ * Memory Bank Mode Register (MBMR)
+************************************************************/
+#define REG_MBMR_OFFSET 0x21C0
+#define MBMR_MODE_MAX_VALUE 0xF
+#define MBMR_MODE_SHIFT 25
+#define MBMR_MODE_MASK (MBMR_MODE_MAX_VALUE << MBMR_MODE_SHIFT)
+#define MBMR_BBA_SHIFT 24
+#define MBMR_BBA_MASK (1UL << MBMR_BBA_SHIFT)
+
+/************************************************************
+ * Memory Bank Boundary Address Register (MBBAR)
+ ************************************************************/
+#define REG_MBBAR_OFFSET 0x21D0
+#define MBBAR_BBA_MAX_VALUE 0xFF
+#define MBBAR_BBA_SHIFT 24
+#define MBBAR_BBA_MASK (MBBAR_BBA_MAX_VALUE << MBBAR_BBA_SHIFT)
+
+/************************************************************
+ * Memory Scrub Control Register (MSCR)
+ ************************************************************/
+#define REG_MSCR_OFFSET 0x2400
+#define MSCR_SCRUB_MOD_MASK 0xC0000000 /* scrub_mod - bit0:1*/
+#define MSCR_BACKGR_SCRUB 0x40000000 /* 01 */
+#define MSCR_SI_SHIFT 16 /* si - bit8:15*/
+#define MSCR_SI_MAX_VALUE 0xFF
+#define MSCR_SI_MASK (MSCR_SI_MAX_VALUE << MSCR_SI_SHIFT)
+
+/************************************************************
+ * Memory Scrub Range Start Register (MSRSR)
+ ************************************************************/
+#define REG_MSRSR_OFFSET 0x2410
+
+/************************************************************
+ * Memory Scrub Range End Register (MSRER)
+ ************************************************************/
+#define REG_MSRER_OFFSET 0x2420
+
+/************************************************************
+ * Memory Scrub Pattern Register (MSPR)
+ ************************************************************/
+#define REG_MSPR_OFFSET 0x2430
+
+/************************************************************
+ * Memory Check Control Register (MCCR)
+ ************************************************************/
+#define REG_MCCR_OFFSET 0x2440
+enum mccr_bits {
+ MCCR_ECC_EN = CPC925_BIT(0), /* ECC high and low check */
+};
+
+/************************************************************
+ * Memory Check Range End Register (MCRER)
+ ************************************************************/
+#define REG_MCRER_OFFSET 0x2450
+
+/************************************************************
+ * Memory Error Address Register (MEAR)
+ ************************************************************/
+#define REG_MEAR_OFFSET 0x2460
+#define MEAR_BCNT_MAX_VALUE 0x3
+#define MEAR_BCNT_SHIFT 30
+#define MEAR_BCNT_MASK (MEAR_BCNT_MAX_VALUE << MEAR_BCNT_SHIFT)
+#define MEAR_RANK_MAX_VALUE 0x7
+#define MEAR_RANK_SHIFT 27
+#define MEAR_RANK_MASK (MEAR_RANK_MAX_VALUE << MEAR_RANK_SHIFT)
+#define MEAR_COL_MAX_VALUE 0x7FF
+#define MEAR_COL_SHIFT 16
+#define MEAR_COL_MASK (MEAR_COL_MAX_VALUE << MEAR_COL_SHIFT)
+#define MEAR_BANK_MAX_VALUE 0x3
+#define MEAR_BANK_SHIFT 14
+#define MEAR_BANK_MASK (MEAR_BANK_MAX_VALUE << MEAR_BANK_SHIFT)
+#define MEAR_ROW_MASK 0x00003FFF
+
+/************************************************************
+ * Memory Error Syndrome Register (MESR)
+ ************************************************************/
+#define REG_MESR_OFFSET 0x2470
+#define MESR_ECC_SYN_H_MASK 0xFF00
+#define MESR_ECC_SYN_L_MASK 0x00FF
+
+/************************************************************
+ * Memory Mode Control Register (MMCR)
+ ************************************************************/
+#define REG_MMCR_OFFSET 0x2500
+enum mmcr_bits {
+ MMCR_REG_DIMM_MODE = CPC925_BIT(3),
+};
+
+/*
+ * HyperTransport Link Registers
+ */
+/************************************************************
+ * Error Handling/Enumeration Scratch Pad Register (ERRCTRL)
+ ************************************************************/
+#define REG_ERRCTRL_OFFSET 0x70140
+enum errctrl_bits { /* nonfatal interrupts for */
+ ERRCTRL_SERR_NF = CPC925_BIT(0), /* system error */
+ ERRCTRL_CRC_NF = CPC925_BIT(1), /* CRC error */
+ ERRCTRL_RSP_NF = CPC925_BIT(2), /* Response error */
+ ERRCTRL_EOC_NF = CPC925_BIT(3), /* End-Of-Chain error */
+ ERRCTRL_OVF_NF = CPC925_BIT(4), /* Overflow error */
+ ERRCTRL_PROT_NF = CPC925_BIT(5), /* Protocol error */
+
+ ERRCTRL_RSP_ERR = CPC925_BIT(6), /* Response error received */
+ ERRCTRL_CHN_FAL = CPC925_BIT(7), /* Sync flooding detected */
+
+ HT_ERRCTRL_ENABLE = (ERRCTRL_SERR_NF | ERRCTRL_CRC_NF |
+ ERRCTRL_RSP_NF | ERRCTRL_EOC_NF |
+ ERRCTRL_OVF_NF | ERRCTRL_PROT_NF),
+ HT_ERRCTRL_DETECTED = (ERRCTRL_RSP_ERR | ERRCTRL_CHN_FAL),
+};
+
+/************************************************************
+ * Link Configuration and Link Control Register (LINKCTRL)
+ ************************************************************/
+#define REG_LINKCTRL_OFFSET 0x70110
+enum linkctrl_bits {
+ LINKCTRL_CRC_ERR = (CPC925_BIT(22) | CPC925_BIT(23)),
+ LINKCTRL_LINK_FAIL = CPC925_BIT(27),
+
+ HT_LINKCTRL_DETECTED = (LINKCTRL_CRC_ERR | LINKCTRL_LINK_FAIL),
+};
+
+/************************************************************
+ * Link FreqCap/Error/Freq/Revision ID Register (LINKERR)
+ ************************************************************/
+#define REG_LINKERR_OFFSET 0x70120
+enum linkerr_bits {
+ LINKERR_EOC_ERR = CPC925_BIT(17), /* End-Of-Chain error */
+ LINKERR_OVF_ERR = CPC925_BIT(18), /* Receive Buffer Overflow */
+ LINKERR_PROT_ERR = CPC925_BIT(19), /* Protocol error */
+
+ HT_LINKERR_DETECTED = (LINKERR_EOC_ERR | LINKERR_OVF_ERR |
+ LINKERR_PROT_ERR),
+};
+
+/************************************************************
+ * Bridge Control Register (BRGCTRL)
+ ************************************************************/
+#define REG_BRGCTRL_OFFSET 0x70300
+enum brgctrl_bits {
+ BRGCTRL_DETSERR = CPC925_BIT(0), /* SERR on Secondary Bus */
+ BRGCTRL_SECBUSRESET = CPC925_BIT(9), /* Secondary Bus Reset */
+};
+
+/* Private structure for edac memory controller */
+struct cpc925_mc_pdata {
+ void __iomem *vbase;
+ unsigned long total_mem;
+ const char *name;
+ int edac_idx;
+};
+
+/* Private structure for common edac device */
+struct cpc925_dev_info {
+ void __iomem *vbase;
+ struct platform_device *pdev;
+ char *ctl_name;
+ int edac_idx;
+ struct edac_device_ctl_info *edac_dev;
+ void (*init)(struct cpc925_dev_info *dev_info);
+ void (*exit)(struct cpc925_dev_info *dev_info);
+ void (*check)(struct edac_device_ctl_info *edac_dev);
+};
+
+
+static int edac_mc_idx;
+
+/* Get total memory size from Open Firmware DTB */
+static void get_total_mem(struct cpc925_mc_pdata *pdata)
+{
+ struct device_node *np = NULL;
+ const unsigned int *reg, *reg_end;
+ int len, sw, aw;
+ unsigned long start, size;
+
+ np = of_find_node_by_type(NULL, "memory");
+ if (!np)
+ return;
+
+ aw = of_n_addr_cells(np);
+ sw = of_n_size_cells(np);
+ reg = (const unsigned int *)of_get_property(np, "reg", &len);
+ reg_end = reg + len/4;
+
+ pdata->total_mem = 0;
+ do {
+ start = of_read_number(reg, aw);
+ reg += aw;
+ size = of_read_number(reg, sw);
+ reg += sw;
+ debugf1("%s: start 0x%lx, size 0x%lx\n", __func__,
+ start, size);
+ pdata->total_mem += size;
+ } while (reg < reg_end);
+
+ of_node_put(np);
+ debugf0("%s: total_mem 0x%lx\n", __func__, pdata->total_mem);
+}
+
+static void cpc925_init_csrows(struct mem_ctl_info *mci)
+{
+ struct cpc925_mc_pdata *pdata = mci->pvt_info;
+ struct csrow_info *csrow;
+ int index;
+ u32 mbmr, mbbar, bba;
+ unsigned long row_size, last_nr_pages = 0;
+
+ get_total_mem(pdata);
+
+ for (index = 0; index < mci->nr_csrows; index++) {
+ mbmr = __raw_readl(pdata->vbase + REG_MBMR_OFFSET +
+ 0x20 * index);
+ mbbar = __raw_readl(pdata->vbase + REG_MBBAR_OFFSET +
+ 0x20 + index);
+ bba = (((mbmr & MBMR_BBA_MASK) >> MBMR_BBA_SHIFT) << 8) |
+ ((mbbar & MBBAR_BBA_MASK) >> MBBAR_BBA_SHIFT);
+
+ if (bba == 0)
+ continue; /* not populated */
+
+ csrow = &mci->csrows[index];
+
+ row_size = bba * (1UL << 28); /* 256M */
+ csrow->first_page = last_nr_pages;
+ csrow->nr_pages = row_size >> PAGE_SHIFT;
+ csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
+ last_nr_pages = csrow->last_page + 1;
+
+ csrow->mtype = MEM_RDDR;
+ csrow->edac_mode = EDAC_SECDED;
+
+ switch (csrow->nr_channels) {
+ case 1: /* Single channel */
+ csrow->grain = 32; /* four-beat burst of 32 bytes */
+ break;
+ case 2: /* Dual channel */
+ default:
+ csrow->grain = 64; /* four-beat burst of 64 bytes */
+ break;
+ }
+
+ switch ((mbmr & MBMR_MODE_MASK) >> MBMR_MODE_SHIFT) {
+ case 6: /* 0110, no way to differentiate X8 VS X16 */
+ case 5: /* 0101 */
+ case 8: /* 1000 */
+ csrow->dtype = DEV_X16;
+ break;
+ case 7: /* 0111 */
+ case 9: /* 1001 */
+ csrow->dtype = DEV_X8;
+ break;
+ default:
+ csrow->dtype = DEV_UNKNOWN;
+ break;
+ }
+ }
+}
+
+/* Enable memory controller ECC detection */
+static void cpc925_mc_init(struct mem_ctl_info *mci)
+{
+ struct cpc925_mc_pdata *pdata = mci->pvt_info;
+ u32 apimask;
+ u32 mccr;
+
+ /* Enable various ECC error exceptions */
+ apimask = __raw_readl(pdata->vbase + REG_APIMASK_OFFSET);
+ if ((apimask & ECC_MASK_ENABLE) == 0) {
+ apimask |= ECC_MASK_ENABLE;
+ __raw_writel(apimask, pdata->vbase + REG_APIMASK_OFFSET);
+ }
+
+ /* Enable ECC detection */
+ mccr = __raw_readl(pdata->vbase + REG_MCCR_OFFSET);
+ if ((mccr & MCCR_ECC_EN) == 0) {
+ mccr |= MCCR_ECC_EN;
+ __raw_writel(mccr, pdata->vbase + REG_MCCR_OFFSET);
+ }
+}
+
+/* Disable memory controller ECC detection */
+static void cpc925_mc_exit(struct mem_ctl_info *mci)
+{
+ /*
+ * WARNING:
+ * We are supposed to clear the ECC error detection bits,
+ * and it will be no problem to do so. However, once they
+ * are cleared here if we want to re-install CPC925 EDAC
+ * module later, setting them up in cpc925_mc_init() will
+ * trigger machine check exception.
+ * Also, it's ok to leave ECC error detection bits enabled,
+ * since they are reset to 1 by default or by boot loader.
+ */
+
+ return;
+}
+
+/*
+ * Revert DDR column/row/bank addresses into page frame number and
+ * offset in page.
+ *
+ * Suppose memory mode is 0x0111(128-bit mode, identical DIMM pairs),
+ * physical address(PA) bits to column address(CA) bits mappings are:
+ * CA 0 1 2 3 4 5 6 7 8 9 10
+ * PA 59 58 57 56 55 54 53 52 51 50 49
+ *
+ * physical address(PA) bits to bank address(BA) bits mappings are:
+ * BA 0 1
+ * PA 43 44
+ *
+ * physical address(PA) bits to row address(RA) bits mappings are:
+ * RA 0 1 2 3 4 5 6 7 8 9 10 11 12
+ * PA 36 35 34 48 47 46 45 40 41 42 39 38 37
+ */
+static void cpc925_mc_get_pfn(struct mem_ctl_info *mci, u32 mear,
+ unsigned long *pfn, unsigned long *offset, int *csrow)
+{
+ u32 bcnt, rank, col, bank, row;
+ u32 c;
+ unsigned long pa;
+ int i;
+
+ bcnt = (mear & MEAR_BCNT_MASK) >> MEAR_BCNT_SHIFT;
+ rank = (mear & MEAR_RANK_MASK) >> MEAR_RANK_SHIFT;
+ col = (mear & MEAR_COL_MASK) >> MEAR_COL_SHIFT;
+ bank = (mear & MEAR_BANK_MASK) >> MEAR_BANK_SHIFT;
+ row = mear & MEAR_ROW_MASK;
+
+ *csrow = rank;
+
+#ifdef CONFIG_EDAC_DEBUG
+ if (mci->csrows[rank].first_page == 0) {
+ cpc925_mc_printk(mci, KERN_ERR, "ECC occurs in a "
+ "non-populated csrow, broken hardware?\n");
+ return;
+ }
+#endif
+
+ /* Revert csrow number */
+ pa = mci->csrows[rank].first_page << PAGE_SHIFT;
+
+ /* Revert column address */
+ col += bcnt;
+ for (i = 0; i < 11; i++) {
+ c = col & 0x1;
+ col >>= 1;
+ pa |= c << (14 - i);
+ }
+
+ /* Revert bank address */
+ pa |= bank << 19;
+
+ /* Revert row address, in 4 steps */
+ for (i = 0; i < 3; i++) {
+ c = row & 0x1;
+ row >>= 1;
+ pa |= c << (26 - i);
+ }
+
+ for (i = 0; i < 3; i++) {
+ c = row & 0x1;
+ row >>= 1;
+ pa |= c << (21 + i);
+ }
+
+ for (i = 0; i < 4; i++) {
+ c = row & 0x1;
+ row >>= 1;
+ pa |= c << (18 - i);
+ }
+
+ for (i = 0; i < 3; i++) {
+ c = row & 0x1;
+ row >>= 1;
+ pa |= c << (29 - i);
+ }
+
+ *offset = pa & (PAGE_SIZE - 1);
+ *pfn = pa >> PAGE_SHIFT;
+
+ debugf0("%s: ECC physical address 0x%lx\n", __func__, pa);
+}
+
+static int cpc925_mc_find_channel(struct mem_ctl_info *mci, u16 syndrome)
+{
+ if ((syndrome & MESR_ECC_SYN_H_MASK) == 0)
+ return 0;
+
+ if ((syndrome & MESR_ECC_SYN_L_MASK) == 0)
+ return 1;
+
+ cpc925_mc_printk(mci, KERN_INFO, "Unexpected syndrome value: 0x%x\n",
+ syndrome);
+ return 1;
+}
+
+/* Check memory controller registers for ECC errors */
+static void cpc925_mc_check(struct mem_ctl_info *mci)
+{
+ struct cpc925_mc_pdata *pdata = mci->pvt_info;
+ u32 apiexcp;
+ u32 mear;
+ u32 mesr;
+ u16 syndrome;
+ unsigned long pfn = 0, offset = 0;
+ int csrow = 0, channel = 0;
+
+ /* APIEXCP is cleared when read */
+ apiexcp = __raw_readl(pdata->vbase + REG_APIEXCP_OFFSET);
+ if ((apiexcp & ECC_EXCP_DETECTED) == 0)
+ return;
+
+ mesr = __raw_readl(pdata->vbase + REG_MESR_OFFSET);
+ syndrome = mesr | (MESR_ECC_SYN_H_MASK | MESR_ECC_SYN_L_MASK);
+
+ mear = __raw_readl(pdata->vbase + REG_MEAR_OFFSET);
+
+ /* Revert column/row addresses into page frame number, etc */
+ cpc925_mc_get_pfn(mci, mear, &pfn, &offset, &csrow);
+
+ if (apiexcp & UECC_EXCP_DETECTED) {
+ cpc925_mc_printk(mci, KERN_INFO, "DRAM UECC Fault\n");
+ channel = cpc925_mc_find_channel(mci, syndrome);
+ edac_mc_handle_ce(mci, pfn, offset, syndrome,
+ csrow, channel, mci->ctl_name);
+ }
+
+ if (apiexcp & CECC_EXCP_DETECTED) {
+ cpc925_mc_printk(mci, KERN_INFO, "DRAM CECC Fault\n");
+ edac_mc_handle_ue(mci, pfn, offset,
+ csrow, mci->ctl_name);
+ }
+
+ cpc925_mc_printk(mci, KERN_INFO, "Dump registers:\n");
+ cpc925_mc_printk(mci, KERN_INFO, "APIMASK 0x%08x\n",
+ __raw_readl(pdata->vbase + REG_APIMASK_OFFSET));
+ cpc925_mc_printk(mci, KERN_INFO, "APIEXCP 0x%08x\n",
+ apiexcp);
+ cpc925_mc_printk(mci, KERN_INFO, "Mem Scrub Ctrl 0x%08x\n",
+ __raw_readl(pdata->vbase + REG_MSCR_OFFSET));
+ cpc925_mc_printk(mci, KERN_INFO, "Mem Scrub Rge Start 0x%08x\n",
+ __raw_readl(pdata->vbase + REG_MSRSR_OFFSET));
+ cpc925_mc_printk(mci, KERN_INFO, "Mem Scrub Rge End 0x%08x\n",
+ __raw_readl(pdata->vbase + REG_MSRER_OFFSET));
+ cpc925_mc_printk(mci, KERN_INFO, "Mem Scrub Pattern 0x%08x\n",
+ __raw_readl(pdata->vbase + REG_MSPR_OFFSET));
+ cpc925_mc_printk(mci, KERN_INFO, "Mem Chk Ctrl 0x%08x\n",
+ __raw_readl(pdata->vbase + REG_MCCR_OFFSET));
+ cpc925_mc_printk(mci, KERN_INFO, "Mem Chk Rge End 0x%08x\n",
+ __raw_readl(pdata->vbase + REG_MCRER_OFFSET));
+ cpc925_mc_printk(mci, KERN_INFO, "Mem Err Address 0x%08x\n",
+ mesr);
+ cpc925_mc_printk(mci, KERN_INFO, "Mem Err Syndrome 0x%08x\n",
+ syndrome);
+}
+
+/******************** CPU err device********************************/
+/* Enable CPU Errors detection */
+static void cpc925_cpu_init(struct cpc925_dev_info *dev_info)
+{
+ u32 apimask;
+
+ apimask = __raw_readl(dev_info->vbase + REG_APIMASK_OFFSET);
+ if ((apimask & CPU_MASK_ENABLE) == 0) {
+ apimask |= CPU_MASK_ENABLE;
+ __raw_writel(apimask, dev_info->vbase + REG_APIMASK_OFFSET);
+ }
+}
+
+/* Disable CPU Errors detection */
+static void cpc925_cpu_exit(struct cpc925_dev_info *dev_info)
+{
+ /*
+ * WARNING:
+ * We are supposed to clear the CPU error detection bits,
+ * and it will be no problem to do so. However, once they
+ * are cleared here if we want to re-install CPC925 EDAC
+ * module later, setting them up in cpc925_cpu_init() will
+ * trigger machine check exception.
+ * Also, it's ok to leave CPU error detection bits enabled,
+ * since they are reset to 1 by default.
+ */
+
+ return;
+}
+
+/* Check for CPU Errors */
+static void cpc925_cpu_check(struct edac_device_ctl_info *edac_dev)
+{
+ struct cpc925_dev_info *dev_info = edac_dev->pvt_info;
+ u32 apiexcp;
+ u32 apimask;
+
+ /* APIEXCP is cleared when read */
+ apiexcp = __raw_readl(dev_info->vbase + REG_APIEXCP_OFFSET);
+ if ((apiexcp & CPU_EXCP_DETECTED) == 0)
+ return;
+
+ apimask = __raw_readl(dev_info->vbase + REG_APIMASK_OFFSET);
+ cpc925_printk(KERN_INFO, "Processor Interface Fault\n"
+ "Processor Interface register dump:\n");
+ cpc925_printk(KERN_INFO, "APIMASK 0x%08x\n", apimask);
+ cpc925_printk(KERN_INFO, "APIEXCP 0x%08x\n", apiexcp);
+
+ edac_device_handle_ue(edac_dev, 0, 0, edac_dev->ctl_name);
+}
+
+/******************** HT Link err device****************************/
+/* Enable HyperTransport Link Error detection */
+static void cpc925_htlink_init(struct cpc925_dev_info *dev_info)
+{
+ u32 ht_errctrl;
+
+ ht_errctrl = __raw_readl(dev_info->vbase + REG_ERRCTRL_OFFSET);
+ if ((ht_errctrl & HT_ERRCTRL_ENABLE) == 0) {
+ ht_errctrl |= HT_ERRCTRL_ENABLE;
+ __raw_writel(ht_errctrl, dev_info->vbase + REG_ERRCTRL_OFFSET);
+ }
+}
+
+/* Disable HyperTransport Link Error detection */
+static void cpc925_htlink_exit(struct cpc925_dev_info *dev_info)
+{
+ u32 ht_errctrl;
+
+ ht_errctrl = __raw_readl(dev_info->vbase + REG_ERRCTRL_OFFSET);
+ ht_errctrl &= ~HT_ERRCTRL_ENABLE;
+ __raw_writel(ht_errctrl, dev_info->vbase + REG_ERRCTRL_OFFSET);
+}
+
+/* Check for HyperTransport Link errors */
+static void cpc925_htlink_check(struct edac_device_ctl_info *edac_dev)
+{
+ struct cpc925_dev_info *dev_info = edac_dev->pvt_info;
+ u32 brgctrl = __raw_readl(dev_info->vbase + REG_BRGCTRL_OFFSET);
+ u32 linkctrl = __raw_readl(dev_info->vbase + REG_LINKCTRL_OFFSET);
+ u32 errctrl = __raw_readl(dev_info->vbase + REG_ERRCTRL_OFFSET);
+ u32 linkerr = __raw_readl(dev_info->vbase + REG_LINKERR_OFFSET);
+
+ if (!((brgctrl & BRGCTRL_DETSERR) ||
+ (linkctrl & HT_LINKCTRL_DETECTED) ||
+ (errctrl & HT_ERRCTRL_DETECTED) ||
+ (linkerr & HT_LINKERR_DETECTED)))
+ return;
+
+ cpc925_printk(KERN_INFO, "HT Link Fault\n"
+ "HT register dump:\n");
+ cpc925_printk(KERN_INFO, "Bridge Ctrl 0x%08x\n",
+ brgctrl);
+ cpc925_printk(KERN_INFO, "Link Config Ctrl 0x%08x\n",
+ linkctrl);
+ cpc925_printk(KERN_INFO, "Error Enum and Ctrl 0x%08x\n",
+ errctrl);
+ cpc925_printk(KERN_INFO, "Link Error 0x%08x\n",
+ linkerr);
+
+ /* Clear by write 1 */
+ if (brgctrl & BRGCTRL_DETSERR)
+ __raw_writel(BRGCTRL_DETSERR,
+ dev_info->vbase + REG_BRGCTRL_OFFSET);
+
+ if (linkctrl & HT_LINKCTRL_DETECTED)
+ __raw_writel(HT_LINKCTRL_DETECTED,
+ dev_info->vbase + REG_LINKCTRL_OFFSET);
+
+ /* Initiate Secondary Bus Reset to clear the chain failure */
+ if (errctrl & ERRCTRL_CHN_FAL)
+ __raw_writel(BRGCTRL_SECBUSRESET,
+ dev_info->vbase + REG_BRGCTRL_OFFSET);
+
+ if (errctrl & ERRCTRL_RSP_ERR)
+ __raw_writel(ERRCTRL_RSP_ERR,
+ dev_info->vbase + REG_ERRCTRL_OFFSET);
+
+ if (linkerr & HT_LINKERR_DETECTED)
+ __raw_writel(HT_LINKERR_DETECTED,
+ dev_info->vbase + REG_LINKERR_OFFSET);
+
+ edac_device_handle_ce(edac_dev, 0, 0, edac_dev->ctl_name);
+}
+
+static struct cpc925_dev_info cpc925_devs[] = {
+ {
+ .ctl_name = CPC925_CPU_ERR_DEV,
+ .init = cpc925_cpu_init,
+ .exit = cpc925_cpu_exit,
+ .check = cpc925_cpu_check,
+ },
+ {
+ .ctl_name = CPC925_HT_LINK_DEV,
+ .init = cpc925_htlink_init,
+ .exit = cpc925_htlink_exit,
+ .check = cpc925_htlink_check,
+ },
+ {0}, /* Terminated by NULL */
+};
+
+/*
+ * Add CPU Err detection and HyperTransport Link Err detection
+ * as common "edac_device", they have no corresponding device
+ * nodes in the Open Firmware DTB and we have to add platform
+ * devices for them. Also, they will share the MMIO with that
+ * of memory controller.
+ */
+static void cpc925_add_edac_devices(void __iomem *vbase)
+{
+ struct cpc925_dev_info *dev_info;
+
+ if (!vbase) {
+ cpc925_printk(KERN_ERR, "MMIO not established yet\n");
+ return;
+ }
+
+ for (dev_info = &cpc925_devs[0]; dev_info->init; dev_info++) {
+ dev_info->vbase = vbase;
+ dev_info->pdev = platform_device_register_simple(
+ dev_info->ctl_name, 0, NULL, 0);
+ if (IS_ERR(dev_info->pdev)) {
+ cpc925_printk(KERN_ERR,
+ "Can't register platform device for %s\n",
+ dev_info->ctl_name);
+ continue;
+ }
+
+ /*
+ * Don't have to allocate private structure but
+ * make use of cpc925_devs[] instead.
+ */
+ dev_info->edac_idx = edac_device_alloc_index();
+ dev_info->edac_dev =
+ edac_device_alloc_ctl_info(0, dev_info->ctl_name,
+ 1, NULL, 0, 0, NULL, 0, dev_info->edac_idx);
+ if (!dev_info->edac_dev) {
+ cpc925_printk(KERN_ERR, "No memory for edac device\n");
+ goto err1;
+ }
+
+ dev_info->edac_dev->pvt_info = dev_info;
+ dev_info->edac_dev->dev = &dev_info->pdev->dev;
+ dev_info->edac_dev->ctl_name = dev_info->ctl_name;
+ dev_info->edac_dev->mod_name = CPC925_EDAC_MOD_STR;
+ dev_info->edac_dev->dev_name = dev_name(&dev_info->pdev->dev);
+
+ if (edac_op_state == EDAC_OPSTATE_POLL)
+ dev_info->edac_dev->edac_check = dev_info->check;
+
+ if (dev_info->init)
+ dev_info->init(dev_info);
+
+ if (edac_device_add_device(dev_info->edac_dev) > 0) {
+ cpc925_printk(KERN_ERR,
+ "Unable to add edac device for %s\n",
+ dev_info->ctl_name);
+ goto err2;
+ }
+
+ debugf0("%s: Successfully added edac device for %s\n",
+ __func__, dev_info->ctl_name);
+
+ continue;
+
+err2:
+ if (dev_info->exit)
+ dev_info->exit(dev_info);
+ edac_device_free_ctl_info(dev_info->edac_dev);
+err1:
+ platform_device_unregister(dev_info->pdev);
+ }
+}
+
+/*
+ * Delete the common "edac_device" for CPU Err Detection
+ * and HyperTransport Link Err Detection
+ */
+static void cpc925_del_edac_devices(void)
+{
+ struct cpc925_dev_info *dev_info;
+
+ for (dev_info = &cpc925_devs[0]; dev_info->init; dev_info++) {
+ if (dev_info->edac_dev) {
+ edac_device_del_device(dev_info->edac_dev->dev);
+ edac_device_free_ctl_info(dev_info->edac_dev);
+ platform_device_unregister(dev_info->pdev);
+ }
+
+ if (dev_info->exit)
+ dev_info->exit(dev_info);
+
+ debugf0("%s: Successfully deleted edac device for %s\n",
+ __func__, dev_info->ctl_name);
+ }
+}
+
+/* Convert current back-ground scrub rate into byte/sec bandwith */
+static int cpc925_get_sdram_scrub_rate(struct mem_ctl_info *mci, u32 *bw)
+{
+ struct cpc925_mc_pdata *pdata = mci->pvt_info;
+ u32 mscr;
+ u8 si;
+
+ mscr = __raw_readl(pdata->vbase + REG_MSCR_OFFSET);
+ si = (mscr & MSCR_SI_MASK) >> MSCR_SI_SHIFT;
+
+ debugf0("%s, Mem Scrub Ctrl Register 0x%x\n", __func__, mscr);
+
+ if (((mscr & MSCR_SCRUB_MOD_MASK) != MSCR_BACKGR_SCRUB) ||
+ (si == 0)) {
+ cpc925_mc_printk(mci, KERN_INFO, "Scrub mode not enabled\n");
+ *bw = 0;
+ } else
+ *bw = CPC925_SCRUB_BLOCK_SIZE * 0xFA67 / si;
+
+ return 0;
+}
+
+/* Return 0 for single channel; 1 for dual channel */
+static int cpc925_mc_get_channels(void __iomem *vbase)
+{
+ int dual = 0;
+ u32 mbcr;
+
+ mbcr = __raw_readl(vbase + REG_MBCR_OFFSET);
+
+ /*
+ * Dual channel only when 128-bit wide physical bus
+ * and 128-bit configuration.
+ */
+ if (((mbcr & MBCR_64BITCFG_MASK) == 0) &&
+ ((mbcr & MBCR_64BITBUS_MASK) == 0))
+ dual = 1;
+
+ debugf0("%s: %s channel\n", __func__,
+ (dual > 0) ? "Dual" : "Single");
+
+ return dual;
+}
+
+static int __devinit cpc925_probe(struct platform_device *pdev)
+{
+ struct mem_ctl_info *mci;
+ void __iomem *vbase;
+ struct cpc925_mc_pdata *pdata;
+ struct resource *r;
+ int res = 0, nr_channels;
+
+ debugf0("%s: %s platform device found!\n", __func__, pdev->name);
+
+ if (!devres_open_group(&pdev->dev, cpc925_probe, GFP_KERNEL)) {
+ res = -ENOMEM;
+ goto out;
+ }
+
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!r) {
+ cpc925_printk(KERN_ERR, "Unable to get resource\n");
+ res = -ENOENT;
+ goto err1;
+ }
+
+ if (!devm_request_mem_region(&pdev->dev,
+ r->start,
+ r->end - r->start + 1,
+ pdev->name)) {
+ cpc925_printk(KERN_ERR, "Unable to request mem region\n");
+ res = -EBUSY;
+ goto err1;
+ }
+
+ vbase = devm_ioremap(&pdev->dev, r->start, r->end - r->start + 1);
+ if (!vbase) {
+ cpc925_printk(KERN_ERR, "Unable to ioremap device\n");
+ res = -ENOMEM;
+ goto err2;
+ }
+
+ nr_channels = cpc925_mc_get_channels(vbase);
+ mci = edac_mc_alloc(sizeof(struct cpc925_mc_pdata),
+ CPC925_NR_CSROWS, nr_channels + 1, edac_mc_idx);
+ if (!mci) {
+ cpc925_printk(KERN_ERR, "No memory for mem_ctl_info\n");
+ res = -ENOMEM;
+ goto err2;
+ }
+
+ pdata = mci->pvt_info;
+ pdata->vbase = vbase;
+ pdata->edac_idx = edac_mc_idx++;
+ pdata->name = pdev->name;
+
+ mci->dev = &pdev->dev;
+ platform_set_drvdata(pdev, mci);
+ mci->dev_name = dev_name(&pdev->dev);
+ mci->mtype_cap = MEM_FLAG_RDDR | MEM_FLAG_DDR;
+ mci->edac_ctl_cap = EDAC_FLAG_NONE | EDAC_FLAG_SECDED;
+ mci->edac_cap = EDAC_FLAG_SECDED;
+ mci->mod_name = CPC925_EDAC_MOD_STR;
+ mci->mod_ver = CPC925_EDAC_REVISION;
+ mci->ctl_name = pdev->name;
+
+ if (edac_op_state == EDAC_OPSTATE_POLL)
+ mci->edac_check = cpc925_mc_check;
+
+ mci->ctl_page_to_phys = NULL;
+ mci->scrub_mode = SCRUB_SW_SRC;
+ mci->set_sdram_scrub_rate = NULL;
+ mci->get_sdram_scrub_rate = cpc925_get_sdram_scrub_rate;
+
+ cpc925_init_csrows(mci);
+
+ /* Setup memory controller registers */
+ cpc925_mc_init(mci);
+
+ if (edac_mc_add_mc(mci) > 0) {
+ cpc925_mc_printk(mci, KERN_ERR, "Failed edac_mc_add_mc()\n");
+ goto err3;
+ }
+
+ cpc925_add_edac_devices(vbase);
+
+ /* get this far and it's successful */
+ debugf0("%s: success\n", __func__);
+
+ res = 0;
+ goto out;
+
+err3:
+ cpc925_mc_exit(mci);
+ edac_mc_free(mci);
+err2:
+ devm_release_mem_region(&pdev->dev, r->start, r->end-r->start+1);
+err1:
+ devres_release_group(&pdev->dev, cpc925_probe);
+out:
+ return res;
+}
+
+static int cpc925_remove(struct platform_device *pdev)
+{
+ struct mem_ctl_info *mci = platform_get_drvdata(pdev);
+
+ /*
+ * Delete common edac devices before edac mc, because
+ * the former share the MMIO of the latter.
+ */
+ cpc925_del_edac_devices();
+ cpc925_mc_exit(mci);
+
+ edac_mc_del_mc(&pdev->dev);
+ edac_mc_free(mci);
+
+ return 0;
+}
+
+static struct platform_driver cpc925_edac_driver = {
+ .probe = cpc925_probe,
+ .remove = cpc925_remove,
+ .driver = {
+ .name = "cpc925_edac",
+ }
+};
+
+static int __init cpc925_edac_init(void)
+{
+ int ret = 0;
+
+ printk(KERN_INFO "IBM CPC925 EDAC driver " CPC925_EDAC_REVISION "\n");
+ printk(KERN_INFO "\t(c) 2008 Wind River Systems, Inc\n");
+
+ /* Only support POLL mode so far */
+ edac_op_state = EDAC_OPSTATE_POLL;
+
+ ret = platform_driver_register(&cpc925_edac_driver);
+ if (ret) {
+ printk(KERN_WARNING "Failed to register %s\n",
+ CPC925_EDAC_MOD_STR);
+ }
+
+ return ret;
+}
+
+static void __exit cpc925_edac_exit(void)
+{
+ platform_driver_unregister(&cpc925_edac_driver);
+}
+
+module_init(cpc925_edac_init);
+module_exit(cpc925_edac_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Cao Qingtao <qingtao.cao@windriver.com>");
+MODULE_DESCRIPTION("IBM CPC925 Bridge and MC EDAC kernel module");
--
1.5.6.2
^ permalink raw reply related
* [v1 PATCH 0/3] Add CPC925 Memory Controller EDAC drivers
From: Harry Ciao @ 2009-04-03 5:59 UTC (permalink / raw)
To: norsk5, bluesmoke-devel, linuxppc-dev; +Cc: linux-kernel
Hi Doug and PPC developers,
This is v1 series of patches for CPC925 Memory Controller EDAC driver that works on PPC970FX. I have taken Arnd's suggestion to fold header/source/etc into one file and makes CONFIG_EDAC_CPC925 depend on CONFIG_PPC64.
Please take a look and give your comments, many thanks!
Best regards,
Harry
^ permalink raw reply
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