* image/wrapper script questions
From: Eddie Dawydiuk @ 2009-07-27 17:10 UTC (permalink / raw)
To: Grant Likely, linuxppc-dev
Hello,
I'm working on a custom board using an AMCC 440EP that is using a proprietary
bootloader(optimized for fast boot time). Currently our bootloader loads a
simpleImage.initrd into RAM and jumps into it. I originally chose to use a
simpleImage with an initial ramdisk embedded because it was the simplest
solution to debug the hardware and get a kernel and initial ramdisk running for
development. For production I would prefer to put the initial ramdisk on it's
own partition to allow customers to easily modify the initrd without having to
concern themselves with the details of how to recompile a kernel. Would you
recommend using one of the existing images(e.g. boot wrapper) or modify the
bootrom to load the PPC registers with the details of where to find the dts,
kernel, and initrd?
Thanks for any suggestions :)
--
Best Regards,
________________________________________________________________
Eddie Dawydiuk, Technologic Systems | voice: (480) 837-5200
16525 East Laser Drive | fax: (480) 837-5300
Fountain Hills, AZ 85268 | web: www.embeddedARM.com
^ permalink raw reply
* Is it a BUG of kexec in E500?
From: wilbur.chan @ 2009-07-27 16:39 UTC (permalink / raw)
To: Linuxppc-dev
I found a patch for kexec on Booke in the archives:
http://lists.ozlabs.org/pipermail/linuxppc-dev/2008-November/064798.html
In this pacth , we use an entry to setup a 1:1 mapping , whose size
is 1GB. However, in e500, the max mapping size for
a single entry is 256M. So I have to setup 4 entries to map 1G kernel
space in my mpc8541.
Is it a bug here ? I'm not quite sure.
regards,
^ permalink raw reply
* Re: [PATCH] Support for PCI Express reset type in EEH
From: Richard Lary @ 2009-07-27 14:29 UTC (permalink / raw)
To: linasvepstas; +Cc: linuxppc-dev, mmlnx, Paul Mackerras, linux-pci
In-Reply-To: <3ae3aa420907241730i74541747l2ca288e0c138001e@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 2720 bytes --]
Linas Vepstas <linasvepstas@gmail.com> wrote on 07/24/2009 05:30:09 PM:
> 2009/7/24 Richard Lary <rlary@us.ibm.com>:
> > Linas Vepstas <linasvepstas@gmail.com> wrote on 07/23/2009 07:44:33 AM:
> >
> >> 2009/7/15 Mike Mason <mmlnx@us.ibm.com>:
> >> > By default, EEH does what's known as a "hot reset" during error
recovery
> >> > of
> >> > a PCI Express device. We've found a case where the device needs a
> >> > "fundamental reset" to recover properly. The current PCI error
recovery
> >> > and
> >> > EEH frameworks do not support this distinction.
> >> >
> >> > The attached patch (courtesy of Richard Lary) adds a bit field to
> >> > pci_dev
> >> > that indicates whether the device requires a fundamental reset
during
> >> > error
> >> > recovery. This bit can be checked by EEH to determine which reset
type
> >> > is
> >> > required.
> >> >
> >> > This patch supersedes the previously submitted patch that
implemented a
> >> > reset type callback.
> >> >
> >> > Please review and let me know of any concerns.
> >>
> >> I like this patch a *lot* better .. it is vastly simpler, more direct.
> >>
> >>
> >> > diff -uNrp a/include/linux/pci.h b/include/linux/pci.h
> >> > --- a/include/linux/pci.h 2009-07-13 14:25:37.000000000 -0700
> >> > +++ b/include/linux/pci.h 2009-07-15 10:25:37.000000000 -0700
> >> > @@ -273,6 +273,7 @@ struct pci_dev {
> >> > unsigned int ari_enabled:1; /* ARI forwarding */
> >> > unsigned int is_managed:1;
> >> > unsigned int is_pcie:1;
> >> > + unsigned int fndmntl_rst_rqd:1; /* Dev requires
fundamental
> >> > reset
> >> > */
> >> > unsigned int state_saved:1;
> >> > unsigned int is_physfn:1;
> >> > unsigned int is_virtfn:1;
> >>
> >> As Ben points out, the name is awkward. How about needs_freset ?
> >
> > I am OK with name change.
> >
> >
> >> Since this affects the entire pci subsystem, it should be documented
> >> properly. The "pci error recovery" subsystem was designed to be
> >> usable in other architectures, and so the error recovery docs should
> >> take at least a paragraph to describe what this flag means, and when
> >> its supposed to be used.
> >
> > I will update the documentation, are you referring to
> > Documentation/powerpc/eeh-pci-error-recovery.txt
> > or some other documentation?
>
> No, I'm thinking
> Documentation/PCI/pci-error-recovery.txt
>
> because the flag is not powerpc-specific.
Got it, glad I asked...
-rich
> >
> >> Providing the docs patch together with the pci.h patch *only* would
> >> probably simplify acceptance by the PCI community.
> >>
> >> --linas
> >
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^ permalink raw reply
* Re: Question about head_fsl_booke.S
From: Kumar Gala @ 2009-07-27 14:26 UTC (permalink / raw)
To: wilbur.chan; +Cc: linuxppc-dev
In-Reply-To: <e997b7420907260834v5923326ele5af13713622c366@mail.gmail.com>
On Jul 26, 2009, at 10:34 AM, wilbur.chan wrote:
> e500 , in head_fsl_booke.S
>
> We know,the first two steps are:
>
> 1) invalidate all entries except the entry we are in
>
> 2) setup a temp mapping and jump to it respectively:
>
>
>
> tlbwe
>
> bl 1f
> 1: mflr r9
> rlwimi r7,r9,0,20,31
> addi r7, r7,24
> mtspr SPRN_SRR0,r7
> mtspr SPRN_SRR1,r6
> rfi
> /* jump to 0-4k .
> question1: Why not this 'rfi' did not caused jumping into
> 4k-8k , or 10k-14k , etc ? */
I'm not sure what version of this code you are referencing but it sets
up a mapping in the alternate address space and jumps to the same EPN.
>
>
> li r6,0
>
>
>
> question2: We know that, it is not allowed the two entrys having the
> same EPN value,so, when setting up a temp entry which ranged from
> 0-4k, is it possible that , this
> range(0-4k) may conflit with the entry we are executed in now?
Its not allowed for two entries to have the same VA (or conflicting
VAs) its perfectly find to have the same EPN. We use the address
space bit of the VA to ensure we don't conflict.
- k
^ permalink raw reply
* Re: "test" branch update
From: Michael Ellerman @ 2009-07-27 8:45 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev list
In-Reply-To: <1248668057.5706.2.camel@pasglop>
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On Mon, 2009-07-27 at 14:14 +1000, Benjamin Herrenschmidt wrote:
> Hi !
>
> I've started collecting things for my -next branch. For now I put
> everything in -test, I'll move it over to -next in the upcoming couple
> of days if there's no major issue found.
I'm seeing this on Power 6 (Didgo3), haven't had a chance to look any
closer, 100% reproducible, using SLUB.
HugeTLB registered 16 MB page size, pre-allocated 0 pages
HugeTLB registered 16 GB page size, pre-allocated 0 pages
HugeTLB registered 64 KB page size, pre-allocated 0 pages
Unable to handle kernel paging request for data at address 0x00000000
Faulting instruction address: 0xc00000000003ea98
cpu 0x0: Vector: 300 (Data Access) at [c0000000fe6e3840]
pc: c00000000003ea98: .strcmp+0x10/0x24
lr: c0000000001c8e60: .sysfs_find_dirent+0x3c/0x78
sp: c0000000fe6e3ac0
msr: 8000000000009032
dar: 0
dsisr: 40000000
current = 0xc0000000fe6d8000
paca = 0xc000000000ab3200
pid = 1, comm = swapper
enter ? for help
[link register ] c0000000001c8e60 .sysfs_find_dirent+0x3c/0x78
[c0000000fe6e3ac0] c0000000001c939c .sysfs_addrm_start+0x70/0xec
(unreliable)
[c0000000fe6e3b50] c0000000001c6f50 .sysfs_hash_and_remove+0x58/0xb0
[c0000000fe6e3c10] c0000000001ca8a4 .sysfs_remove_link+0x4c/0x6c
[c0000000fe6e3cb0] c00000000014612c .sysfs_slab_alias+0x64/0x154
[c0000000fe6e3d60] c00000000090e22c .slab_sysfs_init+0xd4/0x130
[c0000000fe6e3e00] c000000000009848 .do_one_initcall+0x90/0x1b8
[c0000000fe6e3ef0] c0000000008ef4c0 .kernel_init+0x1f8/0x278
[c0000000fe6e3f90] c00000000002f570 .kernel_thread+0x54/0x70
0:mon> r
R00 = c0000000001c6f50 R16 = 0000000000000000
R01 = c0000000fe6e3ac0 R17 = 0000000004d2dbb8
R02 = c000000000a72248 R18 = c00000000092da50
R03 = 0000000000000073 R19 = 0000000000000000
R04 = ffffffffffffffff R20 = 0000000002f1fed0
R05 = c0000000feb70460 R21 = 0000000004d2da78
R06 = c0000000fec19640 R22 = 0000000004400000
R07 = 0000000000000001 R23 = c00000000092da48
R08 = ffffffffffffffff R24 = c00000000092da58
R09 = c000000000bd6080 R25 = 00000000010ad378
R10 = 0000000000000816 R26 = c000000000aa7ac0
R11 = 0000000000000012 R27 = 0000000000000000
R12 = 0000000024000084 R28 = 0000000000000000
R13 = c000000000ab3200 R29 = c0000000fec19690
R14 = 0000000000000000 R30 = c0000000009ddd98
R15 = 0000000000000000 R31 = c0000000fe6e3ac0
pc = c00000000003ea98 .strcmp+0x10/0x24
lr = c0000000001c8e60 .sysfs_find_dirent+0x3c/0x78
msr = 8000000000009032 cr = 24000048
ctr = 0000000000000000 xer = 000000002000000b trap = 300
dar = 0000000000000000 dsisr = 40000000
0:mon>
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^ permalink raw reply
* Re: [PATCH] powerpc/perf_counter: Add alignment-faults and emulation-faults sw events
From: Peter Zijlstra @ 2009-07-27 6:27 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, mingo, paulus, Anton Blanchard, linux-kernel
In-Reply-To: <1248675962.6987.1423.camel@twins>
On Mon, 2009-07-27 at 08:26 +0200, Peter Zijlstra wrote:
> On Mon, 2009-07-27 at 11:47 +1000, Benjamin Herrenschmidt wrote:
>
> > Sounds good.
> >
> > BTW. The patch relies on some perctr changes I don't have in my tree
> > (PERF_COUNT_SW_ALIGNMENT_FAULTS isn't defined for me)
> >
> > Ingo, how do you want to handle that ? Should I wait til round 2 of the
> > merge window before putting Anton's patch in or can I merge some of your
> > stuff in powerpc-next as pre-reqs ? Or you can just take Anton's patch
> > with my:
> >
> > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> >
> > And stick it in your own queue (though pls, give me a pointer to the git
> > tree in question so I can verify that I don't get new stuff that
> > conflicts before we get to the merge window).
>
> Please send all missing bits to me and I'll stuff it into:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-perf.git perf-master
Or if they're all PPC specific I have no objections of them going
through the PPC git tree.
^ permalink raw reply
* Re: [PATCH] powerpc/perf_counter: Add alignment-faults and emulation-faults sw events
From: Peter Zijlstra @ 2009-07-27 6:26 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, mingo, paulus, Anton Blanchard, linux-kernel
In-Reply-To: <1248659272.28464.29.camel@pasglop>
On Mon, 2009-07-27 at 11:47 +1000, Benjamin Herrenschmidt wrote:
> Sounds good.
>
> BTW. The patch relies on some perctr changes I don't have in my tree
> (PERF_COUNT_SW_ALIGNMENT_FAULTS isn't defined for me)
>
> Ingo, how do you want to handle that ? Should I wait til round 2 of the
> merge window before putting Anton's patch in or can I merge some of your
> stuff in powerpc-next as pre-reqs ? Or you can just take Anton's patch
> with my:
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>
> And stick it in your own queue (though pls, give me a pointer to the git
> tree in question so I can verify that I don't get new stuff that
> conflicts before we get to the merge window).
Please send all missing bits to me and I'll stuff it into:
git://git.kernel.org/pub/scm/linux/kernel/git/peterz/linux-2.6-perf.git perf-master
^ permalink raw reply
* Re: [PATCH] powerpc/perf_counter: Add alignment-faults and emulation-faults sw events
From: Benjamin Herrenschmidt @ 2009-07-27 4:57 UTC (permalink / raw)
To: Anton Blanchard; +Cc: linuxppc-dev, mingo, paulus, a.p.zijlstra, linux-kernel
In-Reply-To: <20090727015134.GA18301@kryten>
On Mon, 2009-07-27 at 11:51 +1000, Anton Blanchard wrote:
> Hi Ben,
>
> > BTW. The patch relies on some perctr changes I don't have in my tree
> > (PERF_COUNT_SW_ALIGNMENT_FAULTS isn't defined for me)
> >
> > Ingo, how do you want to handle that ? Should I wait til round 2 of the
> > merge window before putting Anton's patch in or can I merge some of your
> > stuff in powerpc-next as pre-reqs ? Or you can just take Anton's patch
> > with my:
> >
> > Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> >
> > And stick it in your own queue (though pls, give me a pointer to the git
> > tree in question so I can verify that I don't get new stuff that
> > conflicts before we get to the merge window).
>
> I've got another round of this series that I'll send out today.
Ok. I've pushed some to my -test branch, please let me know ASAP if I
have to withdraw some before I move them into -next
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc: Add compat_sys_truncate
From: Benjamin Herrenschmidt @ 2009-07-27 4:34 UTC (permalink / raw)
To: Chase Douglas; +Cc: linuxppc-dev
In-Reply-To: <87B65A66-572B-442E-88C6-872F23DF39D4@linux.vnet.ibm.com>
On Sun, 2009-07-26 at 22:23 -0400, Chase Douglas wrote:
> On Jul 26, 2009, at 8:37 PM, Benjamin Herrenschmidt wrote:
> > Unfortunately, your patch have been mangled by your mailer
> > our your mail gateway in about every possible way (word
> > wrapped, tabs and whitespace damaged etc...)
>
> Sorry about that! I made sure my mailer (OS X's Mail) sent it as plain
> text, but I don't know of any settings for specifying line width or
> white space handling. I'll have to do some more digging or use a
> different mailer for patches.
I'm sure you can find somebody else using OS X who can help :-)
I've also heard there may be a problem with our vnet servers but
I don't know for sure.
Cheers,
Ben.
^ permalink raw reply
* "test" branch update
From: Benjamin Herrenschmidt @ 2009-07-27 4:14 UTC (permalink / raw)
To: linuxppc-dev list
Hi !
I've started collecting things for my -next branch. For now I put
everything in -test, I'll move it over to -next in the upcoming couple
of days if there's no major issue found.
The current log if what I put in is:
Anton Blanchard (3):
powerpc: Move 64bit VDSO to improve context switch performance
powerpc: Rearrange SLB preload code
powerpc: Preload application text segment instead of TASK_UNMAPPED_BASE
Benjamin Herrenschmidt (27):
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
powerpc: Rename exception.h to exception-64s.h
powerpc: Use names rather than numbers for SPRGs (v2)
powerpc: Remove use of a second scratch SPRG in STAB code
powerpc/mm: Fix definitions of FORCE_MAX_ZONEORDER in Kconfig
powerpc/pmac: Fix PowerSurge SMP IPI allocation
powerpc: Change PACA from SPRG3 to SPRG1
powerpc/mm: Fix misplaced #endif in pgtable-ppc64-64k.h
powerpc/of: Remove useless register save/restore when calling OF back
powerpc/mm: Add HW threads support to no_hash TLB management
powerpc/mm: Add opcode definitions for tlbivax and tlbsrx.
powerpc/mm: Add more bit definitions for Book3E MMU registers
powerpc/mm: Add support for early ioremap on non-hash 64-bit processors
powerpc: Modify some ppc_asm.h macros to accomodate 64-bits Book3E
powerpc/mm: Make low level TLB flush ops on BookE take additional args
powerpc/mm: Call mmu_context_init() from ppc64
powerpc: Clean ifdef usage in copy_thread()
powerpc: Move definitions of secondary CPU spinloop to header file
powerpc/mm: Rework & cleanup page table freeing code path
powerpc: Add SPR definitions for new 64-bit BookE
powerpc: Add memory management headers for new 64-bit BookE
powerpc: Add definitions used by exception handling on 64-bit Book3E
powerpc: Add PACA fields specific to 64-bit Book3E processors
powerpc/mm: Move around mmu_gathers definition on 64-bit
powerpc: Add TLB management code for 64-bit Book3E
powerpc/mm: Add support for SPARSEMEM_VMEMMAP on 64-bit Book3E
powerpc: Remaining 64-bit Book3E support
Chase Douglas (1):
powerpc: Add compat_sys_truncate
Frans Pop (1):
powerpc: Makefile simplification through use of cc-ifversion
Geoff Thorpe (1):
powerpc: expose the multi-bit ops that underlie single-bit ops.
Gerhard Pircher (1):
powerpc/amigaone: Convert amigaone_init() to a machine_device_initcall()
Lucian Adrian Grijincu (1):
powerpc: Update boot wrapper script with the new location of dtc
Michael Ellerman (1):
powerpc/mpic: Fix MPIC_BROKEN_REGREAD on non broken MPICs
roel kluin (1):
powerpc/cell: Replace strncpy by strlcpy
^ permalink raw reply
* Re: [PATCH] prom_init: evaluate mem kernel parameter for early allocation
From: Benjamin Herrenschmidt @ 2009-07-27 4:09 UTC (permalink / raw)
To: Benjamin Krill; +Cc: linuxppc-dev
In-Reply-To: <20090717202922.GA20168@codiert.org>
On Fri, 2009-07-17 at 22:29 +0200, Benjamin Krill wrote:
> Evaluate mem kernel parameter for early memory allocations. If mem is set
> no allocation in the region above the given boundary is allowed. The current
> code doesn't take care about this and allocate memory above the given mem
> boundary.
Breaks build on ppc32 due to ...
> + opt = strstr(RELOC(prom_cmd_line), RELOC("mem="));
"opt" isn't defined (it's defined inside CONFIG_PPC64). Please respin
a patch that also removes that bit so that "opt" is always defined.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc: Add compat_sys_truncate
From: Chase Douglas @ 2009-07-27 2:23 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1248655033.28464.26.camel@pasglop>
On Jul 26, 2009, at 8:37 PM, Benjamin Herrenschmidt wrote:
> Unfortunately, your patch have been mangled by your mailer
> our your mail gateway in about every possible way (word
> wrapped, tabs and whitespace damaged etc...)
Sorry about that! I made sure my mailer (OS X's Mail) sent it as plain
text, but I don't know of any settings for specifying line width or
white space handling. I'll have to do some more digging or use a
different mailer for patches.
Thanks,
Chase
^ permalink raw reply
* Re: [PATCH] powerpc/perf_counter: Add alignment-faults and emulation-faults sw events
From: Anton Blanchard @ 2009-07-27 1:51 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, mingo, paulus, a.p.zijlstra, linux-kernel
In-Reply-To: <1248659272.28464.29.camel@pasglop>
Hi Ben,
> BTW. The patch relies on some perctr changes I don't have in my tree
> (PERF_COUNT_SW_ALIGNMENT_FAULTS isn't defined for me)
>
> Ingo, how do you want to handle that ? Should I wait til round 2 of the
> merge window before putting Anton's patch in or can I merge some of your
> stuff in powerpc-next as pre-reqs ? Or you can just take Anton's patch
> with my:
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>
> And stick it in your own queue (though pls, give me a pointer to the git
> tree in question so I can verify that I don't get new stuff that
> conflicts before we get to the merge window).
I've got another round of this series that I'll send out today.
Anton
^ permalink raw reply
* Re: [PATCH] powerpc/perf_counter: Add alignment-faults and emulation-faults sw events
From: Benjamin Herrenschmidt @ 2009-07-27 1:47 UTC (permalink / raw)
To: Anton Blanchard; +Cc: linuxppc-dev, mingo, paulus, a.p.zijlstra, linux-kernel
In-Reply-To: <20090706121845.GD4391@kryten>
On Mon, 2009-07-06 at 22:18 +1000, Anton Blanchard wrote:
> Hook up the alignment-faults and emulation-faults events for powerpc.
>
> Signed-off-by: Anton Blanchard <anton@samba.org>
> ---
>
> Lots of duplication between PPC_WARN_EMULATED() and perf_swcounter_event()
> here. Maybe we need to create PPC_WARN_ALIGNMENT(), use it and hide all
> calls to perf_swcounter_event in the macros.
Sounds good.
BTW. The patch relies on some perctr changes I don't have in my tree
(PERF_COUNT_SW_ALIGNMENT_FAULTS isn't defined for me)
Ingo, how do you want to handle that ? Should I wait til round 2 of the
merge window before putting Anton's patch in or can I merge some of your
stuff in powerpc-next as pre-reqs ? Or you can just take Anton's patch
with my:
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
And stick it in your own queue (though pls, give me a pointer to the git
tree in question so I can verify that I don't get new stuff that
conflicts before we get to the merge window).
Cheers,
Ben.
> Index: linux.trees.git/arch/powerpc/kernel/align.c
> ===================================================================
> --- linux.trees.git.orig/arch/powerpc/kernel/align.c 2009-07-06 21:50:53.000000000 +1000
> +++ linux.trees.git/arch/powerpc/kernel/align.c 2009-07-06 22:10:41.000000000 +1000
> @@ -25,6 +25,7 @@
> #include <asm/cache.h>
> #include <asm/cputable.h>
> #include <asm/emulated_ops.h>
> +#include <linux/perf_counter.h>
>
> struct aligninfo {
> unsigned char len;
> @@ -707,6 +708,9 @@
> */
> CHECK_FULL_REGS(regs);
>
> + perf_swcounter_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, 0, regs,
> + regs->nip);
> +
> dsisr = regs->dsisr;
>
> /* Some processors don't provide us with a DSISR we can use here,
> Index: linux.trees.git/arch/powerpc/kernel/traps.c
> ===================================================================
> --- linux.trees.git.orig/arch/powerpc/kernel/traps.c 2009-07-06 21:50:53.000000000 +1000
> +++ linux.trees.git/arch/powerpc/kernel/traps.c 2009-07-06 22:11:52.000000000 +1000
> @@ -34,6 +34,7 @@
> #include <linux/bug.h>
> #include <linux/kdebug.h>
> #include <linux/debugfs.h>
> +#include <linux/perf_counter.h>
>
> #include <asm/emulated_ops.h>
> #include <asm/pgtable.h>
> @@ -759,6 +760,8 @@
>
> /* Emulate the mfspr rD, PVR. */
> if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) {
> + perf_swcounter_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0,
> + regs, regs->nip);
> PPC_WARN_EMULATED(mfpvr);
> rd = (instword >> 21) & 0x1f;
> regs->gpr[rd] = mfspr(SPRN_PVR);
> @@ -767,6 +770,8 @@
>
> /* Emulating the dcba insn is just a no-op. */
> if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) {
> + perf_swcounter_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0,
> + regs, regs->nip);
> PPC_WARN_EMULATED(dcba);
> return 0;
> }
> @@ -776,6 +781,8 @@
> int shift = (instword >> 21) & 0x1c;
> unsigned long msk = 0xf0000000UL >> shift;
>
> + perf_swcounter_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0,
> + regs, regs->nip);
> PPC_WARN_EMULATED(mcrxr);
> regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
> regs->xer &= ~0xf0000000UL;
> @@ -784,18 +791,24 @@
>
> /* Emulate load/store string insn. */
> if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) {
> + perf_swcounter_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0,
> + regs, regs->nip);
> PPC_WARN_EMULATED(string);
> return emulate_string_inst(regs, instword);
> }
>
> /* Emulate the popcntb (Population Count Bytes) instruction. */
> if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) {
> + perf_swcounter_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0,
> + regs, regs->nip);
> PPC_WARN_EMULATED(popcntb);
> return emulate_popcntb_inst(regs, instword);
> }
>
> /* Emulate isel (Integer Select) instruction */
> if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) {
> + perf_swcounter_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0,
> + regs, regs->nip);
> PPC_WARN_EMULATED(isel);
> return emulate_isel(regs, instword);
> }
> @@ -994,8 +1007,11 @@
>
> #ifdef CONFIG_MATH_EMULATION
> errcode = do_mathemu(regs);
> - if (errcode >= 0)
> + if (errcode >= 0) {
> + perf_swcounter_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0,
> + regs, regs->nip);
> PPC_WARN_EMULATED(math);
> + }
>
> switch (errcode) {
> case 0:
> @@ -1017,8 +1033,11 @@
>
> #elif defined(CONFIG_8XX_MINIMAL_FPEMU)
> errcode = Soft_emulate_8xx(regs);
> - if (errcode >= 0)
> + if (errcode >= 0) {
> + perf_swcounter_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0,
> + regs, regs->nip);
> PPC_WARN_EMULATED(8xx);
> + }
>
> switch (errcode) {
> case 0:
> @@ -1129,6 +1148,8 @@
>
> flush_altivec_to_thread(current);
>
> + perf_swcounter_event(PERF_COUNT_SW_EMULATION_FAULTS, 1, 0, regs,
> + regs->nip);
> PPC_WARN_EMULATED(altivec);
> err = emulate_altivec(regs);
> if (err == 0) {
> --
> To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
> Please read the FAQ at http://www.tux.org/lkml/
^ permalink raw reply
* Re: [PATCH] powerpc: Add compat_sys_truncate
From: Benjamin Herrenschmidt @ 2009-07-27 0:37 UTC (permalink / raw)
To: Chase Douglas; +Cc: linuxppc-dev
In-Reply-To: <8349EEAE-34B9-4D7E-837F-1320057E59D2@linux.vnet.ibm.com>
On Thu, 2009-07-23 at 11:12 -0400, Chase Douglas wrote:
> The truncate syscall has a signed long parameter, so when using a 32-
> bit userspace with a 64-bit kernel the argument is zero-extended
> instead of sign-extended. Adding the compat_sys_truncate function
> fixes the issue.
>
> This was noticed during an LSB truncate test failure. The test was
> checking for the correct error number set when truncate is called with
> a length of -1. The test can be found at:
Hi Chase !
Unfortunately, your patch have been mangled by your mailer
our your mail gateway in about every possible way (word
wrapped, tabs and whitespace damaged etc...)
I'll hand apply this time around but please, look into
fixing your setup :-)
Cheers,
Ben.
> http://bzr.linuxfoundation.org/lsb/devel/runtime-test?cmd=inventory;rev=stewb%40linux-foundation.org-20090626205411-sfb23cc0tjj7jzgm;path=modules/vsx-pcts/tset/POSIX.os/files/truncate/
>
> Signed-off-by: Chase Douglas <cndougla@linux.vnet.ibm.com>
>
> diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/
> asm/systbl.h
> index 370600c..3cca167 100644
> --- a/arch/powerpc/include/asm/systbl.h
> +++ b/arch/powerpc/include/asm/systbl.h
> @@ -95,7 +95,7 @@ SYSCALL(reboot)
> SYSX(sys_ni_syscall,compat_sys_old_readdir,sys_old_readdir)
> SYSCALL_SPU(mmap)
> SYSCALL_SPU(munmap)
> -SYSCALL_SPU(truncate)
> +COMPAT_SYS_SPU(truncate)
> SYSCALL_SPU(ftruncate)
> SYSCALL_SPU(fchmod)
> SYSCALL_SPU(fchown)
> diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/
> sys_ppc32.c
> index bb1cfcf..da9a65b 100644
> --- a/arch/powerpc/kernel/sys_ppc32.c
> +++ b/arch/powerpc/kernel/sys_ppc32.c
> @@ -343,6 +343,12 @@ off_t ppc32_lseek(unsigned int fd, u32 offset,
> unsigned int origin)
> return sys_lseek(fd, (int)offset, origin);
> }
>
> +long compat_sys_truncate(const char __user * path, u32 length)
> +{
> + /* sign extend length */
> + return sys_truncate(path, (int)length);
> +}
> +
> /* Note: it is necessary to treat bufsiz as an unsigned int,
> * with the corresponding cast to a signed int to insure that the
> * proper conversion (sign extension) between the register
> representation of a signed int (msr in 32-bit mode)
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* [Patch 6/6] Adapt kexec and samples code to recognise PPC64 hardware breakpoint usage
From: K.Prasad @ 2009-07-27 0:19 UTC (permalink / raw)
To: David Gibson, linuxppc-dev
Cc: Michael Neuling, Benjamin Herrenschmidt, paulus, Alan Stern,
K.Prasad, Roland McGrath
In-Reply-To: <20090726235854.574539012@prasadkr_t60p.in.ibm.com>
Modify kexec code to disable DABR registers before a reboot. Adapt the samples
code to populate PPC64-arch specific fields.
Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
---
arch/powerpc/kernel/machine_kexec_64.c | 3 +++
samples/hw_breakpoint/data_breakpoint.c | 4 ++++
2 files changed, 7 insertions(+)
Index: linux-2.6-tip.hbkpt/arch/powerpc/kernel/machine_kexec_64.c
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/kernel/machine_kexec_64.c
+++ linux-2.6-tip.hbkpt/arch/powerpc/kernel/machine_kexec_64.c
@@ -24,6 +24,7 @@
#include <asm/sections.h> /* _end */
#include <asm/prom.h>
#include <asm/smp.h>
+#include <asm/hw_breakpoint.h>
int default_machine_kexec_prepare(struct kimage *image)
{
@@ -214,6 +215,7 @@ static void kexec_prepare_cpus(void)
put_cpu();
local_irq_disable();
+ hw_breakpoint_disable();
}
#else /* ! SMP */
@@ -233,6 +235,7 @@ static void kexec_prepare_cpus(void)
if (ppc_md.kexec_cpu_down)
ppc_md.kexec_cpu_down(0, 0);
local_irq_disable();
+ hw_breakpoint_disable();
}
#endif /* SMP */
Index: linux-2.6-tip.hbkpt/samples/hw_breakpoint/data_breakpoint.c
===================================================================
--- linux-2.6-tip.hbkpt.orig/samples/hw_breakpoint/data_breakpoint.c
+++ linux-2.6-tip.hbkpt/samples/hw_breakpoint/data_breakpoint.c
@@ -54,6 +54,10 @@ static int __init hw_break_module_init(v
sample_hbp.info.type = HW_BREAKPOINT_WRITE;
sample_hbp.info.len = HW_BREAKPOINT_LEN_4;
#endif /* CONFIG_X86 */
+#ifdef CONFIG_PPC64
+ sample_hbp.info.name = ksym_name;
+ sample_hbp.info.type = HW_BREAKPOINT_WRITE;
+#endif /* CONFIG_PPC64 */
sample_hbp.triggered = (void *)sample_hbp_handler;
^ permalink raw reply
* [Patch 5/6] Modify Data storage exception code to recognise DABR match first
From: K.Prasad @ 2009-07-27 0:18 UTC (permalink / raw)
To: David Gibson, linuxppc-dev
Cc: Michael Neuling, Benjamin Herrenschmidt, paulus, Alan Stern,
K.Prasad, Roland McGrath
In-Reply-To: <20090726235854.574539012@prasadkr_t60p.in.ibm.com>
Modify Data storage exception code to first lookout for a DABR match before
recognising a kprobe or xmon exception.
Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
---
arch/powerpc/mm/fault.c | 14 ++++++--------
1 file changed, 6 insertions(+), 8 deletions(-)
Index: linux-2.6-tip.hbkpt/arch/powerpc/mm/fault.c
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/mm/fault.c
+++ linux-2.6-tip.hbkpt/arch/powerpc/mm/fault.c
@@ -137,6 +137,12 @@ int __kprobes do_page_fault(struct pt_re
error_code &= 0x48200000;
else
is_write = error_code & DSISR_ISSTORE;
+
+ if (error_code & DSISR_DABRMATCH) {
+ /* DABR match */
+ do_dabr(regs, address, error_code);
+ return 0;
+ }
#else
is_write = error_code & ESR_DST;
#endif /* CONFIG_4xx || CONFIG_BOOKE */
@@ -151,14 +157,6 @@ int __kprobes do_page_fault(struct pt_re
if (!user_mode(regs) && (address >= TASK_SIZE))
return SIGSEGV;
-#if !(defined(CONFIG_4xx) || defined(CONFIG_BOOKE))
- if (error_code & DSISR_DABRMATCH) {
- /* DABR match */
- do_dabr(regs, address, error_code);
- return 0;
- }
-#endif /* !(CONFIG_4xx || CONFIG_BOOKE)*/
-
if (in_atomic() || mm == NULL) {
if (!user_mode(regs))
return SIGSEGV;
^ permalink raw reply
* [Patch 4/6] Modify process and processor handling code to recognise hardware debug registers
From: K.Prasad @ 2009-07-27 0:18 UTC (permalink / raw)
To: David Gibson, linuxppc-dev
Cc: Michael Neuling, Benjamin Herrenschmidt, paulus, Alan Stern,
K.Prasad, Roland McGrath
In-Reply-To: <20090726235854.574539012@prasadkr_t60p.in.ibm.com>
Modify process handling code to recognise hardware debug registers during copy
and flush operations. Introduce a new TIF_DEBUG task flag to indicate a
process's use of debug register. Load the debug register values into a
new CPU during initialisation.
Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
---
arch/powerpc/kernel/process.c | 15 +++++++++++++++
arch/powerpc/kernel/smp.c | 2 ++
2 files changed, 17 insertions(+)
Index: linux-2.6-tip.hbkpt/arch/powerpc/kernel/process.c
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/kernel/process.c
+++ linux-2.6-tip.hbkpt/arch/powerpc/kernel/process.c
@@ -50,6 +50,7 @@
#include <asm/syscalls.h>
#ifdef CONFIG_PPC64
#include <asm/firmware.h>
+#include <asm/hw_breakpoint.h>
#endif
#include <linux/kprobes.h>
#include <linux/kdebug.h>
@@ -254,8 +255,10 @@ void do_dabr(struct pt_regs *regs, unsig
11, SIGSEGV) == NOTIFY_STOP)
return;
+#ifndef CONFIG_PPC64
if (debugger_dabr_match(regs))
return;
+#endif
/* Clear the DAC and struct entries. One shot trigger */
#if defined(CONFIG_BOOKE)
@@ -372,8 +375,13 @@ struct task_struct *__switch_to(struct t
#endif /* CONFIG_SMP */
+#ifdef CONFIG_PPC64
+ if (unlikely(test_tsk_thread_flag(new, TIF_DEBUG)))
+ arch_install_thread_hw_breakpoint(new);
+#else
if (unlikely(__get_cpu_var(current_dabr) != new->thread.dabr))
set_dabr(new->thread.dabr);
+#endif /* CONFIG_PPC64 */
#if defined(CONFIG_BOOKE)
/* If new thread DAC (HW breakpoint) is the same then leave it */
@@ -550,6 +558,10 @@ void show_regs(struct pt_regs * regs)
void exit_thread(void)
{
discard_lazy_cpu_state();
+#ifdef CONFIG_PPC64
+ if (unlikely(test_tsk_thread_flag(current, TIF_DEBUG)))
+ flush_thread_hw_breakpoint(current);
+#endif /* CONFIG_PPC64 */
}
void flush_thread(void)
@@ -672,6 +684,9 @@ int copy_thread(unsigned long clone_flag
* function.
*/
kregs->nip = *((unsigned long *)ret_from_fork);
+
+ if (unlikely(test_tsk_thread_flag(current, TIF_DEBUG)))
+ copy_thread_hw_breakpoint(current, p, clone_flags);
#else
kregs->nip = (unsigned long)ret_from_fork;
#endif
Index: linux-2.6-tip.hbkpt/arch/powerpc/kernel/smp.c
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/kernel/smp.c
+++ linux-2.6-tip.hbkpt/arch/powerpc/kernel/smp.c
@@ -48,6 +48,7 @@
#include <asm/vdso_datapage.h>
#ifdef CONFIG_PPC64
#include <asm/paca.h>
+#include <asm/hw_breakpoint.h>
#endif
#ifdef DEBUG
@@ -537,6 +538,7 @@ int __devinit start_secondary(void *unus
local_irq_enable();
+ load_debug_registers();
cpu_idle();
return 0;
}
^ permalink raw reply
* [Patch 3/6] Modify ptrace code to use Hardware Breakpoint interfaces
From: K.Prasad @ 2009-07-27 0:18 UTC (permalink / raw)
To: David Gibson, linuxppc-dev
Cc: Michael Neuling, Benjamin Herrenschmidt, paulus, Alan Stern,
K.Prasad, Roland McGrath
In-Reply-To: <20090726235854.574539012@prasadkr_t60p.in.ibm.com>
Modify the ptrace code to use the hardware breakpoint interfaces for user-space.
Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
---
arch/powerpc/kernel/ptrace.c | 43 +++++++++++++++++++++++++++++++++++++++++++
1 file changed, 43 insertions(+)
Index: linux-2.6-tip.hbkpt/arch/powerpc/kernel/ptrace.c
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-tip.hbkpt/arch/powerpc/kernel/ptrace.c
@@ -37,6 +37,7 @@
#include <asm/page.h>
#include <asm/pgtable.h>
#include <asm/system.h>
+#include <asm/hw_breakpoint.h>
/*
* does not yet catch signals sent when the child dies.
@@ -757,11 +758,24 @@ void user_disable_single_step(struct tas
void ptrace_triggered(struct hw_breakpoint *bp, struct pt_regs *regs)
{
+ /*
+ * Unregister the breakpoint request here since ptrace has defined a
+ * one-shot behaviour for breakpoint exceptions in PPC64.
+ * The SIGTRAP signal is generated automatically for us in do_dabr().
+ * We don't have to do anything here
+ */
+ unregister_user_hw_breakpoint(current, bp);
+ kfree(bp);
}
int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
unsigned long data)
{
+#ifdef CONFIG_PPC64
+ struct thread_struct *thread = &(task->thread);
+ struct hw_breakpoint *bp;
+ int ret;
+#endif
/* For ppc64 we support one DABR and no IABR's at the moment (ppc64).
* For embedded processors we support one DAC and no IAC's at the
* moment.
@@ -791,6 +805,35 @@ int ptrace_set_debugreg(struct task_stru
if (data && !(data & DABR_TRANSLATION))
return -EIO;
+#ifdef CONFIG_PPC64
+ bp = thread->hbp[0];
+ if (data == 0) {
+ if (bp) {
+ unregister_user_hw_breakpoint(task, bp);
+ kfree(bp);
+ }
+ return 0;
+ }
+
+ if (bp) {
+ bp->info.type = data & HW_BREAKPOINT_RW;
+ task->thread.dabr = bp->info.address = data;
+ return modify_user_hw_breakpoint(task, bp);
+ }
+ bp = kzalloc(sizeof(struct hw_breakpoint), GFP_KERNEL);
+ if (!bp)
+ return -ENOMEM;
+
+ /* Store the type of breakpoint */
+ bp->info.type = data & HW_BREAKPOINT_RW;
+ bp->triggered = ptrace_triggered;
+ task->thread.dabr = bp->info.address = data;
+
+ ret = register_user_hw_breakpoint(task, bp);
+ if (ret)
+ return ret;
+#endif /* CONFIG_PPC64 */
+
/* Move contents to the DABR register */
task->thread.dabr = data;
^ permalink raw reply
* [Patch 2/6] Introduce PPC64 specific Hardware Breakpoint interfaces
From: K.Prasad @ 2009-07-27 0:13 UTC (permalink / raw)
To: David Gibson, linuxppc-dev
Cc: Michael Neuling, Benjamin Herrenschmidt, paulus, Alan Stern,
K.Prasad, Roland McGrath
In-Reply-To: <20090726235854.574539012@prasadkr_t60p.in.ibm.com>
Introduce PPC64 implementation for the generic hardware breakpoint interfaces
defined in kernel/hw_breakpoint.c. Enable the HAVE_HW_BREAKPOINT flag and the
Makefile.
Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
---
arch/powerpc/Kconfig | 1
arch/powerpc/kernel/Makefile | 2
arch/powerpc/kernel/hw_breakpoint.c | 298 ++++++++++++++++++++++++++++++++++++
arch/powerpc/kernel/ptrace.c | 4
4 files changed, 304 insertions(+), 1 deletion(-)
Index: linux-2.6-tip.hbkpt/arch/powerpc/Kconfig
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/Kconfig
+++ linux-2.6-tip.hbkpt/arch/powerpc/Kconfig
@@ -126,6 +126,7 @@ config PPC
select HAVE_SYSCALL_WRAPPERS if PPC64
select GENERIC_ATOMIC64 if PPC32
select HAVE_PERF_COUNTERS
+ select HAVE_HW_BREAKPOINT if PPC64
config EARLY_PRINTK
bool
Index: linux-2.6-tip.hbkpt/arch/powerpc/kernel/Makefile
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/kernel/Makefile
+++ linux-2.6-tip.hbkpt/arch/powerpc/kernel/Makefile
@@ -35,7 +35,7 @@ obj-$(CONFIG_PPC64) += setup_64.o sys_p
signal_64.o ptrace32.o \
paca.o cpu_setup_ppc970.o \
cpu_setup_pa6t.o \
- firmware.o nvram_64.o
+ firmware.o nvram_64.o hw_breakpoint.o
obj64-$(CONFIG_RELOCATABLE) += reloc_64.o
obj-$(CONFIG_PPC64) += vdso64/
obj-$(CONFIG_ALTIVEC) += vecemu.o
Index: linux-2.6-tip.hbkpt/arch/powerpc/kernel/hw_breakpoint.c
===================================================================
--- /dev/null
+++ linux-2.6-tip.hbkpt/arch/powerpc/kernel/hw_breakpoint.c
@@ -0,0 +1,298 @@
+/*
+ * HW_breakpoint: a unified kernel/user-space hardware breakpoint facility,
+ * using the CPU's debug registers.
+ */
+
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright © 2009 IBM Corporation
+ */
+
+#include <linux/notifier.h>
+#include <linux/kallsyms.h>
+#include <linux/kprobes.h>
+#include <linux/percpu.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/sched.h>
+#include <linux/init.h>
+#include <linux/smp.h>
+
+#include <asm/hw_breakpoint.h>
+#include <asm/processor.h>
+#include <asm/sstep.h>
+
+/* Store the kernel-space breakpoint address value */
+static unsigned long kdabr;
+
+/*
+ * Temporarily stores address for DABR before it is written by the
+ * single-step handler routine
+ */
+static DEFINE_PER_CPU(unsigned long, dabr_data);
+
+void arch_update_kernel_hw_breakpoint(void *unused)
+{
+ struct hw_breakpoint *bp;
+
+ /* Check if there is nothing to update */
+ if (hbp_kernel_pos == HBP_NUM)
+ return;
+
+ per_cpu(this_hbp_kernel[hbp_kernel_pos], get_cpu()) = bp =
+ hbp_kernel[hbp_kernel_pos];
+ if (bp == NULL)
+ kdabr = 0;
+ else
+ kdabr = (bp->info.address & ~HW_BREAKPOINT_ALIGN) |
+ bp->info.type | DABR_TRANSLATION;
+ set_dabr(kdabr);
+ put_cpu();
+}
+
+/*
+ * Install the thread breakpoints in their debug registers.
+ */
+void arch_install_thread_hw_breakpoint(struct task_struct *tsk)
+{
+ set_dabr(tsk->thread.dabr);
+}
+
+/*
+ * Clear the DABR which contains the thread-specific breakpoint address
+ */
+void arch_uninstall_thread_hw_breakpoint()
+{
+ set_dabr(0);
+}
+
+/*
+ * Store a breakpoint's encoded address, length, and type.
+ */
+int arch_store_info(struct hw_breakpoint *bp, struct task_struct *tsk)
+{
+ /* Symbol names from user-space are rejected */
+ if (tsk) {
+ if (bp->info.name)
+ return -EINVAL;
+ else
+ return 0;
+ }
+ /*
+ * User-space requests will always have the address field populated
+ * For kernel-addresses, either the address or symbol name can be
+ * specified.
+ */
+ if (bp->info.name)
+ bp->info.address = (unsigned long)
+ kallsyms_lookup_name(bp->info.name);
+ if (bp->info.address)
+ if (kallsyms_lookup_size_offset(bp->info.address,
+ &(bp->info.symbolsize), NULL))
+ return 0;
+ return -EINVAL;
+}
+
+/*
+ * Validate the arch-specific HW Breakpoint register settings
+ */
+int arch_validate_hwbkpt_settings(struct hw_breakpoint *bp,
+ struct task_struct *tsk)
+{
+ int is_kernel, ret = -EINVAL;
+
+ if (!bp)
+ return ret;
+
+ switch (bp->info.type) {
+ case HW_BREAKPOINT_READ:
+ case HW_BREAKPOINT_WRITE:
+ case HW_BREAKPOINT_RW:
+ break;
+ default:
+ return ret;
+ }
+
+ if (!bp->triggered)
+ return -EINVAL;
+
+ ret = arch_store_info(bp, tsk);
+ is_kernel = is_kernel_addr(bp->info.address);
+ if ((tsk && is_kernel) || (!tsk && !is_kernel))
+ return -EINVAL;
+
+ return ret;
+}
+
+void arch_update_user_hw_breakpoint(int pos, struct task_struct *tsk)
+{
+ struct thread_struct *thread = &(tsk->thread);
+ struct hw_breakpoint *bp = thread->hbp[0];
+
+ if (bp)
+ thread->dabr = (bp->info.address & ~HW_BREAKPOINT_ALIGN) |
+ bp->info.type | DABR_TRANSLATION;
+ else
+ thread->dabr = 0;
+}
+
+void arch_flush_thread_hw_breakpoint(struct task_struct *tsk)
+{
+ struct thread_struct *thread = &(tsk->thread);
+
+ thread->dabr = 0;
+}
+
+/*
+ * Handle debug exception notifications.
+ */
+int __kprobes hw_breakpoint_handler(struct die_args *args)
+{
+ int rc = NOTIFY_STOP;
+ struct hw_breakpoint *bp;
+ struct pt_regs *regs = args->regs;
+ unsigned long dar = regs->dar;
+ int cpu, is_kernel, stepped = 1;
+
+ is_kernel = (hbp_kernel_pos == HBP_NUM) ? 0 : 1;
+
+ /* Disable breakpoints during exception handling */
+ set_dabr(0);
+
+ cpu = get_cpu();
+ /* Determine whether kernel- or user-space address is the trigger */
+ bp = is_kernel ?
+ per_cpu(this_hbp_kernel[0], cpu) : current->thread.hbp[0];
+ /*
+ * bp can be NULL due to lazy debug register switching
+ * or due to the delay between updates of hbp_kernel_pos
+ * and this_hbp_kernel.
+ */
+ if (!bp)
+ goto out;
+
+ per_cpu(dabr_data, cpu) = is_kernel ? kdabr : current->thread.dabr;
+
+ /* Verify if dar lies within the address range occupied by the symbol
+ * being watched. Since we cannot get the symbol size for
+ * user-space requests we skip this check in that case
+ */
+ if (is_kernel &&
+ !((bp->info.address <= dar) &&
+ (dar <= (bp->info.address + bp->info.symbolsize))))
+ /*
+ * This exception is triggered not because of a memory access on
+ * the monitored variable but in the double-word address range
+ * in which it is contained. We will consume this exception,
+ * considering it as 'noise'.
+ */
+ goto out;
+
+ (bp->triggered)(bp, regs);
+ /*
+ * Return early without restoring DABR if the breakpoint is from
+ * user-space which always operates in one-shot mode
+ */
+ if (!is_kernel) {
+ rc = NOTIFY_DONE;
+ goto out;
+ }
+
+ stepped = emulate_step(regs, regs->nip);
+ /*
+ * Single-step the causative instruction manually if
+ * emulate_step() could not execute it
+ */
+ if (stepped == 0) {
+ regs->msr |= MSR_SE;
+ goto out;
+ }
+ set_dabr(per_cpu(dabr_data, cpu));
+
+out:
+ /* Enable pre-emption only if single-stepping is finished */
+ if (stepped) {
+ per_cpu(dabr_data, cpu) = 0;
+ put_cpu();
+ }
+ return rc;
+}
+
+/*
+ * Handle single-step exceptions following a DABR hit.
+ */
+int __kprobes single_step_dabr_instruction(struct die_args *args)
+{
+ struct pt_regs *regs = args->regs;
+ int cpu = get_cpu();
+ int ret = NOTIFY_DONE;
+ siginfo_t info;
+ unsigned long this_dabr_data = per_cpu(dabr_data, cpu);
+
+ /*
+ * Check if we are single-stepping as a result of a
+ * previous HW Breakpoint exception
+ */
+ if (this_dabr_data == 0)
+ goto out;
+
+ regs->msr &= ~MSR_SE;
+ /* Deliver signal to user-space */
+ if (this_dabr_data < TASK_SIZE) {
+ info.si_signo = SIGTRAP;
+ info.si_errno = 0;
+ info.si_code = TRAP_HWBKPT;
+ info.si_addr = (void __user *)(per_cpu(dabr_data, cpu));
+ force_sig_info(SIGTRAP, &info, current);
+ }
+
+ set_dabr(this_dabr_data);
+ per_cpu(dabr_data, cpu) = 0;
+ ret = NOTIFY_STOP;
+ /*
+ * If single-stepped after hw_breakpoint_handler(), pre-emption is
+ * already disabled.
+ */
+ put_cpu();
+
+out:
+ /*
+ * A put_cpu() call is required to complement the get_cpu()
+ * call used initially
+ */
+ put_cpu();
+ return ret;
+}
+
+/*
+ * Handle debug exception notifications.
+ */
+int __kprobes hw_breakpoint_exceptions_notify(
+ struct notifier_block *unused, unsigned long val, void *data)
+{
+ int ret = NOTIFY_DONE;
+
+ switch (val) {
+ case DIE_DABR_MATCH:
+ ret = hw_breakpoint_handler(data);
+ break;
+ case DIE_SSTEP:
+ ret = single_step_dabr_instruction(data);
+ break;
+ }
+
+ return ret;
+}
Index: linux-2.6-tip.hbkpt/arch/powerpc/kernel/ptrace.c
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/kernel/ptrace.c
+++ linux-2.6-tip.hbkpt/arch/powerpc/kernel/ptrace.c
@@ -755,6 +755,10 @@ void user_disable_single_step(struct tas
clear_tsk_thread_flag(task, TIF_SINGLESTEP);
}
+void ptrace_triggered(struct hw_breakpoint *bp, struct pt_regs *regs)
+{
+}
+
int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
unsigned long data)
{
^ permalink raw reply
* [Patch 1/6] Prepare the PowerPC platform for HW Breakpoint infrastructure
From: K.Prasad @ 2009-07-27 0:12 UTC (permalink / raw)
To: David Gibson, linuxppc-dev
Cc: Michael Neuling, Benjamin Herrenschmidt, paulus, Alan Stern,
K.Prasad, Roland McGrath
In-Reply-To: <20090726235854.574539012@prasadkr_t60p.in.ibm.com>
Prepare the PowerPC code for HW Breakpoint infrastructure patches by including
relevant constant definitions and function declarations.
Signed-off-by: K.Prasad <prasad@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/hw_breakpoint.h | 59 +++++++++++++++++++++++++++++++
arch/powerpc/include/asm/processor.h | 1
arch/powerpc/include/asm/reg.h | 3 +
arch/powerpc/include/asm/thread_info.h | 2 +
4 files changed, 65 insertions(+)
Index: linux-2.6-tip.hbkpt/arch/powerpc/include/asm/hw_breakpoint.h
===================================================================
--- /dev/null
+++ linux-2.6-tip.hbkpt/arch/powerpc/include/asm/hw_breakpoint.h
@@ -0,0 +1,59 @@
+#ifndef _PPC64_HW_BREAKPOINT_H
+#define _PPC64_HW_BREAKPOINT_H
+
+#ifdef __KERNEL__
+#define __ARCH_HW_BREAKPOINT_H
+#ifdef CONFIG_PPC64
+
+struct arch_hw_breakpoint {
+ char *name; /* Contains name of the symbol to set bkpt */
+ unsigned long address;
+ int type;
+ unsigned long symbolsize;
+};
+
+#include <linux/kdebug.h>
+#include <asm/reg.h>
+#include <asm-generic/hw_breakpoint.h>
+
+#define HW_BREAKPOINT_READ DABR_DATA_READ
+#define HW_BREAKPOINT_WRITE DABR_DATA_WRITE
+#define HW_BREAKPOINT_RW (DABR_DATA_READ | DABR_DATA_WRITE)
+
+#define HW_BREAKPOINT_ALIGN 0x7
+#define HW_BREAKPOINT_LEN INSTRUCTION_LEN
+
+extern struct hw_breakpoint *hbp_kernel[HBP_NUM];
+DECLARE_PER_CPU(struct hw_breakpoint*, this_hbp_kernel[HBP_NUM]);
+extern unsigned int hbp_user_refcount[HBP_NUM];
+
+extern void arch_install_thread_hw_breakpoint(struct task_struct *tsk);
+extern void arch_uninstall_thread_hw_breakpoint(void);
+extern int arch_validate_hwbkpt_settings(struct hw_breakpoint *bp,
+ struct task_struct *tsk);
+extern void arch_update_user_hw_breakpoint(int pos, struct task_struct *tsk);
+extern void arch_flush_thread_hw_breakpoint(struct task_struct *tsk);
+extern void arch_update_kernel_hw_breakpoint(void *);
+extern int hw_breakpoint_exceptions_notify(struct notifier_block *unused,
+ unsigned long val, void *data);
+
+extern void flush_thread_hw_breakpoint(struct task_struct *tsk);
+extern int copy_thread_hw_breakpoint(struct task_struct *tsk,
+ struct task_struct *child, unsigned long clone_flags);
+extern void load_debug_registers(void);
+extern void ptrace_triggered(struct hw_breakpoint *bp, struct pt_regs *regs);
+
+static inline void hw_breakpoint_disable(void)
+{
+ set_dabr(0);
+}
+
+#else
+static inline void hw_breakpoint_disable(void)
+{
+ /* Function is defined only on PPC64 for now */
+}
+#endif /* CONFIG_PPC64 */
+#endif /* __KERNEL__ */
+#endif /* _PPC64_HW_BREAKPOINT_H */
+
Index: linux-2.6-tip.hbkpt/arch/powerpc/include/asm/processor.h
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/include/asm/processor.h
+++ linux-2.6-tip.hbkpt/arch/powerpc/include/asm/processor.h
@@ -177,6 +177,7 @@ struct thread_struct {
#ifdef CONFIG_PPC64
unsigned long start_tb; /* Start purr when proc switched in */
unsigned long accum_tb; /* Total accumilated purr for process */
+ struct hw_breakpoint *hbp[HBP_NUM];
#endif
unsigned long dabr; /* Data address breakpoint register */
#ifdef CONFIG_ALTIVEC
Index: linux-2.6-tip.hbkpt/arch/powerpc/include/asm/reg.h
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/include/asm/reg.h
+++ linux-2.6-tip.hbkpt/arch/powerpc/include/asm/reg.h
@@ -26,6 +26,8 @@
#include <asm/reg_8xx.h>
#endif /* CONFIG_8xx */
+#define INSTRUCTION_LEN 4 /* Length of any instruction */
+
#define MSR_SF_LG 63 /* Enable 64 bit mode */
#define MSR_ISF_LG 61 /* Interrupt 64b mode valid on 630 */
#define MSR_HV_LG 60 /* Hypervisor state */
@@ -184,6 +186,7 @@
#define CTRL_TE 0x00c00000 /* thread enable */
#define CTRL_RUNLATCH 0x1
#define SPRN_DABR 0x3F5 /* Data Address Breakpoint Register */
+#define HBP_NUM 1 /* Number of physical HW breakpoint registers */
#define DABR_TRANSLATION (1UL << 2)
#define DABR_DATA_WRITE (1UL << 1)
#define DABR_DATA_READ (1UL << 0)
Index: linux-2.6-tip.hbkpt/arch/powerpc/include/asm/thread_info.h
===================================================================
--- linux-2.6-tip.hbkpt.orig/arch/powerpc/include/asm/thread_info.h
+++ linux-2.6-tip.hbkpt/arch/powerpc/include/asm/thread_info.h
@@ -112,6 +112,7 @@ static inline struct thread_info *curren
#define TIF_FREEZE 14 /* Freezing for suspend */
#define TIF_RUNLATCH 15 /* Is the runlatch enabled? */
#define TIF_ABI_PENDING 16 /* 32/64 bit switch needed */
+#define TIF_DEBUG 17 /* uses debug registers */
/* as above, but as bit values */
#define _TIF_SYSCALL_TRACE (1<<TIF_SYSCALL_TRACE)
@@ -130,6 +131,7 @@ static inline struct thread_info *curren
#define _TIF_FREEZE (1<<TIF_FREEZE)
#define _TIF_RUNLATCH (1<<TIF_RUNLATCH)
#define _TIF_ABI_PENDING (1<<TIF_ABI_PENDING)
+#define _TIF_DEBUG (1<<TIF_DEBUG)
#define _TIF_SYSCALL_T_OR_A (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
#define _TIF_USER_WORK_MASK (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
^ permalink raw reply
* [Patch 0/6] [Patch 0/6] PPC64-HWBKPT: Hardware Breakpoint interfaces - ver VIII
From: K.Prasad @ 2009-07-27 0:11 UTC (permalink / raw)
To: David Gibson, linuxppc-dev
Cc: paulus, Michael Neuling, Benjamin Herrenschmidt, Alan Stern,
Roland McGrath
Hi David,
I'm back with a new version of patches after a brief hiatus!
After much deliberation about modifying the code to change the timing of signal
delivery to user-space, it has been decided to retain the existing behaviour
i.e. SIGTRAP delivered to user-space after execution of causative instruction
although exception is raised before execution of it.
One-shot behaviour will now be restricted only to ptrace requests. Kernel-space
and non-ptrace user-space requests will result in persistent breakpoints.
Reasons
--------
- Signal delivery before execution of instruction requires complex workarounds
- One of the plausible workarounds is a two-pass hw-breakpoint handler which
delivers the signal after the first pass (with the breakpoints enabled).
In the second pass, it follows the existing semantics of
disable_hbp-->enable_ss-->single_step-->disable_ss-->enable_hbp.
- Possibility of nested exceptions is a problem here.
- Proper identification of a second-pass of first exception and a new nested
exception is difficult. Possibility of stray exceptions due to accesses in
neighbouring memory regions of the breakpoint address further complicates it.
- Alternatives are i)use one-shot for all user-space requests ii)disable signal
delivery for non-ptrace requests, allow the user-defined callback routine to
generate signal.
- Using one-shot for all user-space requests will break the register/unregister
interface semantics.
- Disabling signal delivery for non-ptrace requests is one of the options
but will be a digression from x86 behaviour, or would require changes in x86
code too. Even user-defined callback routines cannot deliver signal
before instruction execution.
Considering all the above, we propose a behaviour that delivers the signal to
user-space after breakpoint execution. In due course, it will be good to have
ptrace on PPC64 follow the same behaviour.
Changelog - ver VIII
-------------------
- Reverting changes to allow one-shot breakpoints only for ptrace requests.
- Minor changes in sanity checking in arch_validate_hwbkpt_settings().
- put_cpu_no_resched() is no longer available. Converted to put_cpu().
Thanks,
K.Prasad
Previous changelogs
-------------------
Changelog - ver VII
-------------------
- Allow the one-shot behaviour for exception handlers to be defined by the user.
A new 'is_one_shot' flag is added to 'struct arch_hw_breakpoint'.
Changelog - ver VI
------------------
The task of identifying 'genuine' breakpoint exceptions from those caused by
'out-of-range' accesses turned out to be more tricky than originally thought.
Some changes to this effect were made in version IV of this patchset, but they
were not sufficient for user-space. Basically the breakpoint address received
through ptrace is always aligned to 8-bytes since ptrace receives an encoded
'data' (consisting of address | translation_enable | bkpt_type), and the size of
the symbol is not known. However for kernel-space addresses, the symbol-size can
be determined using kallsyms_lookup_size_offset() and this is used to check if
DAR (in the exception context) is
'bkpt_address <= DAR <= (bkpt_address + symbol_size)', failing which we conclude
it as a stray exception.
The following changes are made to enable check:
- Addition of a symbolsize field in 'struct arch_hw_breakpoint' field.
- Store the size of the 'watched' kernel symbol into 'symbolsize' field in
arch_store_info(0 routine.
- Verify if the above described condition is true when is_one_shot is FALSE in
hw_breakpoint_handler().
Changelog - ver V
------------------
- Breakpoint requests from ptrace (for user-space) are designed to be one-shot
in PPC64. The patch contains changes to retain this behaviour by returning early
in hw_breakpoint_handler() [without re-initialising DABR] and unregistering the
user-space request in ptrace_triggered(). It is safe to make a
unregister_user_hw_breakpoint() call from the breakpoint exception context
[through ptrace_triggered()] without giving rise to circular locking-dependancy.
This is because there can be no kernel code running on the CPU (which received
the exception) with the same spinlock held.
- Minor change in 'type' member of 'struct arch_hw_breakpoint' from u8 to 'int'.
Changelog - ver IV
------------------
- While DABR register requires double-word (8 bytes) aligned addresses, i.e.
the breakpoint is active over a range of 8 bytes, PPC64 allows byte-level
addressability. This may lead to stray exceptions which have to be ignored in
hw_breakpoint_handler(), when DAR != (Breakpoint request address). However DABR
will be populated with the requested breakpoint address aligned to the previous
double-word address. The code is now modified to store user-requested address
in 'bp->info.address' but update the DABR with a double-word aligned address.
- Please note that the Data Breakpoint facility in Xmon is broken as of 2.6.29
and the same has not been integrated into this facility as described in Ver I.
Changelog - ver III
------------------
- Patches are based on commit 08f16e060bf54bdc34f800ed8b5362cdeda75d8b of -tip
tree.
- The declarations in arch/powerpc/include/asm/hw_breakpoint.h are done only if
CONFIG_PPC64 is defined. This eliminates the need to conditionally include this
header file.
- load_debug_registers() is done in start_secondary() i.e. during CPU
initialisation.
- arch_check_va_<> routines in hw_breakpoint.c are now replaced with a much
simpler is_kernel_addr() check in arch_validate_hwbkpt_settings()
- Return code of hw_breakpoint_handler() when triggered due to Lazy debug
register switching is now changed to NOTIFY_STOP.
- The ptrace code no longer sets the TIF_DEBUG task flag as it is proposed to
be done in register_user_hw_breakpoint() routine.
- hw_breakpoint_handler() is now modified to use hbp_kernel_pos value to
determine if the trigger was a user/kernel space address. The DAR register
value is checked with the address stored in 'struct hw_breakpoint' to avoid
handling of exceptions that belong to kprobe/Xmon.
Changelog - ver II
------------------
- Split the monolithic patch into six logical patches
- Changed the signature of arch_check_va_in_<user><kernel>space functions. They
are now marked static.
- HB_NUM is now called as HBP_NUM (to preserve a consistent short-name
convention)
- Introduced hw_breakpoint_disable() and changes to kexec code to disable
breakpoints before a reboot.
- Minor changes in ptrace code to use macro-defined constants instead of
numbers.
- Introduced a new constant definition INSTRUCTION_LEN in reg.h
^ permalink raw reply
* Re:
From: Benjamin Herrenschmidt @ 2009-07-26 23:38 UTC (permalink / raw)
To: Solomon Peachy; +Cc: linuxppc-dev
In-Reply-To: <1248359928-16624-1-git-send-email-solomon@linux-wlan.com>
On Thu, 2009-07-23 at 10:38 -0400, Solomon Peachy wrote:
> This patch (against 2.6.30) adds support for the ESTeem 195E Hotfoot
> SBC. We've been maintaining this out-of-tree for some time now for
> older kernels, but recently I ported it to the new unified powerpc tree
> with the intent of pushing it upstream.
Please always have a subject or it will end up in patchwork without
a link I can clock on :-)
Cheersm
Ben.
> The board uses an ancient version of u-boot and a slightly mangled
> verison of the oft-abused ppcboot header.
>
> There are several variants of the SBC deployed, single/dual
> ethernet/serial, and also 4MB/8MB flash units. In the interest of
> having a single kernel image boot on all boards, the cuboot shim detects
> the differences and mangles the DTS tree appropriately.
>
> With the exception of the CF interface that was never populated on
> production boards, this code/DTS supports all boardpop options.
>
> Signed-off-by: Solomon Peachy <solomon@linux-wlan.com>
>
> diff -Naur linux-2.6.30/arch/powerpc/boot/Makefile linux-2.6.30.hotfoot/arch/powerpc/boot/Makefile
> --- linux-2.6.30/arch/powerpc/boot/Makefile 2009-06-09 23:05:27.000000000 -0400
> +++ linux-2.6.30.hotfoot/arch/powerpc/boot/Makefile 2009-07-07 12:55:18.000000000 -0400
> @@ -39,6 +39,7 @@
>
> $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405
> $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
> +$(obj)/cuboot-hotfoot.o: BOOTCFLAGS += -mcpu=405
> $(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
> $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
> $(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
> @@ -67,7 +68,7 @@
> cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
> fsl-soc.c mpc8xx.c pq2.c
> src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
> - cuboot-ebony.c treeboot-ebony.c prpmc2800.c \
> + cuboot-ebony.c cuboot-hotfoot.c treeboot-ebony.c prpmc2800.c \
> ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
> cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \
> cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
> @@ -190,6 +191,7 @@
>
> # Board ports in arch/powerpc/platform/40x/Kconfig
> image-$(CONFIG_EP405) += dtbImage.ep405
> +image-$(CONFIG_HOTFOOT) += cuImage.hotfoot
> image-$(CONFIG_WALNUT) += treeImage.walnut
> image-$(CONFIG_ACADIA) += cuImage.acadia
>
> diff -Naur linux-2.6.30/arch/powerpc/boot/cuboot-hotfoot.c linux-2.6.30.hotfoot/arch/powerpc/boot/cuboot-hotfoot.c
> --- linux-2.6.30/arch/powerpc/boot/cuboot-hotfoot.c 1969-12-31 19:00:00.000000000 -0500
> +++ linux-2.6.30.hotfoot/arch/powerpc/boot/cuboot-hotfoot.c 2009-07-07 12:55:23.000000000 -0400
> @@ -0,0 +1,142 @@
> +/*
> + * Old U-boot compatibility for Esteem 195E Hotfoot CPU Board
> + *
> + * Author: Solomon Peachy <solomon@linux-wlan.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License version 2 as published
> + * by the Free Software Foundation.
> + */
> +
> +#include "ops.h"
> +#include "stdio.h"
> +#include "reg.h"
> +#include "dcr.h"
> +#include "4xx.h"
> +#include "cuboot.h"
> +
> +#define TARGET_4xx
> +#define TARGET_HOTFOOT
> +
> +#include "ppcboot.h"
> +
> +static bd_t bd;
> +
> +#define NUM_REGS 3
> +
> +static void hotfoot_fixups(void)
> +{
> + u32 uart = mfdcr(DCRN_CPC0_UCR) & 0x7f;
> +
> + dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
> +
> + dt_fixup_cpu_clocks(bd.bi_procfreq, bd.bi_procfreq, 0);
> + dt_fixup_clock("/plb", bd.bi_plb_busfreq);
> + dt_fixup_clock("/plb/opb", bd.bi_opbfreq);
> + dt_fixup_clock("/plb/ebc", bd.bi_pci_busfreq);
> + dt_fixup_clock("/plb/opb/serial@ef600300", bd.bi_procfreq / uart);
> + dt_fixup_clock("/plb/opb/serial@ef600400", bd.bi_procfreq / uart);
> +
> + dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
> + dt_fixup_mac_address_by_alias("ethernet1", bd.bi_enet1addr);
> +
> + /* Is this a single eth/serial board? */
> + if ((bd.bi_enet1addr[0] == 0) &&
> + (bd.bi_enet1addr[1] == 0) &&
> + (bd.bi_enet1addr[2] == 0) &&
> + (bd.bi_enet1addr[3] == 0) &&
> + (bd.bi_enet1addr[4] == 0) &&
> + (bd.bi_enet1addr[5] == 0)) {
> + void *devp;
> +
> + printf("Trimming devtree for single eth board\n");
> +
> + devp = finddevice("/plb/opb/serial@ef600300");
> + if (!devp)
> + fatal("Can't find node for /plb/opb/serial@ef600300");
> + del_node(devp);
> +
> + devp = finddevice("/plb/opb/ethernet@ef600900");
> + if (!devp)
> + fatal("Can't find node for /plb/opb/ethernet@ef600900");
> + del_node(devp);
> + }
> +
> + ibm4xx_quiesce_eth((u32 *)0xef600800, (u32 *)0xef600900);
> +
> + /* Fix up flash size in fdt for 4M boards. */
> + if (bd.bi_flashsize < 0x800000) {
> + u32 regs[NUM_REGS];
> + void *devp = finddevice("/plb/ebc/nor_flash@0");
> + if (!devp)
> + fatal("Can't find FDT node for nor_flash!??");
> +
> + printf("Fixing devtree for 4M Flash\n");
> +
> + /* First fix up the base addresse */
> + getprop(devp, "reg", regs, sizeof(regs));
> + regs[0] = 0;
> + regs[1] = 0xffc00000;
> + regs[2] = 0x00400000;
> + setprop(devp, "reg", regs, sizeof(regs));
> +
> + /* Then the offsets */
> + devp = finddevice("/plb/ebc/nor_flash@0/partition@0");
> + if (!devp)
> + fatal("Can't find FDT node for partition@0");
> + getprop(devp, "reg", regs, 2*sizeof(u32));
> + regs[0] -= 0x400000;
> + setprop(devp, "reg", regs, 2*sizeof(u32));
> +
> + devp = finddevice("/plb/ebc/nor_flash@0/partition@1");
> + if (!devp)
> + fatal("Can't find FDT node for partition@1");
> + getprop(devp, "reg", regs, 2*sizeof(u32));
> + regs[0] -= 0x400000;
> + setprop(devp, "reg", regs, 2*sizeof(u32));
> +
> + devp = finddevice("/plb/ebc/nor_flash@0/partition@2");
> + if (!devp)
> + fatal("Can't find FDT node for partition@2");
> + getprop(devp, "reg", regs, 2*sizeof(u32));
> + regs[0] -= 0x400000;
> + setprop(devp, "reg", regs, 2*sizeof(u32));
> +
> + devp = finddevice("/plb/ebc/nor_flash@0/partition@3");
> + if (!devp)
> + fatal("Can't find FDT node for partition@3");
> + getprop(devp, "reg", regs, 2*sizeof(u32));
> + regs[0] -= 0x400000;
> + setprop(devp, "reg", regs, 2*sizeof(u32));
> +
> + devp = finddevice("/plb/ebc/nor_flash@0/partition@4");
> + if (!devp)
> + fatal("Can't find FDT node for partition@4");
> + getprop(devp, "reg", regs, 2*sizeof(u32));
> + regs[0] -= 0x400000;
> + setprop(devp, "reg", regs, 2*sizeof(u32));
> +
> + devp = finddevice("/plb/ebc/nor_flash@0/partition@6");
> + if (!devp)
> + fatal("Can't find FDT node for partition@6");
> + getprop(devp, "reg", regs, 2*sizeof(u32));
> + regs[0] -= 0x400000;
> + setprop(devp, "reg", regs, 2*sizeof(u32));
> +
> + /* Delete the FeatFS node */
> + devp = finddevice("/plb/ebc/nor_flash@0/partition@5");
> + if (!devp)
> + fatal("Can't find FDT node for partition@5");
> + del_node(devp);
> + }
> +}
> +
> +void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
> + unsigned long r6, unsigned long r7)
> +{
> + CUBOOT_INIT();
> + platform_ops.fixups = hotfoot_fixups;
> + platform_ops.exit = ibm40x_dbcr_reset;
> + fdt_init(_dtb_start);
> + serial_console_init();
> +}
> diff -Naur linux-2.6.30/arch/powerpc/boot/dts/hotfoot.dts linux-2.6.30.hotfoot/arch/powerpc/boot/dts/hotfoot.dts
> --- linux-2.6.30/arch/powerpc/boot/dts/hotfoot.dts 1969-12-31 19:00:00.000000000 -0500
> +++ linux-2.6.30.hotfoot/arch/powerpc/boot/dts/hotfoot.dts 2009-07-07 12:55:23.000000000 -0400
> @@ -0,0 +1,299 @@
> +/*
> + * Device Tree Source for ESTeem 195E Hotfoot
> + *
> + * Copyright 2009 AbsoluteValue Systems <solomon@linux-wlan.com>
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2. This program is licensed "as is" without
> + * any warranty of any kind, whether express or implied.
> + */
> +
> +/dts-v1/;
> +
> +/ {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + model = "est,hotfoot";
> + compatible = "est,hotfoot";
> + dcr-parent = <&{/cpus/cpu@0}>;
> +
> + aliases {
> + ethernet0 = &EMAC0;
> + ethernet1 = &EMAC1;
> + serial0 = &UART0;
> + serial1 = &UART1;
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + model = "PowerPC,405EP";
> + reg = <0x00000000>;
> + clock-frequency = <0>; /* Filled in by zImage */
> + timebase-frequency = <0>; /* Filled in by zImage */
> + i-cache-line-size = <0x20>;
> + d-cache-line-size = <0x20>;
> + i-cache-size = <0x4000>;
> + d-cache-size = <0x4000>;
> + dcr-controller;
> + dcr-access-method = "native";
> + };
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x00000000>; /* Filled in by zImage */
> + };
> +
> + UIC0: interrupt-controller {
> + compatible = "ibm,uic";
> + interrupt-controller;
> + cell-index = <0>;
> + dcr-reg = <0x0c0 0x009>;
> + #address-cells = <0>;
> + #size-cells = <0>;
> + #interrupt-cells = <2>;
> + };
> +
> + plb {
> + compatible = "ibm,plb3";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> + clock-frequency = <0>; /* Filled in by zImage */
> +
> + SDRAM0: memory-controller {
> + compatible = "ibm,sdram-405ep";
> + dcr-reg = <0x010 0x002>;
> + };
> +
> + MAL: mcmal {
> + compatible = "ibm,mcmal-405ep", "ibm,mcmal";
> + dcr-reg = <0x180 0x062>;
> + num-tx-chans = <4>;
> + num-rx-chans = <2>;
> + interrupt-parent = <&UIC0>;
> + interrupts = <
> + 0xb 0x4 /* TXEOB */
> + 0xc 0x4 /* RXEOB */
> + 0xa 0x4 /* SERR */
> + 0xd 0x4 /* TXDE */
> + 0xe 0x4 /* RXDE */>;
> + };
> +
> + POB0: opb {
> + compatible = "ibm,opb-405ep", "ibm,opb";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0xef600000 0xef600000 0x00a00000>;
> + dcr-reg = <0x0a0 0x005>;
> + clock-frequency = <0>; /* Filled in by zImage */
> +
> + /* Hotfoot has UART0/UART1 swapped */
> +
> + UART0: serial@ef600400 {
> + device_type = "serial";
> + compatible = "ns16550";
> + reg = <0xef600400 0x00000008>;
> + virtual-reg = <0xef600400>;
> + clock-frequency = <0>; /* Filled in by zImage */
> + current-speed = <0x9600>;
> + interrupt-parent = <&UIC0>;
> + interrupts = <0x1 0x4>;
> + };
> +
> + UART1: serial@ef600300 {
> + device_type = "serial";
> + compatible = "ns16550";
> + reg = <0xef600300 0x00000008>;
> + virtual-reg = <0xef600300>;
> + clock-frequency = <0>; /* Filled in by zImage */
> + current-speed = <0x9600>;
> + interrupt-parent = <&UIC0>;
> + interrupts = <0x0 0x4>;
> + };
> +
> +
> + IIC: i2c@ef600500 {
> + compatible = "ibm,iic-405ep", "ibm,iic";
> + reg = <0xef600500 0x00000011>;
> + interrupt-parent = <&UIC0>;
> + interrupts = <0x2 0x4>;
> +
> + rtc@68 {
> + /* Actually a DS1339 */
> + compatible = "dallas,ds1307";
> + reg = <0x68>;
> + };
> +
> + temp@4a {
> + /* Not present on all boards */
> + compatible = "national,lm75";
> + reg = <0x4a>;
> + };
> + };
> +
> + GPIO: gpio@ef600700 {
> + #gpio-cells = <2>;
> + compatible = "ibm,ppc4xx-gpio";
> + reg = <0xef600700 0x00000020>;
> + gpio-controller;
> + };
> +
> + gpio-leds {
> + compatible = "gpio-leds";
> + status {
> + label = "Status";
> + gpios = <&GPIO 1 0>;
> + /* linux,default=trigger = ".."; */
> + };
> + radiorx {
> + label = "Rx";
> + gpios = <&GPIO 0xe 0>;
> + /* linux,default=trigger = ".."; */
> + };
> + };
> +
> +
> + EMAC0: ethernet@ef600800 {
> + linux,network-index = <0x0>;
> + device_type = "network";
> + compatible = "ibm,emac-405ep", "ibm,emac";
> + interrupt-parent = <&UIC0>;
> + interrupts = <
> + 0xf 0x4 /* Ethernet */
> + 0x9 0x4 /* Ethernet Wake Up */>;
> + local-mac-address = [000000000000]; /* Filled in by zImage */
> + reg = <0xef600800 0x00000070>;
> + mal-device = <&MAL>;
> + mal-tx-channel = <0>;
> + mal-rx-channel = <0>;
> + cell-index = <0>;
> + max-frame-size = <0x5dc>;
> + rx-fifo-size = <0x1000>;
> + tx-fifo-size = <0x800>;
> + phy-mode = "mii";
> + phy-map = <0x00000000>;
> + };
> +
> + EMAC1: ethernet@ef600900 {
> + linux,network-index = <0x1>;
> + device_type = "network";
> + compatible = "ibm,emac-405ep", "ibm,emac";
> + interrupt-parent = <&UIC0>;
> + interrupts = <
> + 0x11 0x4 /* Ethernet */
> + 0x9 0x4 /* Ethernet Wake Up */>;
> + local-mac-address = [000000000000]; /* Filled in by zImage */
> + reg = <0xef600900 0x00000070>;
> + mal-device = <&MAL>;
> + mal-tx-channel = <2>;
> + mal-rx-channel = <1>;
> + cell-index = <1>;
> + max-frame-size = <0x5dc>;
> + rx-fifo-size = <0x1000>;
> + tx-fifo-size = <0x800>;
> + mdio-device = <&EMAC0>;
> + phy-mode = "mii";
> + phy-map = <0x0000001>;
> + };
> + };
> +
> + EBC0: ebc {
> + compatible = "ibm,ebc-405ep", "ibm,ebc";
> + dcr-reg = <0x012 0x002>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> +
> + /* The ranges property is supplied by the bootwrapper
> + * and is based on the firmware's configuration of the
> + * EBC bridge
> + */
> + clock-frequency = <0>; /* Filled in by zImage */
> +
> + nor_flash@0 {
> + compatible = "cfi-flash";
> + bank-width = <2>;
> + reg = <0x0 0xff800000 0x00800000>;
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + /* This mapping is for the 8M flash
> + 4M flash has all ofssets -= 4M,
> + and FeatFS partition is not present */
> +
> + partition@0 {
> + label = "Bootloader";
> + reg = <0x7c0000 0x40000>;
> + /* read-only; */
> + };
> + partition@1 {
> + label = "Env_and_Config_Primary";
> + reg = <0x400000 0x10000>;
> + };
> + partition@2 {
> + label = "Kernel";
> + reg = <0x420000 0x100000>;
> + };
> + partition@3 {
> + label = "Filesystem";
> + reg = <0x520000 0x2a0000>;
> + };
> + partition@4 {
> + label = "Env_and_Config_Secondary";
> + reg = <0x410000 0x10000>;
> + };
> + partition@5 {
> + label = "FeatFS";
> + reg = <0x000000 0x400000>;
> + };
> + partition@6 {
> + label = "Bootloader_Env";
> + reg = <0x7d0000 0x10000>;
> + };
> + };
> + };
> +
> + PCI0: pci@ec000000 {
> + device_type = "pci";
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + #address-cells = <3>;
> + compatible = "ibm,plb405ep-pci", "ibm,plb-pci";
> + primary;
> + reg = <0xeec00000 0x00000008 /* Config space access */
> + 0xeed80000 0x00000004 /* IACK */
> + 0xeed80000 0x00000004 /* Special cycle */
> + 0xef480000 0x00000040>; /* Internal registers */
> +
> + /* Outbound ranges, one memory and one IO,
> + * later cannot be changed. Chip supports a second
> + * IO range but we don't use it for now
> + */
> + ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
> + 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
> +
> + /* Inbound 2GB range starting at 0 */
> + dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
> +
> + interrupt-parent = <&UIC0>;
> + interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
> + interrupt-map = <
> + /* IDSEL 3 -- slot1 (optional) 27/29 A/B IRQ2/4 */
> + 0x1800 0x0 0x0 0x1 &UIC0 0x1b 0x8
> + 0x1800 0x0 0x0 0x2 &UIC0 0x1d 0x8
> +
> + /* IDSEL 4 -- slot0, 26/28 A/B IRQ1/3 */
> + 0x2000 0x0 0x0 0x1 &UIC0 0x1a 0x8
> + 0x2000 0x0 0x0 0x2 &UIC0 0x1c 0x8
> + >;
> + };
> + };
> +
> + chosen {
> + linux,stdout-path = &UART0;
> + };
> +};
> diff -Naur linux-2.6.30/arch/powerpc/boot/ppcboot.h linux-2.6.30.hotfoot/arch/powerpc/boot/ppcboot.h
> --- linux-2.6.30/arch/powerpc/boot/ppcboot.h 2009-06-09 23:05:27.000000000 -0400
> +++ linux-2.6.30.hotfoot/arch/powerpc/boot/ppcboot.h 2009-07-07 12:55:18.000000000 -0400
> @@ -52,6 +52,11 @@
> unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
> unsigned long bi_ip_addr; /* IP Address */
> unsigned char bi_enetaddr[6]; /* Ethernet address */
> +#if defined(TARGET_HOTFOOT)
> + /* second onboard ethernet port */
> + unsigned char bi_enet1addr[6];
> +#define HAVE_ENET1ADDR
> +#endif /* TARGET_HOOTFOOT */
> unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
> unsigned long bi_intfreq; /* Internal Freq, in MHz */
> unsigned long bi_busfreq; /* Bus Freq, in MHz */
> @@ -74,6 +79,9 @@
> unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
> unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
> #endif
> +#if defined(TARGET_HOTFOOT)
> + unsigned int bi_pllouta_freq; /* PLL OUTA speed, in Hz */
> +#endif
> #if defined(TARGET_HYMOD)
> hymod_conf_t bi_hymod_conf; /* hymod configuration information */
> #endif
> @@ -94,6 +102,10 @@
> unsigned char bi_enet3addr[6];
> #define HAVE_ENET3ADDR
> #endif
> +#if defined(TARGET_HOTFOOT)
> + int bi_phynum[2]; /* Determines phy mapping */
> + int bi_phymode[2]; /* Determines phy mode */
> +#endif
> #if defined(TARGET_4xx)
> unsigned int bi_opbfreq; /* OB clock in Hz */
> int bi_iic_fast[2]; /* Use fast i2c mode */
> diff -Naur linux-2.6.30/arch/powerpc/platforms/40x/Kconfig linux-2.6.30.hotfoot/arch/powerpc/platforms/40x/Kconfig
> --- linux-2.6.30/arch/powerpc/platforms/40x/Kconfig 2009-06-09 23:05:27.000000000 -0400
> +++ linux-2.6.30.hotfoot/arch/powerpc/platforms/40x/Kconfig 2009-07-07 12:55:18.000000000 -0400
> @@ -40,6 +40,16 @@
> help
> This option enables support for the Nestal Maschinen HCU4 board.
>
> +config HOTFOOT
> + bool "Hotfoot"
> + depends on 40x
> + default n
> + select 405EP
> + select PPC40x_SIMPLE
> + select PCI
> + help
> + This option enables support for the ESTEEM 195E Hotfoot board.
> +
> config KILAUEA
> bool "Kilauea"
> depends on 40x
> diff -Naur linux-2.6.30/arch/powerpc/platforms/40x/ppc40x_simple.c linux-2.6.30.hotfoot/arch/powerpc/platforms/40x/ppc40x_simple.c
> --- linux-2.6.30/arch/powerpc/platforms/40x/ppc40x_simple.c 2009-06-09 23:05:27.000000000 -0400
> +++ linux-2.6.30.hotfoot/arch/powerpc/platforms/40x/ppc40x_simple.c 2009-07-07 12:55:18.000000000 -0400
> @@ -51,7 +51,8 @@
> * board.c file for it rather than adding it to this list.
> */
> static char *board[] __initdata = {
> - "amcc,acadia"
> + "amcc,acadia",
> + "est,hotfoot"
> };
>
> static int __init ppc40x_probe(void)
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Question about head_fsl_booke.S
From: wilbur.chan @ 2009-07-26 15:34 UTC (permalink / raw)
To: linuxppc-dev; +Cc: chelly wilbur
e500 , in head_fsl_booke.S
We know,the first two steps are:
1) invalidate all entries except the entry we are in
2) setup a temp mapping and jump to it respectively:
tlbwe
bl 1f
1: mflr r9
rlwimi r7,r9,0,20,31
addi r7, r7,24
mtspr SPRN_SRR0,r7
mtspr SPRN_SRR1,r6
rfi
/* jump to 0-4k .
question1: Why not this 'rfi' did not caused jumping into
4k-8k , or 10k-14k , etc ? */
li r6,0
question2: We know that, it is not allowed the two entrys having the
same EPN value,so, when setting up a temp entry which ranged from
0-4k, is it possible that , this
range(0-4k) may conflit with the entry we are executed in now?
Thx in advance.
regards,
^ permalink raw reply
* Re: [PATCH] Support for PCI Express reset type in EEH
From: Linas Vepstas @ 2009-07-25 0:30 UTC (permalink / raw)
To: Richard Lary; +Cc: linuxppc-dev, mmlnx, Paul Mackerras, linux-pci
In-Reply-To: <OF71B46F7B.49A6C08D-ON882575FD.00768DAA-882575FD.0076AF2C@us.ibm.com>
2009/7/24 Richard Lary <rlary@us.ibm.com>:
> Linas Vepstas <linasvepstas@gmail.com> wrote on 07/23/2009 07:44:33 AM:
>
>> 2009/7/15 Mike Mason <mmlnx@us.ibm.com>:
>> > By default, EEH does what's known as a "hot reset" during error recove=
ry
>> > of
>> > a PCI Express device. =C2=A0We've found a case where the device needs =
a
>> > "fundamental reset" to recover properly. =C2=A0The current PCI error r=
ecovery
>> > and
>> > EEH frameworks do not support this distinction.
>> >
>> > The attached patch (courtesy of Richard Lary) adds a bit field to
>> > pci_dev
>> > that indicates whether the device requires a fundamental reset during
>> > error
>> > recovery. =C2=A0This bit can be checked by EEH to determine which rese=
t type
>> > is
>> > required.
>> >
>> > This patch supersedes the previously submitted patch that implemented =
a
>> > reset type callback.
>> >
>> > Please review and let me know of any concerns.
>>
>> I like this patch a *lot* better .. it is vastly simpler, more direct.
>>
>>
>> > diff -uNrp a/include/linux/pci.h b/include/linux/pci.h
>> > --- a/include/linux/pci.h =C2=A0 =C2=A0 =C2=A0 2009-07-13 14:25:37.000=
000000 -0700
>> > +++ b/include/linux/pci.h =C2=A0 =C2=A0 =C2=A0 2009-07-15 10:25:37.000=
000000 -0700
>> > @@ -273,6 +273,7 @@ struct pci_dev {
>> > =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned int =C2=A0 =C2=A0ari_enabled:1; =
=C2=A0/* ARI forwarding */
>> > =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned int =C2=A0 =C2=A0is_managed:1;
>> > =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned int =C2=A0 =C2=A0is_pcie:1;
>> > + =C2=A0 =C2=A0 =C2=A0 unsigned int =C2=A0 =C2=A0fndmntl_rst_rqd:1; /*=
Dev requires fundamental
>> > reset
>> > */
>> > =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned int =C2=A0 =C2=A0state_saved:1;
>> > =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned int =C2=A0 =C2=A0is_physfn:1;
>> > =C2=A0 =C2=A0 =C2=A0 =C2=A0unsigned int =C2=A0 =C2=A0is_virtfn:1;
>>
>> As Ben points out, the name is awkward. =C2=A0How about needs_freset ?
>
> I am OK with name change.
>
>
>> Since this affects the entire pci subsystem, it should be documented
>> properly. =C2=A0The "pci error recovery" subsystem was designed to be
>> usable in other architectures, and so the error recovery docs should
>> take at least a paragraph to describe what this flag means, and when
>> its supposed to be used.
>
> I will update the documentation, are you referring to
> Documentation/powerpc/eeh-pci-error-recovery.txt
> or some other documentation?
No, I'm thinking
Documentation/PCI/pci-error-recovery.txt
because the flag is not powerpc-specific.
--linas
>
>> Providing the docs patch together with the pci.h patch *only* would
>> probably simplify acceptance by the PCI community.
>>
>> --linas
>
^ permalink raw reply
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