* Re: [RFC PATCH 00/12] Merge common OpenFirmware device tree code
From: Sam Creasey @ 2009-10-07 13:52 UTC (permalink / raw)
To: Julian Calaby
Cc: Sam Creasey, Stephen Rothwell, monstr, devicetree-discuss,
microblaze-uclinux, sparclinux, linuxppc-dev, davem
In-Reply-To: <646765f40910062218s19d540f9q14c9086bedd1d9da@mail.gmail.com>
On Wed, Oct 07, 2009 at 03:18:04PM +1000, Julian Calaby wrote:
> On Wed, Oct 7, 2009 at 14:49, Grant Likely <grant.likely@secretlab.ca> wrote:
> > On Tue, Oct 6, 2009 at 10:29 PM, Grant Likely <grant.likely@secretlab.ca> wrote:
> >>
> >> So here goes. I've begun the work to merge and clean up the OF device
> >> tree handling code and this is my first set of patches. Not fully
> >> tested yet, but I'm getting them out to the lists so that I can start
> >> responding to comments and collecting acks. This first batch isn't
> >> anything exciting, just a merge of common code
>
> Good work, for what it's worth, this all looks good to me.
>
> > However, I've completely devoted to this work for at least the next
> > two months, so there are plenty more patches to follow. Once I've
> > got all the common code merged between Microblaze, PowerPC and Sparc
> > I'll be fix the endian problems and making it easily usable by other
> > architectures like ARM and MIPS. Lots of work to be done.
>
> On the subject of merging code, I know that the SUN3 code in m68k uses
> a similar prom interface to the sparc32 code. (and I've also
> considered unifying that and ... well ... see above) Does anyone know
> if it has an OpenFirmware interface for it's devices? Is OF on SUN3
> even remotely useful? Does Linux on SUN3 even work with modern
> kernels?
Sun3 doesn't have OF, though I've got some dormant patches to add an
OF emulation layer to make it easier to reuse Sparc drivers on
Sun3... Never finished enough to submit, so it probably shouldn't
affect anything you're doing here.
As for recent kernels, I think 2.6.19 was the last sun3 I distributed
patches for, so modern might be pushing it...
-- Sam
^ permalink raw reply
* Re: [v7 PATCH 7/7]: pSeries: implement pSeries processor idle module.
From: Arun R Bharadwaj @ 2009-10-07 13:50 UTC (permalink / raw)
To: Peter Zijlstra, Joel Schopp, Benjamin Herrenschmidt,
Paul Mackerras, Ingo Molnar, Vaidyanathan Srinivasan,
Dipankar Sarma, Balbir Singh, Gautham R Shenoy,
Venkatesh Pallipadi, Arun Bharadwaj
Cc: linux-arch, linuxppc-dev, linux-kernel
In-Reply-To: <20091006153522.GC7358@linux.vnet.ibm.com>
* Arun R Bharadwaj <arun@linux.vnet.ibm.com> [2009-10-06 21:05:22]:
> * Arun R Bharadwaj <arun@linux.vnet.ibm.com> [2009-10-06 20:54:21]:
Please consider this updated PATCH 7/7 instead of the earlier one.
The earlier one had a late_initcall(pseries_processor_idle_init),
which caused a panic when cpuidle_enable_device() was called from
cpuidle_switch_governor(). This is because registration of cpuidle
devices was happening at a later stage. So change this to a
device_initcall() to get rid of the panic.
---
This patch creates arch/powerpc/platforms/pseries/processor_idle.c,
which implements the cpuidle infrastructure for pseries.
It implements a pseries_cpuidle_loop() which would be the main idle loop
called from cpu_idle(). It makes decision of entering either
dedicated_snooze_loop or dedicated_cede_loop for dedicated lpar and
shared_cede_loop for shared lpar processor based on the
decision taken by the cpuidle governor.
Signed-off-by: Arun R Bharadwaj <arun@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/system.h | 1
arch/powerpc/kernel/sysfs.c | 2
arch/powerpc/platforms/pseries/Makefile | 1
arch/powerpc/platforms/pseries/processor_idle.c | 208 ++++++++++++++++++++++++
arch/powerpc/platforms/pseries/pseries.h | 8
5 files changed, 220 insertions(+)
Index: linux.trees.git/arch/powerpc/platforms/pseries/Makefile
===================================================================
--- linux.trees.git.orig/arch/powerpc/platforms/pseries/Makefile
+++ linux.trees.git/arch/powerpc/platforms/pseries/Makefile
@@ -26,3 +26,4 @@ obj-$(CONFIG_HCALL_STATS) += hvCall_inst
obj-$(CONFIG_PHYP_DUMP) += phyp_dump.o
obj-$(CONFIG_CMM) += cmm.o
obj-$(CONFIG_DTL) += dtl.o
+obj-$(CONFIG_PSERIES_PROCESSOR_IDLE) += processor_idle.o
Index: linux.trees.git/arch/powerpc/platforms/pseries/pseries.h
===================================================================
--- linux.trees.git.orig/arch/powerpc/platforms/pseries/pseries.h
+++ linux.trees.git/arch/powerpc/platforms/pseries/pseries.h
@@ -10,6 +10,8 @@
#ifndef _PSERIES_PSERIES_H
#define _PSERIES_PSERIES_H
+#include <linux/cpuidle.h>
+
extern void __init fw_feature_init(const char *hypertas, unsigned long len);
struct pt_regs;
@@ -40,4 +42,10 @@ extern unsigned long rtas_poweron_auto;
extern void find_udbg_vterm(void);
+DECLARE_PER_CPU(unsigned long, smt_snooze_delay);
+
+#ifdef CONFIG_PSERIES_PROCESSOR_IDLE
+extern struct cpuidle_driver pseries_idle_driver;
+#endif
+
#endif /* _PSERIES_PSERIES_H */
Index: linux.trees.git/arch/powerpc/platforms/pseries/processor_idle.c
===================================================================
--- /dev/null
+++ linux.trees.git/arch/powerpc/platforms/pseries/processor_idle.c
@@ -0,0 +1,208 @@
+/*
+ * processor_idle - idle state cpuidle driver.
+ * Adapted from drivers/acpi/processor_idle.c
+ *
+ * Arun R Bharadwaj <arun@linux.vnet.ibm.com>
+ *
+ * Copyright (C) 2009 IBM Corporation.
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ *
+ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+ */
+
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/moduleparam.h>
+#include <linux/cpuidle.h>
+
+#include <asm/paca.h>
+#include <asm/reg.h>
+#include <asm/system.h>
+#include <asm/machdep.h>
+#include <asm/firmware.h>
+
+#include "plpar_wrappers.h"
+#include "pseries.h"
+
+MODULE_AUTHOR("Arun R Bharadwaj");
+MODULE_DESCRIPTION("pSeries Idle State Driver");
+MODULE_LICENSE("GPL");
+
+struct cpuidle_driver pseries_idle_driver = {
+ .name = "pseries_idle",
+ .owner = THIS_MODULE,
+};
+
+DEFINE_PER_CPU(struct cpuidle_device, pseries_dev);
+
+#define IDLE_STATE_COUNT 2
+
+/* pSeries Idle state Flags */
+#define PSERIES_DEDICATED_SNOOZE (0x01)
+#define PSERIES_DEDICATED_CEDE (0x02)
+#define PSERIES_SHARED_CEDE (0x03)
+
+static int pseries_idle_init(struct cpuidle_device *dev)
+{
+ return cpuidle_register_device(dev);
+}
+
+static void shared_cede_loop(void)
+{
+ get_lppaca()->idle = 1;
+ cede_processor();
+ get_lppaca()->idle = 0;
+}
+
+static void dedicated_snooze_loop(void)
+{
+ local_irq_enable();
+ set_thread_flag(TIF_POLLING_NRFLAG);
+ while (!need_resched()) {
+ ppc64_runlatch_off();
+ HMT_low();
+ HMT_very_low();
+ }
+ HMT_medium();
+ clear_thread_flag(TIF_POLLING_NRFLAG);
+ smp_mb();
+ local_irq_disable();
+}
+
+static void dedicated_cede_loop(void)
+{
+ ppc64_runlatch_off();
+ HMT_medium();
+ cede_processor();
+}
+
+static int pseries_cpuidle_loop(struct cpuidle_device *dev,
+ struct cpuidle_state *st)
+{
+ ktime_t t1, t2;
+ s64 diff;
+ int ret;
+ unsigned long in_purr, out_purr;
+
+ get_lppaca()->idle = 1;
+ get_lppaca()->donate_dedicated_cpu = 1;
+ in_purr = mfspr(SPRN_PURR);
+
+ t1 = ktime_get();
+
+ if (st->flags & PSERIES_SHARED_CEDE)
+ shared_cede_loop();
+ else if (st->flags & PSERIES_DEDICATED_SNOOZE)
+ dedicated_snooze_loop();
+ else
+ dedicated_cede_loop();
+
+ t2 = ktime_get();
+ diff = ktime_to_us(ktime_sub(t2, t1));
+ if (diff > INT_MAX)
+ diff = INT_MAX;
+
+ ret = (int) diff;
+
+ out_purr = mfspr(SPRN_PURR);
+ get_lppaca()->wait_state_cycles += out_purr - in_purr;
+ get_lppaca()->donate_dedicated_cpu = 0;
+ get_lppaca()->idle = 0;
+
+ return ret;
+}
+
+static int pseries_setup_cpuidle(struct cpuidle_device *dev, int cpu)
+{
+ int i;
+ struct cpuidle_state *state;
+
+ dev->cpu = cpu;
+
+ if (get_lppaca()->shared_proc) {
+ state = &dev->states[0];
+ snprintf(state->name, CPUIDLE_NAME_LEN, "IDLE");
+ state->enter = pseries_cpuidle_loop;
+ strncpy(state->desc, "shared_cede", CPUIDLE_DESC_LEN);
+ state->flags = PSERIES_SHARED_CEDE;
+ state->exit_latency = 0;
+ state->target_residency = 0;
+ return 0;
+ }
+
+ for (i = 0; i < IDLE_STATE_COUNT; i++) {
+ state = &dev->states[i];
+
+ snprintf(state->name, CPUIDLE_NAME_LEN, "CEDE%d", i);
+ state->enter = pseries_cpuidle_loop;
+
+ switch (i) {
+ case 0:
+ strncpy(state->desc, "snooze", CPUIDLE_DESC_LEN);
+ state->flags = PSERIES_DEDICATED_SNOOZE;
+ state->exit_latency = 0;
+ state->target_residency = 0;
+ break;
+
+ case 1:
+ strncpy(state->desc, "cede", CPUIDLE_DESC_LEN);
+ state->flags = PSERIES_DEDICATED_CEDE;
+ state->exit_latency = 1;
+ state->target_residency =
+ __get_cpu_var(smt_snooze_delay);
+ break;
+ }
+ }
+ dev->state_count = IDLE_STATE_COUNT;
+
+ return 0;
+}
+
+void update_smt_snooze_delay(int snooze)
+{
+ int cpu;
+ for_each_online_cpu(cpu)
+ per_cpu(pseries_dev, cpu).states[0].target_residency = snooze;
+}
+
+static int __init pseries_processor_idle_init(void)
+{
+ int cpu;
+ int result = cpuidle_register_driver(&pseries_idle_driver);
+
+ if (result < 0)
+ return result;
+
+ printk(KERN_DEBUG "pSeries idle driver registered\n");
+
+ if (!firmware_has_feature(FW_FEATURE_SPLPAR)) {
+ printk(KERN_DEBUG "Using default idle\n");
+ return 0;
+ }
+
+ for_each_online_cpu(cpu) {
+ pseries_setup_cpuidle(&per_cpu(pseries_dev, cpu), cpu);
+ pseries_idle_init(&per_cpu(pseries_dev, cpu));
+ }
+
+ printk(KERN_DEBUG "Using cpuidle idle loop\n");
+
+ return 0;
+}
+
+device_initcall(pseries_processor_idle_init);
Index: linux.trees.git/arch/powerpc/include/asm/system.h
===================================================================
--- linux.trees.git.orig/arch/powerpc/include/asm/system.h
+++ linux.trees.git/arch/powerpc/include/asm/system.h
@@ -548,6 +548,7 @@ extern void account_system_vtime(struct
extern struct dentry *powerpc_debugfs_root;
void cpu_idle_wait(void);
+extern void update_smt_snooze_delay(int snooze);
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_SYSTEM_H */
Index: linux.trees.git/arch/powerpc/kernel/sysfs.c
===================================================================
--- linux.trees.git.orig/arch/powerpc/kernel/sysfs.c
+++ linux.trees.git/arch/powerpc/kernel/sysfs.c
@@ -18,6 +18,7 @@
#include <asm/machdep.h>
#include <asm/smp.h>
#include <asm/pmc.h>
+#include <asm/system.h>
#include "cacheinfo.h"
@@ -51,6 +52,7 @@ static ssize_t store_smt_snooze_delay(st
return -EINVAL;
per_cpu(smt_snooze_delay, cpu->sysdev.id) = snooze;
+ update_smt_snooze_delay(snooze);
return count;
}
^ permalink raw reply
* Re: [PATCH] powerpc/boot/dts: drop obsolete 'fsl5200-clocking'
From: Grant Likely @ 2009-10-07 13:50 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linuxppc-dev
In-Reply-To: <20091007091140.GC3177@pengutronix.de>
On Wed, Oct 7, 2009 at 3:11 AM, Wolfram Sang <w.sang@pengutronix.de> wrote:
> On Thu, Sep 10, 2009 at 09:05:46AM -0600, Grant Likely wrote:
>> On Thu, Sep 10, 2009 at 8:55 AM, Wolfram Sang <w.sang@pengutronix.de> wr=
ote:
>> > The 'fsl5200-clocking'-property was dropped since
>> > 0d1cde235874b00905bce23f659690d060ebf475. Remove all occurences in dts=
-files.
>> >
>> > Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
>> > Cc: Grant Likely <grant.likely@secretlab.ca>
>>
>> Looks good to me. =A0I'll pick it up.
>
> Ping? :)
Haven't forgotten about it, but got nailed by start of school year and
conferences. Its just a .dts change, so I have no problem merging
even though the merge window is closed. It will be in 2.6.32.
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [RFC PATCH 05/12] of: add common header for flattened device tree representation
From: Grant Likely @ 2009-10-07 13:41 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Stephen Rothwell, monstr, microblaze-uclinux, devicetree-discuss,
sparclinux, linuxppc-dev, davem
In-Reply-To: <1254892467.6035.273.camel@pasglop>
On Tue, Oct 6, 2009 at 11:14 PM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> On Tue, 2009-10-06 at 22:30 -0600, Grant Likely wrote:
>
>> --- /dev/null
>> +++ b/include/linux/of_fdt.h
>> @@ -0,0 +1,30 @@
>> +/*
>> + * Definitions for working with the Flattened Device Tree data format
>> + *
>> + * Copyright (C) 1996-2005 Paul Mackerras.
>> + *
>> + * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
>> + * Updates for SPARC by David S. Miller
>> + * Merged to common code by Grant Likely
>
> I think you should prune the above. Make it (c) myself since I wrote the
> FDT code initially. You can add back (c) of other people as you add more
> stuff here I suppose.
>
> No big deal tho.
No problem. What is the exact copyright text that you'd like to see
here? I'm not going to guess on other people's copyright notice. :-)
g.
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [microblaze-uclinux] Re: [RFC PATCH 05/12] of: add common header for flattened device tree representation
From: Grant Likely @ 2009-10-07 13:38 UTC (permalink / raw)
To: monstr
Cc: microblaze-uclinux, devicetree-discuss, sparclinux, linuxppc-dev,
davem
In-Reply-To: <4ACC861A.7020506@monstr.eu>
On Wed, Oct 7, 2009 at 6:14 AM, Michal Simek <monstr@monstr.eu> wrote:
>
>
> Stephen Rothwell wrote:
>> Hi Grant,
>>
>> Just first obvious thing:
>>
>> On Tue, 06 Oct 2009 22:30:59 -0600 Grant Likely <grant.likely@secretlab.=
ca> wrote:
>>> diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/inclu=
de/asm/prom.h
>>> index 64e8b3a..5f461f0 100644
>>> --- a/arch/microblaze/include/asm/prom.h
>>> +++ b/arch/microblaze/include/asm/prom.h
>>> @@ -17,20 +17,10 @@
>>> =A0#ifndef _ASM_MICROBLAZE_PROM_H
>>> =A0#define _ASM_MICROBLAZE_PROM_H
>>> =A0#ifdef __KERNEL__
>>> -
>>> -/* Definitions used by the flattened device tree */
>>> -#define OF_DT_HEADER =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A00xd00dfeed /* mark=
er */
>>
>> This is used in arch/microblaze/kernel/head.S, but you move its
>> definition inside "#ifndef __ASSEMBLY__" below. =A0You should probably
>> replace the include of asm/prom.h in arch/microblaze/kernel/head.S with
>> linux/of_fdt.h (assuming that the comment in there is correct).
>
> yes, Stephen is right here. I created one patch (in attachment) which fix=
ed it. I tested your
> patches on Microblaze (noMMU and MMU) and I have no problem with compilat=
ion and simple boot-up
> works for both versions too.
>
> With that my patch: Acked-by: Michal Simek <monstr@monstr.eu>
Thanks. I'll merge your change with my patch so that bisect isn't broken.
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [v7 PATCH 0/7]: cpuidle/x86/POWER: Cleanup idle power management code in x86, cleanup drivers/cpuidle/cpuidle.c and introduce cpuidle to POWER.
From: Peter Zijlstra @ 2009-10-07 13:24 UTC (permalink / raw)
To: balbir
Cc: linux-arch, Gautham R Shenoy, Venkatesh Pallipadi, linux-kernel,
Paul Mackerras, arun, Ingo Molnar, linuxppc-dev, Arjan van de Ven
In-Reply-To: <20091007114719.GH6818@balbir.in.ibm.com>
On Wed, 2009-10-07 at 17:17 +0530, Balbir Singh wrote:
> > The objective of the refactoring is to have a single common idle
> > routine management framework (remove pm_idle) and we have it done
> > through cpuidle registration framework. We can incrementally remove
> > the per-cpu registration later easily by splitting the cpuidle_driver
> > structure.
> >
>
> Yes, incremental refactoring makes the most sense from the do not
> break as you refactor point of view.
Sure,.. but I would have though getting rid of the per-cpu-ish-ness
would have made the latter patches in this series easier. But maybe I'm
lazy ;-)
Let me go over the patches one more time, but they do look ok.
^ permalink raw reply
* Re: [v7 PATCH 0/7]: cpuidle/x86/POWER: Cleanup idle power management code in x86, cleanup drivers/cpuidle/cpuidle.c and introduce cpuidle to POWER.
From: Peter Zijlstra @ 2009-10-07 13:05 UTC (permalink / raw)
To: svaidy
Cc: linux-arch, Gautham R Shenoy, Venkatesh Pallipadi, linux-kernel,
Paul Mackerras, arun, Ingo Molnar, linuxppc-dev, Arjan van de Ven
In-Reply-To: <20091007112648.GC7646@dirshya.in.ibm.com>
On Wed, 2009-10-07 at 16:56 +0530, Vaidyanathan Srinivasan wrote:
> * Peter Zijlstra <a.p.zijlstra@chello.nl> [2009-10-06 20:04:39]:
>
> > On Tue, 2009-10-06 at 22:05 +0530, Arun R Bharadwaj wrote:
> >
> > > Also, the per-cpu nature of registration/unregistration of cpuidle
> > > has been maintained as ACPI needs this.
> >
> > Right, so can't we ditch that and have acpi default to the lowest
> common
> > C-state and warn when various cpus report different C-states?
>
> Hi Peter,
>
> As Arjan mentioned previously, the per-cpu registration has to stay
> for x86 for now due to legacy ACPI compatibility. Breaking that may
> break lot of existing users and we do not have a clean fallback
> method.
>From what I understood some broken ass bioses report different C state
availability on different CPUs in the same SMP system.
I'm suggesting to work around that by limiting all CPUs to the subset of
C states reported on all CPUs, instead of the current mess.
I haven't heard anybody tell me why that wouldn't be possible on x86
^ permalink raw reply
* Re: [microblaze-uclinux] Re: [RFC PATCH 05/12] of: add common header for flattened device tree representation
From: Michal Simek @ 2009-10-07 12:14 UTC (permalink / raw)
To: microblaze-uclinux
Cc: monstr, devicetree-discuss, sparclinux, linuxppc-dev, davem
In-Reply-To: <20091007155717.8df62c4d.sfr@canb.auug.org.au>
[-- Attachment #1: Type: text/plain, Size: 1908 bytes --]
Stephen Rothwell wrote:
> Hi Grant,
>
> Just first obvious thing:
>
> On Tue, 06 Oct 2009 22:30:59 -0600 Grant Likely <grant.likely@secretlab.ca> wrote:
>> diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
>> index 64e8b3a..5f461f0 100644
>> --- a/arch/microblaze/include/asm/prom.h
>> +++ b/arch/microblaze/include/asm/prom.h
>> @@ -17,20 +17,10 @@
>> #ifndef _ASM_MICROBLAZE_PROM_H
>> #define _ASM_MICROBLAZE_PROM_H
>> #ifdef __KERNEL__
>> -
>> -/* Definitions used by the flattened device tree */
>> -#define OF_DT_HEADER 0xd00dfeed /* marker */
>
> This is used in arch/microblaze/kernel/head.S, but you move its
> definition inside "#ifndef __ASSEMBLY__" below. You should probably
> replace the include of asm/prom.h in arch/microblaze/kernel/head.S with
> linux/of_fdt.h (assuming that the comment in there is correct).
yes, Stephen is right here. I created one patch (in attachment) which fixed it. I tested your
patches on Microblaze (noMMU and MMU) and I have no problem with compilation and simple boot-up
works for both versions too.
With that my patch: Acked-by: Michal Simek <monstr@monstr.eu>
Thanks,
Michal
P.S.: I have my provider - it block my emails - that's why the patch is in attachment.
>
>> -#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
>> -#define OF_DT_END_NODE 0x2 /* End node */
>> -#define OF_DT_PROP 0x3 /* Property: name off, size, content */
>> -#define OF_DT_NOP 0x4 /* nop */
>> -#define OF_DT_END 0x9
>> -
>> -#define OF_DT_VERSION 0x10
>> -
>> #ifndef __ASSEMBLY__
>>
>> #include <linux/types.h>
>> +#include <linux/of_fdt.h>
>> #include <linux/proc_fs.h>
>> #include <linux/platform_device.h>
>> #include <asm/irq.h>
>
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
[-- Attachment #2: 0001-of-microblaze-of_fdt.h-is-used-in-asm-code.patch --]
[-- Type: text/x-patch, Size: 1531 bytes --]
>From 73b16cccc544fe8410ec8e8e893aa3357093e985 Mon Sep 17 00:00:00 2001
From: Michal Simek <monstr@monstr.eu>
Date: Wed, 7 Oct 2009 14:04:01 +0200
Subject: [PATCH] of: microblaze: of_fdt.h is used in asm code.
Microblaze uses OF_DT_HEADER macro to identify DTB.
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Michal Simek <monstr@monstr.eu>
---
arch/microblaze/kernel/head.S | 2 +-
include/linux/of_fdt.h | 3 +++
2 files changed, 4 insertions(+), 1 deletions(-)
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index 697ce30..3091619 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -31,7 +31,7 @@
#include <linux/linkage.h>
#include <asm/thread_info.h>
#include <asm/page.h>
-#include <asm/prom.h> /* for OF_DT_HEADER */
+#include <linux/of_fdt.h> /* for OF_DT_HEADER */
#ifdef CONFIG_MMU
#include <asm/setup.h> /* COMMAND_LINE_SIZE */
diff --git a/include/linux/of_fdt.h b/include/linux/of_fdt.h
index b41bd18..44fecfa 100644
--- a/include/linux/of_fdt.h
+++ b/include/linux/of_fdt.h
@@ -30,6 +30,7 @@
#define OF_DT_VERSION 0x10
+#ifndef __ASSEMBLY__
/*
* This is what gets passed to the kernel by prom_init or kexec
*
@@ -84,4 +85,6 @@ extern int prom_remove_property(struct device_node *np, struct property *prop);
extern int prom_update_property(struct device_node *np,
struct property *newprop,
struct property *oldprop);
+#endif /* __ASSEMBLY__ */
+
#endif /* _LINUX_OF_FDT_H */
--
1.5.5.1
^ permalink raw reply related
* Re: [v7 PATCH 0/7]: cpuidle/x86/POWER: Cleanup idle power management code in x86, cleanup drivers/cpuidle/cpuidle.c and introduce cpuidle to POWER.
From: Balbir Singh @ 2009-10-07 11:47 UTC (permalink / raw)
To: Vaidyanathan Srinivasan
Cc: linux-arch, Peter Zijlstra, Gautham R Shenoy, Venkatesh Pallipadi,
linux-kernel, Paul Mackerras, arun, Ingo Molnar, linuxppc-dev,
Arjan van de Ven
In-Reply-To: <20091007112648.GC7646@dirshya.in.ibm.com>
* Vaidy <svaidy@linux.vnet.ibm.com> [2009-10-07 16:56:48]:
> * Peter Zijlstra <a.p.zijlstra@chello.nl> [2009-10-06 20:04:39]:
>
> > On Tue, 2009-10-06 at 22:05 +0530, Arun R Bharadwaj wrote:
> >
> > > Also, the per-cpu nature of registration/unregistration of cpuidle
> > > has been maintained as ACPI needs this.
> >
> > Right, so can't we ditch that and have acpi default to the lowest common
> > C-state and warn when various cpus report different C-states?
>
> Hi Peter,
>
> As Arjan mentioned previously, the per-cpu registration has to stay
> for x86 for now due to legacy ACPI compatibility. Breaking that may
> break lot of existing users and we do not have a clean fallback
> method.
>
> As far as powerpc is concerned, we can work with a single global
> registration. However we would like to have the same interface across
> different archs.
>
> With the new re-factoring (v7), Arun has killed most of the list
> traversal and linking between various cpu's cpuidle_driver structures.
> Now we have a per-cpu stack of registered devices and we lookup the
> structs using online cpumasks. The cpuidle_driver structure has list
> of idle routing pointers (struct cpuidle_state) and rest of it is
> statistics that needs to be maintained at a per-cpu level anyway. All
> that is duplicated here is the array of idle routines (struct
> cpuidle_state) on each cpu.
>
> The objective of the refactoring is to have a single common idle
> routine management framework (remove pm_idle) and we have it done
> through cpuidle registration framework. We can incrementally remove
> the per-cpu registration later easily by splitting the cpuidle_driver
> structure.
>
Yes, incremental refactoring makes the most sense from the do not
break as you refactor point of view.
--
Balbir
^ permalink raw reply
* Re: [v7 PATCH 0/7]: cpuidle/x86/POWER: Cleanup idle power management code in x86, cleanup drivers/cpuidle/cpuidle.c and introduce cpuidle to POWER.
From: Vaidyanathan Srinivasan @ 2009-10-07 11:26 UTC (permalink / raw)
To: Peter Zijlstra, Arjan van de Ven
Cc: linux-arch, Gautham R Shenoy, Venkatesh Pallipadi, linux-kernel,
Paul Mackerras, arun, Ingo Molnar, linuxppc-dev
In-Reply-To: <1254852279.17055.2.camel@laptop>
* Peter Zijlstra <a.p.zijlstra@chello.nl> [2009-10-06 20:04:39]:
> On Tue, 2009-10-06 at 22:05 +0530, Arun R Bharadwaj wrote:
>
> > Also, the per-cpu nature of registration/unregistration of cpuidle
> > has been maintained as ACPI needs this.
>
> Right, so can't we ditch that and have acpi default to the lowest common
> C-state and warn when various cpus report different C-states?
Hi Peter,
As Arjan mentioned previously, the per-cpu registration has to stay
for x86 for now due to legacy ACPI compatibility. Breaking that may
break lot of existing users and we do not have a clean fallback
method.
As far as powerpc is concerned, we can work with a single global
registration. However we would like to have the same interface across
different archs.
With the new re-factoring (v7), Arun has killed most of the list
traversal and linking between various cpu's cpuidle_driver structures.
Now we have a per-cpu stack of registered devices and we lookup the
structs using online cpumasks. The cpuidle_driver structure has list
of idle routing pointers (struct cpuidle_state) and rest of it is
statistics that needs to be maintained at a per-cpu level anyway. All
that is duplicated here is the array of idle routines (struct
cpuidle_state) on each cpu.
The objective of the refactoring is to have a single common idle
routine management framework (remove pm_idle) and we have it done
through cpuidle registration framework. We can incrementally remove
the per-cpu registration later easily by splitting the cpuidle_driver
structure.
--Vaidy
^ permalink raw reply
* Re: SMU-base PowerMac and server_mode
From: Romain Goyet @ 2009-10-07 11:25 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20091006160749.GA29195@lixom.net>
[-- Attachment #1: Type: text/plain, Size: 1138 bytes --]
On Tue, Oct 6, 2009 at 6:07 PM, Olof Johansson <olof@lixom.net> wrote:
> On Tue, Oct 06, 2009 at 09:11:22PM +1100, Benjamin Herrenschmidt wrote:
> > On Tue, 2009-10-06 at 11:16 +0200, Romain Goyet wrote:
> > > Hi there,
> > >
> > >
> > > I have this Quad G5 here, running GentooPPC64. Runs fine. Had a hard
> > > time getting it to boot without a screen attached, but I eventually
> > > managed to (yaboot was the culprit). However, this machine is
> > > SMU-based, and I couldn't find a way to enable the equivalent of the
> > > PMU's "server_mode" (i.e. automatically reboot after a power failure).
> > > Is there any known way to do that ?
> >
> > I'm pretty sure I reverse engineered the necessary command a while back
> > and somebody wrote a userland tool to set it, but I can't find it
> > anymore :-)
>
> Yeah, I had one but I have since lost it. I suspect it was on the
> drive of my second quad that I wiped before I sold it, thinking there
> was nothing of value on it. :(
>
>
> -Olof
>
Ha, that's too bad. Do you know if it might be online somewhere ? Maybe an
idea of the right keywords to google ?
Thanks !
- Romain
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^ permalink raw reply
* [PATCH 10/16] percpu: make percpu symbols in powerpc unique
From: Tejun Heo @ 2009-10-07 11:01 UTC (permalink / raw)
To: linux-kernel, Nick Piggin, Rusty Russell, Christoph Lameter,
Ingo Molnar, Thomas Gleixner, Andrew Morton, Steven Rostedt,
Frederic Weisbecker, Robert Richter, Jeremy Fitzhardinge,
Chris Wright, H. Peter Anvin, Avi Kivity, Marcelo Tosatti, x86,
Benjamin Herrenschmidt, Paul Mackerras, Arnd Bergmann, Tony Luck,
Fenghua Yu, Herbert Xu, Chuck Ebbert, David Howells,
Koichi Yasutake, Ananth N Mavinakayanahalli, Anil S Keshavamurthy,
David S. Miller, Masami Hiramatsu, Martin Schwidefsky,
Heiko Carstens, Al Viro
Cc: Arnd Bergmann, Rusty Russell, linuxppc-dev, Paul Mackerras,
Tejun Heo
In-Reply-To: <1254913285-6251-1-git-send-email-tj@kernel.org>
This patch updates percpu related symbols in powerpc such that percpu
symbols are unique and don't clash with local symbols. This serves
two purposes of decreasing the possibility of global percpu symbol
collision and allowing dropping per_cpu__ prefix from percpu symbols.
* arch/powerpc/kernel/perf_callchain.c: s/callchain/cpu_perf_callchain/
* arch/powerpc/kernel/setup-common.c: s/pvr/cpu_pvr/
* arch/powerpc/platforms/pseries/dtl.c: s/dtl/cpu_dtl/
* arch/powerpc/platforms/cell/interrupt.c: s/iic/cpu_iic/
Partly based on Rusty Russell's "alloc_percpu: rename percpu vars
which cause name clashes" patch.
Signed-off-by: Tejun Heo <tj@kernel.org>
Cc: Rusty Russell <rusty@rustcorp.com.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: linuxppc-dev@ozlabs.org
---
arch/powerpc/include/asm/smp.h | 2 +-
arch/powerpc/kernel/perf_callchain.c | 4 ++--
arch/powerpc/kernel/setup-common.c | 4 ++--
arch/powerpc/kernel/smp.c | 2 +-
arch/powerpc/platforms/cell/interrupt.c | 14 +++++++-------
arch/powerpc/platforms/pseries/dtl.c | 4 ++--
6 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index d9ea8d3..1d3b270 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -37,7 +37,7 @@ extern void cpu_die(void);
extern void smp_send_debugger_break(int cpu);
extern void smp_message_recv(int);
-DECLARE_PER_CPU(unsigned int, pvr);
+DECLARE_PER_CPU(unsigned int, cpu_pvr);
#ifdef CONFIG_HOTPLUG_CPU
extern void fixup_irqs(cpumask_t map);
diff --git a/arch/powerpc/kernel/perf_callchain.c b/arch/powerpc/kernel/perf_callchain.c
index 0a03cf7..fe59c44 100644
--- a/arch/powerpc/kernel/perf_callchain.c
+++ b/arch/powerpc/kernel/perf_callchain.c
@@ -497,11 +497,11 @@ static void perf_callchain_user_32(struct pt_regs *regs,
* Since we can't get PMU interrupts inside a PMU interrupt handler,
* we don't need separate irq and nmi entries here.
*/
-static DEFINE_PER_CPU(struct perf_callchain_entry, callchain);
+static DEFINE_PER_CPU(struct perf_callchain_entry, cpu_perf_callchain);
struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
{
- struct perf_callchain_entry *entry = &__get_cpu_var(callchain);
+ struct perf_callchain_entry *entry = &__get_cpu_var(cpu_perf_callchain);
entry->nr = 0;
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 4271f7a..aa5aeb9 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -157,7 +157,7 @@ extern u32 cpu_temp_both(unsigned long cpu);
#endif /* CONFIG_TAU */
#ifdef CONFIG_SMP
-DEFINE_PER_CPU(unsigned int, pvr);
+DEFINE_PER_CPU(unsigned int, cpu_pvr);
#endif
static int show_cpuinfo(struct seq_file *m, void *v)
@@ -209,7 +209,7 @@ static int show_cpuinfo(struct seq_file *m, void *v)
}
#ifdef CONFIG_SMP
- pvr = per_cpu(pvr, cpu_id);
+ pvr = per_cpu(cpu_pvr, cpu_id);
#else
pvr = mfspr(SPRN_PVR);
#endif
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 9b86a74..2ebb484 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -232,7 +232,7 @@ struct thread_info *current_set[NR_CPUS];
static void __devinit smp_store_cpu_info(int id)
{
- per_cpu(pvr, id) = mfspr(SPRN_PVR);
+ per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
}
static void __init smp_create_idle(unsigned int cpu)
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 882e470..54bad90 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -54,7 +54,7 @@ struct iic {
struct device_node *node;
};
-static DEFINE_PER_CPU(struct iic, iic);
+static DEFINE_PER_CPU(struct iic, cpu_iic);
#define IIC_NODE_COUNT 2
static struct irq_host *iic_host;
@@ -82,7 +82,7 @@ static void iic_unmask(unsigned int irq)
static void iic_eoi(unsigned int irq)
{
- struct iic *iic = &__get_cpu_var(iic);
+ struct iic *iic = &__get_cpu_var(cpu_iic);
out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]);
BUG_ON(iic->eoi_ptr < 0);
}
@@ -146,7 +146,7 @@ static unsigned int iic_get_irq(void)
struct iic *iic;
unsigned int virq;
- iic = &__get_cpu_var(iic);
+ iic = &__get_cpu_var(cpu_iic);
*(unsigned long *) &pending =
in_be64((u64 __iomem *) &iic->regs->pending_destr);
if (!(pending.flags & CBE_IIC_IRQ_VALID))
@@ -161,12 +161,12 @@ static unsigned int iic_get_irq(void)
void iic_setup_cpu(void)
{
- out_be64(&__get_cpu_var(iic).regs->prio, 0xff);
+ out_be64(&__get_cpu_var(cpu_iic).regs->prio, 0xff);
}
u8 iic_get_target_id(int cpu)
{
- return per_cpu(iic, cpu).target_id;
+ return per_cpu(cpu_iic, cpu).target_id;
}
EXPORT_SYMBOL_GPL(iic_get_target_id);
@@ -181,7 +181,7 @@ static inline int iic_ipi_to_irq(int ipi)
void iic_cause_IPI(int cpu, int mesg)
{
- out_be64(&per_cpu(iic, cpu).regs->generate, (0xf - mesg) << 4);
+ out_be64(&per_cpu(cpu_iic, cpu).regs->generate, (0xf - mesg) << 4);
}
struct irq_host *iic_get_irq_host(int node)
@@ -348,7 +348,7 @@ static void __init init_one_iic(unsigned int hw_cpu, unsigned long addr,
/* XXX FIXME: should locate the linux CPU number from the HW cpu
* number properly. We are lucky for now
*/
- struct iic *iic = &per_cpu(iic, hw_cpu);
+ struct iic *iic = &per_cpu(cpu_iic, hw_cpu);
iic->regs = ioremap(addr, sizeof(struct cbe_iic_thread_regs));
BUG_ON(iic->regs == NULL);
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c
index 937a544..c5f3116 100644
--- a/arch/powerpc/platforms/pseries/dtl.c
+++ b/arch/powerpc/platforms/pseries/dtl.c
@@ -54,7 +54,7 @@ struct dtl {
int buf_entries;
u64 last_idx;
};
-static DEFINE_PER_CPU(struct dtl, dtl);
+static DEFINE_PER_CPU(struct dtl, cpu_dtl);
/*
* Dispatch trace log event mask:
@@ -261,7 +261,7 @@ static int dtl_init(void)
/* set up the per-cpu log structures */
for_each_possible_cpu(i) {
- struct dtl *dtl = &per_cpu(dtl, i);
+ struct dtl *dtl = &per_cpu(cpu_dtl, i);
dtl->cpu = i;
rc = dtl_setup_file(dtl);
--
1.6.4.2
^ permalink raw reply related
* Re: [PATCH] pasemi_mac: ethtool get settings fix
From: David Miller @ 2009-10-07 10:43 UTC (permalink / raw)
To: olof; +Cc: linuxppc-dev, jgarzik, netdev
In-Reply-To: <20091006161054.GB29195@lixom.net>
From: Olof Johansson <olof@lixom.net>
Date: Tue, 6 Oct 2009 11:10:54 -0500
> Weird, I see my address in the to: line but I never got a copy in my inbox.
>
> On Mon, Oct 05, 2009 at 05:27:56PM +0400, Valentine Barshak wrote:
>> Not all pasemi mac interfaces can have a phy attached.
>> For example, XAUI has no phy and phydev is NULL for it.
>> In this case ethtool get settings causes kernel crash.
>> Fix it by returning -EOPNOTSUPP if there's no PHY attached.
>>
>> Signed-off-by: Valentine Barshak <vbarshak@ru.mvista.com>
>
> Acked-by: Olof Johansson <olof@lixom.net>
Applied to net-2.6, thanks!
^ permalink raw reply
* Re: [PATCH v3] mpc5200: support for the MAN mpc5200 based board mucmc52
From: Wolfram Sang @ 2009-10-07 9:49 UTC (permalink / raw)
To: Heiko Schocher; +Cc: linuxppc-dev
In-Reply-To: <4ACC37E5.4040804@denx.de>
[-- Attachment #1: Type: text/plain, Size: 12843 bytes --]
On Wed, Oct 07, 2009 at 08:40:37AM +0200, Heiko Schocher wrote:
> - serial Console on PSC1
> - 64MB SDRAM
> - MTD CFI Flash
> - Ethernet FEC
> - IDE support
>
> Signed-off-by: Heiko Schocher <hs@denx.de>
Sorry for finding things incrementally, but I think there is still one issue
left. Once this is sorted out, you could add my:
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
> ---
>
> - based on:
> git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next
>
> - checked with:
> $ ./scripts/checkpatch.pl 0002-mpc5200-support-for-the-MAN-mpc5200-based-board-muc.patch
> total: 0 errors, 0 warnings, 361 lines checked
>
> 0002-mpc5200-support-for-the-MAN-mpc5200-based-board-muc.patch has no obvious style problems and is ready for submission.
> $
>
> changes since v1:
>
> - add comments from Grant Likely <grant.likely@secretlab.ca>
> use mpc5200_defconfig as default configuration, therefore added
> SIMPLE_GPIO support in it, because this is not selectable as a
> module.
> - add comments from Wolfram Sang <w.sang@pengutronix.de>
> - rebase against current next
>
> changes since v2:
> - add comment from Wolfram Sang
> remove unofficial binding
>
> arch/powerpc/boot/dts/mucmc52.dts | 346 ++++++++++++++++++++++++++
> arch/powerpc/configs/mpc5200_defconfig | 2 +-
> arch/powerpc/platforms/52xx/mpc5200_simple.c | 1 +
> 3 files changed, 348 insertions(+), 1 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/mucmc52.dts
>
> diff --git a/arch/powerpc/boot/dts/mucmc52.dts b/arch/powerpc/boot/dts/mucmc52.dts
> new file mode 100644
> index 0000000..3924811
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/mucmc52.dts
> @@ -0,0 +1,346 @@
> +/*
> + * mucmc52 board Device Tree Source
> + *
> + * Copyright (C) 2009 DENX Software Engineering GmbH
> + * Heiko Schocher <hs@denx.de>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; either version 2 of the License, or (at your
> + * option) any later version.
> + */
> +
> +/dts-v1/;
> +
> +/ {
> + model = "manroland,mucmc52";
> + compatible = "manroland,mucmc52";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + interrupt-parent = <&mpc5200_pic>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + PowerPC,5200@0 {
> + device_type = "cpu";
> + reg = <0>;
> + d-cache-line-size = <32>;
> + i-cache-line-size = <32>;
> + d-cache-size = <0x4000>; // L1, 16K
> + i-cache-size = <0x4000>; // L1, 16K
> + timebase-frequency = <0>; // from bootloader
> + bus-frequency = <0>; // from bootloader
> + clock-frequency = <0>; // from bootloader
> + };
> + };
> +
> + memory {
> + device_type = "memory";
> + reg = <0x00000000 0x04000000>; // 64MB
> + };
> +
> + soc5200@f0000000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,mpc5200-immr",
> + "fsl,mpc5200b-immr";
You should decide on the latter one only here.
> + ranges = <0 0xf0000000 0x0000c000>;
> + reg = <0xf0000000 0x00000100>;
> + bus-frequency = <0>; // from bootloader
> + system-frequency = <0>; // from bootloader
> +
> + cdm@200 {
> + compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
> + reg = <0x200 0x38>;
> + };
> +
> + mpc5200_pic: interrupt-controller@500 {
> + // 5200 interrupts are encoded into two levels;
> + interrupt-controller;
> + #interrupt-cells = <3>;
> + compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
> + reg = <0x500 0x80>;
> + interrupts = <0 0 3>;
> + };
> +
> + gpt0: timer@600 { // GPT 0 in GPIO mode
> + compatible = "fsl,mpc5200b-gpt-gpio",
> + "fsl,mpc5200-gpt-gpio";
> + #gpio-cells = <2>;
> + reg = <0x600 0x10>;
> + interrupts = <1 9 0>;
> + gpio-controller;
> + };
> +
> + gpt1: timer@610 { // GPT 1 in GPIO mode
> + compatible = "fsl,mpc5200b-gpt-gpio",
> + "fsl,mpc5200-gpt-gpio";
> + #gpio-cells = <2>;
> + reg = <0x610 0x10>;
> + interrupts = <1 10 0>;
> + gpio-controller;
> + };
> +
> + gpt2: timer@620 { // GPT 2 in GPIO mode
> + compatible = "fsl,mpc5200b-gpt-gpio",
> + "fsl,mpc5200-gpt-gpio";
> + #gpio-cells = <2>;
> + reg = <0x620 0x10>;
> + interrupts = <1 11 0>;
> + gpio-controller;
> + };
> +
> + gpt3: timer@630 { // GPT 3 in GPIO mode
> + compatible = "fsl,mpc5200b-gpt-gpio",
> + "fsl,mpc5200-gpt-gpio";
> + #gpio-cells = <2>;
> + reg = <0x630 0x10>;
> + interrupts = <1 12 0>;
> + gpio-controller;
> + };
> +
> + gpio_simple: gpio@b00 {
> + compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
> + #gpio-cells = <2>;
> + reg = <0xb00 0x40>;
> + interrupts = <1 7 0>;
> + gpio-controller;
> + };
> +
> + gpio_wkup: gpio@c00 {
> + compatible = "fsl,mpc5200b-gpio-wkup",
> + "fsl,mpc5200-gpio-wkup";
> + #gpio-cells = <2>;
> + reg = <0xc00 0x40>;
> + interrupts = <1 8 0 0 3 0>;
> + gpio-controller;
> + };
> +
> + dma-controller@1200 {
> + device_type = "dma-controller";
> + compatible = "fsl,mpc5200b-bestcomm",
> + "fsl,mpc5200-bestcomm";
> + reg = <0x1200 0x80>;
> + interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
> + 3 4 0 3 5 0 3 6 0 3 7 0
> + 3 8 0 3 9 0 3 10 0 3 11 0
> + 3 12 0 3 13 0 3 14 0 3 15 0>;
> + };
> +
> + xlb@1f00 {
> + compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
> + reg = <0x1f00 0x100>;
> + };
> +
> + serial@2000 { // PSC1
> + compatible = "fsl,mpc5200b-psc-uart",
> + "fsl,mpc5200-psc-uart";
> + reg = <0x2000 0x100>;
> + interrupts = <2 1 0>;
> + };
> +
> + serial@2200 { // PSC2
> + compatible = "fsl,mpc5200b-psc-uart",
> + "fsl,mpc5200-psc-uart";
> + reg = <0x2200 0x100>;
> + interrupts = <2 2 0>;
> + };
> +
> + serial@2c00 { // PSC6
> + compatible = "fsl,mpc5200b-psc-uart",
> + "fsl,mpc5200-psc-uart";
> + reg = <0x2c00 0x100>;
> + interrupts = <2 6 0>;
> + };
> +
> + ethernet@3000 {
> + compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
> + reg = <0x3000 0x400>;
> + local-mac-address = [ 00 00 00 00 00 00 ];
> + interrupts = <2 5 0>;
> + phy-handle = <&phy0>;
> + };
> +
> + mdio@3000 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
> + reg = <0x3000 0x400>; // fec range, since we need to
> + // setup fec interrupts
> + interrupts = <2 5 0>; // these are for "mii command
> + // finished", not link changes
> + // & co.
> +
> + phy0: ethernet-phy@0 {
> + compatible = "intel,lxt971";
> + reg = <0>;
> + };
> + };
> +
> + ata@3a00 {
> + compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
> + reg = <0x3a00 0x100>;
> + interrupts = <2 7 0>;
> + };
> +
> + i2c@3d40 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c",
> + "fsl-i2c";
> + reg = <0x3d40 0x40>;
> + interrupts = <2 16 0>;
> +
> + hwmon@2c {
> + compatible = "ad,adm9240";
> + reg = <0x2c>;
> + };
> + rtc@51 {
> + compatible = "nxp,pcf8563";
> + reg = <0x51>;
> + };
> + };
> +
> + sram@8000 {
> + compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
> + reg = <0x8000 0x4000>;
> + };
> + };
> +
> + localbus {
> + compatible = "fsl,mpc5200b-lpb","simple-bus";
> + #address-cells = <2>;
> + #size-cells = <1>;
> + ranges = <0 0 0xff800000 0x00800000
> + 1 0 0x80000000 0x00800000
> + 3 0 0x80000000 0x00800000>;
> +
> + flash@0,0 {
> + compatible = "cfi-flash";
> + reg = <0 0 0x00800000>;
> + bank-width = <4>;
> + device-width = <2>;
> + #size-cells = <1>;
> + #address-cells = <1>;
> + partition@0 {
> + label = "DTS";
> + reg = <0x0 0x00100000>;
> + };
> + partition@100000 {
> + label = "Kernel";
> + reg = <0x100000 0x00200000>;
> + };
> + partition@300000 {
> + label = "RootFS";
> + reg = <0x00300000 0x00200000>;
> + };
> + partition@500000 {
> + label = "user";
> + reg = <0x00500000 0x00200000>;
> + };
> + partition@700000 {
> + label = "U-Boot";
> + reg = <0x00700000 0x00040000>;
> + };
> + partition@740000 {
> + label = "Env";
> + reg = <0x00740000 0x00020000>;
> + };
> + partition@760000 {
> + label = "red. Env";
> + reg = <0x00760000 0x00020000>;
> + };
> + partition@780000 {
> + label = "reserve";
> + reg = <0x00780000 0x00080000>;
> + };
> + };
> +
> + simple100: gpio-controller-100@3,600100 {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x00600100 0x1>;
> + gpio-controller;
> + };
> + simple104: gpio-controller-104@3,600104 {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x00600104 0x1>;
> + gpio-controller;
> + };
> + simple200: gpio-controller-200@3,600200 {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x00600200 0x1>;
> + gpio-controller;
> + };
> + simple201: gpio-controller-201@3,600201 {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x00600201 0x1>;
> + gpio-controller;
> + };
> + simple202: gpio-controller-202@3,600202 {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x00600202 0x1>;
> + gpio-controller;
> + };
> + simple203: gpio-controller-203@3,600203 {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x00600203 0x1>;
> + gpio-controller;
> + };
> + simple204: gpio-controller-204@3,600204 {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x00600204 0x1>;
> + gpio-controller;
> + };
> + simple206: gpio-controller-206@3,600206 {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x00600206 0x1>;
> + gpio-controller;
> + };
> + simple207: gpio-controller-207@3,600207 {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x00600207 0x1>;
> + gpio-controller;
> + };
> + simple20f: gpio-controller-20f@3,60020f {
> + #gpio-cells = <2>;
> + compatible = "manroland,mucmc52-aux-gpio";
> + reg = <3 0x0060020f 0x1>;
> + gpio-controller;
> + };
> +
> + };
> +
> + pci@f0000d00 {
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + #address-cells = <3>;
> + device_type = "pci";
> + compatible = "fsl,mpc5200-pci";
> + reg = <0xf0000d00 0x100>;
> + interrupt-map-mask = <0xf800 0 0 7>;
> + interrupt-map = <
> + /* IDSEL 0x10 */
> + 0x8000 0 0 1 &mpc5200_pic 0 3 3
> + 0x8000 0 0 2 &mpc5200_pic 0 3 3
> + 0x8000 0 0 3 &mpc5200_pic 0 2 3
> + 0x8000 0 0 4 &mpc5200_pic 0 1 3
> + >;
> + clock-frequency = <0>; // From boot loader
> + interrupts = <2 8 0 2 9 0 2 10 0>;
> + bus-range = <0 0>;
> + ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000
> + 0x02000000 0 0x90000000 0x90000000 0 0x10000000
> + 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
> + };
> +};
> diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
> index aaa4416..d035421 100644
> --- a/arch/powerpc/configs/mpc5200_defconfig
> +++ b/arch/powerpc/configs/mpc5200_defconfig
> @@ -205,7 +205,7 @@ CONFIG_RTAS_PROC=y
> CONFIG_PPC_BESTCOMM=y
> CONFIG_PPC_BESTCOMM_ATA=y
> CONFIG_PPC_BESTCOMM_FEC=y
> -# CONFIG_SIMPLE_GPIO is not set
> +CONFIG_SIMPLE_GPIO=y
>
> #
> # Kernel options
> diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c
> index caf6d92..d45be5b 100644
> --- a/arch/powerpc/platforms/52xx/mpc5200_simple.c
> +++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c
> @@ -51,6 +51,7 @@ static void __init mpc5200_simple_setup_arch(void)
> /* list of the supported boards */
> static char *board[] __initdata = {
> "intercontrol,digsy-mtc",
> + "manroland,mucmc52",
> "manroland,uc101",
> "phytec,pcm030",
> "phytec,pcm032",
> --
> 1.6.0.6
>
> --
> DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
> HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* Re: [RFC PATCH 00/12] Merge common OpenFirmware device tree code
From: Wolfram Sang @ 2009-10-07 9:02 UTC (permalink / raw)
To: Grant Likely
Cc: Stephen Rothwell, monstr, devicetree-discuss, microblaze-uclinux,
sparclinux, linuxppc-dev, davem
In-Reply-To: <fa686aa40910062149p5d7141e4x3ff849fd4d191f38@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 431 bytes --]
> However, I've completely devoted to this work for at least the next
> two months, so there are plenty more patches to follow. Once I've
\o/ Thanks, Grant! A seperate tree would be great. Patches look good to me:
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* Re: [PATCH] powerpc/boot/dts: drop obsolete 'fsl5200-clocking'
From: Wolfram Sang @ 2009-10-07 9:11 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40909100805y4af7d85an602f501349a180f9@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 607 bytes --]
On Thu, Sep 10, 2009 at 09:05:46AM -0600, Grant Likely wrote:
> On Thu, Sep 10, 2009 at 8:55 AM, Wolfram Sang <w.sang@pengutronix.de> wrote:
> > The 'fsl5200-clocking'-property was dropped since
> > 0d1cde235874b00905bce23f659690d060ebf475. Remove all occurences in dts-files.
> >
> > Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
> > Cc: Grant Likely <grant.likely@secretlab.ca>
>
> Looks good to me. I'll pick it up.
Ping? :)
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* Re: [FTRACE] Enabling function_graph causes OOPS
From: Benjamin Herrenschmidt @ 2009-10-07 9:10 UTC (permalink / raw)
To: Sachin Sant; +Cc: linuxppc-dev, rostedt
In-Reply-To: <4ACC57C4.5010002@in.ibm.com>
On Wed, 2009-10-07 at 14:26 +0530, Sachin Sant wrote:
> As Ben suggested, i changed LOAD_REG_IMMEDIATE() to LOAD_REG_ADDR()
> as follows.
>
> - LOAD_REG_IMMEDIATE(r4,ftrace_return_to_handler)
> + LOAD_REG_ADDR(r4,ftrace_return_to_handler)
>
> With this change compile time warnings about bad relocations
> related to ftrace are gone.
You also need to make sure r2 is properly loaded with the kernel TOC
pointer, something like ld r2,PACAKTOC(r13) before the LOAD_REG_ADDR.
Cheers,
Ben.
^ permalink raw reply
* Re: [FTRACE] Enabling function_graph causes OOPS
From: Sachin Sant @ 2009-10-07 8:56 UTC (permalink / raw)
To: rostedt; +Cc: linuxppc-dev
In-Reply-To: <1254775073.13160.13.camel@gandalf.stny.rr.com>
[-- Attachment #1: Type: text/plain, Size: 2358 bytes --]
Steven Rostedt wrote:
> On Tue, 2009-10-06 at 07:20 +1100, Benjamin Herrenschmidt wrote:
>
>> On Mon, 2009-10-05 at 09:25 -0400, Steven Rostedt wrote:
>>
>>>>> Sachin, can you give me more details on how you built that kernel ? (or
>>>>> give them again in case I missed them the first time around :-), ie,
>>>>> what toolchain, options, etc... or even better, give me remote access to
>>>>> the build host ?
>>>>>
>>>> Ok, got access and had a quick look... seems to be a toolchain problem
>>>> to me. I'll investigate more tomorrow.
>>>>
>>> Hi Ben,
>>>
>>> Any more word on this issue?
>>>
>> Didn't you fix it using a TOC access ?
>>
>> Unless I'm confusing things, I think the problem is the usage
>> of LOAD_REG_IMMEDIATE which generates relocs that we don't support
>> when CONFIG_RELOCATABLE is set.
>>
>> I've merged a patch that post-processes the kernel now, to check
>> for such relocs so at least you should be warned at build time.
>>
>
> I thought we had two issues. One was the use of the relocs that did
> cause issues. But then there was still crashes reported after that.
> IIRC. I'm still suffering jetlag, so my memory is not that fresh about
>
As Ben suggested, i changed LOAD_REG_IMMEDIATE() to LOAD_REG_ADDR()
as follows.
- LOAD_REG_IMMEDIATE(r4,ftrace_return_to_handler)
+ LOAD_REG_ADDR(r4,ftrace_return_to_handler)
With this change compile time warnings about bad relocations
related to ftrace are gone.
Before the change :
WARNING: 6 bad relocations
c000000000008f1a R_PPC64_ADDR16_HIGHEST __ksymtab+0x0000000000742110
c000000000008f1e R_PPC64_ADDR16_HIGHER __ksymtab+0x0000000000742110
c000000000008f26 R_PPC64_ADDR16_HI __ksymtab+0x0000000000742110
c000000000008f2a R_PPC64_ADDR16_LO __ksymtab+0x0000000000742110
c00000000085e118 R_PPC64_ADDR64 __crc_per_cpu__softirq_work_list
c0000000008662d0 R_PPC64_ADDR64 __crc_simple_prepare_write
After the change :
WARNING: 2 bad relocations
c00000000085e118 R_PPC64_ADDR64 __crc_per_cpu__softirq_work_list
c0000000008662d0 R_PPC64_ADDR64 __crc_simple_prepare_write
But i still run into oops while using ftrace function_graph.
Thanks
-Sachin
--
---------------------------------
Sachin Sant
IBM Linux Technology Center
India Systems and Technology Labs
Bangalore, India
---------------------------------
[-- Attachment #2: fix-ftrace-bad-relocs.patch --]
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diff -Naurp a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
--- a/arch/powerpc/kernel/entry_64.S 2009-10-06 15:31:29.000000000 +0530
+++ b/arch/powerpc/kernel/entry_64.S 2009-10-06 15:34:00.000000000 +0530
@@ -1038,7 +1038,7 @@ _GLOBAL(mod_return_to_handler)
* We are in a module using the module's TOC.
* Switch to our TOC to run inside the core kernel.
*/
- LOAD_REG_IMMEDIATE(r4,ftrace_return_to_handler)
+ LOAD_REG_ADDR(r4,ftrace_return_to_handler)
ld r2, 8(r4)
bl .ftrace_return_to_handler
^ permalink raw reply
* Re: [PATCH 3/6] 8xx: get rid of _PAGE_HWWRITE dependency in MMU.
From: Joakim Tjernlund @ 2009-10-07 7:47 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Scott Wood, linuxppc-dev@ozlabs.org, Rex Feany
In-Reply-To: <1254877655.6035.82.camel@pasglop>
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote on 07/10/2009 03:07:35:
>
> Allright, did a bit of reading of doco and code..
hey, this is a super, thanks!
>
> Doco isn't totally clear though. At some stage, it -hints- that in case
> of a TLB "error" (match on EA/ASID but incorrect
> protection/valid/changed/...) the offending TLB entry is automatically
> invalidated. Do you know if that is correct ?
Nope, I don't know.
>
> I would hope so since we never do anything to remove the "invalid"
> entries we write to the TLB when hitting non-present PTEs but then, that
> may also explain some of our problems...
hmm, then a tlbil_va() in do_page_fault for "no translation" errors
would help I guess.
>
> Now, a few comments from what I read in the code:
>
> - The whole writeback could be avoided in Instruction/Data TLB miss,
> but for that, you need to make sure that the TLB entry we create has
> valid set only if -both- present and accessed are set. That would save
> in the case of CONFIG_SWAP, a store and a read back of TWC I suppose,
> but you do need to find a way to do that ANDing of ACCESSED and PRESENT.
So far I have mapped !ACCESSED pages as No Access instead, maybe that
was wrong? I thought it was easier but I will have a look at this too.
>
> - I think we can get rid of HWWRITE. We can make CHANGED be the current
> HWWRITE value, I agree with you, which matches the HW changed bit. We
> need to be a bit careful of how we setup the PP bits tho. At this stage,
> I see several approaches:
>
> * One is to basically "generate" the right PP bits based on a
> combination of _PAGE_USER and _PAGE_RW. That's the simpler approach but
> probably uses more code in the TLB miss handler. It would look like
> that, with MxCTR:PPCS=0
>
> _PAGE_USER _PAGE_RW PP (bits 20..27)
> 0 0 011C1111 (C is _PAGE_DIRTY)
> 0 1 000C1111
> 1 0 110C1111
> 1 1 100C1111
>
> One easy way to do that is to have _PAGE_USER and _PAGE_RW sit next to
> each other in bit position 28 and 29 (0xc). Load a GPR with something
> like 0110000011001000 and rotate it left by PTE & 0xc, then move the
> resulting 3 bits into position, or something along those lines. You can
> also give up on kernel read-only support and go down to 2 PP bits and
> never use the extended encoding.
yes, I do think the extended encoding is too much work and not worth it.
One concern I have is if a user RO mapping also can be a kernel RO
mapping? That is, do kernel require RW to a user page mapped RO?
>
> * Another one is to use MxCTR:PPCS=1 a mask of 100C1U00 (U is
> _PAGE_USER) and or in ^_PAGE_RW (it could actually be made
> reverse-polarity in the PTE but that would mean some changes to non-8xx
> specific headers, so let's avoid it for now at least).
hmm, interesting.
Then I will also have set ACCESSED manually in TLB Miss I think.
>
> At least that's the best options I can see from my reading of the doco,
> though it's not totally clear to me what really happens when doing the
> PPCS trick, will it generate a TLB error on a non-match or will it try
> to TLB miss, which could be bad.
Yes, I don't think anybody has tested this.
>
> * Last but not least, it wouldn't be hard to use either of the above
> encodings, and have the PTE actually contain the right bit combination
> already. You don't need to have a _PAGE_RW, you don't need to have a
> _PAGE_USER :-) Look at how I do things for book3e, where I layout the
> 6 BookE protection bit directly in the PTE. That's a bit harder and maybe
> will need subtle changes to pte-common.h and such to accomodate it, and
> so probably something to experiment with as a second step, but it's the
> most efficient approach in the long run for obvious reasons.
>
> - I think we could have more bits pre-set to the right values in the
> PTE, look how we play with defining some of the constants in
> pte-common.h, might be worth having a look, but -after- we have
> something that works :-)
>
> - Possible bug: I'm very disturbed by the fact that DataTLBError sets
> HWWRITE and DIRTY on a non-present PTE. It should not. Just like
> ACCESSED. That's going to cause trouble and swap corruption, even more
> as we move DIRTY around.
Yes, this is what I fix with the first patch in my series:
8xx: DTLB Error must check for more errors.
DataTLBError currently does:
if ((err & 0x02000000) == 0)
DSI();
This won't handle a store with no valid translation.
Change this to
if ((err & 0x48000000) != 0)
DSI();
that is, branch to DSI if either !permission or
!translation.
>
> - Maybe we can completely remove that mucking around with dirty,
> setting of accessed etc... from DataTLBError. Just make it go to C code
> just like InstructionAccess, as we discussed earlier, the generic code
> will fix it up and we'll speed up page faults. It should be fairly rare
> to take a fault due to a missing _PAGE_ACCESSED or _PAGE_DIRTY in any
> case, so all that fixup in those exceptions is just overhead.
That depends on if you set ACCESSED in TLB Miss or not I think.
if TLB Miss maps pages as NoAccess du to missing ACCESSED then the
first access is always going to trap to TLB Error and then to
C just to fix DIRTY and/or ACCESSED, feels a bit more expensive
fixing it in TLB error, no?
BTW, does 2.4 update ACCESSED and DIRTY in generic code the same way
as 2.6? It is still much easier for me to test thing in 2.4 and then
move it over to 2.6
>
> - Later on, if it rocks your boat, you may want to look into removing
> the mucking around with swapper_pg_dir in the TLB miss. Instead, what
> you can do is lazily copy the kernel PMDs into the user PMDs. IE. On the
> first kernel access from a new user context, you fault, and from the
> do_page_fault() code, we can detect that and fixup the user PMD to point
> to the kernel page tables, thus avoiding that whole bunch of code in the
> TLB miss. When creating new user page tables, we can pre-fill the kernel
> PMDs too. I think x86 does that. We could do that for BookE too, though
> it's less of a win since we have to fixup the TID in MMUCR/MAS but for
> 8xx it would save a few instructions & conditionals in the TLB miss fast
> path.
That would be nice, I have had that idea but no clue as how to do it.
>
> - I still have problems with the comment next to the "workaround"
> tlbil_va() we have in the icache/dcache flush. It doesn't make much
> sense to me since dcbst is going to be done by the kernel on a kernel
> address, not a user address, so I don't see how the thing we invalidate
> relates to the flush we do just below.... So that raises a few
> questions:
This workaround was added when we started to force TLB Errors in
TLB Miss for missing pmd entries so it may be some other bug in the
TLB code that makes this happen.
Here is a link:
http://www.mail-archive.com/linuxppc-embedded@ozlabs.org/msg07885.html
Seems to boil down to a missing tlbie()
>
> * If this is to avoid write faults on kernel pages, then we may just
> want to have a fixup in do_page_fault() to ignore them when coming from
> flush_dcache_icache_* using the exception table mechanism instead ?
>
> * I don't see how it works around user faults but maybe you have a
> clear scenario in mind
>
> * It appears still reasonably obvious that we need that tlbil_va
> somewhere in that fault path, but I don't know what for, I'm not sure
> it's really what the comment says it's about. That raises back the whole
> question of when are those "invalid" TLB entries that we create when
> _PAGE_PRESENT is not set are going to be removed. The doc hints that
> they go a way on TLB error, but the doc really only says so for missing
> changed bit... so I'm tempted to say we need to basically stick a
> tlbil_va on 8xx on both set_pte_at() and ptep_set_access_flags() for any
> non-kernel page. What do you think ? That would be the safest.
Possibly just doing a tlbil_va in do_page_fault() for no translation
errors comes to mind.
>
> - The "fake" DataAccess and InstructionAccess are useless... just a
> spurious jump for nothing. We could implement those straight in
> DataTLBError and InstructionTLBError, we just need to make sure that
> the trap numbers we put in the exception frame are 0x300 and 0x400, but
> that's just a matter of passing the right bits to EXC_XFER_EE_LITE().
>
> - Finally, another boat-rocking optimisation to do is preload. You
> could hook in update_mmu_cache() for 8xx to go whack an entry in the TLB
> as well, which would avoid a TLB miss right after a page fault. But
> again, only when things work.
>
> None of the above of course address your DAR-not-updated concern. I
> think your approach of "clobbering" the DAR on every storage exception
> after it's been snapshotted and then testing for the clobber and
> emulating the instruction is the way to go, though your patch could use
> some cleaning there.
Yes, it is full of debug cruft now.
>
> I'll post comments on it separately.
Thanks, I still like the asm version for two reasons:
- It contains the problem to 8xx files
- fixing it up in do_page_fault() may lead to a never ending loop.
This is mainly due to the current TLB code not using DIRTY correctly.
In any case it would be nice to keep the asm version in the file, should
we need it some day. It was rather painful to get it working so saving it
somewhere would be nice.
>
> At the end of the day, I can't help that much without HW access and/or a
> simulator, as you can guess, and no, I'm not asking for people to send
> me an 8xx board :-) (especially useless without a BDI imho). So I rely
> on Scott and yourself to sort this out. But thanks for showing up, and
> please, do port your board to 2.6 so you can test your stuff :-)
:)
^ permalink raw reply
* Re: [RFC PATCH 00/12] Merge common OpenFirmware device tree code
From: David Miller @ 2009-10-07 7:27 UTC (permalink / raw)
To: grant.likely
Cc: sfr, monstr, devicetree-discuss, microblaze-uclinux, sparclinux,
linuxppc-dev
In-Reply-To: <fa686aa40910062149p5d7141e4x3ff849fd4d191f38@mail.gmail.com>
From: Grant Likely <grant.likely@secretlab.ca>
Date: Tue, 6 Oct 2009 22:49:04 -0600
> Also, I'd like to take on responsibility for maintaining the cross-
> architecture device tree code. If there are no objections, I'll
> write a patch to add a device tree section to MAINTAINERS.
Feel free. And also feel free to add my:
Acked-by: David S. Miller <davem@davemloft.net>
to your patches.
Thanks!
^ permalink raw reply
* Re: [RFC PATCH 00/12] Merge common OpenFirmware device tree code
From: Rob Landley @ 2009-10-07 7:09 UTC (permalink / raw)
To: devicetree-discuss
Cc: Stephen Rothwell, monstr, microblaze-uclinux, sparclinux,
linuxppc-dev, davem
In-Reply-To: <fa686aa40910062149p5d7141e4x3ff849fd4d191f38@mail.gmail.com>
On Tuesday 06 October 2009 23:49:04 Grant Likely wrote:
>
> However, I've completely devoted to this work for at least the next
> two months, so there are plenty more patches to follow. Once I've
> got all the common code merged between Microblaze, PowerPC and Sparc
> I'll be fix the endian problems and making it easily usable by other
> architectures like ARM and MIPS. Lots of work to be done.
Is there any news on getting QEMU to parse a device tree to figure out what
hardware to emulate? (I.E. using the device tree code to let qemu provide
configurable board emulations instead of hardwiring them in C code?)
Also, what would be involved in getting x86 to (at least have the option to)
use the device tree stuff?
Rob
--
Latency is more important than throughput. It's that simple. - Linus Torvalds
^ permalink raw reply
* [PATCH v3] mpc5200: support for the MAN mpc5200 based board mucmc52
From: Heiko Schocher @ 2009-10-07 6:40 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40910050646p168c2bbfi4b432778827102c9@mail.gmail.com>
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- IDE support
Signed-off-by: Heiko Schocher <hs@denx.de>
---
- based on:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next
- checked with:
$ ./scripts/checkpatch.pl 0002-mpc5200-support-for-the-MAN-mpc5200-based-board-muc.patch
total: 0 errors, 0 warnings, 361 lines checked
0002-mpc5200-support-for-the-MAN-mpc5200-based-board-muc.patch has no obvious style problems and is ready for submission.
$
changes since v1:
- add comments from Grant Likely <grant.likely@secretlab.ca>
use mpc5200_defconfig as default configuration, therefore added
SIMPLE_GPIO support in it, because this is not selectable as a
module.
- add comments from Wolfram Sang <w.sang@pengutronix.de>
- rebase against current next
changes since v2:
- add comment from Wolfram Sang
remove unofficial binding
arch/powerpc/boot/dts/mucmc52.dts | 346 ++++++++++++++++++++++++++
arch/powerpc/configs/mpc5200_defconfig | 2 +-
arch/powerpc/platforms/52xx/mpc5200_simple.c | 1 +
3 files changed, 348 insertions(+), 1 deletions(-)
create mode 100644 arch/powerpc/boot/dts/mucmc52.dts
diff --git a/arch/powerpc/boot/dts/mucmc52.dts b/arch/powerpc/boot/dts/mucmc52.dts
new file mode 100644
index 0000000..3924811
--- /dev/null
+++ b/arch/powerpc/boot/dts/mucmc52.dts
@@ -0,0 +1,346 @@
+/*
+ * mucmc52 board Device Tree Source
+ *
+ * Copyright (C) 2009 DENX Software Engineering GmbH
+ * Heiko Schocher <hs@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "manroland,mucmc52";
+ compatible = "manroland,mucmc52";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&mpc5200_pic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,5200@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <0x4000>; // L1, 16K
+ i-cache-size = <0x4000>; // L1, 16K
+ timebase-frequency = <0>; // from bootloader
+ bus-frequency = <0>; // from bootloader
+ clock-frequency = <0>; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x04000000>; // 64MB
+ };
+
+ soc5200@f0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc5200-immr",
+ "fsl,mpc5200b-immr";
+ ranges = <0 0xf0000000 0x0000c000>;
+ reg = <0xf0000000 0x00000100>;
+ bus-frequency = <0>; // from bootloader
+ system-frequency = <0>; // from bootloader
+
+ cdm@200 {
+ compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
+ reg = <0x200 0x38>;
+ };
+
+ mpc5200_pic: interrupt-controller@500 {
+ // 5200 interrupts are encoded into two levels;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
+ reg = <0x500 0x80>;
+ interrupts = <0 0 3>;
+ };
+
+ gpt0: timer@600 { // GPT 0 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x600 0x10>;
+ interrupts = <1 9 0>;
+ gpio-controller;
+ };
+
+ gpt1: timer@610 { // GPT 1 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x610 0x10>;
+ interrupts = <1 10 0>;
+ gpio-controller;
+ };
+
+ gpt2: timer@620 { // GPT 2 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x620 0x10>;
+ interrupts = <1 11 0>;
+ gpio-controller;
+ };
+
+ gpt3: timer@630 { // GPT 3 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x630 0x10>;
+ interrupts = <1 12 0>;
+ gpio-controller;
+ };
+
+ gpio_simple: gpio@b00 {
+ compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+ #gpio-cells = <2>;
+ reg = <0xb00 0x40>;
+ interrupts = <1 7 0>;
+ gpio-controller;
+ };
+
+ gpio_wkup: gpio@c00 {
+ compatible = "fsl,mpc5200b-gpio-wkup",
+ "fsl,mpc5200-gpio-wkup";
+ #gpio-cells = <2>;
+ reg = <0xc00 0x40>;
+ interrupts = <1 8 0 0 3 0>;
+ gpio-controller;
+ };
+
+ dma-controller@1200 {
+ device_type = "dma-controller";
+ compatible = "fsl,mpc5200b-bestcomm",
+ "fsl,mpc5200-bestcomm";
+ reg = <0x1200 0x80>;
+ interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
+ 3 4 0 3 5 0 3 6 0 3 7 0
+ 3 8 0 3 9 0 3 10 0 3 11 0
+ 3 12 0 3 13 0 3 14 0 3 15 0>;
+ };
+
+ xlb@1f00 {
+ compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+ reg = <0x1f00 0x100>;
+ };
+
+ serial@2000 { // PSC1
+ compatible = "fsl,mpc5200b-psc-uart",
+ "fsl,mpc5200-psc-uart";
+ reg = <0x2000 0x100>;
+ interrupts = <2 1 0>;
+ };
+
+ serial@2200 { // PSC2
+ compatible = "fsl,mpc5200b-psc-uart",
+ "fsl,mpc5200-psc-uart";
+ reg = <0x2200 0x100>;
+ interrupts = <2 2 0>;
+ };
+
+ serial@2c00 { // PSC6
+ compatible = "fsl,mpc5200b-psc-uart",
+ "fsl,mpc5200-psc-uart";
+ reg = <0x2c00 0x100>;
+ interrupts = <2 6 0>;
+ };
+
+ ethernet@3000 {
+ compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
+ reg = <0x3000 0x400>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <2 5 0>;
+ phy-handle = <&phy0>;
+ };
+
+ mdio@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+ reg = <0x3000 0x400>; // fec range, since we need to
+ // setup fec interrupts
+ interrupts = <2 5 0>; // these are for "mii command
+ // finished", not link changes
+ // & co.
+
+ phy0: ethernet-phy@0 {
+ compatible = "intel,lxt971";
+ reg = <0>;
+ };
+ };
+
+ ata@3a00 {
+ compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+ reg = <0x3a00 0x100>;
+ interrupts = <2 7 0>;
+ };
+
+ i2c@3d40 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c",
+ "fsl-i2c";
+ reg = <0x3d40 0x40>;
+ interrupts = <2 16 0>;
+
+ hwmon@2c {
+ compatible = "ad,adm9240";
+ reg = <0x2c>;
+ };
+ rtc@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+ };
+
+ sram@8000 {
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+ reg = <0x8000 0x4000>;
+ };
+ };
+
+ localbus {
+ compatible = "fsl,mpc5200b-lpb","simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0 0xff800000 0x00800000
+ 1 0 0x80000000 0x00800000
+ 3 0 0x80000000 0x00800000>;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 0x00800000>;
+ bank-width = <4>;
+ device-width = <2>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+ partition@0 {
+ label = "DTS";
+ reg = <0x0 0x00100000>;
+ };
+ partition@100000 {
+ label = "Kernel";
+ reg = <0x100000 0x00200000>;
+ };
+ partition@300000 {
+ label = "RootFS";
+ reg = <0x00300000 0x00200000>;
+ };
+ partition@500000 {
+ label = "user";
+ reg = <0x00500000 0x00200000>;
+ };
+ partition@700000 {
+ label = "U-Boot";
+ reg = <0x00700000 0x00040000>;
+ };
+ partition@740000 {
+ label = "Env";
+ reg = <0x00740000 0x00020000>;
+ };
+ partition@760000 {
+ label = "red. Env";
+ reg = <0x00760000 0x00020000>;
+ };
+ partition@780000 {
+ label = "reserve";
+ reg = <0x00780000 0x00080000>;
+ };
+ };
+
+ simple100: gpio-controller-100@3,600100 {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x00600100 0x1>;
+ gpio-controller;
+ };
+ simple104: gpio-controller-104@3,600104 {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x00600104 0x1>;
+ gpio-controller;
+ };
+ simple200: gpio-controller-200@3,600200 {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x00600200 0x1>;
+ gpio-controller;
+ };
+ simple201: gpio-controller-201@3,600201 {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x00600201 0x1>;
+ gpio-controller;
+ };
+ simple202: gpio-controller-202@3,600202 {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x00600202 0x1>;
+ gpio-controller;
+ };
+ simple203: gpio-controller-203@3,600203 {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x00600203 0x1>;
+ gpio-controller;
+ };
+ simple204: gpio-controller-204@3,600204 {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x00600204 0x1>;
+ gpio-controller;
+ };
+ simple206: gpio-controller-206@3,600206 {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x00600206 0x1>;
+ gpio-controller;
+ };
+ simple207: gpio-controller-207@3,600207 {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x00600207 0x1>;
+ gpio-controller;
+ };
+ simple20f: gpio-controller-20f@3,60020f {
+ #gpio-cells = <2>;
+ compatible = "manroland,mucmc52-aux-gpio";
+ reg = <3 0x0060020f 0x1>;
+ gpio-controller;
+ };
+
+ };
+
+ pci@f0000d00 {
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ compatible = "fsl,mpc5200-pci";
+ reg = <0xf0000d00 0x100>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x10 */
+ 0x8000 0 0 1 &mpc5200_pic 0 3 3
+ 0x8000 0 0 2 &mpc5200_pic 0 3 3
+ 0x8000 0 0 3 &mpc5200_pic 0 2 3
+ 0x8000 0 0 4 &mpc5200_pic 0 1 3
+ >;
+ clock-frequency = <0>; // From boot loader
+ interrupts = <2 8 0 2 9 0 2 10 0>;
+ bus-range = <0 0>;
+ ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000
+ 0x02000000 0 0x90000000 0x90000000 0 0x10000000
+ 0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
+ };
+};
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
index aaa4416..d035421 100644
--- a/arch/powerpc/configs/mpc5200_defconfig
+++ b/arch/powerpc/configs/mpc5200_defconfig
@@ -205,7 +205,7 @@ CONFIG_RTAS_PROC=y
CONFIG_PPC_BESTCOMM=y
CONFIG_PPC_BESTCOMM_ATA=y
CONFIG_PPC_BESTCOMM_FEC=y
-# CONFIG_SIMPLE_GPIO is not set
+CONFIG_SIMPLE_GPIO=y
#
# Kernel options
diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c
index caf6d92..d45be5b 100644
--- a/arch/powerpc/platforms/52xx/mpc5200_simple.c
+++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c
@@ -51,6 +51,7 @@ static void __init mpc5200_simple_setup_arch(void)
/* list of the supported boards */
static char *board[] __initdata = {
"intercontrol,digsy-mtc",
+ "manroland,mucmc52",
"manroland,uc101",
"phytec,pcm030",
"phytec,pcm032",
--
1.6.0.6
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply related
* [PATCH v3] mpc5200: support for the MAN mpc5200 based board uc101
From: Heiko Schocher @ 2009-10-07 6:40 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
In-Reply-To: <fa686aa40910050646p168c2bbfi4b432778827102c9@mail.gmail.com>
- serial Console on PSC1
- 64MB SDRAM
- MTD CFI Flash
- Ethernet FEC
- I2C with PCF8563 and Temp. Sensor ADM9240
- IDE support
Signed-off-by: Heiko Schocher <hs@denx.de>
---
- based on:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git next
- checked with:
$ ./scripts/checkpatch.pl 0001-mpc5200-support-for-the-MAN-mpc5200-based-board-uc1.patch
total: 0 errors, 0 warnings, 317 lines checked
0001-mpc5200-support-for-the-MAN-mpc5200-based-board-uc1.patch has no obvious style problems and is ready for submission.
$
changes since v1:
- add comments from Grant Likely <grant.likely@secretlab.ca>
use mpc5200_defconfig as default configuration
- add comments from Wolfram Sang <w.sang@pengutronix.de>
- rebase against current next
changes since v2:
- add comment from Wolfram Sang
remove unofficial binding
arch/powerpc/boot/dts/uc101.dts | 310 ++++++++++++++++++++++++++
arch/powerpc/platforms/52xx/mpc5200_simple.c | 1 +
2 files changed, 311 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/uc101.dts
diff --git a/arch/powerpc/boot/dts/uc101.dts b/arch/powerpc/boot/dts/uc101.dts
new file mode 100644
index 0000000..bfb8dd9
--- /dev/null
+++ b/arch/powerpc/boot/dts/uc101.dts
@@ -0,0 +1,310 @@
+/*
+ * uc101 board Device Tree Source
+ *
+ * Copyright (C) 2009 DENX Software Engineering GmbH
+ * Heiko Schocher <hs@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "manroland,uc101";
+ compatible = "manroland,uc101";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&mpc5200_pic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,5200@0 {
+ device_type = "cpu";
+ reg = <0>;
+ d-cache-line-size = <32>;
+ i-cache-line-size = <32>;
+ d-cache-size = <0x4000>; // L1, 16K
+ i-cache-size = <0x4000>; // L1, 16K
+ timebase-frequency = <0>; // from bootloader
+ bus-frequency = <0>; // from bootloader
+ clock-frequency = <0>; // from bootloader
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x04000000>; // 64MB
+ };
+
+ soc5200@f0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc5200-immr",
+ "fsl,mpc5200b-immr";
+ ranges = <0 0xf0000000 0x0000c000>;
+ reg = <0xf0000000 0x00000100>;
+ bus-frequency = <0>; // from bootloader
+ system-frequency = <0>; // from bootloader
+
+ cdm@200 {
+ compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
+ reg = <0x200 0x38>;
+ };
+
+ mpc5200_pic: interrupt-controller@500 {
+ // 5200 interrupts are encoded into two levels;
+ interrupt-controller;
+ #interrupt-cells = <3>;
+ compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
+ reg = <0x500 0x80>;
+ interrupts = <0 0 3>;
+ };
+
+ gpt0: timer@600 { // GPT 0 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x600 0x10>;
+ interrupts = <1 9 0>;
+ gpio-controller;
+ };
+
+ gpt1: timer@610 { // GPT 1 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x610 0x10>;
+ interrupts = <1 10 0>;
+ gpio-controller;
+ };
+
+ gpt2: timer@620 { // GPT 2 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x620 0x10>;
+ interrupts = <1 11 0>;
+ gpio-controller;
+ };
+
+ gpt3: timer@630 { // GPT 3 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x630 0x10>;
+ interrupts = <1 12 0>;
+ gpio-controller;
+ };
+
+ gpt4: timer@640 { // GPT 4 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x640 0x10>;
+ interrupts = <1 13 0>;
+ gpio-controller;
+ };
+
+ gpt5: timer@650 { // GPT 5 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x650 0x10>;
+ interrupts = <1 14 0>;
+ gpio-controller;
+ };
+
+ gpt6: timer@660 { // GPT 6 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x660 0x10>;
+ interrupts = <1 15 0>;
+ gpio-controller;
+ };
+
+ gpt7: timer@670 { // GPT 7 in GPIO mode
+ compatible = "fsl,mpc5200b-gpt-gpio",
+ "fsl,mpc5200-gpt-gpio";
+ #gpio-cells = <2>;
+ reg = <0x670 0x10>;
+ interrupts = <1 16 0>;
+ gpio-controller;
+ };
+
+ gpio_simple: gpio@b00 {
+ compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+ reg = <0xb00 0x40>;
+ interrupts = <1 7 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio_wkup: gpio@c00 {
+ compatible = "fsl,mpc5200b-gpio-wkup",
+ "fsl,mpc5200-gpio-wkup";
+ reg = <0xc00 0x40>;
+ interrupts = <1 8 0 0 3 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ gpio_sint: gpio_sint@b00 {
+ compatible = "fsl,mpc5200b-gpio-sint",
+ "fsl,mpc5200-gpio-sint";
+ reg = <0xb00 0x40>;
+ interrupts = <1 8 0 0 3 0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ dma-controller@1200 {
+ device_type = "dma-controller";
+ compatible = "fsl,mpc5200b-bestcomm",
+ "fsl,mpc5200-bestcomm";
+ reg = <0x1200 0x80>;
+ interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
+ 3 4 0 3 5 0 3 6 0 3 7 0
+ 3 8 0 3 9 0 3 10 0 3 11 0
+ 3 12 0 3 13 0 3 14 0 3 15 0>;
+ };
+
+ xlb@1f00 {
+ compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+ reg = <0x1f00 0x100>;
+ };
+
+ serial@2000 { // PSC1
+ compatible = "fsl,mpc5200b-psc-uart",
+ "fsl,mpc5200-psc-uart";
+ reg = <0x2000 0x100>;
+ interrupts = <2 1 0>;
+ };
+
+ serial@2200 { // PSC2
+ compatible = "fsl,mpc5200b-psc-uart",
+ "fsl,mpc5200-psc-uart";
+ reg = <0x2200 0x100>;
+ interrupts = <2 2 0>;
+ };
+
+ serial@2c00 { // PSC6
+ compatible = "fsl,mpc5200b-psc-uart",
+ "fsl,mpc5200-psc-uart";
+ reg = <0x2c00 0x100>;
+ interrupts = <2 6 0>;
+ };
+
+ ethernet@3000 {
+ compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
+ reg = <0x3000 0x400>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <2 5 0>;
+ phy-handle = <&phy0>;
+ };
+
+ mdio@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+ reg = <0x3000 0x400>; // fec range, since we need to
+ // setup fec interrupts
+ interrupts = <2 5 0>; // these are for "mii command
+ // finished", not link
+ // changes & co.
+
+ phy0: ethernet-phy@0 {
+ compatible = "intel,lxt971";
+ reg = <0>;
+ };
+ };
+
+ ata@3a00 {
+ compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+ reg = <0x3a00 0x100>;
+ interrupts = <2 7 0>;
+ };
+
+ i2c@3d40 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c",
+ "fsl-i2c";
+ reg = <0x3d40 0x40>;
+ interrupts = <2 16 0>;
+ fsl,preserve-clocking;
+ clock-frequency = <400000>;
+
+ hwmon@2c {
+ compatible = "ad,adm9240";
+ reg = <0x2c>;
+ };
+ rtc@51 {
+ compatible = "nxp,pcf8563";
+ reg = <0x51>;
+ };
+ };
+
+ sram@8000 {
+ compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+ reg = <0x8000 0x4000>;
+ };
+ };
+
+ localbus {
+ compatible = "fsl,mpc5200b-lpb","simple-bus";
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges = <0 0 0xff800000 0x00800000
+ 1 0 0x80000000 0x00800000
+ 3 0 0x80000000 0x00800000>;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 0x00800000>;
+ bank-width = <2>;
+ device-width = <2>;
+ #size-cells = <1>;
+ #address-cells = <1>;
+ partition@0 {
+ label = "DTS";
+ reg = <0x0 0x00100000>;
+ };
+ partition@100000 {
+ label = "Kernel";
+ reg = <0x100000 0x00200000>;
+ };
+ partition@300000 {
+ label = "RootFS";
+ reg = <0x00300000 0x00200000>;
+ };
+
+ partition@500000 {
+ label = "user";
+ reg = <0x00500000 0x00200000>;
+ };
+ partition@700000 {
+ label = "U-Boot";
+ reg = <0x00700000 0x00040000>;
+ };
+ partition@740000 {
+ label = "Env";
+ reg = <0x00740000 0x00010000>;
+ };
+ partition@750000 {
+ label = "red. Env";
+ reg = <0x00750000 0x00010000>;
+ };
+ partition@760000 {
+ label = "reserve";
+ reg = <0x00760000 0x000a0000>;
+ };
+ };
+
+ };
+};
diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c
index c31e5b5..caf6d92 100644
--- a/arch/powerpc/platforms/52xx/mpc5200_simple.c
+++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c
@@ -51,6 +51,7 @@ static void __init mpc5200_simple_setup_arch(void)
/* list of the supported boards */
static char *board[] __initdata = {
"intercontrol,digsy-mtc",
+ "manroland,uc101",
"phytec,pcm030",
"phytec,pcm032",
"promess,motionpro",
--
1.6.0.6
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
^ permalink raw reply related
* Re: [RFC PATCH 00/12] Merge common OpenFirmware device tree code
From: Julian Calaby @ 2009-10-07 5:18 UTC (permalink / raw)
To: Grant Likely
Cc: Sam Creasey, Stephen Rothwell, monstr, devicetree-discuss,
microblaze-uclinux, sparclinux, linuxppc-dev, davem
In-Reply-To: <fa686aa40910062149p5d7141e4x3ff849fd4d191f38@mail.gmail.com>
On Wed, Oct 7, 2009 at 14:49, Grant Likely <grant.likely@secretlab.ca> wrot=
e:
> On Tue, Oct 6, 2009 at 10:29 PM, Grant Likely <grant.likely@secretlab.ca>=
wrote:
>>
>> So here goes. =A0I've begun the work to merge and clean up the OF device
>> tree handling code and this is my first set of patches. =A0Not fully
>> tested yet, but I'm getting them out to the lists so that I can start
>> responding to comments and collecting acks. =A0This first batch isn't
>> anything exciting, just a merge of common code
Good work, for what it's worth, this all looks good to me.
> However, I've completely devoted to this work for at least the next
> two months, so there are plenty more patches to follow. =A0Once I've
> got all the common code merged between Microblaze, PowerPC and Sparc
> I'll be fix the endian problems and making it easily usable by other
> architectures like ARM and MIPS. =A0Lots of work to be done.
On the subject of merging code, I know that the SUN3 code in m68k uses
a similar prom interface to the sparc32 code. (and I've also
considered unifying that and ... well ... see above) Does anyone know
if it has an OpenFirmware interface for it's devices? Is OF on SUN3
even remotely useful? Does Linux on SUN3 even work with modern
kernels?
Another issue is that there is at least one driver in the kernel that
depends on both PPC and OF to work around the differences in the
implementations of OpenFirmware on Sparc and PowerPC. (I submitted a
patch for it, but can't remember the driver's name) Whilst the
driver's author assures me that the hardware will never go anywhere
near Sparc, it can't hurt to drop the dependency on PPC for additional
compile testing coverage - and because it's the Right Thing. (and the
reduction of cheap hacks like this can't be bad either.)
Other than that, good work, and keep going.
Thanks,
--=20
Julian Calaby
Email: julian.calaby@gmail.com
.Plan: http://sites.google.com/site/juliancalaby/
^ permalink raw reply
* Re: [RFC PATCH 05/12] of: add common header for flattened device tree representation
From: Benjamin Herrenschmidt @ 2009-10-07 5:14 UTC (permalink / raw)
To: Grant Likely
Cc: Stephen Rothwell, monstr, microblaze-uclinux, devicetree-discuss,
sparclinux, linuxppc-dev, davem
In-Reply-To: <20091007043052.16890.15975.stgit@angua>
On Tue, 2009-10-06 at 22:30 -0600, Grant Likely wrote:
> --- /dev/null
> +++ b/include/linux/of_fdt.h
> @@ -0,0 +1,30 @@
> +/*
> + * Definitions for working with the Flattened Device Tree data format
> + *
> + * Copyright (C) 1996-2005 Paul Mackerras.
> + *
> + * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
> + * Updates for SPARC by David S. Miller
> + * Merged to common code by Grant Likely
I think you should prune the above. Make it (c) myself since I wrote the
FDT code initially. You can add back (c) of other people as you add more
stuff here I suppose.
No big deal tho.
Ben.
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */
> +
> +#ifndef _LINUX_OF_FDT_H
> +#define _LINUX_OF_FDT_H
> +
> +/* Definitions used by the flattened device tree */
> +#define OF_DT_HEADER 0xd00dfeed /* marker */
> +#define OF_DT_BEGIN_NODE 0x1 /* Start of node, full name */
> +#define OF_DT_END_NODE 0x2 /* End node */
> +#define OF_DT_PROP 0x3 /* Property: name off, size,
> + * content */
> +#define OF_DT_NOP 0x4 /* nop */
> +#define OF_DT_END 0x9
> +
> +#define OF_DT_VERSION 0x10
> +
> +#endif /* _LINUX_OF_FDT_H */
^ permalink raw reply
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