* Re: Trouble specifying dts gpio-leds with GPIO expander chip
From: Anton Vorontsov @ 2009-12-21 21:55 UTC (permalink / raw)
To: Bill Gatliff; +Cc: Linux/PPC Development
In-Reply-To: <4B2FCF40.3050204@billgatliff.com>
On Mon, Dec 21, 2009 at 01:40:48PM -0600, Bill Gatliff wrote:
[...]
> I'm stumped. Could it be that the startup code is trying to register
> the heartbeat device before it has registered the MAX7314, so it doesn't
> know yet that the GPIO line exists?
>
> Anyone have any suggestions?
drivers/gpio/pca953x.c doesn't register itself with the
OF GPIO infrastructure (plus the driver has an absolutely
bogus linux,gpio-base stuff, heh).
As an example of how to do the OF GPIO properly, see
arch/powerpc/platforms/83xx/mcu_mpc8349emitx.c:mcu_gpiochip_add().
Though, soon there will be an easier way to register I2C/SPI chips
with the OF GPIO infrastructure.
Thanks,
--
Anton Vorontsov
email: cbouatmailru@gmail.com
irc://irc.freenode.net/bd2
^ permalink raw reply
* Re: [PATCH] powerpc: update ibm,client-architecture
From: Joel Schopp @ 2009-12-21 22:14 UTC (permalink / raw)
To: Michael Neuling; +Cc: linuxppc-dev
In-Reply-To: <7024.1261429935@neuling.org>
>> OK.
>>
>>>> + W(NR_CPUS/4), /* max cores supported */
>>>>
>
> FYI reading the PAPR, this comment should technically be "max 'cpu'
> nodes presented".
>
I applied a disambiguation filter to the comment since cpus can mean a
lot of things these days ( ie hardware threads, cores, chips) , but a
core is a core.
>> 4 is the new 2.
>>
>
> I'd still be asking what 2 is. It's needs a #define to make clearer
> what you are doing.
>
>
I'll add a #define
>> Since you don't know the actual threads per core at
>> this point in boot you have to be conservative and go with the maximum
>> number of any processor. See page 4 of these charts:
>> http://www.power.org/events/powercon09/taiwan09/IBM_Overview_POWER7.pdf
>>
>
> I don't think hard wiring 4 in here is right. If we are booting a
> machine with SMT2, we will put only half the number of cores that we can
> handle in this field. This is going to break a lot of machines where
> people have compiled with NR_CPUS = thread number.
>
> I think you just want to put NR_CPUS here.
>
>
It's a bad interface. No matter what you choose there will be a
downside. 1) If you choose NR_CPUS, the best case of how many you could
boot without SMT, then when you boot with SMT2 or SMT4 you can get
assigned more cpus than you can boot. 2) If you choose NR_CPUS/4, the
worst case of how many you could boot, and you get a large machine with
SMT2 or SMT1 you might have said you support less cpus than you actually
do and thus not boot all the cpus. So no matter what you choose you
could be not booting cpus in some theoretical scenario.
^ permalink raw reply
* Question on MPC52xx IRQ[123] pins
From: Bill Gatliff @ 2009-12-21 22:30 UTC (permalink / raw)
To: Linux/PPC Development
Guys:
I think I already know the answer to this, having read most of the
MPC52xx manual. But I'll ask anyway, just to be sure I'm not missing
something obvious... :)
Is it possible to treat the external IRQ[123] pins on the MPC52xx as
GPIO inputs? And if so, how do I tweak my dts file and other code, if
necessary, to make that happen?
Reason I ask is, I'm trying to enhance
drivers/input/misc/rotary-encoder.c to use device trees, and one of the
encoder inputs is on IRQ2. My strategy so far is to just provide an
of_probe() function that builds a rotary_encoder_platform_data structure
and then calls platform_device_register(). And that ain't working. :)
First off, the rotary-encoder driver assumes that both of its inputs are
both known to gpiolib, so that they can do both gpio_to_irq() and
gpio_get_value() on them. There isn't any existing code that I can find
that allows you to read the states of IRQ pins, be it under gpiolib or
otherwise. And I think the reason for that is that there's no way to
actually read the states of those pins at all--- the hardware just
doesn't work that way.
Or am I missing something?
Second, if I get all this working then my rotary encoders won't be
platform devices--- they'll be openfirmware devices, which means I'll
have to do other work in the code as well. That's a subtle point I
know, but rotary-encoder's assumption that all rotary encoder devices
are also platform devices is kind of like mixing policy with
implementation, it turns out. Almost like trying to reuse a PCI driver
as a platform driver. I didn't spot how important that was until I
started hacking on the code itself...
Thanks!
b.g.
--
Bill Gatliff
bgat@billgatliff.com
^ permalink raw reply
* Re: Trouble specifying dts gpio-leds with GPIO expander chip
From: Grant Likely @ 2009-12-21 22:32 UTC (permalink / raw)
To: Bill Gatliff; +Cc: Linux/PPC Development, Anton Vorontsov
In-Reply-To: <4B2FCF40.3050204@billgatliff.com>
On Mon, Dec 21, 2009 at 12:40 PM, Bill Gatliff <bgat@billgatliff.com> wrote=
:
> Guys:
>
>
> I'm trying to come up with the right stuff for my dts file to assign a
> Linux "heartbeat" trigger to an I2C GPIO expansion device (MAX7314).
> I'm running on a platform that is very similar to the lite5200b, with
> linux-2.6.32. =A0I'm a bit new to the device tree concept, having come
> most recently from an ARM world, so please be gentle... =A0:)
>
> I have this so far:
>
> =A0 =A0 =A0 =A0soc5200@f0000000 {
> =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc5200b-immr","simple-bus";
> =A0 =A0 =A0 =A0 =A0 =A0ranges =3D <0 0xf0000000 0x0000c000>;
> =A0 =A0 =A0 =A0 =A0 =A0reg =3D <0xf0000000 0x00000100>;
> =A0 =A0 =A0 =A0 =A0 =A0bus-frequency =3D <0>; =A0 =A0 =A0 =A0// from boot=
loader
> =A0 =A0 =A0 =A0 =A0 =A0system-frequency =3D <0>; =A0 =A0 =A0 =A0// from b=
ootloader
> =A0 =A0...
> =A0 =A0 =A0 =A0 =A0 =A0i2c@3d40 {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#address-cells =3D <1>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0#size-cells =3D <0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0compatible =3D "fsl,mpc5200b-i2c","fsl,mpc=
5200-i2c","fsl-i2c";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0reg =3D <0x3d40 0x40>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupts =3D <2 16 0>;
>
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0lext20: max7314@20 {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 #gpio-cells =3D <2>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D "maxim,max7314=
","phillips,pca953x";
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <0x20>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 linux,phandle =3D <0x20>;
Drop the linux,phandle. The phandle property is generated
automatically by the device tree compiler. This could mess things up.
As Anton says, the 7314 driver doesn't register the GPIO in a way that
the of_gpio layer understands, so cannot translate. What the of_gpio
infrastructure *should* be doing is to fetch the device tree node out
of the struct device and use that path to translate device tree GPIO
references to Linux GPIO numbers. ie.
dev_archdata_get_node(gc->dev->archdata). Then as long as the device
tree node pointer is set in the struct device (which it always should
be), then OF translations for GPIO numbers should work without driver
changes.
In other words; given a device tree node pointer; loop over all the
registered GPIO devices and look for a matching node pointer in the
struct device. When a matching one is found; do the translation.
However, on further thought, this may require an additional hook added
to the gpio_chip registration to override the translation function if
necessary.
Anton, what are you thinking about to simplify OF GPIO registrations?
Bill, in the mean time you could do as Anton suggests and modify the
GPIO driver to have an of_gpio_chip allocation.
Cheers,
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* MPC8313e RDB rev A4 and rev C network throughput
From: RONETIX - Asen Dimov @ 2009-12-21 22:27 UTC (permalink / raw)
To: linuxppc-dev
Hello all,
I have made some test on network throughput with MPC8313e RDB revA4 and
revC.
Some have mentioned that CSB(Coherent System Bus) frequency or untuned
TCP/IP stack,
could cause decrease of network throughput.
**Test results
-on MPC8313e RDB revA4 with kernel 2.6.20 and u-boot 1.1.6 created with
ltib-mpc8313erdb-20070824
iperf -c 172.16.0.1 -l 2m -w 256k
-throughput is 510Mbps
-on MPC8313e RDB revA4 with kernel 2.6.23 and u-boot 1.3.0 generated
with ltib-mpc8313erdb-20081222
iperf -c 172.16.0.1 -l 2m -w 256k
-throughput is 510Mbps
-on MPC8313e RDB revC with kernel 2.6.23 (the same u-boot, kernel and
rootfs as in rev A4, only dtb file differs)
iperf -c 172.16.0.1 -l 2m -w 256k
-throughput is 360Mbps.
Have someone made such measurements? Any ideas why MPC8313e RDB revC
gives worser throughput than revA4?
** Notes
*The PC (CPU:Intel(R) Core(TM)2 Duo CPU, E8400 @ 3.00GHz;
RAM: 2x2G DDR2 @ 800Mhz ;
NIC: R8168B PCI Express Gigabit Ethernet controller, driver
8.014.00-NAPI;
OS: Fedora release 10 (Cambridge) with kernel:
2.6.27.38-170.2.113.fc10.i686.PAE #1 SMP )
*Commnads to set PC
ethtool -s eth0 autoneg off speed 1000 duplex full
ifconfig eth1 172.16.0.1/12 mtu 6000 txqueuelen 10000
echo 131071 > /proc/sys/net/core/rmem_max
echo 131071 > /proc/sys/net/core/wmem_max
echo "4096 1048576 8388608" > /proc/sys/net/ipv4/tcp_rmem
echo "4096 1048576 8388608" > /proc/sys/net/ipv4/tcp_wmem
iperf -s -l 2m -w 70k
*The MPC8313e RDB(CPU: 333Mhz; CSB: 166Mhz) revA4 and revC(using PHY not
switch)
*Commnads to set a board before using iperf
ifconfig eth1 172.16.0.1/12 mtu 6000 txqueuelen 10000
#The PC lan card is set to advertise 1000Mbps only, so the
board switches to 1000Mbps too.
echo 131071 > /proc/sys/net/core/rmem_max
echo 131071 > /proc/sys/net/core/wmem_max
echo "4096 1048576 8388608" > /proc/sys/net/ipv4/tcp_rmem
echo "4096 1048576 8388608" > /proc/sys/net/ipv4/tcp_wmem
Regards,
Asen
^ permalink raw reply
* Re: Question on MPC52xx IRQ[123] pins
From: Grant Likely @ 2009-12-21 23:16 UTC (permalink / raw)
To: Bill Gatliff; +Cc: Linux/PPC Development
In-Reply-To: <4B2FF71E.10508@billgatliff.com>
On Mon, Dec 21, 2009 at 3:30 PM, Bill Gatliff <bgat@billgatliff.com> wrote:
> gpio_get_value() on them. =A0There isn't any existing code that I can fin=
d
> that allows you to read the states of IRQ pins, be it under gpiolib or
> otherwise. =A0And I think the reason for that is that there's no way to
> actually read the states of those pins at all--- the hardware just
> doesn't work that way.
Correct. IRQ2 can only be used as IRQ2. It cannot be used a GPIO.
(Well, I suppose you *could* try to hack into the interrupt controller
driver and fetch the pin state that way; but I don't know if you can
read the state of masked out IRQ pins, and it sure would be ugly.)
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* [git pull] Please pull powerpc.git merge branch
From: Benjamin Herrenschmidt @ 2009-12-21 23:25 UTC (permalink / raw)
To: Linus Torvalds; +Cc: Andrew Morton, linuxppc-dev list, Linux Kernel list
Hi Linus !
Here are some powerpc leftovers from the merge window. Mostly fixes,
plus a few embedded things that I didn't pull from Kumar in time.
Cheers,
Ben.
The following changes since commit 55639353a0035052d9ea6cfe4dde0ac7fcbb2c9f:
Linus Torvalds (1):
Linux 2.6.33-rc1
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc.git merge
Albert Herranz (3):
powerpc/gamecube/wii: Fix off-by-one error in ugecon/usbgecko_udbg
powerpc/gc/wii: hlwd-pic: convert irq_desc.lock to raw_spinlock
powerpc/gc/wii: Remove get_irq_desc()
Alexey Dobriyan (1):
powerpc/iseries: Convert to proc_fops
Anatolij Gustschin (1):
powerpc/44x: Extend Katmai dts for ADMA and RAID56 support
Anton Blanchard (3):
powerpc/defconfigs: Reduce 64bit vmlinux by making acenic and cramfs modules
powerpc/defconfigs: Disable token ring in powerpc defconfigs
powerpc/defconfigs: Set HZ=100 on pseries and ppc64 defconfigs
Anton Vorontsov (4):
powerpc/fsl_pci: Fix P2P bridge handling for MPC83xx PCIe controllers
powerpc/83xx/suspend: Clear deep_sleeping after devices resume
powerpc/83xx/suspend: Save and restore SICRL, SICRH and SCCR
powerpc/83xx: Add power management support for MPC8315E-RDB boards
Benjamin Herrenschmidt (4):
powerpc/mm: Fix a WARN_ON() with CONFIG_DEBUG_PAGEALLOC and CONFIG_DEBUG_VM
powerpc: Fix MSI support on U4 bridge PCIe slot
Merge commit 'kumar/next' into merge
Merge commit 'jwb/next' into merge
David Daney (1):
powerpc: Convert BUG() to use unreachable()
David Gibson (1):
powerpc/mm: Fix stupid bug in subpge protection handling
Dmitry Eremin-Solenikov (4):
powerpc/83xx: mpc8349emitx - add gpio controller declarations
powerpc/83xx: mpc8349emitx - populate I2C busses in device tree
powerpc/83xx: mpc8349emitx - add OF descriptions of LocalBus devices
powerpc/83xx: mpc8349emitx - add leds-gpio binding
Felix Radensky (1):
powerpc/85xx: Workaround MPC8572/MPC8536 GPIO 1 errata.
Gautham R Shenoy (2):
powerpc/pseries: Don't panic when H_PROD fails during cpu-online.
powerpc/pseries: Make declarations of cpu_hotplug_driver_lock() ANSI compatible.
Mark Ware (1):
powerpc/cpm2_pic: Allow correct flow_types for port C interrupts
Mel Gorman (1):
powerpc/pseries: Select XICS and PCI_MSI PSERIES
Neil Campbell (1):
powerpc: Handle VSX alignment faults correctly in little-endian mode
Peter Korsgaard (1):
powerpc/gpio: support gpio_to_irq()
Robert Jennings (2):
mm: Add notifier in pageblock isolation for balloon drivers
powerpc: Make the CMM memory hotplug aware
Roel Kluin (1):
powerpc/85xx: Wrong variable returned on error
Sachin P. Sant (1):
powerpc/mm: Fix hash_utils_64.c compile errors with DEBUG enabled.
Sean MacLennan (1):
powerpc/44x: Increase warp SD buffer
Sebastian Andrzej Siewior (1):
powerpc/fsl: try to explain why the interrupt numbers are off by 16
Yang Li (2):
powerpc/mm: Fix typo of cpumask_clear_cpu()
powerpc/mpic: Fix problem that affinity is not updated
Yong Zhang (1):
powerpc/iseries: use DECLARE_COMPLETION_ONSTACK for non-constant completion
Documentation/powerpc/dts-bindings/fsl/mpic.txt | 42 ++++
arch/powerpc/boot/dts/katmai.dts | 52 ++++-
arch/powerpc/boot/dts/mpc8315erdb.dts | 27 ++
arch/powerpc/boot/dts/mpc8349emitx.dts | 82 +++++++-
arch/powerpc/boot/dts/warp.dts | 2 +-
arch/powerpc/boot/ugecon.c | 2 +-
arch/powerpc/configs/g5_defconfig | 6 +-
arch/powerpc/configs/iseries_defconfig | 4 +-
arch/powerpc/configs/ppc64_defconfig | 14 +-
arch/powerpc/configs/ppc64e_defconfig | 4 +-
arch/powerpc/configs/pseries_defconfig | 14 +-
arch/powerpc/include/asm/bug.h | 2 +-
arch/powerpc/include/asm/gpio.h | 5 +-
arch/powerpc/kernel/align.c | 63 ++++--
arch/powerpc/mm/hash_utils_64.c | 12 +-
arch/powerpc/mm/mmu_context_nohash.c | 2 +-
arch/powerpc/mm/pgtable_32.c | 2 +-
arch/powerpc/platforms/83xx/suspend.c | 52 ++++-
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 2 +-
arch/powerpc/platforms/embedded6xx/flipper-pic.c | 2 +-
arch/powerpc/platforms/embedded6xx/hlwd-pic.c | 10 +-
arch/powerpc/platforms/embedded6xx/usbgecko_udbg.c | 2 +-
arch/powerpc/platforms/iseries/mf.c | 147 +++++++-----
arch/powerpc/platforms/iseries/viopath.c | 2 +-
arch/powerpc/platforms/pseries/Kconfig | 2 +
arch/powerpc/platforms/pseries/cmm.c | 254 +++++++++++++++++++-
arch/powerpc/platforms/pseries/dlpar.c | 6 +-
arch/powerpc/platforms/pseries/smp.c | 4 +-
arch/powerpc/sysdev/cpm2_pic.c | 28 ++-
arch/powerpc/sysdev/fsl_pci.c | 8 +-
arch/powerpc/sysdev/mpc8xxx_gpio.c | 21 ++-
arch/powerpc/sysdev/mpic.c | 19 +-
arch/powerpc/sysdev/mpic_msi.c | 11 +-
arch/powerpc/sysdev/mpic_u3msi.c | 46 +++-
drivers/base/memory.c | 19 ++
include/linux/memory.h | 27 ++
mm/page_alloc.c | 57 ++++-
37 files changed, 876 insertions(+), 178 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/fsl/mpic.txt
^ permalink raw reply
* Re: [PATCH] PowerPC: const intspec pointers
From: Grant Likely @ 2009-12-22 0:11 UTC (permalink / raw)
To: Roman Fietze; +Cc: linuxppc-dev
In-Reply-To: <200912171355.34694.roman.fietze@telemotive.de>
On Thu, Dec 17, 2009 at 5:55 AM, Roman Fietze
<roman.fietze@telemotive.de> wrote:
> Hello Grant,
>
> On Tuesday 15 December 2009 20:50:05 Grant Likely wrote:
>
>> Yes, I'm using the driver in a couple of projects. =A0It works for me
>> for both RX and TX (although TX+DMA has been troublesome).
>
> That's what I found out.
>
>> The test driver on the other hand is pretty poor code. =A0Don't expect
>> much from it other than some hints. =A0There's a reason I didn't merge
>> that chunk.
>
> I brought it up to speed before using it.
>
>> Yes, please post the patches and cc: me. I'll review, test, and make
>> comments.
>
> I hope it's ok that I've copied them to my web space instead of
> providing patches in a mail. The URL is:
>
> =A0http://www.fietze-home.de/telemotive/linux-2.6-telemotive-mpc.git
"Access Forbidden!"
It is easier for me though if you post them to the list. Then I can
just hit "reply to all" and make comments on the code.
Cheers,
g.
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply
* Re: [PATCH] powerpc: update ibm,client-architecture
From: Tony Breeds @ 2009-12-22 0:18 UTC (permalink / raw)
To: Joel Schopp; +Cc: linuxppc-dev
In-Reply-To: <4B2FBCD1.7080306@austin.ibm.com>
On Mon, Dec 21, 2009 at 12:22:09PM -0600, Joel Schopp wrote:
> 4 is the new 2. Since the actual threads per core is unknown at
> this point in boot you have to be conservative and go with the
> maximum number of any processor. See page 4 of these charts:
> http://www.power.org/events/powercon09/taiwan09/IBM_Overview_POWER7.pdf
Sure P7 /can/ be 4-way SMT, but consider the case where you know you have 128
threads so you set NR_CPUS to 128, then you boot with "max cores" of 32, so you
lose half of your threads. I guess that's only a problem when you build your
own kernels, distros are probably setting NR_CPUS high enough to cover all SMT2
systems anyway.
I guess if the patch only set the "max cores" and described why, I'd (FWIW :D)
be more comfortable.
Yours Tony
^ permalink raw reply
* Re: [PATCH] powerpc: update ibm,client-architecture
From: Michael Neuling @ 2009-12-22 0:33 UTC (permalink / raw)
To: Joel Schopp; +Cc: linuxppc-dev
In-Reply-To: <4B2FF35E.9020101@austin.ibm.com>
>>> OK.
>>>
>>>>> + W(NR_CPUS/4), /* max cores supported */
>>>>>
>>
>> FYI reading the PAPR, this comment should technically be "max 'cpu'
>> nodes presented".
>>
>I applied a disambiguation filter to the comment since cpus can mean a
>lot of things these days ( ie hardware threads, cores, chips) , but a
>core is a core.
I think you applied ambiguation filter actually :-)
The PAPR is clear and perfectly understandable in this context. It's
"OF device tree nodes of type 'cpu'".
>>> 4 is the new 2.
>>>
>>
>> I'd still be asking what 2 is. It's needs a #define to make clearer
>> what you are doing.
>>
>>
>I'll add a #define
>>> Since you don't know the actual threads per core at
>>> this point in boot you have to be conservative and go with the maximum
>>> number of any processor. See page 4 of these charts:
>>> http://www.power.org/events/powercon09/taiwan09/IBM_Overview_POWER7.pdf
>>>
>>
>> I don't think hard wiring 4 in here is right. If we are booting a
>> machine with SMT2, we will put only half the number of cores that we can
>> handle in this field. This is going to break a lot of machines where
>> people have compiled with NR_CPUS = thread number.
>>
>> I think you just want to put NR_CPUS here.
>>
>>
>It's a bad interface. No matter what you choose there will be a
>downside. 1) If you choose NR_CPUS, the best case of how many you could
>boot without SMT, then when you boot with SMT2 or SMT4 you can get
>assigned more cpus than you can boot. 2) If you choose NR_CPUS/4, the
>worst case of how many you could boot, and you get a large machine with
>SMT2 or SMT1 you might have said you support less cpus than you actually
>do and thus not boot all the cpus. So no matter what you choose you
>could be not booting cpus in some theoretical scenario.
Sure but 1) is how Linux behaves now (we can always get more cpus than
we can handle) and 2) is what you are changing it to. 2) is going to
break existing users.
Anyway, if you are intending to change functionality like this, please
make it clear in the check in comment.
Mikey
^ permalink raw reply
* Re: [PATCH] powerpc: update ibm,client-architecture
From: Tony Breeds @ 2009-12-22 0:58 UTC (permalink / raw)
To: Joel Schopp; +Cc: linuxppc-dev, Michael Neuling
In-Reply-To: <4B2FF35E.9020101@austin.ibm.com>
On Mon, Dec 21, 2009 at 04:14:54PM -0600, Joel Schopp wrote:
> It's a bad interface. No matter what you choose there will be a
> downside. 1) If you choose NR_CPUS, the best case of how many you
> could boot without SMT, then when you boot with SMT2 or SMT4 you can
> get assigned more cpus than you can boot. 2) If you choose
> NR_CPUS/4, the worst case of how many you could boot, and you get a
> large machine with SMT2 or SMT1 you might have said you support less
> cpus than you actually do and thus not boot all the cpus. So no
> matter what you choose you could be not booting cpus in some
> theoretical scenario.
We're far enough through boot to determine the threading model, so you /could/
work out what SMT we're in and divide NR_CPUS by that and give that to firmware.
Yours Tony
^ permalink raw reply
* [PATCH v2 1/3] powerpc: Use scripts/mkuboot.sh instead of 'mkimage'
From: Peter Tyser @ 2009-12-22 1:50 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Peter Tyser, linux-kbuild
In-Reply-To: <1261446643-21714-1-git-send-email-ptyser@xes-inc.com>
mkuboot.sh provides a basic wrapper for the 'mkimage' utility. Using
mkuboot.sh provides clearer error reporting and allows a toolchain to
use its own 'mkimage' executable specified by ${CROSS_COMPILE}mkimage.
Additionally, this brings PowerPC in line with other architectures
which already call mkimage via mkuboot.sh.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
arch/powerpc/boot/wrapper | 7 +++++--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 390512a..f4594ed 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -43,6 +43,9 @@ gzip=.gz
# cross-compilation prefix
CROSS=
+# mkimage wrapper script
+MKIMAGE=$srctree/scripts/mkuboot.sh
+
# directory for object and other files used by this script
object=arch/powerpc/boot
objbin=$object
@@ -267,7 +270,7 @@ membase=`${CROSS}objdump -p "$kernel" | grep -m 1 LOAD | awk '{print $7}'`
case "$platform" in
uboot)
rm -f "$ofile"
- mkimage -A ppc -O linux -T kernel -C gzip -a $membase -e $membase \
+ ${MKIMAGE} -A ppc -O linux -T kernel -C gzip -a $membase -e $membase \
$uboot_version -d "$vmz" "$ofile"
if [ -z "$cacheit" ]; then
rm -f "$vmz"
@@ -327,7 +330,7 @@ coff)
;;
cuboot*)
gzip -f -9 "$ofile"
- mkimage -A ppc -O linux -T kernel -C gzip -a "$base" -e "$entry" \
+ ${MKIMAGE} -A ppc -O linux -T kernel -C gzip -a "$base" -e "$entry" \
$uboot_version -d "$ofile".gz "$ofile"
;;
treeboot*)
--
1.6.2.1
^ permalink raw reply related
* [PATCH v2 0/3] powerpc: Add support for FIT uImages
From: Peter Tyser @ 2009-12-22 1:50 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Peter Tyser, linux-kbuild
These patches add support for creating the "new" FIT uImage type
that U-Boot can use. Additional info about FIT images can be
found in the doc/uImage.FIT/ directory of the U-Boot source.
Here's a link to a howto which gives an overview of the format:
http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=blob;f=doc/uImage.FIT/howto.txt;h=8065e9e1d8d4d65a9b5fe0fce08d3709183d0ee4;hb=HEAD
I've only added support for PowerPC, but the arm, avr32, blackfin,
and sh arches could use the same framework in theory. The change
is especially useful on PowerPC since it creates 1 FIT uImage that
combines the functionality of an "old" uImage format, a device
tree blob, and possibly a ramdisk.
Changes since v1:
- Add 'dts-v1' header to scripts/mkits.sh output
- Don't strip leading 0x from dts addresses
- Default to using kernel dtc if the user doesn't have it in their path
Peter Tyser (3):
powerpc: Use scripts/mkuboot.sh instead of 'mkimage'
powerpc: Add support for creating FIT uImages
powerpc: Add support for ram filesystems in FIT uImages
arch/powerpc/Makefile | 4 +-
arch/powerpc/boot/.gitignore | 1 +
arch/powerpc/boot/Makefile | 8 ++-
arch/powerpc/boot/wrapper | 43 +++++++++++--
scripts/mkits.sh | 141 ++++++++++++++++++++++++++++++++++++++++++
5 files changed, 190 insertions(+), 7 deletions(-)
create mode 100755 scripts/mkits.sh
^ permalink raw reply
* [PATCH v2 2/3] powerpc: Add support for creating FIT uImages
From: Peter Tyser @ 2009-12-22 1:50 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Peter Tyser, linux-kbuild
In-Reply-To: <1261446643-21714-1-git-send-email-ptyser@xes-inc.com>
Recent U-Boot versions support booting a Flattened Image Tree (FIT)
image format. The FIT uImage format uses a tree structure to describe a
kernel image as well as supporting device tree blobs, ramdisks, etc.
The 'mkimage' and 'dtc' utilities convert this tree description into a
binary blob that bootloaders such as U-Boot can execute.
This patch adds support for automatically creating a U-Boot FIT image
using the "make uImage.fit.<boardname>" command where <boardname> is
one of arch/powerpc/boot/dts/<boardname>.dts. The resulting
arch/powerpc/boot/uImage.fit.<boardname> file will contain a kernel
image as well as a device tree blob. U-Boot versions compiled with FIT
support can directly boot this image using the "bootm" command.
Additional information about the FIT format and its uses can be found in
doc/uImage.FIT/howto.txt of U-Boot's source tree.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
Changes since v1:
- Add 'dts-v1' header to scripts/mkits.sh output
- Don't strip leading 0x from dts addresses
- Default to using kernel dtc if the user doesn't have it in their path
arch/powerpc/Makefile | 4 +-
arch/powerpc/boot/.gitignore | 1 +
arch/powerpc/boot/Makefile | 5 ++-
arch/powerpc/boot/wrapper | 20 +++++++-
scripts/mkits.sh | 111 ++++++++++++++++++++++++++++++++++++++++++
5 files changed, 138 insertions(+), 3 deletions(-)
create mode 100755 scripts/mkits.sh
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index 1a54a3b..459aed5 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -158,7 +158,8 @@ drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
# Default to zImage, override when needed
all: zImage
-BOOT_TARGETS = zImage zImage.initrd uImage zImage% dtbImage% treeImage.% cuImage.% simpleImage.%
+BOOT_TARGETS = zImage zImage.initrd uImage uImage.fit.% zImage% dtbImage% \
+ treeImage.% cuImage.% simpleImage.%
PHONY += $(BOOT_TARGETS)
@@ -185,6 +186,7 @@ define archhelp
@echo '* zImage - Build default images selected by kernel config'
@echo ' zImage.* - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'
@echo ' uImage - U-Boot native image format'
+ @echo ' uImage.fit.<dt> - U-Boot Flattened Image Tree image format'
@echo ' cuImage.<dt> - Backwards compatible U-Boot image for older'
@echo ' versions which do not support device trees'
@echo ' dtbImage.<dt> - zImage with an embedded device tree blob'
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index 3d80c3e..a443f1c 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -19,6 +19,7 @@ kernel-vmlinux.strip.c
kernel-vmlinux.strip.gz
mktree
uImage
+uImage.fit.*
cuImage.*
dtbImage.*
treeImage.*
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index bb2465b..e56ec21 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -310,6 +310,9 @@ $(obj)/zImage.iseries: vmlinux
$(obj)/uImage: vmlinux $(wrapperbits)
$(call if_changed,wrap,uboot)
+$(obj)/uImage.fit.%: vmlinux $(obj)/%.dtb $(wrapperbits)
+ $(call if_changed,wrap,uboot.fit,,$(obj)/$*.dtb)
+
$(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
@@ -349,7 +352,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
# anything not in $(targets)
clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
- zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
+ uImage.* zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
zImage.iseries zImage.miboot zImage.pmac zImage.pseries \
simpleImage.* otheros.bld *.dtb
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index f4594ed..1f35b66 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -46,6 +46,9 @@ CROSS=
# mkimage wrapper script
MKIMAGE=$srctree/scripts/mkuboot.sh
+# script to generate an .its file for uImage.fit.* images
+MKITS=$srctree/scripts/mkits.sh
+
# directory for object and other files used by this script
object=arch/powerpc/boot
objbin=$object
@@ -157,7 +160,7 @@ coff)
lds=$object/zImage.coff.lds
link_address='0x500000'
;;
-miboot|uboot)
+miboot|uboot|uboot.fit)
# miboot and U-boot want just the bare bits, not an ELF binary
ext=bin
objflags="-O binary"
@@ -277,6 +280,21 @@ uboot)
fi
exit 0
;;
+uboot.fit)
+ rm -f "$ofile"
+ ${MKITS} -A ppc -C gzip -a $membase -e $membase -v $version \
+ -d "$srctree/$dtb" -k "$srctree/$vmz" -o "$object/uImage.its"
+
+ # mkimage calls dtc for FIT images so use kernel dtc if necessary
+ export PATH=$PATH:$srctree/scripts/dtc
+
+ ${MKIMAGE} -f "$object/uImage.its" "$ofile"
+ rm "$object/uImage.its"
+ if [ -z "$cacheit" ]; then
+ rm -f "$vmz"
+ fi
+ exit 0
+ ;;
esac
addsec() {
diff --git a/scripts/mkits.sh b/scripts/mkits.sh
new file mode 100755
index 0000000..fae43dd
--- /dev/null
+++ b/scripts/mkits.sh
@@ -0,0 +1,111 @@
+#!/bin/bash
+#
+# Licensed under the terms of the GNU GPL License version 2 or later.
+#
+# Author: Peter Tyser <ptyser@xes-inc.com>
+#
+# U-Boot firmware supports the booting of images in the Flattened Image
+# Tree (FIT) format. The FIT format uses a device tree structure to
+# describe a kernel image, device tree blob, ramdisk, etc. This script
+# creates an Image Tree Source (.its file) which can be passed to the
+# 'mkimage' utility to generate an Image Tree Blob (.itb file). The .itb
+# file can then be booted by U-Boot (or other bootloaders which support
+# FIT images). See doc/uImage.FIT/howto.txt in U-Boot source code for
+# additional information on FIT images.
+#
+
+usage() {
+ echo "Usage: `basename $0` -A arch -C comp -a addr -e entry" \
+ "-v version -k kernel [-d dtb] -o its_file"
+ echo -e "\t-A ==> set architecture to 'arch'"
+ echo -e "\t-C ==> set compression type 'comp'"
+ echo -e "\t-a ==> set load address to 'addr' (hex)"
+ echo -e "\t-e ==> set entry point to 'entry' (hex)"
+ echo -e "\t-v ==> set kernel version to 'version'"
+ echo -e "\t-k ==> include kernel image 'kernel'"
+ echo -e "\t-d ==> include Device Tree Blob 'dtb'"
+ echo -e "\t-o ==> create output file 'its_file'"
+ exit 1
+}
+
+while getopts ":A:C:a:d:e:k:o:v:" OPTION
+do
+ case $OPTION in
+ A ) ARCH=$OPTARG;;
+ C ) COMPRESS=$OPTARG;;
+ a ) LOAD_ADDR=$OPTARG;;
+ d ) DTB=$OPTARG;;
+ e ) ENTRY_ADDR=$OPTARG;;
+ k ) KERNEL=$OPTARG;;
+ o ) OUTPUT=$OPTARG;;
+ v ) VERSION=$OPTARG;;
+ * ) echo "Invalid option passed to '$0' (options:$@)"
+ usage;;
+ esac
+done
+
+# Make sure user entered all required parameters
+if [ -z "${ARCH}" ] || [ -z "${COMPRESS}" ] || [ -z "${LOAD_ADDR}" ] || \
+ [ -z "${ENTRY_ADDR}" ] || [ -z "${VERSION}" ] || [ -z "${KERNEL}" ] || \
+ [ -z "${OUTPUT}" ]; then
+ usage
+fi
+
+# Create a default, fully populated DTS file
+DATA="/dts-v1/;
+
+/ {
+ description = \"Linux kernel ${VERSION}\";
+ #address-cells = <1>;
+
+ images {
+ kernel@1 {
+ description = \"Linux Kernel ${VERSION}\";
+ data = /incbin/(\"${KERNEL}\");
+ type = \"kernel\";
+ arch = \"${ARCH}\";
+ os = \"linux\";
+ compression = \"${COMPRESS}\";
+ load = <${LOAD_ADDR}>;
+ entry = <${ENTRY_ADDR}>;
+ hash@1 {
+ algo = \"crc32\";
+ };
+ hash@2 {
+ algo = \"sha1\";
+ };
+ };
+
+ fdt@1 { /* start fdt */
+ description = \"Flattened Device Tree blob\";
+ data = /incbin/(\"${DTB}\");
+ type = \"flat_dt\";
+ arch = \"${ARCH}\";
+ compression = \"none\";
+ hash@1 {
+ algo = \"crc32\";
+ };
+ hash@2 {
+ algo = \"sha1\";
+ };
+ }; /* end fdt */
+
+ configurations {
+ default = \"config@1\";
+ config@1 {
+ description = \"Default Linux kernel\";
+ kernel = \"kernel@1\";
+ fdt = \"fdt@1\";
+ ramdisk = \"ramdisk@1\";
+ };
+ };
+};"
+
+# Conditionally strip fdt information out of tree
+if [ -z "${DTB}" ]; then
+ DATA=`echo "$DATA" | sed '/start fdt/,/end fdt/d'`
+ DATA=`echo "$DATA" | sed '/fdt/d'`
+fi
+
+# Write .its file to disk
+echo "$DATA" > ${OUTPUT}
--
1.6.2.1
^ permalink raw reply related
* [PATCH v2 3/3] powerpc: Add support for ram filesystems in FIT uImages
From: Peter Tyser @ 2009-12-22 1:50 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Peter Tyser, linux-kbuild
In-Reply-To: <1261446643-21714-1-git-send-email-ptyser@xes-inc.com>
The PowerPC architecture has the ability to embed the ramdisk located
at arch/powerpc/boot/ramdisk.image.gz into a bootable kernel image. If
the bootable kernel is in the Flattened Image Tree (FIT) format, the
ramdisk should be a node in the tree instead of being embedded directly
in the kernel executable.
A FIT uImage with a ram filesystem can be generated using the command:
"make uImage.fit.initrd.<boardname>" where <boardname> is one of
arch/powerpc/boot/dts/<boardname>.dts. The command will generate a FIT
uImage at arch/powerpc/boot/uImage.fit.initrd.<boardname> that contains
a kernel image, device tree blob, and a ram filesystem.
The ramdisk at arch/powerpc/boot/ramdisk.image.gz can either be an older
style "ramdisk" or a newer "ramfs" gzipped cpio archive.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
---
Changes since v1:
- Don't strip leading 0x from dts ramdisk address
arch/powerpc/boot/Makefile | 3 +++
arch/powerpc/boot/wrapper | 20 ++++++++++++++++----
scripts/mkits.sh | 34 ++++++++++++++++++++++++++++++++--
3 files changed, 51 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index e56ec21..c2a6591 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -313,6 +313,9 @@ $(obj)/uImage: vmlinux $(wrapperbits)
$(obj)/uImage.fit.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,uboot.fit,,$(obj)/$*.dtb)
+$(obj)/uImage.fit.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
+ $(call if_changed,wrap,uboot.fit,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
+
$(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
$(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index 1f35b66..9ccaef7 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -270,6 +270,9 @@ fi
# physical offset of kernel image
membase=`${CROSS}objdump -p "$kernel" | grep -m 1 LOAD | awk '{print $7}'`
+# Size of uncompressed kernel is needed to calculate ramdisk location in RAM
+kernsize=`${CROSS}objdump -p "$kernel" | grep -m 1 rwx | awk '{print $4}'`
+
case "$platform" in
uboot)
rm -f "$ofile"
@@ -282,8 +285,14 @@ uboot)
;;
uboot.fit)
rm -f "$ofile"
- ${MKITS} -A ppc -C gzip -a $membase -e $membase -v $version \
- -d "$srctree/$dtb" -k "$srctree/$vmz" -o "$object/uImage.its"
+ if [ -n "$initrd" ]; then
+ ${MKITS} -A ppc -C gzip -a $membase -e $membase -v $version \
+ -d "$srctree/$dtb" -k "$srctree/$vmz" -r "$srctree/$initrd" \
+ -l $kernsize -o "$object/uImage.its"
+ else
+ ${MKITS} -A ppc -C gzip -a $membase -e $membase -v $version \
+ -d "$srctree/$dtb" -k "$srctree/$vmz" -o "$object/uImage.its"
+ fi
# mkimage calls dtc for FIT images so use kernel dtc if necessary
export PATH=$PATH:$srctree/scripts/dtc
@@ -308,8 +317,11 @@ if [ -z "$cacheit" ]; then
rm -f "$vmz"
fi
-if [ -n "$initrd" ]; then
- addsec $tmp "$initrd" $isection
+# FIT images have the initrd in the image tree structure
+if [ "$platform" != "uboot.fit" ]; then
+ if [ -n "$initrd" ]; then
+ addsec $tmp "$initrd" $isection
+ fi
fi
if [ -n "$dtb" ]; then
diff --git a/scripts/mkits.sh b/scripts/mkits.sh
index fae43dd..ffcf2c4 100755
--- a/scripts/mkits.sh
+++ b/scripts/mkits.sh
@@ -16,7 +16,8 @@
usage() {
echo "Usage: `basename $0` -A arch -C comp -a addr -e entry" \
- "-v version -k kernel [-d dtb] -o its_file"
+ "-v version -k kernel [-d dtb] [-r ramfs -l ramfs_addr]" \
+ "-o its_file"
echo -e "\t-A ==> set architecture to 'arch'"
echo -e "\t-C ==> set compression type 'comp'"
echo -e "\t-a ==> set load address to 'addr' (hex)"
@@ -24,11 +25,13 @@ usage() {
echo -e "\t-v ==> set kernel version to 'version'"
echo -e "\t-k ==> include kernel image 'kernel'"
echo -e "\t-d ==> include Device Tree Blob 'dtb'"
+ echo -e "\t-r ==> include initrd/initramfs 'ramfs'"
+ echo -e "\t-l ==> load initrd/initramfs at 'ramfs_addr'"
echo -e "\t-o ==> create output file 'its_file'"
exit 1
}
-while getopts ":A:C:a:d:e:k:o:v:" OPTION
+while getopts ":A:C:a:d:e:k:l:o:r:v:" OPTION
do
case $OPTION in
A ) ARCH=$OPTARG;;
@@ -37,7 +40,9 @@ do
d ) DTB=$OPTARG;;
e ) ENTRY_ADDR=$OPTARG;;
k ) KERNEL=$OPTARG;;
+ l ) RAMFS_ADDR=$OPTARG;;
o ) OUTPUT=$OPTARG;;
+ r ) RAMFS=$OPTARG;;
v ) VERSION=$OPTARG;;
* ) echo "Invalid option passed to '$0' (options:$@)"
usage;;
@@ -49,6 +54,8 @@ if [ -z "${ARCH}" ] || [ -z "${COMPRESS}" ] || [ -z "${LOAD_ADDR}" ] || \
[ -z "${ENTRY_ADDR}" ] || [ -z "${VERSION}" ] || [ -z "${KERNEL}" ] || \
[ -z "${OUTPUT}" ]; then
usage
+elif [ -n "${RAMFS}" ] && [ -z "${RAMFS_ADDR}" ]; then
+ usage
fi
# Create a default, fully populated DTS file
@@ -90,6 +97,23 @@ DATA="/dts-v1/;
};
}; /* end fdt */
+ ramdisk@1 { /* start ramdisk */
+ description = \"ramdisk\";
+ data = /incbin/(\"${RAMFS}\");
+ type = \"ramdisk\";
+ arch = \"${ARCH}\";
+ os = \"linux\";
+ load = <${RAMFS_ADDR}>;
+ compression = \"none\";
+ hash@1 {
+ algo = \"crc32\";
+ };
+ hash@2 {
+ algo = \"sha1\";
+ };
+ }; /* end ramdisk */
+ };
+
configurations {
default = \"config@1\";
config@1 {
@@ -101,6 +125,12 @@ DATA="/dts-v1/;
};
};"
+# Conditionally strip ramfs information out of tree
+if [ -z "${RAMFS}" ]; then
+ DATA=`echo "$DATA" | sed '/start ramdisk/,/end ramdisk/d'`
+ DATA=`echo "$DATA" | sed '/ramdisk/d'`
+fi
+
# Conditionally strip fdt information out of tree
if [ -z "${DTB}" ]; then
DATA=`echo "$DATA" | sed '/start fdt/,/end fdt/d'`
--
1.6.2.1
^ permalink raw reply related
* Re: [PATCH 5/6 v5] CPU probe/release files
From: Nathan Fontenot @ 2009-12-22 2:17 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Andreas Schwab, linux-kernel
In-Reply-To: <1261212415.2173.94.camel@pasglop>
Benjamin Herrenschmidt wrote:
> On Fri, 2009-12-18 at 15:33 +0100, Andreas Schwab wrote:
>> Nathan Fontenot <nfont@austin.ibm.com> writes:
>>
>>> Index: powerpc/arch/powerpc/Kconfig
>>> ===================================================================
>>> --- powerpc.orig/arch/powerpc/Kconfig 2009-10-28 15:21:47.000000000 -0500
>>> +++ powerpc/arch/powerpc/Kconfig 2009-10-28 15:21:53.000000000 -0500
>>> @@ -320,6 +320,10 @@
>>>
>>> Say N if you are unsure.
>>>
>>> +config ARCH_CPU_PROBE_RELEASE
>>> + def_bool y
>>> + depends on HOTPLUG_CPU
>>> +
>> That does not work.
>>
>> drivers/built-in.o: In function `.store_online':
>> cpu.c:(.ref.text+0xf5c): undefined reference to `.cpu_hotplug_driver_lock'
>> cpu.c:(.ref.text+0xfc8): undefined reference to `.cpu_hotplug_driver_unlock'
>> make: *** [.tmp_vmlinux1] Error 1
>>
>> cpu_hotplug_driver_lock is only defined on pseries, but HOTPLUG_CPU is
>> also defined on pmac.
>
> Well, the stuff was merged ... so we need to fix it.
>
> Nathan, the problem is that the above wlil define ARCH_CPU_PROBE_RELEASE
> for any powerpc platform that has HOTPLUG_CPU. So a kernel that doesn't
> have pSeries support but has hotplug CPU will have a problem, though for
> some reason none of my test configs triggered it (I'll have to check why
> next week).
>
> The right approach here is to have cpu_hotplug_driver_lock go through
> ppc_md. I suppose, along with some of the other CPU hotplug platform
> specific bits.
>
Sounds good to me, I'll get a patch together.
-Nathan Fontenot
^ permalink raw reply
* Re: [PATCH v2 2/3] powerpc: Add support for creating FIT uImages
From: Olof Johansson @ 2009-12-22 3:48 UTC (permalink / raw)
To: Peter Tyser; +Cc: linuxppc-dev, linux-kbuild
In-Reply-To: <1261446643-21714-3-git-send-email-ptyser@xes-inc.com>
Hi,
On Mon, Dec 21, 2009 at 07:50:42PM -0600, Peter Tyser wrote:
> diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
> index bb2465b..e56ec21 100644
> --- a/arch/powerpc/boot/Makefile
> +++ b/arch/powerpc/boot/Makefile
> @@ -310,6 +310,9 @@ $(obj)/zImage.iseries: vmlinux
> $(obj)/uImage: vmlinux $(wrapperbits)
> $(call if_changed,wrap,uboot)
>
> +$(obj)/uImage.fit.%: vmlinux $(obj)/%.dtb $(wrapperbits)
> + $(call if_changed,wrap,uboot.fit,,$(obj)/$*.dtb)
> +
> $(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
> $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
>
> @@ -349,7 +352,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
>
> # anything not in $(targets)
> clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
> - zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
> + uImage.* zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
Please no. It's not entirely uncommon that I will save a "known good"
binary in the build tree for a while, by copying it aside with a different
suffix. That'd give me one very big surprise in this case.
-Olof
^ permalink raw reply
* RE: MPC8313e RDB rev A4 and rev C network throughput
From: Liu Dave-R63238 @ 2009-12-22 3:47 UTC (permalink / raw)
To: RONETIX - Asen Dimov, linuxppc-dev
In-Reply-To: <4B2FF66E.7000209@ronetix.at>
One possible cause is the two board has different RCW.
So that the freq of core/csb/.... Is different.=20
> -----Original Message-----
> From:=20
> linuxppc-dev-bounces+daveliu=3Dfreescale.com@lists.ozlabs.org=20
> [mailto:linuxppc-dev-bounces+daveliu=3Dfreescale.com@lists.ozlab
> s.org] On Behalf Of RONETIX - Asen Dimov
> Sent: Tuesday, December 22, 2009 6:28 AM
> To: linuxppc-dev@lists.ozlabs.org
> Subject: MPC8313e RDB rev A4 and rev C network throughput
>=20
> Hello all,
> I have made some test on network throughput with MPC8313e RDB=20
> revA4 and revC.
> Some have mentioned that CSB(Coherent System Bus) frequency=20
> or untuned TCP/IP stack, could cause decrease of network throughput.
>=20
> **Test results
>=20
> -on MPC8313e RDB revA4 with kernel 2.6.20 and u-boot 1.1.6=20
> created with
> ltib-mpc8313erdb-20070824
> iperf -c 172.16.0.1 -l 2m -w 256k -throughput is 510Mbps
>=20
>=20
> -on MPC8313e RDB revA4 with kernel 2.6.23 and u-boot 1.3.0 generated=20
> with ltib-mpc8313erdb-20081222
> iperf -c 172.16.0.1 -l 2m -w 256k
> -throughput is 510Mbps
>=20
>=20
> -on MPC8313e RDB revC with kernel 2.6.23 (the same u-boot, kernel and=20
> rootfs as in rev A4, only dtb file differs)
> iperf -c 172.16.0.1 -l 2m -w 256k
> -throughput is 360Mbps.
>=20
>=20
> Have someone made such measurements? Any ideas why MPC8313e RDB revC=20
> gives worser throughput than revA4?
>=20
> ** Notes
> *The PC (CPU:Intel(R) Core(TM)2 Duo CPU, E8400 @ 3.00GHz;
> RAM: 2x2G DDR2 @ 800Mhz ;
> NIC: R8168B PCI Express Gigabit Ethernet controller, driver=20
> 8.014.00-NAPI;
> OS: Fedora release 10 (Cambridge) with kernel:=20
> 2.6.27.38-170.2.113.fc10.i686.PAE #1 SMP )
> *Commnads to set PC
>=20
> ethtool -s eth0 autoneg off speed 1000 duplex full
> ifconfig eth1 172.16.0.1/12 mtu 6000 txqueuelen 10000
> echo 131071 > /proc/sys/net/core/rmem_max
> echo 131071 > /proc/sys/net/core/wmem_max
> echo "4096 1048576 8388608" > /proc/sys/net/ipv4/tcp_rmem
> echo "4096 1048576 8388608" > /proc/sys/net/ipv4/tcp_wmem
> iperf -s -l 2m -w 70k
>=20
>=20
> *The MPC8313e RDB(CPU: 333Mhz; CSB: 166Mhz) revA4 and=20
> revC(using PHY not=20
> switch)
> *Commnads to set a board before using iperf
>=20
> ifconfig eth1 172.16.0.1/12 mtu 6000 txqueuelen 10000
> #The PC lan card is set to advertise 1000Mbps only, so the=20
> board switches to 1000Mbps too.
> echo 131071 > /proc/sys/net/core/rmem_max
> echo 131071 > /proc/sys/net/core/wmem_max
> echo "4096 1048576 8388608" > /proc/sys/net/ipv4/tcp_rmem
> echo "4096 1048576 8388608" > /proc/sys/net/ipv4/tcp_wmem
>=20
> Regards,
> Asen
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>=20
>=20
^ permalink raw reply
* Re: [PATCH v2 2/3] powerpc: Add support for creating FIT uImages
From: Peter Tyser @ 2009-12-22 4:50 UTC (permalink / raw)
To: Olof Johansson; +Cc: linuxppc-dev, linux-kbuild
In-Reply-To: <20091222034819.GA24012@lixom.net>
Hi Olof,
On Mon, 2009-12-21 at 21:48 -0600, Olof Johansson wrote:
> Hi,
>
> On Mon, Dec 21, 2009 at 07:50:42PM -0600, Peter Tyser wrote:
> > diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
> > index bb2465b..e56ec21 100644
> > --- a/arch/powerpc/boot/Makefile
> > +++ b/arch/powerpc/boot/Makefile
> > @@ -310,6 +310,9 @@ $(obj)/zImage.iseries: vmlinux
> > $(obj)/uImage: vmlinux $(wrapperbits)
> > $(call if_changed,wrap,uboot)
> >
> > +$(obj)/uImage.fit.%: vmlinux $(obj)/%.dtb $(wrapperbits)
> > + $(call if_changed,wrap,uboot.fit,,$(obj)/$*.dtb)
> > +
> > $(obj)/cuImage.initrd.%: vmlinux $(obj)/%.dtb $(wrapperbits)
> > $(call if_changed,wrap,cuboot-$*,,$(obj)/$*.dtb,$(obj)/ramdisk.image.gz)
> >
> > @@ -349,7 +352,7 @@ install: $(CONFIGURE) $(addprefix $(obj)/, $(image-y))
> >
> > # anything not in $(targets)
> > clean-files += $(image-) $(initrd-) cuImage.* dtbImage.* treeImage.* \
> > - zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
> > + uImage.* zImage zImage.initrd zImage.chrp zImage.coff zImage.holly \
>
> Please no. It's not entirely uncommon that I will save a "known good"
> binary in the build tree for a while, by copying it aside with a different
> suffix. That'd give me one very big surprise in this case.
You're right that it'd probably be better if the clean pattern was
uImage.fit.* to be more restrictive, but your concern would still exist,
as it does for a number of other image formats already (cuImage.*,
simpleImage.*, etc). I can't think of a way to work around that issue
though... Any ideas? Don't keep backup images in arch/powerpc/boot?:)
Thanks for the feedback,
Peter
^ permalink raw reply
* Re: [PATCH 0/13] MPC5200B LocalPlus Platform Driver Changes
From: Roman Fietze @ 2009-12-22 6:55 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <fa686aa40912211611i2469b15p175511fd7ead4d49@mail.gmail.com>
Hello Grant,
On Tuesday 22 December 2009 01:11:30 Grant Likely wrote:
> "Access Forbidden!"
git-fetch should have worked. It's a git tree prepared using
git-update-server-info.
> It is easier for me though if you post them to the list. Then I can
> just hit "reply to all" and make comments on the code.
Ok, I'll do so. I hope I've understood what
http://www.kernel.org/pub/linux/docs/lkml/ says about creating
suitable patches for mailing lists.
Patch description:
This is a series of patches on top of the benh next branch modifying
the platform LocalPlus driver for the MPC5200B. This includes
formatting changes in the first step, switching to a structure
describing the SCLPC registers, making DMA work, making unloading the
module work and so on.
Roman
=2D-=20
Roman Fietze Telemotive AG B=FCro M=FChlhausen
Breitwiesen 73347 M=FChlhausen
Tel.: +49(0)7335/18493-45 http://www.telemotive.de
^ permalink raw reply
* [PATCH 01/13] powerpc/5200: LocalPlus driver: fix indentation and white space
From: Roman Fietze @ 2009-12-22 6:57 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <200912220755.09756.roman.fietze@telemotive.de>
Signed-off-by: Roman Fietze <roman.fietze@telemotive.de>
=2D--
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 18 +++++++++---------
1 files changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/p=
latforms/52xx/mpc52xx_lpbfifo.c
index 929d017..4c84aa5 100644
=2D-- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
@@ -165,7 +165,7 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo=
_request *req)
=20
bit_fields =3D req->cs << 24 | 0x000008;
if (!write)
=2D bit_fields |=3D 0x010000; /* read mode */
+ bit_fields |=3D 0x010000; /* read mode */
out_be32(lpbfifo.regs + LPBFIFO_REG_CONTROL, bit_fields);
=20
/* Kick it off */
@@ -279,7 +279,7 @@ static irqreturn_t mpc52xx_lpbfifo_irq(int irq, void *d=
ev_id)
else
do_callback =3D 1;
=20
=2D out:
+out:
/* Clear the IRQ */
out_8(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS, 0x01);
=20
@@ -379,11 +379,11 @@ void mpc52xx_lpbfifo_poll(void)
int write =3D req->flags & MPC52XX_LPBFIFO_FLAG_WRITE;
=20
/*
=2D * For more information, see comments on the "Fat Lady"=20
+ * For more information, see comments on the "Fat Lady"
*/
if (dma && write)
mpc52xx_lpbfifo_irq(0, NULL);
=2D else=20
+ else
mpc52xx_lpbfifo_bcom_irq(0, NULL);
}
EXPORT_SYMBOL(mpc52xx_lpbfifo_poll);
@@ -491,12 +491,12 @@ mpc52xx_lpbfifo_probe(struct of_device *op, const str=
uct of_device_id *match)
lpbfifo.dev =3D &op->dev;
return 0;
=20
=2D err_bcom_tx:
+err_bcom_tx:
free_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task), &lpbfifo);
=2D err_bcom_rx_irq:
+err_bcom_rx_irq:
bcom_gen_bd_rx_release(lpbfifo.bcom_rx_task);
=2D err_bcom_rx:
=2D err_irq:
+err_bcom_rx:
+err_irq:
iounmap(lpbfifo.regs);
lpbfifo.regs =3D NULL;
=20
@@ -516,7 +516,7 @@ static int __devexit mpc52xx_lpbfifo_remove(struct of_d=
evice *op)
/* Release the bestcomm transmit task */
free_irq(bcom_get_task_irq(lpbfifo.bcom_tx_task), &lpbfifo);
bcom_gen_bd_tx_release(lpbfifo.bcom_tx_task);
=2D=09
+
/* Release the bestcomm receive task */
free_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task), &lpbfifo);
bcom_gen_bd_rx_release(lpbfifo.bcom_rx_task);
=2D-=20
1.6.5.5
=2D-=20
Roman Fietze Telemotive AG B=FCro M=FChlhausen
Breitwiesen 73347 M=FChlhausen
Tel.: +49(0)7335/18493-45 http://www.telemotive.de
^ permalink raw reply
* [PATCH 02/13] powerpc/5200: LocalPlus driver: use SCLPC register structure
From: Roman Fietze @ 2009-12-22 6:59 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <200912220755.09756.roman.fietze@telemotive.de>
Signed-off-by: Roman Fietze <roman.fietze@telemotive.de>
=2D--
arch/powerpc/include/asm/mpc52xx.h | 24 ++++++++
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 79 +++++++++++----------=
=2D---
2 files changed, 59 insertions(+), 44 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/=
mpc52xx.h
index b664ce7..57f8335 100644
=2D-- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -193,6 +193,30 @@ struct mpc52xx_xlb {
#define MPC52xx_XLB_CFG_PLDIS (1 << 31)
#define MPC52xx_XLB_CFG_SNOOP (1 << 15)
=20
+/* SCLPC */
+struct mpc52xx_sclpc {
+ union {
+ u8 restart; /* 0x00 restart bit */
+ u32 packet_size; /* 0x00 packet size register */
+ } packet_size;
+ u32 start_address; /* 0x04 start Address register */
+ u32 control; /* 0x08 control register */
+ u32 enable; /* 0x0C enable register */
+ u32 unused0; /* 0x10 */
+ union {
+ u8 status; /* 0x14 status register bits */
+ u32 bytes_done; /* 0x14 bytes done register bits, read only */
+ } bytes_done_status;
+
+ u32 reserved1[(0x40-0x18) / sizeof(u32)]; /* 0x18 .. 0x3c */
+
+ u32 fifo_data; /* 0x40 FIFO data word register */
+ u32 fifo_status; /* 0x44 FIFO status register */
+ u8 fifo_control; /* 0x48 FIFO control register */
+ u8 reserved2[3];
+ u32 fifo_alarm; /* 0x4C FIFO alarm register */
+};
+
/* Clock Distribution control */
struct mpc52xx_cdm {
u32 jtag_id; /* CDM + 0x00 reg0 read only */
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/p=
latforms/52xx/mpc52xx_lpbfifo.c
index 4c84aa5..2763d5e 100644
=2D-- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
@@ -27,20 +27,10 @@ MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>=
");
MODULE_DESCRIPTION("MPC5200 LocalPlus FIFO device driver");
MODULE_LICENSE("GPL");
=20
=2D#define LPBFIFO_REG_PACKET_SIZE (0x00)
=2D#define LPBFIFO_REG_START_ADDRESS (0x04)
=2D#define LPBFIFO_REG_CONTROL (0x08)
=2D#define LPBFIFO_REG_ENABLE (0x0C)
=2D#define LPBFIFO_REG_BYTES_DONE_STATUS (0x14)
=2D#define LPBFIFO_REG_FIFO_DATA (0x40)
=2D#define LPBFIFO_REG_FIFO_STATUS (0x44)
=2D#define LPBFIFO_REG_FIFO_CONTROL (0x48)
=2D#define LPBFIFO_REG_FIFO_ALARM (0x4C)
=2D
struct mpc52xx_lpbfifo {
struct device *dev;
phys_addr_t regs_phys;
=2D void __iomem *regs;
+ struct mpc52xx_sclpc __iomem *regs;
int irq;
spinlock_t lock;
=20
@@ -72,10 +62,10 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo=
_request *req)
int poll_dma =3D req->flags & MPC52XX_LPBFIFO_FLAG_POLL_DMA;
=20
/* Set and clear the reset bits; is good practice in User Manual */
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
+ out_be32(&lpbfifo.regs->enable, 0x01010000);
=20
/* set master enable bit */
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x00000001);
+ out_be32(&lpbfifo.regs->enable, 0x00000001);
if (!dma) {
/* While the FIFO can be setup for transfer sizes as large as
* 16M-1, the FIFO itself is only 512 bytes deep and it does
@@ -91,14 +81,14 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo=
_request *req)
=20
/* Load the FIFO with data */
if (write) {
=2D reg =3D lpbfifo.regs + LPBFIFO_REG_FIFO_DATA;
+ reg =3D &lpbfifo.regs->fifo_data;
data =3D req->data + req->pos;
for (i =3D 0; i < transfer_size; i +=3D 4)
out_be32(reg, *data++);
}
=20
/* Unmask both error and completion irqs */
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x00000301);
+ out_be32(&lpbfifo.regs->enable, 0x00000301);
} else {
/* Choose the correct direction
*
@@ -108,12 +98,12 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfif=
o_request *req)
* is a risk of DMA not transferring the last chunk of data
*/
if (write) {
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_FIFO_ALARM, 0x1e4);
=2D out_8(lpbfifo.regs + LPBFIFO_REG_FIFO_CONTROL, 7);
+ out_be32(&lpbfifo.regs->fifo_alarm, 0x1e4);
+ out_8(&lpbfifo.regs->fifo_control, 7);
lpbfifo.bcom_cur_task =3D lpbfifo.bcom_tx_task;
} else {
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_FIFO_ALARM, 0x1ff);
=2D out_8(lpbfifo.regs + LPBFIFO_REG_FIFO_CONTROL, 0);
+ out_be32(&lpbfifo.regs->fifo_alarm, 0x1ff);
+ out_8(&lpbfifo.regs->fifo_control, 0);
lpbfifo.bcom_cur_task =3D lpbfifo.bcom_rx_task;
=20
if (poll_dma) {
@@ -155,21 +145,21 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfi=
fo_request *req)
/* Unmask irqs */
if (write && (!poll_dma))
bit_fields |=3D 0x00000100; /* completion irq too */
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, bit_fields);
+ out_be32(&lpbfifo.regs->enable, bit_fields);
}
=20
/* Set transfer size, width, chip select and READ mode */
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_START_ADDRESS,
+ out_be32(&lpbfifo.regs->start_address,
req->offset + req->pos);
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_PACKET_SIZE, transfer_size);
+ out_be32(&lpbfifo.regs->packet_size.packet_size, transfer_size);
=20
bit_fields =3D req->cs << 24 | 0x000008;
if (!write)
bit_fields |=3D 0x010000; /* read mode */
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_CONTROL, bit_fields);
+ out_be32(&lpbfifo.regs->control, bit_fields);
=20
/* Kick it off */
=2D out_8(lpbfifo.regs + LPBFIFO_REG_PACKET_SIZE, 0x01);
+ out_8(&lpbfifo.regs->packet_size.restart, 0x01);
if (dma)
bcom_enable(lpbfifo.bcom_cur_task);
}
@@ -218,7 +208,7 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo=
_request *req)
static irqreturn_t mpc52xx_lpbfifo_irq(int irq, void *dev_id)
{
struct mpc52xx_lpbfifo_request *req;
=2D u32 status =3D in_8(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS);
+ u32 status =3D in_8(&lpbfifo.regs->bytes_done_status.status);
void __iomem *reg;
u32 *data;
int count, i;
@@ -253,18 +243,18 @@ static irqreturn_t mpc52xx_lpbfifo_irq(int irq, void =
*dev_id)
=20
/* check abort bit */
if (status & 0x10) {
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
+ out_be32(&lpbfifo.regs->enable, 0x01010000);
do_callback =3D 1;
goto out;
}
=20
/* Read result from hardware */
=2D count =3D in_be32(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS);
+ count =3D in_be32(&lpbfifo.regs->bytes_done_status.bytes_done);
count &=3D 0x00ffffff;
=20
if (!dma && !write) {
/* copy the data out of the FIFO */
=2D reg =3D lpbfifo.regs + LPBFIFO_REG_FIFO_DATA;
+ reg =3D &lpbfifo.regs->fifo_data;
data =3D req->data + req->pos;
for (i =3D 0; i < count; i +=3D 4)
*data++ =3D in_be32(reg);
@@ -281,7 +271,7 @@ static irqreturn_t mpc52xx_lpbfifo_irq(int irq, void *d=
ev_id)
=20
out:
/* Clear the IRQ */
=2D out_8(lpbfifo.regs + LPBFIFO_REG_BYTES_DONE_STATUS, 0x01);
+ out_8(&lpbfifo.regs->bytes_done_status.status, 0x01);
=20
if (dma && (status & 0x11)) {
/*
@@ -379,11 +369,11 @@ void mpc52xx_lpbfifo_poll(void)
int write =3D req->flags & MPC52XX_LPBFIFO_FLAG_WRITE;
=20
/*
=2D * For more information, see comments on the "Fat Lady"
+ * For more information, see comments on the "Fat Lady"=20
*/
if (dma && write)
mpc52xx_lpbfifo_irq(0, NULL);
=2D else
+ else=20
mpc52xx_lpbfifo_bcom_irq(0, NULL);
}
EXPORT_SYMBOL(mpc52xx_lpbfifo_poll);
@@ -429,7 +419,7 @@ void mpc52xx_lpbfifo_abort(struct mpc52xx_lpbfifo_reque=
st *req)
/* Put it into reset and clear the state */
bcom_gen_bd_rx_reset(lpbfifo.bcom_rx_task);
bcom_gen_bd_tx_reset(lpbfifo.bcom_tx_task);
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
+ out_be32(&lpbfifo.regs->enable, 0x01010000);
lpbfifo.req =3D NULL;
}
spin_unlock_irqrestore(&lpbfifo.lock, flags);
@@ -459,19 +449,19 @@ mpc52xx_lpbfifo_probe(struct of_device *op, const str=
uct of_device_id *match)
spin_lock_init(&lpbfifo.lock);
=20
/* Put FIFO into reset */
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
+ out_be32(&lpbfifo.regs->enable, 0x01010000);
=20
=2D /* Register the interrupt handler */
+ /* register the interrupt handler */
rc =3D request_irq(lpbfifo.irq, mpc52xx_lpbfifo_irq, 0,
"mpc52xx-lpbfifo", &lpbfifo);
if (rc)
goto err_irq;
=20
/* Request the Bestcomm receive (fifo --> memory) task and IRQ */
=2D lpbfifo.bcom_rx_task =3D
=2D bcom_gen_bd_rx_init(2, res.start + LPBFIFO_REG_FIFO_DATA,
=2D BCOM_INITIATOR_SCLPC, BCOM_IPR_SCLPC,
=2D 16*1024*1024);
+ lpbfifo.bcom_rx_task =3D bcom_gen_bd_rx_init(2,
+ res.start + offsetof(struct mpc52xx_sclpc, fifo_data),
+ BCOM_INITIATOR_SCLPC, BCOM_IPR_SCLPC,
+ 16*1024*1024);
if (!lpbfifo.bcom_rx_task)
goto err_bcom_rx;
=20
@@ -482,9 +472,10 @@ mpc52xx_lpbfifo_probe(struct of_device *op, const stru=
ct of_device_id *match)
goto err_bcom_rx_irq;
=20
/* Request the Bestcomm transmit (memory --> fifo) task and IRQ */
=2D lpbfifo.bcom_tx_task =3D
=2D bcom_gen_bd_tx_init(2, res.start + LPBFIFO_REG_FIFO_DATA,
=2D BCOM_INITIATOR_SCLPC, BCOM_IPR_SCLPC);
+ lpbfifo.bcom_tx_task =3D bcom_gen_bd_tx_init(2,
+ res.start + offsetof(struct mpc52xx_sclpc, fifo_data),
+ BCOM_INITIATOR_SCLPC,
+ BCOM_IPR_SCLPC);
if (!lpbfifo.bcom_tx_task)
goto err_bcom_tx;
=20
@@ -511,12 +502,12 @@ static int __devexit mpc52xx_lpbfifo_remove(struct of=
_device *op)
return 0;
=20
/* Put FIFO in reset */
=2D out_be32(lpbfifo.regs + LPBFIFO_REG_ENABLE, 0x01010000);
+ out_be32(&lpbfifo.regs->enable, 0x01010000);
=20
=2D /* Release the bestcomm transmit task */
+ /* release the bestcomm transmit task */
free_irq(bcom_get_task_irq(lpbfifo.bcom_tx_task), &lpbfifo);
bcom_gen_bd_tx_release(lpbfifo.bcom_tx_task);
=2D
+=09
/* Release the bestcomm receive task */
free_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task), &lpbfifo);
bcom_gen_bd_rx_release(lpbfifo.bcom_rx_task);
=2D-=20
1.6.5.5
=2D-=20
Roman Fietze Telemotive AG B=FCro M=FChlhausen
Breitwiesen 73347 M=FChlhausen
Tel.: +49(0)7335/18493-45 http://www.telemotive.de
^ permalink raw reply
* [PATCH 03/13] mpc52xx: add SCLPC register bit definitions
From: Roman Fietze @ 2009-12-22 7:00 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <200912220755.09756.roman.fietze@telemotive.de>
Signed-off-by: Roman Fietze <roman.fietze@telemotive.de>
=2D--
arch/powerpc/include/asm/mpc52xx.h | 40 +++++++++++++++++++++++++++-----=
=2D--
1 files changed, 31 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc52xx.h b/arch/powerpc/include/asm/=
mpc52xx.h
index 57f8335..c659d1d 100644
=2D-- a/arch/powerpc/include/asm/mpc52xx.h
+++ b/arch/powerpc/include/asm/mpc52xx.h
@@ -17,6 +17,7 @@
#include <asm/types.h>
#include <asm/prom.h>
#include <asm/mpc5xxx.h>
+#include <linux/bitops.h>
#endif /* __ASSEMBLY__ */
=20
#include <linux/suspend.h>
@@ -212,11 +213,34 @@ struct mpc52xx_sclpc {
=20
u32 fifo_data; /* 0x40 FIFO data word register */
u32 fifo_status; /* 0x44 FIFO status register */
=2D u8 fifo_control; /* 0x48 FIFO control register */
=2D u8 reserved2[3];
+ u32 fifo_control; /* 0x48 FIFO control register */
u32 fifo_alarm; /* 0x4C FIFO alarm register */
};
=20
+#define MPC52xx_SCLPC_FIFO_SIZE (0x200) /* FIFO size 512 bytes */
+
+#define MPC52xx_SCLPC_CONTROL_CS(cs) ((uint32_t)(cs) << 24) /* CSX bits */
+#define MPC52xx_SCLPC_CONTROL_FLUSH BIT(17) /* flush, used in last packe=
t */
+#define MPC52xx_SCLPC_CONTROL_RWB_RECEIVE BIT(16) /* RWb bit, 1 =3D recei=
ve */
+#define MPC52xx_SCLPC_CONTROL_DAI BIT(8)
+
+#define MPC52xx_SCLPC_ENABLE_RC BIT(24) /* reset controller bit */
+#define MPC52xx_SCLPC_ENABLE_RF BIT(16) /* reset FIFO bit */
+#define MPC52xx_SCLPC_ENABLE_AIE BIT(9) /* abort interrupt enable bit */
+#define MPC52xx_SCLPC_ENABLE_NIE BIT(8) /* normal interrupt enable bit */
+#define MPC52xx_SCLPC_ENABLE_ME BIT(0) /* master enable bit */
+
+#define MPC52xx_SCLPC_PACKET_SIZE_RESTART BIT(24)
+
+#define MPC52xx_SCLPC_STATUS_AT BIT(28) /* abort termination */
+#define MPC52xx_SCLPC_STATUS_NT BIT(24) /* normal termination */
+#define MPC52xx_SCLPC_STATUS_BYTES_DONE_MASK (0x00FFFFFFU) /* bytes done b=
it mask */
+
+#define MPC52xx_SLPC_FIFO_STATUS_ERR BIT(22) /* error bit */
+
+#define MPC52xx_SLPC_FIFO_CONTROL_GR(gr) ((gr) << 24) /* granularity bits =
*/
+
+
/* Clock Distribution control */
struct mpc52xx_cdm {
u32 jtag_id; /* CDM + 0x00 reg0 read only */
@@ -304,19 +328,18 @@ extern void mpc52xx_restart(char *cmd);
struct mpc52xx_gpt_priv;
extern struct mpc52xx_gpt_priv *mpc52xx_gpt_from_irq(int irq);
extern int mpc52xx_gpt_start_timer(struct mpc52xx_gpt_priv *gpt, u64 perio=
d,
=2D int continuous);
+ int continuous);
extern u64 mpc52xx_gpt_timer_period(struct mpc52xx_gpt_priv *gpt);
extern int mpc52xx_gpt_stop_timer(struct mpc52xx_gpt_priv *gpt);
=20
/* mpc52xx_lpbfifo.c */
#define MPC52XX_LPBFIFO_FLAG_READ (0)
=2D#define MPC52XX_LPBFIFO_FLAG_WRITE (1<<0)
=2D#define MPC52XX_LPBFIFO_FLAG_NO_INCREMENT (1<<1)
=2D#define MPC52XX_LPBFIFO_FLAG_NO_DMA (1<<2)
=2D#define MPC52XX_LPBFIFO_FLAG_POLL_DMA (1<<3)
+#define MPC52XX_LPBFIFO_FLAG_WRITE BIT(0)
+#define MPC52XX_LPBFIFO_FLAG_NO_INCREMENT BIT(1)
+#define MPC52XX_LPBFIFO_FLAG_NO_DMA BIT(2)
+#define MPC52XX_LPBFIFO_FLAG_POLL_DMA BIT(3)
=20
struct mpc52xx_lpbfifo_request {
=2D struct list_head list;
=20
/* localplus bus address */
unsigned int cs;
@@ -383,4 +406,3 @@ extern char saved_sram[0x4000]; /* reuse buffer from mp=
c52xx suspend */
#endif /* CONFIG_PM */
=20
#endif /* __ASM_POWERPC_MPC52xx_H__ */
=2D
=2D-=20
1.6.5.5
=2D-=20
Roman Fietze Telemotive AG B=FCro M=FChlhausen
Breitwiesen 73347 M=FChlhausen
Tel.: +49(0)7335/18493-45 http://www.telemotive.de
^ permalink raw reply
* [PATCH 04/13] mpc52xx: LocalPlus driver: rewrite interrupt routines, fix errors
From: Roman Fietze @ 2009-12-22 7:01 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <200912220755.09756.roman.fietze@telemotive.de>
Use SCLPC bit definitions from mpc52xx.h for better readability.
Rewrite IRQ handlers, make them work for DMA.
=46ix module unload error.
Signed-off-by: Roman Fietze <roman.fietze@telemotive.de>
=2D--
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 306 ++++++++++++---------=
=2D---
1 files changed, 149 insertions(+), 157 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/p=
latforms/52xx/mpc52xx_lpbfifo.c
index 2763d5e..2fd1f3f 100644
=2D-- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
@@ -46,6 +46,34 @@ struct mpc52xx_lpbfifo {
/* The MPC5200 has only one fifo, so only need one instance structure */
static struct mpc52xx_lpbfifo lpbfifo;
=20
+
+/**
+ * mpc52xx_lpbfifo_is_write - return true if it's a WRITE request
+ */
+static inline int mpc52xx_lpbfifo_is_write(int flags)
+{
+ return flags & MPC52XX_LPBFIFO_FLAG_WRITE;
+}
+
+
+/**
+ * mpc52xx_lpbfifo_is_dma - return true if it's a DMA request
+ */
+static inline int mpc52xx_lpbfifo_is_dma(int flags)
+{
+ return !(flags & MPC52XX_LPBFIFO_FLAG_NO_DMA);
+}
+
+
+/**
+ * mpc52xx_lpbfifo_is_poll_dma - return true if it's a polled DMA request
+ */
+static inline int mpc52xx_lpbfifo_is_poll_dma(int flags)
+{
+ return flags & MPC52XX_LPBFIFO_FLAG_POLL_DMA;
+}
+
+
/**
* mpc52xx_lpbfifo_kick - Trigger the next block of data to be transfered
*/
@@ -57,16 +85,23 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo=
_request *req)
u32 *data;
int i;
int bit_fields;
=2D int dma =3D !(req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA);
=2D int write =3D req->flags & MPC52XX_LPBFIFO_FLAG_WRITE;
=2D int poll_dma =3D req->flags & MPC52XX_LPBFIFO_FLAG_POLL_DMA;
+ int rflags =3D req->flags;
=20
/* Set and clear the reset bits; is good practice in User Manual */
=2D out_be32(&lpbfifo.regs->enable, 0x01010000);
+ out_be32(&lpbfifo.regs->enable, MPC52xx_SCLPC_ENABLE_RC | MPC52xx_SCLPC_E=
NABLE_RF);
+
+ /* Set width, chip select and READ mode */
+ out_be32(&lpbfifo.regs->start_address, req->offset + req->pos);
+
+ /* Set CS and BPT */
+ bit_fields =3D MPC52xx_SCLPC_CONTROL_CS(req->cs) | 0x8;
+ if (!(mpc52xx_lpbfifo_is_write(rflags))) {
+ bit_fields |=3D MPC52xx_SCLPC_CONTROL_RWB_RECEIVE; /* read mode */
+ bit_fields |=3D MPC52xx_SCLPC_CONTROL_FLUSH;
+ }
+ out_be32(&lpbfifo.regs->control, bit_fields);
=20
=2D /* set master enable bit */
=2D out_be32(&lpbfifo.regs->enable, 0x00000001);
=2D if (!dma) {
+ if (!mpc52xx_lpbfifo_is_dma(rflags)) {
/* While the FIFO can be setup for transfer sizes as large as
* 16M-1, the FIFO itself is only 512 bytes deep and it does
* not generate interrupts for FIFO full events (only transfer
@@ -80,7 +115,7 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_=
request *req)
transfer_size =3D 512;
=20
/* Load the FIFO with data */
=2D if (write) {
+ if (mpc52xx_lpbfifo_is_write(rflags)) {
reg =3D &lpbfifo.regs->fifo_data;
data =3D req->data + req->pos;
for (i =3D 0; i < transfer_size; i +=3D 4)
@@ -88,7 +123,9 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_=
request *req)
}
=20
/* Unmask both error and completion irqs */
=2D out_be32(&lpbfifo.regs->enable, 0x00000301);
+ out_be32(&lpbfifo.regs->enable, (MPC52xx_SCLPC_ENABLE_AIE |
+ MPC52xx_SCLPC_ENABLE_NIE |
+ MPC52xx_SCLPC_ENABLE_ME));
} else {
/* Choose the correct direction
*
@@ -97,16 +134,16 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfif=
o_request *req)
* there is a performance impacit. However, if it is wrong there
* is a risk of DMA not transferring the last chunk of data
*/
=2D if (write) {
=2D out_be32(&lpbfifo.regs->fifo_alarm, 0x1e4);
=2D out_8(&lpbfifo.regs->fifo_control, 7);
+ if (mpc52xx_lpbfifo_is_write(rflags)) {
+ out_be32(&lpbfifo.regs->fifo_alarm, MPC52xx_SCLPC_FIFO_SIZE - 28);
+ out_be32(&lpbfifo.regs->fifo_control, MPC52xx_SLPC_FIFO_CONTROL_GR(7));
lpbfifo.bcom_cur_task =3D lpbfifo.bcom_tx_task;
} else {
=2D out_be32(&lpbfifo.regs->fifo_alarm, 0x1ff);
=2D out_8(&lpbfifo.regs->fifo_control, 0);
+ out_be32(&lpbfifo.regs->fifo_alarm, MPC52xx_SCLPC_FIFO_SIZE - 1);
+ out_be32(&lpbfifo.regs->fifo_control, MPC52xx_SLPC_FIFO_CONTROL_GR(0));
lpbfifo.bcom_cur_task =3D lpbfifo.bcom_rx_task;
=20
=2D if (poll_dma) {
+ if (mpc52xx_lpbfifo_is_poll_dma(rflags)) {
if (lpbfifo.dma_irqs_enabled) {
disable_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task));
lpbfifo.dma_irqs_enabled =3D 0;
@@ -119,63 +156,34 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfi=
fo_request *req)
}
}
=20
+ /* error irq & master enabled bit */
+ out_be32(&lpbfifo.regs->enable, MPC52xx_SCLPC_ENABLE_AIE | MPC52xx_SCLPC=
_ENABLE_NIE | MPC52xx_SCLPC_ENABLE_ME);
+
bd =3D bcom_prepare_next_buffer(lpbfifo.bcom_cur_task);
bd->status =3D transfer_size;
=2D if (!write) {
=2D /*
=2D * In the DMA read case, the DMA doesn't complete,
=2D * possibly due to incorrect watermarks in the ALARM
=2D * and CONTROL regs. For now instead of trying to
=2D * determine the right watermarks that will make this
=2D * work, just increase the number of bytes the FIFO is
=2D * expecting.
=2D *
=2D * When submitting another operation, the FIFO will get
=2D * reset, so the condition of the FIFO waiting for a
=2D * non-existent 4 bytes will get cleared.
=2D */
=2D transfer_size +=3D 4; /* BLECH! */
=2D }
bd->data[0] =3D req->data_phys + req->pos;
bcom_submit_next_buffer(lpbfifo.bcom_cur_task, NULL);
=2D
=2D /* error irq & master enabled bit */
=2D bit_fields =3D 0x00000201;
=2D
=2D /* Unmask irqs */
=2D if (write && (!poll_dma))
=2D bit_fields |=3D 0x00000100; /* completion irq too */
=2D out_be32(&lpbfifo.regs->enable, bit_fields);
}
=20
=2D /* Set transfer size, width, chip select and READ mode */
=2D out_be32(&lpbfifo.regs->start_address,
=2D req->offset + req->pos);
=2D out_be32(&lpbfifo.regs->packet_size.packet_size, transfer_size);
=2D
=2D bit_fields =3D req->cs << 24 | 0x000008;
=2D if (!write)
=2D bit_fields |=3D 0x010000; /* read mode */
=2D out_be32(&lpbfifo.regs->control, bit_fields);
=2D
=2D /* Kick it off */
=2D out_8(&lpbfifo.regs->packet_size.restart, 0x01);
=2D if (dma)
+ /* Set packet size and kick it off */
+ out_be32(&lpbfifo.regs->packet_size.packet_size, MPC52xx_SCLPC_PACKET_SIZ=
E_RESTART | transfer_size);
+ if (mpc52xx_lpbfifo_is_dma(rflags))
bcom_enable(lpbfifo.bcom_cur_task);
}
=20
/**
=2D * mpc52xx_lpbfifo_irq - IRQ handler for LPB FIFO
+ * mpc52xx_lpbfifo_sclpc_irq - IRQ handler for LPB FIFO
*
=2D * On transmit, the dma completion irq triggers before the fifo completi=
on
=2D * triggers. Handle the dma completion here instead of the LPB FIFO Bes=
tcomm
=2D * task completion irq becuase everyting is not really done until the LP=
B FIFO
=2D * completion irq triggers.
+ * On transmit, the dma completion irq triggers before the fifo
+ * completion triggers. Handle the dma completion here instead of the
+ * LPB FIFO Bestcomm task completion irq because everything is not
+ * really done until the LPB FIFO completion irq triggers.
*
* In other words:
* For DMA, on receive, the "Fat Lady" is the bestcom completion irq. on
=2D * transmit, the fifo completion irq is the "Fat Lady". The opera (or in=
this
=2D * case the DMA/FIFO operation) is not finished until the "Fat Lady" sin=
gs.
+ * transmit, the fifo completion irq is the "Fat Lady". The opera (or in
+ * this case the DMA/FIFO operation) is not finished until the "Fat
+ * Lady" sings.
*
* Reasons for entering this routine:
* 1) PIO mode rx and tx completion irq
@@ -205,17 +213,17 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfi=
fo_request *req)
* extra fiddling is done to make sure all paths lead to the same
* outbound code.
*/
=2Dstatic irqreturn_t mpc52xx_lpbfifo_irq(int irq, void *dev_id)
+static irqreturn_t mpc52xx_lpbfifo_sclpc_irq(int irq, void *dev_id)
{
struct mpc52xx_lpbfifo_request *req;
=2D u32 status =3D in_8(&lpbfifo.regs->bytes_done_status.status);
+ u32 status_count =3D in_be32(&lpbfifo.regs->bytes_done_status.bytes_done);
void __iomem *reg;
u32 *data;
=2D int count, i;
+ size_t i;
int do_callback =3D 0;
u32 ts;
unsigned long flags;
=2D int dma, write, poll_dma;
+ int rflags;
=20
spin_lock_irqsave(&lpbfifo.lock, flags);
ts =3D get_tbl();
@@ -223,87 +231,79 @@ static irqreturn_t mpc52xx_lpbfifo_irq(int irq, void =
*dev_id)
req =3D lpbfifo.req;
if (!req) {
spin_unlock_irqrestore(&lpbfifo.lock, flags);
=2D pr_err("bogus LPBFIFO IRQ\n");
+ pr_err("bogus SCLPC IRQ\n");
return IRQ_HANDLED;
}
=20
=2D dma =3D !(req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA);
=2D write =3D req->flags & MPC52XX_LPBFIFO_FLAG_WRITE;
=2D poll_dma =3D req->flags & MPC52XX_LPBFIFO_FLAG_POLL_DMA;
+ rflags =3D req->flags;
=20
=2D if (dma && !write) {
=2D spin_unlock_irqrestore(&lpbfifo.lock, flags);
=2D pr_err("bogus LPBFIFO IRQ (dma and not writting)\n");
=2D return IRQ_HANDLED;
=2D }
=2D
=2D if ((status & 0x01) =3D=3D 0) {
+ /* check normal termination bit */
+ if (!(status_count & MPC52xx_SCLPC_STATUS_NT))
goto out;
=2D }
=20
/* check abort bit */
=2D if (status & 0x10) {
=2D out_be32(&lpbfifo.regs->enable, 0x01010000);
+ if (status_count & MPC52xx_SCLPC_STATUS_AT) {
+ out_be32(&lpbfifo.regs->enable, MPC52xx_SCLPC_ENABLE_RC | MPC52xx_SCLPC_=
ENABLE_RF);
do_callback =3D 1;
goto out;
}
=20
=2D /* Read result from hardware */
=2D count =3D in_be32(&lpbfifo.regs->bytes_done_status.bytes_done);
=2D count &=3D 0x00ffffff;
+ if (!mpc52xx_lpbfifo_is_dma(rflags)) {
=20
=2D if (!dma && !write) {
=2D /* copy the data out of the FIFO */
=2D reg =3D &lpbfifo.regs->fifo_data;
=2D data =3D req->data + req->pos;
=2D for (i =3D 0; i < count; i +=3D 4)
=2D *data++ =3D in_be32(reg);
=2D }
+ /* bytes done */
+ status_count &=3D MPC52xx_SCLPC_STATUS_BYTES_DONE_MASK;
=20
=2D /* Update transfer position and count */
=2D req->pos +=3D count;
+ if (!mpc52xx_lpbfifo_is_write(rflags)) {
+ /* copy the data out of the FIFO */
+ reg =3D &lpbfifo.regs->fifo_data;
+ data =3D req->data + req->pos;
+ for (i =3D 0; i < status_count; i +=3D sizeof(u32))
+ *data++ =3D in_be32(reg);
+ }
=20
=2D /* Decide what to do next */
=2D if (req->size - req->pos)
=2D mpc52xx_lpbfifo_kick(req); /* more work to do */
=2D else
+ /* Update transfer position and count */
+ req->pos +=3D status_count;
+
+ /* Decide what to do next */
+ if (req->size - req->pos)
+ mpc52xx_lpbfifo_kick(req); /* more work to do */
+ else
+ do_callback =3D 1;
+ }
+ else {
do_callback =3D 1;
+ }
=20
out:
/* Clear the IRQ */
=2D out_8(&lpbfifo.regs->bytes_done_status.status, 0x01);
+ out_8(&lpbfifo.regs->bytes_done_status.status, BIT(0));
=20
=2D if (dma && (status & 0x11)) {
=2D /*
=2D * Count the DMA as complete only when the FIFO completion
=2D * status or abort bits are set.
=2D *
=2D * (status & 0x01) should always be the case except sometimes
=2D * when using polled DMA.
=2D *
=2D * (status & 0x10) {transfer aborted}: This case needs more
=2D * testing.
=2D */
=2D bcom_retrieve_buffer(lpbfifo.bcom_cur_task, &status, NULL);
=2D }
req->last_byte =3D ((u8 *)req->data)[req->size - 1];
=20
+ if (irq !=3D 0) /* don't increment on polled case */
+ req->irq_count++;
+
/* When the do_callback flag is set; it means the transfer is finished
* so set the FIFO as idle */
=2D if (do_callback)
+ if (do_callback) {
lpbfifo.req =3D NULL;
+ out_be32(&lpbfifo.regs->enable, MPC52xx_SCLPC_ENABLE_RC | MPC52xx_SCLPC_=
ENABLE_RF);
=20
=2D if (irq !=3D 0) /* don't increment on polled case */
=2D req->irq_count++;
+ req->irq_ticks +=3D get_tbl() - ts;
+ spin_unlock_irqrestore(&lpbfifo.lock, flags);
=20
=2D req->irq_ticks +=3D get_tbl() - ts;
=2D spin_unlock_irqrestore(&lpbfifo.lock, flags);
+ /* Spinlock is released; it is now safe to call the callback */
+ if (req->callback)
+ req->callback(req);
=20
=2D /* Spinlock is released; it is now safe to call the callback */
=2D if (do_callback && req->callback)
=2D req->callback(req);
+ return IRQ_HANDLED;
+ }
+ else {
+ req->irq_ticks +=3D get_tbl() - ts;
+ spin_unlock_irqrestore(&lpbfifo.lock, flags);
=20
=2D return IRQ_HANDLED;
+ return IRQ_HANDLED;
+ }
}
=20
/**
@@ -313,48 +313,30 @@ out:
*/
static irqreturn_t mpc52xx_lpbfifo_bcom_irq(int irq, void *dev_id)
{
=2D struct mpc52xx_lpbfifo_request *req;
+ struct mpc52xx_lpbfifo *lpbfifo =3D dev_id;
unsigned long flags;
=2D u32 status;
=2D u32 ts;
=2D
=2D spin_lock_irqsave(&lpbfifo.lock, flags);
=2D ts =3D get_tbl();
=2D
=2D req =3D lpbfifo.req;
=2D if (!req || (req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA)) {
=2D spin_unlock_irqrestore(&lpbfifo.lock, flags);
=2D return IRQ_HANDLED;
=2D }
=20
=2D if (irq !=3D 0) /* don't increment on polled case */
=2D req->irq_count++;
+ spin_lock_irqsave(&lpbfifo->lock, flags);
+ // ts =3D get_tbl();
=20
=2D if (!bcom_buffer_done(lpbfifo.bcom_cur_task)) {
=2D spin_unlock_irqrestore(&lpbfifo.lock, flags);
+ if (!bcom_buffer_done(lpbfifo->bcom_cur_task)) {
=20
=2D req->buffer_not_done_cnt++;
=2D if ((req->buffer_not_done_cnt % 1000) =3D=3D 0)
=2D pr_err("transfer stalled\n");
+ if (bcom_queue_empty(lpbfifo->bcom_cur_task)) {
+ spin_unlock_irqrestore(&lpbfifo->lock, flags);
+ dev_err(lpbfifo->dev, "DMA queue empty\n");
+ }
+ else {
+ spin_unlock_irqrestore(&lpbfifo->lock, flags);
+ dev_err(lpbfifo->dev, "DMA buffer not done\n");
+ }
=20
return IRQ_HANDLED;
}
=20
=2D bcom_retrieve_buffer(lpbfifo.bcom_cur_task, &status, NULL);
=2D
=2D req->last_byte =3D ((u8 *)req->data)[req->size - 1];
=2D
=2D req->pos =3D status & 0x00ffffff;
=2D
=2D /* Mark the FIFO as idle */
=2D lpbfifo.req =3D NULL;
+ bcom_retrieve_buffer(lpbfifo->bcom_cur_task, NULL, NULL);
+ // req->irq_ticks +=3D get_tbl() - ts;
=20
=2D /* Release the lock before calling out to the callback. */
=2D req->irq_ticks +=3D get_tbl() - ts;
=2D spin_unlock_irqrestore(&lpbfifo.lock, flags);
=2D
=2D if (req->callback)
=2D req->callback(req);
+ spin_unlock_irqrestore(&lpbfifo->lock, flags);
=20
return IRQ_HANDLED;
}
@@ -365,14 +347,12 @@ static irqreturn_t mpc52xx_lpbfifo_bcom_irq(int irq, =
void *dev_id)
void mpc52xx_lpbfifo_poll(void)
{
struct mpc52xx_lpbfifo_request *req =3D lpbfifo.req;
=2D int dma =3D !(req->flags & MPC52XX_LPBFIFO_FLAG_NO_DMA);
=2D int write =3D req->flags & MPC52XX_LPBFIFO_FLAG_WRITE;
=20
/*
* For more information, see comments on the "Fat Lady"=20
*/
=2D if (dma && write)
=2D mpc52xx_lpbfifo_irq(0, NULL);
+ if (mpc52xx_lpbfifo_is_dma(req->flags) && (req->flags & MPC52XX_LPBFIFO_F=
LAG_WRITE))
+ mpc52xx_lpbfifo_sclpc_irq(0, NULL);
else=20
mpc52xx_lpbfifo_bcom_irq(0, NULL);
}
@@ -406,6 +386,7 @@ int mpc52xx_lpbfifo_submit(struct mpc52xx_lpbfifo_reque=
st *req)
=20
mpc52xx_lpbfifo_kick(req);
spin_unlock_irqrestore(&lpbfifo.lock, flags);
+
return 0;
}
EXPORT_SYMBOL(mpc52xx_lpbfifo_submit);
@@ -419,7 +400,7 @@ void mpc52xx_lpbfifo_abort(struct mpc52xx_lpbfifo_reque=
st *req)
/* Put it into reset and clear the state */
bcom_gen_bd_rx_reset(lpbfifo.bcom_rx_task);
bcom_gen_bd_tx_reset(lpbfifo.bcom_tx_task);
=2D out_be32(&lpbfifo.regs->enable, 0x01010000);
+ out_be32(&lpbfifo.regs->enable, MPC52xx_SCLPC_ENABLE_RC | MPC52xx_SCLPC_=
ENABLE_RF);
lpbfifo.req =3D NULL;
}
spin_unlock_irqrestore(&lpbfifo.lock, flags);
@@ -449,16 +430,16 @@ mpc52xx_lpbfifo_probe(struct of_device *op, const str=
uct of_device_id *match)
spin_lock_init(&lpbfifo.lock);
=20
/* Put FIFO into reset */
=2D out_be32(&lpbfifo.regs->enable, 0x01010000);
+ out_be32(&lpbfifo.regs->enable, MPC52xx_SCLPC_ENABLE_RC | MPC52xx_SCLPC_E=
NABLE_RF);
=20
/* register the interrupt handler */
=2D rc =3D request_irq(lpbfifo.irq, mpc52xx_lpbfifo_irq, 0,
+ rc =3D request_irq(lpbfifo.irq, mpc52xx_lpbfifo_sclpc_irq, 0,
"mpc52xx-lpbfifo", &lpbfifo);
if (rc)
goto err_irq;
=20
/* Request the Bestcomm receive (fifo --> memory) task and IRQ */
=2D lpbfifo.bcom_rx_task =3D bcom_gen_bd_rx_init(2,
+ lpbfifo.bcom_rx_task =3D bcom_gen_bd_rx_init(16,
res.start + offsetof(struct mpc52xx_sclpc, fifo_data),
BCOM_INITIATOR_SCLPC, BCOM_IPR_SCLPC,
16*1024*1024);
@@ -472,16 +453,27 @@ mpc52xx_lpbfifo_probe(struct of_device *op, const str=
uct of_device_id *match)
goto err_bcom_rx_irq;
=20
/* Request the Bestcomm transmit (memory --> fifo) task and IRQ */
=2D lpbfifo.bcom_tx_task =3D bcom_gen_bd_tx_init(2,
+ lpbfifo.bcom_tx_task =3D bcom_gen_bd_tx_init(16,
res.start + offsetof(struct mpc52xx_sclpc, fifo_data),
BCOM_INITIATOR_SCLPC,
BCOM_IPR_SCLPC);
if (!lpbfifo.bcom_tx_task)
goto err_bcom_tx;
=20
+ rc =3D request_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task),
+ mpc52xx_lpbfifo_bcom_irq, 0,
+ "mpc52xx-lpbfifo-rx", &lpbfifo);
+ if (rc)
+ goto err_bcom_tx_irq;
+
+ lpbfifo.dma_irqs_enabled =3D 1;
+
lpbfifo.dev =3D &op->dev;
+
return 0;
=20
+err_bcom_tx_irq:
+ free_irq(bcom_get_task_irq(lpbfifo.bcom_tx_task), &lpbfifo);
err_bcom_tx:
free_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task), &lpbfifo);
err_bcom_rx_irq:
=2D-=20
1.6.5.5
=2D-=20
Roman Fietze Telemotive AG B=FCro M=FChlhausen
Breitwiesen 73347 M=FChlhausen
Tel.: +49(0)7335/18493-45 http://www.telemotive.de
^ permalink raw reply
* [PATCH 05/13] powerpc/5200: LocalPlus driver: fix DMA TX interrupt request
From: Roman Fietze @ 2009-12-22 7:02 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <200912220755.09756.roman.fietze@telemotive.de>
Signed-off-by: Roman Fietze <roman.fietze@telemotive.de>
=2D--
arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/p=
latforms/52xx/mpc52xx_lpbfifo.c
index 2fd1f3f..1e4f725 100644
=2D-- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
@@ -460,9 +460,9 @@ mpc52xx_lpbfifo_probe(struct of_device *op, const struc=
t of_device_id *match)
if (!lpbfifo.bcom_tx_task)
goto err_bcom_tx;
=20
=2D rc =3D request_irq(bcom_get_task_irq(lpbfifo.bcom_rx_task),
+ rc =3D request_irq(bcom_get_task_irq(lpbfifo.bcom_tx_task),
mpc52xx_lpbfifo_bcom_irq, 0,
=2D "mpc52xx-lpbfifo-rx", &lpbfifo);
+ "mpc52xx-lpbfifo-tx", &lpbfifo);
if (rc)
goto err_bcom_tx_irq;
=20
=2D-=20
1.6.5.5
=2D-=20
Roman Fietze Telemotive AG B=FCro M=FChlhausen
Breitwiesen 73347 M=FChlhausen
Tel.: +49(0)7335/18493-45 http://www.telemotive.de
^ permalink raw reply
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