* [PATCH 0/5] Eliminate of_platform_bus_type
From: Grant Likely @ 2010-07-21 23:39 UTC (permalink / raw)
To: Stephen Rothwell, Michal Simek, Benjamin Herrenschmidt,
Greg Kroah-Hartman, linux-kernel, linuxppc-dev,
microblaze-uclinux, sparclinux, David Miller
This series eliminates the OF platform bus type and moves all users over
to the platform bus. There is still work to be done to remove the
of_platform_driver references the affected drivers and then remove the
transitional code, but with this series those changes can be done piecewise.
These changes have been tested on PowerPC and UltraSparc. Microblaze
has only been compile tested (at least by me, but they've been in my test
branch for a long time now, so Michal may have given them a spin.
This series depends on my next-devicetree[1] branch which is also in
linux-next. I'm pushing them out to my experimental[2] branch for testing
now, and I'll add them to next-devicetree next week unless I hear
otherwise.
David, you'll also want to take a look at patches 4 & 5 to see if you
agree with my decisions on where I move symbols in the header files.
Cheers,
g.
---
Grant Likely (5):
drivercore/of: Add OF style matching to platform bus
of: Merge of_platform_bus_type with platform_bus_type
of/platform: remove all of_bus_type and of_platform_bus_type references
of: remove asm/of_platform.h
of: remove asm/of_device.h
arch/microblaze/include/asm/of_device.h | 13 ------
arch/microblaze/include/asm/of_platform.h | 19 --------
arch/microblaze/kernel/of_platform.c | 14 ------
arch/microblaze/kernel/setup.c | 6 ---
arch/powerpc/include/asm/of_device.h | 3 -
arch/powerpc/include/asm/of_platform.h | 16 -------
arch/powerpc/include/asm/prom.h | 2 +
arch/powerpc/kernel/dma-swiotlb.c | 8 ---
arch/powerpc/kernel/of_platform.c | 15 ------
arch/powerpc/kernel/setup-common.c | 7 ---
arch/powerpc/platforms/cell/beat_iommu.c | 2 -
arch/powerpc/platforms/cell/iommu.c | 2 -
arch/powerpc/sysdev/mv64x60_dev.c | 7 ---
arch/sparc/include/asm/device.h | 2 +
arch/sparc/include/asm/of_device.h | 19 --------
arch/sparc/include/asm/of_platform.h | 18 --------
arch/sparc/include/asm/parport.h | 4 --
arch/sparc/include/asm/prom.h | 4 ++
arch/sparc/kernel/apc.c | 2 -
arch/sparc/kernel/auxio_64.c | 2 -
arch/sparc/kernel/central.c | 4 +-
arch/sparc/kernel/chmc.c | 4 +-
arch/sparc/kernel/of_device_32.c | 21 ++-------
arch/sparc/kernel/of_device_64.c | 21 ++-------
arch/sparc/kernel/of_device_common.c | 5 --
arch/sparc/kernel/pci_fire.c | 2 -
arch/sparc/kernel/pci_psycho.c | 2 -
arch/sparc/kernel/pci_sabre.c | 2 -
arch/sparc/kernel/pci_schizo.c | 2 -
arch/sparc/kernel/pci_sun4v.c | 2 -
arch/sparc/kernel/pmc.c | 2 -
arch/sparc/kernel/power.c | 2 -
arch/sparc/kernel/time_32.c | 2 -
arch/sparc/kernel/time_64.c | 6 +--
drivers/atm/fore200e.c | 6 +--
drivers/base/platform.c | 11 +++++
drivers/char/hw_random/n2-drv.c | 4 +-
drivers/crypto/n2_core.c | 10 ++--
drivers/hwmon/ultra45_env.c | 4 +-
drivers/input/misc/sparcspkr.c | 12 ++---
drivers/input/serio/i8042-sparcio.h | 5 +-
drivers/mtd/maps/sun_uflash.c | 4 +-
drivers/net/ibm_newemac/core.c | 4 +-
drivers/net/myri_sbus.c | 4 +-
drivers/net/niu.c | 6 +--
drivers/net/sunbmac.c | 4 +-
drivers/net/sunhme.c | 4 +-
drivers/net/sunlance.c | 4 +-
drivers/net/sunqe.c | 4 +-
drivers/of/device.c | 5 ++
drivers/of/platform.c | 67 ++++++++++++++++++++++++++++-
drivers/parport/parport_sunbpp.c | 4 +-
drivers/sbus/char/bbc_i2c.c | 4 +-
drivers/sbus/char/display7seg.c | 4 +-
drivers/sbus/char/envctrl.c | 4 +-
drivers/sbus/char/flash.c | 4 +-
drivers/sbus/char/uctrl.c | 4 +-
drivers/scsi/qlogicpti.c | 4 +-
drivers/scsi/sun_esp.c | 4 +-
drivers/serial/sunhv.c | 4 +-
drivers/serial/sunsab.c | 4 +-
drivers/serial/sunsu.c | 2 -
drivers/serial/sunzilog.c | 6 +--
drivers/video/bw2.c | 4 +-
drivers/video/cg14.c | 4 +-
drivers/video/cg3.c | 4 +-
drivers/video/cg6.c | 4 +-
drivers/video/ffb.c | 4 +-
drivers/video/leo.c | 4 +-
drivers/video/p9100.c | 4 +-
drivers/video/sunxvr1000.c | 4 +-
drivers/video/tcx.c | 4 +-
drivers/watchdog/cpwd.c | 4 +-
drivers/watchdog/riowd.c | 4 +-
include/linux/of_device.h | 8 +++
include/linux/of_platform.h | 23 ++--------
sound/sparc/amd7930.c | 4 +-
sound/sparc/cs4231.c | 4 +-
sound/sparc/dbri.c | 4 +-
79 files changed, 222 insertions(+), 313 deletions(-)
delete mode 100644 arch/microblaze/include/asm/of_device.h
delete mode 100644 arch/microblaze/include/asm/of_platform.h
delete mode 100644 arch/powerpc/include/asm/of_device.h
delete mode 100644 arch/powerpc/include/asm/of_platform.h
delete mode 100644 arch/sparc/include/asm/of_device.h
delete mode 100644 arch/sparc/include/asm/of_platform.h
--
Signature
^ permalink raw reply
* Re: [PATCH v2] edac: mpc85xx: Add support for new MPCxxx/Pxxxx EDAC controllers
From: Scott Wood @ 2010-07-21 23:21 UTC (permalink / raw)
To: Andrew Morton
Cc: Peter Tyser, Anton Vorontsov, linux-kernel, Dave Jiang,
linuxppc-dev, Doug Thompson
In-Reply-To: <20100721153933.64d02086.akpm@linux-foundation.org>
On Wed, 21 Jul 2010 15:39:33 -0700
Andrew Morton <akpm@linux-foundation.org> wrote:
> On Fri, 16 Jul 2010 15:12:24 -0500
> Scott Wood <scottwood@freescale.com> wrote:
>
> > >
> > > drivers/edac/mpc85xx_edac.c | 8 ++++++++
> > > 1 files changed, 8 insertions(+), 0 deletions(-)
> > >
> > > diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
> > > index 52ca09b..3820879 100644
> > > --- a/drivers/edac/mpc85xx_edac.c
> > > +++ b/drivers/edac/mpc85xx_edac.c
> > > @@ -646,8 +646,12 @@ static struct of_device_id mpc85xx_l2_err_of_match[] = {
> > > { .compatible = "fsl,mpc8555-l2-cache-controller", },
> > > { .compatible = "fsl,mpc8560-l2-cache-controller", },
> > > { .compatible = "fsl,mpc8568-l2-cache-controller", },
> > > + { .compatible = "fsl,mpc8569-l2-cache-controller", },
> > > { .compatible = "fsl,mpc8572-l2-cache-controller", },
> > > + { .compatible = "fsl,p1020-l2-cache-controller", },
> > > + { .compatible = "fsl,p1021-l2-cache-controller", },
> > > { .compatible = "fsl,p2020-l2-cache-controller", },
> > > + { .compatible = "fsl,p4080-l2-cache-controller", },
> >
> > L2 on the p4080 is quite different from those other chips. It's part
> > of the core, controlled by SPRs.
>
> erm, was that an ack or a nack?
NACK, p4080 doesn't belong in this table, at least not its L2.
L3 on p4080 is similar to L2 on these other chips, though, and it
wouldn't take much to get this driver working on it -- but the match
table entry should wait until the differences are accommodated.
-Scott
^ permalink raw reply
* Re: [PATCH v2 0/2] Adding DTS for the STx GP3-SSA MPC8555 board
From: Wolfgang Denk @ 2010-07-21 22:47 UTC (permalink / raw)
To: Bradley Hughes; +Cc: linuxppc-dev
In-Reply-To: <AANLkTimMb_PshxAIDvbfFdbCqHrlY13Qiz9g2eZ1vw1E@mail.gmail.com>
Dear Bradley Hughes,
In message <AANLkTimMb_PshxAIDvbfFdbCqHrlY13Qiz9g2eZ1vw1E@mail.gmail.com> you wrote:
> This version uses "fsl,mpc8555..." instead of "fsl,85..." notation.
Such comments should go below the "---" line.
> There is also an 8541 version of this board so DTS for this board
> is specific to the 8555 processor.
>
> Another patch is coming to fix-up other DTS that use old notation.
Ditto.
> Signed-off-by: Bradley Hughes <bhughes@silicontkx.com>
> ---
^^^^^^^ Insert comments after this line.
Hm... have you verified that PCI is working? I tried enabling drivers
for the ITE8211 PATA controller, but it doesn't seem to work for me
(and yes, I did add the required "pata_it821x.noraid=1" to the
bootargs).
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd@denx.de
To be a winner, all you need to give is all you have.
^ permalink raw reply
* Re: [PATCH v2] edac: mpc85xx: Add support for new MPCxxx/Pxxxx EDAC controllers
From: Andrew Morton @ 2010-07-21 22:39 UTC (permalink / raw)
To: Scott Wood
Cc: Peter Tyser, Anton Vorontsov, linux-kernel, Dave Jiang,
linuxppc-dev, Doug Thompson
In-Reply-To: <20100716151224.21d499a3@schlenkerla.am.freescale.net>
On Fri, 16 Jul 2010 15:12:24 -0500
Scott Wood <scottwood@freescale.com> wrote:
> On Thu, 15 Jul 2010 22:25:07 +0400
> Anton Vorontsov <avorontsov@mvista.com> wrote:
>
> > Simply add proper IDs into the device table.
> >
> > Signed-off-by: Anton Vorontsov <avorontsov@mvista.com>
> > ---
> >
> > It appears that the driver has two device ID tables. :-)
> > So, my previous attempt enabled only half of the functionality.
> >
> > Andrew,
> >
> > Can you please replace
> >
> > edac-mpc85xx-add-support-for-mpc8569-edac-controllers.patch
> >
> > with this patch? It also adds some more IDs for the newer chips.
> >
edac-mpc85xx-add-support-for-mpc8569-edac-controllers.patch already got
itself merged. I queued this:
--- a/drivers/edac/mpc85xx_edac.c~edac-mpc85xx-add-support-for-new-mpcxxx-pxxxx-edac-controllers
+++ a/drivers/edac/mpc85xx_edac.c
@@ -646,8 +646,12 @@ static struct of_device_id mpc85xx_l2_er
{ .compatible = "fsl,mpc8555-l2-cache-controller", },
{ .compatible = "fsl,mpc8560-l2-cache-controller", },
{ .compatible = "fsl,mpc8568-l2-cache-controller", },
+ { .compatible = "fsl,mpc8569-l2-cache-controller", },
{ .compatible = "fsl,mpc8572-l2-cache-controller", },
+ { .compatible = "fsl,p1020-l2-cache-controller", },
+ { .compatible = "fsl,p1021-l2-cache-controller", },
{ .compatible = "fsl,p2020-l2-cache-controller", },
+ { .compatible = "fsl,p4080-l2-cache-controller", },
{},
};
@@ -1123,7 +1127,10 @@ static struct of_device_id mpc85xx_mc_er
{ .compatible = "fsl,mpc8569-memory-controller", },
{ .compatible = "fsl,mpc8572-memory-controller", },
{ .compatible = "fsl,mpc8349-memory-controller", },
+ { .compatible = "fsl,p1020-memory-controller", },
+ { .compatible = "fsl,p1021-memory-controller", },
{ .compatible = "fsl,p2020-memory-controller", },
+ { .compatible = "fsl,p4080-memory-controller", },
{},
};
_
> >
> > drivers/edac/mpc85xx_edac.c | 8 ++++++++
> > 1 files changed, 8 insertions(+), 0 deletions(-)
> >
> > diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
> > index 52ca09b..3820879 100644
> > --- a/drivers/edac/mpc85xx_edac.c
> > +++ b/drivers/edac/mpc85xx_edac.c
> > @@ -646,8 +646,12 @@ static struct of_device_id mpc85xx_l2_err_of_match[] = {
> > { .compatible = "fsl,mpc8555-l2-cache-controller", },
> > { .compatible = "fsl,mpc8560-l2-cache-controller", },
> > { .compatible = "fsl,mpc8568-l2-cache-controller", },
> > + { .compatible = "fsl,mpc8569-l2-cache-controller", },
> > { .compatible = "fsl,mpc8572-l2-cache-controller", },
> > + { .compatible = "fsl,p1020-l2-cache-controller", },
> > + { .compatible = "fsl,p1021-l2-cache-controller", },
> > { .compatible = "fsl,p2020-l2-cache-controller", },
> > + { .compatible = "fsl,p4080-l2-cache-controller", },
>
> L2 on the p4080 is quite different from those other chips. It's part
> of the core, controlled by SPRs.
erm, was that an ack or a nack?
^ permalink raw reply
* [PATCH] powerpc: rename immap_86xx.h to fsl_guts.h, and add 85xx support
From: Timur Tabi @ 2010-07-21 22:05 UTC (permalink / raw)
To: alsa-devel, linuxppc-dev, lrg, broonie, kumar.gala
The immap_86xx.h header file only defines one data structure: the "global
utilities" register set found on Freescale PowerPC SOCs. Rename this file
to fsl_guts.h to reflect its true purpose, and extend it to cover the "GUTS"
register set on 85xx chips.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
Liam,
This patch is a powerpc-patch, but it's much simpler if you apply it to
multi-component, since only the SSI audio drivers are affected.
Kumar Gala will ack this patch.
.../include/asm/{immap_86xx.h => fsl_guts.h} | 106 +++++++++++++-------
sound/soc/fsl/fsl_ssi.c | 2 -
sound/soc/fsl/mpc8610_hpcd.c | 10 +-
3 files changed, 76 insertions(+), 42 deletions(-)
rename arch/powerpc/include/asm/{immap_86xx.h => fsl_guts.h} (67%)
diff --git a/arch/powerpc/include/asm/immap_86xx.h b/arch/powerpc/include/asm/fsl_guts.h
similarity index 67%
rename from arch/powerpc/include/asm/immap_86xx.h
rename to arch/powerpc/include/asm/fsl_guts.h
index 0f165e5..4827900 100644
--- a/arch/powerpc/include/asm/immap_86xx.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -1,5 +1,5 @@
/**
- * MPC86xx Internal Memory Map
+ * Freecale 85xx and 86xx Global Utilties register set
*
* Authors: Jeff Brown
* Timur Tabi <timur@freescale.com>
@@ -10,73 +10,107 @@
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
- *
- * This header file defines structures for various 86xx SOC devices that are
- * used by multiple source files.
*/
-#ifndef __ASM_POWERPC_IMMAP_86XX_H__
-#define __ASM_POWERPC_IMMAP_86XX_H__
+#ifndef __ASM_POWERPC_FSL_GUTS_H__
+#define __ASM_POWERPC_FSL_GUTS_H__
#ifdef __KERNEL__
-/* Global Utility Registers */
-struct ccsr_guts {
+#if !defined(CONFIG_PPC_85xx) && !defined(CONFIG_PPC_86xx)
+#error Only 85xx and 86xx SOCs are supported
+#endif
+
+/**
+ * Global Utility Registers.
+ *
+ * Not all registers defined in this structure are available on all chips, so
+ * you are expected to know whether a given register actually exists on your
+ * chip before you access it.
+ *
+ * Also, some registers are similar on different chips but have slightly
+ * different names. In these cases, one name is chosen to avoid extraneous
+ * #ifdefs.
+ */
+#ifdef CONFIG_PPC_85xx
+struct ccsr_guts_85xx {
+#else
+struct ccsr_guts_86xx {
+#endif
__be32 porpllsr; /* 0x.0000 - POR PLL Ratio Status Register */
__be32 porbmsr; /* 0x.0004 - POR Boot Mode Status Register */
__be32 porimpscr; /* 0x.0008 - POR I/O Impedance Status and Control Register */
__be32 pordevsr; /* 0x.000c - POR I/O Device Status Register */
__be32 pordbgmsr; /* 0x.0010 - POR Debug Mode Status Register */
- u8 res1[0x20 - 0x14];
+ __be32 pordevsr2; /* 0x.0014 - POR device status register 2 */
+ u8 res018[0x20 - 0x18];
__be32 porcir; /* 0x.0020 - POR Configuration Information Register */
- u8 res2[0x30 - 0x24];
+ u8 res024[0x30 - 0x24];
__be32 gpiocr; /* 0x.0030 - GPIO Control Register */
- u8 res3[0x40 - 0x34];
+ u8 res034[0x40 - 0x34];
__be32 gpoutdr; /* 0x.0040 - General-Purpose Output Data Register */
- u8 res4[0x50 - 0x44];
+ u8 res044[0x50 - 0x44];
__be32 gpindr; /* 0x.0050 - General-Purpose Input Data Register */
- u8 res5[0x60 - 0x54];
+ u8 res054[0x60 - 0x54];
__be32 pmuxcr; /* 0x.0060 - Alternate Function Signal Multiplex Control */
- u8 res6[0x70 - 0x64];
+ __be32 pmuxcr2; /* 0x.0064 - Alternate function signal multiplex control 2 */
+ __be32 dmuxcr; /* 0x.0068 - DMA Mux Control Register */
+ u8 res06c[0x70 - 0x6c];
__be32 devdisr; /* 0x.0070 - Device Disable Control */
__be32 devdisr2; /* 0x.0074 - Device Disable Control 2 */
- u8 res7[0x80 - 0x78];
+ u8 res078[0x7c - 0x78];
+ __be32 pmjcr; /* 0x.007c - 4 Power Management Jog Control Register */
__be32 powmgtcsr; /* 0x.0080 - Power Management Status and Control Register */
- u8 res8[0x90 - 0x84];
+ __be32 pmrccr; /* 0x.0084 - Power Management Reset Counter Configuration Register */
+ __be32 pmpdccr; /* 0x.0088 - Power Management Power Down Counter Configuration Register */
+ __be32 pmcdr; /* 0x.008c - 4Power management clock disable register */
__be32 mcpsumr; /* 0x.0090 - Machine Check Summary Register */
__be32 rstrscr; /* 0x.0094 - Reset Request Status and Control Register */
- u8 res9[0xA0 - 0x98];
+ __be32 ectrstcr; /* 0x.0098 - Exception reset control register */
+ __be32 autorstsr; /* 0x.009c - Automatic reset status register */
__be32 pvr; /* 0x.00a0 - Processor Version Register */
__be32 svr; /* 0x.00a4 - System Version Register */
- u8 res10[0xB0 - 0xA8];
+ u8 res0a8[0xb0 - 0xa8];
__be32 rstcr; /* 0x.00b0 - Reset Control Register */
- u8 res11[0xC0 - 0xB4];
+ u8 res0b4[0xc0 - 0xb4];
+#ifdef CONFIG_PPC_85xx
+ __be32 iovselsr; /* 0x.00c0 - I/O voltage select status register */
+#else
__be32 elbcvselcr; /* 0x.00c0 - eLBC Voltage Select Ctrl Reg */
- u8 res12[0x800 - 0xC4];
+#endif
+ u8 res0c4[0x224 - 0xc4];
+ __be32 iodelay1; /* 0x.0224 - IO delay control register 1 */
+ __be32 iodelay2; /* 0x.0228 - IO delay control register 2 */
+ u8 res22c[0x800 - 0x22c];
__be32 clkdvdr; /* 0x.0800 - Clock Divide Register */
- u8 res13[0x900 - 0x804];
+ u8 res804[0x900 - 0x804];
__be32 ircr; /* 0x.0900 - Infrared Control Register */
- u8 res14[0x908 - 0x904];
+ u8 res904[0x908 - 0x904];
__be32 dmacr; /* 0x.0908 - DMA Control Register */
- u8 res15[0x914 - 0x90C];
+ u8 res90c[0x914 - 0x90c];
__be32 elbccr; /* 0x.0914 - eLBC Control Register */
- u8 res16[0xB20 - 0x918];
+ u8 res918[0xb20 - 0x918];
__be32 ddr1clkdr; /* 0x.0b20 - DDR1 Clock Disable Register */
__be32 ddr2clkdr; /* 0x.0b24 - DDR2 Clock Disable Register */
__be32 ddrclkdr; /* 0x.0b28 - DDR Clock Disable Register */
- u8 res17[0xE00 - 0xB2C];
+ u8 resb2c[0xe00 - 0xb2c];
__be32 clkocr; /* 0x.0e00 - Clock Out Select Register */
- u8 res18[0xE10 - 0xE04];
+ u8 rese04[0xe10 - 0xe04];
__be32 ddrdllcr; /* 0x.0e10 - DDR DLL Control Register */
- u8 res19[0xE20 - 0xE14];
+ u8 rese14[0xe20 - 0xe14];
__be32 lbcdllcr; /* 0x.0e20 - LBC DLL Control Register */
- u8 res20[0xF04 - 0xE24];
+ __be32 cpfor; /* 0x.0e24 - L2 charge pump fuse override register */
+ u8 rese28[0xf04 - 0xe28];
__be32 srds1cr0; /* 0x.0f04 - SerDes1 Control Register 0 */
__be32 srds1cr1; /* 0x.0f08 - SerDes1 Control Register 0 */
- u8 res21[0xF40 - 0xF0C];
- __be32 srds2cr0; /* 0x.0f40 - SerDes1 Control Register 0 */
- __be32 srds2cr1; /* 0x.0f44 - SerDes1 Control Register 0 */
+ u8 resf0c[0xf2c - 0xf0c];
+ __be32 itcr; /* 0x.0f2c - Internal transaction control register */
+ u8 resf30[0xf40 - 0xf30];
+ __be32 srds2cr0; /* 0x.0f40 - SerDes2 Control Register 0 */
+ __be32 srds2cr1; /* 0x.0f44 - SerDes2 Control Register 0 */
} __attribute__ ((packed));
+#ifdef CONFIG_PPC_86xx
+
#define CCSR_GUTS_DMACR_DEV_SSI 0 /* DMA controller/channel set to SSI */
#define CCSR_GUTS_DMACR_DEV_IR 1 /* DMA controller/channel set to IR */
@@ -93,7 +127,7 @@ struct ccsr_guts {
* ch: The channel on the DMA controller (0, 1, 2, or 3)
* device: The device to set as the source (CCSR_GUTS_DMACR_DEV_xx)
*/
-static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
+static inline void guts_set_dmacr(struct ccsr_guts_86xx __iomem *guts,
unsigned int co, unsigned int ch, unsigned int device)
{
unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));
@@ -129,7 +163,7 @@ static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
* ch: The channel on the DMA controller (0, 1, 2, or 3)
* value: the new value for the bit (0 or 1)
*/
-static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
+static inline void guts_set_pmuxcr_dma(struct ccsr_guts_86xx __iomem *guts,
unsigned int co, unsigned int ch, unsigned int value)
{
if ((ch == 0) || (ch == 3)) {
@@ -152,5 +186,7 @@ static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
#define CCSR_GUTS_CLKDVDR_SSICLK_MASK 0x000000FF
#define CCSR_GUTS_CLKDVDR_SSICLK(x) ((x) & CCSR_GUTS_CLKDVDR_SSICLK_MASK)
-#endif /* __ASM_POWERPC_IMMAP_86XX_H__ */
-#endif /* __KERNEL__ */
+#endif
+
+#endif
+#endif
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 31e8e5c..48fc0bd 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -24,8 +24,6 @@
#include <sound/initval.h>
#include <sound/soc.h>
-#include <asm/immap_86xx.h>
-
#include "fsl_ssi.h"
/**
diff --git a/sound/soc/fsl/mpc8610_hpcd.c b/sound/soc/fsl/mpc8610_hpcd.c
index 81ab639..69aeaeb 100644
--- a/sound/soc/fsl/mpc8610_hpcd.c
+++ b/sound/soc/fsl/mpc8610_hpcd.c
@@ -14,7 +14,7 @@
#include <linux/interrupt.h>
#include <linux/of_device.h>
#include <sound/soc.h>
-#include <asm/immap_86xx.h>
+#include <asm/fsl_guts.h>
#include "../codecs/cs4270.h"
#include "fsl_dma.h"
@@ -54,9 +54,9 @@ static int mpc8610_hpcd_machine_probe(struct platform_device *sound_device)
struct snd_soc_card *card = platform_get_drvdata(sound_device);
struct mpc8610_hpcd_data *machine_data =
container_of(card, struct mpc8610_hpcd_data, card);
- struct ccsr_guts __iomem *guts;
+ struct ccsr_guts_86xx __iomem *guts;
- guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
+ guts = ioremap(guts_phys, sizeof(struct ccsr_guts_86xx));
if (!guts) {
dev_err(card->dev, "could not map global utilities\n");
return -ENOMEM;
@@ -139,9 +139,9 @@ static int mpc8610_hpcd_machine_remove(struct platform_device *sound_device)
struct snd_soc_card *card = platform_get_drvdata(sound_device);
struct mpc8610_hpcd_data *machine_data =
container_of(card, struct mpc8610_hpcd_data, card);
- struct ccsr_guts __iomem *guts;
+ struct ccsr_guts_86xx __iomem *guts;
- guts = ioremap(guts_phys, sizeof(struct ccsr_guts));
+ guts = ioremap(guts_phys, sizeof(struct ccsr_guts_86xx));
if (!guts) {
dev_err(card->dev, "could not map global utilities\n");
return -ENOMEM;
--
1.7.0.1
^ permalink raw reply related
* [PATCH v2 2/2] EDAC: Remove deprecated bindings for MPC85xx
From: Bradley Hughes @ 2010-07-21 22:04 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
The "fsl,85..." style bindings for the l2-cache-controller
and memory-controller were intended to be deprected as of 2.6.30
per comment in drivers/edac/mpc85xx_edac.c. Previous patch in this
series updates all DTS to use the "fsl,mpc85..." style binding
for these two nodes, allowing us to finally deprecate said
notation.
Signed-off-by: Bradley Hughes <bhughes@silicontkx.com>
---
drivers/edac/mpc85xx_edac.c | 7 -------
1 files changed, 0 insertions(+), 7 deletions(-)
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 52ca09b..50b319e 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -631,13 +631,6 @@ static int mpc85xx_l2_err_remove(struct of_device *op)
}
static struct of_device_id mpc85xx_l2_err_of_match[] = {
-/* deprecate the fsl,85.. forms in the future, 2.6.30? */
- { .compatible = "fsl,8540-l2-cache-controller", },
- { .compatible = "fsl,8541-l2-cache-controller", },
- { .compatible = "fsl,8544-l2-cache-controller", },
- { .compatible = "fsl,8548-l2-cache-controller", },
- { .compatible = "fsl,8555-l2-cache-controller", },
- { .compatible = "fsl,8568-l2-cache-controller", },
{ .compatible = "fsl,mpc8536-l2-cache-controller", },
{ .compatible = "fsl,mpc8540-l2-cache-controller", },
{ .compatible = "fsl,mpc8541-l2-cache-controller", },
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 1/2] DTS: Change deprecated binding for 85xx-based boards
From: Bradley Hughes @ 2010-07-21 22:04 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
The "fsl,85..." style compatible binding was to be deprecated
some time ago. This patch corrects existing occurrences of
the incorrect binding. The memory-controller and
l2-cache-controller are the only affected nodes.
Signed-off-by: Bradley Hughes <bhughes@silicontkx.com>
---
arch/powerpc/boot/dts/mpc8540ads.dts | 4 ++--
arch/powerpc/boot/dts/mpc8541cds.dts | 4 ++--
arch/powerpc/boot/dts/mpc8544ds.dts | 4 ++--
arch/powerpc/boot/dts/mpc8548cds.dts | 4 ++--
arch/powerpc/boot/dts/mpc8555cds.dts | 4 ++--
arch/powerpc/boot/dts/mpc8560ads.dts | 4 ++--
arch/powerpc/boot/dts/mpc8568mds.dts | 4 ++--
7 files changed, 14 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts
b/arch/powerpc/boot/dts/mpc8540ads.dts
index 9dc2929..8d1bf0f 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -71,14 +71,14 @@
};
memory-controller@2000 {
- compatible = "fsl,8540-memory-controller";
+ compatible = "fsl,mpc8540-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8540-l2-cache-controller";
+ compatible = "fsl,mpc8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts
b/arch/powerpc/boot/dts/mpc8541cds.dts
index 9a3ad31..87ff965 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -71,14 +71,14 @@
};
memory-controller@2000 {
- compatible = "fsl,8541-memory-controller";
+ compatible = "fsl,mpc8541-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8541-l2-cache-controller";
+ compatible = "fsl,mpc8541-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts
b/arch/powerpc/boot/dts/mpc8544ds.dts
index 98e94b4..d793968 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -73,14 +73,14 @@
};
memory-controller@2000 {
- compatible = "fsl,8544-memory-controller";
+ compatible = "fsl,mpc8544-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8544-l2-cache-controller";
+ compatible = "fsl,mpc8544-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts
b/arch/powerpc/boot/dts/mpc8548cds.dts
index 0f52624..a17a557 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -74,14 +74,14 @@
};
memory-controller@2000 {
- compatible = "fsl,8548-memory-controller";
+ compatible = "fsl,mpc8548-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8548-l2-cache-controller";
+ compatible = "fsl,mpc8548-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x80000>; // L2, 512K
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts
b/arch/powerpc/boot/dts/mpc8555cds.dts
index 065b2f0..5c5614f 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -71,14 +71,14 @@
};
memory-controller@2000 {
- compatible = "fsl,8555-memory-controller";
+ compatible = "fsl,mpc8555-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8555-l2-cache-controller";
+ compatible = "fsl,mpc8555-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts
b/arch/powerpc/boot/dts/mpc8560ads.dts
index a5bb1ec..6e85e1b 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -71,14 +71,14 @@
};
memory-controller@2000 {
- compatible = "fsl,8540-memory-controller";
+ compatible = "fsl,mpc8540-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8540-l2-cache-controller";
+ compatible = "fsl,mpc8540-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x40000>; // L2, 256K
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts
b/arch/powerpc/boot/dts/mpc8568mds.dts
index 92fb178..30cf0e0 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -124,14 +124,14 @@
};
memory-controller@2000 {
- compatible = "fsl,8568-memory-controller";
+ compatible = "fsl,mpc8568-memory-controller";
reg = <0x2000 0x1000>;
interrupt-parent = <&mpic>;
interrupts = <18 2>;
};
L2: l2-cache-controller@20000 {
- compatible = "fsl,8568-l2-cache-controller";
+ compatible = "fsl,mpc8568-l2-cache-controller";
reg = <0x20000 0x1000>;
cache-line-size = <32>; // 32 bytes
cache-size = <0x80000>; // L2, 512K
--
1.7.0.4
^ permalink raw reply related
* [PATCH v2 0/2] Adding DTS for the STx GP3-SSA MPC8555 board
From: Bradley Hughes @ 2010-07-21 22:04 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
This version uses "fsl,mpc8555..." instead of "fsl,85..." notation.
There is also an 8541 version of this board so DTS for this board
is specific to the 8555 processor.
Another patch is coming to fix-up other DTS that use old notation.
Signed-off-by: Bradley Hughes <bhughes@silicontkx.com>
---
arch/powerpc/boot/dts/stxssa8555.dts | 380 ++++++++++++++++++++++++++++++++++
1 files changed, 380 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/stxssa8555.dts
diff --git a/arch/powerpc/boot/dts/stxssa8555.dts
b/arch/powerpc/boot/dts/stxssa8555.dts
new file mode 100644
index 0000000..49efd44
--- /dev/null
+++ b/arch/powerpc/boot/dts/stxssa8555.dts
@@ -0,0 +1,380 @@
+/*
+ * MPC8555-based STx GP3 Device Tree Source
+ *
+ * Copyright 2006, 2008 Freescale Semiconductor Inc.
+ *
+ * Copyright 2010 Silicon Turnkey Express LLC.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model = "stx,gp3";
+ compatible = "stx,gp3-8560", "stx,gp3";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ aliases {
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ serial0 = &serial0;
+ serial1 = &serial1;
+ pci0 = &pci0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,8555@0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ d-cache-line-size = <32>; // 32 bytes
+ i-cache-line-size = <32>; // 32 bytes
+ d-cache-size = <0x8000>; // L1, 32K
+ i-cache-size = <0x8000>; // L1, 32K
+ timebase-frequency = <0>; // 33 MHz, from uboot
+ bus-frequency = <0>; // 166 MHz
+ clock-frequency = <0>; // 825 MHz, from uboot
+ next-level-cache = <&L2>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x10000000>;
+ };
+
+ soc8555@e0000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+ ranges = <0x0 0xe0000000 0x100000>;
+ bus-frequency = <0>;
+
+ ecm-law@0 {
+ compatible = "fsl,ecm-law";
+ reg = <0x0 0x1000>;
+ fsl,num-laws = <8>;
+ };
+
+ ecm@1000 {
+ compatible = "fsl,mpc8555-ecm", "fsl,ecm";
+ reg = <0x1000 0x1000>;
+ interrupts = <17 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ memory-controller@2000 {
+ compatible = "fsl,mpc8555-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupt-parent = <&mpic>;
+ interrupts = <18 2>;
+ };
+
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,mpc8555-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>; // 32 bytes
+ cache-size = <0x40000>; // L2, 256K
+ interrupt-parent = <&mpic>;
+ interrupts = <16 2>;
+ };
+
+ i2c@3000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x3000 0x100>;
+ interrupts = <43 2>;
+ interrupt-parent = <&mpic>;
+ dfsrr;
+ };
+
+ dma@21300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
+ reg = <0x21300 0x4>;
+ ranges = <0x0 0x21100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupt-parent = <&mpic>;
+ interrupts = <20 2>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <21 2>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupt-parent = <&mpic>;
+ interrupts = <22 2>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,mpc8555-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupt-parent = <&mpic>;
+ interrupts = <23 2>;
+ };
+ };
+
+ enet0: ethernet@24000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x24000 0x1000>;
+ ranges = <0x0 0x24000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <29 2 30 2 34 2>;
+ interrupt-parent = <&mpic>;
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy0>;
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-mdio";
+ reg = <0x520 0x20>;
+
+ phy0: ethernet-phy@2 {
+ interrupt-parent = <&mpic>;
+ interrupts = <5 1>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+ phy1: ethernet-phy@4 {
+ interrupt-parent = <&mpic>;
+ interrupts = <5 1>;
+ reg = <0x4>;
+ device_type = "ethernet-phy";
+ };
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ enet1: ethernet@25000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <1>;
+ device_type = "network";
+ model = "TSEC";
+ compatible = "gianfar";
+ reg = <0x25000 0x1000>;
+ ranges = <0x0 0x25000 0x1000>;
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ interrupts = <35 2 36 2 40 2>;
+ interrupt-parent = <&mpic>;
+ tbi-handle = <&tbi1>;
+ phy-handle = <&phy1>;
+
+ mdio@520 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,gianfar-tbi";
+ reg = <0x520 0x20>;
+
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+ };
+
+ serial0: serial@4500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4500 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ serial1: serial@4600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x4600 0x100>; // reg base, size
+ clock-frequency = <0>; // should we fill in in uboot?
+ interrupts = <42 2>;
+ interrupt-parent = <&mpic>;
+ };
+
+ crypto@30000 {
+ compatible = "fsl,sec2.0";
+ reg = <0x30000 0x10000>;
+ interrupts = <45 2>;
+ interrupt-parent = <&mpic>;
+ fsl,num-channels = <4>;
+ fsl,channel-fifo-len = <24>;
+ fsl,exec-units-mask = <0x7e>;
+ fsl,descriptor-types-mask = <0x01010ebf>;
+ };
+
+ mpic: pic@40000 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ reg = <0x40000 0x40000>;
+ compatible = "chrp,open-pic";
+ device_type = "open-pic";
+ };
+
+ cpm@919c0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,mpc8555-cpm", "fsl,cpm2";
+ reg = <0x919c0 0x30>;
+ ranges;
+
+ muram@80000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x80000 0x10000>;
+
+ data@0 {
+ compatible = "fsl,cpm-muram-data";
+ reg = <0x0 0x2000 0x9000 0x1000>;
+ };
+ };
+
+ brg@919f0 {
+ compatible = "fsl,mpc8555-brg",
+ "fsl,cpm2-brg",
+ "fsl,cpm-brg";
+ reg = <0x919f0 0x10 0x915f0 0x10>;
+ };
+
+ cpmpic: pic@90c00 {
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ interrupts = <46 2>;
+ interrupt-parent = <&mpic>;
+ reg = <0x90c00 0x80>;
+ compatible = "fsl,mpc8555-cpm-pic", "fsl,cpm2-pic";
+ };
+ };
+ };
+
+ pci0: pci@e0008000 {
+ interrupt-map-mask = <0x1f800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x10 */
+ 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
+ 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
+ 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
+ 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
+
+ /* IDSEL 0x11 */
+ 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
+ 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
+ 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
+ 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
+
+ /* IDSEL 0x12 (Slot 1) */
+ 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
+ 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1
+ 0x9000 0x0 0x0 0x3 &mpic 0x2 0x1
+ 0x9000 0x0 0x0 0x4 &mpic 0x3 0x1
+
+ /* IDSEL 0x13 (Slot 2) */
+ 0x9800 0x0 0x0 0x1 &mpic 0x1 0x1
+ 0x9800 0x0 0x0 0x2 &mpic 0x2 0x1
+ 0x9800 0x0 0x0 0x3 &mpic 0x3 0x1
+ 0x9800 0x0 0x0 0x4 &mpic 0x0 0x1
+
+ /* IDSEL 0x14 (Slot 3) */
+ 0xa000 0x0 0x0 0x1 &mpic 0x2 0x1
+ 0xa000 0x0 0x0 0x2 &mpic 0x3 0x1
+ 0xa000 0x0 0x0 0x3 &mpic 0x0 0x1
+ 0xa000 0x0 0x0 0x4 &mpic 0x1 0x1
+
+ /* IDSEL 0x15 (Slot 4) */
+ 0xa800 0x0 0x0 0x1 &mpic 0x3 0x1
+ 0xa800 0x0 0x0 0x2 &mpic 0x0 0x1
+ 0xa800 0x0 0x0 0x3 &mpic 0x1 0x1
+ 0xa800 0x0 0x0 0x4 &mpic 0x2 0x1
+
+ /* Bus 1 (Tundra Bridge) */
+ /* IDSEL 0x12 (ISA bridge) */
+ 0x19000 0x0 0x0 0x1 &mpic 0x0 0x1
+ 0x19000 0x0 0x0 0x2 &mpic 0x1 0x1
+ 0x19000 0x0 0x0 0x3 &mpic 0x2 0x1
+ 0x19000 0x0 0x0 0x4 &mpic 0x3 0x1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <24 2>;
+ bus-range = <0 0>;
+ ranges = <0x2000000 0x0 0x80000000 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x0 0xe2000000 0x0 0x100000>;
+ clock-frequency = <66666666>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xe0008000 0x1000>;
+ compatible = "fsl,mpc8540-pci";
+ device_type = "pci";
+
+ i8259@19000 {
+ interrupt-controller;
+ device_type = "interrupt-controller";
+ reg = <0x19000 0x0 0x0 0x0 0x1>;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ compatible = "chrp,iic";
+ interrupts = <1>;
+ interrupt-parent = <&pci0>;
+ };
+ };
+
+ pci1: pci@e0009000 {
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x15 */
+ 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1
+ 0xa800 0x0 0x0 0x2 &mpic 0xb 0x1
+ 0xa800 0x0 0x0 0x3 &mpic 0xb 0x1
+ 0xa800 0x0 0x0 0x4 &mpic 0xb 0x1>;
+ interrupt-parent = <&mpic>;
+ interrupts = <25 2>;
+ bus-range = <0 0>;
+ ranges = <0x2000000 0x0 0xa0000000 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x0 0xe3000000 0x0 0x100000>;
+ clock-frequency = <66666666>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ reg = <0xe0009000 0x1000>;
+ compatible = "fsl,mpc8540-pci";
+ device_type = "pci";
+ };
+};
--
1.7.0.4
^ permalink raw reply related
* Re: [PATCH 0/8] sdhci: Move real work out of an atomic context
From: Andrew Morton @ 2010-07-21 21:13 UTC (permalink / raw)
To: Anton Vorontsov
Cc: Matt Fleming, Albert Herranz, linux-mmc, linux-kernel,
linuxppc-dev, Ben Dooks, Pierre Ossman
In-Reply-To: <20100714130728.GA27339@oksana.dev.rtsoft.ru>
On Wed, 14 Jul 2010 17:07:28 +0400
Anton Vorontsov <avorontsov@mvista.com> wrote:
> Hi all,
>
> Currently the sdhci driver does everything in the atomic context.
> And what is worse, PIO transfers are made from the IRQ handler.
>
> This causes huge latencies (up to 120 ms). On some P2020 SOCs,
> DMA and card detection is broken, which means that kernel polls
> for the card via PIO transfers every second. Needless to say
> that this is quite bad.
>
> So, this patch set reworks sdhci code to avoid atomic context,
> almost completely. We only do two device memory operations
> in the atomic context, and all the rest is threaded.
>
> I noticed no throughput drop neither with PIO transfers nor
> with DMA (tested on MPC8569E CPU), while latencies should be
> greatly improved.
>
The patchset looks good to me, but it'd be nice to hear from the other
people who work on this code, please?
^ permalink raw reply
* [PATCH v2 2/2] powerpc/crashdump: Fix issues with kexec and 36bit physical addr
From: Matthew McClintock @ 2010-07-21 21:14 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Matthew McClintock, kumar.gala
In-Reply-To: <1279746894-29529-1-git-send-email-msm@freescale.com>
Fix sizes of variables so correct values are exported via /proc.
Cast variable in comparison to avoid compiler error.
Signed-off-by: Matthew McClintock <msm@freescale.com>
---
arch/powerpc/kernel/crash_dump.c | 4 ++--
arch/powerpc/kernel/machine_kexec.c | 10 +++++-----
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 5fb667a..d254132 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -128,9 +128,9 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
if (!csize)
return 0;
- csize = min(csize, PAGE_SIZE);
+ csize = min_t(size_t, csize, PAGE_SIZE);
- if (pfn < max_pfn) {
+ if ((min_low_pfn < pfn) && (pfn < max_pfn)) {
vaddr = __va(pfn << PAGE_SHIFT);
csize = copy_oldmem_vaddr(vaddr, buf, csize, offset, userbuf);
} else {
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index bb3d893..6ff15f0 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -144,24 +144,24 @@ int overlaps_crashkernel(unsigned long start, unsigned long size)
}
/* Values we need to export to the second kernel via the device tree. */
-static unsigned long kernel_end;
-static unsigned long crashk_size;
+static phys_addr_t kernel_end;
+static phys_addr_t crashk_size;
static struct property kernel_end_prop = {
.name = "linux,kernel-end",
- .length = sizeof(unsigned long),
+ .length = sizeof(phys_addr_t),
.value = &kernel_end,
};
static struct property crashk_base_prop = {
.name = "linux,crashkernel-base",
- .length = sizeof(unsigned long),
+ .length = sizeof(phys_addr_t),
.value = &crashk_res.start,
};
static struct property crashk_size_prop = {
.name = "linux,crashkernel-size",
- .length = sizeof(unsigned long),
+ .length = sizeof(phys_addr_t),
.value = &crashk_size,
};
--
1.6.6.1
^ permalink raw reply related
* [PATCH v2 1/2] powerpc/85xx: kexec for SMP 85xx BookE systems
From: Matthew McClintock @ 2010-07-21 21:14 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Matthew McClintock, kumar.gala
In-Reply-To: <1279746894-29529-1-git-send-email-msm@freescale.com>
Adds support for kexec on 85xx machines for the BookE platform.
Including support for SMP machines
Based off work from Maxim Uvarov <muvarov@mvista.com>
Signed-off-by: Matthew McClintock <msm@freescale.com>
---
arch/powerpc/Kconfig | 10 +++---
arch/powerpc/platforms/85xx/smp.c | 63 +++++++++++++++++++++++++++++++++++++
2 files changed, 68 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 328774b..351ce4a 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -351,7 +351,7 @@ config ARCH_ENABLE_MEMORY_HOTREMOVE
config KEXEC
bool "kexec system call (EXPERIMENTAL)"
- depends on (PPC_BOOK3S || (FSL_BOOKE && !SMP)) && EXPERIMENTAL
+ depends on (PPC_BOOK3S || FSL_BOOKE) && EXPERIMENTAL
help
kexec is a system call that implements the ability to shutdown your
current kernel, and to start another kernel. It is like a reboot
@@ -368,8 +368,8 @@ config KEXEC
config CRASH_DUMP
bool "Build a kdump crash kernel"
- depends on PPC64 || 6xx
- select RELOCATABLE if PPC64
+ depends on PPC64 || 6xx || FSL_BOOKE
+ select RELOCATABLE if PPC64 || FSL_BOOKE
help
Build a kernel suitable for use as a kdump capture kernel.
The same kernel binary can be used as production kernel and dump
@@ -897,7 +897,7 @@ config KERNEL_START_BOOL
config KERNEL_START
hex "Virtual address of kernel base" if KERNEL_START_BOOL
default PAGE_OFFSET if PAGE_OFFSET_BOOL
- default "0xc2000000" if CRASH_DUMP
+ default "0xc2000000" if CRASH_DUMP && !RELOCATABLE
default "0xc0000000"
config PHYSICAL_START_BOOL
@@ -910,7 +910,7 @@ config PHYSICAL_START_BOOL
config PHYSICAL_START
hex "Physical address where the kernel is loaded" if PHYSICAL_START_BOOL
- default "0x02000000" if PPC_STD_MMU && CRASH_DUMP
+ default "0x02000000" if PPC_STD_MMU && CRASH_DUMP && !RELOCATABLE
default "0x00000000"
config PHYSICAL_ALIGN
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index a15f582..036c33c 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -15,6 +15,7 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/of.h>
+#include <linux/kexec.h>
#include <asm/machdep.h>
#include <asm/pgtable.h>
@@ -24,6 +25,7 @@
#include <asm/dbell.h>
#include <sysdev/fsl_soc.h>
+#include <sysdev/mpic.h>
extern void __early_start(void);
@@ -103,8 +105,64 @@ smp_85xx_setup_cpu(int cpu_nr)
struct smp_ops_t smp_85xx_ops = {
.kick_cpu = smp_85xx_kick_cpu,
+#ifdef CONFIG_KEXEC
+ .give_timebase = smp_generic_give_timebase,
+ .take_timebase = smp_generic_take_timebase,
+#endif
};
+#ifdef CONFIG_KEXEC
+static int kexec_down_cpus = 0;
+
+void mpc85xx_smp_kexec_cpu_down(int crash_shutdown, int secondary)
+{
+ mpic_teardown_this_cpu(1);
+
+ /* When crashing, this gets called on all CPU's we only
+ * take down the non-boot cpus */
+ if (smp_processor_id() != boot_cpuid)
+ {
+ local_irq_disable();
+ kexec_down_cpus++;
+
+ while (1);
+ }
+}
+
+static void mpc85xx_smp_kexec_down(void *arg)
+{
+ if (ppc_md.kexec_cpu_down)
+ ppc_md.kexec_cpu_down(0,1);
+}
+
+static void mpc85xx_smp_machine_kexec(struct kimage *image)
+{
+ int timeout = 2000;
+ int i;
+
+ set_cpus_allowed(current, cpumask_of_cpu(boot_cpuid));
+
+ smp_call_function(mpc85xx_smp_kexec_down, NULL, 0);
+
+ while ( (kexec_down_cpus != (num_online_cpus() - 1)) &&
+ ( timeout > 0 ) )
+ {
+ timeout--;
+ }
+
+ if ( !timeout )
+ printk(KERN_ERR "Unable to bring down secondary cpu(s)");
+
+ for (i = 0; i < num_present_cpus(); i++)
+ {
+ if ( i == smp_processor_id() ) continue;
+ mpic_reset_core(i);
+ }
+
+ default_machine_kexec(image);
+}
+#endif /* CONFIG_KEXEC */
+
void __init mpc85xx_smp_init(void)
{
struct device_node *np;
@@ -122,4 +180,9 @@ void __init mpc85xx_smp_init(void)
BUG_ON(!smp_85xx_ops.message_pass);
smp_ops = &smp_85xx_ops;
+
+#ifdef CONFIG_KEXEC
+ ppc_md.kexec_cpu_down = mpc85xx_smp_kexec_cpu_down;
+ ppc_md.machine_kexec = mpc85xx_smp_machine_kexec;
+#endif
}
--
1.6.6.1
^ permalink raw reply related
* [PATCH v2 0/2] kexec/crash support on mpc85xx parts
From: Matthew McClintock @ 2010-07-21 21:14 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Matthew McClintock, kumar.gala
The patch series is meant to fix a few issues with kexec/crash working
on mpc85xx parts
v1: initial version
v2: Fix a typo when decremeting a wait condition twice leading to
never showing when we fail waiting for extra cpus to shutdown
Moved around code so the crash and kexec shutdown code paths both
work correctly - this was exposed by the above fix
Disable modifying the PAGE_OFFSET and PHYSICAL_START when we build
a crash kernel w/ relocation enabled. We don't need to change these
values as a default action.
Matthew McClintock (2):
powerpc/85xx: kexec for SMP 85xx BookE systems
powerpc/crashdump: Fix issues with kexec and 36bit physical addr
arch/powerpc/Kconfig | 10 +++---
arch/powerpc/kernel/crash_dump.c | 4 +-
arch/powerpc/kernel/machine_kexec.c | 10 +++---
arch/powerpc/platforms/85xx/smp.c | 63 +++++++++++++++++++++++++++++++++++
4 files changed, 75 insertions(+), 12 deletions(-)
^ permalink raw reply
* [PATCH 2/2] tqm85xx: add a quirk for ti1520 PCMCIA bridge
From: Dmitry Eremin-Solenikov @ 2010-07-21 20:33 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1279744404-10171-1-git-send-email-dbaryshkov@gmail.com>
By default ti1520 bridge expects an input clock on CLOCK pin (to control
power chip). However on this boards CLOCK should be generated by PCI1520
itself. Add a quirk that enables internal 16 KHz clock generation on
this pin.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
---
arch/powerpc/platforms/85xx/tqm85xx.c | 21 +++++++++++++++++++++
1 files changed, 21 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 5b0ab99..8f29bbc 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -151,6 +151,27 @@ static void tqm85xx_show_cpuinfo(struct seq_file *m)
seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
}
+static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev)
+{
+ unsigned int val;
+
+ /* Do not do the fixup on other platforms! */
+ if (!machine_is(tqm85xx))
+ return;
+
+ dev_info(&pdev->dev, "Using TI 1520 fixup on TQM85xx\n");
+
+ /*
+ * Enable P2CCLK bit in system control register
+ * to enable CLOCK output to power chip
+ */
+ pci_read_config_dword(pdev, 0x80, &val);
+ pci_write_config_dword(pdev, 0x80, val | (1 << 27));
+
+}
+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
+ tqm85xx_ti1520_fixup);
+
static struct of_device_id __initdata of_bus_ids[] = {
{ .compatible = "simple-bus", },
{ .compatible = "gianfar", },
--
1.7.1
^ permalink raw reply related
* [PATCH 1/2] tqm85xx: update PCI interrupt-map attribute
From: Dmitry Eremin-Solenikov @ 2010-07-21 20:33 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1279744404-10171-1-git-send-email-dbaryshkov@gmail.com>
Update PCI IRQ mapping on TQM85xx platforms: include INTC and INTD on PCI-X
slot and add INTA/INTB mapping for PCMCIA bridge.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
---
arch/powerpc/boot/dts/tqm8540.dts | 9 ++++++++-
arch/powerpc/boot/dts/tqm8541.dts | 9 ++++++++-
arch/powerpc/boot/dts/tqm8548-bigflash.dts | 9 ++++++++-
arch/powerpc/boot/dts/tqm8548.dts | 9 ++++++++-
arch/powerpc/boot/dts/tqm8555.dts | 9 ++++++++-
arch/powerpc/boot/dts/tqm8560.dts | 9 ++++++++-
6 files changed, 48 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index 7161b93..b5c0940 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -290,7 +290,14 @@
interrupt-map = <
/* IDSEL 28 */
0xe000 0 0 1 &mpic 2 1
- 0xe000 0 0 2 &mpic 3 1>;
+ 0xe000 0 0 2 &mpic 3 1
+ 0xe000 0 0 3 &mpic 6 1
+ 0xe000 0 0 4 &mpic 5 1
+
+ /* IDSEL 11 */
+ 0x5800 0 0 1 &mpic 6 1
+ 0x5800 0 0 2 &mpic 5 1
+ >;
interrupt-parent = <&mpic>;
interrupts = <24 2>;
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index b30f637..f49d091 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -311,7 +311,14 @@
interrupt-map = <
/* IDSEL 28 */
0xe000 0 0 1 &mpic 2 1
- 0xe000 0 0 2 &mpic 3 1>;
+ 0xe000 0 0 2 &mpic 3 1
+ 0xe000 0 0 3 &mpic 6 1
+ 0xe000 0 0 4 &mpic 5 1
+
+ /* IDSEL 11 */
+ 0x5800 0 0 1 &mpic 6 1
+ 0x5800 0 0 2 &mpic 5 1
+ >;
interrupt-parent = <&mpic>;
interrupts = <24 2>;
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
index 61f25e1..5dbb36e 100644
--- a/arch/powerpc/boot/dts/tqm8548-bigflash.dts
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -442,7 +442,14 @@
interrupt-map = <
/* IDSEL 28 */
0xe000 0 0 1 &mpic 2 1
- 0xe000 0 0 2 &mpic 3 1>;
+ 0xe000 0 0 2 &mpic 3 1
+ 0xe000 0 0 3 &mpic 6 1
+ 0xe000 0 0 4 &mpic 5 1
+
+ /* IDSEL 11 */
+ 0x5800 0 0 1 &mpic 6 1
+ 0x5800 0 0 2 &mpic 5 1
+ >;
interrupt-parent = <&mpic>;
interrupts = <24 2>;
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
index 025759c..a050ae4 100644
--- a/arch/powerpc/boot/dts/tqm8548.dts
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -442,7 +442,14 @@
interrupt-map = <
/* IDSEL 28 */
0xe000 0 0 1 &mpic 2 1
- 0xe000 0 0 2 &mpic 3 1>;
+ 0xe000 0 0 2 &mpic 3 1
+ 0xe000 0 0 3 &mpic 6 1
+ 0xe000 0 0 4 &mpic 5 1
+
+ /* IDSEL 11 */
+ 0x5800 0 0 1 &mpic 6 1
+ 0x5800 0 0 2 &mpic 5 1
+ >;
interrupt-parent = <&mpic>;
interrupts = <24 2>;
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index 95e2873..81bad8c 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -311,7 +311,14 @@
interrupt-map = <
/* IDSEL 28 */
0xe000 0 0 1 &mpic 2 1
- 0xe000 0 0 2 &mpic 3 1>;
+ 0xe000 0 0 2 &mpic 3 1
+ 0xe000 0 0 3 &mpic 6 1
+ 0xe000 0 0 4 &mpic 5 1
+
+ /* IDSEL 11 */
+ 0x5800 0 0 1 &mpic 6 1
+ 0x5800 0 0 2 &mpic 5 1
+ >;
interrupt-parent = <&mpic>;
interrupts = <24 2>;
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index ff70580..22ec39b 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -382,7 +382,14 @@
interrupt-map = <
/* IDSEL 28 */
0xe000 0 0 1 &mpic 2 1
- 0xe000 0 0 2 &mpic 3 1>;
+ 0xe000 0 0 2 &mpic 3 1
+ 0xe000 0 0 3 &mpic 6 1
+ 0xe000 0 0 4 &mpic 5 1
+
+ /* IDSEL 11 */
+ 0x5800 0 0 1 &mpic 6 1
+ 0x5800 0 0 2 &mpic 5 1
+ >;
interrupt-parent = <&mpic>;
interrupts = <24 2>;
--
1.7.1
^ permalink raw reply related
* [PATCH 0/2] tqm85xx: enable PCMCIA bridge on ST85xx baseboards.
From: Dmitry Eremin-Solenikov @ 2010-07-21 20:33 UTC (permalink / raw)
To: linuxppc-dev
Baseboards for tqm85xx modules (STK85xx) bear TI PCI1520 PCMCIA controllers.
These two patches enables one to fully use this controller in Linux.
^ permalink raw reply
* Re: [PATCH 7/8] v3 Define memory_block_size_bytes() for ppc/pseries
From: Brian King @ 2010-07-21 20:27 UTC (permalink / raw)
To: Nathan Fontenot
Cc: linux-mm, greg, linux-kernel, KAMEZAWA Hiroyuki, linuxppc-dev
In-Reply-To: <4C451F05.9010502@austin.ibm.com>
On 07/19/2010 10:59 PM, Nathan Fontenot wrote:
>
> +static u32 get_memblock_size(void)
> +{
> + struct device_node *np;
> + unsigned int memblock_size = 0;
> +
> + np = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
> + if (np) {
> + const unsigned int *size;
This needs to be an unsigned long, otherwise I always get zero on my p6.
> +
> + size = of_get_property(np, "ibm,lmb-size", NULL);
> + memblock_size = size ? *size : 0;
> +
> + of_node_put(np);
--
Brian King
Linux on Power Virtualization
IBM Linux Technology Center
^ permalink raw reply
* Re: [PATCH] DTS: Adding device tree source for the STx GP3 SSA MPC8555-based board.
From: Kumar Gala @ 2010-07-21 20:17 UTC (permalink / raw)
To: Bradley Hughes; +Cc: linuxppc-dev
In-Reply-To: <AANLkTinoCJrYTdc56uK0ELQGMfG-em_5iiTtGGGWCgPT@mail.gmail.com>
On Jul 21, 2010, at 11:52 AM, Bradley Hughes wrote:
> On Wed, Jul 21, 2010 at 10:24 AM, Kumar Gala =
<galak@kernel.crashing.org> wrote:
>>>=20
>>> + soc8555@e0000000 {
>>> + #address-cells =3D <1>;
>>> + #size-cells =3D <1>;
>>> + device_type =3D "soc";
>>> + compatible =3D "simple-bus";
>>> + ranges =3D <0x0 0xe0000000 0x100000>;
>>> + bus-frequency =3D <0>;
>>> +
>>> + ecm-law@0 {
>>> + compatible =3D "fsl,ecm-law";
>>> + reg =3D <0x0 0x1000>;
>>> + fsl,num-laws =3D <8>;
>>> + };
>>> +
>>> + ecm@1000 {
>>> + compatible =3D "fsl,mpc8555-ecm", "fsl,ecm";
>>> + reg =3D <0x1000 0x1000>;
>>> + interrupts =3D <17 2>;
>>> + interrupt-parent =3D <&mpic>;
>>> + };
>>> +
>>> + memory-controller@2000 {
>>> + compatible =3D "fsl,8555-memory-controller";
>>=20
>> fsl,mpc8555?
>=20
> Ah, yes -- it seems the dts I used for an example also has this
> problem. In drivers/edac/mpc85xx_edac.c, bindings still work for
> fsl,85.. style notation, but a comment claims that this notation would
> be deprecated at some point (2.6.29 or 2.6.30). I have updated my
> local copy and it works fine, should I send a new patch? I could also
> extend this change to the other DTS files affected (A quick search
> found 14 instances of fsl,85.. style notation.) Please let me know
> what I should do.
Send two patches. One to update your patch and another to fix the in =
tree dts that have the old name.
- k=
^ permalink raw reply
* Re: [lm-sensors] [PATCH] hwmon: (tmp421) Add nfactor support (2nd attempt)
From: Andre Prendel @ 2010-07-21 19:46 UTC (permalink / raw)
To: Guenter Roeck
Cc: Jean Delvare, linuxppc-dev@lists.ozlabs.org,
lm-sensors@lm-sensors.org
In-Reply-To: <20100720155952.GA27093@ericsson.com>
On Tue, Jul 20, 2010 at 08:59:52AM -0700, Guenter Roeck wrote:
> On Tue, Jul 20, 2010 at 11:09:53AM -0400, Andre Prendel wrote:
> > On Thu, May 20, 2010 at 09:35:56PM +0200, Andre Prendel wrote:
> > > On Thu, May 20, 2010 at 03:07:05PM -0400, Jeff Angielski wrote:
> > > > In any event, here it is again:
> > >
> > > Acked-by: Andre Prendel <andre.prendel@gmx.de>
> >
> > Hi Jeff,
> >
> > I'de suggest to resend the patch with my acked-by to the lm-sensors list and
> > Andrew Morton. It looks like Jean is too busy at the moment.
> >
> > Regards,
> > Andre
> >
> > > > >From 9acd29ff48c64e58a7f5cdb888c86e737c56281c Mon Sep 17 00:00:00 2001
> > > > From: Jeff Angielski <jeff@theptrgroup.com>
> > > > Date: Mon, 10 May 2010 10:26:34 -0400
> > > > Subject: [PATCH] hwmon: (tmp421) Add nfactor support
> > > >
> > > > Add support for reading and writing the n-factor correction
> > > > registers. This is needed to compensate for the characteristics
> > > > of a particular sensor hanging off of the remote channels.
> > > >
>
> My concerns with this approach are
>
> 1) It changes the sysfs abi. libsensors won't support it. It opens up
> a can of worms with everyone starting to put chip-specific extensions
> into the ABI. If such an extension has to be made, it should be a) really necessary
> and b) a generic extension which applies to all chips.
A chip-specific extension can't be also generic. So we have to decide whether weaccept chip-specific extensions or not.
> 2) My understanding is that value adjustments are supposed to be made via sensors.conf,
> and that values reported by the chip should always be 'raw', ie unadjusted
> values.
>
> Instead of exporting n_adjust to the user via sysfs, it might make more sense
> to reset the correction factor to its default (if it was changed), and handle
> required adjustments in sensors.conf.
Jeff, what do you think?
> Even if Jean doesn't have time to handle the patch, you should at least get his Ack
> for the ABI changes.
That was the intention of resending the patch to the lm-sensors list. It would
be a pity to lose Jeff's effort.
> Guenter
Regards,
Andre
> > > >
> > > > Signed-off-by: Jeff Angielski <jeff@theptrgroup.com>
> > > > ---
> > > > Documentation/hwmon/tmp421 | 19 +++++++++++++++++++
> > > > drivers/hwmon/tmp421.c | 41 +++++++++++++++++++++++++++++++++++++++++
> > > > 2 files changed, 60 insertions(+), 0 deletions(-)
> > > >
> > > > diff --git a/Documentation/hwmon/tmp421 b/Documentation/hwmon/tmp421
> > > > index 0cf07f8..668228a 100644
> > > > --- a/Documentation/hwmon/tmp421
> > > > +++ b/Documentation/hwmon/tmp421
> > > > @@ -17,6 +17,7 @@ Supported chips:
> > > >
> > > > Authors:
> > > > Andre Prendel <andre.prendel@gmx.de>
> > > > + Jeff Angielski <jeff@theptrgroup.com>
> > > >
> > > > Description
> > > > -----------
> > > > @@ -34,3 +35,21 @@ the temperature values via the following sysfs files:
> > > >
> > > > temp[1-4]_input
> > > > temp[2-4]_fault
> > > > +
> > > > +The chips allow the user to adjust the n-factor value that is used
> > > > +when converting the remote channel measurements to temperature. The
> > > > +adjustment has a range of -128 to +127 that yields an effective
> > > > +n-factor range of 0.706542 to 1.747977. The power on reset value
> > > > +for the adjustment is 0 which results in an n-factor of 1.008.
> > > > +
> > > > +The effective n-factor is calculated according to the following
> > > > +equation:
> > > > +
> > > > +n_factor = (1.008 * 300) / (300 - nfactor_adjust)
> > > > +
> > > > +The driver exports the n-factor adjustment value via the following
> > > > +sysfs files:
> > > > +
> > > > +temp[2-4]_n_adjust
> > > > +
> > > > +
> > > > diff --git a/drivers/hwmon/tmp421.c b/drivers/hwmon/tmp421.c
> > > > index 738c472..dfd62be 100644
> > > > --- a/drivers/hwmon/tmp421.c
> > > > +++ b/drivers/hwmon/tmp421.c
> > > > @@ -49,6 +49,7 @@ enum chips { tmp421, tmp422, tmp423 };
> > > >
> > > > static const u8 TMP421_TEMP_MSB[4] = { 0x00, 0x01, 0x02, 0x03 };
> > > > static const u8 TMP421_TEMP_LSB[4] = { 0x10, 0x11, 0x12, 0x13 };
> > > > +static const u8 TMP421_N_CORRECT[3] = { 0x21, 0x22, 0x23 };
> > > >
> > > > /* Flags */
> > > > #define TMP421_CONFIG_SHUTDOWN 0x40
> > > > @@ -76,6 +77,7 @@ struct tmp421_data {
> > > > int channels;
> > > > u8 config;
> > > > s16 temp[4];
> > > > + s8 n_adjust[3];
> > > > };
> > > >
> > > > static int temp_from_s16(s16 reg)
> > > > @@ -115,6 +117,10 @@ static struct tmp421_data *tmp421_update_device(struct device *dev)
> > > > data->temp[i] |= i2c_smbus_read_byte_data(client,
> > > > TMP421_TEMP_LSB[i]);
> > > > }
> > > > + for (i = 1; i < data->channels; i++) {
> > > > + data->n_adjust[i - 1] = i2c_smbus_read_byte_data(client,
> > > > + TMP421_N_CORRECT[i - 1]);
> > > > + }
> > > > data->last_updated = jiffies;
> > > > data->valid = 1;
> > > > }
> > > > @@ -157,6 +163,32 @@ static ssize_t show_fault(struct device *dev,
> > > > return sprintf(buf, "0\n");
> > > > }
> > > >
> > > > +static ssize_t show_n_adjust(struct device *dev,
> > > > + struct device_attribute *devattr, char *buf)
> > > > +{
> > > > + int index = to_sensor_dev_attr(devattr)->index;
> > > > + struct tmp421_data *data = tmp421_update_device(dev);
> > > > +
> > > > + return sprintf(buf, "%d\n", data->n_adjust[index - 1]);
> > > > +}
> > > > +
> > > > +static ssize_t set_n_adjust(struct device *dev,
> > > > + struct device_attribute *devattr,
> > > > + const char *buf, size_t count)
> > > > +{
> > > > + struct i2c_client *client = to_i2c_client(dev);
> > > > + struct tmp421_data *data = i2c_get_clientdata(client);
> > > > + int index = to_sensor_dev_attr(devattr)->index;
> > > > + int n_adjust = simple_strtol(buf, NULL, 10);
> > > > +
> > > > + mutex_lock(&data->update_lock);
> > > > + i2c_smbus_write_byte_data(client, TMP421_N_CORRECT[index - 1],
> > > > + SENSORS_LIMIT(n_adjust, -128, 127));
> > > > + mutex_unlock(&data->update_lock);
> > > > +
> > > > + return count;
> > > > +}
> > > > +
> > > > static mode_t tmp421_is_visible(struct kobject *kobj, struct attribute *a,
> > > > int n)
> > > > {
> > > > @@ -177,19 +209,28 @@ static mode_t tmp421_is_visible(struct kobject *kobj, struct attribute *a,
> > > > static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp_value, NULL, 0);
> > > > static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp_value, NULL, 1);
> > > > static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO, show_fault, NULL, 1);
> > > > +static SENSOR_DEVICE_ATTR(temp2_n_adjust, S_IRUSR | S_IWUSR | S_IRGRP,
> > > > + show_n_adjust, set_n_adjust, 1);
> > > > static SENSOR_DEVICE_ATTR(temp3_input, S_IRUGO, show_temp_value, NULL, 2);
> > > > static SENSOR_DEVICE_ATTR(temp3_fault, S_IRUGO, show_fault, NULL, 2);
> > > > +static SENSOR_DEVICE_ATTR(temp3_n_adjust, S_IRUSR | S_IWUSR | S_IRGRP,
> > > > + show_n_adjust, set_n_adjust, 2);
> > > > static SENSOR_DEVICE_ATTR(temp4_input, S_IRUGO, show_temp_value, NULL, 3);
> > > > static SENSOR_DEVICE_ATTR(temp4_fault, S_IRUGO, show_fault, NULL, 3);
> > > > +static SENSOR_DEVICE_ATTR(temp4_n_adjust, S_IRUSR | S_IWUSR | S_IRGRP,
> > > > + show_n_adjust, set_n_adjust, 3);
> > > >
> > > > static struct attribute *tmp421_attr[] = {
> > > > &sensor_dev_attr_temp1_input.dev_attr.attr,
> > > > &sensor_dev_attr_temp2_input.dev_attr.attr,
> > > > &sensor_dev_attr_temp2_fault.dev_attr.attr,
> > > > + &sensor_dev_attr_temp2_n_adjust.dev_attr.attr,
> > > > &sensor_dev_attr_temp3_input.dev_attr.attr,
> > > > &sensor_dev_attr_temp3_fault.dev_attr.attr,
> > > > + &sensor_dev_attr_temp3_n_adjust.dev_attr.attr,
> > > > &sensor_dev_attr_temp4_input.dev_attr.attr,
> > > > &sensor_dev_attr_temp4_fault.dev_attr.attr,
> > > > + &sensor_dev_attr_temp4_n_adjust.dev_attr.attr,
> > > > NULL
> > > > };
> > > >
> > > > --
> > > > 1.7.0.4
> > > >
> > > >
> > > > --
> > > > Jeff Angielski
> > > > The PTR Group
> > > > www.theptrgroup.com
> > > >
> > > > _______________________________________________
> > > > lm-sensors mailing list
> > > > lm-sensors@lm-sensors.org
> > > > http://lists.lm-sensors.org/mailman/listinfo/lm-sensors
> > >
> > > _______________________________________________
> > > lm-sensors mailing list
> > > lm-sensors@lm-sensors.org
> > > http://lists.lm-sensors.org/mailman/listinfo/lm-sensors
> >
> > _______________________________________________
> > lm-sensors mailing list
> > lm-sensors@lm-sensors.org
> > http://lists.lm-sensors.org/mailman/listinfo/lm-sensors
^ permalink raw reply
* Re: [PATCH] DTS: Adding device tree source for the STx GP3 SSA MPC8555-based board.
From: Bradley Hughes @ 2010-07-21 16:52 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <7AD5FB58-D6EA-4AA6-870B-32E901F72589@kernel.crashing.org>
On Wed, Jul 21, 2010 at 10:24 AM, Kumar Gala <galak@kernel.crashing.org> wr=
ote:
>>
>> + =A0 =A0 soc8555@e0000000 {
>> + =A0 =A0 =A0 =A0 =A0 =A0 #address-cells =3D <1>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 #size-cells =3D <1>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 device_type =3D "soc";
>> + =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D "simple-bus";
>> + =A0 =A0 =A0 =A0 =A0 =A0 ranges =3D <0x0 0xe0000000 0x100000>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 bus-frequency =3D <0>;
>> +
>> + =A0 =A0 =A0 =A0 =A0 =A0 ecm-law@0 {
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D "fsl,ecm-law";
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <0x0 0x1000>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 fsl,num-laws =3D <8>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 };
>> +
>> + =A0 =A0 =A0 =A0 =A0 =A0 ecm@1000 {
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D "fsl,mpc8555-ec=
m", "fsl,ecm";
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <0x1000 0x1000>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupts =3D <17 2>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupt-parent =3D <&mpic>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 };
>> +
>> + =A0 =A0 =A0 =A0 =A0 =A0 memory-controller@2000 {
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D "fsl,8555-memor=
y-controller";
>
> fsl,mpc8555?
Ah, yes -- it seems the dts I used for an example also has this
problem. In drivers/edac/mpc85xx_edac.c, bindings still work for
fsl,85.. style notation, but a comment claims that this notation would
be deprecated at some point (2.6.29 or 2.6.30). I have updated my
local copy and it works fine, should I send a new patch? I could also
extend this change to the other DTS files affected (A quick search
found 14 instances of fsl,85.. style notation.) Please let me know
what I should do.
>
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <0x2000 0x1000>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupt-parent =3D <&mpic>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupts =3D <18 2>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 };
>> +
>> + =A0 =A0 =A0 =A0 =A0 =A0 L2: l2-cache-controller@20000 {
>
> fsl,mpc8555?
>
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 compatible =3D "fsl,8555-l2-ca=
che-controller";
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 reg =3D <0x20000 0x1000>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 cache-line-size =3D <32>; // 3=
2 bytes
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 cache-size =3D <0x40000>; // L=
2, 256K
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupt-parent =3D <&mpic>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 interrupts =3D <16 2>;
>> + =A0 =A0 =A0 =A0 =A0 =A0 };
>> +
>
> - k
>
>
>
>
Best Regards,
Bradley
^ permalink raw reply
* Re: [PATCH] DTS: Adding device tree source for the STx GP3 SSA MPC8555-based board.
From: Kumar Gala @ 2010-07-21 14:24 UTC (permalink / raw)
To: Bradley Hughes; +Cc: linuxppc-dev
In-Reply-To: <AANLkTinQkpBTtmVZYGM71wzREHGDzG6R3k7LbR66yX5c@mail.gmail.com>
>
> + soc8555@e0000000 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "soc";
> + compatible = "simple-bus";
> + ranges = <0x0 0xe0000000 0x100000>;
> + bus-frequency = <0>;
> +
> + ecm-law@0 {
> + compatible = "fsl,ecm-law";
> + reg = <0x0 0x1000>;
> + fsl,num-laws = <8>;
> + };
> +
> + ecm@1000 {
> + compatible = "fsl,mpc8555-ecm", "fsl,ecm";
> + reg = <0x1000 0x1000>;
> + interrupts = <17 2>;
> + interrupt-parent = <&mpic>;
> + };
> +
> + memory-controller@2000 {
> + compatible = "fsl,8555-memory-controller";
fsl,mpc8555?
> + reg = <0x2000 0x1000>;
> + interrupt-parent = <&mpic>;
> + interrupts = <18 2>;
> + };
> +
> + L2: l2-cache-controller@20000 {
fsl,mpc8555?
> + compatible = "fsl,8555-l2-cache-controller";
> + reg = <0x20000 0x1000>;
> + cache-line-size = <32>; // 32 bytes
> + cache-size = <0x40000>; // L2, 256K
> + interrupt-parent = <&mpic>;
> + interrupts = <16 2>;
> + };
> +
- k
^ permalink raw reply
* Re: [PATCH 92/92]Documentation/powerpc/booting-without-of.txt update web address.
From: Justin P. Mattock @ 2010-07-21 7:00 UTC (permalink / raw)
To: Michael Neuling
Cc: Jon Loeliger, trivial, linux-doc, linux-kernel, linuxppc-dev,
David Gibson
In-Reply-To: <26726.1279692440@neuling.org>
On 07/20/2010 11:07 PM, Michael Neuling wrote:
>>> The patch below fixes a broken web address.
>>>
>>> Signed-off-by: Justin P. Mattock<justinmattock@gmail.com>
>>>
>>> ---
>>> Documentation/powerpc/booting-without-of.txt | 2 +-
>>> 1 files changed, 1 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/p
> ow
>> erpc/booting-without-of.txt
>>> index 46d2210..7882a10 100644
>>> --- a/Documentation/powerpc/booting-without-of.txt
>>> +++ b/Documentation/powerpc/booting-without-of.txt
>>> @@ -1048,7 +1048,7 @@ IV - "dtc", the device tree compiler
>>>
>>>
>>> dtc source code can be found at
>>> -<http://ozlabs.org/~dgibson/dtc/dtc.tar.gz>
>>> +<http://ozlabs.org/>
>>
>> I think this link should really be:
>> git clone git://www.jdl.com/software/dtc.git/
>
> Actually, maybe this instead?
>
> http://git.jdl.com/gitweb/?p=dtc.git
>
> Mikey
>
cool thanks.. I resent..
Justin P. Mattock
^ permalink raw reply
* Re: [PATCH 92/92]Documentation/powerpc/booting-without-of.txt update web address.
From: Michael Neuling @ 2010-07-21 6:07 UTC (permalink / raw)
To: Justin P. Mattock, trivial, linux-doc, David Gibson, linuxppc-dev,
linux-kernel, Jon Loeliger
In-Reply-To: <26080.1279691826@neuling.org>
> > The patch below fixes a broken web address.
> >
> > Signed-off-by: Justin P. Mattock <justinmattock@gmail.com>
> >
> > ---
> > Documentation/powerpc/booting-without-of.txt | 2 +-
> > 1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/p
ow
> erpc/booting-without-of.txt
> > index 46d2210..7882a10 100644
> > --- a/Documentation/powerpc/booting-without-of.txt
> > +++ b/Documentation/powerpc/booting-without-of.txt
> > @@ -1048,7 +1048,7 @@ IV - "dtc", the device tree compiler
> >
> >
> > dtc source code can be found at
> > -<http://ozlabs.org/~dgibson/dtc/dtc.tar.gz>
> > +<http://ozlabs.org/>
>
> I think this link should really be:
> git clone git://www.jdl.com/software/dtc.git/
Actually, maybe this instead?
http://git.jdl.com/gitweb/?p=dtc.git
Mikey
^ permalink raw reply
* Re: one more question about dts
From: Grant Likely @ 2010-07-21 2:59 UTC (permalink / raw)
To: hacklu; +Cc: linuxppc-dev
In-Reply-To: <201007211037566748594@gmail.com>
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oKCgoKCgoKCgoKCgoKCgI2ludGVycnVwdC1jZWxsc6A9oDwxPjsKPiCgoKCgoKCgoKCgoKCgoKCg
oKCgoKCgoKBpbnRlcnJ1cHQtY29udHJvbGxlcjsKPiCgoKCgoKCgoKCgoKCgoKCgoKCgoKCgoKBy
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PaA8JlBJQz47Cj4goKCgoKCgoKCgoKCgoKCgoKCgoKCgoKCgaW50ZXJydXB0c6A9oDwxNKA4PjsK
PiCgoKCgoKCgoKCgoKCgoKCgfTsKPgo+IHRoYW5rcyBmb3IgYW5zd2VyaW5nfgo+IDIwMTAtMDct
MjEKPiBfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fXwo+IGhhY2tsdQoKCgotLSAKR3Jh
bnQgTGlrZWx5LCBCLlNjLiwgUC5FbmcuClNlY3JldCBMYWIgVGVjaG5vbG9naWVzIEx0ZC4K
^ permalink raw reply
* one more question about dts
From: hacklu @ 2010-07-21 2:37 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 1291 bytes --]
my board is mpc8247,and i write it's dts by imitating mpc8272's dts
how can i set the localbus address?
localbus@f0010100 {
compatible = "fsl,mpc8272-localbus",
"fsl,pq2-localbus";
#address-cells = <2>;
#size-cells = <1>;
reg = <f0010100 40>;
ranges = <
0 0 70000000 1000000 #my flash1
1 0 71000000 1000000 #my flash2
2 ? ??????? ??????? #how to set it for board-control?
3 ? ???? ???? # how to set it for pci_pic >;
....
board-control@2,0 {
reg = <1 0 20>;
compatible = "fsl,mpc8272ads-bcsr";
};
PCI_PIC: interrupt-controller@3,0 {
compatible = "fsl,mpc8272ads-pci-pic",
"fsl,pq2ads-pci-pic";
#interrupt-cells = <1>;
interrupt-controller;
reg = <3 0 8>;
interrupt-parent = <&PIC>;
interrupts = <14 8>;
};
thanks for answering~
2010-07-21
hacklu
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^ permalink raw reply
* Re: [PATCH] math-emu: correct test for downshifting fraction in _FP_FROM_INT()
From: David Miller @ 2010-07-21 1:45 UTC (permalink / raw)
To: mikpe
Cc: linux-s390, linux-sh, linux-kernel, linuxppc-dev, linux-alpha,
sparclinux
In-Reply-To: <19524.51858.992299.119315@pilspetsen.it.uu.se>
From: Mikael Pettersson <mikpe@it.uu.se>
Date: Mon, 19 Jul 2010 23:58:42 +0200
> The kernel's math-emu code contains a macro _FP_FROM_INT() which is
> used to convert an integer to a raw normalized floating-point value.
> It does this basically in three steps:
...
> The fix is simple: the exponent comparison used to determine if the
> fraction should be downshifted must be "<=" not "<".
>
> I'm sending a kernel module to test this as a reply to this message.
> There are also SPARC user-space test cases in the GCC bug entry.
>
> Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Applied and I'll make sure this gets into -stable too.
Thanks!
^ permalink raw reply
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