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* [PATCH] powerpc: Add support for Virtual Processor Home Node (VPHN)
From: Jesse Larrew @ 2010-10-16 19:45 UTC (permalink / raw)
  To: linuxppc-dev
  Cc: markn, antonb, pmac, Tony Breeds, lkessler, jlarrew,
	Michael J Wolf

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From: Jesse Larrew <jlarrew@linux.vnet.ibm.com>

The SPLPAR option allows the platform to dispatch virtual processors on
physical processors that, due to the variable nature of work loads, are
temporarily free, thus improving the utilization of computing resources.
However, SPLPAR implies inconsistent mapping of virtual to physical
processors, thus defeating resource allocation software that attempts to
optimize performance on platforms that implement the NUMA option.

To bridge the gap between these two options, the VPHN option maintain a
substantially consistent mapping of a given virtual processor to a physical
processor or set of processors within a given associativity domain. When
allocating computing resources, the kernel can take advantage of this
statistically consistent mapping to improve processing performance.

VPHN mappings are substantially consistent but not static. For any given
dispatch cycle, a best effort is made by the hypervisor to dispatch the
virtual processor on a physical processor within a targeted associativity
domain (the virtual processor's home node). However, if processing capacity
within the home node is not available, some other physical processor is
assigned to meet the processing capacity entitlement. From time to time,
to optimize the total platform performance, it may be necessary for the
platform to change the home node of a given virtual processor.

The Virtual Processor Home Node feature addresses this by adding the
H_HOME_NODE_ASSOCIATIVITY hcall to retrieve the current associativity
domain information directly from the hypervisor for a given virtual
processor's home node. It also exposes a set of associativity change
counters in the Virtual Processor Area (VPA) of each processor to indicate
when associativity changes occur.

This patch sets a timer during boot that will periodically poll the
associativity change counters. When a change in associativity is detected,
it retrieves the new associativity domain information via the
H_HOME_NODE_ASSOCIATIVITY hcall and updates the NUMA node maps and sysfs
entries accordingly. The polling mechanism is also tied into the
ibm,suspend-me rtas call to stop/restart polling before/after a suspend,
hibernate, migrate, or checkpoint restart operation.

Signed-off-by: Jesse Larrew <jlarrew@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/firmware.h       |    3 +-
 arch/powerpc/include/asm/hvcall.h         |    3 +-
 arch/powerpc/include/asm/lppaca.h         |    5 +-
 arch/powerpc/include/asm/topology.h       |    6 +-
 arch/powerpc/kernel/rtas.c                |   15 ++
 arch/powerpc/mm/numa.c                    |  274 +++++++++++++++++++++++++++-
 arch/powerpc/platforms/pseries/firmware.c |    1 +
 7 files changed, 293 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h
index 20778a4..4ef662e 100644
--- a/arch/powerpc/include/asm/firmware.h
+++ b/arch/powerpc/include/asm/firmware.h
@@ -46,6 +46,7 @@
 #define FW_FEATURE_PS3_LV1	ASM_CONST(0x0000000000800000)
 #define FW_FEATURE_BEAT		ASM_CONST(0x0000000001000000)
 #define FW_FEATURE_CMO		ASM_CONST(0x0000000002000000)
+#define FW_FEATURE_VPHN		ASM_CONST(0x0000000004000000)
 
 #ifndef __ASSEMBLY__
 
@@ -59,7 +60,7 @@ enum {
 		FW_FEATURE_VIO | FW_FEATURE_RDMA | FW_FEATURE_LLAN |
 		FW_FEATURE_BULK_REMOVE | FW_FEATURE_XDABR |
 		FW_FEATURE_MULTITCE | FW_FEATURE_SPLPAR | FW_FEATURE_LPAR |
-		FW_FEATURE_CMO,
+		FW_FEATURE_CMO | FW_FEATURE_VPHN,
 	FW_FEATURE_PSERIES_ALWAYS = 0,
 	FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES | FW_FEATURE_LPAR,
 	FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR,
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h
index de03ca5..6de1e5f 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -232,7 +232,8 @@
 #define H_GET_EM_PARMS		0x2B8
 #define H_SET_MPP		0x2D0
 #define H_GET_MPP		0x2D4
-#define MAX_HCALL_OPCODE	H_GET_MPP
+#define H_HOME_NODE_ASSOCIATIVITY 0x2EC
+#define MAX_HCALL_OPCODE	H_HOME_NODE_ASSOCIATIVITY
 
 #ifndef __ASSEMBLY__
 
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 14b592d..cc07d7f 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -62,7 +62,10 @@ struct lppaca {
 	volatile u32 dyn_pir;		// Dynamic ProcIdReg value	x20-x23
 	u32	dsei_data;           	// DSEI data                  	x24-x27
 	u64	sprg3;               	// SPRG3 value                	x28-x2F
-	u8	reserved3[80];		// Reserved			x30-x7F
+	u8	reserved3[40];		// Reserved			x30-x57
+	volatile u8 vphn_assoc_counts[8]; // Virtual processor home node
+					// associativity change counters x58-x5F
+	u8	reserved4[32];		// Reserved			x60-x7F
 
 //=============================================================================
 // CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
index afe4aaa..1747d27 100644
--- a/arch/powerpc/include/asm/topology.h
+++ b/arch/powerpc/include/asm/topology.h
@@ -49,7 +49,7 @@ static inline int pcibus_to_node(struct pci_bus *bus)
 {
 	return -1;
 }
-#endif
+#endif /* CONFIG_PCI */
 
 #define cpumask_of_pcibus(bus)	(pcibus_to_node(bus) == -1 ?		\
 				 cpu_all_mask :				\
@@ -93,6 +93,8 @@ extern void __init dump_numa_cpu_topology(void);
 extern int sysfs_add_device_to_node(struct sys_device *dev, int nid);
 extern void sysfs_remove_device_from_node(struct sys_device *dev, int nid);
 
+extern int __init init_topology_update(void);
+extern int stop_topology_update(void);
 #else
 
 static inline void dump_numa_cpu_topology(void) {}
@@ -107,6 +109,8 @@ static inline void sysfs_remove_device_from_node(struct sys_device *dev,
 {
 }
 
+static int __init init_topology_update(void) {}
+static int stop_topology_update(void) {}
 #endif /* CONFIG_NUMA */
 
 #include <asm-generic/topology.h>
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 41048de..abfcdc7 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -41,6 +41,7 @@
 #include <asm/atomic.h>
 #include <asm/time.h>
 #include <asm/mmu.h>
+#include <asm/topology.h>
 
 struct rtas_t rtas = {
 	.lock = __ARCH_SPIN_LOCK_UNLOCKED
@@ -706,6 +707,18 @@ void rtas_os_term(char *str)
 
 static int ibm_suspend_me_token = RTAS_UNKNOWN_SERVICE;
 #ifdef CONFIG_PPC_PSERIES
+static void pre_suspend_work(void)
+{
+	stop_topology_update();
+	return;
+}
+
+static void post_suspend_work(void)
+{
+	init_topology_update();
+	return;
+}
+
 static int __rtas_suspend_last_cpu(struct rtas_suspend_me_data *data, int wake_when_done)
 {
 	u16 slb_size = mmu_slb_size;
@@ -713,6 +726,7 @@ static int __rtas_suspend_last_cpu(struct rtas_suspend_me_data *data, int wake_w
 	int cpu;
 
 	slb_set_size(SLB_MIN_SIZE);
+	pre_suspend_work();
 	printk(KERN_DEBUG "calling ibm,suspend-me on cpu %i\n", smp_processor_id());
 
 	while (rc == H_MULTI_THREADS_ACTIVE && !atomic_read(&data->done) &&
@@ -728,6 +742,7 @@ static int __rtas_suspend_last_cpu(struct rtas_suspend_me_data *data, int wake_w
 		rc = atomic_read(&data->error);
 
 	atomic_set(&data->error, rc);
+	post_suspend_work();
 
 	if (wake_when_done) {
 		atomic_set(&data->done, 1);
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 002878c..c182c2d 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -20,10 +20,14 @@
 #include <linux/memblock.h>
 #include <linux/of.h>
 #include <linux/pfn.h>
+#include <linux/cpuset.h>
+#include <linux/node.h>
 #include <asm/sparsemem.h>
 #include <asm/prom.h>
 #include <asm/system.h>
 #include <asm/smp.h>
+#include <asm/firmware.h>
+#include <asm/paca.h>
 
 static int numa_enabled = 1;
 
@@ -246,32 +250,41 @@ static void initialize_distance_lookup_table(int nid,
 /* Returns nid in the range [0..MAX_NUMNODES-1], or -1 if no useful numa
  * info is found.
  */
-static int of_node_to_nid_single(struct device_node *device)
+static int associativity_to_nid(const unsigned int *associativity)
 {
 	int nid = -1;
-	const unsigned int *tmp;
 
 	if (min_common_depth == -1)
 		goto out;
 
-	tmp = of_get_associativity(device);
-	if (!tmp)
-		goto out;
-
-	if (tmp[0] >= min_common_depth)
-		nid = tmp[min_common_depth];
+	if (associativity[0] >= min_common_depth)
+		nid = associativity[min_common_depth];
 
 	/* POWER4 LPAR uses 0xffff as invalid node */
 	if (nid == 0xffff || nid >= MAX_NUMNODES)
 		nid = -1;
 
-	if (nid > 0 && tmp[0] >= distance_ref_points_depth)
-		initialize_distance_lookup_table(nid, tmp);
+	if (nid > 0 && associativity[0] >= distance_ref_points_depth)
+		initialize_distance_lookup_table(nid, associativity);
 
 out:
 	return nid;
 }
 
+/* Returns the nid associated with the given device tree node,
+ * or -1 if not found.
+ */
+static int of_node_to_nid_single(struct device_node *device)
+{
+	int nid = -1;
+	const unsigned int *tmp;
+
+	tmp = of_get_associativity(device);
+	if (tmp)
+		nid = associativity_to_nid(tmp);
+	return nid;
+}
+
 /* Walk the device tree upwards, looking for an associativity id */
 int of_node_to_nid(struct device_node *device)
 {
@@ -1247,3 +1260,244 @@ int hot_add_scn_to_nid(unsigned long scn_addr)
 }
 
 #endif /* CONFIG_MEMORY_HOTPLUG */
+
+/* Vrtual Processor Home Node (VPHN) support */
+#define VPHN_NR_CHANGE_CTRS (8)
+static u8 vphn_cpu_change_counts[NR_CPUS][VPHN_NR_CHANGE_CTRS];
+static cpumask_t cpu_associativity_changes_mask;
+static void topology_work_fn(struct work_struct *work);
+static DECLARE_WORK(topology_work, topology_work_fn);
+static void topology_timer_fn(unsigned long ignored);
+static struct timer_list topology_timer =
+	TIMER_INITIALIZER(topology_timer_fn, 0, 0);
+
+static void set_topology_timer(void);
+int stop_topology_update(void);
+
+/*
+ * Store the current values of the associativity change counters in the
+ * hypervisor.
+ */
+static void setup_cpu_associativity_change_counters(void)
+{
+	int cpu = 0;
+
+	for_each_possible_cpu(cpu) {
+		int i = 0;
+		u8 *counts = vphn_cpu_change_counts[cpu];
+		volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
+
+		for (i = 0; i < VPHN_NR_CHANGE_CTRS; i++) {
+			counts[i] = hypervisor_counts[i];
+		}
+	}
+
+	return;
+}
+
+/*
+ * The hypervisor maintains a set of 8 associativity change counters in
+ * the VPA of each cpu that correspond to the associativity levels in the
+ * ibm,associativity-reference-points property. When an associativity
+ * level changes, the corresponding counter is incremented.
+ *
+ * Set a bit in cpu_associativity_changes_mask for each cpu whose home
+ * node associativity levels have changed.
+ */
+static void update_cpu_associativity_changes_mask(void)
+{
+	int cpu = 0;
+	cpumask_t *changes = &cpu_associativity_changes_mask;
+
+	cpumask_clear(changes);
+
+	for_each_possible_cpu(cpu) {
+		int i;
+		u8 *counts = vphn_cpu_change_counts[cpu];
+		volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
+
+		for (i = 0; i < VPHN_NR_CHANGE_CTRS; i++) {
+			if (hypervisor_counts[i] > counts[i]) {
+				counts[i] = hypervisor_counts[i];
+
+				if (!(cpumask_test_cpu(cpu, changes)))
+					cpumask_set_cpu(cpu, changes);
+			}
+		}
+	}
+
+	return;
+}
+
+/* 6 64-bit registers unpacked into 12 32-bit associativity values */
+#define VPHN_ASSOC_BUFSIZE (6*sizeof(u64)/sizeof(u32))
+
+/*
+ * Convert the associativity domain numbers returned from the hypervisor
+ * to the sequence they would appear in the ibm,associativity property.
+ */
+static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
+{
+	int i = 0;
+	int nr_assoc_doms = 0;
+	const u16 *field = (const u16*) packed;
+
+#define VPHN_FIELD_UNUSED	(0xffff)
+#define VPHN_FIELD_MSB		(0x8000)
+#define VPHN_FIELD_MASK		(~VPHN_FIELD_MSB)
+
+	for (i = 0; i < VPHN_ASSOC_BUFSIZE; i++) {
+		if (*field == VPHN_FIELD_UNUSED) {
+			/* All significant fields processed, and remaining
+			 * fields contain the reserved value of all 1's.
+			 * Just store them.
+			 */
+			unpacked[i] = *((u32*)field);
+			field += 2;
+		}
+		else if (*field & VPHN_FIELD_MSB) {
+			/* Data is in the lower 15 bits of this field */
+			unpacked[i] = *field & VPHN_FIELD_MASK;
+			field++;
+			nr_assoc_doms++;
+		}
+		else {
+			/* Data is in the lower 15 bits of this field
+			 * concatenated with the next 16 bit field
+			 */
+			unpacked[i] = *((u32*)field);
+			field += 2;
+			nr_assoc_doms++;
+		}
+	}
+
+	return nr_assoc_doms;
+}
+
+/*
+ * Retrieve the new associativity information for a virtual processor's
+ * home node.
+ */
+static long hcall_vphn(unsigned long cpu, unsigned int *associativity)
+{
+	long rc = 0;
+	long retbuf[PLPAR_HCALL9_BUFSIZE] = {0};
+	u64 flags = 1;
+	int hwcpu = get_hard_smp_processor_id(cpu);
+
+	rc = plpar_hcall9(H_HOME_NODE_ASSOCIATIVITY, retbuf, flags, hwcpu);
+	vphn_unpack_associativity(retbuf, associativity);
+
+	return rc;
+}
+
+static long
+vphn_get_associativity(unsigned long cpu, unsigned int *associativity)
+{
+	long rc = 0;
+
+	rc = hcall_vphn(cpu, associativity);
+
+	switch (rc) {
+	case H_FUNCTION:
+		printk(KERN_INFO
+			"VPHN is not supported. Disabling polling...\n");
+		stop_topology_update();
+		break;
+	case H_HARDWARE:
+		printk(KERN_ERR
+			"hcall_vphn() experienced a hardware fault "
+			"preventing VPHN. Disabling polling...\n");
+		stop_topology_update();
+	}
+
+	return rc;
+}
+
+/*
+ * Update the node maps and sysfs entries for each cpu whose home node
+ * has changed.
+ */
+int arch_update_cpu_topology(void)
+{
+	int cpu = 0, nid = 0, old_nid = 0;
+	unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
+	struct sys_device *sysdev = NULL;
+
+	for_each_cpu_mask(cpu, cpu_associativity_changes_mask) {
+		vphn_get_associativity(cpu, associativity);
+		nid = associativity_to_nid(associativity);
+
+		if (nid < 0 || !node_online(nid))
+			nid = first_online_node;
+
+		old_nid = numa_cpu_lookup_table[cpu];
+
+		/* Disable hotplug while we update the cpu
+		 * masks and sysfs.
+		 */
+		get_online_cpus();
+		unregister_cpu_under_node(cpu, old_nid);
+		unmap_cpu_from_node(cpu);
+		map_cpu_to_node(cpu, nid);
+		register_cpu_under_node(cpu, nid);
+		put_online_cpus();
+
+		sysdev = get_cpu_sysdev(cpu);
+		if (sysdev)
+			kobject_uevent(&sysdev->kobj, KOBJ_CHANGE);
+	}
+
+	return 1;
+}
+
+static void topology_work_fn(struct work_struct *work)
+{
+	rebuild_sched_domains();
+}
+
+void topology_schedule_update(void)
+{
+	schedule_work(&topology_work);
+}
+
+static void topology_timer_fn(unsigned long ignored)
+{
+	update_cpu_associativity_changes_mask();
+	if (!cpumask_empty(&cpu_associativity_changes_mask))
+		topology_schedule_update();
+	set_topology_timer();
+}
+
+static void set_topology_timer(void)
+{
+	topology_timer.data = 0;
+	topology_timer.expires = jiffies + 60 * HZ;
+	add_timer(&topology_timer);
+}
+
+/*
+ * Start polling for VPHN associativity changes.
+ */
+int __init init_topology_update(void)
+{
+	int rc = 0;
+
+	if (firmware_has_feature(FW_FEATURE_VPHN)) {
+		setup_cpu_associativity_change_counters();
+		init_timer_deferrable(&topology_timer);
+		set_topology_timer();
+		rc = 1;
+	}
+
+	return rc;
+}
+__initcall(init_topology_update);
+
+/*
+ * Disable polling for VPHN associativity changes.
+ */
+int stop_topology_update(void)
+{
+	return del_timer(&topology_timer);
+}
diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c
index 0a14d8c..0b0eff0 100644
--- a/arch/powerpc/platforms/pseries/firmware.c
+++ b/arch/powerpc/platforms/pseries/firmware.c
@@ -55,6 +55,7 @@ firmware_features_table[FIRMWARE_MAX_FEATURES] = {
 	{FW_FEATURE_XDABR,		"hcall-xdabr"},
 	{FW_FEATURE_MULTITCE,		"hcall-multi-tce"},
 	{FW_FEATURE_SPLPAR,		"hcall-splpar"},
+	{FW_FEATURE_VPHN,		"hcall-vphn"},
 };
 
 /* Build up the firmware features bitmask using the contents of
-- 
1.7.2.3


^ permalink raw reply related

* Re: [patch] ps3disk: passing wrong variable to bvec_kunmap_irq()
From: Geert Uytterhoeven @ 2010-10-16 19:39 UTC (permalink / raw)
  To: Jens Axboe
  Cc: cbe-oss-dev@lists.ozlabs.org, Dan Carpenter, Martin K. Petersen,
	Geoff Levand, kernel-janitors@vger.kernel.org, FUJITA Tomonori,
	linuxppc-dev@lists.ozlabs.org
In-Reply-To: <4CB3689F.1050601@fusionio.com>

On Mon, Oct 11, 2010 at 21:42, Jens Axboe <jaxboe@fusionio.com> wrote:
> On 2010-10-11 21:13, Dan Carpenter wrote:
>> This should pass "buf" to bvec_kunmap_irq() instead of "bv". =C2=A0The a=
pi is
>> like kmap_atomic() instead of kmap().
>>
>> Signed-off-by: Dan Carpenter <error27@gmail.com>
>>
>> diff --git a/drivers/block/ps3disk.c b/drivers/block/ps3disk.c
>> index e9da874..03688c2 100644
>> --- a/drivers/block/ps3disk.c
>> +++ b/drivers/block/ps3disk.c
>> @@ -113,7 +113,7 @@ static void ps3disk_scatter_gather(struct ps3_storag=
e_device *dev,
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 memcpy(buf, dev->bounce_buf+offset, size);
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 offset +=3D size;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 flush_kernel_dcache_pag=
e(bvec->bv_page);
>> - =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 bvec_kunmap_irq(bvec, &flags=
);
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 bvec_kunmap_irq(buf, &flags)=
;
>> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 i++;
>> =C2=A0 =C2=A0 =C2=A0 }
>> =C2=A0}
>
> Thanks applied, that bug is all too common.

Because  bvec_kunmap_irq() is a macro if !CONFIG_HIGHMEM, and thus there's =
no
argument type checking on e.g. pp64, which doesn't support HIGHMEM?

What about turning it into an inline function?

Gr{oetje,eeting}s,

=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k=
.org

In personal conversations with technical people, I call myself a hacker. Bu=
t
when I'm talking to journalists I just say "programmer" or something like t=
hat.
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0 =C2=A0=C2=A0 =C2=A0=C2=A0 -- Linus Torvalds

^ permalink raw reply

* Re: [PATCH v4 5/5] mtd: m25p80: add support to parse the partitions by OF node
From: Artem Bityutskiy @ 2010-10-16 19:17 UTC (permalink / raw)
  To: Mingkai Hu
  Cc: david-b, kumar.gala, linuxppc-dev, linux-mtd, spi-devel-general
In-Reply-To: <1286878714-13090-6-git-send-email-Mingkai.hu@freescale.com>

On Tue, 2010-10-12 at 18:18 +0800, Mingkai Hu wrote:
> Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---
> v4:
>  - Updated to latest kernel base(Linux 2.6.36-rc7).
>  - Made changes according to Grant's comments.

Looks good to me, pushed to l2-mtd-2.6.git, thanks.

-- 
Best Regards,
Artem Bityutskiy (Битюцкий Артём)

^ permalink raw reply

* Wher to find gcc-3.3.1-crossppc.diff
From: Ramón Frutos Sánchez @ 2010-10-16 19:13 UTC (permalink / raw)
  To: linuxppc-dev

Thank you very much, Lorenz

^ permalink raw reply

* Re: Wher to find gcc-3.3.1-crossppc.diff
From: Lorenz Kolb @ 2010-10-16 17:00 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <1287246649.10014.1.camel@linux-oduc.site>

Asking google came up with:

http://osdir.com/ml/linux.ports.ppc.embedded/2004-02/msg00040.html
Which again points to: http://osdir.com/ml/attachments/txtvjVqHGcB6G.txt

Hope this helps.

Am 16.10.2010 18:30, schrieb Ramón Frutos Sánchez:
> Helo, I'm looking for the patch gcc-3.3.1-crossppc.diff but it seems to
> be disapeared from penguinppc web, does anybody know where to find it?
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>    

^ permalink raw reply

* Wher to find gcc-3.3.1-crossppc.diff
From: Ramón Frutos Sánchez @ 2010-10-16 16:30 UTC (permalink / raw)
  To: linuxppc-dev

Helo, I'm looking for the patch gcc-3.3.1-crossppc.diff but it seems to
be disapeared from penguinppc web, does anybody know where to find it?

^ permalink raw reply

* Help about chip select on SPI slave devices
From: WANG YiFei @ 2010-10-16 10:35 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <BAY158-ds2BEE228C7E27E7CE0C28BF5550@phx.gbl>

Hi,

We have a board which has 1 SPI master controller and 4 SPI slave =
devices, and we'd like to use 2 GPIOs to demux to chip select these =
slave devices.
Can anyone tell me if current powerpc dts support demuxer for chip =
select for spi slave devices? So far as I know, in dts, SPI master can =
only use 1 to 1 GPIO to CS(then needs 4 GPIOs).


Thanks in advance,
YiFei

^ permalink raw reply

* 64K PAGE_SIZE and arch/powerpc/kernel/vdso.c
From: Nicholas A. Bellinger @ 2010-10-16  8:03 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Brian King

Greetings Linux-ppc64 folks,

While trying to compile v2.6.36-rc8 with PAGE_SIZE=65536 I run into the
following compile failure w/ strict checking on a RHEL5.4 / gcc (GCC)
4.1.2 20080704 (Red Hat 4.1.2-46) system:

cc1: warnings being treated as errors
arch/powerpc/kernel/vdso.c:81: warning: alignment of ‘vdso_data_store’
is greater than maximum object file alignment.  Using 32768
  CC      arch/powerpc/sysdev/msi_bitmap.o
make[1]: *** [arch/powerpc/kernel/vdso.o] Error 1
make[1]: *** Waiting for unfinished jobs....

Any ideas folks..?

TIA,

--nab

^ permalink raw reply

* Re: [PATCH] powerpc/5121: pdm360ng: fix touch irq if 8xxx gpio driver is enabled
From: Grant Likely @ 2010-10-16  3:52 UTC (permalink / raw)
  To: Anatolij Gustschin; +Cc: linuxppc-dev
In-Reply-To: <20101014165549.473d71ab@wker>

On Thu, Oct 14, 2010 at 04:55:49PM +0200, Anatolij Gustschin wrote:
> Hi Grant,
> 
> On Wed, 15 Sep 2010 22:12:57 +0200
> Anatolij Gustschin <agust@denx.de> wrote:
> 
> > Enabling the MPC8xxx GPIO driver with MPC512x GPIO extension
> > breaks touch screen support on this board since the GPIO
> > interrupt will be mapped to 8xxx GPIO irq host resulting in
> > a not requestable interrupt in the touch screen driver. Fix
> > it by mapping the touch interrupt on 8xxx GPIO irq host.
> > 
> > Signed-off-by: Anatolij Gustschin <agust@denx.de>
> > ---
> >  arch/powerpc/platforms/512x/pdm360ng.c |   26 ++++++++++++++++++++++----
> >  1 files changed, 22 insertions(+), 4 deletions(-)
> 
> Can this patch go in for 2.6.37 ?

I hope so, but I haven't looked at it properly yet and I'm trying to
dig myself out of a patch backlog.

g.

^ permalink raw reply

* [PATCH] Drivers: ps3: Makefile: replace the use of <module>-objs with <module>-y
From: Tracey Dent @ 2010-10-16  3:30 UTC (permalink / raw)
  To: geoff; +Cc: Tracey Dent, linuxppc-dev, linux-kernel

Changed <module>-objs to <module>-y in Makefile.

Signed-off-by: Tracey Dent <tdent48227@gmail.com>
---
 drivers/ps3/Makefile |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/drivers/ps3/Makefile b/drivers/ps3/Makefile
index ccea15c..50cb1e1 100644
--- a/drivers/ps3/Makefile
+++ b/drivers/ps3/Makefile
@@ -1,6 +1,6 @@
 obj-$(CONFIG_PS3_VUART) += ps3-vuart.o
 obj-$(CONFIG_PS3_PS3AV) += ps3av_mod.o
-ps3av_mod-objs		+= ps3av.o ps3av_cmd.o
+ps3av_mod-y		:= ps3av.o ps3av_cmd.o
 obj-$(CONFIG_PPC_PS3) += sys-manager-core.o
 obj-$(CONFIG_PS3_SYS_MANAGER) += ps3-sys-manager.o
 obj-$(CONFIG_PS3_STORAGE) += ps3stor_lib.o
-- 
1.7.3.1.104.gc752e

^ permalink raw reply related

* Re: [PATCH] mxc_udc: add workaround for ENGcm09152 for i.MX35
From: Eric Bénard @ 2010-10-15 19:24 UTC (permalink / raw)
  To: Greg KH
  Cc: dbrownell, Dinh.Nguyen, linux-usb, linux-kernel, linuxppc-dev,
	gregkh, linux-arm-kernel
In-Reply-To: <20101015191005.GB8098@kroah.com>

Hi Greg,

Le 15/10/2010 21:10, Greg KH a écrit :
> On Fri, Oct 15, 2010 at 02:30:58PM +0200, Eric Bénard wrote:
>> this patch gives the possibility to workaround bug ENGcm09152
>> on i.MX35 when the hardware workaround is also implemented on
>> the board.
>> It covers the workaround described on page 25 of the following Errata :
>> http://cache.freescale.com/files/dsp/doc/errata/IMX35CE.pdf
>>
>> Signed-off-by: Eric Bénard<eric@eukrea.com>
>> ---
>>   arch/arm/mach-mx3/mach-cpuimx35.c |    1 +
>>   drivers/usb/gadget/fsl_mxc_udc.c  |   15 +++++++++++++++
>>   include/linux/fsl_devices.h       |    3 +++
>>   3 files changed, 19 insertions(+), 0 deletions(-)
>
> Do you want me to take this through my usb tree, or will it go through
> some other developer's tree?
>
as most of the changes are in drivers/usb that would be great if you can take it.

Thanks
Eric

^ permalink raw reply

* Re: [PATCH] mxc_udc: add workaround for ENGcm09152 for i.MX35
From: Greg KH @ 2010-10-15 19:10 UTC (permalink / raw)
  To: Eric Bénard
  Cc: dbrownell, Dinh.Nguyen, linux-usb, linux-kernel, linuxppc-dev,
	gregkh, linux-arm-kernel
In-Reply-To: <1287145858-10239-1-git-send-email-eric@eukrea.com>

On Fri, Oct 15, 2010 at 02:30:58PM +0200, Eric Bénard wrote:
> this patch gives the possibility to workaround bug ENGcm09152
> on i.MX35 when the hardware workaround is also implemented on
> the board.
> It covers the workaround described on page 25 of the following Errata :
> http://cache.freescale.com/files/dsp/doc/errata/IMX35CE.pdf 
> 
> Signed-off-by: Eric Bénard <eric@eukrea.com>
> ---
>  arch/arm/mach-mx3/mach-cpuimx35.c |    1 +
>  drivers/usb/gadget/fsl_mxc_udc.c  |   15 +++++++++++++++
>  include/linux/fsl_devices.h       |    3 +++
>  3 files changed, 19 insertions(+), 0 deletions(-)

Do you want me to take this through my usb tree, or will it go through
some other developer's tree?

Either is fine with me.

thanks,

greg k-h

^ permalink raw reply

* Re: Possible kernel stack overflow due to fast interrupts
From: Rick Tao @ 2010-10-15 19:13 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1287100633.2205.80.camel@pasglop>

You are exactly right! Ensuring interrupts would not cause more preemptions=
. =0AThanks for pointing it out.=0ARick=0A=0A--- On Thu, 10/14/10, Benjamin=
 Herrenschmidt <benh@kernel.crashing.org> wrote:=0A=0A> From: Benjamin Herr=
enschmidt <benh@kernel.crashing.org>=0A> Subject: Re: Possible kernel stack=
 overflow due to fast interrupts=0A> To: "Rick Tao" <tao_rick@yahoo.com>=0A=
> Cc: linuxppc-dev@lists.ozlabs.org=0A> Date: Thursday, October 14, 2010, 4=
:57 PM=0A> On Thu, 2010-10-14 at 13:45 -0700,=0A> Rick Tao wrote:=0A> > Hi,=
 all,=0A> =0A>  .../...=0A> =0A> > In the context of task A=0A> > a. NIP wo=
uld point to the instruction after=0A> switch_to(). =0A> > b. MSR_EE is ena=
bled in the call trace=0A> (finish_task_switch=0A> -->finish_lock_switch-->=
spin_unlock_irq)=0A> > c. do something that would trigger an interrupt late=
r=0A> on (such as timer)=0A> > d. call schedule() for context switch to tas=
k B.=0A> >=A0 =A0 In this step, =0A> >=A0 =A0 =A0 task B's stack is popped=
=0A> INT_FRAME_SIZE size for context restore.=A0 =0A> >=A0 =A0 Note that ta=
sk B's ksp =3D X -=0A> INT_FRAME_SIZE=0A> > =0A> > In the context of task B=
 again=0A> > a1. similar to step "a" above=0A> >=0A> > b1. similar to step =
"b" above =0A> > c1. interrupt occurs, go to step "1" above, and=0A> repeat=
!!!=0A> > =0A> > As you can see, task B's kernel stack space is reduced=0A>=
 by INT_FRAME_SIZE=0A> > on each loop. It will eventually overflow.=0A> =0A=
> So if I follow you correctly, you are worried that by the=0A> time execut=
ion=0A> resumes in B, and before it pops the second frame off, it=0A> might=
 get=0A> another interrupt and re-preempt...=0A> =0A> Now unless I missed s=
omething, that cannot happen because=0A> preempt_schedule_irq() does increm=
ent the preempt count:=0A> =0A> =A0=A0=A0 add_preempt_count(PREEMPT_ACTIVE)=
;=0A> =A0=A0=A0 local_irq_enable();=0A> =A0=A0=A0 schedule();=0A> =A0=A0=A0=
 local_irq_disable();=0A> =A0=A0=A0 sub_preempt_count(PREEMPT_ACTIVE);=0A> =
=0A> Which means that it won't preempt again in=0A> finish_task_switch, and=
 so=0A> will eventually come back, turn EE back off, and pop off=0A> the st=
ack=0A> frame.=0A> =0A> Or am I missing something ?=0A> =0A> Cheers,=0A> Be=
n.=0A> =0A> =0A> _______________________________________________=0A> Linuxp=
pc-dev mailing list=0A> Linuxppc-dev@lists.ozlabs.org=0A> https://lists.ozl=
abs.org/listinfo/linuxppc-dev=0A> =0A=0A=0A      

^ permalink raw reply

* [RFC PATCH v3] 476: Set CCR2[DSTI] to prevent isync from flushing shadow TLB
From: Dave Kleikamp @ 2010-10-15 17:33 UTC (permalink / raw)
  To: Josh Boyer, Benjamin Herrenschmidt; +Cc: linuxppc-dev list, Dave Kleikamp

 Josh, don't pick this up yet.  It needs a bit more testing, but I think I
 got it right this time.

When the DSTI (Disable Shadow TLB Invalidate) bit is set in the CCR2
register, the isync command does not flush the shadow TLB (iTLB & dTLB).

However, since the shadow TLB does not contain context information, we
want the shadow TLB flushed in situations where we are switching context.
In those situations, we explicitly clear the DSTI bit before performing
isync, and set it again afterward.  We also need to do the same when we
perform isync after explicitly flushing the TLB.

The 476 requires an isync following a write to certain SPRs in order for
their changes to be effective.  Such is the case with the DSTI bit, so
the first isync may not be affected by an immediate change to CCR2, but
a second isync instruction will repect the setting.

Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
---
 arch/powerpc/include/asm/reg_booke.h  |    4 ++++
 arch/powerpc/kernel/head_44x.S        |   28 ++++++++++++++++++++++++++++
 arch/powerpc/mm/tlb_nohash_low.S      |   24 +++++++++++++++++++++++-
 arch/powerpc/platforms/44x/misc_44x.S |   28 ++++++++++++++++++++++++++++
 4 files changed, 83 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 667a498..a7ecbfe 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -120,6 +120,7 @@
 #define SPRN_TLB3CFG	0x2B3	/* TLB 3 Config Register */
 #define SPRN_EPR	0x2BE	/* External Proxy Register */
 #define SPRN_CCR1	0x378	/* Core Configuration Register 1 */
+#define SPRN_CCR2_476	0x379	/* Core Configuration Register 2 (476)*/
 #define SPRN_ZPR	0x3B0	/* Zone Protection Register (40x) */
 #define SPRN_MAS7	0x3B0	/* MMU Assist Register 7 */
 #define SPRN_MMUCR	0x3B2	/* MMU Control Register */
@@ -188,6 +189,9 @@
 #define	CCR1_DPC	0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */
 #define	CCR1_TCS	0x00000080 /* Timer Clock Select */
 
+/* Bit definitions for CCR2. */
+#define CCR2_476_DSTI	0x08000000 /* Disable Shadow TLB Invalidate */
+
 /* Bit definitions for the MCSR. */
 #define MCSR_MCS	0x80000000 /* Machine Check Summary */
 #define MCSR_IB		0x40000000 /* Instruction PLB Error */
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 562305b..df1ef80 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -38,6 +38,7 @@
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 #include <asm/synch.h>
+#include <asm/bug.h>
 #include "head_booke.h"
 
 
@@ -703,8 +704,29 @@ _GLOBAL(set_context)
 	stw	r4, 0x4(r5)
 #endif
 	mtspr	SPRN_PID,r3
+BEGIN_MMU_FTR_SECTION
+	b	1f
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
 	isync			/* Force context change */
 	blr
+1:
+#ifdef CONFIG_PPC_47x
+	mfspr	r10,SPRN_CCR2_476
+	rlwinm	r11,r10,0,~CCR2_476_DSTI
+	mtspr	SPRN_CCR2_476,r11
+	/*
+	 * The first isync may not respect the change to CCR2, but its
+	 * completion will ensure that the second isync does.
+	 */
+	isync
+	isync			/* Force context change */
+	mtspr	SPRN_CCR2_476,r10
+	isync
+#else /* CONFIG_PPC_47x */
+2:	trap
+	EMIT_BUG_ENTRY 2b,__FILE__,__LINE__,0;
+#endif /* CONFIG_PPC_47x */
+	blr
 
 /*
  * Init CPU state. This is called at boot time or for secondary CPUs
@@ -1083,6 +1105,12 @@ clear_utlb_entry:
 	isync
 #endif /* CONFIG_PPC_EARLY_DEBUG_44x */
 
+	mfspr   r3,SPRN_CCR2_476
+	/* With CCR2(DSTI) set, isync does not invalidate the shadow TLB */
+	oris	r3,r3,CCR2_476_DSTI@h
+	mtspr   SPRN_CCR2_476,r3
+	isync
+
 	/* Establish the interrupt vector offsets */
 	SET_IVOR(0,  CriticalInput);
 	SET_IVOR(1,  MachineCheckA);
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index b9d9fed..8e318ed 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -112,6 +112,16 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
 	clrrwi	r4,r3,12	/* get an EPN for the hashing with V = 0 */
 	ori	r4,r4,PPC47x_TLBE_SIZE
 	tlbwe   r4,r7,0		/* write it */
+	mfspr	r8,SPRN_CCR2_476
+	rlwinm	r9,r8,0,~CCR2_476_DSTI
+	mtspr	SPRN_CCR2_476,r9
+	/*
+	 * The first isync may not respect the change to CCR2, but its
+	 * completion will ensure that the second isync does.
+	 */
+	isync
+	isync
+	mtspr	SPRN_CCR2_476,r8
 	isync
 	wrtee	r10
 	blr
@@ -180,7 +190,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
 	lwz	r8,0(r10)	/* Load boltmap entry */
 	addi	r10,r10,4	/* Next word */
 	b	1b		/* Then loop */
-1:	isync			/* Sync shadows */
+1:	mfspr	r9,SPRN_CCR2_476
+	rlwinm	r10,r9,0,~CCR2_476_DSTI
+	mtspr	SPRN_CCR2_476,r10
+	isync
+	isync			/* Sync shadows */
+	mtspr	SPRN_CCR2_476,r9
+	isync
 	wrtee	r11
 #else /* CONFIG_PPC_47x */
 1:	trap
@@ -203,6 +219,12 @@ _GLOBAL(_tlbivax_bcast)
 	isync
 /*	tlbivax	0,r3 - use .long to avoid binutils deps */
 	.long 0x7c000624 | (r3 << 11)
+	mfspr	r8,SPRN_CCR2_476
+	rlwinm	r9,r8,0,~CCR2_476_DSTI
+	mtspr	SPRN_CCR2_476,r9
+	isync
+	isync
+	mtspr	SPRN_CCR2_476,r8
 	isync
 	eieio
 	tlbsync
diff --git a/arch/powerpc/platforms/44x/misc_44x.S b/arch/powerpc/platforms/44x/misc_44x.S
index dc12b80..2422dd3 100644
--- a/arch/powerpc/platforms/44x/misc_44x.S
+++ b/arch/powerpc/platforms/44x/misc_44x.S
@@ -9,15 +9,40 @@
  *
  */
 
+#include <asm/mmu.h>
 #include <asm/reg.h>
 #include <asm/ppc_asm.h>
 
 	.text
 
+#ifdef CONFIG_PPC_47x
+
+#define LOAD_CLEAR_CCR2_DSTI(REG1, REG2)	\
+BEGIN_MMU_FTR_SECTION				\
+	mfspr REG1,SPRN_CCR2_476;		\
+	rlwinm	REG2,REG1,0,~CCR2_476_DSTI;	\
+	mtspr	SPRN_CCR2_476,REG2;		\
+	isync;					\
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
+
+#define RESTORE_CCR2_DSTI(REG)			\
+BEGIN_MMU_FTR_SECTION				\
+	mtspr	SPRN_CCR2_476,REG;		\
+	isync;					\
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
+
+#else	/* CONFIG_PPC_47x */
+
+#define LOAD_CLEAR_CCR2_DSTI(REG1, REG2)
+#define RESTORE_CCR2_DSTI(REG)
+
+#endif	/* CONFIG_PPC_47x */
+
 /*
  * Do an IO access in AS1
  */
 _GLOBAL(as1_readb)
+	LOAD_CLEAR_CCR2_DSTI(r8, r9)
 	mfmsr	r7
 	ori	r0,r7,MSR_DS
 	sync
@@ -29,9 +54,11 @@ _GLOBAL(as1_readb)
 	mtmsr	r7
 	sync
 	isync
+	RESTORE_CCR2_DSTI(r8)
 	blr
 
 _GLOBAL(as1_writeb)
+	LOAD_CLEAR_CCR2_DSTI(r8, r9)
 	mfmsr	r7
 	ori	r0,r7,MSR_DS
 	sync
@@ -43,4 +70,5 @@ _GLOBAL(as1_writeb)
 	mtmsr	r7
 	sync
 	isync
+	RESTORE_CCR2_DSTI(r8)
 	blr
-- 
1.7.2.2

^ permalink raw reply related

* [PATCH] mxc_udc: add workaround for ENGcm09152 for i.MX35
From: Eric Bénard @ 2010-10-15 12:30 UTC (permalink / raw)
  To: linux-usb
  Cc: dbrownell, Dinh.Nguyen, gregkh, linux-kernel, linuxppc-dev,
	linux-arm-kernel

this patch gives the possibility to workaround bug ENGcm09152
on i.MX35 when the hardware workaround is also implemented on
the board.
It covers the workaround described on page 25 of the following Errata :
http://cache.freescale.com/files/dsp/doc/errata/IMX35CE.pdf 

Signed-off-by: Eric Bénard <eric@eukrea.com>
---
 arch/arm/mach-mx3/mach-cpuimx35.c |    1 +
 drivers/usb/gadget/fsl_mxc_udc.c  |   15 +++++++++++++++
 include/linux/fsl_devices.h       |    3 +++
 3 files changed, 19 insertions(+), 0 deletions(-)

diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c
index 6024bb9..a95ff79 100644
--- a/arch/arm/mach-mx3/mach-cpuimx35.c
+++ b/arch/arm/mach-mx3/mach-cpuimx35.c
@@ -132,6 +132,7 @@ static struct mxc_usbh_platform_data __maybe_unused usbh1_pdata = {
 static struct fsl_usb2_platform_data otg_device_pdata = {
 	.operating_mode	= FSL_USB2_DR_DEVICE,
 	.phy_mode	= FSL_USB2_PHY_UTMI,
+	.workaround	= FLS_USB2_WORKAROUND_ENGCM09152,
 };
 
 static int otg_mode_host;
diff --git a/drivers/usb/gadget/fsl_mxc_udc.c b/drivers/usb/gadget/fsl_mxc_udc.c
index eafa6d2..5bdbfe6 100644
--- a/drivers/usb/gadget/fsl_mxc_udc.c
+++ b/drivers/usb/gadget/fsl_mxc_udc.c
@@ -22,6 +22,10 @@
 static struct clk *mxc_ahb_clk;
 static struct clk *mxc_usb_clk;
 
+/* workaround ENGcm09152 for i.MX35 */
+#define USBPHYCTRL_OTGBASE_OFFSET	0x608
+#define USBPHYCTRL_EVDO			(1 << 23)
+
 int fsl_udc_clk_init(struct platform_device *pdev)
 {
 	struct fsl_usb2_platform_data *pdata;
@@ -84,6 +88,17 @@ eenahb:
 void fsl_udc_clk_finalize(struct platform_device *pdev)
 {
 	struct fsl_usb2_platform_data *pdata = pdev->dev.platform_data;
+#if defined(CONFIG_ARCH_MX35)
+	unsigned int v;
+
+	/* workaround ENGcm09152 for i.MX35 */
+	if (pdata->workaround & FLS_USB2_WORKAROUND_ENGCM09152) {
+		v = readl(MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
+				USBPHYCTRL_OTGBASE_OFFSET));
+		writel(v | USBPHYCTRL_EVDO, MX35_IO_ADDRESS(MX35_OTG_BASE_ADDR +
+				USBPHYCTRL_OTGBASE_OFFSET));
+	}
+#endif
 
 	/* ULPI transceivers don't need usbpll */
 	if (pdata->phy_mode == FSL_USB2_PHY_ULPI) {
diff --git a/include/linux/fsl_devices.h b/include/linux/fsl_devices.h
index 28e33fe..01a23fa 100644
--- a/include/linux/fsl_devices.h
+++ b/include/linux/fsl_devices.h
@@ -63,12 +63,15 @@ struct fsl_usb2_platform_data {
 	enum fsl_usb2_operating_modes	operating_mode;
 	enum fsl_usb2_phy_modes		phy_mode;
 	unsigned int			port_enables;
+	unsigned int			workaround;
 };
 
 /* Flags in fsl_usb2_mph_platform_data */
 #define FSL_USB2_PORT0_ENABLED	0x00000001
 #define FSL_USB2_PORT1_ENABLED	0x00000002
 
+#define FLS_USB2_WORKAROUND_ENGCM09152	(1 << 0)
+
 struct spi_device;
 
 struct fsl_spi_platform_data {
-- 
1.7.0.4

^ permalink raw reply related

* RE: [PATCH 1/3 v4] P4080/eLBC: Make Freescale elbc interrupt common to elbc devices
From: Zang Roy-R61911 @ 2010-10-15  5:03 UTC (permalink / raw)
  To: Wood Scott-B07421, Anton Vorontsov
  Cc: dedekind1, Lan Chunhe-B25806, linuxppc-dev, linux-mtd, akpm,
	dwmw2, Gala Kumar-B11780
In-Reply-To: <20101014110239.466072be@udp111988uds.am.freescale.net>



> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Friday, October 15, 2010 0:03 AM
> To: Zang Roy-R61911
> Cc: Anton Vorontsov; linux-mtd@lists.infradead.org;
dwmw2@infradead.org;
> dedekind1@gmail.com; akpm@linux-foundation.org; Lan Chunhe-B25806;
Wood Scott-
> B07421; Gala Kumar-B11780; linuxppc-dev@ozlabs.org
> Subject: Re: [PATCH 1/3 v4] P4080/eLBC: Make Freescale elbc interrupt
common
> to elbc devices
>=20
> On Wed, 13 Oct 2010 23:43:38 -0700
> "Zang Roy-R61911" <r61911@freescale.com> wrote:
>=20
> > > Plus, I think the patch is not runtime bisectable (i.e. you
> > > now do request_irq() here, but not removing it from the nand
> > > driver, so nand will fail to probe).
> > Nand driver does not need to request irq. It will use the irq
requested by
> lbc.
> > remember, other lbc device may also need to use this registered irq.
> > It should not be removed in nand driver.
>=20
> The point is that you need to make both changes in the same patch.

But according to previous discussion, if lbc driver is registered
successful, it will not be removed. (.remove function is dropped in the
patch). that is not bisectable?
nand driver will not touch the irq. all irq status process is in the lbc
driver.
Thanks.
Roy

^ permalink raw reply

* Re: [PATCH] add icswx support v2
From: Tseng-Hui (Frank) Lin @ 2010-10-15  4:41 UTC (permalink / raw)
  To: Michael Neuling; +Cc: linuxppc-dev
In-Reply-To: <16640.1286931161@neuling.org>

On Wed, 2010-10-13 at 11:52 +1100, Michael Neuling wrote:
> In message <1286855108.14049.8.camel@flin.austin.ibm.com> you wrote:
> > icswx is a PowerPC co-processor instruction to send data to a
> > co-processor. On Book-S processors the LPAR_ID and process ID (PID) of
> > the owning process are registered in the window context of the
> > co-processor at initial time. When the icswx instruction is executed,
> > the L2 generates a cop-reg transaction on PowerBus. The transaction has
> > no address and the processor does not perform an MMU access to
> > authenticate the transaction. The coprocessor compares the LPAR_ID and
> > the PID included in the transaction and the LPAR_ID and PID held in the
> > window context to determine if the process is authorized to generate the
> > transaction.
> > 
> > This patch adds icswx co-processor instruction support.
> 
> Can you describe the ABI a bit?  
> 
> How has this changed from version 1?
> 

The icswx instruction itself does nothing but generating a cop-req
transaction on PowerBus. The cop-req transaction causes 1 cache
line of data (128 bytes) sent to the co-processor. This provides
a low latency mechanism for sending small amount of data without
the co-processor becoming a master on the PowerBus.

Since the transaction has no address and the processor does not
perform an MMU access to authenticate the transaction, the
co-processor relys on the the LPAR_ID and PID to determine if
the process is authorized to generate the transaction.

The OS needs to assign a 16-bit PID for the process. This
cop-PID needs needs to be updated during context switch. The
cop-PID needs to be destroied when the context is destroied.

Change log from v1:
- Change 2'nd parameter of use_cop() from struct task_struct *task
  to struct mm_struct *mm.
- Check for mm == current->active_mm before calling mtspr().
- Add a lock to guard acop related operations.
- Check for POWER7 CPU.
- Move the definition of SPRN_PID from reg_booke.h to avoid
  defining SPRN_PID in two different files.
- Rename pid to acop_pid.
- Change function name disuse_cop() to drop_cop().
- Add a comment to describe the two new fields in mm_context_t.
- Moving CONFIG_ICSWX from arch/powerpc/platforms/pseries/Kconfig
  to arch/powerpc/platforms/Kconfig.cputype

All other comments will be addressed in a new patch.

> Patch has been whitespace munged aswell.
> 
> More comments below...
> 
> > 
> > Signed-off-by: Sonny Rao <sonnyrao@linux.vnet.ibm.com>
> > Signed-off-by: Tseng-Hui (Frank) Lin <thlin@linux.vnet.ibm.com>
> > ---
> >  arch/powerpc/include/asm/mmu-hash64.h  |    5 ++
> >  arch/powerpc/include/asm/mmu_context.h |    6 ++
> >  arch/powerpc/include/asm/reg.h         |   12 ++++
> >  arch/powerpc/include/asm/reg_booke.h   |    3 -
> >  arch/powerpc/mm/mmu_context_hash64.c   |  105
> > ++++++++++++++++++++++++++++++++
> >  arch/powerpc/platforms/Kconfig.cputype |   16 +++++
> >  6 files changed, 144 insertions(+), 3 deletions(-)
> > 
> > diff --git a/arch/powerpc/include/asm/mmu-hash64.h
> > b/arch/powerpc/include/asm/mmu-hash64.h
> > index acac35d..6c1ab90 100644
> > --- a/arch/powerpc/include/asm/mmu-hash64.h
> > +++ b/arch/powerpc/include/asm/mmu-hash64.h
> > @@ -423,6 +423,11 @@ typedef struct {
> >  #ifdef CONFIG_PPC_SUBPAGE_PROT
> >  	struct subpage_prot_table spt;
> >  #endif /* CONFIG_PPC_SUBPAGE_PROT */
> > +#ifdef CONFIG_ICSWX
> > +	unsigned long acop;	/* mask of enabled coprocessor types */
> > +#define HASH64_MAX_PID (0xFFFF)
> > +	unsigned int acop_pid;	/* pid value used with coprocessors */
> > +#endif /* CONFIG_ICSWX */
> >  } mm_context_t;
> >  
> >  
> > diff --git a/arch/powerpc/include/asm/mmu_context.h
> > b/arch/powerpc/include/asm/mmu_context.h
> > index 81fb412..88118de 100644
> > --- a/arch/powerpc/include/asm/mmu_context.h
> > +++ b/arch/powerpc/include/asm/mmu_context.h
> > @@ -80,6 +80,12 @@ static inline void switch_mm(struct mm_struct *prev,
> > struct mm_struct *next,
> >  
> >  #define deactivate_mm(tsk,mm)	do { } while (0)
> >  
> > +#ifdef CONFIG_ICSWX
> > +extern void switch_cop(struct mm_struct *next);
> > +extern int use_cop(unsigned long acop, struct mm_struct *mm);
> > +extern void drop_cop(unsigned long acop, struct mm_struct *mm);
> > +#endif /* CONFIG_ICSWX */
> > +
> >  /*
> >   * After we have set current->mm to a new value, this activates
> >   * the context for the new mm so we see the new mappings.
> > diff --git a/arch/powerpc/include/asm/reg.h
> > b/arch/powerpc/include/asm/reg.h
> > index ff0005eec..9bbf178 100644
> > --- a/arch/powerpc/include/asm/reg.h
> > +++ b/arch/powerpc/include/asm/reg.h
> > @@ -170,8 +170,19 @@
> >  #define SPEFSCR_FRMC 	0x00000003	/* Embedded FP rounding mode co
> ntrol
> > */
> >  
> >  /* Special Purpose Registers (SPRNs)*/
> > +
> > +#ifdef CONFIG_40x
> > +#define SPRN_PID	0x3B1	/* Process ID */
> > +#else
> > +#define	SPRN_PID	0x030	/* Process ID */
> > +#ifdef CONFIG_BOOKE
> > +#define	SPRN_PID0	SPRN_PID/* Process ID Register 0 */
> > +#endif
> > +#endif
> > +
> 
> Why are you moving these definitions?
> 
> >  #define SPRN_CTR	0x009	/* Count Register */
> >  #define SPRN_DSCR	0x11
> > +#define SPRN_ACOP	0x1F	/* Available Coprocessor Register */
> >  #define SPRN_CTRLF	0x088
> >  #define SPRN_CTRLT	0x098
> >  #define   CTRL_CT	0xc0000000	/* current thread */
> > @@ -879,6 +890,7 @@
> >  #define PV_POWER5	0x003A
> >  #define PV_POWER5p	0x003B
> >  #define PV_970FX	0x003C
> > +#define PV_POWER7	0x003F
> >  #define PV_630		0x0040
> >  #define PV_630p	0x0041
> >  #define PV_970MP	0x0044
> > diff --git a/arch/powerpc/include/asm/reg_booke.h
> > b/arch/powerpc/include/asm/reg_booke.h
> > index 667a498..5b0c781 100644
> > --- a/arch/powerpc/include/asm/reg_booke.h
> > +++ b/arch/powerpc/include/asm/reg_booke.h
> > @@ -150,8 +150,6 @@
> >   * or IBM 40x.
> >   */
> >  #ifdef CONFIG_BOOKE
> > -#define SPRN_PID	0x030	/* Process ID */
> > -#define SPRN_PID0	SPRN_PID/* Process ID Register 0 */
> >  #define SPRN_CSRR0	0x03A	/* Critical Save and Restore Register 0 */
> >  #define SPRN_CSRR1	0x03B	/* Critical Save and Restore Register 1 */
> >  #define SPRN_DEAR	0x03D	/* Data Error Address Register */
> > @@ -168,7 +166,6 @@
> >  #define SPRN_TCR	0x154	/* Timer Control Register */
> >  #endif /* Book E */
> >  #ifdef CONFIG_40x
> > -#define SPRN_PID	0x3B1	/* Process ID */
> >  #define SPRN_DBCR1	0x3BD	/* Debug Control Register 1 */		
> >  #define SPRN_ESR	0x3D4	/* Exception Syndrome Register */
> >  #define SPRN_DEAR	0x3D5	/* Data Error Address Register */
> > diff --git a/arch/powerpc/mm/mmu_context_hash64.c
> > b/arch/powerpc/mm/mmu_context_hash64.c
> > index 2535828..8f432b6 100644
> > --- a/arch/powerpc/mm/mmu_context_hash64.c
> > +++ b/arch/powerpc/mm/mmu_context_hash64.c
> > @@ -18,6 +18,7 @@
> >  #include <linux/mm.h>
> >  #include <linux/spinlock.h>
> >  #include <linux/idr.h>
> > +#include <linux/percpu.h>
> >  #include <linux/module.h>
> >  #include <linux/gfp.h>
> >  
> > @@ -26,6 +27,103 @@
> >  static DEFINE_SPINLOCK(mmu_context_lock);
> >  static DEFINE_IDA(mmu_context_ida);
> >  
> > +#ifdef CONFIG_ICSWX
> > +static DEFINE_SPINLOCK(mmu_context_acop_lock);
> > +static DEFINE_IDA(cop_ida);
> > +
> > +/* Lazy switch the ACOP register */
> > +static DEFINE_PER_CPU(unsigned long, acop_reg);
> > +
> > +void switch_cop(struct mm_struct *next)
> > +{
> > +	if (!__is_processor(PV_POWER7))
> > +		return;
> > +
> > +	mtspr(SPRN_PID, next->context.acop_pid);
> > +	if (next->context.acop_pid &&
> > +	    __get_cpu_var(acop_reg) != next->context.acop) {
> > +		mtspr(SPRN_ACOP, next->context.acop);
> > +		__get_cpu_var(acop_reg) = next->context.acop;
> > +	}
> > +}
> > +EXPORT_SYMBOL(switch_cop);
> > +
> > +int use_cop(unsigned long acop, struct mm_struct *mm)
> > +{
> > +	int acop_pid;
> > +	int err;
> > +
> > +	if (!__is_processor(PV_POWER7))
> > +		return -ENOSYS;
> 
> This should be a CPU feature.
> 
> > +
> > +	if (!mm)
> > +		return -EINVAL;
> > +
> > +	if (!mm->context.acop_pid) {
> > +		if (!ida_pre_get(&cop_ida, GFP_KERNEL))
> > +			return -ENOMEM;
> > +again:
> > +		spin_lock(&mmu_context_acop_lock);
> > +		err = ida_get_new_above(&cop_ida, 1, &acop_pid);
> > +		spin_unlock(&mmu_context_acop_lock);
> > +
> > +		if (err == -EAGAIN)
> > +			goto again;
> 
> Make this a do while loop.  Please don't create your own loop
> prematives.
> 
> > +		else if (err)
> > +			return err;
> > +
> > +		if (acop_pid > HASH64_MAX_PID) {
> > +			spin_lock(&mmu_context_acop_lock);
> > +			ida_remove(&cop_ida, acop_pid);
> > +			spin_unlock(&mmu_context_acop_lock);
> > +			return -EBUSY;
> > +		}
> > +		mm->context.acop_pid = acop_pid;
> > +		if (mm == current->active_mm)
> > +			mtspr(SPRN_PID,  mm->context.acop_pid);
> > +	}
> > +	spin_lock(&mmu_context_acop_lock);
> > +	mm->context.acop |= acop;
> > +	spin_unlock(&mmu_context_acop_lock);
> > +
> > +	get_cpu_var(acop_reg) = mm->context.acop;
> > +	if (mm == current->active_mm)
> > +		mtspr(SPRN_ACOP, mm->context.acop);
> > +	put_cpu_var(acop_reg);
> > +
> > +	return mm->context.acop_pid;
> > +}
> > +EXPORT_SYMBOL(use_cop);
> > +
> > +void drop_cop(unsigned long acop, struct mm_struct *mm)
> > +{
> > +	if (!__is_processor(PV_POWER7))
> > +		return;
> > +
> > +	if (WARN_ON(!mm))
> > +		return;
> > +
> > +	spin_lock(&mmu_context_acop_lock);
> > +	mm->context.acop &= ~acop;
> > +	spin_unlock(&mmu_context_acop_lock);
> > +	if (!mm->context.acop) {
> > +		spin_lock(&mmu_context_acop_lock);
> > +		ida_remove(&cop_ida, mm->context.acop_pid);
> > +		spin_unlock(&mmu_context_acop_lock);
> > +		mm->context.acop_pid = 0;
> > +		if (mm == current->active_mm)
> > +			mtspr(SPRN_PID, mm->context.acop_pid);
> > +	} else {
> > +		get_cpu_var(acop_reg) = mm->context.acop;
> > +		if (mm == current->active_mm)
> > +			mtspr(SPRN_ACOP, mm->context.acop);
> > +		put_cpu_var(acop_reg);
> > +	}
> > +	mmput(mm);
> > +}
> > +EXPORT_SYMBOL(drop_cop);
> > +#endif /* CONFIG_ICSWX */
> > +
> >  /*
> >   * The proto-VSID space has 2^35 - 1 segments available for user
> > mappings.
> >   * Each segment contains 2^28 bytes.  Each context maps 2^44 bytes,
> > @@ -93,6 +191,13 @@ EXPORT_SYMBOL_GPL(__destroy_context);
> >  
> >  void destroy_context(struct mm_struct *mm)
> >  {
> > +#ifdef CONFIG_ICSWX
> > +	if (mm->context.acop_pid) {
> > +		spin_lock(&mmu_context_acop_lock);
> > +		ida_remove(&cop_ida, mm->context.acop_pid);
> > +		spin_unlock(&mmu_context_acop_lock);
> > +	}
> > +#endif /* CONFIG_ICSWX */
> 
> Can you put this in a destroy_context_acop() and #define that funtion
> based CONFIG_ICSWX.  Cleans up the #ifdefs here
> 
> 
> >  	__destroy_context(mm->context.id);
> >  	subpage_prot_free(mm);
> >  	mm->context.id = NO_CONTEXT;
> > diff --git a/arch/powerpc/platforms/Kconfig.cputype
> > b/arch/powerpc/platforms/Kconfig.cputype
> > index d361f81..9674703 100644
> > --- a/arch/powerpc/platforms/Kconfig.cputype
> > +++ b/arch/powerpc/platforms/Kconfig.cputype
> > @@ -220,6 +220,22 @@ config VSX
> >  
> >  	  If in doubt, say Y here.
> >  
> > +config ICSWX
> > +	bool "Support for PowerPC icswx co-processor instruction"
> > +	depends on POWER4
> > +	default n
> > +	---help---
> > +
> > +	  Enabling this option to turn on the PowerPC icswx co-processor
> > +	  instruction support for POWER7 processors.
> > +	  This option is only useful if you have a processor that supports
> > +	  icswx co-processor instruction. It does not have any affect on
> > +	  processors without icswx co-processor instruction.
> > +
> > +	  This support slightly increases kernel memory usage.
> > +
> > +	  Say N if you do not have a POWER7 processor and a PowerPC
> > co-processor.
> > +
> >  config SPE
> >  	bool "SPE Support"
> >  	depends on E200 || (E500 && !PPC_E500MC)
> > 
> > 
> > _______________________________________________
> > Linuxppc-dev mailing list
> > Linuxppc-dev@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/linuxppc-dev
> > 
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev

^ permalink raw reply

* Re: [PATCH v2] pseries: don't override CONFIG_PPC_PSERIES_DEBUG
From: Michael Ellerman @ 2010-10-15  4:01 UTC (permalink / raw)
  To: linasvepstas
  Cc: Frans Pop, linux-kernel, Paul Mackerras, Anton Blanchard,
	Brian King, Nishanth Aravamudan, Thomas Gleixner, linuxppc-dev
In-Reply-To: <AANLkTinEzRpREFzDVhPS5ynqjYydHOs9iW5NM6W9Tf9A@mail.gmail.com>

[-- Attachment #1: Type: text/plain, Size: 2117 bytes --]

On Thu, 2010-10-14 at 20:54 -0500, Linas Vepstas wrote:
> On 14 October 2010 19:48, Nishanth Aravamudan <nacc@us.ibm.com> wrote:
> > eeh and pci_dlpar #undef DEBUG, but I think they were added before the
> > ability to control this from Kconfig. It's really annoying to only get
> > some of the debug messages from these files. Leave the lpar.c #undef
> > alone as it produces so much output as to make the kernel unusable.
> > Update the Kconfig text to indicate this particular quirk :)
> >
> > Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
> 
> OK, ignore my last email.
> 
> Acked by: Linas Vepstas <linasvepstas@gmail.com>

I guess I'll ack it too seeing I added PPC_PSERIES_DEBUG:

Acked-by: Michael Ellerman <michael@ellerman.id.au>

> > --- a/arch/powerpc/platforms/pseries/Kconfig
> > +++ b/arch/powerpc/platforms/pseries/Kconfig
> > @@ -47,6 +47,12 @@ config LPARCFG
> >  config PPC_PSERIES_DEBUG
> >        depends on PPC_PSERIES && PPC_EARLY_DEBUG
> >        bool "Enable extra debug logging in platforms/pseries"
> > +        help
> > +         Say Y here if you want the pseries core to produce a bunch of
> > +         debug messages to the system log. Select this if you are having a
> > +         problem with the pseries core and want to see more of what is
> > +         going on. This does not enable debugging in lpar.c, which must
> > +         be manually done due to its verbosity.
> >        default y
> 
> Umm, I see "default y" and you are not changing this but ... default y
> ?? Really?

Yes, default y if early debug is enabled. Unlike DEBUG_KERNEL,
PPC_EARLY_DEBUG is a pretty good indication that you are doing some
kernel development - because you have to choose exactly which platform
you're working on.

> Also, I am guessing that the lpar spam is due only to a handful of printk's,
> while most of the rest will be infrequent.  Just knock out the
> high-frequency ones...

No they're all related to the HPTE code, so you basically don't want any
of them enabled unless you're debugging that, and most people aren't.

cheers


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^ permalink raw reply

* RE: [PATCH 2/3 v4] P4080/mtd: Only make elbc nand driver detect nand flash partitions
From: Zang Roy-R61911 @ 2010-10-15  2:15 UTC (permalink / raw)
  To: Wood Scott-B07421
  Cc: dedekind1, Hu Mingkai-B21284, Lan Chunhe-B25806, linuxppc-dev,
	linux-mtd, akpm, dwmw2, Gala Kumar-B11780
In-Reply-To: <20101014110118.11fabed5@udp111988uds.am.freescale.net>



> -----Original Message-----
> From: Wood Scott-B07421
> Sent: Friday, October 15, 2010 0:01 AM
> To: Zang Roy-R61911
> Cc: Wood Scott-B07421; Anton Vorontsov; linux-mtd@lists.infradead.org;
> dwmw2@infradead.org; dedekind1@gmail.com; akpm@linux-foundation.org;
Lan
> Chunhe-B25806; Gala Kumar-B11780; linuxppc-dev@ozlabs.org; Hu
Mingkai-B21284
> Subject: Re: [PATCH 2/3 v4] P4080/mtd: Only make elbc nand driver
detect nand
> flash partitions
>=20
> On Wed, 13 Oct 2010 20:09:02 -0700
> "Zang Roy-R61911" <r61911@freescale.com> wrote:
>=20
> > > > > > +	struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl =3D NULL;
> > > > >
> > > > > No need for =3D NULL.
> > > > Any harm? Or just personal habit or style? Can you explain about
> > why?
> > >
> > > Besides not wanting superfluous code on general principle, it
could
> > > hide a bug if in the future the real initialization is missing on
some
> > > code path.  It would become a runtime NULL dereference rather than
a
> > > compiler warning.
> >
> > Not exactly.
> > Per my understand, if the pointer will definitely be assigned in
code
> > path,
> > it is not necessary to init it when define. for example,
> >
> > char c;
> > char b;
> > char *a;
> > if (condition)
> > 	a =3D &c;
> > else
> > 	a =3D &b;
> > ...
> >
> > for other case, if the path will not ensure the pointer assignment,
it
> > will be inited
> > when define to avoid warning. for example,
> >
> > char c;
> > char *a =3D NULL;
> > if (condition)
> > 	a =3D &c;
> > ...
>=20
> Yes, but this patch looks like the former case, not the
> latter.=20
That is right.
> Is GCC giving a warning without the initializer?
no.
we are on the same point.
Thanks.
Roy

^ permalink raw reply

* Re: [PATCH v2] pseries: don't override CONFIG_PPC_PSERIES_DEBUG
From: Linas Vepstas @ 2010-10-15  1:54 UTC (permalink / raw)
  To: Nishanth Aravamudan
  Cc: Frans Pop, linux-kernel, Paul Mackerras, Anton Blanchard,
	Brian King, Thomas Gleixner, linuxppc-dev
In-Reply-To: <1287103733-7121-1-git-send-email-nacc@us.ibm.com>

On 14 October 2010 19:48, Nishanth Aravamudan <nacc@us.ibm.com> wrote:
> eeh and pci_dlpar #undef DEBUG, but I think they were added before the
> ability to control this from Kconfig. It's really annoying to only get
> some of the debug messages from these files. Leave the lpar.c #undef
> alone as it produces so much output as to make the kernel unusable.
> Update the Kconfig text to indicate this particular quirk :)
>
> Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>

OK, ignore my last email.

Acked by: Linas Vepstas <linasvepstas@gmail.com>


> --- a/arch/powerpc/platforms/pseries/Kconfig
> +++ b/arch/powerpc/platforms/pseries/Kconfig
> @@ -47,6 +47,12 @@ config LPARCFG
> =C2=A0config PPC_PSERIES_DEBUG
> =C2=A0 =C2=A0 =C2=A0 =C2=A0depends on PPC_PSERIES && PPC_EARLY_DEBUG
> =C2=A0 =C2=A0 =C2=A0 =C2=A0bool "Enable extra debug logging in platforms/=
pseries"
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0help
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 Say Y here if you want the pseries core to =
produce a bunch of
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 debug messages to the system log. Select th=
is if you are having a
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 problem with the pseries core and want to s=
ee more of what is
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 going on. This does not enable debugging in=
 lpar.c, which must
> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 be manually done due to its verbosity.
> =C2=A0 =C2=A0 =C2=A0 =C2=A0default y

Umm, I see "default y" and you are not changing this but ... default y
?? Really?

Also, I am guessing that the lpar spam is due only to a handful of printk's=
,
while most of the rest will be infrequent.  Just knock out the
high-frequency ones...

--linas

^ permalink raw reply

* Re: [RFC PATCH] ppc: don't override CONFIG_PPC_PSERIES_DEBUG
From: Linas Vepstas @ 2010-10-15  1:47 UTC (permalink / raw)
  To: Nishanth Aravamudan
  Cc: Michael Neuling, Frans Pop, linux-kernel, Paul Mackerras,
	Anton Blanchard, Thomas Gleixner, linuxppc-dev
In-Reply-To: <1287078495-11722-1-git-send-email-nacc@us.ibm.com>

On 14 October 2010 12:48, Nishanth Aravamudan <nacc@us.ibm.com> wrote:
> These files undef DEBUG, but I think they were added before the ability
> to control this from Kconfig.

Right.

> It's really annoying to only get some of
> the debug messages!

I don't get the big picture.  Will there be some CONFIG_DEBUG_EEH in Kconfig?
or just some option to turn on DEBUG for all powerpc-related files?

Or maybe I am demonstrating my utter ignorance of some new whiz-bang
Kconfig technology?

Anyway, I see no harm in the EEH portion of the patch.

--linas

^ permalink raw reply

* Re: Questions on interrupt vector assignment on MPC8641D
From: tiejun.chen @ 2010-10-15  1:28 UTC (permalink / raw)
  To: Scott Wood; +Cc: david.hagood, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <20101014105126.08da9dd7@udp111988uds.am.freescale.net>

Scott Wood wrote:
> On Thu, 14 Oct 2010 11:27:09 +0800
> "tiejun.chen" <tiejun.chen@windriver.com> wrote:
> 
>> tiejun.chen wrote:
>>> Scott Wood wrote:
>>>> On Wed, 13 Oct 2010 09:17:01 +0800
>>>> "tiejun.chen" <tiejun.chen@windriver.com> wrote:
>>>>
>>>>> Scott Wood wrote:
>>>>>> The crash is happening somewhere in mpic_set_irq_type():
>>>>> Agreed. That is just where I pointed out on my email replied for OOPS. To enable
>>>>> DBG to figure out 'src' and 'mpic->irq_count' from the file,
>>>>> arch/powerpc/sysdev/mpic.c,    .
>>>>> ======
>>>>> int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
>>>>> {
>>>>> 	......
>>>>> 	if (src >= mpic->irq_count)
>>>>> 		return -EINVAL;
>>>>> 			^
>>>>> 			I think this OOPS may be from here.
>>>> No, it's after that.  His board code is using the mpic's "isu" remapping
>>> I means OOPS is *from* here. According to David's call trace,
>>> mpic_set_irq_type() is the last issued function. And that corresponding return
>>> value, R3, is '0xffffffea', -22, and also '-EINVAL'.
> 
> Just because that value is in r3 doesn't mean that src >=
> mpic->irq_count.
> 
> Consider something like:
> 
> cmplw	r4, r5
> li	r3, -EINVAL
> bgelr

Right absolutely and got it.

Thanks again
Tiejun

> ...
> 
> 
> -Scott
> 
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
> 

^ permalink raw reply

* [PATCH v2] pseries: don't override CONFIG_PPC_PSERIES_DEBUG
From: Nishanth Aravamudan @ 2010-10-15  0:48 UTC (permalink / raw)
  To: nacc
  Cc: Frans Pop, linux-kernel, Paul Mackerras, Anton Blanchard,
	Brian King, Linas Vepstas, linuxppc-dev, Thomas Gleixner

eeh and pci_dlpar #undef DEBUG, but I think they were added before the
ability to control this from Kconfig. It's really annoying to only get
some of the debug messages from these files. Leave the lpar.c #undef
alone as it produces so much output as to make the kernel unusable.
Update the Kconfig text to indicate this particular quirk :)

Signed-off-by: Nishanth Aravamudan <nacc@us.ibm.com>
---
 arch/powerpc/platforms/pseries/Kconfig     |    6 ++++++
 arch/powerpc/platforms/pseries/eeh.c       |    2 --
 arch/powerpc/platforms/pseries/pci_dlpar.c |    2 --
 3 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index c667f0f..3139814 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -47,6 +47,12 @@ config LPARCFG
 config PPC_PSERIES_DEBUG
 	depends on PPC_PSERIES && PPC_EARLY_DEBUG
 	bool "Enable extra debug logging in platforms/pseries"
+        help
+	  Say Y here if you want the pseries core to produce a bunch of
+	  debug messages to the system log. Select this if you are having a
+	  problem with the pseries core and want to see more of what is
+	  going on. This does not enable debugging in lpar.c, which must
+	  be manually done due to its verbosity.
 	default y
 
 config PPC_SMLPAR
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 34b7dc1..17a11c8 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -21,8 +21,6 @@
  * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
  */
 
-#undef DEBUG
-
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/list.h>
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index 4b7a062..5fcc92a 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -25,8 +25,6 @@
  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  */
 
-#undef DEBUG
-
 #include <linux/pci.h>
 #include <asm/pci-bridge.h>
 #include <asm/ppc-pci.h>
-- 
1.7.1

^ permalink raw reply related

* Re: [RFC PATCH] ppc: don't override CONFIG_PPC_PSERIES_DEBUG
From: Michael Ellerman @ 2010-10-15  0:29 UTC (permalink / raw)
  To: Nishanth Aravamudan
  Cc: Michael Neuling, Frans Pop, linux-kernel, Paul Mackerras,
	Anton Blanchard, Linas Vepstas, linuxppc-dev, Thomas Gleixner
In-Reply-To: <20101015002300.GB7522@us.ibm.com>

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On Thu, 2010-10-14 at 17:23 -0700, Nishanth Aravamudan wrote:
> On 15.10.2010 [11:14:23 +1100], Michael Ellerman wrote:
> > On Thu, 2010-10-14 at 10:48 -0700, Nishanth Aravamudan wrote:
> > > Because the lpar and pci_dlpar code is pretty low-level & verbose,
> > > perhaps it makes sense to add another Kconfig variable for really
> > > low-level stuff? But it's annoying to have DEBUG *somewhat* effective,
> > > especially in the EEH area when doing PCI stuff.
> > 
> > I really don't think you want to enable the lpar debug by default.
> > Have you tried it? It can make for a pretty unusable system, just
> > because of the console spam.
> 
> Yeah, you're right. After enabling it, I had to kill my boot and start
> over w/o the lpar DEBUG on. 

:)

> I assume dlpar_pci is similar?

That should be OK to enable I think. Suck it and see I guess.

> I dunno, would a patch to a least remove the EEH one be ok? Seems like
> it isn't super-verbose, and does have some handy output.

Yeah definitely. That undef was merged as part of a cleanup/fix patch
but shouldn't have been.

cheers



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* Re: msi_bitmap.c question
From: Michael Ellerman @ 2010-10-15  0:25 UTC (permalink / raw)
  To: Tirumala Marri; +Cc: linuxppc-dev
In-Reply-To: <6cfa2d1c7ecd946ea4acbd3077defa92@mail.gmail.com>

[-- Attachment #1: Type: text/plain, Size: 1402 bytes --]

On Thu, 2010-10-14 at 15:56 -0700, Tirumala Marri wrote:
> Hi,
> 
> I am trying to resubmit a patch for MSI support for ppc4xx devices.
> One of the review feedback was not to use the bit map as it is only
> for the devices which don’t have hard wired mapping between interrupt
> controller interrupts and MSI number. For example intr-ctrl0 interrupt
> 20 goes to MSI-0, interrupt 21 goes to MSI-1 ..etc. But when I checked
> freescale SoCs and cell SoCs they have interrupts hard wired to MSI
> interrupts.  
> 
>  
> 
> Why do they have to use the bitmap and create irqhost, even though
> they are one-to-one mapped between interrupt controller numbers and
> MSI ?

I'm not quite sure I understand your question.

The MSI bitmap and the irq_host are two different things.

The MSI bitmap is basically an allocator for hardware numbers that can
be used for MSI. On some interrupt controllers that might be any
interrupt that's not used, on others there are restrictions on which
numbers can be used for MSI, it depends. So it's possible you don't need
to use that code, but I don't know how your hardware works.

The irq_host is the struct that controls mapping hardware irq numbers
into linux irq numbers. The cell MSI code has no restrictions on what
the MSI value is, so it just uses the Linux irq number directly using
irq_create_direct_mapping().

cheers




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^ permalink raw reply


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