* Re: Oops while running systemtap on the p6 machine against the kernel version 2.6.36-rc7-git3
From: Frank Ch. Eigler @ 2010-11-03 12:49 UTC (permalink / raw)
To: divya; +Cc: linuxppc-dev, systemtap
In-Reply-To: <4CB704AC.4070203@linux.vnet.ibm.com>
divya <dipraksh@linux.vnet.ibm.com> writes:
> While running systemtap tests on the p6 machine , against the kernel version 2.6.36-rc7-git3
> Oops occured , here are the call trace
>
> BUG: spinlock bad magic on CPU#6, stapio/20398
> -- 0:conmux-control -- time-stamp -- Oct/13/10 2:49:18 --res
> lock: c000000000fcfa18, .magic: 00000000, .owner:<none>/-1, .owner_cpu: 0
> [...]
jistone committed some timing-related changes last night. Would you
mind trying a new build on your ppc box?
It seems as through there is a concurrency problem with the timer
shutdown process. If the problem still occurs, we might need to
instrument that part of the kernel and/or runtime code to figure it
out.
- FChE
^ permalink raw reply
* Re: Problem with Infiniband adapter on IBM p550
From: Anton Blanchard @ 2010-11-03 13:34 UTC (permalink / raw)
To: Patrick Finnegan; +Cc: paulus, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <201011022315.04291.pat@computer-refuge.org>
Hi,
> > Now, I think this is the problem.
> >
> > The "assigned-addresses" property seems to indicate that the
> > firmware only assigned BAR 4 and didn't assign anything to the
> > other ones.
> >
> > I don't know why, but it definitely looks like a firmware bug to me.
> > On those machines, PCI resource assignment is under hypervisor
> > control and so Linux cannot re-assign missing resources itself.
> >
> > I'll see if I can find a FW person to shed some light on this.
> >
> > Can you provide me (privately maybe) with the FW version on the
> > machine ?
>
> Ben,
>
> Have you found out anything more on this (firmware) bug?
Firmware has the concept of "super slots" which allow larger memory
windows and TCE tables. Section 3.4.3 explains it:
http://www.redbooks.ibm.com/redpapers/pdfs/redp4095.pdf
Anton
^ permalink raw reply
* Re: Problem with Infiniband adapter on IBM p550
From: Benjamin Herrenschmidt @ 2010-11-03 13:46 UTC (permalink / raw)
To: Patrick Finnegan; +Cc: linuxppc-dev@lists.ozlabs.org, paulus
In-Reply-To: <201011022315.04291.pat@computer-refuge.org>
On Tue, 2010-11-02 at 23:15 -0400, Patrick Finnegan wrote:
> > I don't know why, but it definitely looks like a firmware bug to me.
> > On those machines, PCI resource assignment is under hypervisor
> > control and so Linux cannot re-assign missing resources itself.
> >
> > I'll see if I can find a FW person to shed some light on this.
> >
> > Can you provide me (privately maybe) with the FW version on the
> > machine ?
>
> Ben,
>
> Have you found out anything more on this (firmware) bug?
No, not yet. Let me ping some folks again.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 2/3 RESEND] powerpc: remove cast from void*
From: Jiri Kosina @ 2010-11-03 14:15 UTC (permalink / raw)
To: matt mooney; +Cc: kernel-janitors, Paul Mackerras, linuxppc-dev
In-Reply-To: <f7d601da574581e9dfdc1314a969475c73491c00.1285638395.git.mfm@muteddisk.com>
On Mon, 27 Sep 2010, matt mooney wrote:
> Unnecessary cast from void* in assignment.
>
> Signed-off-by: matt mooney <mfm@muteddisk.com>
> ---
> arch/powerpc/platforms/pseries/hvCall_inst.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
> index e19ff02..f106662 100644
> --- a/arch/powerpc/platforms/pseries/hvCall_inst.c
> +++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
> @@ -55,7 +55,7 @@ static void hc_stop(struct seq_file *m, void *p)
> static int hc_show(struct seq_file *m, void *p)
> {
> unsigned long h_num = (unsigned long)p;
> - struct hcall_stats *hs = (struct hcall_stats *)m->private;
> + struct hcall_stats *hs = m->private;
>
> if (hs[h_num].num_calls) {
> if (cpu_has_feature(CPU_FTR_PURR))
This doesn't seem to be present in 37-rc1, so I am taking it to trivial
queue. If this has been already merged to another tree, let me know.
Thanks,
--
Jiri Kosina
SUSE Labs, Novell Inc.
^ permalink raw reply
* Re: [PATCH 2/3 RESEND] powerpc: remove cast from void*
From: Benjamin Herrenschmidt @ 2010-11-03 14:18 UTC (permalink / raw)
To: Jiri Kosina; +Cc: matt mooney, linuxppc-dev, kernel-janitors, Paul Mackerras
In-Reply-To: <alpine.LNX.2.00.1011031015150.15851@pobox.suse.cz>
On Wed, 2010-11-03 at 10:15 -0400, Jiri Kosina wrote:
> On Mon, 27 Sep 2010, matt mooney wrote:
>
> > Unnecessary cast from void* in assignment.
> >
> > Signed-off-by: matt mooney <mfm@muteddisk.com>
> > ---
> > arch/powerpc/platforms/pseries/hvCall_inst.c | 2 +-
> > 1 files changed, 1 insertions(+), 1 deletions(-)
> >
> > diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
> > index e19ff02..f106662 100644
> > --- a/arch/powerpc/platforms/pseries/hvCall_inst.c
> > +++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
> > @@ -55,7 +55,7 @@ static void hc_stop(struct seq_file *m, void *p)
> > static int hc_show(struct seq_file *m, void *p)
> > {
> > unsigned long h_num = (unsigned long)p;
> > - struct hcall_stats *hs = (struct hcall_stats *)m->private;
> > + struct hcall_stats *hs = m->private;
> >
> > if (hs[h_num].num_calls) {
> > if (cpu_has_feature(CPU_FTR_PURR))
>
> This doesn't seem to be present in 37-rc1, so I am taking it to trivial
> queue. If this has been already merged to another tree, let me know.
Looks like I missed it, but Ack.
Cheers,
Ben.
^ permalink raw reply
* Re: Problem with Infiniband adapter on IBM p550
From: Patrick Finnegan @ 2010-11-03 14:43 UTC (permalink / raw)
To: Anton Blanchard; +Cc: paulus, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <20101104003444.5fff5935@kryten>
On Wednesday, November 03, 2010, Anton Blanchard wrote:
> Firmware has the concept of "super slots" which allow larger memory
> windows and TCE tables. Section 3.4.3 explains it:
>
> http://www.redbooks.ibm.com/redpapers/pdfs/redp4095.pdf
Aha! I tried moving the adapter from slot C3 to C5, which is listed in
that guide, and now it's working.
Thanks for the pointer!
Pat
--
Purdue University Research Computing --- http://www.rcac.purdue.edu/
The Computer Refuge --- http://computer-refuge.org
^ permalink raw reply
* Debugging kernel on mpc7448
From: Cajus Pollmeier @ 2010-11-03 15:02 UTC (permalink / raw)
To: Linuxppc-dev
Hello there,
I'm currently trying to get a kernel upgrade from 2.6.11 to 2.6.31
working with u-boot/cuImage.c2k on a custom marvell discovery 3 board.
In the moment, the following steps work:
* u-boot (1.1.4, not changeable in the moment) runs from flash and
offers a prompt
* loading cuImage.c2k
* running the code of wrapper.c until calling vmlinux.addr
* entering __start in head_32.S and running until early_init gets called
The systems then hangs until the watchdog resets the board. In this
early stage, I've no output to the serial console - which is the only
way to see what's going on there without having a development board with
single step capabilities.
To track it until early_init, I tried to place a stupid "blr" in
head_32.S, in order to get back to wrapper.c - which writes out a
message to the serial console in case the kernel "accidently" gets back
to it.
>From now on, I'm not sure if early_init is properly called. The blr
after the call is either not reached or there's something going on which
is beyond my limited knowledge of ppc assembler. Maybe u-boot gets
overwritten, but the blr isn't even reached if I change early_init by
just returning 0U immediately. Hmm.
Any pointers to help debugging would be really appreciated ;-)
Cheers,
Cajus
^ permalink raw reply
* Debugging kernel on mpc7448
From: Cajus Pollmeier @ 2010-11-03 15:03 UTC (permalink / raw)
To: Linuxppc-dev
Hello there,
I'm currently trying to get a kernel upgrade from 2.6.11 to 2.6.31
working with u-boot/cuImage.c2k on a custom marvell discovery 3 board.
In the moment, the following steps work:
* u-boot (1.1.4, not changeable in the moment) runs from flash and
offers a prompt
* loading cuImage.c2k
* running the code of wrapper.c until calling vmlinux.addr
* entering __start in head_32.S and running until early_init gets called
The systems then hangs until the watchdog resets the board. In this
early stage, I've no output to the serial console - which is the only
way to see what's going on there without having a development board with
single step capabilities.
To track it until early_init, I tried to place a stupid "blr" in
head_32.S, in order to get back to wrapper.c - which writes out a
message to the serial console in case the kernel "accidently" gets back
to it.
>From now on, I'm not sure if early_init is properly called. The blr
after the call is either not reached or there's something going on which
is beyond my limited knowledge of ppc assembler. Maybe u-boot gets
overwritten, but the blr isn't even reached if I change early_init by
just returning 0U immediately. Hmm.
Any pointers to help debugging would be really appreciated ;-)
Cheers,
Cajus
^ permalink raw reply
* Debugging kernel on mpc7448
From: Cajus Pollmeier @ 2010-11-03 15:01 UTC (permalink / raw)
To: Linuxppc-dev
Hello there,
I'm currently trying to get a kernel upgrade from 2.6.11 to 2.6.31
working with u-boot/cuImage.c2k on a custom marvell discovery 3 board.
In the moment, the following steps work:
* u-boot (1.1.4, not changeable in the moment) runs from flash and
offers a prompt
* loading cuImage.c2k
* running the code of wrapper.c until calling vmlinux.addr
* entering __start in head_32.S and running until early_init gets called
The systems then hangs until the watchdog resets the board. In this
early stage, I've no output to the serial console - which is the only
way to see what's going on without having a development board with
single step capabilities.
To track it until early_init, I tried to place a stupid "blr" in
head_32.S, in order to get back to wrapper.c - which writes out a
message to the serial console in case the kernel "accidently" gets back
to it.
>From now on, I'm not sure if early_init is properly called. The blr
after the call is either not reached or there's something going on which
is beyond my limited knowledge of ppc assembler. Maybe u-boot gets
overwritten, but the blr isn't even reached if I change early_init by
just returning 0U immediately. Hmm.
Any pointers to help debugging would be really appreciated ;-)
Cheers,
Cajus
^ permalink raw reply
* Pb G4: Suspend-to-RAM doesn't work for aTi users
From: jjDaNiMoTh @ 2010-11-04 20:14 UTC (permalink / raw)
To: linuxppc-dev
Hello to all,
I read somewhere (ati-dri devel ml, maybe?) that suspend on aTi
machines was broken with KMS, and I have exactly this problem. It is
fixed now, so maybe I have some bad conf file? Or this feature isn't
implemented yet?
I have these errors:
[root@jim ~]# echo 'mem' > /sys/power/state
-bash: echo: write error: No such device
[root@jim bin]# ./pm-pmu --check && echo "yes"
[root@jim bin]#
[root@jim bin]# /usr/lib/hal/hal-system-power-pmu sleep
power-pmu : PMU_IOC_SLEEP failed
[root@jim bin]# uname -r
2.6.35-ARCH
Nvidia users can sleep with happiness.
Thank you
^ permalink raw reply
* Re: Pb G4: Suspend-to-RAM doesn't work for aTi users
From: Benjamin Herrenschmidt @ 2010-11-04 20:58 UTC (permalink / raw)
To: jjDaNiMoTh; +Cc: linuxppc-dev
In-Reply-To: <AANLkTimnxBrVoiyhrd3Sazwo++JCh7XfexDkcnqKX0dQ@mail.gmail.com>
On Thu, 2010-11-04 at 21:14 +0100, jjDaNiMoTh wrote:
> I read somewhere (ati-dri devel ml, maybe?) that suspend on aTi
> machines was broken with KMS, and I have exactly this problem. It is
> fixed now, so maybe I have some bad conf file? Or this feature isn't
> implemented yet?
Not implemented yet with KMS.
Cheers,
Ben.
^ permalink raw reply
* Re: Pb G4: Suspend-to-RAM doesn't work for aTi users
From: Benjamin Herrenschmidt @ 2010-11-04 20:58 UTC (permalink / raw)
To: jjDaNiMoTh; +Cc: linuxppc-dev
In-Reply-To: <AANLkTimnxBrVoiyhrd3Sazwo++JCh7XfexDkcnqKX0dQ@mail.gmail.com>
On Thu, 2010-11-04 at 21:14 +0100, jjDaNiMoTh wrote:
>
> Nvidia users can sleep with happiness.
Ugh... Not sure about that :-)
Cheers,
Ben.
^ permalink raw reply
* [PATCH v2] iSeries: Remove unused mf_getSrcHistory function and caller.
From: Jesper Juhl @ 2010-11-04 23:29 UTC (permalink / raw)
To: Michael Ellerman
Cc: Stephen Rothwell, Paul Mackerras, linuxppc-dev, linux-kernel
In-Reply-To: <1288657250.16790.4.camel@concordia>
On Tue, 2 Nov 2010, Michael Ellerman wrote:
> On Mon, 2010-11-01 at 22:20 +0100, Jesper Juhl wrote:
> > Hi Stephen,
> >
> > On Tue, 2 Nov 2010, Stephen Rothwell wrote:
> >
> > > On Mon, 1 Nov 2010 21:06:23 +0100 (CET) Jesper Juhl <jj@chaosbits.net> wrote:
> > > >
> > > > Remove unused function 'mf_getSrcHistory' (that will never be used ever
> > > > according to Stephen Rothwell).
> > > >
> > > > Signed-off-by: Jesper Juhl <jj@chaosbits.net>
> > >
> > > Acked-by: Stephen Rothwell <sfr@canb.auug.org.au>
> > >
> >
> > Ok, so if you are the (unofficial) iSeries maintainer and you don't merge
> > the patch somewhere that'll eventually go up-stream, but just ACK it
> > (thank you for that btw), then where do I send it to get it merged?
>
> Here. ie. linuxppc-dev.
>
> But, while you're removing it you should remove the #if 0'ed callsite as
> well, see mf_src_proc_show() in that file. :)
>
Done. See patch below.
Remove unused function 'mf_getSrcHistory' (that will never be used
ever according to Stephen Rothwell) and also remove most of (under 'if
0') code from mf_src_proc_show() where the function was called.
Signed-off-by: Jesper Juhl <jj@chaosbits.net>
---
mf.c | 62
--------------------------------------------------------------
1 file changed, 62 deletions(-)
diff --git a/arch/powerpc/platforms/iseries/mf.c b/arch/powerpc/platforms/iseries/mf.c
index 42d0a88..b5e026b 100644
--- a/arch/powerpc/platforms/iseries/mf.c
+++ b/arch/powerpc/platforms/iseries/mf.c
@@ -1045,71 +1045,9 @@ static const struct file_operations mf_side_proc_fops = {
.write = mf_side_proc_write,
};
-#if 0
-static void mf_getSrcHistory(char *buffer, int size)
-{
- struct IplTypeReturnStuff return_stuff;
- struct pending_event *ev = new_pending_event();
- int rc = 0;
- char *pages[4];
-
- pages[0] = kmalloc(4096, GFP_ATOMIC);
- pages[1] = kmalloc(4096, GFP_ATOMIC);
- pages[2] = kmalloc(4096, GFP_ATOMIC);
- pages[3] = kmalloc(4096, GFP_ATOMIC);
- if ((ev == NULL) || (pages[0] == NULL) || (pages[1] == NULL)
- || (pages[2] == NULL) || (pages[3] == NULL))
- return -ENOMEM;
-
- return_stuff.xType = 0;
- return_stuff.xRc = 0;
- return_stuff.xDone = 0;
- ev->event.hp_lp_event.xSubtype = 6;
- ev->event.hp_lp_event.x.xSubtypeData =
- subtype_data('M', 'F', 'V', 'I');
- ev->event.data.vsp_cmd.xEvent = &return_stuff;
- ev->event.data.vsp_cmd.cmd = 4;
- ev->event.data.vsp_cmd.lp_index = HvLpConfig_getLpIndex();
- ev->event.data.vsp_cmd.result_code = 0xFF;
- ev->event.data.vsp_cmd.reserved = 0;
- ev->event.data.vsp_cmd.sub_data.page[0] = iseries_hv_addr(pages[0]);
- ev->event.data.vsp_cmd.sub_data.page[1] = iseries_hv_addr(pages[1]);
- ev->event.data.vsp_cmd.sub_data.page[2] = iseries_hv_addr(pages[2]);
- ev->event.data.vsp_cmd.sub_data.page[3] = iseries_hv_addr(pages[3]);
- mb();
- if (signal_event(ev) != 0)
- return;
-
- while (return_stuff.xDone != 1)
- udelay(10);
- if (return_stuff.xRc == 0)
- memcpy(buffer, pages[0], size);
- kfree(pages[0]);
- kfree(pages[1]);
- kfree(pages[2]);
- kfree(pages[3]);
-}
-#endif
-
static int mf_src_proc_show(struct seq_file *m, void *v)
{
-#if 0
- int len;
-
- mf_getSrcHistory(page, count);
- len = count;
- len -= off;
- if (len < count) {
- *eof = 1;
- if (len <= 0)
- return 0;
- } else
- len = count;
- *start = page + off;
- return len;
-#else
return 0;
-#endif
}
static int mf_src_proc_open(struct inode *inode, struct file *file)
--
Jesper Juhl <jj@chaosbits.net> http://www.chaosbits.net/
Plain text mails only, please http://www.expita.com/nomime.html
Don't top-post http://www.catb.org/~esr/jargon/html/T/top-post.html
^ permalink raw reply related
* Re: [PATHC v1] PPC4xx: Adding PCI(E) MSI support
From: Tirumala Marri @ 2010-11-05 1:58 UTC (permalink / raw)
To: michael; +Cc: linuxppc-dev
In-Reply-To: <1288786293.989.65.camel@concordia>
[-- Attachment #1: Type: text/plain, Size: 2231 bytes --]
Appreciate your review.
> + static int int_no = 0; /* To remember last used interrupt */
>
> This is a worry. There is nothing AFAIK to stop two drivers (eg. network
> & scsi) calling into here at the same time, which could lead to
> corrupting int_no. If you just want a global counter you need a lock.
>
> But, AFAICS this is broken anyway. You never free the interrupt numbers,
> so you're going to run out. Some of your device tree entries only have 3
> (!!), so ifup/ifdown x 3 will exhaust the supply, won't it?
>
> I realise I never replied to your mail the other week about the bitmap
> code, so perhaps it's my fault :)
>
> [Marri] Good point.I will come up with a global array to see if the
interrupt nos are free
and use them.
> + return;
> > +}
> > +
> > +static int ppc4xx_msi_check_device(struct pci_dev *pdev, int nvec, int
> type)
> > +{
> > + dev_dbg(&pdev->dev, "PCIE-MSI:%s called. vec %x type %d\n",
> > + __func__, nvec, type);
>
> No constraints at all? What about MSI-X ?
> [marri] That will be another patch as it is only specific to some SoCs
>
> > + msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys,
> GFP_KERNEL);
> > + msi->msi_addr_hi = 0x0;
> > + msi->msi_addr_lo = (u32) msi_phys;
> > + dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x \n",
> msi->msi_addr_lo);
>
> So your MSI is a write to just some arbitrary address?
>
> [Marri] We choose a arbitrary address and pass that to msi APIs which would
write
to endpoint device config space. If endpoint wants to cause an MSI it just
generates
memory transaction to this address, as soon as it is on system bus PCI-E
handler
will snoop this address and cause interrupt to CPU.
> > + /* Progam the Interrupt handler Termination addr registers */
> > + out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
> > + out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo);
>
> And the hardware detects it by catching writes to that address? But the
> write still lands?
>
> [marri] write still happens to memory but we do't need need to wait for it
to complete.
So the termination would avoid un-necessary delay in acking the write or
race condition
to that particular address.
>
>
[-- Attachment #2: Type: text/html, Size: 3493 bytes --]
^ permalink raw reply
* Re: Debugging kernel on mpc7448
From: tiejun.chen @ 2010-11-05 2:25 UTC (permalink / raw)
To: Cajus Pollmeier; +Cc: Linuxppc-dev
In-Reply-To: <1288796616.3609.50.camel@frost>
Cajus Pollmeier wrote:
> Hello there,
>
> I'm currently trying to get a kernel upgrade from 2.6.11 to 2.6.31
> working with u-boot/cuImage.c2k on a custom marvell discovery 3 board.
Are you sure if all device nodes information of c2k.dts are matched your actual
board hardware? If no I think you have to add some fixup() to correct those
'incorrect' device on the file, cuboot-c2k.c.
> In the moment, the following steps work:
>
> * u-boot (1.1.4, not changeable in the moment) runs from flash and
> offers a prompt
> * loading cuImage.c2k
> * running the code of wrapper.c until calling vmlinux.addr
Did you see those message with uncompressing zImage? Maybe its convenient to
help you for other guys if you can attach all boot log.
> * entering __start in head_32.S and running until early_init gets called
>
> The systems then hangs until the watchdog resets the board. In this
Often the watchdog should be invoked when its associated driver initialization.
So I wonder when the watchdog live.
> early stage, I've no output to the serial console - which is the only
> way to see what's going on there without having a development board with
> single step capabilities.
>
> To track it until early_init, I tried to place a stupid "blr" in
> head_32.S, in order to get back to wrapper.c - which writes out a
> message to the serial console in case the kernel "accidently" gets back
> to it.
Firstly I think you can lighten one LED to mask a flag for single step if there
is one LED existed on your target :) That's a ugly way but also make the life
easy sometimes.
And actually bootloader already initial UART so you can write some simple thing
directly into that corresponding UART data register to hint where the kernel
run. Note you can get this UART base address from bootloader, or the cuboot
early stage.
Tiejun
>
>>From now on, I'm not sure if early_init is properly called. The blr
> after the call is either not reached or there's something going on which
> is beyond my limited knowledge of ppc assembler. Maybe u-boot gets
> overwritten, but the blr isn't even reached if I change early_init by
> just returning 0U immediately. Hmm.
>
> Any pointers to help debugging would be really appreciated ;-)
>
> Cheers,
> Cajus
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>
^ permalink raw reply
* [PATCH 1/3] edac: Use ccsr_pci structure instead of hardcoded define
From: Lan Chunhe @ 2010-11-05 2:54 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Lan Chunhe, akpm, Kai.Jiang, dougthompson
There are some differences of register offset and definition between
pci and pcie error management registers. While, some other pci/pcie
error management registers are nearly the same.
To merge pci and pcie edac code into one, it is easier to use ccsr_pci
structure than the hardcoded define. So remove the hardcoded define and
add pci/pcie error management register in ccsr_pci structure.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Lan Chunhe <b25806@freescale.com>
---
arch/powerpc/sysdev/fsl_pci.h | 54 +++++++++++++++++++++++++++++++---------
drivers/edac/mpc85xx_edac.h | 13 +--------
2 files changed, 44 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index 8ad72a1..796985b 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -1,7 +1,7 @@
/*
* MPC85xx/86xx PCI Express structure define
*
- * Copyright 2007 Freescale Semiconductor, Inc
+ * Copyright 2007, 2010 Freescale Semiconductor, Inc
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -14,6 +14,8 @@
#ifndef __POWERPC_FSL_PCI_H
#define __POWERPC_FSL_PCI_H
+#include <asm/pci-bridge.h>
+
#define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status */
#define PCIE_LTSSM_L0 0x16 /* L0 state */
#define PIWAR_EN 0x80000000 /* Enable */
@@ -71,18 +73,46 @@ struct ccsr_pci {
*/
struct pci_inbound_window_regs piw[3];
- __be32 pex_err_dr; /* 0x.e00 - PCI/PCIE error detect register */
- u8 res21[4];
- __be32 pex_err_en; /* 0x.e08 - PCI/PCIE error interrupt enable register */
- u8 res22[4];
- __be32 pex_err_disr; /* 0x.e10 - PCI/PCIE error disable register */
- u8 res23[12];
- __be32 pex_err_cap_stat; /* 0x.e20 - PCI/PCIE error capture status register */
+/* Merge PCI/PCI Express error management registers */
+ __be32 pex_err_dr; /* 0x.e00
+ * - PCI/PCIE error detect register
+ */
+ __be32 pex_err_cap_dr; /* 0x.e04
+ * - PCI error capture disabled register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_en; /* 0x.e08
+ * - PCI/PCIE error interrupt enable register
+ */
+ __be32 pex_err_attrib; /* 0x.e0c
+ * - PCI error attributes capture register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_disr; /* 0x.e10
+ * - PCI error address capture register
+ * - PCIE error disable register
+ */
+ __be32 pex_err_ext_addr; /* 0x.e14
+ * - PCI error extended addr capture register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_dl; /* 0x.e18
+ * - PCI error data low capture register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_dh; /* 0x.e1c
+ * - PCI error data high capture register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_cap_stat; /* 0x.e20
+ * - PCI gasket timer register
+ * - PCIE error capture status register
+ */
u8 res24[4];
- __be32 pex_err_cap_r0; /* 0x.e28 - PCIE error capture register 0 */
- __be32 pex_err_cap_r1; /* 0x.e2c - PCIE error capture register 0 */
- __be32 pex_err_cap_r2; /* 0x.e30 - PCIE error capture register 0 */
- __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture register 0 */
+ __be32 pex_err_cap_r0; /* 0x.e28 - PCIE error capture register 0 */
+ __be32 pex_err_cap_r1; /* 0x.e2c - PCIE error capture register 1 */
+ __be32 pex_err_cap_r2; /* 0x.e30 - PCIE error capture register 2 */
+ __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture register 3 */
};
extern int fsl_add_bridge(struct device_node *dev, int is_primary);
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h
index cb24df8..099581d 100644
--- a/drivers/edac/mpc85xx_edac.h
+++ b/drivers/edac/mpc85xx_edac.h
@@ -1,5 +1,7 @@
/*
* Freescale MPC85xx Memory Controller kenel module
+ * Copyright (c) 2010 Freescale Semiconductor, Inc.
+ *
* Author: Dave Jiang <djiang@mvista.com>
*
* 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
@@ -131,17 +133,6 @@
#define PCI_EDE_PERR_MASK (PCI_EDE_TGT_PERR | PCI_EDE_MST_PERR | \
PCI_EDE_ADDR_PERR)
-#define MPC85XX_PCI_ERR_DR 0x0000
-#define MPC85XX_PCI_ERR_CAP_DR 0x0004
-#define MPC85XX_PCI_ERR_EN 0x0008
-#define MPC85XX_PCI_ERR_ATTRIB 0x000c
-#define MPC85XX_PCI_ERR_ADDR 0x0010
-#define MPC85XX_PCI_ERR_EXT_ADDR 0x0014
-#define MPC85XX_PCI_ERR_DL 0x0018
-#define MPC85XX_PCI_ERR_DH 0x001c
-#define MPC85XX_PCI_GAS_TIMR 0x0020
-#define MPC85XX_PCI_PCIX_TIMR 0x0024
-
struct mpc85xx_mc_pdata {
char *name;
int edac_idx;
--
1.5.4.5
^ permalink raw reply related
* [PATCH 00/49] Use vzalloc not vmalloc/kmemset
From: Joe Perches @ 2010-11-05 3:07 UTC (permalink / raw)
To: Jiri Kosina
Cc: linux-mips, alsa-devel, linux-ia64, kvm, dri-devel, linux-mm,
dm-devel, linux-mtd, devel, linux-s390, rds-devel, linux-scsi,
linux-rdma, linux-atm-general, codalist, virtualization, coreteam,
linux-input, osst-users, linux-ext4, linux-media, cbe-oss-dev,
amd64-microcode, reiserfs-devel, kvm-ppc, xfs, linux-raid,
netfilter, netdev, containers, linux-kernel, xen-devel,
e1000-devel, netfilter-devel, linux-crypto, linuxppc-dev,
drbd-user
In-Reply-To: <alpine.DEB.2.00.1011031108260.11625@router.home>
Converted vmalloc/memset and vmalloc_node/memset to
vzalloc or vzalloc_node using a cocci script and some editing
Reduces text a little bit.
Compiled x86 only.
There are still vmalloc_32 with memset calls still around.
Broken out to multiple patches to cc appropriate maintainers.
Joe Perches (49):
arch/ia64: Use vzalloc
arch/mips: Use vzalloc
arch/powerpc: Use vzalloc
arch/s390: Use vzalloc
arch/x86: Use vzalloc
crypto: Use vzalloc
drivers/atm: Use vzalloc
drivers/block: Use vzalloc
drivers/char: Use vzalloc
drivers/gpu: Use vzalloc
drivers/hid: Use vzalloc
drivers/infiniband: Use vzalloc
drivers/isdn: Use vzalloc
drivers/md: Use vzalloc
drivers/media: Use vzalloc
drivers/mtd: Use vzalloc
drivers/net/cxgb3: Use vzalloc
drivers/net/cxgb4: Use vzalloc
drivers/net/e1000: Use vzalloc
drivers/net/e1000e: Use vzalloc
drivers/net/ehea: Use vzalloc
drivers/net/igb: Use vzalloc
drivers/net/igbvf: Use vzalloc
drivers/net/ixgb: Use vzalloc
drivers/net/ixgbe: Use vzalloc
drivers/net/ixgbevf: Use vzalloc
drivers/net/netxen: Use vzalloc
drivers/net/pch_gbe: Use vzalloc
drivers/net/qlcnic: Use vzalloc
drivers/net/sfc: Use vzalloc
drivers/net/vxge: Use vzalloc
drivers/net/bnx2.c: Use vzalloc
drivers/s390: Use vzalloc
drivers/scsi: Use vzalloc
drivers/staging: Use vzalloc
drivers/video: Use vzalloc
fs/ext4: Use vzalloc
fs/jffs2: Use vzalloc
fs/reiserfs: Use vzalloc
fs/udf: Use vzalloc
fs/xfs: Use vzalloc
include/linux/coda_linux.h: Use vzalloc
kernel: Use vzalloc
mm: Use vzalloc
net/core/pktgen.c: Use vzalloc
net/netfilter: Use vzalloc
net/rds: Use vzalloc
sound/oss/dev_table.c: Use vzalloc
virt/kvm/kvm_main.c: Use vzalloc
arch/ia64/kernel/perfmon.c | 3 +-
arch/mips/sibyte/common/sb_tbprof.c | 3 +-
arch/powerpc/kvm/book3s.c | 6 +--
arch/powerpc/platforms/cell/spufs/lscsa_alloc.c | 3 +-
arch/s390/hypfs/hypfs_diag.c | 3 +-
arch/x86/kernel/microcode_amd.c | 3 +-
arch/x86/kvm/x86.c | 3 +-
arch/x86/mm/pageattr-test.c | 3 +-
crypto/deflate.c | 3 +-
crypto/zlib.c | 3 +-
drivers/atm/idt77252.c | 11 ++++---
drivers/atm/lanai.c | 3 +-
drivers/block/drbd/drbd_bitmap.c | 5 +--
drivers/char/agp/backend.c | 3 +-
drivers/char/mspec.c | 5 +--
drivers/gpu/drm/via/via_dmablit.c | 4 +-
drivers/hid/hid-core.c | 3 +-
drivers/infiniband/hw/amso1100/c2_rnic.c | 5 +--
drivers/infiniband/hw/ehca/ipz_pt_fn.c | 5 +--
drivers/infiniband/hw/ipath/ipath_driver.c | 3 +-
drivers/infiniband/hw/ipath/ipath_file_ops.c | 11 ++-----
drivers/infiniband/hw/ipath/ipath_init_chip.c | 5 +--
drivers/infiniband/hw/qib/qib_init.c | 7 +---
drivers/infiniband/ulp/ipoib/ipoib_cm.c | 10 ++----
drivers/infiniband/ulp/ipoib/ipoib_main.c | 3 +-
drivers/isdn/i4l/isdn_common.c | 4 +-
drivers/isdn/mISDN/dsp_core.c | 3 +-
drivers/isdn/mISDN/l1oip_codec.c | 6 +--
drivers/md/dm-log.c | 3 +-
drivers/md/dm-snap-persistent.c | 3 +-
drivers/md/dm-table.c | 4 +--
drivers/media/dvb/ngene/ngene-core.c | 3 +-
drivers/media/video/mx3_camera.c | 3 +-
drivers/media/video/pwc/pwc-if.c | 3 +-
drivers/media/video/videobuf-dma-sg.c | 3 +-
drivers/mtd/nand/nandsim.c | 3 +-
drivers/mtd/ubi/vtbl.c | 6 +--
drivers/net/bnx2.c | 10 +-----
drivers/net/cxgb3/cxgb3_offload.c | 7 ++--
drivers/net/cxgb4/cxgb4_main.c | 7 ++--
drivers/net/e1000/e1000_main.c | 6 +--
drivers/net/e1000e/netdev.c | 6 +--
drivers/net/ehea/ehea_main.c | 4 +--
drivers/net/igb/igb_main.c | 6 +--
drivers/net/igbvf/netdev.c | 6 +--
drivers/net/ixgb/ixgb_main.c | 6 +--
drivers/net/ixgbe/ixgbe_main.c | 10 ++----
drivers/net/ixgbevf/ixgbevf_main.c | 6 +--
drivers/net/netxen/netxen_nic_init.c | 7 +---
drivers/net/pch_gbe/pch_gbe_main.c | 6 +--
drivers/net/qlcnic/qlcnic_init.c | 7 +---
drivers/net/sfc/filter.c | 3 +-
drivers/net/vxge/vxge-config.c | 37 +++++-----------------
drivers/s390/cio/blacklist.c | 3 +-
drivers/scsi/bfa/bfad.c | 3 +-
drivers/scsi/bfa/bfad_debugfs.c | 8 +----
drivers/scsi/cxgbi/libcxgbi.h | 9 ++----
drivers/scsi/osst.c | 3 +-
drivers/scsi/qla2xxx/qla_attr.c | 3 +-
drivers/scsi/qla2xxx/qla_bsg.c | 3 +-
drivers/scsi/scsi_debug.c | 7 +---
drivers/staging/comedi/drivers.c | 4 +--
drivers/staging/rtl8192e/r8192E_core.c | 4 +--
drivers/staging/udlfb/udlfb.c | 5 +--
drivers/staging/xgifb/XGI_main_26.c | 3 +-
drivers/staging/zram/zram_drv.c | 3 +-
drivers/video/arcfb.c | 5 +--
drivers/video/broadsheetfb.c | 4 +--
drivers/video/hecubafb.c | 5 +--
drivers/video/metronomefb.c | 4 +--
drivers/video/xen-fbfront.c | 3 +-
fs/ext4/super.c | 4 +--
fs/jffs2/build.c | 5 +--
fs/reiserfs/journal.c | 9 ++----
fs/reiserfs/resize.c | 4 +--
fs/udf/super.c | 5 +--
fs/xfs/linux-2.6/kmem.h | 7 +----
include/linux/coda_linux.h | 26 ++++++++++------
kernel/profile.c | 6 +--
kernel/relay.c | 4 +--
mm/memcontrol.c | 5 +--
mm/page_cgroup.c | 3 +-
mm/percpu.c | 8 +----
mm/swapfile.c | 3 +-
net/core/pktgen.c | 3 +-
net/netfilter/x_tables.c | 5 +--
net/rds/ib_cm.c | 6 +--
sound/oss/dev_table.c | 6 +--
virt/kvm/kvm_main.c | 13 ++------
89 files changed, 167 insertions(+), 328 deletions(-)
--
1.7.3.1.g432b3.dirty
^ permalink raw reply
* [PATCH 03/49] arch/powerpc: Use vzalloc
From: Joe Perches @ 2010-11-05 3:07 UTC (permalink / raw)
To: Jiri Kosina
Cc: cbe-oss-dev, kvm, Arnd Bergmann, Marcelo Tosatti, Alexander Graf,
kvm-ppc, linux-kernel, Paul Mackerras, Jeremy Kerr, linuxppc-dev,
Avi Kivity
In-Reply-To: <cover.1288925424.git.joe@perches.com>
Signed-off-by: Joe Perches <joe@perches.com>
---
arch/powerpc/kvm/book3s.c | 6 ++----
arch/powerpc/platforms/cell/spufs/lscsa_alloc.c | 3 +--
2 files changed, 3 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index e316847..4275463 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -1307,13 +1307,11 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
int err = -ENOMEM;
unsigned long p;
- vcpu_book3s = vmalloc(sizeof(struct kvmppc_vcpu_book3s));
+ vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
if (!vcpu_book3s)
goto out;
- memset(vcpu_book3s, 0, sizeof(struct kvmppc_vcpu_book3s));
-
- vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *)
+ vcpu_book3s->shadow_vcpu =
kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL);
if (!vcpu_book3s->shadow_vcpu)
goto free_vcpu;
diff --git a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
index a101abf..3b894f5 100644
--- a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
+++ b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
@@ -36,10 +36,9 @@ static int spu_alloc_lscsa_std(struct spu_state *csa)
struct spu_lscsa *lscsa;
unsigned char *p;
- lscsa = vmalloc(sizeof(struct spu_lscsa));
+ lscsa = vzalloc(sizeof(struct spu_lscsa));
if (!lscsa)
return -ENOMEM;
- memset(lscsa, 0, sizeof(struct spu_lscsa));
csa->lscsa = lscsa;
/* Set LS pages reserved to allow for user-space mapping. */
--
1.7.3.1.g432b3.dirty
^ permalink raw reply related
* [PATCH 2/3] edac/85xx: PCI/PCIE error interrupt edac support
From: Lan Chunhe @ 2010-11-05 2:56 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Lan Chunhe, akpm, Kai.Jiang, dougthompson
Add pcie error interrupt edac support for mpc85xx and p4080.
mpc85xx uses the legacy interrupt report mechanism - the error
interrupts are reported directly to mpic. While, p4080 attaches
most of error interrupts to interrupt 0. And report error interrupt
to mpic via interrupt 0. This patch can handle both of them.
Due to the error management register offset and definition difference
between pci and pcie, use ccsr_pci structure to merge pci and pcie
edac code into one.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Lan Chunhe <b25806@freescale.com>
---
drivers/edac/mpc85xx_edac.c | 243 +++++++++++++++++++++++++++++++++----------
drivers/edac/mpc85xx_edac.h | 9 ++-
2 files changed, 194 insertions(+), 58 deletions(-)
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index b123bb3..c878527 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -1,5 +1,6 @@
/*
* Freescale MPC85xx Memory Controller kenel module
+ * Copyright (c) 2010 Freescale Semiconductor, Inc.
*
* Author: Dave Jiang <djiang@mvista.com>
*
@@ -21,6 +22,7 @@
#include <linux/of_platform.h>
#include <linux/of_device.h>
+#include <sysdev/fsl_pci.h>
#include "edac_module.h"
#include "edac_core.h"
#include "mpc85xx_edac.h"
@@ -37,13 +39,8 @@ static u32 orig_ddr_err_sbe;
/*
* PCI Err defines
*/
-#ifdef CONFIG_PCI
-static u32 orig_pci_err_cap_dr;
-static u32 orig_pci_err_en;
-#endif
-
static u32 orig_l2_err_disable;
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
static u32 orig_hid1[2];
#endif
@@ -151,37 +148,52 @@ static void mpc85xx_pci_check(struct edac_pci_ctl_info *pci)
{
struct mpc85xx_pci_pdata *pdata = pci->pvt_info;
u32 err_detect;
+ struct ccsr_pci *reg = pdata->pci_reg;
+
+ err_detect = in_be32(&pdata->pci_reg->pex_err_dr);
+
+ if (pdata->pcie_flag) {
+ printk(KERN_ERR "PCIE error(s) detected\n");
+ printk(KERN_ERR "PCIE ERR_DR register: 0x%08x\n", err_detect);
+ printk(KERN_ERR "PCIE ERR_CAP_STAT register: 0x%08x\n",
+ in_be32(®->pex_err_cap_stat));
+ printk(KERN_ERR "PCIE ERR_CAP_R0 register: 0x%08x\n",
+ in_be32(®->pex_err_cap_r0));
+ printk(KERN_ERR "PCIE ERR_CAP_R1 register: 0x%08x\n",
+ in_be32(®->pex_err_cap_r1));
+ printk(KERN_ERR "PCIE ERR_CAP_R2 register: 0x%08x\n",
+ in_be32(®->pex_err_cap_r2));
+ printk(KERN_ERR "PCIE ERR_CAP_R3 register: 0x%08x\n",
+ in_be32(®->pex_err_cap_r3));
+ } else {
+ /* master aborts can happen during PCI config cycles */
+ if (!(err_detect & ~(PCI_EDE_MULTI_ERR | PCI_EDE_MST_ABRT))) {
+ out_be32(®->pex_err_dr, err_detect);
+ return;
+ }
- err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR);
-
- /* master aborts can happen during PCI config cycles */
- if (!(err_detect & ~(PCI_EDE_MULTI_ERR | PCI_EDE_MST_ABRT))) {
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
- return;
+ printk(KERN_ERR "PCI error(s) detected\n");
+ printk(KERN_ERR "PCI/X ERR_DR register: 0x%08x\n", err_detect);
+ printk(KERN_ERR "PCI/X ERR_ATTRIB register: 0x%08x\n",
+ in_be32(®->pex_err_attrib));
+ printk(KERN_ERR "PCI/X ERR_ADDR register: 0x%08x\n",
+ in_be32(®->pex_err_disr));
+ printk(KERN_ERR "PCI/X ERR_EXT_ADDR register: 0x%08x\n",
+ in_be32(®->pex_err_ext_addr));
+ printk(KERN_ERR "PCI/X ERR_DL register: 0x%08x\n",
+ in_be32(®->pex_err_dl));
+ printk(KERN_ERR "PCI/X ERR_DH register: 0x%08x\n",
+ in_be32(®->pex_err_dh));
+
+ if (err_detect & PCI_EDE_PERR_MASK)
+ edac_pci_handle_pe(pci, pci->ctl_name);
+
+ if (err_detect & ~(PCI_EDE_MULTI_ERR | PCI_EDE_PERR_MASK))
+ edac_pci_handle_npe(pci, pci->ctl_name);
}
- printk(KERN_ERR "PCI error(s) detected\n");
- printk(KERN_ERR "PCI/X ERR_DR register: %#08x\n", err_detect);
-
- printk(KERN_ERR "PCI/X ERR_ATTRIB register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ATTRIB));
- printk(KERN_ERR "PCI/X ERR_ADDR register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR));
- printk(KERN_ERR "PCI/X ERR_EXT_ADDR register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EXT_ADDR));
- printk(KERN_ERR "PCI/X ERR_DL register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DL));
- printk(KERN_ERR "PCI/X ERR_DH register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DH));
-
/* clear error bits */
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
-
- if (err_detect & PCI_EDE_PERR_MASK)
- edac_pci_handle_pe(pci, pci->ctl_name);
-
- if ((err_detect & ~PCI_EDE_MULTI_ERR) & ~PCI_EDE_PERR_MASK)
- edac_pci_handle_npe(pci, pci->ctl_name);
+ out_be32(®->pex_err_dr, err_detect);
}
static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id)
@@ -190,7 +202,7 @@ static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id)
struct mpc85xx_pci_pdata *pdata = pci->pvt_info;
u32 err_detect;
- err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR);
+ err_detect = in_be32(&pdata->pci_reg->pex_err_dr);
if (!err_detect)
return IRQ_NONE;
@@ -200,12 +212,103 @@ static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id)
return IRQ_HANDLED;
}
+/*
+ * This function is for error interrupt ORed mechanism.
+ * This mechanism attaches most functions' error interrupts to interrupt 0.
+ * And report error interrupt to mpic via interrupt 0.
+ * EIMR0 - Error Interrupt Mask Register 0.
+ *
+ * This function check whether the device support error interrupt ORed
+ * mechanism via device tree. If supported, umask pcie error interrupt
+ * bit in EIMR0.
+ */
+static int mpc85xx_err_int_en(struct platform_device *op)
+{
+ u32 *int_cell;
+ struct device_node *np;
+ void __iomem *mpic_base;
+ u32 reg_tmp;
+ u32 int_len;
+ struct resource r;
+ int res;
+
+ if (!op->dev.of_node)
+ return -EINVAL;
+
+ /*
+ * Unmask pcie error interrupt bit in EIMR0.
+ * Extend interrupt specifier has 4 cells.
+ * For the 3rd cell:
+ * 0 -- normal interrupt;
+ * 1 -- error interrupt.
+ */
+ int_cell = (u32 *)of_get_property(op->dev.of_node, "interrupts",
+ &int_len);
+ if ((int_len/sizeof(u32)) == 4) {
+ /* soc has error interrupt integration handling mechanism */
+ if (*(int_cell + 2) == 1) {
+ np = of_find_node_by_type(NULL, "open-pic");
+
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "%s: Failed to map mpic regs\n",
+ __func__);
+ of_node_put(np);
+ res = -ENOMEM;
+ goto err;
+ }
+
+ if (!request_mem_region(r.start, r.end - r.start + 1,
+ "mpic")) {
+ printk(KERN_ERR "%s: Error while requesting "
+ "mem region\n", __func__);
+ res = -EBUSY;
+ goto err;
+ }
+
+ mpic_base = ioremap(r.start, r.end - r.start + 1);
+ if (!mpic_base) {
+ printk(KERN_ERR "%s: Unable to map mpic regs\n",
+ __func__);
+ res = -ENOMEM;
+ goto err_ioremap;
+ }
+
+ reg_tmp = in_be32(mpic_base + MPC85XX_MPIC_EIMR0);
+ out_be32(mpic_base + MPC85XX_MPIC_EIMR0,
+ reg_tmp & ~(1 << (31 - *(int_cell + 3))));
+ iounmap(mpic_base);
+ release_mem_region(r.start, r.end - r.start + 1);
+ of_node_put(np);
+ }
+ }
+
+ return 0;
+
+err_ioremap:
+ release_mem_region(r.start, r.end - r.start + 1);
+err:
+ return res;
+}
+
+static int mpc85xx_pcie_find_capability(struct device_node *np)
+{
+ struct pci_controller *hose;
+
+ if (!np)
+ return -EINVAL;
+
+ hose = pci_find_hose_for_OF_device(np);
+ return early_find_capability(hose, hose->bus->number, 0,
+ PCI_CAP_ID_EXP);
+}
+
static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
const struct of_device_id *match)
{
struct edac_pci_ctl_info *pci;
struct mpc85xx_pci_pdata *pdata;
struct resource r;
+ struct ccsr_pci *reg;
int res = 0;
if (!devres_open_group(&op->dev, mpc85xx_pci_err_probe, GFP_KERNEL))
@@ -218,6 +321,9 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
pdata = pci->pvt_info;
pdata->name = "mpc85xx_pci_err";
pdata->irq = NO_IRQ;
+ if (mpc85xx_pcie_find_capability(op->dev.of_node) > 0)
+ pdata->pcie_flag = 1;
+
dev_set_drvdata(&op->dev, pci);
pci->dev = &op->dev;
pci->mod_name = EDAC_MOD_STR;
@@ -236,9 +342,6 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
goto err;
}
- /* we only need the error registers */
- r.start += 0xe00;
-
if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r),
pdata->name)) {
printk(KERN_ERR "%s: Error while requesting mem region\n",
@@ -247,26 +350,32 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
goto err;
}
- pdata->pci_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r));
- if (!pdata->pci_vbase) {
+ pdata->pci_reg = devm_ioremap(&op->dev, r.start, resource_size(&r));
+ if (!pdata->pci_reg) {
printk(KERN_ERR "%s: Unable to setup PCI err regs\n", __func__);
res = -ENOMEM;
goto err;
}
- orig_pci_err_cap_dr =
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR);
-
- /* PCI master abort is expected during config cycles */
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR, 0x40);
+ if (mpc85xx_err_int_en(op) < 0)
+ goto err;
- orig_pci_err_en = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN);
+ reg = pdata->pci_reg;
+ /* disable pci/pcie error detect */
+ if (pdata->pcie_flag) {
+ pdata->orig_pci_err_dr = in_be32(®->pex_err_disr);
+ out_be32(®->pex_err_disr, ~0);
+ } else {
+ pdata->orig_pci_err_dr = in_be32(®->pex_err_cap_dr);
+ out_be32(®->pex_err_cap_dr, ~0);
+ }
- /* disable master abort reporting */
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0x40);
+ /* disable all pcie error interrupt */
+ pdata->orig_pci_err_en = in_be32(®->pex_err_en);
+ out_be32(®->pex_err_en, 0);
- /* clear error bits */
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0);
+ /* clear all error bits */
+ out_be32(®->pex_err_dr, ~0);
if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
debugf3("%s(): failed edac_pci_add_device()\n", __func__);
@@ -276,7 +385,7 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
if (edac_op_state == EDAC_OPSTATE_INT) {
pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
res = devm_request_irq(&op->dev, pdata->irq,
- mpc85xx_pci_isr, IRQF_DISABLED,
+ mpc85xx_pci_isr, IRQF_SHARED,
"[EDAC] PCI err", pci);
if (res < 0) {
printk(KERN_ERR
@@ -291,6 +400,17 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
pdata->irq);
}
+ if (pdata->pcie_flag) {
+ /* enable all pcie error interrupt & error detect */
+ out_be32(®->pex_err_en, ~0);
+ out_be32(®->pex_err_disr, 0);
+ } else {
+ /* PCI master abort is expected during config cycles */
+ out_be32(®->pex_err_cap_dr, PCI_ERR_CAP_DR_DIS_MST);
+ /* disable master abort reporting */
+ out_be32(®->pex_err_en, PCI_ERR_EN_DIS_MST);
+ }
+
devres_remove_group(&op->dev, mpc85xx_pci_err_probe);
debugf3("%s(): success\n", __func__);
printk(KERN_INFO EDAC_MOD_STR " PCI err registered\n");
@@ -312,10 +432,13 @@ static int mpc85xx_pci_err_remove(struct platform_device *op)
debugf0("%s()\n", __func__);
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR,
- orig_pci_err_cap_dr);
+ if (pdata->pcie_flag)
+ out_be32(&pdata->pci_reg->pex_err_disr, pdata->orig_pci_err_dr);
+ else
+ out_be32(&pdata->pci_reg->pex_err_cap_dr,
+ pdata->orig_pci_err_dr);
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, orig_pci_err_en);
+ out_be32(&pdata->pci_reg->pex_err_en, pdata->orig_pci_err_en);
edac_pci_del_device(pci->dev);
@@ -334,6 +457,12 @@ static struct of_device_id mpc85xx_pci_err_of_match[] = {
{
.compatible = "fsl,mpc8540-pci",
},
+ {
+ .compatible = "fsl,mpc8548-pcie",
+ },
+ {
+ .compatible = "fsl,p4080-pcie",
+ },
{},
};
MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match);
@@ -1146,7 +1275,7 @@ static struct of_platform_driver mpc85xx_mc_err_driver = {
},
};
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
static void __init mpc85xx_mc_clear_rfxe(void *data)
{
orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1);
@@ -1185,7 +1314,7 @@ static int __init mpc85xx_mc_init(void)
printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n");
#endif
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
/*
* need to clear HID1[RFXE] to disable machine check int
* so we can catch it
@@ -1199,7 +1328,7 @@ static int __init mpc85xx_mc_init(void)
module_init(mpc85xx_mc_init);
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
static void __exit mpc85xx_mc_restore_hid1(void *data)
{
mtspr(SPRN_HID1, orig_hid1[smp_processor_id()]);
@@ -1208,7 +1337,7 @@ static void __exit mpc85xx_mc_restore_hid1(void *data)
static void __exit mpc85xx_mc_exit(void)
{
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
#endif
#ifdef CONFIG_PCI
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h
index 099581d..604f181 100644
--- a/drivers/edac/mpc85xx_edac.h
+++ b/drivers/edac/mpc85xx_edac.h
@@ -133,6 +133,10 @@
#define PCI_EDE_PERR_MASK (PCI_EDE_TGT_PERR | PCI_EDE_MST_PERR | \
PCI_EDE_ADDR_PERR)
+#define PCI_ERR_CAP_DR_DIS_MST 0x40
+#define PCI_ERR_EN_DIS_MST (~PCI_ERR_CAP_DR_DIS_MST)
+#define MPC85XX_MPIC_EIMR0 0x3910
+
struct mpc85xx_mc_pdata {
char *name;
int edac_idx;
@@ -149,8 +153,11 @@ struct mpc85xx_l2_pdata {
struct mpc85xx_pci_pdata {
char *name;
+ u8 pcie_flag;
int edac_idx;
- void __iomem *pci_vbase;
+ struct ccsr_pci *pci_reg;
+ u32 orig_pci_err_dr;
+ u32 orig_pci_err_en;
int irq;
};
--
1.5.4.5
^ permalink raw reply related
* [PATCH 3/3] powerpc/85xx: Update of_platform_bus_probe list to include PCI controller
From: Lan Chunhe @ 2010-11-05 2:57 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Lan Chunhe, akpm, Kai.Jiang, dougthompson
We need to get the pci controller created as an of platform device to
allow the EDAC driver to bind to it on P4080DS.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Lan Chunhe <b25806@freescale.com>
---
arch/powerpc/platforms/85xx/corenet_ds.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index 2ab338c..bf9b9e5 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -116,6 +116,9 @@ static const struct of_device_id of_device_ids[] __devinitconst = {
{
.compatible = "fsl,rapidio-delta",
},
+ {
+ .compatible = "fsl,p4080-pcie",
+ },
{}
};
--
1.5.4.5
^ permalink raw reply related
* [PATCH 1/3] edac: Use ccsr_pci structure instead of hardcoded define
From: Lan Chunhe @ 2010-11-05 3:23 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Lan Chunhe, akpm, Kai.Jiang, dougthompson
There are some differences of register offset and definition between
pci and pcie error management registers. While, some other pci/pcie
error management registers are nearly the same.
To merge pci and pcie edac code into one, it is easier to use ccsr_pci
structure than the hardcoded define. So remove the hardcoded define and
add pci/pcie error management register in ccsr_pci structure.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Lan Chunhe <b25806@freescale.com>
---
arch/powerpc/sysdev/fsl_pci.h | 54 +++++++++++++++++++++++++++++++---------
drivers/edac/mpc85xx_edac.h | 13 +--------
2 files changed, 44 insertions(+), 23 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index 8ad72a1..796985b 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -1,7 +1,7 @@
/*
* MPC85xx/86xx PCI Express structure define
*
- * Copyright 2007 Freescale Semiconductor, Inc
+ * Copyright 2007, 2010 Freescale Semiconductor, Inc
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -14,6 +14,8 @@
#ifndef __POWERPC_FSL_PCI_H
#define __POWERPC_FSL_PCI_H
+#include <asm/pci-bridge.h>
+
#define PCIE_LTSSM 0x0404 /* PCIE Link Training and Status */
#define PCIE_LTSSM_L0 0x16 /* L0 state */
#define PIWAR_EN 0x80000000 /* Enable */
@@ -71,18 +73,46 @@ struct ccsr_pci {
*/
struct pci_inbound_window_regs piw[3];
- __be32 pex_err_dr; /* 0x.e00 - PCI/PCIE error detect register */
- u8 res21[4];
- __be32 pex_err_en; /* 0x.e08 - PCI/PCIE error interrupt enable register */
- u8 res22[4];
- __be32 pex_err_disr; /* 0x.e10 - PCI/PCIE error disable register */
- u8 res23[12];
- __be32 pex_err_cap_stat; /* 0x.e20 - PCI/PCIE error capture status register */
+/* Merge PCI/PCI Express error management registers */
+ __be32 pex_err_dr; /* 0x.e00
+ * - PCI/PCIE error detect register
+ */
+ __be32 pex_err_cap_dr; /* 0x.e04
+ * - PCI error capture disabled register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_en; /* 0x.e08
+ * - PCI/PCIE error interrupt enable register
+ */
+ __be32 pex_err_attrib; /* 0x.e0c
+ * - PCI error attributes capture register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_disr; /* 0x.e10
+ * - PCI error address capture register
+ * - PCIE error disable register
+ */
+ __be32 pex_err_ext_addr; /* 0x.e14
+ * - PCI error extended addr capture register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_dl; /* 0x.e18
+ * - PCI error data low capture register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_dh; /* 0x.e1c
+ * - PCI error data high capture register
+ * - PCIE has no this register
+ */
+ __be32 pex_err_cap_stat; /* 0x.e20
+ * - PCI gasket timer register
+ * - PCIE error capture status register
+ */
u8 res24[4];
- __be32 pex_err_cap_r0; /* 0x.e28 - PCIE error capture register 0 */
- __be32 pex_err_cap_r1; /* 0x.e2c - PCIE error capture register 0 */
- __be32 pex_err_cap_r2; /* 0x.e30 - PCIE error capture register 0 */
- __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture register 0 */
+ __be32 pex_err_cap_r0; /* 0x.e28 - PCIE error capture register 0 */
+ __be32 pex_err_cap_r1; /* 0x.e2c - PCIE error capture register 1 */
+ __be32 pex_err_cap_r2; /* 0x.e30 - PCIE error capture register 2 */
+ __be32 pex_err_cap_r3; /* 0x.e34 - PCIE error capture register 3 */
};
extern int fsl_add_bridge(struct device_node *dev, int is_primary);
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h
index cb24df8..099581d 100644
--- a/drivers/edac/mpc85xx_edac.h
+++ b/drivers/edac/mpc85xx_edac.h
@@ -1,5 +1,7 @@
/*
* Freescale MPC85xx Memory Controller kenel module
+ * Copyright (c) 2010 Freescale Semiconductor, Inc.
+ *
* Author: Dave Jiang <djiang@mvista.com>
*
* 2006-2007 (c) MontaVista Software, Inc. This file is licensed under
@@ -131,17 +133,6 @@
#define PCI_EDE_PERR_MASK (PCI_EDE_TGT_PERR | PCI_EDE_MST_PERR | \
PCI_EDE_ADDR_PERR)
-#define MPC85XX_PCI_ERR_DR 0x0000
-#define MPC85XX_PCI_ERR_CAP_DR 0x0004
-#define MPC85XX_PCI_ERR_EN 0x0008
-#define MPC85XX_PCI_ERR_ATTRIB 0x000c
-#define MPC85XX_PCI_ERR_ADDR 0x0010
-#define MPC85XX_PCI_ERR_EXT_ADDR 0x0014
-#define MPC85XX_PCI_ERR_DL 0x0018
-#define MPC85XX_PCI_ERR_DH 0x001c
-#define MPC85XX_PCI_GAS_TIMR 0x0020
-#define MPC85XX_PCI_PCIX_TIMR 0x0024
-
struct mpc85xx_mc_pdata {
char *name;
int edac_idx;
--
1.5.4.5
^ permalink raw reply related
* [PATCH 2/3] edac/85xx: PCI/PCIE error interrupt edac support
From: Lan Chunhe @ 2010-11-05 5:27 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Lan Chunhe, akpm, Kai.Jiang, dougthompson
Add pcie error interrupt edac support for mpc85xx and p4080.
mpc85xx uses the legacy interrupt report mechanism - the error
interrupts are reported directly to mpic. While, p4080 attaches
most of error interrupts to interrupt 0. And report error interrupt
to mpic via interrupt 0. This patch can handle both of them.
Due to the error management register offset and definition difference
between pci and pcie, use ccsr_pci structure to merge pci and pcie
edac code into one.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Lan Chunhe <b25806@freescale.com>
---
drivers/edac/mpc85xx_edac.c | 243 +++++++++++++++++++++++++++++++++----------
drivers/edac/mpc85xx_edac.h | 9 ++-
2 files changed, 194 insertions(+), 58 deletions(-)
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index b123bb3..c878527 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -1,5 +1,6 @@
/*
* Freescale MPC85xx Memory Controller kenel module
+ * Copyright (c) 2010 Freescale Semiconductor, Inc.
*
* Author: Dave Jiang <djiang@mvista.com>
*
@@ -21,6 +22,7 @@
#include <linux/of_platform.h>
#include <linux/of_device.h>
+#include <sysdev/fsl_pci.h>
#include "edac_module.h"
#include "edac_core.h"
#include "mpc85xx_edac.h"
@@ -37,13 +39,8 @@ static u32 orig_ddr_err_sbe;
/*
* PCI Err defines
*/
-#ifdef CONFIG_PCI
-static u32 orig_pci_err_cap_dr;
-static u32 orig_pci_err_en;
-#endif
-
static u32 orig_l2_err_disable;
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
static u32 orig_hid1[2];
#endif
@@ -151,37 +148,52 @@ static void mpc85xx_pci_check(struct edac_pci_ctl_info *pci)
{
struct mpc85xx_pci_pdata *pdata = pci->pvt_info;
u32 err_detect;
+ struct ccsr_pci *reg = pdata->pci_reg;
+
+ err_detect = in_be32(&pdata->pci_reg->pex_err_dr);
+
+ if (pdata->pcie_flag) {
+ printk(KERN_ERR "PCIE error(s) detected\n");
+ printk(KERN_ERR "PCIE ERR_DR register: 0x%08x\n", err_detect);
+ printk(KERN_ERR "PCIE ERR_CAP_STAT register: 0x%08x\n",
+ in_be32(®->pex_err_cap_stat));
+ printk(KERN_ERR "PCIE ERR_CAP_R0 register: 0x%08x\n",
+ in_be32(®->pex_err_cap_r0));
+ printk(KERN_ERR "PCIE ERR_CAP_R1 register: 0x%08x\n",
+ in_be32(®->pex_err_cap_r1));
+ printk(KERN_ERR "PCIE ERR_CAP_R2 register: 0x%08x\n",
+ in_be32(®->pex_err_cap_r2));
+ printk(KERN_ERR "PCIE ERR_CAP_R3 register: 0x%08x\n",
+ in_be32(®->pex_err_cap_r3));
+ } else {
+ /* master aborts can happen during PCI config cycles */
+ if (!(err_detect & ~(PCI_EDE_MULTI_ERR | PCI_EDE_MST_ABRT))) {
+ out_be32(®->pex_err_dr, err_detect);
+ return;
+ }
- err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR);
-
- /* master aborts can happen during PCI config cycles */
- if (!(err_detect & ~(PCI_EDE_MULTI_ERR | PCI_EDE_MST_ABRT))) {
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
- return;
+ printk(KERN_ERR "PCI error(s) detected\n");
+ printk(KERN_ERR "PCI/X ERR_DR register: 0x%08x\n", err_detect);
+ printk(KERN_ERR "PCI/X ERR_ATTRIB register: 0x%08x\n",
+ in_be32(®->pex_err_attrib));
+ printk(KERN_ERR "PCI/X ERR_ADDR register: 0x%08x\n",
+ in_be32(®->pex_err_disr));
+ printk(KERN_ERR "PCI/X ERR_EXT_ADDR register: 0x%08x\n",
+ in_be32(®->pex_err_ext_addr));
+ printk(KERN_ERR "PCI/X ERR_DL register: 0x%08x\n",
+ in_be32(®->pex_err_dl));
+ printk(KERN_ERR "PCI/X ERR_DH register: 0x%08x\n",
+ in_be32(®->pex_err_dh));
+
+ if (err_detect & PCI_EDE_PERR_MASK)
+ edac_pci_handle_pe(pci, pci->ctl_name);
+
+ if (err_detect & ~(PCI_EDE_MULTI_ERR | PCI_EDE_PERR_MASK))
+ edac_pci_handle_npe(pci, pci->ctl_name);
}
- printk(KERN_ERR "PCI error(s) detected\n");
- printk(KERN_ERR "PCI/X ERR_DR register: %#08x\n", err_detect);
-
- printk(KERN_ERR "PCI/X ERR_ATTRIB register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ATTRIB));
- printk(KERN_ERR "PCI/X ERR_ADDR register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_ADDR));
- printk(KERN_ERR "PCI/X ERR_EXT_ADDR register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EXT_ADDR));
- printk(KERN_ERR "PCI/X ERR_DL register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DL));
- printk(KERN_ERR "PCI/X ERR_DH register: %#08x\n",
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DH));
-
/* clear error bits */
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, err_detect);
-
- if (err_detect & PCI_EDE_PERR_MASK)
- edac_pci_handle_pe(pci, pci->ctl_name);
-
- if ((err_detect & ~PCI_EDE_MULTI_ERR) & ~PCI_EDE_PERR_MASK)
- edac_pci_handle_npe(pci, pci->ctl_name);
+ out_be32(®->pex_err_dr, err_detect);
}
static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id)
@@ -190,7 +202,7 @@ static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id)
struct mpc85xx_pci_pdata *pdata = pci->pvt_info;
u32 err_detect;
- err_detect = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR);
+ err_detect = in_be32(&pdata->pci_reg->pex_err_dr);
if (!err_detect)
return IRQ_NONE;
@@ -200,12 +212,103 @@ static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id)
return IRQ_HANDLED;
}
+/*
+ * This function is for error interrupt ORed mechanism.
+ * This mechanism attaches most functions' error interrupts to interrupt 0.
+ * And report error interrupt to mpic via interrupt 0.
+ * EIMR0 - Error Interrupt Mask Register 0.
+ *
+ * This function check whether the device support error interrupt ORed
+ * mechanism via device tree. If supported, umask pcie error interrupt
+ * bit in EIMR0.
+ */
+static int mpc85xx_err_int_en(struct platform_device *op)
+{
+ u32 *int_cell;
+ struct device_node *np;
+ void __iomem *mpic_base;
+ u32 reg_tmp;
+ u32 int_len;
+ struct resource r;
+ int res;
+
+ if (!op->dev.of_node)
+ return -EINVAL;
+
+ /*
+ * Unmask pcie error interrupt bit in EIMR0.
+ * Extend interrupt specifier has 4 cells.
+ * For the 3rd cell:
+ * 0 -- normal interrupt;
+ * 1 -- error interrupt.
+ */
+ int_cell = (u32 *)of_get_property(op->dev.of_node, "interrupts",
+ &int_len);
+ if ((int_len/sizeof(u32)) == 4) {
+ /* soc has error interrupt integration handling mechanism */
+ if (*(int_cell + 2) == 1) {
+ np = of_find_node_by_type(NULL, "open-pic");
+
+ if (of_address_to_resource(np, 0, &r)) {
+ printk(KERN_ERR "%s: Failed to map mpic regs\n",
+ __func__);
+ of_node_put(np);
+ res = -ENOMEM;
+ goto err;
+ }
+
+ if (!request_mem_region(r.start, r.end - r.start + 1,
+ "mpic")) {
+ printk(KERN_ERR "%s: Error while requesting "
+ "mem region\n", __func__);
+ res = -EBUSY;
+ goto err;
+ }
+
+ mpic_base = ioremap(r.start, r.end - r.start + 1);
+ if (!mpic_base) {
+ printk(KERN_ERR "%s: Unable to map mpic regs\n",
+ __func__);
+ res = -ENOMEM;
+ goto err_ioremap;
+ }
+
+ reg_tmp = in_be32(mpic_base + MPC85XX_MPIC_EIMR0);
+ out_be32(mpic_base + MPC85XX_MPIC_EIMR0,
+ reg_tmp & ~(1 << (31 - *(int_cell + 3))));
+ iounmap(mpic_base);
+ release_mem_region(r.start, r.end - r.start + 1);
+ of_node_put(np);
+ }
+ }
+
+ return 0;
+
+err_ioremap:
+ release_mem_region(r.start, r.end - r.start + 1);
+err:
+ return res;
+}
+
+static int mpc85xx_pcie_find_capability(struct device_node *np)
+{
+ struct pci_controller *hose;
+
+ if (!np)
+ return -EINVAL;
+
+ hose = pci_find_hose_for_OF_device(np);
+ return early_find_capability(hose, hose->bus->number, 0,
+ PCI_CAP_ID_EXP);
+}
+
static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
const struct of_device_id *match)
{
struct edac_pci_ctl_info *pci;
struct mpc85xx_pci_pdata *pdata;
struct resource r;
+ struct ccsr_pci *reg;
int res = 0;
if (!devres_open_group(&op->dev, mpc85xx_pci_err_probe, GFP_KERNEL))
@@ -218,6 +321,9 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
pdata = pci->pvt_info;
pdata->name = "mpc85xx_pci_err";
pdata->irq = NO_IRQ;
+ if (mpc85xx_pcie_find_capability(op->dev.of_node) > 0)
+ pdata->pcie_flag = 1;
+
dev_set_drvdata(&op->dev, pci);
pci->dev = &op->dev;
pci->mod_name = EDAC_MOD_STR;
@@ -236,9 +342,6 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
goto err;
}
- /* we only need the error registers */
- r.start += 0xe00;
-
if (!devm_request_mem_region(&op->dev, r.start, resource_size(&r),
pdata->name)) {
printk(KERN_ERR "%s: Error while requesting mem region\n",
@@ -247,26 +350,32 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
goto err;
}
- pdata->pci_vbase = devm_ioremap(&op->dev, r.start, resource_size(&r));
- if (!pdata->pci_vbase) {
+ pdata->pci_reg = devm_ioremap(&op->dev, r.start, resource_size(&r));
+ if (!pdata->pci_reg) {
printk(KERN_ERR "%s: Unable to setup PCI err regs\n", __func__);
res = -ENOMEM;
goto err;
}
- orig_pci_err_cap_dr =
- in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR);
-
- /* PCI master abort is expected during config cycles */
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR, 0x40);
+ if (mpc85xx_err_int_en(op) < 0)
+ goto err;
- orig_pci_err_en = in_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN);
+ reg = pdata->pci_reg;
+ /* disable pci/pcie error detect */
+ if (pdata->pcie_flag) {
+ pdata->orig_pci_err_dr = in_be32(®->pex_err_disr);
+ out_be32(®->pex_err_disr, ~0);
+ } else {
+ pdata->orig_pci_err_dr = in_be32(®->pex_err_cap_dr);
+ out_be32(®->pex_err_cap_dr, ~0);
+ }
- /* disable master abort reporting */
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, ~0x40);
+ /* disable all pcie error interrupt */
+ pdata->orig_pci_err_en = in_be32(®->pex_err_en);
+ out_be32(®->pex_err_en, 0);
- /* clear error bits */
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_DR, ~0);
+ /* clear all error bits */
+ out_be32(®->pex_err_dr, ~0);
if (edac_pci_add_device(pci, pdata->edac_idx) > 0) {
debugf3("%s(): failed edac_pci_add_device()\n", __func__);
@@ -276,7 +385,7 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
if (edac_op_state == EDAC_OPSTATE_INT) {
pdata->irq = irq_of_parse_and_map(op->dev.of_node, 0);
res = devm_request_irq(&op->dev, pdata->irq,
- mpc85xx_pci_isr, IRQF_DISABLED,
+ mpc85xx_pci_isr, IRQF_SHARED,
"[EDAC] PCI err", pci);
if (res < 0) {
printk(KERN_ERR
@@ -291,6 +400,17 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op,
pdata->irq);
}
+ if (pdata->pcie_flag) {
+ /* enable all pcie error interrupt & error detect */
+ out_be32(®->pex_err_en, ~0);
+ out_be32(®->pex_err_disr, 0);
+ } else {
+ /* PCI master abort is expected during config cycles */
+ out_be32(®->pex_err_cap_dr, PCI_ERR_CAP_DR_DIS_MST);
+ /* disable master abort reporting */
+ out_be32(®->pex_err_en, PCI_ERR_EN_DIS_MST);
+ }
+
devres_remove_group(&op->dev, mpc85xx_pci_err_probe);
debugf3("%s(): success\n", __func__);
printk(KERN_INFO EDAC_MOD_STR " PCI err registered\n");
@@ -312,10 +432,13 @@ static int mpc85xx_pci_err_remove(struct platform_device *op)
debugf0("%s()\n", __func__);
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_CAP_DR,
- orig_pci_err_cap_dr);
+ if (pdata->pcie_flag)
+ out_be32(&pdata->pci_reg->pex_err_disr, pdata->orig_pci_err_dr);
+ else
+ out_be32(&pdata->pci_reg->pex_err_cap_dr,
+ pdata->orig_pci_err_dr);
- out_be32(pdata->pci_vbase + MPC85XX_PCI_ERR_EN, orig_pci_err_en);
+ out_be32(&pdata->pci_reg->pex_err_en, pdata->orig_pci_err_en);
edac_pci_del_device(pci->dev);
@@ -334,6 +457,12 @@ static struct of_device_id mpc85xx_pci_err_of_match[] = {
{
.compatible = "fsl,mpc8540-pci",
},
+ {
+ .compatible = "fsl,mpc8548-pcie",
+ },
+ {
+ .compatible = "fsl,p4080-pcie",
+ },
{},
};
MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match);
@@ -1146,7 +1275,7 @@ static struct of_platform_driver mpc85xx_mc_err_driver = {
},
};
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
static void __init mpc85xx_mc_clear_rfxe(void *data)
{
orig_hid1[smp_processor_id()] = mfspr(SPRN_HID1);
@@ -1185,7 +1314,7 @@ static int __init mpc85xx_mc_init(void)
printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n");
#endif
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
/*
* need to clear HID1[RFXE] to disable machine check int
* so we can catch it
@@ -1199,7 +1328,7 @@ static int __init mpc85xx_mc_init(void)
module_init(mpc85xx_mc_init);
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
static void __exit mpc85xx_mc_restore_hid1(void *data)
{
mtspr(SPRN_HID1, orig_hid1[smp_processor_id()]);
@@ -1208,7 +1337,7 @@ static void __exit mpc85xx_mc_restore_hid1(void *data)
static void __exit mpc85xx_mc_exit(void)
{
-#ifdef CONFIG_FSL_SOC_BOOKE
+#if defined(CONFIG_FSL_SOC_BOOKE) && !defined(CONFIG_PPC_E500MC)
on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
#endif
#ifdef CONFIG_PCI
diff --git a/drivers/edac/mpc85xx_edac.h b/drivers/edac/mpc85xx_edac.h
index 099581d..604f181 100644
--- a/drivers/edac/mpc85xx_edac.h
+++ b/drivers/edac/mpc85xx_edac.h
@@ -133,6 +133,10 @@
#define PCI_EDE_PERR_MASK (PCI_EDE_TGT_PERR | PCI_EDE_MST_PERR | \
PCI_EDE_ADDR_PERR)
+#define PCI_ERR_CAP_DR_DIS_MST 0x40
+#define PCI_ERR_EN_DIS_MST (~PCI_ERR_CAP_DR_DIS_MST)
+#define MPC85XX_MPIC_EIMR0 0x3910
+
struct mpc85xx_mc_pdata {
char *name;
int edac_idx;
@@ -149,8 +153,11 @@ struct mpc85xx_l2_pdata {
struct mpc85xx_pci_pdata {
char *name;
+ u8 pcie_flag;
int edac_idx;
- void __iomem *pci_vbase;
+ struct ccsr_pci *pci_reg;
+ u32 orig_pci_err_dr;
+ u32 orig_pci_err_en;
int irq;
};
--
1.5.4.5
^ permalink raw reply related
* [PATCH 3/3] powerpc/85xx: Update of_platform_bus_probe list to include PCI controller
From: Lan Chunhe @ 2010-11-05 5:28 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Lan Chunhe, akpm, Kai.Jiang, dougthompson
We need to get the pci controller created as an of platform device to
allow the EDAC driver to bind to it on P4080DS.
Signed-off-by: Kai.Jiang <Kai.Jiang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Signed-off-by: Lan Chunhe <b25806@freescale.com>
---
arch/powerpc/platforms/85xx/corenet_ds.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index 2ab338c..bf9b9e5 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -116,6 +116,9 @@ static const struct of_device_id of_device_ids[] __devinitconst = {
{
.compatible = "fsl,rapidio-delta",
},
+ {
+ .compatible = "fsl,p4080-pcie",
+ },
{}
};
--
1.5.4.5
^ permalink raw reply related
* Re: Pegasos OHCI bug (was Re: PROBLEM: memory corrupting bug,
From: pacman @ 2010-11-05 6:43 UTC (permalink / raw)
To: linuxppc-dev; +Cc: linux-kernel
In-Reply-To: <53195.84.105.60.153.1288311394.squirrel@gate.crashing.org>
Segher Boessenkool writes:
>
> > Now I'm just trying to find the more correct way of doing it, without
> > hardcoded addresses. That'll be something like this:
> >
> > search the device tree for OHCI nodes
> > for each OHCI node
> > get assigned-addresses
> > map-in
> > set HCR
> > wait for acknowledgement
> > map-out
> Sounds like it should work, yes.
>
I have a mostly-finished patch to do the above. I'll include it below, but
first a few words about why it's only mostly finished.
The other Pegasos workarounds are in fixup_device_tree_chrp, and I don't see
anything like an "if(machine_is_pegasos)" around them. What keeps them from
being erroneously run on other CHRP-type machines? I made this patch mainly
by copying pieces of other functions from prom_init.c, but couldn't find the
"test for Pegasos before running a Pegasos workaround" piece.
Another issue is, since the firmware doesn't give me a "compatible" property
with the details of the controller, I just have to assume that it's
little-endian. I'm not sure if that's clean, since the real ohci driver
supports both endiannesses, with at least 3 different Kconfig options(!) to
choose between them.
Then there's the volatile which I guess is supposed to be replaced by
something else, but I don't know what the something else is. I believe this
usage is extremely close to what volatile was meant for.
Finally, when I updated to a more recent upstream kernel to test the patch, I
found that an intervening commit (3df7169e73fc1d71a39cffeacc969f6840cdf52b,
OHCI: work around for nVidia shutdown problem) has had a major effect,
on the appearance of my bug.
Before that change, the window in which the bug could strike was from the end
of prom_init (when the kernel believes that devices are quiescent) to the
initialization of the ohci-hcd driver (which actually quietens the device, or
at least directs its scribbling to a properly allocated page). After the
change, the window ends at some point early in the PCI bus setup. That's a
window so small that with a new kernel, I can't provoke a symptom even if I
try.
Mostly-finished patch:
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 941ff4d..a14f21b 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -2237,6 +2237,81 @@ static void __init fixup_device_tree_chrp(void)
}
}
}
+
+/*
+ * Pegasos firmware doesn't quiesce OHCI controllers, so do it manually
+ */
+static void __init pegasos_quiesce(void)
+{
+ phandle node, parent_node;
+ ihandle parent_ih;
+ int rc;
+ char type[16], *path;
+ u32 prop[5], map_size;
+ prom_arg_t ohci_virt;
+
+ for (node = 0; prom_next_node(&node); ) {
+ memset(type, 0, sizeof(type));
+ prom_getprop(node, "device_type", type, sizeof(type));
+ if (strcmp(type, RELOC("usb")) != 0)
+ continue;
+
+ /* Parent should be a PCI bus (so class-code makes sense).
+ class-code should be 0x0C0310 */
+ parent_node = call_prom("parent", 1, 1, node);
+ if (!parent_node)
+ continue;
+ rc = prom_getprop(node, "class-code", prop, sizeof(u32));
+ if (rc != sizeof(u32) || prop[0] != 0x0c0310)
+ continue;
+
+ rc = prom_getprop(node, "assigned-addresses",
+ prop, 5*sizeof(u32));
+ if (rc != 5*sizeof(u32))
+ continue;
+
+ /* Open the parent and call map-in */
+
+ /* It seems OF doesn't null-terminate the path :-( */
+ path = RELOC(prom_scratch);
+ memset(path, 0, PROM_SCRATCH_SIZE);
+
+ if (call_prom("package-to-path", 3, 1, parent_node,
+ path, PROM_SCRATCH_SIZE-1) == PROM_ERROR)
+ continue;
+ parent_ih = call_prom("open", 1, 1, path);
+
+ /* Get the OHCI node's pathname, for printing later */
+ memset(path, 0, PROM_SCRATCH_SIZE);
+ call_prom("package-to-path", 3, 1, node,
+ path, PROM_SCRATCH_SIZE-1);
+
+ map_size = prop[4];
+ if (call_prom_ret("call-method", 6, 2, &ohci_virt,
+ ADDR("map-in"), parent_ih,
+ map_size, prop[0], prop[1], prop[2]) == 0) {
+ prom_printf("resetting OHCI device %s...", path);
+
+ /* Set HostControllerReset (==1) in HcCommandStatus,
+ * located at offset 8 in the register area. The <<24
+ * is because the CPU is big-endian and the device is
+ * little-endian. */
+ *(volatile u32 *)(ohci_virt + 8) |= (1<<24);
+
+ /* controller should acknowledge by zeroing the bit
+ * within 10us. waiting 1ms should be plenty. */
+ call_prom("interpret", 1, 1, "1 ms");
+ if (*(volatile u32 *)(ohci_virt + 8) & (1<<24))
+ prom_printf("failed\n");
+ else
+ prom_printf("done\n");
+
+ call_prom("call-method", 4, 1, ADDR("map-out"),
+ parent_ih, map_size, ohci_virt);
+ }
+ call_prom("close", 1, 0, parent_ih);
+ }
+}
#else
#define fixup_device_tree_chrp()
#endif
@@ -2642,6 +2717,7 @@ unsigned long __init prom_init(unsigned long r3, unsigned long r4,
* devices etc...
*/
prom_printf("Calling quiesce...\n");
+ pegasos_quiesce();
call_prom("quiesce", 0, 0);
/*
--
Alan Curry
^ permalink raw reply related
* Re: [Cbe-oss-dev] [PATCH 03/49] arch/powerpc: Use vzalloc
From: Jeremy Kerr @ 2010-11-05 13:08 UTC (permalink / raw)
To: cbe-oss-dev
Cc: Jiri Kosina, kvm, Arnd Bergmann, Marcelo Tosatti, Alexander Graf,
kvm-ppc, linux-kernel, Paul Mackerras, Avi Kivity, Joe Perches,
linuxppc-dev
In-Reply-To: <5da00d7f95b5c7a96fbfa8420f5e3a8ef33e01e6.1288925424.git.joe@perches.com>
Hi Joe,
> diff --git a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
> b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c index a101abf..3b894f5
> 100644
> --- a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
> +++ b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
> @@ -36,10 +36,9 @@ static int spu_alloc_lscsa_std(struct spu_state *csa)
> struct spu_lscsa *lscsa;
> unsigned char *p;
>
> - lscsa = vmalloc(sizeof(struct spu_lscsa));
> + lscsa = vzalloc(sizeof(struct spu_lscsa));
> if (!lscsa)
> return -ENOMEM;
> - memset(lscsa, 0, sizeof(struct spu_lscsa));
> csa->lscsa = lscsa;
>
> /* Set LS pages reserved to allow for user-space mapping. */
For the spufs bit:
Acked-By: Jeremy Kerr <jk@ozlabs.org>
Cheers,
Jeremy
^ permalink raw reply
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