* Re: 750gx cpufreq induced kernel panic in 2.6.36
From: Benjamin Herrenschmidt @ 2011-01-26 4:32 UTC (permalink / raw)
To: kevin diggs; +Cc: linuxppc-dev
In-Reply-To: <AANLkTikJ8V-gQv93HBDH3=4o51vY5xyxQojqEV7DqNj=@mail.gmail.com>
On Tue, 2011-01-25 at 17:54 -0600, kevin diggs wrote:
> Hi,
>
> The cpufreq driver I wrote for the 750gx causes a kernel panic in 2.6.36.
>
> This is from a screen shot:
>
> [c6035f30] [c001014c] timer_interrupt+0x13c/0x19c
> [c6035f40] [c0013294] ret_from_except+0x0/0x14
> --- Exception: 901 at 0x1000c694
> LR = 0x1000f3e4
> Instruction dump:
> 4bffff48 38610008 4be7b2b1 4bffff9c 9421fff0 7c0802a6 bfc10xxx
> 90010014 7c0000a6 68008000 54008ffe <0f000000> 3d20c030 2f84xxxx
> Kernel panic - not syncing: Fatal exception in interrupt
> Call Trace:
> [c6035bf0] [c00084e4] show_stack+0x3c/0x160 (unreliable)
> [c6035c20] [c002cf44] panic+0xa4/0x1c8
> [c6035c70] [c001085c] die+0x194/0x1a0
> [c6035c90] [c0010aa8] _exception+0xfc/0x108
> [c6035d80] [c0013248] ret_from_except_full+0x0/0x4c
> --- Exception: 700 at cpufreq_notify_transition+0x20/0x128
> LR = cf750gx_pll_switch_cb+0x20/0xd0 [cf750gx]
> [c6035e40] [c02e2280] 0xc02e2280 (unreliable)
> [c6035e50] [ddc4b3dc] cf750gx_pll_switch_cb+0x20/0xd0 [cf750gx]
> [c6035e60] [c004d7ac] notifier_call_chain+0x60/0xb0
> [c6035e80] [ddc361c4] pllif_i_switch_PLLs+0xa0/0x140 [pll_if]
> [c6035e90] [ddc365fc] pllif_i_timer_f+0x4c/0x6c [pll_if]
> [c6035ea0] [c004bb24] __run_hrtimer+0x44/0xb8
> [c6035eb0] [c004c1f8] hrtimer_interrupt+0x10c/0x388
> [c6035f30] [c001014c] timer_interrupt+0x13c/0x19c
> [c6035f40] [c0013294] ret_from_except+0x0/0x14
> --- Exception: 901 at 0x1000c694
> LR = 0x1000f3e4
> Rebooting in 180 seconds.._
>
> What are exception 700 & 901?
700 is a program check (illegal instruction or BUG_ON() statement)
900 is decrementer (aka timer) interrupt.
> The 0x1000c694 address looks fishy?
That's userspace.
So you took a timer interrupt, which got into hrtimer, and something you
did caused cpufreq_notify_transition to crash, probably with a BUG_ON
(which you can probably see above what you pasted, unless you don't have
access to that part of the backtrace).
Cheers,
Ben.
> Thanks!
>
> kevin
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* [PATCH 2/4 v5] video, sm501: add edid and commandline support
From: Heiko Schocher @ 2011-01-26 7:21 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, devicetree-discuss, Samuel Ortiz, Vincent Sanders,
linux-kernel, Ben Dooks, Randy Dunlap, Paul Mundt, Heiko Schocher
In-Reply-To: <1291451028-22532-1-git-send-email-hs@denx.de>
- add commandline options:
sm501fb.mode:
Specify resolution as "<xres>x<yres>[-<bpp>][@<refresh>]"
sm501fb.bpp:
Specify bit-per-pixel if not specified mode
- Add support for encoding display mode information
in the device tree using verbatim EDID block.
If the "edid" entry in the "smi,sm501" node is present,
the driver will build mode database using EDID data
and allow setting the display modes from this database.
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: linux-fbdev@vger.kernel.org
cc: devicetree-discuss@ozlabs.org
cc: Ben Dooks <ben@simtec.co.uk>
cc: Vincent Sanders <vince@simtec.co.uk>
cc: Samuel Ortiz <sameo@linux.intel.com>
cc: linux-kernel@vger.kernel.org
cc: Randy Dunlap <rdunlap@xenotime.net>
cc: Paul Mundt <lethal@linux-sh.org>
---
- changes since v1:
add Ben Dooks, Vincent Sanders and Samuel Ortiz to cc, as suggested from
Paul Mundt.
- changes since v2:
add comments from Randy Dunlap:
- move parameter documentation to Documentation/fb/sm501.txt
- changes since v3:
- rebased against v2.6.38-rc2
- split in 3 patches
- of support patch
- i/o routine patch
- edid support patch
- changes since v4:
- add "info->pdata = &sm501fb_def_pdata;" in sm501fb_probe()
as Paul Mundt suggested (and I wrongly deleted)
- move kfree(info->edid_data); to patch 3/4
as edid_data is only allocated in the CONFIG_OF case
./scripts/checkpatch.pl 0002-video-sm501-add-edid-and-commandline-support.patch
total: 0 errors, 0 warnings, 109 lines checked
0002-video-sm501-add-edid-and-commandline-support.patch has no obvious style problems and is ready for submission.
Documentation/fb/sm501.txt | 10 +++++++
drivers/video/sm501fb.c | 65 ++++++++++++++++++++++++++++++++++++++++---
2 files changed, 70 insertions(+), 5 deletions(-)
create mode 100644 Documentation/fb/sm501.txt
diff --git a/Documentation/fb/sm501.txt b/Documentation/fb/sm501.txt
new file mode 100644
index 0000000..8d17aeb
--- /dev/null
+++ b/Documentation/fb/sm501.txt
@@ -0,0 +1,10 @@
+Configuration:
+
+You can pass the following kernel command line options to sm501 videoframebuffer:
+
+ sm501fb.bpp= SM501 Display driver:
+ Specifiy bits-per-pixel if not specified by 'mode'
+
+ sm501fb.mode= SM501 Display driver:
+ Specify resolution as
+ "<xres>x<yres>[-<bpp>][@<refresh>]"
diff --git a/drivers/video/sm501fb.c b/drivers/video/sm501fb.c
index c5b4b95..d60b2a2 100644
--- a/drivers/video/sm501fb.c
+++ b/drivers/video/sm501fb.c
@@ -41,6 +41,26 @@
#include <linux/sm501.h>
#include <linux/sm501-regs.h>
+#include "edid.h"
+
+static char *fb_mode = "640x480-16@60";
+static unsigned long default_bpp = 16;
+
+static struct fb_videomode __devinitdata sm501_default_mode = {
+ .refresh = 60,
+ .xres = 640,
+ .yres = 480,
+ .pixclock = 20833,
+ .left_margin = 142,
+ .right_margin = 13,
+ .upper_margin = 21,
+ .lower_margin = 1,
+ .hsync_len = 69,
+ .vsync_len = 3,
+ .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
+ .vmode = FB_VMODE_NONINTERLACED
+};
+
#define NR_PALETTE 256
enum sm501_controller {
@@ -77,6 +97,7 @@ struct sm501fb_info {
void __iomem *regs2d; /* 2d remapped registers */
void __iomem *fbmem; /* remapped framebuffer */
size_t fbmem_len; /* length of remapped region */
+ u8 *edid_data;
};
/* per-framebuffer private data */
@@ -1725,9 +1746,16 @@ static int sm501fb_init_fb(struct fb_info *fb,
fb->var.vmode = FB_VMODE_NONINTERLACED;
fb->var.bits_per_pixel = 16;
+ if (info->edid_data) {
+ /* Now build modedb from EDID */
+ fb_edid_to_monspecs(info->edid_data, &fb->monspecs);
+ fb_videomode_to_modelist(fb->monspecs.modedb,
+ fb->monspecs.modedb_len,
+ &fb->modelist);
+ }
+
if (enable && (pd->flags & SM501FB_FLAG_USE_INIT_MODE) && 0) {
/* TODO read the mode from the current display */
-
} else {
if (pd->def_mode) {
dev_info(info->dev, "using supplied mode\n");
@@ -1737,12 +1765,34 @@ static int sm501fb_init_fb(struct fb_info *fb,
fb->var.xres_virtual = fb->var.xres;
fb->var.yres_virtual = fb->var.yres;
} else {
- ret = fb_find_mode(&fb->var, fb,
+ if (info->edid_data)
+ ret = fb_find_mode(&fb->var, fb, fb_mode,
+ fb->monspecs.modedb,
+ fb->monspecs.modedb_len,
+ &sm501_default_mode, default_bpp);
+ else
+ ret = fb_find_mode(&fb->var, fb,
NULL, NULL, 0, NULL, 8);
- if (ret == 0 || ret == 4) {
- dev_err(info->dev,
- "failed to get initial mode\n");
+ switch (ret) {
+ case 1:
+ dev_info(info->dev, "using mode specified in "
+ "@mode\n");
+ break;
+ case 2:
+ dev_info(info->dev, "using mode specified in "
+ "@mode with ignored refresh rate\n");
+ break;
+ case 3:
+ dev_info(info->dev, "using mode default "
+ "mode\n");
+ break;
+ case 4:
+ dev_info(info->dev, "using mode from list\n");
+ break;
+ default:
+ dev_info(info->dev, "ret = %d\n", ret);
+ dev_info(info->dev, "failed to find mode\n");
return -EINVAL;
}
}
@@ -2157,6 +2207,11 @@ static void __exit sm501fb_cleanup(void)
module_init(sm501fb_init);
module_exit(sm501fb_cleanup);
+module_param_named(mode, fb_mode, charp, 0);
+MODULE_PARM_DESC(mode,
+ "Specify resolution as \"<xres>x<yres>[-<bpp>][@<refresh>]\" ");
+module_param_named(bpp, default_bpp, ulong, 0);
+MODULE_PARM_DESC(bpp, "Specify bit-per-pixel if not specified mode");
MODULE_AUTHOR("Ben Dooks, Vincent Sanders");
MODULE_DESCRIPTION("SM501 Framebuffer driver");
MODULE_LICENSE("GPL v2");
--
1.7.3.4
^ permalink raw reply related
* [PATCH 3/4 v5] video, sm501: add OF binding to support SM501
From: Heiko Schocher @ 2011-01-26 7:21 UTC (permalink / raw)
To: linuxppc-dev
Cc: linux-fbdev, devicetree-discuss, Samuel Ortiz, Vincent Sanders,
linux-kernel, Ben Dooks, Randy Dunlap, Paul Mundt, Heiko Schocher
In-Reply-To: <1291451028-22532-1-git-send-email-hs@denx.de>
- add binding to OF, compatible name "smi,sm501"
Signed-off-by: Heiko Schocher <hs@denx.de>
cc: linux-fbdev@vger.kernel.org
cc: devicetree-discuss@ozlabs.org
cc: Ben Dooks <ben@simtec.co.uk>
cc: Vincent Sanders <vince@simtec.co.uk>
cc: Samuel Ortiz <sameo@linux.intel.com>
cc: linux-kernel@vger.kernel.org
cc: Randy Dunlap <rdunlap@xenotime.net>
cc: Paul Mundt <lethal@linux-sh.org>
---
- changes since v1:
add Ben Dooks, Vincent Sanders and Samuel Ortiz to cc, as suggested from
Paul Mundt.
- changes since v2:
add comments from Randy Dunlap:
- move parameter documentation to Documentation/fb/sm501.txt
- changes since v3:
- rebased against v2.6.38-rc2
- split in 3 patches
- of support patch
- get rid of "#if defined(CONFIG_PPC_MPC52xx)" usage
hide this in DTS, as Paul suggested.
- i/o routine patch
- edid support patch
- changes since v4
replace remaining CONFIG_PPC_MPC52xx with CONFIG_OF, as
it is no longer MPC52xx only.
- changes since v5
free edid_data after its usage, as it is no longer needed,
suggested from Paul Mundt. Also fall back to default if
kmemdup(edid_data) fails.
./scripts/checkpatch.pl 0003-video-sm501-add-OF-binding-to-support-SM501.patch
total: 0 errors, 0 warnings, 132 lines checked
0003-video-sm501-add-OF-binding-to-support-SM501.patch has no obvious style problems and is ready for submission.
Documentation/powerpc/dts-bindings/sm501.txt | 34 +++++++++++++++++++++
drivers/mfd/sm501.c | 9 +++++-
drivers/video/sm501fb.c | 42 ++++++++++++++++++++++++--
3 files changed, 81 insertions(+), 4 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/sm501.txt
diff --git a/Documentation/powerpc/dts-bindings/sm501.txt b/Documentation/powerpc/dts-bindings/sm501.txt
new file mode 100644
index 0000000..7d319fb
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/sm501.txt
@@ -0,0 +1,34 @@
+* SM SM501
+
+The SM SM501 is a LCD controller, with proper hardware, it can also
+drive DVI monitors.
+
+Required properties:
+- compatible : should be "smi,sm501".
+- reg : contain two entries:
+ - First entry: System Configuration register
+ - Second entry: IO space (Display Controller register)
+- interrupts : SMI interrupt to the cpu should be described here.
+- interrupt-parent : the phandle for the interrupt controller that
+ services interrupts for this device.
+
+Optional properties:
+- mode : select a video mode:
+ <xres>x<yres>[-<bpp>][@<refresh>]
+- edid : verbatim EDID data block describing attached display.
+ Data from the detailed timing descriptor will be used to
+ program the display controller.
+- little-endian: availiable on big endian systems, to
+ set different foreign endian.
+- big-endian: availiable on little endian systems, to
+ set different foreign endian.
+
+Example for MPC5200:
+ display@1,0 {
+ compatible = "smi,sm501";
+ reg = <1 0x00000000 0x00800000
+ 1 0x03e00000 0x00200000>;
+ interrupts = <1 1 3>;
+ mode = "640x480-32@60";
+ edid = [edid-data];
+ };
diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c
index 558d5f3..df3702c 100644
--- a/drivers/mfd/sm501.c
+++ b/drivers/mfd/sm501.c
@@ -1377,7 +1377,7 @@ static int __devinit sm501_init_dev(struct sm501_devdata *sm)
sm501_register_gpio(sm);
}
- if (pdata->gpio_i2c != NULL && pdata->gpio_i2c_nr > 0) {
+ if (pdata && pdata->gpio_i2c != NULL && pdata->gpio_i2c_nr > 0) {
if (!sm501_gpio_isregistered(sm))
dev_err(sm->dev, "no gpio available for i2c gpio.\n");
else
@@ -1422,6 +1422,7 @@ static int __devinit sm501_plat_probe(struct platform_device *dev)
sm->io_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
sm->mem_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
+
if (sm->io_res == NULL || sm->mem_res == NULL) {
dev_err(&dev->dev, "failed to get IO resource\n");
ret = -ENOENT;
@@ -1735,10 +1736,16 @@ static struct pci_driver sm501_pci_driver = {
MODULE_ALIAS("platform:sm501");
+static struct of_device_id __devinitdata of_sm501_match_tbl[] = {
+ { .compatible = "smi,sm501", },
+ { /* end */ }
+};
+
static struct platform_driver sm501_plat_driver = {
.driver = {
.name = "sm501",
.owner = THIS_MODULE,
+ .of_match_table = of_sm501_match_tbl,
},
.probe = sm501_plat_probe,
.remove = sm501_plat_remove,
diff --git a/drivers/video/sm501fb.c b/drivers/video/sm501fb.c
index d60b2a2..92b001d 100644
--- a/drivers/video/sm501fb.c
+++ b/drivers/video/sm501fb.c
@@ -1729,6 +1729,15 @@ static int sm501fb_init_fb(struct fb_info *fb,
FBINFO_HWACCEL_COPYAREA | FBINFO_HWACCEL_FILLRECT |
FBINFO_HWACCEL_XPAN | FBINFO_HWACCEL_YPAN;
+#if defined(CONFIG_OF)
+#ifdef __BIG_ENDIAN
+ if (of_get_property(info->dev->parent->of_node, "little-endian", NULL))
+ fb->flags |= FBINFO_FOREIGN_ENDIAN;
+#else
+ if (of_get_property(info->dev->parent->of_node, "big-endian", NULL))
+ fb->flags |= FBINFO_FOREIGN_ENDIAN;
+#endif
+#endif
/* fixed data */
fb->fix.type = FB_TYPE_PACKED_PIXELS;
@@ -1765,14 +1774,17 @@ static int sm501fb_init_fb(struct fb_info *fb,
fb->var.xres_virtual = fb->var.xres;
fb->var.yres_virtual = fb->var.yres;
} else {
- if (info->edid_data)
+ if (info->edid_data) {
ret = fb_find_mode(&fb->var, fb, fb_mode,
fb->monspecs.modedb,
fb->monspecs.modedb_len,
&sm501_default_mode, default_bpp);
- else
+ /* edid_data is no longer needed, free it */
+ kfree(info->edid_data);
+ } else {
ret = fb_find_mode(&fb->var, fb,
NULL, NULL, 0, NULL, 8);
+ }
switch (ret) {
case 1:
@@ -1933,8 +1945,32 @@ static int __devinit sm501fb_probe(struct platform_device *pdev)
}
if (info->pdata == NULL) {
- dev_info(dev, "using default configuration data\n");
+ int found = 0;
+#if defined(CONFIG_OF)
+ struct device_node *np = pdev->dev.parent->of_node;
+ const u8 *prop;
+ const char *cp;
+ int len;
+
info->pdata = &sm501fb_def_pdata;
+ if (np) {
+ /* Get EDID */
+ cp = of_get_property(np, "mode", &len);
+ if (cp)
+ strcpy(fb_mode, cp);
+ prop = of_get_property(np, "edid", &len);
+ if (prop && len == EDID_LENGTH) {
+ info->edid_data = kmemdup(prop, EDID_LENGTH,
+ GFP_KERNEL);
+ if (info->edid_data)
+ found = 1;
+ }
+ }
+#endif
+ if (!found) {
+ dev_info(dev, "using default configuration data\n");
+ info->pdata = &sm501fb_def_pdata;
+ }
}
/* probe for the presence of each panel */
--
1.7.3.4
^ permalink raw reply related
* RE: FSL DMA engine transfer to PCI memory
From: David Laight @ 2011-01-26 10:18 UTC (permalink / raw)
Cc: linuxppc-dev
In-Reply-To: <20110125135706.45f351a2@udp111988uds.am.freescale.net>
=20
> What was the ppc you used?
The 8315E PowerQUIICC II
> On 85xx/QorIQ-family chips such as P2020, there is no DMA controller
> inside the PCIe controller itself (or are you talking about bus
> mastering by the PCIe device[1]? "interface" is a bit ambiguous),
> though it was considered part of the PCI controller on 82xx.
>=20
> The DMA engine and PCIe are both on OCeaN, so the traffic=20
> does not need to pass through the e500 Coherency Module.
> My understanding -- for what it's worth, coming from a
> software person :-) -- is that you should
> be able to get large transfer chunks using the DMA engine.
It might be possible - but the ppc's pcie would need to know
the length of the dma (or at least be told that there was more
data to arrive) before even starting the pcie transfer.
I used 128 bytes per pcie transfer (which the altera slave
can handle) but that is longer than you want a burst on
the internal (CSB in my case) bus on the ppc.
It is also longer than a cache line - so the dma engine's
memory reads might induce a cache flush.=20
> I suggest getting things working, and then seeing whether the
> performance is acceptable.
The only reason for using dma (instead of pio) is to get
long pcie transfers - otherwise it isn't really worth the
effort. Transfers are unlikely to take long enough to make
it worth taking an interrupt at the end of the dma.
My device driver implements read() and write() (and poll()
to wait for interrupts). So I do overlap the copy_to/from_user
with the next dma.
> > The generic dma controller can't even generate 64bit
> > cycles into the ppc's PCIe engine.
>=20
> Could you elaborate?
The pcie is (apparantly) a 64bit interface, to a single 32bit
transfer is actually a 64bit one with only 4 byte enables driven.
I couldn't see anything that would allow a CSB master to generate
two 32bit cycles (since it is a 32bit bus) that the pcie hardware
could convert into a single 64bit pcie transfer.
The fpga target is likely to have 32bit targets (it could have
64 bit ones, but if you've instantiated a NiosII cpu it wont!)
so you get a bus width adapter (which carefully does the cycle
with no byte enables driven) as well as the clock crossing bridge.
These both make the slave even slower than it would otherwise be!
IIRC We managed to get 2us for a read and 500ns for a write cycle.
The per byte costs are relatively small in comparison.
David
^ permalink raw reply
* Re: About mpc85xx flash memory allocation
From: Mitsutaka Amano @ 2011-01-26 10:51 UTC (permalink / raw)
To: tiejun.chen; +Cc: linuxppc-dev
In-Reply-To: <AANLkTimNmtqV3uO1+oiODeJmrDoyK570Vpb6n5AFnTKF@mail.gmail.com>
On Tue, Jan 25, 2011 at 11:17 AM, Mitsutaka Amano
<mitsutaka.amano@gmail.com> wrote:
> On Tue, Jan 25, 2011 at 11:05 AM, tiejun.chen <tiejun.chen@windriver.com>=
wrote:
>> Mitsutaka Amano wrote:
>>> On Mon, Jan 24, 2011 at 3:48 PM, tiejun.chen <tiejun.chen@windriver.com=
> wrote:
>>>> Mitsutaka Amano wrote:
>>>>> Hi all,
>>>>>
>>>>> I'm testing the ppc platform is based on mpc85xx. 256MB Flash memory
>>>>> has been installed. Then I found this entries.
>>>>>
>>>>> /proc/vmallocinfo
>>>>> ~~~
>>>>> 0xc9100000-0xd9101000 268439552 of_flash_probe+0x290/0x814 ioremap
>>>>>
>>>>> physmap_of allocated 268MB over to the vmalloc. vmalloc space is tigh=
t.
>>>>>
>>>>> Why does we need mpc platforms to flash memory allocation? I know
>>>> This should not be dedicated to so-called mpc platform. And we always =
use
>>>> ioremap() to map the device space. And on PPC ioremap also use the sam=
e space as
>>>> vmalloc(). While bootstrap you also can see this associated message li=
ke the
>>>> follows,
>>>> ------
>>>> ......
>>>> =A0* 0xd1000000..0xffbe9000 =A0: vmalloc & ioremap
>>> Yeah. My platform says the follow message.
>>>
>>> =A0 * 0xc9000000..0xdf000000 =A0: vmalloc & ioremap
>>
>> Any reason why you don't access > 0xdf000000?
>
> Higher than 0xdf000000 has to map TLB for using other peripherals.
> it's 400MB over.
>
>>
>>>
>>> The default vmalloc & ioremap space was about 200MB. so I increased
>>> that by decreasing lowmem.
>>> But If possible, I hope to keep default maps. So I don't want to use
>>> vmalloc & ioremap
>>>
>>>>> other architectures don't allocate to the vmalloc.
>>>>> The design of the hardware? or Is there the way to use the flash
>>>> You can open /dev/mem then mmap() with a appropriate offset to access =
the device
>>>> space including flash.
>>> I use the device tree(dts) and define flash partitions. Also I use CFI
>>> driver and CFI_PHYSMAP_OF for device tree.
>>> Is there the reference driver in what uses mmap() kernel tree? I think
>>> I have to write a driver what can support dts and mmap() with a
>>> appropriate offset to access the device.
>>
>> You should not write anything again. And you can access any physical add=
ress
>> directly via /dev/mem from the user space like the following:
>>
>> fd =3D open(/dev/mem,);
>> mmap(fd + offset);
>
> Thanks for letting me know. I want to use in combination with device
> tree. So I'll write a driver based on physmap_of.c(such as mmap_of.c)
I confused and misunderstand that. it has to use as a rootfs. so It
can't use a userland program.
Of cource, it can be force mapping to the userspace. but system will
be unstable. I think.
Mitsutaka
>
> Thanks,
> Mitsutaka
>
>>
>> Tiejun
>>
>>>
>>> Thanks,
>>> Mitsutaka
>>>
>>>> Tiejun
>>>>
>>>>> memory without vmalloc?
>>>>>
>>>>> Thanks,
>>>>> Mitsutaka
>>
>>
>
^ permalink raw reply
* [PATCH 2/2] powerpc/476: Workaround for PLB6 hang
From: Dave Kleikamp @ 2011-01-26 16:17 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Dave Kleikamp
In-Reply-To: <1296058679-21352-1-git-send-email-shaggy@linux.vnet.ibm.com>
The 476FP core may hang if an instruction fetch happens during an msync
following a tlbsync. This workaround makes sure that enough instruction
cache lines are pre-fetched before executing the msync. (sync and msync
are the same to the compiler.)
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
---
arch/powerpc/mm/tlb_nohash_low.S | 35 +++++++++++++++++++++++++++++++++++
1 files changed, 35 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index af405ee..7c63c0e 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -189,6 +189,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
blr
#ifdef CONFIG_PPC_47x
+
+/*
+ * 47x variant of icbt
+ */
+# define ICBT(CT,RA,RB) \
+ .long 0x7c00002c | ((CT) << 21) | ((RA) << 16) | ((RB) << 11)
+
/*
* _tlbivax_bcast is only on 47x. We don't bother doing a runtime
* check though, it will blow up soon enough if we mistakenly try
@@ -206,7 +213,35 @@ _GLOBAL(_tlbivax_bcast)
isync
eieio
tlbsync
+BEGIN_FTR_SECTION
+ b 1f
+END_FTR_SECTION_IFSET(CPU_FTR_476_DD2)
+ sync
+ wrtee r10
+ blr
+/*
+ * DD2 HW could hang if in instruction fetch happens before msync completes.
+ * Touch enough instruction cache lines to ensure cache hits
+ */
+1: mflr r9
+ bl 2f
+2: mflr r6
+ li r7,32
+ ICBT(0,r6,r7) /* touch next cache line */
+ add r6,r6,r7
+ ICBT(0,r6,r7) /* touch next cache line */
+ add r6,r6,r7
+ ICBT(0,r6,r7) /* touch next cache line */
sync
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ nop
+ mtlr r9
wrtee r10
blr
#endif /* CONFIG_PPC_47x */
--
1.7.3.4
^ permalink raw reply related
* [PATCH 0/2] Workaround for PowerPC 476FP hardware bug
From: Dave Kleikamp @ 2011-01-26 16:17 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Dave Kleikamp
These patches add a workaround to avoid a hang on the DD2 level of the
476FP core. This hardware bug will be fixed in future products, but this
particular core will used in production.
Dave Kleikamp (2):
powerpc/476: define specific cpu table entry DD2 core
powerpc/476: Workaround for PLB6 hang
arch/powerpc/include/asm/cputable.h | 3 ++-
arch/powerpc/kernel/cputable.c | 22 ++++++++++++++++++----
arch/powerpc/mm/tlb_nohash_low.S | 35 +++++++++++++++++++++++++++++++++++
3 files changed, 55 insertions(+), 5 deletions(-)
--
1.7.3.4
^ permalink raw reply
* Re: [PATCH V8 03/10] USB/ppc4xx: Add Synopsys DWC OTG Core Interface Layer
From: Alexander Gordeev @ 2011-01-26 16:17 UTC (permalink / raw)
To: tmarri; +Cc: greg, linux-usb, linuxppc-dev, Fushen Chen, Mark Miesfeld
In-Reply-To: <1295477852-14735-1-git-send-email-tmarri@apm.com>
[-- Attachment #1: Type: text/plain, Size: 7098 bytes --]
В Wed, 19 Jan 2011 14:57:32 -0800
tmarri@apm.com пишет:
> From: Tirumala Marri <tmarri@apm.com>
>
> Core Interface Layer Common provides common functions for both host
> controller and peripheral controller. CIL manages the memory map
> for the core. It also handles basic tasks like reading/writing the
> registers and data FIFOs in the controller. CIL performs basic
> services that are not specific to either the host or device modes
> of operation. These services include management of the OTG Host
> Negotiation Protocol (HNP) and Session Request Protocol (SRP).
>
> Signed-off-by: Tirumala R Marri <tmarri@apm.com>
> Signed-off-by: Fushen Chen <fchen@apm.com>
> Signed-off-by: Mark Miesfeld <mmiesfeld@apm.com>
> ---
> drivers/usb/dwc_otg/dwc_otg_cil.c | 972 +++++++++++++++++++++++++
> drivers/usb/dwc_otg/dwc_otg_cil.h | 1220 ++++++++++++++++++++++++++++++++
> drivers/usb/dwc_otg/dwc_otg_cil_intr.c | 616 ++++++++++++++++
> 3 files changed, 2808 insertions(+), 0 deletions(-)
>
[snip drivers/usb/dwc_otg/dwc_otg_cil.c]
> diff --git a/drivers/usb/dwc_otg/dwc_otg_cil.h b/drivers/usb/dwc_otg/dwc_otg_cil.h
> new file mode 100644
> index 0000000..d97a8db
> --- /dev/null
> +++ b/drivers/usb/dwc_otg/dwc_otg_cil.h
> @@ -0,0 +1,1220 @@
> +/*
> + * DesignWare HS OTG controller driver
> + * Copyright (C) 2006 Synopsys, Inc.
> + * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
> + *
> + * This program is free software: you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License version 2 for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, see http://www.gnu.org/licenses
> + * or write to the Free Software Foundation, Inc., 51 Franklin Street,
> + * Suite 500, Boston, MA 02110-1335 USA.
> + *
> + * Based on Synopsys driver version 2.60a
> + * Modified by Mark Miesfeld <mmiesfeld@apm.com>
> + * Modified by Stefan Roese <sr@denx.de>, DENX Software Engineering
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO THE
> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
> + * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DIRECT,
> + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
> + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + *
> + */
> +
> +#if !defined(__DWC_CIL_H__)
> +#define __DWC_CIL_H__
> +#include <linux/io.h>
> +#include <linux/usb/ch9.h>
> +#include <linux/usb/gadget.h>
> +#include <linux/interrupt.h>
> +#include <linux/dmapool.h>
> +#include <linux/spinlock.h>
> +#include <linux/usb/otg.h>
> +
> +#include "dwc_otg_regs.h"
> +
> +#ifdef CONFIG_DWC_DEBUG
> +#define DEBUG
> +#endif
> +
> +/**
> + * Reads the content of a register.
> + */
> +static inline u32 dwc_read32(u32 reg)
> +{
> +#ifdef CONFIG_DWC_OTG_REG_LE
> + return in_le32((unsigned __iomem *)reg);
> +#else
> + return in_be32((unsigned __iomem *)reg);
> +#endif
> +};
> +static inline u32 dwc_read_reg32(u32 *reg)
> +{
> +#ifdef CONFIG_DWC_OTG_REG_LE
> + return in_le32(reg);
> +#else
> + return in_be32(reg);
> +#endif
> +};
> +
dwc_read_reg32 is used nowhere throughout the code. One of dwc_read32
and dwc_read_reg32 should be removed IMO. There was once only
dwc_read_reg32. In version 5 of your patchset I believe. Why did you
add another function? AFAIK it is not correct to store pointers in u32
because they need 8 bytes on 64-bit archs. So it was ok with the old
dwc_read_reg32.
> +/**
> + * Writes a register with a 32 bit value.
> + */
> +static inline void dwc_write32(u32 reg, const u32 value)
> +{
> +#ifdef CONFIG_DWC_OTG_REG_LE
> + out_le32((unsigned __iomem *)reg, value);
> +#else
> + out_be32((unsigned __iomem *)reg, value);
> +#endif
> +};
> +static inline void dwc_write_reg32(u32 *reg, const u32 value)
> +{
> +#ifdef CONFIG_DWC_OTG_REG_LE
> + out_le32(reg, value);
> +#else
> + out_be32(reg, value);
> +#endif
> +};
> +
Same thing here. dwc_write_reg32 is never used. And it should be used
instead of dwc_write32 probably.
> +/**
> + * This function modifies bit values in a register. Using the
> + * algorithm: (reg_contents & ~clear_mask) | set_mask.
> + */
> +static inline
> + void dwc_modify_reg32(u32 *_reg, const u32 _clear_mask,
> + const u32 _set_mask)
> +{
> +#ifdef CONFIG_DWC_OTG_REG_LE
> + out_le32(_reg, (in_le32(_reg) & ~_clear_mask) | _set_mask);
> +#else
> + out_be32(_reg, (in_be32(_reg) & ~_clear_mask) | _set_mask);
> +#endif
> +};
> +static inline
> + void dwc_modify32(u32 reg, const u32 _clear_mask, const u32 _set_mask)
> +{
> +#ifdef CONFIG_DWC_OTG_REG_LE
> + out_le32((unsigned __iomem *)reg,
> + (in_le32((unsigned __iomem *)reg) & ~_clear_mask) |
> + _set_mask);
> +#else
> + out_be32((unsigned __iomem *)reg,
> + (in_be32(((unsigned __iomem *))reg) & ~_clear_mask) |
> + _set_mask);
> +#endif
> +};
> +
Same thing here. dwc_write_reg32 is never used.
> +static inline void dwc_write_datafifo32(u32 *reg, const u32 _value)
> +{
> +#ifdef CONFIG_DWC_OTG_FIFO_LE
> + out_le32((unsigned __iomem *)reg, _value);
> +#else
> + out_be32((unsigned __iomem *)reg, _value);
> +#endif
> +};
> +static inline void dwc_write_fifo32(u32 reg, const u32 _value)
> +{
> +#ifdef CONFIG_DWC_OTG_FIFO_LE
> + out_le32((unsigned __iomem *)reg, _value);
> +#else
> + out_be32((unsigned __iomem *)reg, _value);
> +#endif
> +};
> +
And here. dwc_write_fifo32 is never used.
> +static inline u32 dwc_read_datafifo32(u32 *_reg)
> +{
> +#ifdef CONFIG_DWC_OTG_FIFO_LE
> + return in_le32((unsigned __iomem *)_reg);
> +#else
> + return in_be32((unsigned __iomem *)_reg);
> +#endif
> +};
> +static inline u32 dwc_read_fifo32(u32 _reg)
> +{
> +#ifdef CONFIG_DWC_OTG_FIFO_LE
> + return in_le32((unsigned __iomem *) _reg);
> +#else
> + return in_be32((unsigned __iomem *) _reg);
> +#endif
> +};
> +
And here. dwc_read_fifo32 is never used.
Also in_le32/out_le32/in_be32/out_be32 are architecture-specific AFAIK.
I'd suggest using readl/writel for LE ops and
__be32_to_cpu(__raw_readl(addr))/__raw_writel(__cpu_to_be32(b),addr)
for BE ops.
--
Alexander
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^ permalink raw reply
* [PATCH 1/2] powerpc/476: define specific cpu table entry DD2 core
From: Dave Kleikamp @ 2011-01-26 16:17 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Dave Kleikamp
In-Reply-To: <1296058679-21352-1-git-send-email-shaggy@linux.vnet.ibm.com>
The DD2 core still has some unstability. Define CPU_FTR_476_DD2 to
enable workarounds in later patches.
This is based on an earlier, unreleased patch for DD1 by Ben Herrenschmidt.
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/cputable.h | 3 ++-
arch/powerpc/kernel/cputable.c | 22 ++++++++++++++++++----
2 files changed, 20 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index f0a211d..be3cdf9 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -154,6 +154,7 @@ extern const char *powerpc_base_platform;
#define CPU_FTR_NAP_DISABLE_L2_PR ASM_CONST(0x0000000000002000)
#define CPU_FTR_DUAL_PLL_750FX ASM_CONST(0x0000000000004000)
#define CPU_FTR_NO_DPM ASM_CONST(0x0000000000008000)
+#define CPU_FTR_476_DD2 ASM_CONST(0x0000000000010000)
#define CPU_FTR_NEED_COHERENT ASM_CONST(0x0000000000020000)
#define CPU_FTR_NO_BTIC ASM_CONST(0x0000000000040000)
#define CPU_FTR_NODSISRALIGN ASM_CONST(0x0000000000100000)
@@ -465,7 +466,7 @@ enum {
CPU_FTRS_44X | CPU_FTRS_440x6 |
#endif
#ifdef CONFIG_PPC_47x
- CPU_FTRS_47X |
+ CPU_FTRS_47X | CPU_FTR_476_DD2 |
#endif
#ifdef CONFIG_E200
CPU_FTRS_E200 |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 8d74a24..436e1e5 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1811,11 +1811,11 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_440A,
.platform = "ppc440",
},
- { /* 476 core */
- .pvr_mask = 0xffff0000,
- .pvr_value = 0x11a50000,
+ { /* 476 DD2 core */
+ .pvr_mask = 0xffffffff,
+ .pvr_value = 0x11a52080,
.cpu_name = "476",
- .cpu_features = CPU_FTRS_47X,
+ .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
.cpu_user_features = COMMON_USER_BOOKE |
PPC_FEATURE_HAS_FPU,
.mmu_features = MMU_FTR_TYPE_47x |
@@ -1839,6 +1839,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
.machine_check = machine_check_47x,
.platform = "ppc470",
},
+ { /* 476 others */
+ .pvr_mask = 0xffff0000,
+ .pvr_value = 0x11a50000,
+ .cpu_name = "476",
+ .cpu_features = CPU_FTRS_47X,
+ .cpu_user_features = COMMON_USER_BOOKE |
+ PPC_FEATURE_HAS_FPU,
+ .mmu_features = MMU_FTR_TYPE_47x |
+ MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
+ .icache_bsize = 32,
+ .dcache_bsize = 128,
+ .machine_check = machine_check_47x,
+ .platform = "ppc470",
+ },
{ /* default match */
.pvr_mask = 0x00000000,
.pvr_value = 0x00000000,
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH V8 04/10] USB/ppc4xx: Add Synopsys DWC OTG HCD function
From: Alexander Gordeev @ 2011-01-26 16:27 UTC (permalink / raw)
To: tmarri; +Cc: greg, linux-usb, linuxppc-dev, Fushen Chen, Mark Miesfeld
In-Reply-To: <1295477855-14775-1-git-send-email-tmarri@apm.com>
[-- Attachment #1: Type: text/plain, Size: 936 bytes --]
Hi,
Please consider squashing this little patch into yours. The driver
currently prints 0x00000000 as the register base. This patch will fix
that.
commit 2f850fe637101be287f116a37282b6b1a09e6a98
Author: Alexander Gordeev <lasaine@lvk.cs.msu.su>
Date: Mon Nov 29 15:15:25 2010 +0300
dwc_otg: set usb hcd resource address and length
Signed-off-by: Alexander Gordeev <lasaine@lvk.cs.msu.su>
diff --git a/drivers/usb/dwc_otg/dwc_otg_hcd.c b/drivers/usb/dwc_otg/dwc_otg_hcd.c
index 240ab0b..e420a8d 100644
--- a/drivers/usb/dwc_otg/dwc_otg_hcd.c
+++ b/drivers/usb/dwc_otg/dwc_otg_hcd.c
@@ -1269,6 +1269,8 @@ int __devinit dwc_otg_hcd_init(struct device *_dev,
}
dev_set_drvdata(_dev, dwc_otg_device);
hcd->regs = otg_dev->base;
+ hcd->rsrc_start = otg_dev->phys_addr;
+ hcd->rsrc_len = otg_dev->base_len;
hcd->self.otg_port = 1;
/* Initialize the DWC OTG HCD. */
--
Alexander
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^ permalink raw reply related
* RE: [PATCH V8 03/10] USB/ppc4xx: Add Synopsys DWC OTG CoreInterface Layer
From: David Laight @ 2011-01-26 16:35 UTC (permalink / raw)
Cc: linux-usb, linuxppc-dev
In-Reply-To: <20110126191734.5dff9641@desktopvm.lvknet>
=20
> Also in_le32/out_le32/in_be32/out_be32 are=20
> architecture-specific AFAIK.
Isn't the whole patch architecture-specific ?
> I'd suggest using readl/writel for LE ops and
> __be32_to_cpu(__raw_readl(addr))/__raw_writel(__cpu_to_be32(b),addr)
> for BE ops.
Since the ppc doesn't have a byteswap instruction (and the LE
memory transfers might even be slow!) you really don't want to
be doing software byteswap.
Not to mention the horrific synchronistion instructions
that in_le32() and out_le32() actually contain.
I didn't find __raw_readl() when I was looking for asm
patterns that byteswapped memory transfers.
I did find st_le32() and ld_le32() in arch/powerpc/include/asm/swab.h
but that file is actually quite difficult to #include because
there is another swab.h that gets included instead.
David
^ permalink raw reply
* Re: 750gx cpufreq induced kernel panic in 2.6.36
From: kevin diggs @ 2011-01-26 17:20 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1296016338.2349.125.camel@pasglop>
On Tue, Jan 25, 2011 at 10:32 PM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
>>
>> What are exception 700 & 901?
>
> 700 is a program check (illegal instruction or BUG_ON() statement)
>
> 900 is decrementer (aka timer) interrupt.
>
>> The 0x1000c694 address looks fishy?
>
> That's userspace.
>
> So you took a timer interrupt, which got into hrtimer, and something you
> did caused cpufreq_notify_transition to crash, probably with a BUG_ON
This should prove quite useful! Thanks!
> (which you can probably see above what you pasted, unless you don't have
> access to that part of the backtrace).
>
This is kind of my problem. ANY suggestions (applicable to an old
world PowerMac) would be appreciated on how to get access to the rest
of the information. This thing appears completely dead at this point.
Thanks!
kevin
P.S.: There are 2 columns of numbers:
[xxx] [yyy]
One of these is the PC. What is the other? stack?
> Cheers,
> Ben.
>
>> Thanks!
>>
>> kevin
>> _______________________________________________
>> Linuxppc-dev mailing list
>> Linuxppc-dev@lists.ozlabs.org
>> https://lists.ozlabs.org/listinfo/linuxppc-dev
>
^ permalink raw reply
* [PATCH] dt: Move device tree documentation out of powerpc directory
From: Grant Likely @ 2011-01-26 17:20 UTC (permalink / raw)
To: linux-kernel, devicetree-discuss, linuxppc-dev, benh
The device tree is used by more than just PowerPC. Make the documentation
directory available to all.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
---
Assuming nobody has an issue with this, I'll push it out to Linus for
2.6.38 since it is only a documentation change.
g.
.../bindings}/4xx/cpm.txt | 0
.../bindings}/4xx/emac.txt | 0
.../bindings}/4xx/ndfc.txt | 0
.../bindings}/4xx/ppc440spe-adma.txt | 0
.../bindings}/4xx/reboot.txt | 0
.../bindings}/can/sja1000.txt | 0
.../dts-bindings => devicetree/bindings}/ecm.txt | 0
.../bindings}/eeprom.txt | 0
.../bindings}/fsl/83xx-512x-pci.txt | 0
.../bindings}/fsl/8xxx_gpio.txt | 0
.../bindings}/fsl/board.txt | 0
.../bindings}/fsl/can.txt | 0
.../bindings}/fsl/cpm_qe/cpm.txt | 0
.../bindings}/fsl/cpm_qe/cpm/brg.txt | 0
.../bindings}/fsl/cpm_qe/cpm/i2c.txt | 0
.../bindings}/fsl/cpm_qe/cpm/pic.txt | 0
.../bindings}/fsl/cpm_qe/cpm/usb.txt | 0
.../bindings}/fsl/cpm_qe/gpio.txt | 0
.../bindings}/fsl/cpm_qe/network.txt | 0
.../bindings}/fsl/cpm_qe/qe.txt | 0
.../bindings}/fsl/cpm_qe/qe/firmware.txt | 0
.../bindings}/fsl/cpm_qe/qe/par_io.txt | 0
.../bindings}/fsl/cpm_qe/qe/pincfg.txt | 0
.../bindings}/fsl/cpm_qe/qe/ucc.txt | 0
.../bindings}/fsl/cpm_qe/qe/usb.txt | 0
.../bindings}/fsl/cpm_qe/serial.txt | 0
.../bindings}/fsl/diu.txt | 0
.../bindings}/fsl/dma.txt | 0
.../bindings}/fsl/esdhc.txt | 0
.../bindings}/fsl/gtm.txt | 0
.../bindings}/fsl/guts.txt | 0
.../bindings}/fsl/i2c.txt | 0
.../bindings}/fsl/lbc.txt | 0
.../bindings}/fsl/mcm.txt | 0
.../bindings}/fsl/mcu-mpc8349emitx.txt | 0
.../bindings}/fsl/mpc5121-psc.txt | 0
.../bindings}/fsl/mpc5200.txt | 0
.../bindings}/fsl/mpic.txt | 0
.../bindings}/fsl/msi-pic.txt | 0
.../bindings}/fsl/pmc.txt | 0
.../bindings}/fsl/sata.txt | 0
.../bindings}/fsl/sec.txt | 0
.../bindings}/fsl/spi.txt | 0
.../bindings}/fsl/ssi.txt | 0
.../bindings}/fsl/tsec.txt | 0
.../bindings}/fsl/upm-nand.txt | 0
.../bindings}/fsl/usb.txt | 0
.../bindings}/gpio/gpio.txt | 0
.../bindings}/gpio/led.txt | 0
.../bindings}/gpio/mdio.txt | 0
.../bindings}/marvell.txt | 0
.../bindings}/mmc-spi-slot.txt | 0
.../bindings}/mtd-physmap.txt | 0
.../bindings}/nintendo/gamecube.txt | 0
.../bindings}/nintendo/wii.txt | 0
.../dts-bindings => devicetree/bindings}/phy.txt | 0
.../bindings}/spi-bus.txt | 0
.../bindings}/usb-ehci.txt | 0
.../bindings}/xilinx.txt | 0
.../{powerpc => devicetree}/booting-without-of.txt | 0
60 files changed, 0 insertions(+), 0 deletions(-)
rename Documentation/{powerpc/dts-bindings => devicetree/bindings}/4xx/cpm.txt (100%)
rename Documentation/{powerpc/dts-bindings => devicetree/bindings}/4xx/emac.txt (100%)
rename Documentation/{powerpc/dts-bindings => devicetree/bindings}/4xx/ndfc.txt (100%)
rename Documentation/{powerpc/dts-bindings => devicetree/bindings}/4xx/ppc440spe-adma.txt (100%)
rename Documentation/{powerpc/dts-bindings => devicetree/bindings}/4xx/reboot.txt (100%)
rename Documentation/{powerpc/dts-bindings => devicetree/bindings}/can/sja1000.txt (100%)
rename Documentation/{powerpc/dts-bindings => devicetree/bindings}/ecm.txt (100%)
rename Documentation/{powerpc/dts-bindings => devicetree/bindings}/eeprom.txt (100%)
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similarity index 100%
rename from Documentation/powerpc/dts-bindings/usb-ehci.txt
rename to Documentation/devicetree/bindings/usb-ehci.txt
diff --git a/Documentation/powerpc/dts-bindings/xilinx.txt b/Documentation/devicetree/bindings/xilinx.txt
similarity index 100%
rename from Documentation/powerpc/dts-bindings/xilinx.txt
rename to Documentation/devicetree/bindings/xilinx.txt
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/devicetree/booting-without-of.txt
similarity index 100%
rename from Documentation/powerpc/booting-without-of.txt
rename to Documentation/devicetree/booting-without-of.txt
--
1.7.1
^ permalink raw reply
* Re: [PATCH V8 03/10] USB/ppc4xx: Add Synopsys DWC OTG CoreInterface Layer
From: Alexander Gordeev @ 2011-01-26 17:35 UTC (permalink / raw)
To: David Laight; +Cc: linux-usb, linuxppc-dev
In-Reply-To: <AE90C24D6B3A694183C094C60CF0A2F6D8AC2C@saturn3.aculab.com>
[-- Attachment #1: Type: text/plain, Size: 1257 bytes --]
В Wed, 26 Jan 2011 16:35:05 -0000
"David Laight" <David.Laight@ACULAB.COM> пишет:
>
> > Also in_le32/out_le32/in_be32/out_be32 are
> > architecture-specific AFAIK.
>
> Isn't the whole patch architecture-specific ?
I use this driver on MIPS board right now. :)
This core from Synopsys is used in many SOCs with various architectures.
> > I'd suggest using readl/writel for LE ops and
> > __be32_to_cpu(__raw_readl(addr))/__raw_writel(__cpu_to_be32(b),addr)
> > for BE ops.
>
> Since the ppc doesn't have a byteswap instruction (and the LE
> memory transfers might even be slow!) you really don't want to
> be doing software byteswap.
>
> Not to mention the horrific synchronistion instructions
> that in_le32() and out_le32() actually contain.
>
> I didn't find __raw_readl() when I was looking for asm
> patterns that byteswapped memory transfers.
>
> I did find st_le32() and ld_le32() in arch/powerpc/include/asm/swab.h
> but that file is actually quite difficult to #include because
> there is another swab.h that gets included instead.
I see. readl/writel are defined in asm-generic/io.h. So IMHO there
should be also le and be versions that can be redefined in
arch-specific code.
--
Alexander
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^ permalink raw reply
* Re: FSL DMA engine transfer to PCI memory
From: Scott Wood @ 2011-01-26 19:09 UTC (permalink / raw)
To: David Laight; +Cc: linuxppc-dev
In-Reply-To: <AE90C24D6B3A694183C094C60CF0A2F6D8AC2A@saturn3.aculab.com>
On Wed, 26 Jan 2011 10:18:01 +0000
David Laight <David.Laight@ACULAB.COM> wrote:
>
> > What was the ppc you used?
>
> The 8315E PowerQUIICC II
Ah. The interconnect between the DMA engine and PCIe is different on
83xx.
> > The DMA engine and PCIe are both on OCeaN, so the traffic
> > does not need to pass through the e500 Coherency Module.
> > My understanding -- for what it's worth, coming from a
> > software person :-) -- is that you should
> > be able to get large transfer chunks using the DMA engine.
>
> It might be possible - but the ppc's pcie would need to know
> the length of the dma (or at least be told that there was more
> data to arrive) before even starting the pcie transfer.
On 85xx/QorIQ, I believe the connection between the DMA engine and the
PCIe controller allows the data to arrive in suitably large chunks.
> > I suggest getting things working, and then seeing whether the
> > performance is acceptable.
>
> The only reason for using dma (instead of pio) is to get
> long pcie transfers - otherwise it isn't really worth the
> effort. Transfers are unlikely to take long enough to make
> it worth taking an interrupt at the end of the dma.
But in the absence of specific knowledge about this specific
chip, implementing it and testing is a good way of determining whether
you get those large PCIe transactions on this particular hardware.
And even if the transfers aren't particularly fast, if the total
transfer size (not the size of the chunks that go on the bus) is large
enough, it could be worth freeing up the core to do something else. It
could also avoid running the data through the core's caches, or be a
transfer from one PCIe device to another, etc. Don't be too quick to
say don't bother. :-)
> > > The generic dma controller can't even generate 64bit
> > > cycles into the ppc's PCIe engine.
> >
> > Could you elaborate?
>
> The pcie is (apparantly) a 64bit interface, to a single 32bit
> transfer is actually a 64bit one with only 4 byte enables driven.
My understanding is that PCIe is an aggregation of one or more
serial links, over which packets are sent. I'm not sure to what extent
it makes sense to call it a 64-bit interface, other than addressing.
> I couldn't see anything that would allow a CSB master to generate
> two 32bit cycles (since it is a 32bit bus) that the pcie hardware
> could convert into a single 64bit pcie transfer.
Again, that's an 83xx thing, 85xx/QorIQ is different.
Though from the 8315 manual it looks like the CSB can do 64-bit data
(but not addresses).
-Scott
^ permalink raw reply
* Re: [PATCH] dt: Move device tree documentation out of powerpc directory
From: Sam Ravnborg @ 2011-01-26 19:12 UTC (permalink / raw)
To: Grant Likely; +Cc: devicetree-discuss, linuxppc-dev, linux-kernel
In-Reply-To: <1296062434-18027-1-git-send-email-grant.likely@secretlab.ca>
On Wed, Jan 26, 2011 at 10:20:34AM -0700, Grant Likely wrote:
> The device tree is used by more than just PowerPC. Make the documentation
> directory available to all.
How does the planned stucture look like for this
new directory?
I see that in your move the architecture is dropped.
But some of these looks like they are arch candidates.
The 4xx/* for example looks like powerpc stuff that
should be in a powerpc directory.
Another is sja1000. This is obviously a can driver.
So how about mirroring the kernel structure:
Proposal:
drivers/net/can <=== sja1000.txt
drivers/ata/ <=== fsl/sata.txt
arch/powerpc <=== powerpc specific stuff
This is a bit more effort but then we end
up with a well-known structure.
Sam
^ permalink raw reply
* Re: [PATCH] dt: Move device tree documentation out of powerpc directory
From: Josh Boyer @ 2011-01-26 19:43 UTC (permalink / raw)
To: Grant Likely; +Cc: devicetree-discuss, linuxppc-dev, linux-kernel
In-Reply-To: <1296062434-18027-1-git-send-email-grant.likely@secretlab.ca>
On Wed, Jan 26, 2011 at 10:20:34AM -0700, Grant Likely wrote:
>The device tree is used by more than just PowerPC. Make the documentation
>directory available to all.
>
>Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
>---
>
>Assuming nobody has an issue with this, I'll push it out to Linus for
>2.6.38 since it is only a documentation change.
>
>g.
>
> .../bindings}/4xx/cpm.txt | 0
> .../bindings}/4xx/emac.txt | 0
> .../bindings}/4xx/ndfc.txt | 0
> .../bindings}/4xx/ppc440spe-adma.txt | 0
> .../bindings}/4xx/reboot.txt | 0
This should probably be renamed to ...bindings}/powerpc4xx/ in that
case. Similarly for fsl (even more so since they have ARM parts too).
Also the booting-without-of.txt file is very powerpc specific. So I
would suggest either creating a powerpc/ directory under /bindings or
something similar.
Opinions?
josh
^ permalink raw reply
* Re: [PATCH] dt: Move device tree documentation out of powerpc directory
From: Grant Likely @ 2011-01-26 19:58 UTC (permalink / raw)
To: Josh Boyer, Sam Ravnborg; +Cc: devicetree-discuss, linuxppc-dev, linux-kernel
In-Reply-To: <20110126194301.GA13541@zod.rchland.ibm.com>
On Wed, Jan 26, 2011 at 12:43 PM, Josh Boyer <jwboyer@linux.vnet.ibm.com> w=
rote:
> On Wed, Jan 26, 2011 at 10:20:34AM -0700, Grant Likely wrote:
>>The device tree is used by more than just PowerPC. =A0Make the documentat=
ion
>>directory available to all.
>>
>>Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
>>---
>>
>>Assuming nobody has an issue with this, I'll push it out to Linus for
>>2.6.38 since it is only a documentation change.
>>
>>g.
>>
>> .../bindings}/4xx/cpm.txt =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 =A0| =A0 =A00
>> .../bindings}/4xx/emac.txt =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 | =A0 =A00
>> .../bindings}/4xx/ndfc.txt =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =
=A0 | =A0 =A00
>> .../bindings}/4xx/ppc440spe-adma.txt =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =
=A00
>> .../bindings}/4xx/reboot.txt =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
| =A0 =A00
>
> This should probably be renamed to ...bindings}/powerpc4xx/ in that
> case. =A0Similarly for fsl (even more so since they have ARM parts too).
okay, I'll look at reorganizing.
>
> Also the booting-without-of.txt file is very powerpc specific. =A0So I
> would suggest either creating a powerpc/ directory under /bindings or
> something similar.
Actually, it isn't. Very little of it is powerpc-specific, and after
I looked at it I decided that it still made sense to keep it in this
file and add additional sections for arm, x86, mips and microblaze
entry.
g.
^ permalink raw reply
* dump_stack doc
From: kevin diggs @ 2011-01-26 20:08 UTC (permalink / raw)
To: linuxppc-dev
[-- Attachment #1: Type: text/plain, Size: 1575 bytes --]
Hi,
Does this content look ok:
kevdig@SatelliteA75:/usr/src/linux-2.6.36/arch/powerpc/kernel$ diff
-U3 process.c process-new_c
--- process.c 2010-10-23 20:01:13.000000000 -0500
+++ process-new_c 2011-01-26 14:04:17.000000000 -0600
@@ -1107,6 +1107,27 @@
static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
+/**
+ * void show_stack() - dump the contents of the stack in readable format
+ * @struct task_struct *tsk: pointer to task struct owning stack frame
+ * @unsigned long *stack: pointer to stack frame
+ *
+ * Dump the stack in bipedal carbon unit readable form. Format is:
+ * Call Trace:
+ * [[ --- Exception: <trap id (%lx)> at <trap handler (%pS)> ]]
+ * [[ LR = <trapping routine (%pS)> ]]
+ * [<stack ("REG")>] [<instruction ("REG")>] <instruction (%pS)> [[
(unreliable)]]
+ *
+ * Information between '[[' & ']]' is optional. Additional information is
+ * printed at the beginning of what are believed to be exception frames.
+ *
+ * The first frame is considered unreliable and will have " (unreliable)"
+ * tacked on the end.
+ *
+ * kstack_depth_to_print determines how many frames to show.
+ *
+ * Value in parenthesis is the format specifier used. See printk().
+ */
void show_stack(struct task_struct *tsk, unsigned long *stack)
{
unsigned long sp, ip, lr, newsp;
@@ -1177,6 +1198,11 @@
} while (count++ < kstack_depth_to_print);
}
+/**
+ * void dump_stack(void) - dump the contents of the stack in readable form
+ *
+ * See process.c`show_stack() for details
+ */
void dump_stack(void)
{
show_stack(current, NULL);
kevin
[-- Attachment #2: process.c.diff --]
[-- Type: text/x-diff, Size: 1442 bytes --]
--- process.c 2010-10-23 20:01:13.000000000 -0500
+++ process-new_c 2011-01-26 14:04:17.000000000 -0600
@@ -1107,6 +1107,27 @@
static int kstack_depth_to_print = CONFIG_PRINT_STACK_DEPTH;
+/**
+ * void show_stack() - dump the contents of the stack in readable format
+ * @struct task_struct *tsk: pointer to task struct owning stack frame
+ * @unsigned long *stack: pointer to stack frame
+ *
+ * Dump the stack in bipedal carbon unit readable form. Format is:
+ * Call Trace:
+ * [[ --- Exception: <trap id (%lx)> at <trap handler (%pS)> ]]
+ * [[ LR = <trapping routine (%pS)> ]]
+ * [<stack ("REG")>] [<instruction ("REG")>] <instruction (%pS)> [[ (unreliable)]]
+ *
+ * Information between '[[' & ']]' is optional. Additional information is
+ * printed at the beginning of what are believed to be exception frames.
+ *
+ * The first frame is considered unreliable and will have " (unreliable)"
+ * tacked on the end.
+ *
+ * kstack_depth_to_print determines how many frames to show.
+ *
+ * Value in parenthesis is the format specifier used. See printk().
+ */
void show_stack(struct task_struct *tsk, unsigned long *stack)
{
unsigned long sp, ip, lr, newsp;
@@ -1177,6 +1198,11 @@
} while (count++ < kstack_depth_to_print);
}
+/**
+ * void dump_stack(void) - dump the contents of the stack in readable form
+ *
+ * See process.c`show_stack() for details
+ */
void dump_stack(void)
{
show_stack(current, NULL);
^ permalink raw reply
* Re: 750gx cpufreq induced kernel panic in 2.6.36
From: Benjamin Herrenschmidt @ 2011-01-26 21:43 UTC (permalink / raw)
To: kevin diggs; +Cc: linuxppc-dev
In-Reply-To: <AANLkTim7gDwj+xCxiiTka23eu=v7kZX+Pq=3sQ1FT49J@mail.gmail.com>
On Wed, 2011-01-26 at 11:20 -0600, kevin diggs wrote:
> This is kind of my problem. ANY suggestions (applicable to an old
> world PowerMac) would be appreciated on how to get access to the rest
> of the information. This thing appears completely dead at this point.
You don't have a serial port ?
If you do, use "sccdbg" on the kernel command line to route xmon to it,
and boot with console=ttyPZ0,38400 (I think the old things default to
38400 bauds). Use the "modem" port.
Cheers,
Ben.
^ permalink raw reply
* [PATCH 2/5] powerpc/44x: allow override to hard-coded uart address
From: Dave Kleikamp @ 2011-01-26 21:51 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Dave Kleikamp
In-Reply-To: <1296078676-13940-1-git-send-email-shaggy@linux.vnet.ibm.com>
Allow the early debug uart address to be overridden from the kernel
command line.
I would have preferred use the uart's virtual-reg property, but the device
tree hasn't been unflatted yet, and I don't know a reliable way to find it.
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
---
arch/powerpc/kernel/udbg_16550.c | 17 ++++++++++++++---
1 files changed, 14 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index b4b167b..d36021a 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -219,6 +219,19 @@ void udbg_init_pas_realmode(void)
#ifdef CONFIG_PPC_EARLY_DEBUG_44x
#include <platforms/44x/44x.h>
+static unsigned long udbg_44x_comport = PPC44x_EARLY_DEBUG_VIRTADDR;
+
+static int __init early_parse_comport(char *p)
+{
+ if (!p || !(*p))
+ return 0;
+
+ udbg_44x_comport = simple_strtoul(p, 0, 16);
+
+ return 0;
+}
+early_param("uart_addr", early_parse_comport);
+
static void udbg_44x_as1_flush(void)
{
if (udbg_comport) {
@@ -249,9 +262,7 @@ static int udbg_44x_as1_getc(void)
void __init udbg_init_44x_as1(void)
{
- udbg_comport =
- (struct NS16550 __iomem *)PPC44x_EARLY_DEBUG_VIRTADDR;
-
+ udbg_comport = (struct NS16550 __iomem *)udbg_44x_comport;
udbg_putc = udbg_44x_as1_putc;
udbg_flush = udbg_44x_as1_flush;
udbg_getc = udbg_44x_as1_getc;
--
1.7.3.4
^ permalink raw reply related
* [PATCH 0/5] powerpc: AMP support for 47x
From: Dave Kleikamp @ 2011-01-26 21:51 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Dave Kleikamp
These patches add Asynchonous MultiProcessing support for the 47x chipset.
This allows independent OS instances to run on separate cores.
Dave Kleikamp (5):
powerpc: Move udbg_early_init() after early_init_devtree()
powerpc/44x: allow override to hard-coded uart address
powerpc/47x: allow kernel to be loaded in higher physical memory
powerpc/44x: don't use tlbivax on AMP systems
powerpc/476: Create a dts files for two 476 AMP instances under ISS
arch/powerpc/Kconfig | 2 +-
arch/powerpc/boot/Makefile | 9 ++-
arch/powerpc/boot/dts/iss476-amp1.dts | 119 ++++++++++++++++++++++++
arch/powerpc/boot/dts/iss476-amp2.dts | 123 +++++++++++++++++++++++++
arch/powerpc/boot/treeboot-iss4xx-hi.c | 65 +++++++++++++
arch/powerpc/boot/wrapper | 7 ++
arch/powerpc/configs/44x/iss476-smp_defconfig | 6 +-
arch/powerpc/include/asm/mmu.h | 2 +-
arch/powerpc/kernel/head_44x.S | 42 +++++++--
arch/powerpc/kernel/setup_32.c | 6 +-
arch/powerpc/kernel/udbg_16550.c | 17 +++-
arch/powerpc/mm/44x_mmu.c | 13 ++-
arch/powerpc/mm/tlb_nohash.c | 21 ++++-
13 files changed, 408 insertions(+), 24 deletions(-)
create mode 100644 arch/powerpc/boot/dts/iss476-amp1.dts
create mode 100644 arch/powerpc/boot/dts/iss476-amp2.dts
create mode 100644 arch/powerpc/boot/treeboot-iss4xx-hi.c
--
1.7.3.4
^ permalink raw reply
* [PATCH 5/5] powerpc/476: Create a dts files for two 476 AMP instances under ISS
From: Dave Kleikamp @ 2011-01-26 21:51 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Dave Kleikamp
In-Reply-To: <1296078676-13940-1-git-send-email-shaggy@linux.vnet.ibm.com>
These are completely independent OS instances, each running on 2 cores.
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
---
arch/powerpc/boot/Makefile | 9 ++-
arch/powerpc/boot/dts/iss476-amp1.dts | 119 ++++++++++++++++++++++++++++++
arch/powerpc/boot/dts/iss476-amp2.dts | 123 ++++++++++++++++++++++++++++++++
arch/powerpc/boot/treeboot-iss4xx-hi.c | 65 +++++++++++++++++
arch/powerpc/boot/wrapper | 7 ++
5 files changed, 321 insertions(+), 2 deletions(-)
create mode 100644 arch/powerpc/boot/dts/iss476-amp1.dts
create mode 100644 arch/powerpc/boot/dts/iss476-amp2.dts
create mode 100644 arch/powerpc/boot/treeboot-iss4xx-hi.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 8917816..417502a 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -45,6 +45,8 @@ $(obj)/cuboot-katmai.o: BOOTCFLAGS += -mcpu=405
$(obj)/cuboot-acadia.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-walnut.o: BOOTCFLAGS += -mcpu=405
$(obj)/treeboot-iss4xx.o: BOOTCFLAGS += -mcpu=405
+$(obj)/treeboot-iss476-amp1.o: BOOTCFLAGS += -mcpu=405
+$(obj)/treeboot-iss476-amp2.o: BOOTCFLAGS += -mcpu=405
$(obj)/virtex405-head.o: BOOTAFLAGS += -mcpu=405
@@ -78,7 +80,8 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
- gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c
+ gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c \
+ treeboot-iss4xx-hi.c
src-boot := $(src-wlib) $(src-plat) empty.c
src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -208,7 +211,9 @@ image-$(CONFIG_KATMAI) += cuImage.katmai
image-$(CONFIG_WARP) += cuImage.warp
image-$(CONFIG_YOSEMITE) += cuImage.yosemite
image-$(CONFIG_ISS4xx) += treeImage.iss4xx \
- treeImage.iss4xx-mpic
+ treeImage.iss4xx-mpic \
+ treeImage.iss476-amp1 \
+ treeImage.iss476-amp2
# Board ports in arch/powerpc/platform/8xx/Kconfig
image-$(CONFIG_MPC86XADS) += cuImage.mpc866ads
diff --git a/arch/powerpc/boot/dts/iss476-amp1.dts b/arch/powerpc/boot/dts/iss476-amp1.dts
new file mode 100644
index 0000000..7de3485
--- /dev/null
+++ b/arch/powerpc/boot/dts/iss476-amp1.dts
@@ -0,0 +1,119 @@
+/*
+ * Device Tree Source for IBM Embedded PPC 476 Platform
+ *
+ * Copyright 2010 Torez Smith, IBM Corporation.
+ *
+ * Based on earlier code:
+ * Copyright (c) 2006, 2007 IBM Corp.
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x01f00000 0x00100000;
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ model = "ibm,iss-4xx";
+ compatible = "ibm,iss-4xx", "ibm,47x-AMP";
+ dcr-parent = <&{/cpus/cpu@0}>;
+
+ aliases {
+ serial0 = &UART0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ model = "PowerPC,4xx"; // real CPU changed in sim
+ reg = <0>;
+ clock-frequency = <100000000>; // 100Mhz :-)
+ timebase-frequency = <100000000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ dcr-controller;
+ dcr-access-method = "native";
+ status = "ok";
+ };
+ cpu@1 {
+ device_type = "cpu";
+ model = "PowerPC,4xx"; // real CPU changed in sim
+ reg = <1>;
+ clock-frequency = <100000000>; // 100Mhz :-)
+ timebase-frequency = <100000000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ dcr-controller;
+ dcr-access-method = "native";
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x01f00100>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+ reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
+
+ };
+
+ MPIC: interrupt-controller {
+ compatible = "chrp,open-pic";
+ interrupt-controller;
+ dcr-reg = <0xffc00000 0x00030000>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+
+ };
+
+ plb {
+ compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; // Filled in by zImage
+
+ POB0: opb {
+ compatible = "ibm,opb-4xx", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* Wish there was a nicer way of specifying a full 32-bit
+ range */
+ ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+ 0x80000000 0x00000001 0x80000000 0x80000000>;
+ clock-frequency = <0>; // Filled in by zImage
+ UART0: serial@40000200 {
+ device_type = "serial";
+ compatible = "ns16550a";
+ reg = <0x40000200 0x00000008>;
+ virtual-reg = <0xe0000200>;
+ clock-frequency = <11059200>;
+ current-speed = <115200>;
+ interrupt-parent = <&MPIC>;
+ interrupts = <0x0 0x2>;
+ };
+ };
+ };
+
+ nvrtc {
+ compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
+ reg = <0 0xEF703000 0x2000>;
+ };
+
+ chosen {
+ linux,stdout-path = "/plb/opb/serial@40000200";
+ };
+};
diff --git a/arch/powerpc/boot/dts/iss476-amp2.dts b/arch/powerpc/boot/dts/iss476-amp2.dts
new file mode 100644
index 0000000..df38ee5
--- /dev/null
+++ b/arch/powerpc/boot/dts/iss476-amp2.dts
@@ -0,0 +1,123 @@
+/*
+ * Device Tree Source for IBM Embedded PPC 476 Platform
+ *
+ * Copyright 2010 Torez Smith, IBM Corporation.
+ *
+ * Based on earlier code:
+ * Copyright (c) 2006, 2007 IBM Corp.
+ * Josh Boyer <jwboyer@linux.vnet.ibm.com>, David Gibson <dwg@au1.ibm.com>
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License version 2. This program is licensed "as is" without
+ * any warranty of any kind, whether express or implied.
+ */
+
+/dts-v1/;
+
+/memreserve/ 0x11f00000 0x00100000;
+
+/ {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ model = "ibm,iss-4xx";
+ compatible = "ibm,iss-4xx", "ibm,47x-AMP";
+ dcr-parent = <&{/cpus/cpu@2}>;
+
+ aliases {
+ serial0 = &UART0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@2 {
+ device_type = "cpu";
+ model = "PowerPC,4xx"; // real CPU changed in sim
+ reg = <2>;
+ clock-frequency = <100000000>; // 100Mhz :-)
+ timebase-frequency = <100000000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ dcr-controller;
+ dcr-access-method = "native";
+ status = "ok";
+ };
+ cpu@3 {
+ device_type = "cpu";
+ model = "PowerPC,4xx"; // real CPU changed in sim
+ reg = <3>;
+ clock-frequency = <100000000>; // 100Mhz :-)
+ timebase-frequency = <100000000>;
+ i-cache-line-size = <32>;
+ d-cache-line-size = <32>;
+ i-cache-size = <32768>;
+ d-cache-size = <32768>;
+ dcr-controller;
+ dcr-access-method = "native";
+ status = "disabled";
+ enable-method = "spin-table";
+ cpu-release-addr = <0 0x11f00300>;
+ };
+ };
+
+ memory {
+ device_type = "memory";
+/*
+ reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
+ */
+ reg = < 0x0 0x10000000 0x02000000 >;
+
+ };
+
+ MPIC: interrupt-controller {
+ compatible = "chrp,open-pic";
+ interrupt-controller;
+ dcr-reg = <0xffc00000 0x00030000>;
+ #address-cells = <0>;
+ #size-cells = <0>;
+ #interrupt-cells = <2>;
+
+ };
+
+ plb {
+ compatible = "ibm,plb-4xx", "ibm,plb4"; /* Could be PLB6, doesn't matter */
+ #address-cells = <2>;
+ #size-cells = <1>;
+ ranges;
+ clock-frequency = <0>; // Filled in by zImage
+
+ POB0: opb {
+ compatible = "ibm,opb-4xx", "ibm,opb";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ /* Wish there was a nicer way of specifying a full 32-bit
+ range */
+ ranges = <0x00000000 0x00000001 0x00000000 0x80000000
+ 0x80000000 0x00000001 0x80000000 0x80000000>;
+ clock-frequency = <0>; // Filled in by zImage
+ UART0: serial@40001200 {
+ device_type = "serial";
+ compatible = "ns16550a";
+ reg = <0x40001200 0x00000008>;
+ virtual-reg = <0xe0001200>;
+ clock-frequency = <11059200>;
+ current-speed = <115200>;
+ interrupt-parent = <&MPIC>;
+ interrupts = <0x1 0x2>;
+ };
+ };
+ };
+
+ nvrtc {
+ compatible = "ds1743-nvram", "ds1743", "rtc-ds1743";
+ reg = <0 0xEF703000 0x2000>;
+ };
+
+ chosen {
+ bootargs = "uart_addr=0xf0001200";
+ linux,stdout-path = "/plb/opb/serial@40001200";
+ };
+};
diff --git a/arch/powerpc/boot/treeboot-iss4xx-hi.c b/arch/powerpc/boot/treeboot-iss4xx-hi.c
new file mode 100644
index 0000000..c6f376f
--- /dev/null
+++ b/arch/powerpc/boot/treeboot-iss4xx-hi.c
@@ -0,0 +1,65 @@
+/*
+ * Copyright 2010 Ben. Herrenschmidt, IBM Corporation.
+ *
+ * Based on earlier code:
+ * Copyright (C) Paul Mackerras 1997.
+ *
+ * Matt Porter <mporter@kernel.crashing.org>
+ * Copyright 2002-2005 MontaVista Software Inc.
+ *
+ * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
+ * Copyright (c) 2003, 2004 Zultys Technologies
+ *
+ * Copyright 2007 David Gibson, IBM Corporation.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <stdarg.h>
+#include <stddef.h>
+#include "types.h"
+#include "elf.h"
+#include "string.h"
+#include "stdio.h"
+#include "page.h"
+#include "ops.h"
+#include "reg.h"
+#include "io.h"
+#include "dcr.h"
+#include "4xx.h"
+#include "44x.h"
+#include "libfdt.h"
+
+BSS_STACK(4096);
+
+static void iss_4xx_fixups(void)
+{
+ ibm4xx_sdram_fixup_memsize();
+}
+
+/*
+ * Quick and dirty hack for loading a kernel at fixed address 0x10000000
+ */
+static void *iss_4xx_vmlinux_alloc(unsigned long size)
+{
+ return (void *)0x10000000;
+}
+
+#define SPRN_PIR 0x11E /* Processor Indentification Register */
+void platform_init(void)
+{
+ unsigned long end_of_ram = 0x08000000;
+ unsigned long avail_ram = end_of_ram - (unsigned long)_end;
+ u32 pir_reg;
+
+ simple_alloc_init(_end, avail_ram, 128, 64);
+ /* platform_ops.fixups = iss_4xx_fixups; */
+ platform_ops.vmlinux_alloc = iss_4xx_vmlinux_alloc;
+ platform_ops.exit = ibm44x_dbcr_reset;
+ pir_reg = mfspr(SPRN_PIR);
+ fdt_set_boot_cpuid_phys(_dtb_start, pir_reg);
+ fdt_init(_dtb_start);
+ serial_console_init();
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index cb97e75..2d2336c 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -244,6 +244,13 @@ gamecube|wii)
treeboot-iss4xx-mpic)
platformo="$object/treeboot-iss4xx.o"
;;
+treeboot-iss476-amp1)
+ platformo="$object/treeboot-iss4xx.o"
+ ;;
+treeboot-iss476-amp2)
+ platformo="$object/treeboot-iss4xx-hi.o"
+ link_address='0x10400000'
+ ;;
esac
vmz="$tmpdir/`basename \"$kernel\"`.$ext"
--
1.7.3.4
^ permalink raw reply related
* [PATCH 1/5] powerpc: Move udbg_early_init() after early_init_devtree()
From: Dave Kleikamp @ 2011-01-26 21:51 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Dave Kleikamp
In-Reply-To: <1296078676-13940-1-git-send-email-shaggy@linux.vnet.ibm.com>
so that it can use information from the device tree.
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
---
arch/powerpc/kernel/setup_32.c | 6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 1d2fbc9..d1ca976 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -120,12 +120,12 @@ notrace void __init machine_init(unsigned long dt_ptr)
{
lockdep_init();
- /* Enable early debugging if any specified (see udbg.h) */
- udbg_early_init();
-
/* Do some early initialization based on the flat device tree */
early_init_devtree(__va(dt_ptr));
+ /* Enable early debugging if any specified (see udbg.h) */
+ udbg_early_init();
+
probe_machine();
setup_kdump_trampoline();
--
1.7.3.4
^ permalink raw reply related
* [PATCH 4/5] powerpc/44x: don't use tlbivax on AMP systems
From: Dave Kleikamp @ 2011-01-26 21:51 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Dave Kleikamp
In-Reply-To: <1296078676-13940-1-git-send-email-shaggy@linux.vnet.ibm.com>
Since other OS's may be running on the other cores don't use tlbivax
Signed-off-by: Dave Kleikamp <shaggy@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/mmu.h | 2 +-
arch/powerpc/kernel/setup_32.c | 2 ++
arch/powerpc/mm/tlb_nohash.c | 21 ++++++++++++++++++++-
3 files changed, 23 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index bb40a06..f3a7c65 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -80,7 +80,7 @@ static inline int mmu_has_feature(unsigned long feature)
extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
-/* MMU initialization (64-bit only fo now) */
+/* MMU initialization */
extern void early_init_mmu(void);
extern void early_init_mmu_secondary(void);
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index d1ca976..e50ead7 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -126,6 +126,8 @@ notrace void __init machine_init(unsigned long dt_ptr)
/* Enable early debugging if any specified (see udbg.h) */
udbg_early_init();
+ early_init_mmu();
+
probe_machine();
setup_kdump_trampoline();
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index 2a030d8..b33c5e6 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -35,6 +35,7 @@
#include <linux/preempt.h>
#include <linux/spinlock.h>
#include <linux/memblock.h>
+#include <linux/of_fdt.h>
#include <asm/tlbflush.h>
#include <asm/tlb.h>
@@ -153,6 +154,17 @@ EXPORT_SYMBOL(local_flush_tlb_page);
*/
#ifdef CONFIG_SMP
+static int amp;
+
+#ifdef CONFIG_44x
+void __init early_init_mmu_44x(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+ if (of_flat_dt_is_compatible(root, "ibm,47x-AMP"))
+ amp = 1;
+}
+#endif /* CONFIG_44x */
+
static DEFINE_RAW_SPINLOCK(tlbivax_lock);
static int mm_is_core_local(struct mm_struct *mm)
@@ -232,7 +244,7 @@ void __flush_tlb_page(struct mm_struct *mm, unsigned long vmaddr,
cpu_mask = mm_cpumask(mm);
if (!mm_is_core_local(mm)) {
/* If broadcast tlbivax is supported, use it */
- if (mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) {
+ if (!amp && mmu_has_feature(MMU_FTR_USE_TLBIVAX_BCAST)) {
int lock = mmu_has_feature(MMU_FTR_LOCK_BCAST_INVAL);
if (lock)
raw_spin_lock(&tlbivax_lock);
@@ -587,4 +599,11 @@ void setup_initial_memory_limit(phys_addr_t first_memblock_base,
/* Finally limit subsequent allocations */
memblock_set_current_limit(first_memblock_base + ppc64_rma_size);
}
+#else /* ! CONFIG_PPC64 */
+void __init early_init_mmu(void)
+{
+#if defined(CONFIG_SMP) && defined(CONFIG_44x)
+ early_init_mmu_44x();
+#endif
+}
#endif /* CONFIG_PPC64 */
--
1.7.3.4
^ permalink raw reply related
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