* Re: [PATCH v2] powerpc/ptrace: remove BUG_ON when full register set not available
From: Benjamin Herrenschmidt @ 2011-03-21 0:15 UTC (permalink / raw)
To: mjw; +Cc: linuxppc-dev, mikey, anton
In-Reply-To: <1300282642.15145.2.camel@w500>
On Wed, 2011-03-16 at 08:37 -0500, Michael Wolf wrote:
> In some cases during a threaded core dump not all
> the threads will have a full register set. This
> will cause problems when the sigkill is sent to
> the thread. To solve this problem a poison value
> (0xdeadbeef) will be placed in the buffer in place
> of the actual register values. This will affect
> gpr14 to gpr31.
>
> Signed-off-by: Mike Wolf <mjw@linux.vnet.ibm.com>
Patch is busted on ppc32 (you add #define's in the middle of a
multi-line macro) and of doubtful stylistic value :-) I'll merge
a slightly reworked variant that includes a new cset comment
with Paulus explanation in it.
Cheers,
Ben.
> ----------
> --- linux-2.6.32-71.el6.ppc64.orig/arch/powerpc/include/asm/ptrace.h 2010-08-31 23:56:50.000000000 -0500
> +++ linux-2.6.32-71.el6.ppc64/arch/powerpc/include/asm/ptrace.h 2011-03-14 11:43:33.176667099 -0500
> @@ -123,8 +123,14 @@ extern int ptrace_put_reg(struct task_st
> #define TRAP(regs) ((regs)->trap & ~0xF)
> #ifdef __powerpc64__
> #define CHECK_FULL_REGS(regs) BUG_ON(regs->trap & 1)
> +#define PARTIAL_REG_FILL 0xdeadbeefdeadbeefUL
> +#define PARTIAL_REG_START 14
> +#define PARTIAL_REG_END 31
> #else
> #define CHECK_FULL_REGS(regs) \
> +#define PARTIAL_REG_FILL 0xdeadbeef
> +#define PARTIAL_REG_START 14
> +#define PARTIAL_REG_END 31
> do { \
> if ((regs)->trap & 1) \
> printk(KERN_CRIT "%s: partial register set\n", __func__); \
> --- linux-2.6.32-71.el6.ppc64.orig/arch/powerpc/kernel/ptrace.c 2009-12-02 21:51:21.000000000 -0600
> +++ linux-2.6.32-71.el6.ppc64/arch/powerpc/kernel/ptrace.c 2011-03-14 13:01:51.955586126 -0500
> @@ -125,11 +125,16 @@ static int gpr_get(struct task_struct *t
> void *kbuf, void __user *ubuf)
> {
> int ret;
> + int partial_reg;
>
> if (target->thread.regs == NULL)
> return -EIO;
>
> - CHECK_FULL_REGS(target->thread.regs);
> + if (!FULL_REGS(target->thread.regs))
> + /* We have a partial register set. Fill 14-31 with bogus values */
> + for(partial_reg=PARTIAL_REG_START;partial_reg <= PARTIAL_REG_END;
> + partial_reg++)
> + target->thread.regs->gpr[partial_reg] = PARTIAL_REG_FILL;
>
> ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
> target->thread.regs,
> @@ -536,11 +541,16 @@ static int gpr32_get(struct task_struct
> compat_ulong_t *k = kbuf;
> compat_ulong_t __user *u = ubuf;
> compat_ulong_t reg;
> + int partial_reg;
>
> if (target->thread.regs == NULL)
> return -EIO;
>
> - CHECK_FULL_REGS(target->thread.regs);
> + if (!FULL_REGS(target->thread.regs))
> + /* We have a partial register set. Fill 14-31 with bogus values */
> + for(partial_reg=PARTIAL_REG_START;partial_reg <= PARTIAL_REG_END;
> + partial_reg++)
> + target->thread.regs->gpr[partial_reg] = PARTIAL_REG_FILL;
>
> pos /= sizeof(reg);
> count /= sizeof(reg);
>
>
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Re: mmotm threatens ppc preemption again
From: Benjamin Herrenschmidt @ 2011-03-20 23:53 UTC (permalink / raw)
To: Hugh Dickins
Cc: Jeremy Fitzhardinge, linuxppc-dev, Andrew Morton, Peter Zijlstra
In-Reply-To: <alpine.LSU.2.00.1103192041390.1592@sister.anvils>
On Sat, 2011-03-19 at 21:11 -0700, Hugh Dickins wrote:
>
> As I warned a few weeks ago, Jeremy has vmalloc apply_to_pte_range
> patches in mmotm, which again assault PowerPC's expectations, and
> cause lots of noise with CONFIG_PREEMPT=y CONFIG_PREEMPT_DEBUG=y.
>
> This time in vmalloc as well as vfree; and Peter's fix to the last
> lot, which went into 2.6.38, doesn't protect against these ones.
> Here's what I now see when I swapon and swapoff:
Right. And we said from day one we had the HARD WIRED assumption that
arch_enter/leave_lazy_mmu_mode() was ALWAYS going to be called within
a PTE lock section, and we did get reassurance that it was going to
remain so.
So why is it ok for them to change those and break us like that ?
Seriously, this is going out of control. If we can't even rely on
fundamental locking assumptions in the VM to remain reasonably stable
or at least get some amount of -care- from who changes them as to
whether they break others and work with us to fix them, wtf ?
I don't know what the right way to fix that is. We have an absolute
requirement that the batching we start within a lazy MMU section
is complete and flushed before any other PTE in that section can be
touched by anything else. Do we -at least- keep that guarantee ?
If yes, then maybe preempt_disable/enable() around
arch_enter/leave_lazy_mmu_mode() in apply_to_pte_range() would do...
Or maybe I should just prevent any batching of init_mm :-(
Cheers,
Ben.
^ permalink raw reply
* PowerMac7,3 dvd drive?
From: kevin diggs @ 2011-03-20 23:52 UTC (permalink / raw)
To: linuxppc-dev
Hi,
I am seeing ... issues with the optical drive (hda) under 2.6.36. I
can't mount disks:
[root@PowerMacG5 ~]# mount -r /dev/hda /mnt/cdrom
mount: /dev/hda already mounted or /mnt/cdrom busy
The log has:
[ 239.922268] hda: irq timeout: status=0xd0 { Busy }
[ 239.922485] hda: possibly failed opcode: 0xa0
eject hda will hang ... longer than my patience.
At first I thought the drive was going south. But I don't see this (at
least so far) on 2.6.28.
Thanks!
kevin
^ permalink raw reply
* Re: powerpc/pci sysdata batch hangs G5 boot
From: Benjamin Herrenschmidt @ 2011-03-20 9:10 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev, Hugh Dickins
In-Reply-To: <AANLkTikMbMqSRpt9gCrHgzpJuRCGL7rfLAs6erJL0Qjc@mail.gmail.com>
On Sun, 2011-03-20 at 00:25 -0600, Grant Likely wrote:
> On Sat, Mar 19, 2011 at 9:41 PM, Hugh Dickins <hughd@google.com> wrote:
> > Hi Grant,
> >
> > I've been unable to boot mmotm on the G5 for a few weeks; and now that
> > the problem has reached Linus, I've bisected and it converges on your:
> >
> > commit b5d937de0367d26f65b9af1aef5f2c34c1939be0
> > powerpc/pci: Make both ppc32 and ppc64 use sysdata for pci_controller
>
> Hi Hugh,
>
> Thanks for the testing. I don't have access to a G5 unfortunately.
> Are you able to capture the good/bad console output and send it to me?
> A digital photo would be fine if you can't grab the raw text. Add
> #define DEBUG to the top of arch/powerpc/kernel/pci-common.c above the
> #includes too if you don't mind.
>
> I'm investigating on my end. I suspect that I've messed up retrieval
> of the hose pointer.
Hrm, you merged that already ? I would have liked to have a chance to at
least test and review properly...
Oh well, I have G5's here, I'll see if I can find what's wrong tomorrow.
Cheers,
Ben.
^ permalink raw reply
* Re: powerpc/pci sysdata batch hangs G5 boot
From: Grant Likely @ 2011-03-20 6:25 UTC (permalink / raw)
To: Hugh Dickins; +Cc: linuxppc-dev
In-Reply-To: <alpine.LSU.2.00.1103192023140.1592@sister.anvils>
On Sat, Mar 19, 2011 at 9:41 PM, Hugh Dickins <hughd@google.com> wrote:
> Hi Grant,
>
> I've been unable to boot mmotm on the G5 for a few weeks; and now that
> the problem has reached Linus, I've bisected and it converges on your:
>
> commit b5d937de0367d26f65b9af1aef5f2c34c1939be0
> =A0 =A0powerpc/pci: Make both ppc32 and ppc64 use sysdata for pci_control=
ler
Hi Hugh,
Thanks for the testing. I don't have access to a G5 unfortunately.
Are you able to capture the good/bad console output and send it to me?
A digital photo would be fine if you can't grab the raw text. Add
#define DEBUG to the top of arch/powerpc/kernel/pci-common.c above the
#includes too if you don't mind.
I'm investigating on my end. I suspect that I've messed up retrieval
of the hose pointer.
Thanks,
g.
^ permalink raw reply
* mmotm threatens ppc preemption again
From: Hugh Dickins @ 2011-03-20 4:11 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Jeremy Fitzhardinge, linuxppc-dev, Andrew Morton, Peter Zijlstra
Hi Ben,
As I warned a few weeks ago, Jeremy has vmalloc apply_to_pte_range
patches in mmotm, which again assault PowerPC's expectations, and
cause lots of noise with CONFIG_PREEMPT=y CONFIG_PREEMPT_DEBUG=y.
This time in vmalloc as well as vfree; and Peter's fix to the last
lot, which went into 2.6.38, doesn't protect against these ones.
Here's what I now see when I swapon and swapoff:
BUG: using smp_processor_id() in preemptible [00000000] code: swapon/3230
caller is .apply_to_pte_range+0x118/0x1f0
Call Trace:
[c000000029c3b870] [c00000000000f38c] .show_stack+0x6c/0x16c (unreliable)
[c000000029c3b920] [c00000000022e024] .debug_smp_processor_id+0xe4/0x11c
[c000000029c3b9b0] [c0000000000de78c] .apply_to_pte_range+0x118/0x1f0
[c000000029c3ba70] [c0000000000de988] .apply_to_pud_range+0x124/0x188
[c000000029c3bb40] [c0000000000dea90] .apply_to_page_range_batch+0xa4/0xe8
[c000000029c3bc00] [c0000000000eb2c0] .map_vm_area+0x50/0x94
[c000000029c3bca0] [c0000000000ec368] .__vmalloc_area_node+0x144/0x190
[c000000029c3bd50] [c0000000000f1738] .SyS_swapon+0x270/0x704
[c000000029c3be30] [c0000000000075a8] syscall_exit+0x0/0x40
BUG: using smp_processor_id() in preemptible [00000000] code: swapon/3230
caller is .apply_to_pte_range+0x168/0x1f0
Call Trace:
[c000000029c3b870] [c00000000000f38c] .show_stack+0x6c/0x16c (unreliable)
[c000000029c3b920] [c00000000022e024] .debug_smp_processor_id+0xe4/0x11c
[c000000029c3b9b0] [c0000000000de7dc] .apply_to_pte_range+0x168/0x1f0
[c000000029c3ba70] [c0000000000de988] .apply_to_pud_range+0x124/0x188
[c000000029c3bb40] [c0000000000dea90] .apply_to_page_range_batch+0xa4/0xe8
[c000000029c3bc00] [c0000000000eb2c0] .map_vm_area+0x50/0x94
[c000000029c3bca0] [c0000000000ec368] .__vmalloc_area_node+0x144/0x190
[c000000029c3bd50] [c0000000000f1738] .SyS_swapon+0x270/0x704
[c000000029c3be30] [c0000000000075a8] syscall_exit+0x0/0x40
Adding 1572860k swap on /dev/sdb4. Priority:-1 extents:1 across:1572860k SS
BUG: using smp_processor_id() in preemptible [00000000] code: swapoff/3231
caller is .apply_to_pte_range+0x118/0x1f0
Call Trace:
[c0000000260d38b0] [c00000000000f38c] .show_stack+0x6c/0x16c (unreliable)
[c0000000260d3960] [c00000000022e024] .debug_smp_processor_id+0xe4/0x11c
[c0000000260d39f0] [c0000000000de78c] .apply_to_pte_range+0x118/0x1f0
[c0000000260d3ab0] [c0000000000de988] .apply_to_pud_range+0x124/0x188
[c0000000260d3b80] [c0000000000dea90] .apply_to_page_range_batch+0xa4/0xe8
[c0000000260d3c40] [c0000000000eb0d8] .remove_vm_area+0x90/0xd4
[c0000000260d3cd0] [c0000000000ec0a8] .__vunmap+0x50/0x104
[c0000000260d3d60] [c0000000000f32fc] .SyS_swapoff+0x4d8/0x5e8
[c0000000260d3e30] [c0000000000075a8] syscall_exit+0x0/0x40
BUG: using smp_processor_id() in preemptible [00000000] code: swapoff/3231
caller is .apply_to_pte_range+0x168/0x1f0
Call Trace:
[c0000000260d38b0] [c00000000000f38c] .show_stack+0x6c/0x16c (unreliable)
[c0000000260d3960] [c00000000022e024] .debug_smp_processor_id+0xe4/0x11c
[c0000000260d39f0] [c0000000000de7dc] .apply_to_pte_range+0x168/0x1f0
[c0000000260d3ab0] [c0000000000de988] .apply_to_pud_range+0x124/0x188
[c0000000260d3b80] [c0000000000dea90] .apply_to_page_range_batch+0xa4/0xe8
[c0000000260d3c40] [c0000000000eb0d8] .remove_vm_area+0x90/0xd4
[c0000000260d3cd0] [c0000000000ec0a8] .__vunmap+0x50/0x104
[c0000000260d3d60] [c0000000000f32fc] .SyS_swapoff+0x4d8/0x5e8
[c0000000260d3e30] [c0000000000075a8] syscall_exit+0x0/0x40
BUG: using smp_processor_id() in preemptible [00000000] code: swapoff/3231
caller is .__flush_tlb_pending+0x20/0xb4
Call Trace:
[c0000000260d3830] [c00000000000f38c] .show_stack+0x6c/0x16c (unreliable)
[c0000000260d38e0] [c00000000022e024] .debug_smp_processor_id+0xe4/0x11c
[c0000000260d3970] [c00000000002efbc] .__flush_tlb_pending+0x20/0xb4
[c0000000260d39f0] [c0000000000de7fc] .apply_to_pte_range+0x188/0x1f0
[c0000000260d3ab0] [c0000000000de988] .apply_to_pud_range+0x124/0x188
[c0000000260d3b80] [c0000000000dea90] .apply_to_page_range_batch+0xa4/0xe8
[c0000000260d3c40] [c0000000000eb0d8] .remove_vm_area+0x90/0xd4
[c0000000260d3cd0] [c0000000000ec0a8] .__vunmap+0x50/0x104
[c0000000260d3d60] [c0000000000f32fc] .SyS_swapoff+0x4d8/0x5e8
[c0000000260d3e30] [c0000000000075a8] syscall_exit+0x0/0x40
BUG: using smp_processor_id() in preemptible [00000000] code: swapoff/3231
caller is .native_flush_hash_range+0x3c/0x384
Call Trace:
[c0000000260d36f0] [c00000000000f38c] .show_stack+0x6c/0x16c (unreliable)
[c0000000260d37a0] [c00000000022e024] .debug_smp_processor_id+0xe4/0x11c
[c0000000260d3830] [c00000000002e2c8] .native_flush_hash_range+0x3c/0x384
[c0000000260d38e0] [c00000000002c370] .flush_hash_range+0x4c/0xc8
[c0000000260d3970] [c00000000002f02c] .__flush_tlb_pending+0x90/0xb4
[c0000000260d39f0] [c0000000000de7fc] .apply_to_pte_range+0x188/0x1f0
[c0000000260d3ab0] [c0000000000de988] .apply_to_pud_range+0x124/0x188
[c0000000260d3b80] [c0000000000dea90] .apply_to_page_range_batch+0xa4/0xe8
[c0000000260d3c40] [c0000000000eb0d8] .remove_vm_area+0x90/0xd4
[c0000000260d3cd0] [c0000000000ec0a8] .__vunmap+0x50/0x104
[c0000000260d3d60] [c0000000000f32fc] .SyS_swapoff+0x4d8/0x5e8
[c0000000260d3e30] [c0000000000075a8] syscall_exit+0x0/0x40
I work around them with the patch below, but would prefer not to disable
preemption on all architectures there. Though I'm not a huge fan of
apply_to_pte_range myself (I feel it glosses over differences, such as
how often one needs to let preemption in): I wouldn't mind if we left
vmalloc as is without it.
Hugh
--- mmotm/mm/memory.c
+++ fixed/mm/memory.c
@@ -2021,9 +2021,11 @@ static int apply_to_pte_range(struct mm_
int err;
spinlock_t *uninitialized_var(ptl);
- pte = (mm == &init_mm) ?
- pte_alloc_kernel(pmd, addr) :
- pte_alloc_map_lock(mm, pmd, addr, &ptl);
+ if (mm == &init_mm) {
+ pte = pte_alloc_kernel(pmd, addr);
+ preempt_disable();
+ } else
+ pte = pte_alloc_map_lock(mm, pmd, addr, &ptl);
if (!pte)
return -ENOMEM;
@@ -2033,7 +2035,9 @@ static int apply_to_pte_range(struct mm_
err = fn(pte, (end - addr) / PAGE_SIZE, addr, data);
arch_leave_lazy_mmu_mode();
- if (mm != &init_mm)
+ if (mm == &init_mm)
+ preempt_enable();
+ else
pte_unmap_unlock(pte, ptl);
return err;
}
^ permalink raw reply
* powerpc/pci sysdata batch hangs G5 boot
From: Hugh Dickins @ 2011-03-20 3:41 UTC (permalink / raw)
To: Grant Likely; +Cc: linuxppc-dev
Hi Grant,
I've been unable to boot mmotm on the G5 for a few weeks; and now that
the problem has reached Linus, I've bisected and it converges on your:
commit b5d937de0367d26f65b9af1aef5f2c34c1939be0
powerpc/pci: Make both ppc32 and ppc64 use sysdata for pci_controller
Currently, ppc32 uses sysdata for the pci_controller pointer, and
ppc64 uses it to hold the device_node pointer. This patch moves the
of_node pointer into (struct pci_bus*)->dev.of_node and
(struct pci_dev*)->dev.of_node so that sysdata can be converted to always
use the pci_controller pointer instead. It also fixes up the
allocating of pci devices so that the of_node pointer gets assigned
consistently and increments the ref count.
The last message I see on screen when booting is
mpic: ISU size: 124, shift: 7, mask: 7f
Usually that would be followed by
mpic: Initializing for 124 sources
but with your commit it just hangs; revert that commit,
from mmotm or from Linus's current git, and all is fine.
Config available privately on request. Noticing that patch is a
PPC OF PCI thing, and that I have CONFIG_PPC_OF_PLATFORM_PCI off,
I did try switching that on, but it made no difference.
Thanks,
Hugh
^ permalink raw reply
* Re: [PATCH V12 0/4] ptp: IEEE 1588 hardware clock support
From: Richard Cochran @ 2011-03-19 10:14 UTC (permalink / raw)
To: linux-kernel
Cc: Thomas Gleixner, Rodolfo Giometti, Arnd Bergmann, Peter Zijlstra,
linux-api, devicetree-discuss, Russell King, Paul Mackerras,
John Stultz, linux-arm-kernel, netdev, Mike Frysinger,
Christoph Lameter, linuxppc-dev, David Miller, Alan Cox,
Krzysztof Halasa
In-Reply-To: <cover.1298878618.git.richard.cochran@omicron.at>
For all those interested in the user space aspect, I have posted some
patches to ptpd project showing how the API works.
https://sourceforge.net/tracker/?group_id=139814&atid=744634
3225599 [PATCH 1/3] Convert to POSIX clock API.
3225603 [PATCH 2/3] Adapted to use the Linux PTP Hardware Clock API.
3225607 [PATCH 3/3] Adapted to use the newer SO_TIMESTAMPING Linux API.
Enjoy,
Richard
^ permalink raw reply
* Re: [git pull] Please pull powerpc.git next branch
From: Hollis Blanchard @ 2011-03-18 23:48 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: meador_inge, linuxppc-dev list
In-Reply-To: <1300427072.22236.1277.camel@pasglop>
On Thu, Mar 17, 2011 at 10:44 PM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> Hi Linus !
>
> Here are the changes for this merge window for powerpc. One highlight
> is irq data conversion so we can get rid of the legacy stuff. The new
> Dynamic DMA windows for pSeries should also improve performances for
> some devices nicely on more recent machines/firmwares. Plus a little
> pack of embedded things.
Ben, you missed the patches from Meador:
http://patchwork.ozlabs.org/patch/86804/
http://patchwork.ozlabs.org/patch/86805/
http://patchwork.ozlabs.org/patch/86806/
Please commit.
-Hollis
^ permalink raw reply
* Re: [PATCH v2] gianfar: Fall back to software tcp/udp checksum on older controllers
From: David Miller @ 2011-03-18 22:15 UTC (permalink / raw)
To: oakad; +Cc: netdev, linux-kernel, linuxppc-dev, mlcreech
In-Reply-To: <598461.73809.qm@web37603.mail.mud.yahoo.com>
From: Alex Dubov <oakad@yahoo.com>
Date: Wed, 16 Mar 2011 20:57:13 -0700 (PDT)
> As specified by errata eTSEC49 of MPC8548 and errata eTSEC12 of MPC83xx,
> older revisions of gianfar controllers will be unable to calculate a TCP/UDP
> packet checksum for some alignments of the appropriate FCB. This patch checks
> for FCB alignment on such controllers and falls back to software checksumming
> if the alignment is known to be bad.
>
> Signed-off-by: Alex Dubov <oakad@yahoo.com>
Applied.
^ permalink raw reply
* Re: [git pull] Please pull powerpc.git next branch
From: Benjamin Herrenschmidt @ 2011-03-18 21:48 UTC (permalink / raw)
To: Linus Torvalds; +Cc: linuxppc-dev list, Andrew Morton, Linux Kernel list
In-Reply-To: <AANLkTinLb0sg1H6GDbZiddqGQ4a0=GRLYFJbL0G1Kv62@mail.gmail.com>
On Fri, 2011-03-18 at 06:34 -0700, Linus Torvalds wrote:
> > Here are the changes for this merge window for powerpc. One highlight
> > is irq data conversion so we can get rid of the legacy stuff. The new
> > Dynamic DMA windows for pSeries should also improve performances for
> > some devices nicely on more recent machines/firmwares. Plus a little
> > pack of embedded things.
>
> Ok, I got a conflict with the of_platform_driver() removal which
> looked pretty trivial, but since I don't have a ppc cross-compile
> thing I couldn't even test-compile the end result. Please take a look
> to see that it went ok..
Ok, I'll have a look later today.
Thanks,
Ben.
^ permalink raw reply
* RE: [PATCH -mm] RapidIO,powerpc/85xx: Fix configuration option
From: Bounine, Alexandre @ 2011-03-18 20:53 UTC (permalink / raw)
To: Kumar Gala; +Cc: linux-kernel, Thomas Moll, akpm, linuxppc-dev
In-Reply-To: <8E8332C6-1F17-4EC1-BD04-7B93D7B49640@kernel.crashing.org>
This patch has to be applied to -mm tree. Andrew already has set of
patches that change RapidIO configuration.
I think it will be better if it goes into -mm to keep things aligned
properly.
Alex.
-----Original Message-----
From: Kumar Gala [mailto:galak@kernel.crashing.org]=20
Sent: Friday, March 18, 2011 4:49 PM
To: Bounine, Alexandre
Cc: akpm@linux-foundation.org; linux-kernel@vger.kernel.org;
linuxppc-dev@lists.ozlabs.org; Matt Porter; Li Yang; Thomas Moll
Subject: Re: [PATCH -mm] RapidIO,powerpc/85xx: Fix configuration option
On Mar 18, 2011, at 12:18 PM, Alexandre Bounine wrote:
> Follows set of patches in -mm tree. Replaces configuration option
> missed in previous patches.
>=20
> Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
> ---
> arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Alex, I can push this via the powerpc.git tree route if you want.
- k
^ permalink raw reply
* Re: [PATCH -mm] RapidIO,powerpc/85xx: Fix configuration option
From: Kumar Gala @ 2011-03-18 20:49 UTC (permalink / raw)
To: Alexandre Bounine; +Cc: linux-kernel, Thomas Moll, akpm, linuxppc-dev
In-Reply-To: <1300468735-1158-1-git-send-email-alexandre.bounine@idt.com>
On Mar 18, 2011, at 12:18 PM, Alexandre Bounine wrote:
> Follows set of patches in -mm tree. Replaces configuration option
> missed in previous patches.
>
> Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
> ---
> arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
Acked-by: Kumar Gala <galak@kernel.crashing.org>
Alex, I can push this via the powerpc.git tree route if you want.
- k
^ permalink raw reply
* Re: [RFC][PATCH v3 10/22] mm, powerpc: add gfp flags variant of pud, pte, and pte allocations
From: Prasad Joshi @ 2011-03-18 19:57 UTC (permalink / raw)
To: benh, paulus, linuxppc-dev, linux-kernel, prasadjoshi124, mitra
In-Reply-To: <20110318195643.GJ4746@prasad-kvm>
changes for 32 bit architecture
- Added __pte_alloc_one_kernel() to allocated zeroed page using
allocation flag passed as an argument. If the slab allocator is not
initialized the allocation flag is not passed down the call hierarchy.
i.e. the call to early_get_page() is not modified.
- Changed pte_alloc_one_kernel() to call __pte_alloc_one_kernel() passing
correct gfp_t flags.
changes for 64 bit architecture
- Added __pud_alloc_one() which is similar to pud_alloc_one(). This newly
added function accepts allocation flag as a parameter and does the PUD
allocation using this GFP flag.
- The function pud_alloc_one() is changed to call __pud_alloc_one() passing
GFP_KERNEL | __GFP_REPEAT allocation flags.
- Similar changes for pmd (cache) and pte (page) allocations.
- The changes for both architectures help in fixing Bug 30702
Signed-off-by: Prasad Joshi <prasadjoshi124@gmail.com>
Signed-off-by: Anand Mitra <mitra@kqinfotech.com>
---
arch/powerpc/include/asm/pgalloc-32.h | 2 ++
arch/powerpc/include/asm/pgalloc-64.h | 27 ++++++++++++++++++++++-----
arch/powerpc/mm/pgtable_32.c | 10 ++++++++--
3 files changed, 32 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/include/asm/pgalloc-32.h b/arch/powerpc/include/asm/pgalloc-32.h
index 580cf73..21b7a94 100644
--- a/arch/powerpc/include/asm/pgalloc-32.h
+++ b/arch/powerpc/include/asm/pgalloc-32.h
@@ -35,6 +35,8 @@ extern void pgd_free(struct mm_struct *mm, pgd_t *pgd);
#endif
extern pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long addr);
+extern pte_t *__pte_alloc_one_kernel(struct mm_struct *, unsigned long, gfp_t);
+
extern pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long addr);
static inline void pgtable_free(void *table, unsigned index_size)
diff --git a/arch/powerpc/include/asm/pgalloc-64.h b/arch/powerpc/include/asm/pgalloc-64.h
index 292725c..e5ea650 100644
--- a/arch/powerpc/include/asm/pgalloc-64.h
+++ b/arch/powerpc/include/asm/pgalloc-64.h
@@ -51,10 +51,15 @@ static inline void pgd_free(struct mm_struct *mm, pgd_t *pgd)
#define pgd_populate(MM, PGD, PUD) pgd_set(PGD, PUD)
+static inline pud_t *
+__pud_alloc_one(struct mm_struct *mm, unsigned long addr, gfp_t gfp_mask)
+{
+ return kmem_cache_alloc(PGT_CACHE(PUD_INDEX_SIZE), gfp_mask);
+}
+
static inline pud_t *pud_alloc_one(struct mm_struct *mm, unsigned long addr)
{
- return kmem_cache_alloc(PGT_CACHE(PUD_INDEX_SIZE),
- GFP_KERNEL|__GFP_REPEAT);
+ return __pud_alloc_one(mm, addr, GFP_KERNEL | __GFP_REPEAT);
}
static inline void pud_free(struct mm_struct *mm, pud_t *pud)
@@ -89,10 +94,15 @@ static inline void pmd_populate_kernel(struct mm_struct *mm, pmd_t *pmd,
#endif /* CONFIG_PPC_64K_PAGES */
+static inline pmd_t *
+__pmd_alloc_one(struct mm_struct *mm, unsigned long addr, gfp_t gfp_mask)
+{
+ return kmem_cache_alloc(PGT_CACHE(PMD_INDEX_SIZE), gfp_mask);
+}
+
static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long addr)
{
- return kmem_cache_alloc(PGT_CACHE(PMD_INDEX_SIZE),
- GFP_KERNEL|__GFP_REPEAT);
+ return __pmd_alloc_one(mm, addr, GFP_KERNEL | __GFP_REPEAT);
}
static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
@@ -100,10 +110,17 @@ static inline void pmd_free(struct mm_struct *mm, pmd_t *pmd)
kmem_cache_free(PGT_CACHE(PMD_INDEX_SIZE), pmd);
}
+static inline pte_t *
+__pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address,
+ gfp_t gfp_mask)
+{
+ return (pte_t *)__get_free_page(gfp_mask | __GFP_ZERO);
+}
+
static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
unsigned long address)
{
- return (pte_t *)__get_free_page(GFP_KERNEL | __GFP_REPEAT | __GFP_ZERO);
+ return __pte_alloc_one_kernel(mm, address, GFP_KERNEL | __GFP_REPEAT);
}
static inline pgtable_t pte_alloc_one(struct mm_struct *mm,
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 8dc41c0..736593f 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -95,14 +95,15 @@ void pgd_free(struct mm_struct *mm, pgd_t *pgd)
#endif
}
-__init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
+__init_refok pte_t *
+__pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address, gfp_t gfp_mask)
{
pte_t *pte;
extern int mem_init_done;
extern void *early_get_page(void);
if (mem_init_done) {
- pte = (pte_t *)__get_free_page(GFP_KERNEL|__GFP_REPEAT|__GFP_ZERO);
+ pte = (pte_t *)__get_free_page(gfp_mask | __GFP_ZERO);
} else {
pte = (pte_t *)early_get_page();
if (pte)
@@ -111,6 +112,11 @@ __init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long add
return pte;
}
+__init_refok pte_t *pte_alloc_one_kernel(struct mm_struct *mm, unsigned long address)
+{
+ return __pte_alloc_one_kernel(mm, address, GFP_KERNEL | __GFP_REPEAT);
+}
+
pgtable_t pte_alloc_one(struct mm_struct *mm, unsigned long address)
{
struct page *ptepage;
--
1.7.0.4
^ permalink raw reply related
* [RFC][PATCH v3 00/22] __vmalloc: Propagating GFP allocation flag inside __vmalloc()
From: Prasad Joshi @ 2011-03-18 19:41 UTC (permalink / raw)
To: akpm, linux-arch, linux-kernel, linux-mm, prasadjoshi124, mitra
Cc: linux-mips, linux-ia64, linux-sh, heiko.carstens, dhowells,
liqin.chen, paulus, lennox.wu, jesper.nilsson, linux-am33-list,
linux, deller, x86, jejb, geert, sammy, fenghua.yu,
microblaze-uclinux, jdike, cmetcalf, starvik, schwidefsky,
linux-m68k, tony.luck, rth, chris, monstr, linux-m32r,
linux-cris-kernel, linux-parisc, ralf, hans-christian.egtvedt,
kyle, linux-alpha, tj, linux390, yasutake.koichi, linuxppc-dev,
takata
A filesystem might run into a problem while calling __vmalloc(GFP_NOFS)
inside a lock.
It is expected than __vmalloc when called with GFP_NOFS should not
callback the filesystem code even incase of the increased memory
pressure. But the problem is that even if we pass this flag, __vmalloc
itself allocates memory with GFP_KERNEL.
Using GFP_KERNEL allocations may go into the memory reclaim path and try
to free memory by calling file system evict_inode function. Which might
lead into deadlock.
For further details
http://marc.info/?l=linux-mm&m=128942194520631&w=4
https://bugzilla.kernel.org/show_bug.cgi?id=30702
The patch passes the gfp allocation flag all the way down to those
allocating functions.
arch/arm/include/asm/pgalloc.h | 11 +++++-
arch/avr32/include/asm/pgalloc.h | 8 ++++-
arch/cris/include/asm/pgalloc.h | 10 ++++-
arch/frv/include/asm/pgalloc.h | 3 ++
arch/frv/include/asm/pgtable.h | 1 +
arch/frv/mm/pgalloc.c | 9 ++++-
arch/ia64/include/asm/pgalloc.h | 24 +++++++++++--
arch/m32r/include/asm/pgalloc.h | 11 ++++--
arch/m68k/include/asm/motorola_pgalloc.h | 20 +++++++++--
arch/m68k/include/asm/sun3_pgalloc.h | 14 ++++++--
arch/m68k/mm/memory.c | 9 ++++-
arch/microblaze/include/asm/pgalloc.h | 3 ++
arch/microblaze/mm/pgtable.c | 13 +++++--
arch/mips/include/asm/pgalloc.h | 22 ++++++++----
arch/mn10300/include/asm/pgalloc.h | 2 +
arch/mn10300/mm/pgtable.c | 10 ++++-
arch/parisc/include/asm/pgalloc.h | 21 ++++++++---
arch/powerpc/include/asm/pgalloc-32.h | 2 +
arch/powerpc/include/asm/pgalloc-64.h | 27 +++++++++++---
arch/powerpc/mm/pgtable_32.c | 10 ++++-
arch/s390/include/asm/pgalloc.h | 30 +++++++++++++---
arch/s390/mm/pgtable.c | 22 +++++++++---
arch/score/include/asm/pgalloc.h | 13 ++++---
arch/sh/include/asm/pgalloc.h | 8 ++++-
arch/sh/mm/pgtable.c | 8 ++++-
arch/sparc/include/asm/pgalloc_32.h | 5 +++
arch/sparc/include/asm/pgalloc_64.h | 17 ++++++++-
arch/tile/include/asm/pgalloc.h | 13 ++++++-
arch/tile/mm/pgtable.c | 10 ++++-
arch/um/include/asm/pgalloc.h | 1 +
arch/um/kernel/mem.c | 21 ++++++++---
arch/x86/include/asm/pgalloc.h | 17 ++++++++-
arch/x86/mm/pgtable.c | 8 ++++-
arch/xtensa/include/asm/pgalloc.h | 9 ++++-
arch/xtensa/mm/pgtable.c | 11 +++++-
include/asm-generic/4level-fixup.h | 8 +++-
include/asm-generic/pgtable-nopmd.h | 3 +-
include/asm-generic/pgtable-nopud.h | 1 +
include/linux/mm.h | 40 ++++++++++++++++-----
mm/memory.c | 14 ++++---
mm/vmalloc.c | 57 ++++++++++++++++++++----------
41 files changed, 427 insertions(+), 119 deletions(-)
^ permalink raw reply
* Re: [PATCH 2/4] serial: Add initial support for TWR-MPC5125
From: Wolfram Sang @ 2011-03-18 17:29 UTC (permalink / raw)
To: Vladimir Ermakov; +Cc: linuxppc-dev
In-Reply-To: <20110318125641.GD2155@pengutronix.de>
[-- Attachment #1: Type: text/plain, Size: 688 bytes --]
On Fri, Mar 18, 2011 at 01:56:41PM +0100, Wolfram Sang wrote:
> On Thu, Mar 17, 2011 at 02:33:47AM +0300, Vladimir Ermakov wrote:
> > Adds PSC UART support for MPC5125 SoC.
>
> Please resend the patches and make use of scripts/get_maintainer.pl
I guess you noticed by now, just to make sure: This patch also prevents having
one kernel for mpc5121 and 5125. That should be handled before resubmitting.
The driver already has some register-abstractions, probably you can make use of
it again.
Regards,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 197 bytes --]
^ permalink raw reply
* [PATCH -mm] RapidIO,powerpc/85xx: Fix configuration option
From: Alexandre Bounine @ 2011-03-18 17:18 UTC (permalink / raw)
To: akpm, linux-kernel, linuxppc-dev; +Cc: Alexandre Bounine, Thomas Moll
Follows set of patches in -mm tree. Replaces configuration option
missed in previous patches.
Signed-off-by: Alexandre Bounine <alexandre.bounine@idt.com>
---
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 5c518ad..9136111 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -64,7 +64,7 @@ _GLOBAL(__setup_cpu_e500v2)
bl __e500_icache_setup
bl __e500_dcache_setup
bl __setup_e500_ivors
-#ifdef CONFIG_RAPIDIO
+#ifdef CONFIG_FSL_RIO
/* Ensure that RFXE is set */
mfspr r3,SPRN_HID1
oris r3,r3,HID1_RFXE@h
--
1.7.3.1
^ permalink raw reply related
* Re: any chance to use a modern linux kernel on Pegasos1 G3 ?
From: Gerhard Pircher @ 2011-03-18 16:11 UTC (permalink / raw)
To: nello martuscielli; +Cc: linuxppc-dev, acrux_it
-------- Original-Nachricht --------
> Datum: Thu, 17 Mar 2011 00:39:00 +0100
> Von: nello martuscielli <ppc.addon@gmail.com>
> An: Gerhard Pircher <gerhard_pircher@gmx.net>
> CC: acrux_it@libero.it, linuxppc-dev@lists.ozlabs.org
> Betreff: Re: any chance to use a modern linux kernel on Pegasos1 G3 ?
> hi all,
>
> here instead the log from serial debug console booting the last
> working kernel i.e. linux-2.16.62 compiled with arch=ppc .
>
>
> [...]
> do_load: dev="/ide/disk:0" dlen=11 args="CRUX root=/dev/hdb
> video=radeonfb:800x600" alen=41
> do_load: alstr=""
> try_load: dev="/ide/disk:0" dlen=11 args="CRUX root=/dev/hdb
> video=radeonfb:800x600" alen=41
> create_well_formed_chain: pkg=0xFD57D58 parent=0xFD53B90
> currpkg=0xFD53B90 inst=0xFE6EE50
> pkg=/pci@80000000 parent=/ currpkg=/ currinst=/
> create_well_formed_chain: pkg=0xFD53B90 parent=0x0 currpkg=0xFD53B90
> inst=0xFE6EE50
> pkg=/ parent= currpkg=/ currinst=/
> pkg=0xFD57D58:/pci@80000000 parent=0xFE6EE50:/
> inst=0xFE6EEA8:/pci@80000000 instparent=0xFE6EE50
> ata_disk_open: pkg=0xFD5B870 parent=0xFD5B2C8
> ata_disk_open: CTLR=0x0 ID=0x0
> ata_disk_open: args="0"
> deblocker open
> ata_disk_max_transfer: 512
> deblocker open: block-size=0x200 max-transfer=0x200
> deblocker open: return 0
> open-package: ret=0:no error r=-1
> ata_disk_open: $open-package deblocker ret=0
> ata_disk_open: deblocker=0xFE6EFC8
> disk-label open
> disk-label open: self=0xFE702B0 s->buf=0xFE71000
> disk-label open: return 0
> open-package: ret=0:no error r=-1
> ata_disk_open: $open-package disk-label ret=0
> ata_disk_open: disklabel=0xFE70258
> disk-label load: addr=0x400000 loadargs=CRUX root=/dev/hdb
> video=radeonfb:800x600 args=0,CRUX root=/dev/hdb
> video=radeonfb:800x600
> file_system: e=0xFD00008 disk=0xFE6EF58 loc=0x0 start=0x0
> path=0xFE703C0 buf=0xFE71000 size=512
> file_system: probing filesys dos-partition
>
> dos_partition: enter
> dos-partition: boot_sect_sig0/1=0x55.0xAA jump=0x0 boot_signature=0x0
> drive_number=0x0
> dos_partition: partition=0 size=0x32F8E start=0x3F typ=0x6
> flag=0x80 shd=0x1 ssect=0x1 scyl=0x0 ehd=0xFE esect=0x3F ecyl=0xC
> file_system: e=0xFD00008 disk=0xFE6EF58 loc=0x7E00 start=0x3F
> path=0xFE703C2 buf=0xFE71000 size=512
> file_system: probing filesys dos-partition
> file_system: probing filesys dos-fat
> file_system: return end (-4089)
> file_system: return end (-4089)
> disk-label return len=1782093 ret=end (-4089)
> ata_disk_close
> disk-label close:
> checking exec type Fcode
> fcode_is_exec: load=0x400000 loadlen=1782093
> checking exec type Forth
> checking exec type ELF
> f_go:
> checking exec type Fcode
> fcode_is_exec: load=0x400000 loadlen=1782093
> checking exec type Forth
> checking exec type ELF
> alloc_aligned: a 0xFD548E8 align 0xFD5491C size 0xFD54918 addr 0xFD54914
> alloc_constrained: min 0x0, max 0xFFFFFFFF, align 0x1000, mask
> 0xFFFFFFFF, size 0x7E0000, addr 0x300000
> alloc_constrained: acells 0x1 scells 0x1 t1 0xC t2 0xFD5490C u1
> 0xFD54910 u2 0xFD54914 u3 0xFD54918
> alloc_constrained: allocator_block 0xFD54930, next 0x0 addr 0x300000
> size 0xFD00000
> alloc_constrained: fsblock 0x0
> alloc_constrained: addr[] 0x300000
> alloc_constrained: bsize[] 0xFD00000
> alloc_constrained: passed min check
> alloc_constrained: addr 0x300000, align 0xFFF, off 0x69696969
> sum 0x0
> alloc_constrained: passed align check
> alloc_constrained: passed max check
> alloc_constrained: passed mask check
> alloc_constrained: passed full size check
> alloc_constrained: passed size check
>
>
> i'm not an expert but from a quick logs comparison I saw two times the
> alloc_aligned,alloc_constrained section instead in the working one i
> see it only one time.
> Maybe it's an usefull observation.
Well, I never put my hands on an OpenFirmware machine, but I could
imagine that this is an image loading problem.
Various PPC Linux related websites suggest to set a different load base
for the kernel image on Pegasos machines:
setenv load-base 0x4000000
Does that work on the Pegasos1?
BTW do you get any debug output from a recent kernel on serial port
(with udbg)?
regards,
Gerhard
--
NEU: FreePhone - kostenlos mobil telefonieren und surfen!
Jetzt informieren: http://www.gmx.net/de/go/freephone
^ permalink raw reply
* Re: [PATCH 1/1] SPI: dw_spi, fix PPC build
From: Grant Likely @ 2011-03-18 15:51 UTC (permalink / raw)
To: Jiri Slaby
Cc: dbrownell, jirislaby, linux-kernel, Paul Mackerras,
spi-devel-general, linuxppc-dev
In-Reply-To: <1300441277-23961-1-git-send-email-jslaby@suse.cz>
On Fri, Mar 18, 2011 at 10:41:17AM +0100, Jiri Slaby wrote:
> Currently, build on PPC dies with:
> In file included from drivers/spi/dw_spi_mmio.c:16:
> include/linux/spi/dw_spi.h:147: error: field ‘tx_sgl’ has incomplete type
> include/linux/spi/dw_spi.h:149: error: field ‘rx_sgl’ has incomplete type
>
> Add linux/scatterlist.h include to dw_spi.h, because we need to know
> the contents of the structure.
>
> Signed-off-by: Jiri Slaby <jslaby@suse.cz>
> Cc: David Brownell <dbrownell@users.sourceforge.net>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Paul Mackerras <paulus@samba.org>
Applied, thanks.
g.
> ---
> include/linux/spi/dw_spi.h | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/include/linux/spi/dw_spi.h b/include/linux/spi/dw_spi.h
> index 6cd10f6..fb0bce5 100644
> --- a/include/linux/spi/dw_spi.h
> +++ b/include/linux/spi/dw_spi.h
> @@ -2,6 +2,7 @@
> #define DW_SPI_HEADER_H
>
> #include <linux/io.h>
> +#include <linux/scatterlist.h>
>
> /* Bit fields in CTRLR0 */
> #define SPI_DFS_OFFSET 0
> --
> 1.7.4.1
>
>
^ permalink raw reply
* Re: [PATCH 1/4, v3] powerpc/mpc512x: Add initial support for TWR-MPC5125
From: vooon341 @ 2011-03-18 15:22 UTC (permalink / raw)
To: Wolfram Sang, linuxppc-dev, linux-kernel
In-Reply-To: <20110318123637.GB2155@pengutronix.de>
commit 3b94215206569d5c2bad20397cebfa9570c921bc
Author: Ermakov Vladimir <ermakov@tecon.ru>
Date: Thu Mar 17 11:10:49 2011 +0300
Adds Freescale TWR-MPC5125 device tree and platform code.
Currently following is supported:
- NAND
- FEC1 and FEC2
- RTC
- PSC UART
Signed-off-by: Vladimir Ermakov <vooon341@gmail.com>
---
v2:
- add PSC compat string selection
- add ioctl defines
v3:
- less verbose interrupt-parent
- move mpc512x_select_psc_compat() to mpc512x_shared.c
- remove unneded mpc5125_psc_iopad_init()
- fix board prefixes
diff --git a/arch/powerpc/boot/dts/mpc5125twr.dts
b/arch/powerpc/boot/dts/mpc5125twr.dts
new file mode 100644
index 0000000..d899f92
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc5125twr.dts
@@ -0,0 +1,368 @@
+/*
+ * STx/Freescale ADS5125 MPC5125 silicon
+ *
+ * Copyright (C) 2009 Freescale Semiconductor Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify i=
t
+ * under the terms of the GNU General Public License as published by th=
e
+ * Free Software Foundation; either version 2 of the License, or (at you=
r
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model =3D "mpc5125twr"; // In BSP "mpc5125ads"
+ compatible =3D "fsl,mpc5125ads";
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ interrupt-parent =3D <&ipic>;
+
+ cpus {
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+
+ PowerPC,5125@0 {
+ device_type =3D "cpu";
+ reg =3D <0>;
+ d-cache-line-size =3D <0x20>; // 32 bytes
+ i-cache-line-size =3D <0x20>; // 32 bytes
+ d-cache-size =3D <0x8000>; // L1, 32K
+ i-cache-size =3D <0x8000>; // L1, 32K
+ timebase-frequency =3D <49500000>;// 49.5 MHz (csb/4)
+ bus-frequency =3D <198000000>; // 198 MHz csb bus
+ clock-frequency =3D <396000000>; // 396 MHz ppc core
+ };
+ };
+
+ memory {
+ device_type =3D "memory";
+ reg =3D <0x00000000 0x10000000>; // 256MB at 0
+ };
+
+ sram@30000000 {
+ compatible =3D "fsl,mpc5121-sram";
+ reg =3D <0x30000000 0x08000>; // 32K at 0x30000000
+ };
+
+ nfc@40000000 {
+ compatible =3D "fsl,mpc5125-nfc";
+ reg =3D <0x40000000 0x100000>; // 1M at 0x40000000
+ interrupts =3D <6 0x8>;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ bank-width =3D <1>;
+ write-size =3D <4096>;
+ spare-size =3D <128>;
+ chips =3D <1>;
+ // NOTE: partition map different than in BSP
+ // First three is the same as in BSP, other differ.
+ nand-spl@0 {
+ label =3D "loader";
+ reg =3D <0x00000000 0x00100000>;
+ read-only;
+ };
+ uboot@100000 {
+ label =3D "uboot";
+ reg =3D <0x00100000 0x00100000>;
+ read-only;
+ };
+ uboot-env@200000 {
+ label =3D "uboot-env";
+ reg =3D <0x00200000 0x00100000>;
+ read-only;
+ };
+ kernel@300000 {
+ label =3D "kernel";
+ reg =3D <0x00300000 0x00800000>;
+ };
+ device-tree@b00000 {
+ label =3D "device-tree";
+ reg =3D <0x00b00000 0x00100000>;
+ };
+ ramboot-rootfs@c00000 {
+ label =3D "ramboot-rootfs";
+ reg =3D <0x00c00000 0x00800000>;
+ };
+ rootfs@1400000 {
+ label =3D "rootfs";
+ reg =3D <0x01400000 0x01400000>;
+ };
+ user@2800000 {
+ label =3D "user";
+ reg =3D <0x02800000 0x01400000>;
+ };
+ SRAM@4200000 {
+ label =3D "SRAM"; // NVRAM emul
+ reg =3D <0x04200000 0x01400000>;
+ };
+ prom@5600000 {
+ label =3D "prom";
+ reg =3D <0x05600000 0x01400000>;
+ };
+ //data@2800000 {
+ // label =3D "data";
+ // reg =3D <0x28000000 0xeac00000>;
+ //};
+ };
+
+ soc@80000000 {
+ compatible =3D "fsl,mpc5121-immr";
+ device_type =3D "soc";
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ #interrupt-cells =3D <2>;
+ ranges =3D <0x0 0x80000000 0x400000>;
+ reg =3D <0x80000000 0x400000>;
+ bus-frequency =3D <66000000>; // 66 MHz ips bus
+
+ // IPIC
+ // interrupts cell =3D <intr #, sense>
+ // sense values match linux IORESOURCE_IRQ_* defines:
+ // sense =3D=3D 8: Level, low assertion
+ // sense =3D=3D 2: Edge, high-to-low change
+ //
+ ipic: interrupt-controller@c00 {
+ compatible =3D "fsl,mpc5121-ipic", "fsl,ipic";
+ interrupt-controller;
+ #address-cells =3D <0>;
+ #interrupt-cells =3D <2>;
+ reg =3D <0xc00 0x100>;
+ };
+
+ rtc@a00 { // Real time clock
+ compatible =3D "fsl,mpc5121-rtc";
+ reg =3D <0xa00 0x100>;
+ interrupts =3D <79 0x8 80 0x8>;
+ };
+
+ reset@e00 { // Reset module
+ compatible =3D "fsl,mpc5121-reset";
+ reg =3D <0xe00 0x100>;
+ };
+
+ clock@f00 { // Clock control
+ compatible =3D "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
+ reg =3D <0xf00 0x100>;
+ };
+
+ pmc@1000{ // Power Management Controller
+ compatible =3D "fsl,mpc5121-pmc";
+ reg =3D <0x1000 0x100>;
+ interrupts =3D <83 0x2>;
+ };
+
+ gpio@1100 {
+ compatible =3D "fsl,mpc5125-gpio";
+ cell-index =3D <0>;
+ reg =3D <0x1100 0x080>;
+ interrupts =3D <78 0x8>;
+ };
+
+ gpio@1180 {
+ compatible =3D "fsl,mpc5125-gpio1";
+ cell-index =3D <1>;
+ reg =3D <0x1180 0x080>;
+ interrupts =3D <78 0x8>;
+ };
+
+ can@1300 { // CAN rev.2
+ compatible =3D "fsl,mpc5121-mscan";
+ cell-index =3D <0>;
+ interrupts =3D <12 0x8>;
+ reg =3D <0x1300 0x80>;
+ };
+
+ can@1380 {
+ compatible =3D "fsl,mpc5121-mscan";
+ cell-index =3D <1>;
+ interrupts =3D <13 0x8>;
+ reg =3D <0x1380 0x80>;
+ };
+
+ sdhc@1500 {
+ compatible =3D "fsl,mpc5125-sdhc";
+ interrupts =3D <8 0x8>;
+ reg =3D <0x1500 0x100>;
+ };
+
+ i2c@1700 {
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ compatible =3D "fsl-i2c";
+ cell-index =3D <0>;
+ reg =3D <0x1700 0x20>;
+ interrupts =3D <0x9 0x8>;
+ fsl5200-clocking;
+ };
+
+ i2c@1720 {
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ compatible =3D "fsl-i2c";
+ cell-index =3D <1>;
+ reg =3D <0x1720 0x20>;
+ interrupts =3D <0xa 0x8>;
+ fsl5200-clocking;
+ };
+
+ i2c@1740 {
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ compatible =3D "fsl-i2c";
+ cell-index =3D <2>;
+ reg =3D <0x1740 0x20>;
+ interrupts =3D <0xb 0x8>;
+ fsl5200-clocking;
+ };
+
+ i2ccontrol@1760 {
+ compatible =3D "fsl,mpc5121-i2c-ctrl";
+ reg =3D <0x1760 0x8>;
+ };
+
+ //diu@2100 {
+ // device_type =3D "display";
+ // compatible =3D "fsl-diu";
+ // reg =3D <0x2100 0x100>;
+ // interrupts =3D <64 0x8>;
+ //};
+
+ // MPC5125e has two more CAN ports
+ // but they are not used on ADS5125
+ //can@2300 {
+ // compatible =3D "fsl,mpc5121-mscan";
+ // cell-index =3D <2>;
+ // interrupts =3D <90 0x8>;
+ // reg =3D <0x2300 0x80>;
+ //};
+
+ //can@2380 {
+ // compatible =3D "fsl,mpc5121-mscan";
+ // cell-index =3D <3>;
+ // interrupts =3D <91 0x8>;
+ // reg =3D <0x2380 0x80>;
+ //};
+
+ mdio@2800 {
+ compatible =3D "fsl,mpc5121-fec-mdio";
+ reg =3D <0x2800 0x800>;
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ phy0: ethernet-phy@0 {
+ reg =3D <1>;
+ device_type =3D "ethernet-phy";
+ };
+ };
+
+ ethernet@2800 {
+ compatible =3D "fsl,mpc5121-fec";
+ reg =3D <0x2800 0x800>;
+ local-mac-address =3D [ 00 00 00 00 00 00 ];
+ interrupts =3D <4 0x8>;
+ phy-handle =3D < &phy0 >;
+ };
+
+ // USB ULPI1
+ //usb@3000 {
+ // device_type =3D "usb";
+ // compatible =3D "fsl-usb2-dr";
+ // reg =3D <0x3000 0x400>;
+ // #address-cells =3D <1>;
+ // #size-cells =3D <0>;
+ // interrupts =3D <43 0x8>;
+ // dr_mode =3D "host";
+ // phy_type =3D "ulpi";
+ // big-endian-regs;
+ //};
+
+ // USB ULPI2
+ //usb@4000 {
+ // device_type =3D "usb";
+ // compatible =3D "fsl-usb2-dr";
+ // reg =3D <0x4000 0x400>;
+ // #address-cells =3D <1>;
+ // #size-cells =3D <0>;
+ // interrupts =3D <44 0x8>;
+ // dr_mode =3D "otg";
+ // phy_type =3D "ulpi";
+ // big-endian-regs;
+ //};
+
+ mdio@4800 {
+ compatible =3D "fsl,mpc5121-fec-mdio";
+ reg =3D <0x4800 0x800>;
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ phy1: ethernet-phy@0 {
+ reg =3D <1>;
+ device_type =3D "ethernet-phy";
+ };
+ };
+
+ ethernet@4800 {
+ compatible =3D "fsl,mpc5121-fec";
+ reg =3D <0x4800 0x800>;
+ local-mac-address =3D [ 00 00 00 00 00 00 ];
+ interrupts =3D <5 0x8>;
+ phy-handle =3D < &phy1 >;
+ };
+
+ // IO control
+ ioctl@a000 {
+ compatible =3D "fsl,mpc5125-ioctl";
+ reg =3D <0xA000 0x1000>;
+ };
+
+ // PSC0 in ac97 mode
+ //ac97@11000 {
+ // device_type =3D "sound";
+ // compatible =3D "fsl,mpc5125-psc-ac97", "fsl,mpc5125-psc";
+ // cell-index =3D <0>;
+ // reg =3D <0x11000 0x100>;
+ // interrupts =3D <40 0x8>;
+ // fsl,mode =3D "ac97-slave";
+ // rx-fifo-size =3D <384>;
+ // tx-fifo-size =3D <384>;
+ //};
+
+ // 5125 PSCs are not 52xx or 5121 PSC compatible
+ // PSC1 uart0 aka ttyPSC0
+ serial@11100 {
+ device_type =3D "serial";
+ compatible =3D "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
+ port-number =3D <0>;
+ cell-index =3D <1>;
+ reg =3D <0x11100 0x100>;
+ interrupts =3D <40 0x8 71 0x8>;
+ fsl,rx-fifo-size =3D <16>;
+ fsl,tx-fifo-size =3D <16>;
+ nodcd;
+ };
+
+ // PSC9 uart1 aka ttyPSC1
+ serial@11900 {
+ device_type =3D "serial";
+ compatible =3D "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
+ port-number =3D <1>;
+ cell-index =3D <9>;
+ reg =3D <0x11900 0x100>;
+ interrupts =3D <40 0x8 32 0x8>;
+ fsl,rx-fifo-size =3D <16>;
+ fsl,tx-fifo-size =3D <16>;
+ nodcd;
+ };
+
+ pscfifo@11f00 {
+ compatible =3D "fsl,mpc5121-psc-fifo";
+ reg =3D <0x11f00 0x100>;
+ interrupts =3D <40 0x8>;
+ };
+
+ dma@14000 {
+ compatible =3D "fsl,mpc5121-dma"; // BSP name: "mpc512x-dma2"
+ reg =3D <0x14000 0x1800>;
+ interrupts =3D <65 0x8>;
+ };
+ };
+};
diff --git a/arch/powerpc/platforms/512x/Kconfig
b/arch/powerpc/platforms/512x/Kconfig
index 27b0651..0dde4b0 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -26,6 +26,20 @@ config MPC5121_GENERIC
Compatible boards include: Protonic LVT base boards (ZANMCU
and VICVT2).
+config PPC_MPC5125
+ bool "Generic support for MPC5125 based boards"
+ depends on PPC_MPC512x
+ select DEFAULT_UIMAGE
+ select PPC_INDIRECT_PCI
+ default n
+
+config MPC5125_TWR
+ bool "Freescale MPC5125 Tower system"
+ depends on PPC_MPC512x
+ select PPC_MPC5125
+ help
+ This option enables support for the MPC5125 TWR board.
+
config PDM360NG
bool "ifm PDM360NG board"
depends on PPC_MPC512x
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
index 4efc1c4..5c17561 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -5,3 +5,4 @@ obj-y +=3D clock.o mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) +=3D mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC5121_GENERIC) +=3D mpc5121_generic.o
obj-$(CONFIG_PDM360NG) +=3D pdm360ng.o
+obj-$(CONFIG_MPC5125_TWR) +=3D mpc5125_twr.o
diff --git a/arch/powerpc/platforms/512x/clock.c
b/arch/powerpc/platforms/512x/clock.c
index 3dc2a8d..07e0bc0 100644
--- a/arch/powerpc/platforms/512x/clock.c
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -27,6 +27,8 @@
#include <asm/mpc5xxx.h>
#include <asm/clk_interface.h>
+#include "mpc512x.h"
+
#undef CLK_DEBUG
static int clocks_initialized;
@@ -679,8 +681,13 @@ static void psc_clks_init(void)
struct device_node *np;
const u32 *cell_index;
struct platform_device *ofdev;
+ char *psc_compat;
+
+ psc_compat =3D mpc512x_select_psc_compat();
+ if (!psc_compat)
+ return;
- for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
+ for_each_compatible_node(np, NULL, psc_compat) {
cell_index =3D of_get_property(np, "cell-index", NULL);
if (cell_index) {
int pscnum =3D *cell_index;
diff --git a/arch/powerpc/platforms/512x/mpc5125_twr.c
b/arch/powerpc/platforms/512x/mpc5125_twr.c
new file mode 100644
index 0000000..7c7facf
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5125_twr.c
@@ -0,0 +1,142 @@
+/*
+ * Copyright (C) 2010 LimePC Multimedia Technologies Co., Limited
+ * Copyright (C) 2011 Vladimir Ermakov <vooon341@gmail.com>
+ *
+ * Based on original Freescale Semiconductor BSP
+ * written by Cloudy Chen <chen_yunsong@mtcera.com>
+ *
+ * MPC5125 Tower board setup
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+
+#include <sysdev/fsl_soc.h>
+
+#include <linux/bootmem.h>
+#include <asm/rheap.h>
+
+#include "mpc512x.h"
+
+/* IOCTL registers for USB1/FEC2 */
+#define IOCTL_USB1_DATA0 0x63
+#define IOCTL_USB1_DATA1 0x64
+#define IOCTL_USB1_DATA2 0x65
+#define IOCTL_USB1_DATA3 0x66
+#define IOCTL_USB1_DATA4 0x67
+#define IOCTL_USB1_DATA5 0x68
+#define IOCTL_USB1_DATA6 0x69
+#define IOCTL_USB1_DATA7 0x6A
+#define IOCTL_USB1_STOP 0x6B
+#define IOCTL_USB1_CLK 0x6C
+#define IOCTL_USB1_NEXT 0x6D
+#define IOCTL_USB1_DIR 0x6E
+
+/* Pin modes */
+#define IOCTL_DEFAULT_MODE 0x03 /* FUNCMUX=3D0, PUD=3D0, PUE=3D0, DS=3D3 *=
/
+#define IOCTL_FEC2_MODE 0x43 /* FUNCMUX=3D2, PUD=3D0, PUE=3D0, DS=3D3 */
+
+/* Select mode of USB1 pads.
+ * They could be configured as USB (default), FEC2
+ * and several PSC's and/or GPIO's.
+ * Board specific. It can be platform specific in the future.
+ */
+static void mpc5125_twr_fec2_usb_iopad_init(void __iomem *ioctl, int isusb=
)
+{
+ int i;
+ const u8 offset[12] =3D {
+ IOCTL_USB1_DATA0, IOCTL_USB1_DATA1,
+ IOCTL_USB1_DATA2, IOCTL_USB1_DATA3,
+ IOCTL_USB1_DATA4, IOCTL_USB1_DATA5,
+ IOCTL_USB1_DATA6, IOCTL_USB1_DATA7,
+ IOCTL_USB1_STOP, IOCTL_USB1_CLK,
+ IOCTL_USB1_NEXT, IOCTL_USB1_DIR
+ };
+ u8 mode;
+
+ mode =3D (isusb) ? IOCTL_DEFAULT_MODE : IOCTL_FEC2_MODE;
+ for (i =3D 0; i < ARRAY_SIZE(offset); i++)
+ out_8(ioctl + offset[i], mode);
+}
+
+static void __init mpc5125_twr_setup_arch(void)
+{
+ struct device_node *np;
+
+ printk(KERN_INFO "TWR-MPC5125 board from Freescale Semiconductor\n");
+
+ /*
+ * io pad config
+ */
+ np =3D of_find_compatible_node(NULL, NULL, "fsl,mpc5125-ioctl");
+ if (np) {
+ void __iomem *ioctl =3D of_iomap(np, 0);
+
+ mpc5125_twr_fec2_usb_iopad_init(ioctl, 0);
+
+ of_node_put(np);
+ iounmap(ioctl);
+ }
+}
+
+static struct of_device_id __initdata of_bus_ids[] =3D {
+ { .name =3D "soc", },
+ {},
+};
+
+static void __init mpc5125_twr_declare_of_platform_devices(void)
+{
+ struct device_node *np;
+
+ if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
+ printk(KERN_ERR __FILE__ ": "
+ "Error while probing of_platform bus\n");
+
+ np =3D of_find_compatible_node(NULL, NULL, "fsl,mpc5125-nfc");
+ if (np) {
+ of_platform_device_create(np, NULL, NULL);
+ of_node_put(np);
+ }
+}
+
+static void __init mpc5125_twr_init(void)
+{
+ mpc5125_twr_declare_of_platform_devices();
+ mpc5121_clk_init();
+ mpc512x_restart_init();
+ mpc512x_psc_fifo_init();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc5125_twr_probe(void)
+{
+ unsigned long root =3D of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,mpc5125ads");
+}
+
+define_machine(mpc5125_twr) {
+ .name =3D "TWR-MPC5125",
+ .probe =3D mpc5125_twr_probe,
+ .setup_arch =3D mpc5125_twr_setup_arch,
+ .init =3D mpc5125_twr_init,
+ .init_IRQ =3D mpc512x_init_IRQ,
+ .get_irq =3D ipic_get_irq,
+ .calibrate_decr =3D generic_calibrate_decr,
+ .restart =3D mpc512x_restart,
+};
diff --git a/arch/powerpc/platforms/512x/mpc512x.h
b/arch/powerpc/platforms/512x/mpc512x.h
index 1ab6d11..91c903f 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -13,8 +13,11 @@
#define __MPC512X_H__
extern void __init mpc512x_init_IRQ(void);
extern void __init mpc512x_init(void);
+extern void __init mpc512x_restart_init(void);
extern int __init mpc5121_clk_init(void);
-void __init mpc512x_declare_of_platform_devices(void);
+extern void __init mpc512x_declare_of_platform_devices(void);
+extern void __init mpc512x_psc_fifo_init(void);
+extern char *mpc512x_select_psc_compat(void);
extern void mpc512x_restart(char *cmd);
extern void mpc512x_init_diu(void);
extern void mpc512x_setup_diu(void);
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c
b/arch/powerpc/platforms/512x/mpc512x_shared.c
index e41ebbd..e79d8ae 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -32,7 +32,7 @@
static struct mpc512x_reset_module __iomem *reset_module_base;
-static void __init mpc512x_restart_init(void)
+void __init mpc512x_restart_init(void)
{
struct device_node *np;
@@ -382,6 +382,21 @@ void __init mpc512x_declare_of_platform_devices(void)
#define DEFAULT_FIFO_SIZE 16
+char *mpc512x_select_psc_compat(void)
+{
+ char *psc_compats[] =3D {
+ "fsl,mpc5121-psc",
+ "fsl,mpc5125-psc"
+ };
+ int i;
+
+ for (i =3D 0; i < ARRAY_SIZE(psc_compats); i++)
+ if (of_find_compatible_node(NULL, NULL, psc_compats[i]))
+ return psc_compats[i];
+
+ return NULL;
+}
+
static unsigned int __init get_fifo_size(struct device_node *np,
char *prop_name)
{
@@ -407,9 +422,16 @@ void __init mpc512x_psc_fifo_init(void)
void __iomem *psc;
unsigned int tx_fifo_size;
unsigned int rx_fifo_size;
+ char *psc_compat;
int fifobase =3D 0; /* current fifo address in 32 bit words */
- for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
+ psc_compat =3D mpc512x_select_psc_compat();
+ if (!psc_compat) {
+ pr_err("%s: no compatible devices found\n", __func__);
+ return;
+ }
+
+ for_each_compatible_node(np, NULL, psc_compat) {
tx_fifo_size =3D get_fifo_size(np, "fsl,tx-fifo-size");
rx_fifo_size =3D get_fifo_size(np, "fsl,rx-fifo-size");
2011/3/18 Wolfram Sang <w.sang@pengutronix.de>:
> On Fri, Mar 18, 2011 at 02:35:24PM +0300, vooon341@gmail.com wrote:
>
>> diff --git a/arch/powerpc/platforms/512x/clock.c
>> b/arch/powerpc/platforms/512x/clock.c
>> index 3dc2a8d..5cadf8e 100644
>> --- a/arch/powerpc/platforms/512x/clock.c
>> +++ b/arch/powerpc/platforms/512x/clock.c
>> @@ -606,6 +606,21 @@ static void rate_clks_init(void)
>> =C2=A0 */
>> =C2=A0struct clk dev_clks[2][32];
>>
>> +char *mpc512x_select_psc_compat(void)
>> +{
>> + =C2=A0 =C2=A0 char *psc_compats[] =3D {
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 "fsl,mpc5121-psc",
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 "fsl,mpc5125-psc"
>> + =C2=A0 =C2=A0 };
>> + =C2=A0 =C2=A0 int i;
>> +
>> + =C2=A0 =C2=A0 for (i =3D 0; i < ARRAY_SIZE(psc_compats); i++)
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (of_find_compatible_node(=
NULL, NULL, psc_compats[i]))
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
return psc_compats[i];
>> +
>> + =C2=A0 =C2=A0 return NULL;
>> +}
>
> Function looks good to me. Shouldn't that rather be in mpc512x_shared?
>
>> +// IOCTL registers for USB1/FEC2
>
> No c++-style comments, please (here and later).
>
>> +static void mpc5125_psc_iopad_init(void __iomem *ioctl, char *name)
>> +{
>> + =C2=A0 =C2=A0 struct device_node *np;
>> + =C2=A0 =C2=A0 const u32 *cell_index;
>> + =C2=A0 =C2=A0 char *default_psc =3D "fsl,mpc5125-psc";
>> + =C2=A0 =C2=A0 char *psc_name;
>> +
>> + =C2=A0 =C2=A0 if (name)
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 psc_name =3D name;
>> + =C2=A0 =C2=A0 else
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 psc_name =3D default_psc;
>
> Caller sets name to NULL. Is this really used?
>
>> +
>> + =C2=A0 =C2=A0 for_each_compatible_node(np, NULL, psc_name) {
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 cell_index =3D of_get_proper=
ty(np, "cell-index", NULL);
>
> I seem to recall 'cell-index' is deprecated. Grant?
>
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 if (cell_index) {
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
u8 __iomem *pscioctl;
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
int psc_num =3D *cell_index;
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
if (psc_num > 1)
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 =C2=A0 =C2=A0 continue;
>> +
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
pscioctl =3D ioctl + PSC_TO_IOCTL_OFFSET(psc_num);
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
out_8(pscioctl + IOCTL_PSCx_0, IOCTL_PSCx_0_MODE); // NOTE maybe wrong
>
> Why is it 'maybe wrong'? Can it be improved somehow?
>
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
out_8(pscioctl + IOCTL_PSCx_1, IOCTL_DEFAULT_MODE);
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
out_8(pscioctl + IOCTL_PSCx_2, IOCTL_DEFAULT_MODE);
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
out_8(pscioctl + IOCTL_PSCx_3, IOCTL_DEFAULT_MODE);
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
out_8(pscioctl + IOCTL_PSCx_4, IOCTL_DEFAULT_MODE);
>
> The defines make it much more readable, thanks.
>
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 }
>> + =C2=A0 =C2=A0 }
>> +}
>
> Is this function really board-specific or platform specific?
>
>
>> +static void mpc5125_fec2_usb_io_init(void __iomem *ioctl, int isusb)
>> +{
>> + =C2=A0 =C2=A0 int i;
>> + =C2=A0 =C2=A0 const u8 offset[12] =3D {
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 IOCTL_USB1_DATA0, IOCTL_USB1=
_DATA1,
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 IOCTL_USB1_DATA2, IOCTL_USB1=
_DATA3,
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 IOCTL_USB1_DATA4, IOCTL_USB1=
_DATA5,
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 IOCTL_USB1_DATA6, IOCTL_USB1=
_DATA7,
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 IOCTL_USB1_STOP, IOCTL_USB1_=
CLK,
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 IOCTL_USB1_NEXT, IOCTL_USB1_=
DIR
>> + =C2=A0 =C2=A0 };
>> + =C2=A0 =C2=A0 u8 mode;
>> +
>> + =C2=A0 =C2=A0 mode =3D (isusb) ? IOCTL_DEFAULT_MODE : IOCTL_FEC2_MODE;
>> + =C2=A0 =C2=A0 for (i =3D 0; i < ARRAY_SIZE(offset); i++)
>> + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 out_8(ioctl + offset[i], mod=
e);
>> +}
>
> Same question here and later. If it is board specific, the function name =
should
> have something like 'twr' in it; but a few things seem mpc5125-generic
> to me, if I am not mistaken?
>
> Regards,
>
> =C2=A0 Wolfram
>
> --
> Pengutronix e.K. =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | Wolfram Sang =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0|
> Industrial Linux Solutions =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 | http://www.pengutronix.de/ =C2=A0|
>
> -----BEGIN PGP SIGNATURE-----
> Version: GnuPG v1.4.10 (GNU/Linux)
>
> iEYEARECAAYFAk2DUdUACgkQD27XaX1/VRtRhwCfU5saH7ThSl1WsdlSseySqvbF
> BFEAoKskDlkkz53myb4FpvOBlMdAtUS1
> =3D554E
> -----END PGP SIGNATURE-----
>
>
^ permalink raw reply related
* i2c on P2020 based boards faulty prescale selection
From: Elie De Brauwer @ 2011-03-18 14:31 UTC (permalink / raw)
To: linuxppc-dev list
Hello list,
A whole bunch of dts file such a p2020ds.dts, p2020rdb.dts and probably
lots of other variants as well (haven't checked the manuals of the
others). Claim their i2c controller to be 'fsl-i2c'
If you then look in i2c/busses/i2c.mpc.c this will end up calling
mpc_i2c_setup_8xxx() in fsl_i2c_probe() with a prescale value of 0 which
goes to mpc_i2c_get_fdr_8xxx() here prescale gets set to one and the
divider value gets calculated.
The problem is that the P2020 datasheet mentions: "The serial bit clock
frequency of SCL is equal to one half the platform (CCB) clock divided
by the designated divider. Note that the frequency divider value can be
changed at any point in a program." Implying that the factor two is not
taken into account. For this to function correctly the prescale value
should be set to a value two.
Which could be solved by adding another mpc_i2c_data for this type or by
using the mpc_i2c_data_8543 which also has a prescaler value of two. Or
to define an alternative structure for the p2020 alike system. However
at this point I don't know how this varies between the different px0x0
systems since I have only a p2020 at my disposal. So I would appreciate
it if somebody with a broader view on this SoCs can up with a usable
solution.
This issue will only propagate if the dts sets the clock-frequency field
for the i2c controller in question is set.
gr
E.
--
Elie De Brauwer
^ permalink raw reply
* Re: [git pull] Please pull powerpc.git next branch
From: Linus Torvalds @ 2011-03-18 13:34 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev list, Andrew Morton, Linux Kernel list
In-Reply-To: <1300427072.22236.1277.camel@pasglop>
On Thu, Mar 17, 2011 at 10:44 PM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
>
> Here are the changes for this merge window for powerpc. One highlight
> is irq data conversion so we can get rid of the legacy stuff. The new
> Dynamic DMA windows for pSeries should also improve performances for
> some devices nicely on more recent machines/firmwares. Plus a little
> pack of embedded things.
Ok, I got a conflict with the of_platform_driver() removal which
looked pretty trivial, but since I don't have a ppc cross-compile
thing I couldn't even test-compile the end result. Please take a look
to see that it went ok..
Linus
^ permalink raw reply
* Re: [PATCH 2/4] serial: Add initial support for TWR-MPC5125
From: Wolfram Sang @ 2011-03-18 12:56 UTC (permalink / raw)
To: Vladimir Ermakov; +Cc: linuxppc-dev
In-Reply-To: <1300318427.12970.70.camel@desinto>
[-- Attachment #1: Type: text/plain, Size: 515 bytes --]
On Thu, Mar 17, 2011 at 02:33:47AM +0300, Vladimir Ermakov wrote:
> Adds PSC UART support for MPC5125 SoC.
Please resend the patches and make use of scripts/get_maintainer.pl
somehow. There are a lot of mailing lists and people missing in the CC.
If you haven't done yet, please also read
Documentation/SubmittingPatches.
Regards,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
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^ permalink raw reply
* Re: [PATCH 1/4] powerpc/mpc512x: Add initial support for TWR-MPC5125
From: Wolfram Sang @ 2011-03-18 12:36 UTC (permalink / raw)
To: vooon341@gmail.com; +Cc: linuxppc-dev
In-Reply-To: <AANLkTimy3Qu=KiPp8mhAiuL=GzqUHuNLTZ3cwmNKkrF7@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 3003 bytes --]
On Fri, Mar 18, 2011 at 02:35:24PM +0300, vooon341@gmail.com wrote:
> diff --git a/arch/powerpc/platforms/512x/clock.c
> b/arch/powerpc/platforms/512x/clock.c
> index 3dc2a8d..5cadf8e 100644
> --- a/arch/powerpc/platforms/512x/clock.c
> +++ b/arch/powerpc/platforms/512x/clock.c
> @@ -606,6 +606,21 @@ static void rate_clks_init(void)
> */
> struct clk dev_clks[2][32];
>
> +char *mpc512x_select_psc_compat(void)
> +{
> + char *psc_compats[] = {
> + "fsl,mpc5121-psc",
> + "fsl,mpc5125-psc"
> + };
> + int i;
> +
> + for (i = 0; i < ARRAY_SIZE(psc_compats); i++)
> + if (of_find_compatible_node(NULL, NULL, psc_compats[i]))
> + return psc_compats[i];
> +
> + return NULL;
> +}
Function looks good to me. Shouldn't that rather be in mpc512x_shared?
> +// IOCTL registers for USB1/FEC2
No c++-style comments, please (here and later).
> +static void mpc5125_psc_iopad_init(void __iomem *ioctl, char *name)
> +{
> + struct device_node *np;
> + const u32 *cell_index;
> + char *default_psc = "fsl,mpc5125-psc";
> + char *psc_name;
> +
> + if (name)
> + psc_name = name;
> + else
> + psc_name = default_psc;
Caller sets name to NULL. Is this really used?
> +
> + for_each_compatible_node(np, NULL, psc_name) {
> + cell_index = of_get_property(np, "cell-index", NULL);
I seem to recall 'cell-index' is deprecated. Grant?
> + if (cell_index) {
> + u8 __iomem *pscioctl;
> + int psc_num = *cell_index;
> + if (psc_num > 1)
> + continue;
> +
> + pscioctl = ioctl + PSC_TO_IOCTL_OFFSET(psc_num);
> + out_8(pscioctl + IOCTL_PSCx_0, IOCTL_PSCx_0_MODE); // NOTE maybe wrong
Why is it 'maybe wrong'? Can it be improved somehow?
> + out_8(pscioctl + IOCTL_PSCx_1, IOCTL_DEFAULT_MODE);
> + out_8(pscioctl + IOCTL_PSCx_2, IOCTL_DEFAULT_MODE);
> + out_8(pscioctl + IOCTL_PSCx_3, IOCTL_DEFAULT_MODE);
> + out_8(pscioctl + IOCTL_PSCx_4, IOCTL_DEFAULT_MODE);
The defines make it much more readable, thanks.
> + }
> + }
> +}
Is this function really board-specific or platform specific?
> +static void mpc5125_fec2_usb_io_init(void __iomem *ioctl, int isusb)
> +{
> + int i;
> + const u8 offset[12] = {
> + IOCTL_USB1_DATA0, IOCTL_USB1_DATA1,
> + IOCTL_USB1_DATA2, IOCTL_USB1_DATA3,
> + IOCTL_USB1_DATA4, IOCTL_USB1_DATA5,
> + IOCTL_USB1_DATA6, IOCTL_USB1_DATA7,
> + IOCTL_USB1_STOP, IOCTL_USB1_CLK,
> + IOCTL_USB1_NEXT, IOCTL_USB1_DIR
> + };
> + u8 mode;
> +
> + mode = (isusb) ? IOCTL_DEFAULT_MODE : IOCTL_FEC2_MODE;
> + for (i = 0; i < ARRAY_SIZE(offset); i++)
> + out_8(ioctl + offset[i], mode);
> +}
Same question here and later. If it is board specific, the function name should
have something like 'twr' in it; but a few things seem mpc5125-generic
to me, if I am not mistaken?
Regards,
Wolfram
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
[-- Attachment #2: Digital signature --]
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^ permalink raw reply
* Re: [PATCH 1/4] powerpc/mpc512x: Add initial support for TWR-MPC5125
From: vooon341 @ 2011-03-18 11:35 UTC (permalink / raw)
To: Wolfram Sang, linuxppc-dev
In-Reply-To: <20110317212542.GB29231@pengutronix.de>
Hi Wolfram.
I create function for select compat string and give name for registers.
commit fe8895542d537567f43f99af8234e7326451197e
Author: Ermakov Vladimir <ermakov@tecon.ru>
Date: Thu Mar 17 11:10:49 2011 +0300
Adds Freescale TWR-MPC5125 device tree and platform code.
Currently following is supported:
- NAND
- FEC1 and FEC2
- RTC
- PSC UART
Signed-off-by: Vladimir Ermakov <vooon341@gmail.com>
---
v2:
- add PSC compat string selection
- add ioctl defines
diff --git a/arch/powerpc/boot/dts/mpc5125twr.dts
b/arch/powerpc/boot/dts/mpc5125twr.dts
new file mode 100644
index 0000000..54f568f
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc5125twr.dts
@@ -0,0 +1,394 @@
+/*
+ * STx/Freescale ADS5125 MPC5125 silicon
+ *
+ * Copyright (C) 2009 Freescale Semiconductor Inc. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify i=
t
+ * under the terms of the GNU General Public License as published by th=
e
+ * Free Software Foundation; either version 2 of the License, or (at you=
r
+ * option) any later version.
+ */
+
+/dts-v1/;
+
+/ {
+ model =3D "mpc5125ads";
+ compatible =3D "fsl,mpc5125ads";
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+
+ cpus {
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+
+ PowerPC,5125@0 {
+ device_type =3D "cpu";
+ reg =3D <0>;
+ d-cache-line-size =3D <0x20>; // 32 bytes
+ i-cache-line-size =3D <0x20>; // 32 bytes
+ d-cache-size =3D <0x8000>; // L1, 32K
+ i-cache-size =3D <0x8000>; // L1, 32K
+ timebase-frequency =3D <49500000>;// 49.5 MHz (csb/4)
+ bus-frequency =3D <198000000>; // 198 MHz csb bus
+ clock-frequency =3D <396000000>; // 396 MHz ppc core
+ };
+ };
+
+ memory {
+ device_type =3D "memory";
+ reg =3D <0x00000000 0x10000000>; // 256MB at 0
+ };
+
+ sram@30000000 {
+ compatible =3D "fsl,mpc5121-sram";
+ reg =3D <0x30000000 0x08000>; // 32K at 0x30000000
+ };
+
+ nfc@40000000 {
+ compatible =3D "fsl,mpc5125-nfc";
+ reg =3D <0x40000000 0x100000>; // 1M at 0x40000000
+ interrupts =3D <6 0x8>;
+ interrupt-parent =3D < &ipic >;
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ bank-width =3D <1>;
+ write-size =3D <4096>;
+ spare-size =3D <128>;
+ chips =3D <1>;
+ // NOTE: partition map different than in BSP
+ nand-spl@0 {
+ label =3D "loader";
+ reg =3D <0x00000000 0x00100000>;
+ read-only;
+ };
+ uboot@100000 {
+ label =3D "uboot";
+ reg =3D <0x00100000 0x00100000>;
+ read-only;
+ };
+ uboot-env@200000 {
+ label =3D "uboot-env";
+ reg =3D <0x00200000 0x00100000>;
+ read-only;
+ };
+ kernel300000 {
+ label =3D "kernel";
+ reg =3D <0x00300000 0x00800000>;
+ };
+ device-tree00000 {
+ label =3D "device-tree";
+ reg =3D <0x00b00000 0x00100000>;
+ };
+ ramboot-rootfs@c00000 {
+ label =3D "ramboot-rootfs";
+ reg =3D <0x00c00000 0x00800000>;
+ };
+ rootfs@1400000 {
+ label =3D "rootfs";
+ reg =3D <0x01400000 0x01400000>;
+ };
+ user@2800000 {
+ label =3D "user";
+ reg =3D <0x02800000 0x01400000>;
+ };
+ SRAM@4200000 {
+ label =3D "SRAM"; // NVRAM emul
+ reg =3D <0x04200000 0x01400000>;
+ };
+ prom@5600000 {
+ label =3D "prom";
+ reg =3D <0x05600000 0x01400000>;
+ };
+ //data@2800000 {
+ // label =3D "data";
+ // reg =3D <0x28000000 0xeac00000>;
+ //};
+ };
+
+ soc@80000000 {
+ compatible =3D "fsl,mpc5121-immr";
+ device_type =3D "soc";
+ #address-cells =3D <1>;
+ #size-cells =3D <1>;
+ #interrupt-cells =3D <2>;
+ ranges =3D <0x0 0x80000000 0x400000>;
+ reg =3D <0x80000000 0x400000>;
+ bus-frequency =3D <66000000>; // 66 MHz ips bus
+
+
+ // IPIC
+ // interrupts cell =3D <intr #, sense>
+ // sense values match linux IORESOURCE_IRQ_* defines:
+ // sense =3D=3D 8: Level, low assertion
+ // sense =3D=3D 2: Edge, high-to-low change
+ //
+ ipic: interrupt-controller@c00 {
+ compatible =3D "fsl,mpc5121-ipic", "fsl,ipic";
+ interrupt-controller;
+ #address-cells =3D <0>;
+ #interrupt-cells =3D <2>;
+ reg =3D <0xc00 0x100>;
+ };
+
+ rtc@a00 { // Real time clock
+ compatible =3D "fsl,mpc5121-rtc";
+ reg =3D <0xa00 0x100>;
+ interrupts =3D <79 0x8 80 0x8>;
+ interrupt-parent =3D < &ipic >;
+ };
+
+ reset@e00 { // Reset module
+ compatible =3D "fsl,mpc5121-reset";
+ reg =3D <0xe00 0x100>;
+ };
+
+ clock@f00 { // Clock control
+ compatible =3D "fsl,mpc5121rev2-clock", "fsl,mpc5121-clock";
+ reg =3D <0xf00 0x100>;
+ };
+
+ pmc@1000{ // Power Management Controller
+ compatible =3D "fsl,mpc5121-pmc";
+ reg =3D <0x1000 0x100>;
+ interrupts =3D <83 0x2>;
+ interrupt-parent =3D < &ipic >;
+ };
+
+ gpio@1100 {
+ compatible =3D "fsl,mpc5125-gpio";
+ cell-index =3D <0>;
+ reg =3D <0x1100 0x080>;
+ interrupts =3D <78 0x8>;
+ interrupt-parent =3D < &ipic >;
+ };
+
+ gpio@1180 {
+ compatible =3D "fsl,mpc5125-gpio1";
+ cell-index =3D <1>;
+ reg =3D <0x1180 0x080>;
+ interrupts =3D <78 0x8>;
+ interrupt-parent =3D < &ipic >;
+ };
+
+ can@1300 { // CAN rev.2
+ compatible =3D "fsl,mpc5121-mscan";
+ cell-index =3D <0>;
+ interrupts =3D <12 0x8>;
+ interrupt-parent =3D < &ipic >;
+ reg =3D <0x1300 0x80>;
+ };
+
+ can@1380 {
+ compatible =3D "fsl,mpc5121-mscan";
+ cell-index =3D <1>;
+ interrupts =3D <13 0x8>;
+ interrupt-parent =3D < &ipic >;
+ reg =3D <0x1380 0x80>;
+ };
+
+ sdhc@1500 {
+ compatible =3D "fsl,mpc5125-sdhc";
+ interrupts =3D <8 0x8>;
+ interrupt-parent =3D < &ipic >;
+ reg =3D <0x1500 0x100>;
+ };
+
+ i2c@1700 {
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ compatible =3D "fsl-i2c";
+ cell-index =3D <0>;
+ reg =3D <0x1700 0x20>;
+ interrupts =3D <0x9 0x8>;
+ interrupt-parent =3D < &ipic >;
+ fsl5200-clocking;
+ };
+
+ i2c@1720 {
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ compatible =3D "fsl-i2c";
+ cell-index =3D <1>;
+ reg =3D <0x1720 0x20>;
+ interrupts =3D <0xa 0x8>;
+ interrupt-parent =3D < &ipic >;
+ fsl5200-clocking;
+ };
+
+ i2c@1740 {
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ compatible =3D "fsl-i2c";
+ cell-index =3D <2>;
+ reg =3D <0x1740 0x20>;
+ interrupts =3D <0xb 0x8>;
+ interrupt-parent =3D < &ipic >;
+ fsl5200-clocking;
+ };
+
+ i2ccontrol@1760 {
+ compatible =3D "fsl,mpc5121-i2c-ctrl";
+ reg =3D <0x1760 0x8>;
+ };
+
+ //diu@2100 {
+ // device_type =3D "display";
+ // compatible =3D "fsl-diu";
+ // reg =3D <0x2100 0x100>;
+ // interrupts =3D <64 0x8>;
+ // interrupt-parent =3D < &ipic >;
+ //};
+
+ // MPC5125e has two more CAN ports
+ // but they are not used on ADS5125
+ //can@2300 {
+ // compatible =3D "fsl,mpc5121-mscan";
+ // cell-index =3D <2>;
+ // interrupts =3D <90 0x8>;
+ // interrupt-parent =3D < &ipic >;
+ // reg =3D <0x2300 0x80>;
+ //};
+
+ //can@2380 {
+ // compatible =3D "fsl,mpc5121-mscan";
+ // cell-index =3D <3>;
+ // interrupts =3D <91 0x8>;
+ // interrupt-parent =3D < &ipic >;
+ // reg =3D <0x2380 0x80>;
+ //};
+
+ mdio@2800 {
+ device_type =3D "mdio";
+ compatible =3D "fsl,mpc5121-fec-mdio";
+ reg =3D <0x2800 0x800>;
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ phy0: ethernet-phy@0 {
+ reg =3D <1>;
+ device_type =3D "ethernet-phy";
+ };
+ };
+
+ ethernet@2800 {
+ device_type =3D "network";
+ compatible =3D "fsl,mpc5121-fec";
+ reg =3D <0x2800 0x800>;
+ local-mac-address =3D [ 00 00 00 00 00 00 ];
+ interrupts =3D <4 0x8>;
+ interrupt-parent =3D < &ipic >;
+ phy-handle =3D < &phy0 >;
+ };
+
+ // USB ULPI1
+ //usb@3000 {
+ // device_type =3D "usb";
+ // compatible =3D "fsl-usb2-dr";
+ // reg =3D <0x3000 0x400>;
+ // #address-cells =3D <1>;
+ // #size-cells =3D <0>;
+ // interrupt-parent =3D < &ipic >;
+ // interrupts =3D <43 0x8>;
+ // dr_mode =3D "host";
+ // phy_type =3D "ulpi";
+ // big-endian-regs;
+ //};
+
+ // USB ULPI2
+ //usb@4000 {
+ // device_type =3D "usb";
+ // compatible =3D "fsl-usb2-dr";
+ // reg =3D <0x4000 0x400>;
+ // #address-cells =3D <1>;
+ // #size-cells =3D <0>;
+ // interrupt-parent =3D < &ipic >;
+ // interrupts =3D <44 0x8>;
+ // dr_mode =3D "otg";
+ // phy_type =3D "ulpi";
+ // big-endian-regs;
+ //};
+
+ mdio@4800 {
+ device_type =3D "mdio";
+ compatible =3D "fsl,mpc5121-fec-mdio";
+ reg =3D <0x4800 0x800>;
+ #address-cells =3D <1>;
+ #size-cells =3D <0>;
+ phy1: ethernet-phy@0 {
+ reg =3D <1>;
+ device_type =3D "ethernet-phy";
+ };
+ };
+
+ ethernet@4800 {
+ device_type =3D "network";
+ compatible =3D "fsl,mpc5121-fec";
+ reg =3D <0x4800 0x800>;
+ local-mac-address =3D [ 00 00 00 00 00 00 ];
+ interrupts =3D <5 0x8>;
+ interrupt-parent =3D < &ipic >;
+ phy-handle =3D < &phy1 >;
+ };
+
+ // IO control
+ ioctl@a000 {
+ compatible =3D "fsl,mpc5125-ioctl";
+ reg =3D <0xA000 0x1000>;
+ };
+
+ // PSC0 in ac97 mode
+ //ac97@11000 {
+ // device_type =3D "sound";
+ // compatible =3D "fsl,mpc5125-psc-ac97", "fsl,mpc5125-psc";
+ // cell-index =3D <0>;
+ // reg =3D <0x11000 0x100>;
+ // interrupts =3D <40 0x8>;
+ // interrupt-parent =3D < &ipic >;
+ // fsl,mode =3D "ac97-slave";
+ // rx-fifo-size =3D <384>;
+ // tx-fifo-size =3D <384>;
+ //};
+
+ // 5125 PSCs are not 52xx or 5121 PSC compatible
+ // PSC1 uart0 aka ttyPSC0
+ serial@11100 {
+ device_type =3D "serial";
+ compatible =3D "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
+ port-number =3D <0>;
+ cell-index =3D <1>;
+ reg =3D <0x11100 0x100>;
+ interrupts =3D <40 0x8 71 0x8>;
+ interrupt-parent =3D < &ipic >;
+ fsl,rx-fifo-size =3D <16>;
+ fsl,tx-fifo-size =3D <16>;
+ nodcd;
+ };
+
+ // PSC9 uart1 aka ttyPSC1
+ serial@11900 {
+ device_type =3D "serial";
+ compatible =3D "fsl,mpc5125-psc-uart", "fsl,mpc5125-psc";
+ port-number =3D <1>;
+ cell-index =3D <9>;
+ reg =3D <0x11900 0x100>;
+ interrupts =3D <40 0x8 32 0x8>;
+ interrupt-parent =3D < &ipic >;
+ fsl,rx-fifo-size =3D <16>;
+ fsl,tx-fifo-size =3D <16>;
+ nodcd;
+ };
+
+ pscfifo@11f00 {
+ compatible =3D "fsl,mpc5121-psc-fifo";
+ reg =3D <0x11f00 0x100>;
+ interrupts =3D <40 0x8>;
+ interrupt-parent =3D < &ipic >;
+ };
+
+ dma@14000 {
+ compatible =3D "fsl,mpc5121-dma"; // old name: "mpc512x-dma2"
+ reg =3D <0x14000 0x1800>;
+ interrupts =3D <65 0x8>;
+ interrupt-parent =3D < &ipic >;
+ };
+ };
+};
diff --git a/arch/powerpc/platforms/512x/Kconfig
b/arch/powerpc/platforms/512x/Kconfig
index 27b0651..0dde4b0 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -26,6 +26,20 @@ config MPC5121_GENERIC
Compatible boards include: Protonic LVT base boards (ZANMCU
and VICVT2).
+config PPC_MPC5125
+ bool "Generic support for MPC5125 based boards"
+ depends on PPC_MPC512x
+ select DEFAULT_UIMAGE
+ select PPC_INDIRECT_PCI
+ default n
+
+config MPC5125_TWR
+ bool "Freescale MPC5125 Tower system"
+ depends on PPC_MPC512x
+ select PPC_MPC5125
+ help
+ This option enables support for the MPC5125 TWR board.
+
config PDM360NG
bool "ifm PDM360NG board"
depends on PPC_MPC512x
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
index 4efc1c4..5c17561 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -5,3 +5,4 @@ obj-y +=3D clock.o mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) +=3D mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC5121_GENERIC) +=3D mpc5121_generic.o
obj-$(CONFIG_PDM360NG) +=3D pdm360ng.o
+obj-$(CONFIG_MPC5125_TWR) +=3D mpc5125_twr.o
diff --git a/arch/powerpc/platforms/512x/clock.c
b/arch/powerpc/platforms/512x/clock.c
index 3dc2a8d..5cadf8e 100644
--- a/arch/powerpc/platforms/512x/clock.c
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -606,6 +606,21 @@ static void rate_clks_init(void)
*/
struct clk dev_clks[2][32];
+char *mpc512x_select_psc_compat(void)
+{
+ char *psc_compats[] =3D {
+ "fsl,mpc5121-psc",
+ "fsl,mpc5125-psc"
+ };
+ int i;
+
+ for (i =3D 0; i < ARRAY_SIZE(psc_compats); i++)
+ if (of_find_compatible_node(NULL, NULL, psc_compats[i]))
+ return psc_compats[i];
+
+ return NULL;
+}
+
/*
* Given a psc number return the dev_clk
* associated with it
@@ -679,8 +694,13 @@ static void psc_clks_init(void)
struct device_node *np;
const u32 *cell_index;
struct platform_device *ofdev;
+ char *psc_compat;
+
+ psc_compat =3D mpc512x_select_psc_compat();
+ if (!psc_compat)
+ return;
- for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
+ for_each_compatible_node(np, NULL, psc_compat) {
cell_index =3D of_get_property(np, "cell-index", NULL);
if (cell_index) {
int pscnum =3D *cell_index;
diff --git a/arch/powerpc/platforms/512x/mpc5125_twr.c
b/arch/powerpc/platforms/512x/mpc5125_twr.c
new file mode 100644
index 0000000..b4f931f
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5125_twr.c
@@ -0,0 +1,182 @@
+/*
+ * Copyright (C) 2010 LimePC Multimedia Technologies Co., Limited
+ * Copyright (C) 2011 Vladimir Ermakov <vooon341@gmail.com>
+ *
+ * Based on original Freescale Semiconductor BSP
+ * written by Cloudy Chen <chen_yunsong@mtcera.com>
+ *
+ * MPC5125 Tower board setup
+ *
+ * This is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/of_platform.h>
+
+#include <asm/machdep.h>
+#include <asm/ipic.h>
+#include <asm/prom.h>
+#include <asm/time.h>
+
+#include <sysdev/fsl_soc.h>
+
+#include <linux/bootmem.h>
+#include <asm/rheap.h>
+
+#include "mpc512x.h"
+
+// IOCTL registers for USB1/FEC2
+#define IOCTL_USB1_DATA0 0x63
+#define IOCTL_USB1_DATA1 0x64
+#define IOCTL_USB1_DATA2 0x65
+#define IOCTL_USB1_DATA3 0x66
+#define IOCTL_USB1_DATA4 0x67
+#define IOCTL_USB1_DATA5 0x68
+#define IOCTL_USB1_DATA6 0x69
+#define IOCTL_USB1_DATA7 0x6A
+#define IOCTL_USB1_STOP 0x6B
+#define IOCTL_USB1_CLK 0x6C
+#define IOCTL_USB1_NEXT 0x6D
+#define IOCTL_USB1_DIR 0x6E
+
+// IOCTL for PSCx
+#define PSC_TO_IOCTL_OFFSET(psc) (0x76 + 5 * psc)
+#define IOCTL_PSCx_0 0
+#define IOCTL_PSCx_1 1
+#define IOCTL_PSCx_2 2
+#define IOCTL_PSCx_3 3
+#define IOCTL_PSCx_4 4
+
+// MODES
+#define IOCTL_DEFAULT_MODE 0x03 // FUNCMUX=3D0, PUD=3D0, PUE=3D0, DS=3D3
+#define IOCTL_FEC2_MODE 0x43 // FUNCMUX=3D2, PUD=3D0, PUE=3D0, DS=3D3
+#define IOCTL_PSCx_0_MODE 0x07 // FUNCMUX=3D0, PUD=3D0, PUE=3D0, ST=3D1, D=
S=3D3
+
+static void mpc5125_psc_iopad_init(void __iomem *ioctl, char *name)
+{
+ struct device_node *np;
+ const u32 *cell_index;
+ char *default_psc =3D "fsl,mpc5125-psc";
+ char *psc_name;
+
+ if (name)
+ psc_name =3D name;
+ else
+ psc_name =3D default_psc;
+
+ for_each_compatible_node(np, NULL, psc_name) {
+ cell_index =3D of_get_property(np, "cell-index", NULL);
+ if (cell_index) {
+ u8 __iomem *pscioctl;
+ int psc_num =3D *cell_index;
+ if (psc_num > 1)
+ continue;
+
+ pscioctl =3D ioctl + PSC_TO_IOCTL_OFFSET(psc_num);
+ out_8(pscioctl + IOCTL_PSCx_0, IOCTL_PSCx_0_MODE); // NOTE maybe wrong
+ out_8(pscioctl + IOCTL_PSCx_1, IOCTL_DEFAULT_MODE);
+ out_8(pscioctl + IOCTL_PSCx_2, IOCTL_DEFAULT_MODE);
+ out_8(pscioctl + IOCTL_PSCx_3, IOCTL_DEFAULT_MODE);
+ out_8(pscioctl + IOCTL_PSCx_4, IOCTL_DEFAULT_MODE);
+ }
+ }
+}
+
+static void mpc5125_fec2_usb_io_init(void __iomem *ioctl, int isusb)
+{
+ int i;
+ const u8 offset[12] =3D {
+ IOCTL_USB1_DATA0, IOCTL_USB1_DATA1,
+ IOCTL_USB1_DATA2, IOCTL_USB1_DATA3,
+ IOCTL_USB1_DATA4, IOCTL_USB1_DATA5,
+ IOCTL_USB1_DATA6, IOCTL_USB1_DATA7,
+ IOCTL_USB1_STOP, IOCTL_USB1_CLK,
+ IOCTL_USB1_NEXT, IOCTL_USB1_DIR
+ };
+ u8 mode;
+
+ mode =3D (isusb) ? IOCTL_DEFAULT_MODE : IOCTL_FEC2_MODE;
+ for (i =3D 0; i < ARRAY_SIZE(offset); i++)
+ out_8(ioctl + offset[i], mode);
+}
+
+static void __init mpc5125_board_setup(void)
+{
+ struct device_node *np;
+
+ /*
+ * io pad config
+ */
+ np =3D of_find_compatible_node(NULL, NULL, "fsl,mpc5125-ioctl");
+ if (np) {
+ void __iomem *ioctl =3D of_iomap(np, 0);
+
+ mpc5125_psc_iopad_init(ioctl, NULL);
+ mpc5125_fec2_usb_io_init(ioctl, 0);
+
+ of_node_put(np);
+ iounmap(ioctl);
+ }
+}
+
+static void __init mpc5125_ads_setup_arch(void)
+{
+ printk(KERN_INFO "MPC5125 ADS board from Freescale Semiconductor\n");
+
+ mpc5125_board_setup();
+}
+
+static struct of_device_id __initdata of_bus_ids[] =3D {
+ { .name =3D "soc", },
+ {},
+};
+
+static void __init mpc5125_ads_declare_of_platform_devices(void)
+{
+ struct device_node *np;
+
+ if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
+ printk(KERN_ERR __FILE__ ": "
+ "Error while probing of_platform bus\n");
+
+ np =3D of_find_compatible_node(NULL, NULL, "fsl,mpc5125-nfc");
+ if (np) {
+ of_platform_device_create(np, NULL, NULL);
+ of_node_put(np);
+ }
+}
+
+static void __init mpc5125_ads_init(void)
+{
+ mpc5125_ads_declare_of_platform_devices();
+ mpc5121_clk_init();
+ mpc512x_restart_init();
+ mpc512x_psc_fifo_init();
+}
+
+/*
+ * Called very early, MMU is off, device-tree isn't unflattened
+ */
+static int __init mpc5125_ads_probe(void)
+{
+ unsigned long root =3D of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, "fsl,mpc5125ads");
+}
+
+define_machine(mpc5125_ads) {
+ .name =3D "MPC5125 ADS",
+ .probe =3D mpc5125_ads_probe,
+ .setup_arch =3D mpc5125_ads_setup_arch,
+ .init =3D mpc5125_ads_init,
+ .init_IRQ =3D mpc512x_init_IRQ,
+ .get_irq =3D ipic_get_irq,
+ .calibrate_decr =3D generic_calibrate_decr,
+ .restart =3D mpc512x_restart,
+};
diff --git a/arch/powerpc/platforms/512x/mpc512x.h
b/arch/powerpc/platforms/512x/mpc512x.h
index 1ab6d11..91c903f 100644
--- a/arch/powerpc/platforms/512x/mpc512x.h
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -13,8 +13,11 @@
#define __MPC512X_H__
extern void __init mpc512x_init_IRQ(void);
extern void __init mpc512x_init(void);
+extern void __init mpc512x_restart_init(void);
extern int __init mpc5121_clk_init(void);
-void __init mpc512x_declare_of_platform_devices(void);
+extern void __init mpc512x_declare_of_platform_devices(void);
+extern void __init mpc512x_psc_fifo_init(void);
+extern char *mpc512x_select_psc_compat(void);
extern void mpc512x_restart(char *cmd);
extern void mpc512x_init_diu(void);
extern void mpc512x_setup_diu(void);
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c
b/arch/powerpc/platforms/512x/mpc512x_shared.c
index e41ebbd..52283d6 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -32,7 +32,7 @@
static struct mpc512x_reset_module __iomem *reset_module_base;
-static void __init mpc512x_restart_init(void)
+void __init mpc512x_restart_init(void)
{
struct device_node *np;
@@ -407,9 +407,16 @@ void __init mpc512x_psc_fifo_init(void)
void __iomem *psc;
unsigned int tx_fifo_size;
unsigned int rx_fifo_size;
+ char *psc_compat;
int fifobase =3D 0; /* current fifo address in 32 bit words */
- for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
+ psc_compat =3D mpc512x_select_psc_compat();
+ if (!psc_compat) {
+ pr_err("%s: no compatible devices found\n", __func__);
+ return;
+ }
+
+ for_each_compatible_node(np, NULL, psc_compat) {
tx_fifo_size =3D get_fifo_size(np, "fsl,tx-fifo-size");
rx_fifo_size =3D get_fifo_size(np, "fsl,rx-fifo-size");
2011/3/18 Wolfram Sang <w.sang@pengutronix.de>
>
> Hi Vladimir,
>
> (if possible, please provide a diffstat with the patches)
>
> > diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platfor=
ms/512x/clock.c
> > index 3dc2a8d..962c0ba 100644
> > --- a/arch/powerpc/platforms/512x/clock.c
> > +++ b/arch/powerpc/platforms/512x/clock.c
> > @@ -669,6 +669,13 @@ static void psc_calc_rate(struct clk *clk, int psc=
num, struct device_node *np)
> > =C2=A0 =C2=A0 =C2=A0 clk->rate =3D mclk_src / mclk_div;
> > =C2=A0}
> >
> > +
> > +#ifdef CONFIG_PPC_MPC5125
> > +#define PSC_PREFIX "mpc5125"
> > +#else
> > +#define PSC_PREFIX "mpc5121"
> > +#endif
> > +
> > =C2=A0/*
> > =C2=A0 * Find all psc nodes in device tree and assign a clock
> > =C2=A0 * with name "psc%d_mclk" and dev pointing at the device
> > @@ -680,7 +687,7 @@ static void psc_clks_init(void)
> > =C2=A0 =C2=A0 =C2=A0 const u32 *cell_index;
> > =C2=A0 =C2=A0 =C2=A0 struct platform_device *ofdev;
> >
> > - =C2=A0 =C2=A0 for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
> > + =C2=A0 =C2=A0 for_each_compatible_node(np, NULL, "fsl," PSC_PREFIX "-=
psc") {
>
> Uh, that makes it impossible to have one kernel for mpc5121/5.
>
> > -void __init mpc512x_psc_fifo_init(void)
> > +void __init mpc512x_psc_fifo_init(char *psc_name)
> > =C2=A0{
> > =C2=A0 =C2=A0 =C2=A0 struct device_node *np;
> > =C2=A0 =C2=A0 =C2=A0 void __iomem *psc;
> > =C2=A0 =C2=A0 =C2=A0 unsigned int tx_fifo_size;
> > =C2=A0 =C2=A0 =C2=A0 unsigned int rx_fifo_size;
> > + =C2=A0 =C2=A0 char *default_psc =3D "fsl,mpc5121-psc";
> > =C2=A0 =C2=A0 =C2=A0 int fifobase =3D 0; /* current fifo address in 32 =
bit words */
> >
> > - =C2=A0 =C2=A0 for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
> > + =C2=A0 =C2=A0 if (!psc_name)
> > + =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 psc_name =3D default_psc;
> > +
> > + =C2=A0 =C2=A0 for_each_compatible_node(np, NULL, psc_name) {
>
> I think this goes more to the right direction, although you passed the
> non-default string for mpc5125 in the board-config, which is the wrong pl=
ace,
> because it is a platform thing.
>
> What about something like:
>
> =C2=A0 =C2=A0 =C2=A0 =C2=A0if of_find_compatible_node(startpoint, NULL, "=
fsl,mpc5121-psc")
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0psc_compat =3D "fs=
l,mpc5121-psc";
> =C2=A0 =C2=A0 =C2=A0 =C2=A0else if of_find_compatible_node(startpoint, NU=
LL, "fsl,mpc5125-psc")
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0psc_compat =3D "fs=
l,mpc5125-psc";
> =C2=A0 =C2=A0 =C2=A0 =C2=A0else if
> =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0/* Problem handlin=
g */
>
> Dunno, might be worth to put it into a function as it could be used here =
and in
> the block above.
>
> Also, I noticed quite a number of magic values (e.g. 0x76). I guess those=
are
> register and bit names, which should be used instead.
>
> Thanks,
>
> =C2=A0 Wolfram
>
> --
> Pengutronix e.K. =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =
=C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 | Wolfram Sang =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0|
> Industrial Linux Solutions =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=
=A0 =C2=A0 | http://www.pengutronix.de/ =C2=A0|
>
> -----BEGIN PGP SIGNATURE-----
> Version: GnuPG v1.4.9 (GNU/Linux)
>
> iEYEARECAAYFAk2CfFYACgkQD27XaX1/VRsmcwCfdqwIn6V6VDwm7wZXm1PDHXmx
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