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* [PATCH 2/2] mtd/nand : workaround for Freescale FCM to support large-page Nand chip
From: b35362 @ 2011-06-28  1:50 UTC (permalink / raw)
  To: dwmw2; +Cc: Liu Shuo, linuxppc-dev, linux-mtd
In-Reply-To: <1309225852-1664-1-git-send-email-b35362@freescale.com>

From: Liu Shuo <b35362@freescale.com>

Freescale FCM controller has a 2K size limitation of buffer RAM. In order
to support the Nand flash chip whose page size is larger than 2K bytes,
we divide a page into multi-2K pages for MTD layer driver. In that case,
we force to set the page size to 2K bytes. We convert the page address of
MTD layer driver to a real page address in flash chips and a column index
in fsl_elbc driver. We can issue any column address by UA instruction of
elbc controller.

Signed-off-by: Liu Shuo <b35362@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
 drivers/mtd/nand/fsl_elbc_nand.c |   61 +++++++++++++++++++++++++++++--------
 1 files changed, 48 insertions(+), 13 deletions(-)

diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index a212116..eea7a22 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -76,6 +76,10 @@ struct fsl_elbc_fcm_ctrl {
 	unsigned int oob;        /* Non zero if operating on OOB data     */
 	unsigned int counter;	 /* counter for the initializations	  */
 	char *oob_poi;           /* Place to write ECC after read back    */
+
+	int subpage_shift;       /* If writesize > 2048, these two members*/
+	int subpage_mask;        /* are used to calculate the real page   */
+	                         /* address and real column address       */
 };
 
 /* These map to the positions used by the FCM hardware ECC generator */
@@ -164,18 +168,27 @@ static void set_addr(struct mtd_info *mtd, int column, int page_addr, int oob)
 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
 	struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand;
 	int buf_num;
+	u32 real_ca = column;
 
-	elbc_fcm_ctrl->page = page_addr;
+	if (priv->page_size && elbc_fcm_ctrl->subpage_shift) {
+		real_ca = (page_addr & elbc_fcm_ctrl->subpage_mask) * 2112;
+		page_addr >>= elbc_fcm_ctrl->subpage_shift;
+	}
 
-	out_be32(&lbc->fbar,
-	         page_addr >> (chip->phys_erase_shift - chip->page_shift));
+	elbc_fcm_ctrl->page = page_addr;
 
 	if (priv->page_size) {
+		real_ca += (oob ? 2048 : 0);
+		elbc_fcm_ctrl->use_mdr = 1;
+		elbc_fcm_ctrl->mdr = real_ca;
+
+		out_be32(&lbc->fbar, page_addr >> 6);
 		out_be32(&lbc->fpar,
 		         ((page_addr << FPAR_LP_PI_SHIFT) & FPAR_LP_PI) |
 		         (oob ? FPAR_LP_MS : 0) | column);
 		buf_num = (page_addr & 1) << 2;
 	} else {
+		out_be32(&lbc->fbar, page_addr >> 5);
 		out_be32(&lbc->fpar,
 		         ((page_addr << FPAR_SP_PI_SHIFT) & FPAR_SP_PI) |
 		         (oob ? FPAR_SP_MS : 0) | column);
@@ -256,10 +269,11 @@ static void fsl_elbc_do_read(struct nand_chip *chip, int oob)
 	if (priv->page_size) {
 		out_be32(&lbc->fir,
 		         (FIR_OP_CM0 << FIR_OP0_SHIFT) |
-		         (FIR_OP_CA  << FIR_OP1_SHIFT) |
-		         (FIR_OP_PA  << FIR_OP2_SHIFT) |
-		         (FIR_OP_CM1 << FIR_OP3_SHIFT) |
-		         (FIR_OP_RBW << FIR_OP4_SHIFT));
+		         (FIR_OP_UA  << FIR_OP1_SHIFT) |
+		         (FIR_OP_UA  << FIR_OP2_SHIFT) |
+		         (FIR_OP_PA  << FIR_OP3_SHIFT) |
+		         (FIR_OP_CM1 << FIR_OP4_SHIFT) |
+		         (FIR_OP_RBW << FIR_OP5_SHIFT));
 
 		out_be32(&lbc->fcr, (NAND_CMD_READ0 << FCR_CMD0_SHIFT) |
 		                    (NAND_CMD_READSTART << FCR_CMD1_SHIFT));
@@ -399,12 +413,13 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
 		if (priv->page_size) {
 			out_be32(&lbc->fir,
 			         (FIR_OP_CM2 << FIR_OP0_SHIFT) |
-			         (FIR_OP_CA  << FIR_OP1_SHIFT) |
-			         (FIR_OP_PA  << FIR_OP2_SHIFT) |
-			         (FIR_OP_WB  << FIR_OP3_SHIFT) |
-			         (FIR_OP_CM3 << FIR_OP4_SHIFT) |
-			         (FIR_OP_CW1 << FIR_OP5_SHIFT) |
-			         (FIR_OP_RS  << FIR_OP6_SHIFT));
+			         (FIR_OP_UA  << FIR_OP1_SHIFT) |
+			         (FIR_OP_UA  << FIR_OP2_SHIFT) |
+			         (FIR_OP_PA  << FIR_OP3_SHIFT) |
+			         (FIR_OP_WB  << FIR_OP4_SHIFT) |
+			         (FIR_OP_CM3 << FIR_OP5_SHIFT) |
+			         (FIR_OP_CW1 << FIR_OP6_SHIFT) |
+			         (FIR_OP_RS  << FIR_OP7_SHIFT));
 		} else {
 			out_be32(&lbc->fir,
 			         (FIR_OP_CM0 << FIR_OP0_SHIFT) |
@@ -453,6 +468,9 @@ static void fsl_elbc_cmdfunc(struct mtd_info *mtd, unsigned int command,
 			full_page = 1;
 		}
 
+		if (priv->page_size)
+			elbc_fcm_ctrl->use_mdr = 1;
+
 		fsl_elbc_run_command(mtd);
 
 		/* Read back the page in order to fill in the ECC for the
@@ -654,9 +672,26 @@ static int fsl_elbc_chip_init_tail(struct mtd_info *mtd)
 	struct nand_chip *chip = mtd->priv;
 	struct fsl_elbc_mtd *priv = chip->priv;
 	struct fsl_lbc_ctrl *ctrl = priv->ctrl;
+	struct fsl_elbc_fcm_ctrl *elbc_fcm_ctrl = ctrl->nand;
 	struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
 	unsigned int al;
 
+	/* Hack for supporting the flash chip whose writesize is
+	 * larger than 2K bytes.
+	 */
+	if (mtd->writesize > 2048) {
+		elbc_fcm_ctrl->subpage_shift = ffs(mtd->writesize >> 11) - 1;
+		elbc_fcm_ctrl->subpage_mask =
+			(1 << elbc_fcm_ctrl->subpage_shift) - 1;
+		/* Rewrite mtd->writesize, mtd->oobsize, chip->page_shift
+		 * and chip->pagemask.
+		 */
+		mtd->writesize = 2048;
+		mtd->oobsize = 64;
+		chip->page_shift = ffs(mtd->writesize) - 1;
+		chip->pagemask = (chip->chipsize >> chip->page_shift) - 1;
+	}
+
 	/* calculate FMR Address Length field */
 	al = 0;
 	if (chip->pagemask & 0xffff0000)
-- 
1.7.1

^ permalink raw reply related

* [PATCH 1/2] mtd/nand : don't free the global data fsl_lbc_ctrl_dev->nand in fsl_elbc_chip_remove()
From: b35362 @ 2011-06-28  1:50 UTC (permalink / raw)
  To: dwmw2; +Cc: Liu Shuo, linuxppc-dev, linux-mtd

From: Liu Shuo <b35362@freescale.com>

The global data fsl_lbc_ctrl_dev->nand don't have to be freed in
fsl_elbc_chip_remove(). The right place to do that is in fsl_elbc_nand_remove()
if elbc_fcm_ctrl->counter is zero.

Signed-off-by: Liu Shuo <b35362@freescale.com>
---
 drivers/mtd/nand/fsl_elbc_nand.c |    1 -
 1 files changed, 0 insertions(+), 1 deletions(-)

diff --git a/drivers/mtd/nand/fsl_elbc_nand.c b/drivers/mtd/nand/fsl_elbc_nand.c
index 0bb254c..a212116 100644
--- a/drivers/mtd/nand/fsl_elbc_nand.c
+++ b/drivers/mtd/nand/fsl_elbc_nand.c
@@ -829,7 +829,6 @@ static int fsl_elbc_chip_remove(struct fsl_elbc_mtd *priv)
 
 	elbc_fcm_ctrl->chips[priv->bank] = NULL;
 	kfree(priv);
-	kfree(elbc_fcm_ctrl);
 	return 0;
 }
 
-- 
1.7.1

^ permalink raw reply related

* Re: [PATCH] powerpc/timebase_read: don't return time older than cycle_last
From: Benjamin Herrenschmidt @ 2011-06-28  0:45 UTC (permalink / raw)
  To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20110627215613.GA13676@schlenkerla.am.freescale.net>

On Mon, 2011-06-27 at 16:56 -0500, Scott Wood wrote:
> As is done in read_tsc() on x86, make sure that we don't return a timebase
> value smaller than cycle_last, which can happen on SMP if the timebases are
> not perfectly synchronized.  It is less expensive than total enforcement of
> monotonicity, since we don't need to add another variable and update it on
> each read, but it will prevent core timekeeping functions from translating
> a small timebase regression into a large jump forward.
> 
> Based on commit d8bb6f4c1670c8324e4135c61ef07486f7f17379 for x86.

You are applying a bandage on a wooden leg here .... userspace (vDSO)
will see the time going backward if you aren't well synchronized as
well, so you're stuffed anyways.

Cheers,
Ben.

> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
>  arch/powerpc/kernel/time.c |   15 ++++++++++++++-
>  1 files changed, 14 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
> index f33acfd..b66ce41 100644
> --- a/arch/powerpc/kernel/time.c
> +++ b/arch/powerpc/kernel/time.c
> @@ -806,9 +806,22 @@ static cycle_t rtc_read(struct clocksource *cs)
>  	return (cycle_t)get_rtc();
>  }
>  
> +/*
> + * We compare the timebase to the cycle_last value in the clocksource
> + * structure to avoid a nasty time-warp.  This can be observed in a very
> + * small window right after one CPU updated cycle_last under the xtime lock,
> + * and the other CPU reads a TSC value which is smaller than the cycle_last
> + * reference value due to a TSC which is slighty behind.  This delta is
> + * nowhere else observable, but in that case it results in a large forward
> + * time jump due to the unsigned delta calculation of the time keeping core
> + * code, which is necessary to support wrapping clocksources like pm timer.
> + */
>  static cycle_t timebase_read(struct clocksource *cs)
>  {
> -	return (cycle_t)get_tb();
> +	cycle_t ret = (cycle_t)get_tb();
> +
> +	return ret >= clocksource_timebase.cycle_last ?
> +	       ret : clocksource_timebase.cycle_last;
>  }
>  
>  void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,

^ permalink raw reply

* Re: [PATCH 3/7] serial/8250: move UPIO_TSI to powerpc
From: David Daney @ 2011-06-27 23:51 UTC (permalink / raw)
  To: Arnd Bergmann
  Cc: Greg Kroah-Hartman, linux-kernel, linux-serial, linuxppc-dev,
	Alan Cox
In-Reply-To: <1309211120-2803-4-git-send-email-arnd@arndb.de>

On 06/27/2011 02:45 PM, Arnd Bergmann wrote:
> This iotype is only used by the legacy_serial code in powerpc, so the
> code should live there, rather than be compiled in for every 8250
> driver.
>
> Signed-off-by: Arnd Bergmann<arnd@arndb.de>
> Cc: Benjamin Herrenschmidt<benh@kernel.crashing.org>
> Cc: linuxppc-dev@lists.ozlabs.org
> Cc: Greg Kroah-Hartman<gregkh@suse.de>
> Cc: linux-serial@vger.kernel.org
> ---
>   arch/powerpc/kernel/legacy_serial.c |   24 ++++++++++++++++++++++++
>   drivers/tty/serial/8250.c           |   23 -----------------------
>   2 files changed, 24 insertions(+), 23 deletions(-)
>

This seems vaguely familiar:

https://lkml.org/lkml/2008/10/6/297

So just for the hell of it...

Acked-by: David Daney <david.daney@cavium.com>

^ permalink raw reply

* [PATCH] powerpc/timebase_read: don't return time older than cycle_last
From: Scott Wood @ 2011-06-27 21:56 UTC (permalink / raw)
  To: benh; +Cc: linuxppc-dev

As is done in read_tsc() on x86, make sure that we don't return a timebase
value smaller than cycle_last, which can happen on SMP if the timebases are
not perfectly synchronized.  It is less expensive than total enforcement of
monotonicity, since we don't need to add another variable and update it on
each read, but it will prevent core timekeeping functions from translating
a small timebase regression into a large jump forward.

Based on commit d8bb6f4c1670c8324e4135c61ef07486f7f17379 for x86.

Signed-off-by: Scott Wood <scottwood@freescale.com>
---
 arch/powerpc/kernel/time.c |   15 ++++++++++++++-
 1 files changed, 14 insertions(+), 1 deletions(-)

diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index f33acfd..b66ce41 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -806,9 +806,22 @@ static cycle_t rtc_read(struct clocksource *cs)
 	return (cycle_t)get_rtc();
 }
 
+/*
+ * We compare the timebase to the cycle_last value in the clocksource
+ * structure to avoid a nasty time-warp.  This can be observed in a very
+ * small window right after one CPU updated cycle_last under the xtime lock,
+ * and the other CPU reads a TSC value which is smaller than the cycle_last
+ * reference value due to a TSC which is slighty behind.  This delta is
+ * nowhere else observable, but in that case it results in a large forward
+ * time jump due to the unsigned delta calculation of the time keeping core
+ * code, which is necessary to support wrapping clocksources like pm timer.
+ */
 static cycle_t timebase_read(struct clocksource *cs)
 {
-	return (cycle_t)get_tb();
+	cycle_t ret = (cycle_t)get_tb();
+
+	return ret >= clocksource_timebase.cycle_last ?
+	       ret : clocksource_timebase.cycle_last;
 }
 
 void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
-- 
1.7.4.1

^ permalink raw reply related

* [PATCH 3/7] serial/8250: move UPIO_TSI to powerpc
From: Arnd Bergmann @ 2011-06-27 21:45 UTC (permalink / raw)
  To: Greg Kroah-Hartman
  Cc: Arnd Bergmann, linux-kernel, linux-serial, linuxppc-dev, Alan Cox
In-Reply-To: <1309211120-2803-1-git-send-email-arnd@arndb.de>

This iotype is only used by the legacy_serial code in powerpc, so the
code should live there, rather than be compiled in for every 8250
driver.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: linux-serial@vger.kernel.org
---
 arch/powerpc/kernel/legacy_serial.c |   24 ++++++++++++++++++++++++
 drivers/tty/serial/8250.c           |   23 -----------------------
 2 files changed, 24 insertions(+), 23 deletions(-)

diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index 2b97b80..b229e1e 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -47,6 +47,24 @@ static struct __initdata of_device_id legacy_serial_parents[] = {
 static unsigned int legacy_serial_count;
 static int legacy_serial_console = -1;
 
+static unsigned int tsi_serial_in(struct uart_port *p, int offset)
+{
+	unsigned int tmp;
+	offset = offset << p->regshift;
+	if (offset == UART_IIR) {
+		tmp = readl(p->membase + (UART_IIR & ~3));
+		return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
+	} else
+		return readb(p->membase + offset);
+}
+
+static void tsi_serial_out(struct uart_port *p, int offset, int value)
+{
+	offset = offset << p->regshift;
+	if (!((offset == UART_IER) && (value & UART_IER_UUE)))
+		writeb(value, p->membase + offset);
+}
+
 static int __init add_legacy_port(struct device_node *np, int want_index,
 				  int iotype, phys_addr_t base,
 				  phys_addr_t taddr, unsigned long irq,
@@ -102,6 +120,7 @@ static int __init add_legacy_port(struct device_node *np, int want_index,
 		legacy_serial_ports[index].iobase = base;
 	else
 		legacy_serial_ports[index].mapbase = base;
+
 	legacy_serial_ports[index].iotype = iotype;
 	legacy_serial_ports[index].uartclk = clock;
 	legacy_serial_ports[index].irq = irq;
@@ -112,6 +131,11 @@ static int __init add_legacy_port(struct device_node *np, int want_index,
 	legacy_serial_infos[index].speed = spd ? be32_to_cpup(spd) : 0;
 	legacy_serial_infos[index].irq_check_parent = irq_check_parent;
 
+	if (iotype == UPIO_TSI) {
+		legacy_serial_ports[index].serial_in = tsi_serial_in;
+		legacy_serial_ports[index].serial_out = tsi_serial_out;
+	}
+
 	printk(KERN_DEBUG "Found legacy serial port %d for %s\n",
 	       index, np->full_name);
 	printk(KERN_DEBUG "  %s=%llx, taddr=%llx, irq=%lx, clk=%d, speed=%d\n",
diff --git a/drivers/tty/serial/8250.c b/drivers/tty/serial/8250.c
index c8f107e..d575ccb 100644
--- a/drivers/tty/serial/8250.c
+++ b/drivers/tty/serial/8250.c
@@ -345,24 +345,6 @@ static unsigned int mem32_serial_in(struct uart_port *p, int offset)
 	return readl(p->membase + offset);
 }
 
-static unsigned int tsi_serial_in(struct uart_port *p, int offset)
-{
-	unsigned int tmp;
-	offset = map_8250_in_reg(p, offset) << p->regshift;
-	if (offset == UART_IIR) {
-		tmp = readl(p->membase + (UART_IIR & ~3));
-		return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
-	} else
-		return readb(p->membase + offset);
-}
-
-static void tsi_serial_out(struct uart_port *p, int offset, int value)
-{
-	offset = map_8250_out_reg(p, offset) << p->regshift;
-	if (!((offset == UART_IER) && (value & UART_IER_UUE)))
-		writeb(value, p->membase + offset);
-}
-
 /* Save the LCR value so it can be re-written when a Busy Detect IRQ occurs. */
 static inline void dwapb_save_out_value(struct uart_port *p, int offset,
 					int value)
@@ -431,11 +413,6 @@ static void set_io_from_upio(struct uart_port *p)
 		p->serial_out = mem32_serial_out;
 		break;
 
-	case UPIO_TSI:
-		p->serial_in = tsi_serial_in;
-		p->serial_out = tsi_serial_out;
-		break;
-
 	case UPIO_DWAPB:
 		p->serial_in = mem_serial_in;
 		p->serial_out = dwapb_serial_out;
-- 
1.7.5.4

^ permalink raw reply related

* Re: [PATCH V3 0/2] Improve CPC925 EDAC handling code on Maple
From: Dmitry Eremin-Solenikov @ 2011-06-27 14:07 UTC (permalink / raw)
  To: linuxppc-dev; +Cc: Paul Mackerras
In-Reply-To: <1308315107-29182-1-git-send-email-dbaryshkov@gmail.com>

Hello,

On 6/17/11, Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> wrote:
> Hello, colleagues,
>
> Another respin of this patchset.
>
> Changes since previous version:
> * Fix comments in cpc925_edac.c
> * Rename cpc925_cpu_getmask() to cpc925_cpu_mask_disabled()
> * Don't return an error from init code if it's a U3 and not U3H
>
>  arch/powerpc/platforms/maple/setup.c |   41 +++++++++------------
>  drivers/edac/cpc925_edac.c           |   67
> +++++++++++++++++++++++++++++++++--
>  2 files changed, 83 insertions(+), 25 deletions(-)

Any chance to get this version reviewed/merged? Sorry for being noisy.

-- 
With best wishes
Dmitry

^ permalink raw reply

* [PATCH 2/2] powerpc/85xx: Add P5020 SoC device tree include stub
From: Kumar Gala @ 2011-06-27 13:44 UTC (permalink / raw)
  To: linuxppc-dev
In-Reply-To: <1309182284-1529-1-git-send-email-galak@kernel.crashing.org>

Split out common (non-board specific) parts of the SoC related device
tree into a stub so multiple board dts files can include it and we can
reduce duplication and maintenance effort.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/boot/dts/p5020ds.dts  |  571 +-------------------------------
 arch/powerpc/boot/dts/p5020si.dtsi |  652 ++++++++++++++++++++++++++++++++++++
 2 files changed, 653 insertions(+), 570 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p5020si.dtsi

diff --git a/arch/powerpc/boot/dts/p5020ds.dts b/arch/powerpc/boot/dts/p5020ds.dts
index 069cff7..8366e2f 100644
--- a/arch/powerpc/boot/dts/p5020ds.dts
+++ b/arch/powerpc/boot/dts/p5020ds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/dts-v1/;
+/include/ "p5020si.dtsi"
 
 / {
 	model = "fsl,P5020DS";
@@ -41,292 +41,12 @@
 	#size-cells = <2>;
 	interrupt-parent = <&mpic>;
 
-	aliases {
-		ccsr = &soc;
-
-		serial0 = &serial0;
-		serial1 = &serial1;
-		serial2 = &serial2;
-		serial3 = &serial3;
-		pci0 = &pci0;
-		pci1 = &pci1;
-		pci2 = &pci2;
-		pci3 = &pci3;
-		usb0 = &usb0;
-		usb1 = &usb1;
-		dma0 = &dma0;
-		dma1 = &dma1;
-		sdhc = &sdhc;
-		msi0 = &msi0;
-		msi1 = &msi1;
-		msi2 = &msi2;
-
-		crypto = &crypto;
-		sec_jr0 = &sec_jr0;
-		sec_jr1 = &sec_jr1;
-		sec_jr2 = &sec_jr2;
-		sec_jr3 = &sec_jr3;
-		rtic_a = &rtic_a;
-		rtic_b = &rtic_b;
-		rtic_c = &rtic_c;
-		rtic_d = &rtic_d;
-		sec_mon = &sec_mon;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu0: PowerPC,e5500@0 {
-			device_type = "cpu";
-			reg = <0>;
-			next-level-cache = <&L2_0>;
-			L2_0: l2-cache {
-				next-level-cache = <&cpc>;
-			};
-		};
-		cpu1: PowerPC,e5500@1 {
-			device_type = "cpu";
-			reg = <1>;
-			next-level-cache = <&L2_1>;
-			L2_1: l2-cache {
-				next-level-cache = <&cpc>;
-			};
-		};
-	};
-
 	memory {
 		device_type = "memory";
 	};
 
 	soc: soc@ffe000000 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		device_type = "soc";
-		compatible = "simple-bus";
-		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
-		reg = <0xf 0xfe000000 0 0x00001000>;
-
-		soc-sram-error {
-			compatible = "fsl,soc-sram-error";
-			interrupts = <16 2 1 29>;
-		};
-
-		corenet-law@0 {
-			compatible = "fsl,corenet-law";
-			reg = <0x0 0x1000>;
-			fsl,num-laws = <32>;
-		};
-
-		memory-controller@8000 {
-			compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
-			reg = <0x8000 0x1000>;
-			interrupts = <16 2 1 23>;
-		};
-
-		memory-controller@9000 {
-			compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
-			reg = <0x9000 0x1000>;
-			interrupts = <16 2 1 22>;
-		};
-
-		cpc: l3-cache-controller@10000 {
-			compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
-			reg = <0x10000 0x1000
-			       0x11000 0x1000>;
-			interrupts = <16 2 1 27
-				      16 2 1 26>;
-		};
-
-		corenet-cf@18000 {
-			compatible = "fsl,corenet-cf";
-			reg = <0x18000 0x1000>;
-			interrupts = <16 2 1 31>;
-			fsl,ccf-num-csdids = <32>;
-			fsl,ccf-num-snoopids = <32>;
-		};
-
-		iommu@20000 {
-			compatible = "fsl,pamu-v1.0", "fsl,pamu";
-			reg = <0x20000 0x4000>;
-			interrupts = <
-				24 2 0 0
-				16 2 1 30>;
-		};
-
-		mpic: pic@40000 {
-			clock-frequency = <0>;
-			interrupt-controller;
-			#address-cells = <0>;
-			#interrupt-cells = <4>;
-			reg = <0x40000 0x40000>;
-			compatible = "fsl,mpic", "chrp,open-pic";
-			device_type = "open-pic";
-		};
-
-		msi0: msi@41600 {
-			compatible = "fsl,mpic-msi";
-			reg = <0x41600 0x200>;
-			msi-available-ranges = <0 0x100>;
-			interrupts = <
-				0xe0 0 0 0
-				0xe1 0 0 0
-				0xe2 0 0 0
-				0xe3 0 0 0
-				0xe4 0 0 0
-				0xe5 0 0 0
-				0xe6 0 0 0
-				0xe7 0 0 0>;
-		};
-
-		msi1: msi@41800 {
-			compatible = "fsl,mpic-msi";
-			reg = <0x41800 0x200>;
-			msi-available-ranges = <0 0x100>;
-			interrupts = <
-				0xe8 0 0 0
-				0xe9 0 0 0
-				0xea 0 0 0
-				0xeb 0 0 0
-				0xec 0 0 0
-				0xed 0 0 0
-				0xee 0 0 0
-				0xef 0 0 0>;
-		};
-
-		msi2: msi@41a00 {
-			compatible = "fsl,mpic-msi";
-			reg = <0x41a00 0x200>;
-			msi-available-ranges = <0 0x100>;
-			interrupts = <
-				0xf0 0 0 0
-				0xf1 0 0 0
-				0xf2 0 0 0
-				0xf3 0 0 0
-				0xf4 0 0 0
-				0xf5 0 0 0
-				0xf6 0 0 0
-				0xf7 0 0 0>;
-		};
-
-		guts: global-utilities@e0000 {
-			compatible = "fsl,qoriq-device-config-1.0";
-			reg = <0xe0000 0xe00>;
-			fsl,has-rstcr;
-			#sleep-cells = <1>;
-			fsl,liodn-bits = <12>;
-		};
-
-		pins: global-utilities@e0e00 {
-			compatible = "fsl,qoriq-pin-control-1.0";
-			reg = <0xe0e00 0x200>;
-			#sleep-cells = <2>;
-		};
-
-		clockgen: global-utilities@e1000 {
-			compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
-			reg = <0xe1000 0x1000>;
-			clock-frequency = <0>;
-		};
-
-		rcpm: global-utilities@e2000 {
-			compatible = "fsl,qoriq-rcpm-1.0";
-			reg = <0xe2000 0x1000>;
-			#sleep-cells = <1>;
-		};
-
-		sfp: sfp@e8000 {
-			compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
-			reg	   = <0xe8000 0x1000>;
-		};
-
-		serdes: serdes@ea000 {
-			compatible = "fsl,p5020-serdes";
-			reg	   = <0xea000 0x1000>;
-		};
-
-		dma0: dma@100300 {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
-			reg = <0x100300 0x4>;
-			ranges = <0x0 0x100100 0x200>;
-			cell-index = <0>;
-			dma-channel@0 {
-				compatible = "fsl,p5020-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x0 0x80>;
-				cell-index = <0>;
-				interrupts = <28 2 0 0>;
-			};
-			dma-channel@80 {
-				compatible = "fsl,p5020-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x80 0x80>;
-				cell-index = <1>;
-				interrupts = <29 2 0 0>;
-			};
-			dma-channel@100 {
-				compatible = "fsl,p5020-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x100 0x80>;
-				cell-index = <2>;
-				interrupts = <30 2 0 0>;
-			};
-			dma-channel@180 {
-				compatible = "fsl,p5020-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x180 0x80>;
-				cell-index = <3>;
-				interrupts = <31 2 0 0>;
-			};
-		};
-
-		dma1: dma@101300 {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
-			reg = <0x101300 0x4>;
-			ranges = <0x0 0x101100 0x200>;
-			cell-index = <1>;
-			dma-channel@0 {
-				compatible = "fsl,p5020-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x0 0x80>;
-				cell-index = <0>;
-				interrupts = <32 2 0 0>;
-			};
-			dma-channel@80 {
-				compatible = "fsl,p5020-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x80 0x80>;
-				cell-index = <1>;
-				interrupts = <33 2 0 0>;
-			};
-			dma-channel@100 {
-				compatible = "fsl,p5020-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x100 0x80>;
-				cell-index = <2>;
-				interrupts = <34 2 0 0>;
-			};
-			dma-channel@180 {
-				compatible = "fsl,p5020-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x180 0x80>;
-				cell-index = <3>;
-				interrupts = <35 2 0 0>;
-			};
-		};
-
 		spi@110000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "fsl,p5020-espi", "fsl,mpc8536-espi";
-			reg = <0x110000 0x1000>;
-			interrupts = <53 0x2 0 0>;
-			fsl,espi-num-chipselects = <4>;
-
 			flash@0 {
 				#address-cells = <1>;
 				#size-cells = <1>;
@@ -355,32 +75,7 @@
 			};
 		};
 
-		sdhc: sdhc@114000 {
-			compatible = "fsl,p5020-esdhc", "fsl,esdhc";
-			reg = <0x114000 0x1000>;
-			interrupts = <48 2 0 0>;
-			sdhci,auto-cmd12;
-			clock-frequency = <0>;
-		};
-
-		i2c@118000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			cell-index = <0>;
-			compatible = "fsl-i2c";
-			reg = <0x118000 0x100>;
-			interrupts = <38 2 0 0>;
-			dfsrr;
-		};
-
 		i2c@118100 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			cell-index = <1>;
-			compatible = "fsl-i2c";
-			reg = <0x118100 0x100>;
-			interrupts = <38 2 0 0>;
-			dfsrr;
 			eeprom@51 {
 				compatible = "at24,24c256";
 				reg = <0x51>;
@@ -391,193 +86,17 @@
 			};
 		};
 
-		i2c@119000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			cell-index = <2>;
-			compatible = "fsl-i2c";
-			reg = <0x119000 0x100>;
-			interrupts = <39 2 0 0>;
-			dfsrr;
-		};
-
 		i2c@119100 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			cell-index = <3>;
-			compatible = "fsl-i2c";
-			reg = <0x119100 0x100>;
-			interrupts = <39 2 0 0>;
-			dfsrr;
 			rtc@68 {
 				compatible = "dallas,ds3232";
 				reg = <0x68>;
 				interrupts = <0x1 0x1 0 0>;
 			};
 		};
-
-		serial0: serial@11c500 {
-			cell-index = <0>;
-			device_type = "serial";
-			compatible = "ns16550";
-			reg = <0x11c500 0x100>;
-			clock-frequency = <0>;
-			interrupts = <36 2 0 0>;
-		};
-
-		serial1: serial@11c600 {
-			cell-index = <1>;
-			device_type = "serial";
-			compatible = "ns16550";
-			reg = <0x11c600 0x100>;
-			clock-frequency = <0>;
-			interrupts = <36 2 0 0>;
-		};
-
-		serial2: serial@11d500 {
-			cell-index = <2>;
-			device_type = "serial";
-			compatible = "ns16550";
-			reg = <0x11d500 0x100>;
-			clock-frequency = <0>;
-			interrupts = <37 2 0 0>;
-		};
-
-		serial3: serial@11d600 {
-			cell-index = <3>;
-			device_type = "serial";
-			compatible = "ns16550";
-			reg = <0x11d600 0x100>;
-			clock-frequency = <0>;
-			interrupts = <37 2 0 0>;
-		};
-
-		gpio0: gpio@130000 {
-			compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio";
-			reg = <0x130000 0x1000>;
-			interrupts = <55 2 0 0>;
-			#gpio-cells = <2>;
-			gpio-controller;
-		};
-
-		usb0: usb@210000 {
-			compatible = "fsl,p5020-usb2-mph",
-					"fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
-			reg = <0x210000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			interrupts = <44 0x2 0 0>;
-			phy_type = "utmi";
-			port0;
-		};
-
-		usb1: usb@211000 {
-			compatible = "fsl,p5020-usb2-dr",
-					"fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
-			reg = <0x211000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			interrupts = <45 0x2 0 0>;
-			dr_mode = "host";
-			phy_type = "utmi";
-		};
-
-		sata@220000 {
-			compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
-			reg = <0x220000 0x1000>;
-			interrupts = <68 0x2 0 0>;
-		};
-
-		sata@221000 {
-			compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
-			reg = <0x221000 0x1000>;
-			interrupts = <69 0x2 0 0>;
-		};
-
-		crypto: crypto@300000 {
-			compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg		 = <0x300000 0x10000>;
-			ranges		 = <0 0x300000 0x10000>;
-			interrupts	 = <92 2 0 0>;
-
-			sec_jr0: jr@1000 {
-				compatible = "fsl,sec-v4.2-job-ring",
-					     "fsl,sec-v4.0-job-ring";
-				reg = <0x1000 0x1000>;
-				interrupts = <88 2 0 0>;
-			};
-
-			sec_jr1: jr@2000 {
-				compatible = "fsl,sec-v4.2-job-ring",
-					     "fsl,sec-v4.0-job-ring";
-				reg = <0x2000 0x1000>;
-				interrupts = <89 2 0 0>;
-			};
-
-			sec_jr2: jr@3000 {
-				compatible = "fsl,sec-v4.2-job-ring",
-					     "fsl,sec-v4.0-job-ring";
-				reg = <0x3000 0x1000>;
-				interrupts = <90 2 0 0>;
-			};
-
-			sec_jr3: jr@4000 {
-				compatible = "fsl,sec-v4.2-job-ring",
-					     "fsl,sec-v4.0-job-ring";
-				reg = <0x4000 0x1000>;
-				interrupts = <91 2 0 0>;
-			};
-
-			rtic@6000 {
-				compatible = "fsl,sec-v4.2-rtic",
-					     "fsl,sec-v4.0-rtic";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0x6000 0x100>;
-				ranges = <0x0 0x6100 0xe00>;
-
-				rtic_a: rtic-a@0 {
-					compatible = "fsl,sec-v4.2-rtic-memory",
-						     "fsl,sec-v4.0-rtic-memory";
-					reg = <0x00 0x20 0x100 0x80>;
-				};
-
-				rtic_b: rtic-b@20 {
-					compatible = "fsl,sec-v4.2-rtic-memory",
-						     "fsl,sec-v4.0-rtic-memory";
-					reg = <0x20 0x20 0x200 0x80>;
-				};
-
-				rtic_c: rtic-c@40 {
-					compatible = "fsl,sec-v4.2-rtic-memory",
-						     "fsl,sec-v4.0-rtic-memory";
-					reg = <0x40 0x20 0x300 0x80>;
-				};
-
-				rtic_d: rtic-d@60 {
-					compatible = "fsl,sec-v4.2-rtic-memory",
-						     "fsl,sec-v4.0-rtic-memory";
-					reg = <0x60 0x20 0x500 0x80>;
-				};
-			};
-		};
-
-		sec_mon: sec_mon@314000 {
-			compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
-			reg = <0x314000 0x1000>;
-			interrupts = <93 2 0 0>;
-		};
 	};
 
 	localbus@ffe124000 {
-		compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
 		reg = <0xf 0xfe124000 0 0x1000>;
-		interrupts = <25 2 0 0>;
-		#address-cells = <2>;
-		#size-cells = <1>;
-
 		ranges = <0 0 0xf 0xe8000000 0x08000000
 			  2 0 0xf 0xffa00000 0x00040000
 			  3 0 0xf 0xffdf0000 0x00008000>;
@@ -634,33 +153,11 @@
 	};
 
 	pci0: pcie@ffe200000 {
-		compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
-		device_type = "pci";
-		#size-cells = <2>;
-		#address-cells = <3>;
 		reg = <0xf 0xfe200000 0 0x1000>;
-		bus-range = <0x0 0xff>;
 		ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
 			  0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
-		clock-frequency = <0x1fca055>;
-		fsl,msi = <&msi0>;
-		interrupts = <16 2 1 15>;
 
 		pcie@0 {
-			reg = <0 0 0 0 0>;
-			#interrupt-cells = <1>;
-			#size-cells = <2>;
-			#address-cells = <3>;
-			device_type = "pci";
-			interrupts = <16 2 1 15>;
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <
-				/* IDSEL 0x0 */
-				0000 0 0 1 &mpic 40 1 0 0
-				0000 0 0 2 &mpic 1 1 0 0
-				0000 0 0 3 &mpic 2 1 0 0
-				0000 0 0 4 &mpic 3 1 0 0
-				>;
 			ranges = <0x02000000 0 0xe0000000
 				  0x02000000 0 0xe0000000
 				  0 0x20000000
@@ -672,32 +169,10 @@
 	};
 
 	pci1: pcie@ffe201000 {
-		compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
-		device_type = "pci";
-		#size-cells = <2>;
-		#address-cells = <3>;
 		reg = <0xf 0xfe201000 0 0x1000>;
-		bus-range = <0 0xff>;
 		ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
 			  0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
-		clock-frequency = <0x1fca055>;
-		fsl,msi = <&msi1>;
-		interrupts = <16 2 1 14>;
 		pcie@0 {
-			reg = <0 0 0 0 0>;
-			#interrupt-cells = <1>;
-			#size-cells = <2>;
-			#address-cells = <3>;
-			device_type = "pci";
-			interrupts = <16 2 1 14>;
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <
-				/* IDSEL 0x0 */
-				0000 0 0 1 &mpic 41 1 0 0
-				0000 0 0 2 &mpic 5 1 0 0
-				0000 0 0 3 &mpic 6 1 0 0
-				0000 0 0 4 &mpic 7 1 0 0
-				>;
 			ranges = <0x02000000 0 0xe0000000
 				  0x02000000 0 0xe0000000
 				  0 0x20000000
@@ -709,32 +184,10 @@
 	};
 
 	pci2: pcie@ffe202000 {
-		compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
-		device_type = "pci";
-		#size-cells = <2>;
-		#address-cells = <3>;
 		reg = <0xf 0xfe202000 0 0x1000>;
-		bus-range = <0x0 0xff>;
 		ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
 			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
-		clock-frequency = <0x1fca055>;
-		fsl,msi = <&msi2>;
-		interrupts = <16 2 1 13>;
 		pcie@0 {
-			reg = <0 0 0 0 0>;
-			#interrupt-cells = <1>;
-			#size-cells = <2>;
-			#address-cells = <3>;
-			device_type = "pci";
-			interrupts = <16 2 1 13>;
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <
-				/* IDSEL 0x0 */
-				0000 0 0 1 &mpic 42 1 0 0
-				0000 0 0 2 &mpic 9 1 0 0
-				0000 0 0 3 &mpic 10 1 0 0
-				0000 0 0 4 &mpic 11 1 0 0
-				>;
 			ranges = <0x02000000 0 0xe0000000
 				  0x02000000 0 0xe0000000
 				  0 0x20000000
@@ -746,32 +199,10 @@
 	};
 
 	pci3: pcie@ffe203000 {
-		compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
-		device_type = "pci";
-		#size-cells = <2>;
-		#address-cells = <3>;
 		reg = <0xf 0xfe203000 0 0x1000>;
-		bus-range = <0x0 0xff>;
 		ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
 			  0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
-		clock-frequency = <0x1fca055>;
-		fsl,msi = <&msi2>;
-		interrupts = <16 2 1 12>;
 		pcie@0 {
-			reg = <0 0 0 0 0>;
-			#interrupt-cells = <1>;
-			#size-cells = <2>;
-			#address-cells = <3>;
-			device_type = "pci";
-			interrupts = <16 2 1 12>;
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <
-				/* IDSEL 0x0 */
-				0000 0 0 1 &mpic 43 1 0 0
-				0000 0 0 2 &mpic 0 1 0 0
-				0000 0 0 3 &mpic 4 1 0 0
-				0000 0 0 4 &mpic 8 1 0 0
-				>;
 			ranges = <0x02000000 0 0xe0000000
 				  0x02000000 0 0xe0000000
 				  0 0x20000000
diff --git a/arch/powerpc/boot/dts/p5020si.dtsi b/arch/powerpc/boot/dts/p5020si.dtsi
new file mode 100644
index 0000000..5e6048e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p5020si.dtsi
@@ -0,0 +1,652 @@
+/*
+ * P5020 Silicon Device Tree Source
+ *
+ * Copyright 2010-2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/ {
+	compatible = "fsl,P5020";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&mpic>;
+
+	aliases {
+		ccsr = &soc;
+
+		serial0 = &serial0;
+		serial1 = &serial1;
+		serial2 = &serial2;
+		serial3 = &serial3;
+		pci0 = &pci0;
+		pci1 = &pci1;
+		pci2 = &pci2;
+		pci3 = &pci3;
+		usb0 = &usb0;
+		usb1 = &usb1;
+		dma0 = &dma0;
+		dma1 = &dma1;
+		sdhc = &sdhc;
+		msi0 = &msi0;
+		msi1 = &msi1;
+		msi2 = &msi2;
+
+		crypto = &crypto;
+		sec_jr0 = &sec_jr0;
+		sec_jr1 = &sec_jr1;
+		sec_jr2 = &sec_jr2;
+		sec_jr3 = &sec_jr3;
+		rtic_a = &rtic_a;
+		rtic_b = &rtic_b;
+		rtic_c = &rtic_c;
+		rtic_d = &rtic_d;
+		sec_mon = &sec_mon;
+
+/*
+		rio0 = &rapidio0;
+ */
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: PowerPC,e5500@0 {
+			device_type = "cpu";
+			reg = <0>;
+			next-level-cache = <&L2_0>;
+			L2_0: l2-cache {
+				next-level-cache = <&cpc>;
+			};
+		};
+		cpu1: PowerPC,e5500@1 {
+			device_type = "cpu";
+			reg = <1>;
+			next-level-cache = <&L2_1>;
+			L2_1: l2-cache {
+				next-level-cache = <&cpc>;
+			};
+		};
+	};
+
+	soc: soc@ffe000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		device_type = "soc";
+		compatible = "simple-bus";
+		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+		reg = <0xf 0xfe000000 0 0x00001000>;
+
+		soc-sram-error {
+			compatible = "fsl,soc-sram-error";
+			interrupts = <16 2 1 29>;
+		};
+
+		corenet-law@0 {
+			compatible = "fsl,corenet-law";
+			reg = <0x0 0x1000>;
+			fsl,num-laws = <32>;
+		};
+
+		memory-controller@8000 {
+			compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
+			reg = <0x8000 0x1000>;
+			interrupts = <16 2 1 23>;
+		};
+
+		memory-controller@9000 {
+			compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
+			reg = <0x9000 0x1000>;
+			interrupts = <16 2 1 22>;
+		};
+
+		cpc: l3-cache-controller@10000 {
+			compatible = "fsl,p5020-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
+			reg = <0x10000 0x1000
+			       0x11000 0x1000>;
+			interrupts = <16 2 1 27
+				      16 2 1 26>;
+		};
+
+		corenet-cf@18000 {
+			compatible = "fsl,corenet-cf";
+			reg = <0x18000 0x1000>;
+			interrupts = <16 2 1 31>;
+			fsl,ccf-num-csdids = <32>;
+			fsl,ccf-num-snoopids = <32>;
+		};
+
+		iommu@20000 {
+			compatible = "fsl,pamu-v1.0", "fsl,pamu";
+			reg = <0x20000 0x4000>;
+			interrupts = <
+				24 2 0 0
+				16 2 1 30>;
+		};
+
+		mpic: pic@40000 {
+			clock-frequency = <0>;
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <4>;
+			reg = <0x40000 0x40000>;
+			compatible = "fsl,mpic", "chrp,open-pic";
+			device_type = "open-pic";
+		};
+
+		msi0: msi@41600 {
+			compatible = "fsl,mpic-msi";
+			reg = <0x41600 0x200>;
+			msi-available-ranges = <0 0x100>;
+			interrupts = <
+				0xe0 0 0 0
+				0xe1 0 0 0
+				0xe2 0 0 0
+				0xe3 0 0 0
+				0xe4 0 0 0
+				0xe5 0 0 0
+				0xe6 0 0 0
+				0xe7 0 0 0>;
+		};
+
+		msi1: msi@41800 {
+			compatible = "fsl,mpic-msi";
+			reg = <0x41800 0x200>;
+			msi-available-ranges = <0 0x100>;
+			interrupts = <
+				0xe8 0 0 0
+				0xe9 0 0 0
+				0xea 0 0 0
+				0xeb 0 0 0
+				0xec 0 0 0
+				0xed 0 0 0
+				0xee 0 0 0
+				0xef 0 0 0>;
+		};
+
+		msi2: msi@41a00 {
+			compatible = "fsl,mpic-msi";
+			reg = <0x41a00 0x200>;
+			msi-available-ranges = <0 0x100>;
+			interrupts = <
+				0xf0 0 0 0
+				0xf1 0 0 0
+				0xf2 0 0 0
+				0xf3 0 0 0
+				0xf4 0 0 0
+				0xf5 0 0 0
+				0xf6 0 0 0
+				0xf7 0 0 0>;
+		};
+
+		guts: global-utilities@e0000 {
+			compatible = "fsl,qoriq-device-config-1.0";
+			reg = <0xe0000 0xe00>;
+			fsl,has-rstcr;
+			#sleep-cells = <1>;
+			fsl,liodn-bits = <12>;
+		};
+
+		pins: global-utilities@e0e00 {
+			compatible = "fsl,qoriq-pin-control-1.0";
+			reg = <0xe0e00 0x200>;
+			#sleep-cells = <2>;
+		};
+
+		clockgen: global-utilities@e1000 {
+			compatible = "fsl,p5020-clockgen", "fsl,qoriq-clockgen-1.0";
+			reg = <0xe1000 0x1000>;
+			clock-frequency = <0>;
+		};
+
+		rcpm: global-utilities@e2000 {
+			compatible = "fsl,qoriq-rcpm-1.0";
+			reg = <0xe2000 0x1000>;
+			#sleep-cells = <1>;
+		};
+
+		sfp: sfp@e8000 {
+			compatible = "fsl,p5020-sfp", "fsl,qoriq-sfp-1.0";
+			reg	   = <0xe8000 0x1000>;
+		};
+
+		serdes: serdes@ea000 {
+			compatible = "fsl,p5020-serdes";
+			reg	   = <0xea000 0x1000>;
+		};
+
+		dma0: dma@100300 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
+			reg = <0x100300 0x4>;
+			ranges = <0x0 0x100100 0x200>;
+			cell-index = <0>;
+			dma-channel@0 {
+				compatible = "fsl,p5020-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x0 0x80>;
+				cell-index = <0>;
+				interrupts = <28 2 0 0>;
+			};
+			dma-channel@80 {
+				compatible = "fsl,p5020-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x80 0x80>;
+				cell-index = <1>;
+				interrupts = <29 2 0 0>;
+			};
+			dma-channel@100 {
+				compatible = "fsl,p5020-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x100 0x80>;
+				cell-index = <2>;
+				interrupts = <30 2 0 0>;
+			};
+			dma-channel@180 {
+				compatible = "fsl,p5020-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x180 0x80>;
+				cell-index = <3>;
+				interrupts = <31 2 0 0>;
+			};
+		};
+
+		dma1: dma@101300 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,p5020-dma", "fsl,eloplus-dma";
+			reg = <0x101300 0x4>;
+			ranges = <0x0 0x101100 0x200>;
+			cell-index = <1>;
+			dma-channel@0 {
+				compatible = "fsl,p5020-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x0 0x80>;
+				cell-index = <0>;
+				interrupts = <32 2 0 0>;
+			};
+			dma-channel@80 {
+				compatible = "fsl,p5020-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x80 0x80>;
+				cell-index = <1>;
+				interrupts = <33 2 0 0>;
+			};
+			dma-channel@100 {
+				compatible = "fsl,p5020-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x100 0x80>;
+				cell-index = <2>;
+				interrupts = <34 2 0 0>;
+			};
+			dma-channel@180 {
+				compatible = "fsl,p5020-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x180 0x80>;
+				cell-index = <3>;
+				interrupts = <35 2 0 0>;
+			};
+		};
+
+		spi@110000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "fsl,p5020-espi", "fsl,mpc8536-espi";
+			reg = <0x110000 0x1000>;
+			interrupts = <53 0x2 0 0>;
+			fsl,espi-num-chipselects = <4>;
+		};
+
+		sdhc: sdhc@114000 {
+			compatible = "fsl,p5020-esdhc", "fsl,esdhc";
+			reg = <0x114000 0x1000>;
+			interrupts = <48 2 0 0>;
+			sdhci,auto-cmd12;
+			clock-frequency = <0>;
+		};
+
+		i2c@118000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			cell-index = <0>;
+			compatible = "fsl-i2c";
+			reg = <0x118000 0x100>;
+			interrupts = <38 2 0 0>;
+			dfsrr;
+		};
+
+		i2c@118100 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			cell-index = <1>;
+			compatible = "fsl-i2c";
+			reg = <0x118100 0x100>;
+			interrupts = <38 2 0 0>;
+			dfsrr;
+		};
+
+		i2c@119000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			cell-index = <2>;
+			compatible = "fsl-i2c";
+			reg = <0x119000 0x100>;
+			interrupts = <39 2 0 0>;
+			dfsrr;
+		};
+
+		i2c@119100 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			cell-index = <3>;
+			compatible = "fsl-i2c";
+			reg = <0x119100 0x100>;
+			interrupts = <39 2 0 0>;
+			dfsrr;
+		};
+
+		serial0: serial@11c500 {
+			cell-index = <0>;
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x11c500 0x100>;
+			clock-frequency = <0>;
+			interrupts = <36 2 0 0>;
+		};
+
+		serial1: serial@11c600 {
+			cell-index = <1>;
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x11c600 0x100>;
+			clock-frequency = <0>;
+			interrupts = <36 2 0 0>;
+		};
+
+		serial2: serial@11d500 {
+			cell-index = <2>;
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x11d500 0x100>;
+			clock-frequency = <0>;
+			interrupts = <37 2 0 0>;
+		};
+
+		serial3: serial@11d600 {
+			cell-index = <3>;
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x11d600 0x100>;
+			clock-frequency = <0>;
+			interrupts = <37 2 0 0>;
+		};
+
+		gpio0: gpio@130000 {
+			compatible = "fsl,p5020-gpio", "fsl,qoriq-gpio";
+			reg = <0x130000 0x1000>;
+			interrupts = <55 2 0 0>;
+			#gpio-cells = <2>;
+			gpio-controller;
+		};
+
+		usb0: usb@210000 {
+			compatible = "fsl,p5020-usb2-mph",
+					"fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
+			reg = <0x210000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <44 0x2 0 0>;
+			phy_type = "utmi";
+			port0;
+		};
+
+		usb1: usb@211000 {
+			compatible = "fsl,p5020-usb2-dr",
+					"fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
+			reg = <0x211000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <45 0x2 0 0>;
+			dr_mode = "host";
+			phy_type = "utmi";
+		};
+
+		sata@220000 {
+			compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
+			reg = <0x220000 0x1000>;
+			interrupts = <68 0x2 0 0>;
+		};
+
+		sata@221000 {
+			compatible = "fsl,p5020-sata", "fsl,pq-sata-v2";
+			reg = <0x221000 0x1000>;
+			interrupts = <69 0x2 0 0>;
+		};
+
+		crypto: crypto@300000 {
+			compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg		 = <0x300000 0x10000>;
+			ranges		 = <0 0x300000 0x10000>;
+			interrupts	 = <92 2 0 0>;
+
+			sec_jr0: jr@1000 {
+				compatible = "fsl,sec-v4.2-job-ring",
+					     "fsl,sec-v4.0-job-ring";
+				reg = <0x1000 0x1000>;
+				interrupts = <88 2 0 0>;
+			};
+
+			sec_jr1: jr@2000 {
+				compatible = "fsl,sec-v4.2-job-ring",
+					     "fsl,sec-v4.0-job-ring";
+				reg = <0x2000 0x1000>;
+				interrupts = <89 2 0 0>;
+			};
+
+			sec_jr2: jr@3000 {
+				compatible = "fsl,sec-v4.2-job-ring",
+					     "fsl,sec-v4.0-job-ring";
+				reg = <0x3000 0x1000>;
+				interrupts = <90 2 0 0>;
+			};
+
+			sec_jr3: jr@4000 {
+				compatible = "fsl,sec-v4.2-job-ring",
+					     "fsl,sec-v4.0-job-ring";
+				reg = <0x4000 0x1000>;
+				interrupts = <91 2 0 0>;
+			};
+
+			rtic@6000 {
+				compatible = "fsl,sec-v4.2-rtic",
+					     "fsl,sec-v4.0-rtic";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x6000 0x100>;
+				ranges = <0x0 0x6100 0xe00>;
+
+				rtic_a: rtic-a@0 {
+					compatible = "fsl,sec-v4.2-rtic-memory",
+						     "fsl,sec-v4.0-rtic-memory";
+					reg = <0x00 0x20 0x100 0x80>;
+				};
+
+				rtic_b: rtic-b@20 {
+					compatible = "fsl,sec-v4.2-rtic-memory",
+						     "fsl,sec-v4.0-rtic-memory";
+					reg = <0x20 0x20 0x200 0x80>;
+				};
+
+				rtic_c: rtic-c@40 {
+					compatible = "fsl,sec-v4.2-rtic-memory",
+						     "fsl,sec-v4.0-rtic-memory";
+					reg = <0x40 0x20 0x300 0x80>;
+				};
+
+				rtic_d: rtic-d@60 {
+					compatible = "fsl,sec-v4.2-rtic-memory",
+						     "fsl,sec-v4.0-rtic-memory";
+					reg = <0x60 0x20 0x500 0x80>;
+				};
+			};
+		};
+
+		sec_mon: sec_mon@314000 {
+			compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
+			reg = <0x314000 0x1000>;
+			interrupts = <93 2 0 0>;
+		};
+	};
+
+/*
+	rapidio0: rapidio@ffe0c0000
+*/
+
+	localbus@ffe124000 {
+		compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus";
+		interrupts = <25 2 0 0>;
+		#address-cells = <2>;
+		#size-cells = <1>;
+	};
+
+	pci0: pcie@ffe200000 {
+		compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+		device_type = "pci";
+		#size-cells = <2>;
+		#address-cells = <3>;
+		bus-range = <0x0 0xff>;
+		clock-frequency = <0x1fca055>;
+		fsl,msi = <&msi0>;
+		interrupts = <16 2 1 15>;
+
+		pcie@0 {
+			reg = <0 0 0 0 0>;
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			device_type = "pci";
+			interrupts = <16 2 1 15>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <
+				/* IDSEL 0x0 */
+				0000 0 0 1 &mpic 40 1 0 0
+				0000 0 0 2 &mpic 1 1 0 0
+				0000 0 0 3 &mpic 2 1 0 0
+				0000 0 0 4 &mpic 3 1 0 0
+				>;
+		};
+	};
+
+	pci1: pcie@ffe201000 {
+		compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+		device_type = "pci";
+		#size-cells = <2>;
+		#address-cells = <3>;
+		bus-range = <0 0xff>;
+		clock-frequency = <0x1fca055>;
+		fsl,msi = <&msi1>;
+		interrupts = <16 2 1 14>;
+		pcie@0 {
+			reg = <0 0 0 0 0>;
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			device_type = "pci";
+			interrupts = <16 2 1 14>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <
+				/* IDSEL 0x0 */
+				0000 0 0 1 &mpic 41 1 0 0
+				0000 0 0 2 &mpic 5 1 0 0
+				0000 0 0 3 &mpic 6 1 0 0
+				0000 0 0 4 &mpic 7 1 0 0
+				>;
+		};
+	};
+
+	pci2: pcie@ffe202000 {
+		compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+		device_type = "pci";
+		#size-cells = <2>;
+		#address-cells = <3>;
+		bus-range = <0x0 0xff>;
+		clock-frequency = <0x1fca055>;
+		fsl,msi = <&msi2>;
+		interrupts = <16 2 1 13>;
+		pcie@0 {
+			reg = <0 0 0 0 0>;
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			device_type = "pci";
+			interrupts = <16 2 1 13>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <
+				/* IDSEL 0x0 */
+				0000 0 0 1 &mpic 42 1 0 0
+				0000 0 0 2 &mpic 9 1 0 0
+				0000 0 0 3 &mpic 10 1 0 0
+				0000 0 0 4 &mpic 11 1 0 0
+				>;
+		};
+	};
+
+	pci3: pcie@ffe203000 {
+		compatible = "fsl,p5020-pcie", "fsl,qoriq-pcie-v2.2";
+		device_type = "pci";
+		#size-cells = <2>;
+		#address-cells = <3>;
+		bus-range = <0x0 0xff>;
+		clock-frequency = <0x1fca055>;
+		fsl,msi = <&msi2>;
+		interrupts = <16 2 1 12>;
+		pcie@0 {
+			reg = <0 0 0 0 0>;
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			device_type = "pci";
+			interrupts = <16 2 1 12>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <
+				/* IDSEL 0x0 */
+				0000 0 0 1 &mpic 43 1 0 0
+				0000 0 0 2 &mpic 0 1 0 0
+				0000 0 0 3 &mpic 4 1 0 0
+				0000 0 0 4 &mpic 8 1 0 0
+				>;
+		};
+	};
+};
-- 
1.7.3.4

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* [PATCH 1/2] powerpc/85xx: Add P3041 SoC device tree include stub
From: Kumar Gala @ 2011-06-27 13:44 UTC (permalink / raw)
  To: linuxppc-dev

Split out common (non-board specific) parts of the SoC related device
tree into a stub so multiple board dts files can include it and we can
reduce duplication and maintenance effort.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 arch/powerpc/boot/dts/p3041ds.dts  |  579 +-------------------------------
 arch/powerpc/boot/dts/p3041si.dtsi |  660 ++++++++++++++++++++++++++++++++++++
 2 files changed, 661 insertions(+), 578 deletions(-)
 create mode 100644 arch/powerpc/boot/dts/p3041si.dtsi

diff --git a/arch/powerpc/boot/dts/p3041ds.dts b/arch/powerpc/boot/dts/p3041ds.dts
index c2a1e3a..69cae67 100644
--- a/arch/powerpc/boot/dts/p3041ds.dts
+++ b/arch/powerpc/boot/dts/p3041ds.dts
@@ -32,7 +32,7 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
-/dts-v1/;
+/include/ "p3041si.dtsi"
 
 / {
 	model = "fsl,P3041DS";
@@ -41,300 +41,12 @@
 	#size-cells = <2>;
 	interrupt-parent = <&mpic>;
 
-	aliases {
-		ccsr = &soc;
-
-		serial0 = &serial0;
-		serial1 = &serial1;
-		serial2 = &serial2;
-		serial3 = &serial3;
-		pci0 = &pci0;
-		pci1 = &pci1;
-		pci2 = &pci2;
-		pci3 = &pci3;
-		usb0 = &usb0;
-		usb1 = &usb1;
-		dma0 = &dma0;
-		dma1 = &dma1;
-		sdhc = &sdhc;
-		msi0 = &msi0;
-		msi1 = &msi1;
-		msi2 = &msi2;
-
-		crypto = &crypto;
-		sec_jr0 = &sec_jr0;
-		sec_jr1 = &sec_jr1;
-		sec_jr2 = &sec_jr2;
-		sec_jr3 = &sec_jr3;
-		rtic_a = &rtic_a;
-		rtic_b = &rtic_b;
-		rtic_c = &rtic_c;
-		rtic_d = &rtic_d;
-		sec_mon = &sec_mon;
-	};
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu0: PowerPC,e500mc@0 {
-			device_type = "cpu";
-			reg = <0>;
-			next-level-cache = <&L2_0>;
-			L2_0: l2-cache {
-				next-level-cache = <&cpc>;
-			};
-		};
-		cpu1: PowerPC,e500mc@1 {
-			device_type = "cpu";
-			reg = <1>;
-			next-level-cache = <&L2_1>;
-			L2_1: l2-cache {
-				next-level-cache = <&cpc>;
-			};
-		};
-		cpu2: PowerPC,e500mc@2 {
-			device_type = "cpu";
-			reg = <2>;
-			next-level-cache = <&L2_2>;
-			L2_2: l2-cache {
-				next-level-cache = <&cpc>;
-			};
-		};
-		cpu3: PowerPC,e500mc@3 {
-			device_type = "cpu";
-			reg = <3>;
-			next-level-cache = <&L2_3>;
-			L2_3: l2-cache {
-				next-level-cache = <&cpc>;
-			};
-		};
-	};
-
 	memory {
 		device_type = "memory";
 	};
 
 	soc: soc@ffe000000 {
-		#address-cells = <1>;
-		#size-cells = <1>;
-		device_type = "soc";
-		compatible = "simple-bus";
-		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
-		reg = <0xf 0xfe000000 0 0x00001000>;
-
-		soc-sram-error {
-			compatible = "fsl,soc-sram-error";
-			interrupts = <16 2 1 29>;
-		};
-
-		corenet-law@0 {
-			compatible = "fsl,corenet-law";
-			reg = <0x0 0x1000>;
-			fsl,num-laws = <32>;
-		};
-
-		memory-controller@8000 {
-			compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
-			reg = <0x8000 0x1000>;
-			interrupts = <16 2 1 23>;
-		};
-
-		cpc: l3-cache-controller@10000 {
-			compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
-			reg = <0x10000 0x1000>;
-			interrupts = <16 2 1 27>;
-		};
-
-		corenet-cf@18000 {
-			compatible = "fsl,corenet-cf";
-			reg = <0x18000 0x1000>;
-			interrupts = <16 2 1 31>;
-			fsl,ccf-num-csdids = <32>;
-			fsl,ccf-num-snoopids = <32>;
-		};
-
-		iommu@20000 {
-			compatible = "fsl,pamu-v1.0", "fsl,pamu";
-			reg = <0x20000 0x4000>;
-			interrupts = <
-				24 2 0 0
-				16 2 1 30>;
-		};
-
-		mpic: pic@40000 {
-			clock-frequency = <0>;
-			interrupt-controller;
-			#address-cells = <0>;
-			#interrupt-cells = <4>;
-			reg = <0x40000 0x40000>;
-			compatible = "fsl,mpic", "chrp,open-pic";
-			device_type = "open-pic";
-		};
-
-		msi0: msi@41600 {
-			compatible = "fsl,mpic-msi";
-			reg = <0x41600 0x200>;
-			msi-available-ranges = <0 0x100>;
-			interrupts = <
-				0xe0 0 0 0
-				0xe1 0 0 0
-				0xe2 0 0 0
-				0xe3 0 0 0
-				0xe4 0 0 0
-				0xe5 0 0 0
-				0xe6 0 0 0
-				0xe7 0 0 0>;
-		};
-
-		msi1: msi@41800 {
-			compatible = "fsl,mpic-msi";
-			reg = <0x41800 0x200>;
-			msi-available-ranges = <0 0x100>;
-			interrupts = <
-				0xe8 0 0 0
-				0xe9 0 0 0
-				0xea 0 0 0
-				0xeb 0 0 0
-				0xec 0 0 0
-				0xed 0 0 0
-				0xee 0 0 0
-				0xef 0 0 0>;
-		};
-
-		msi2: msi@41a00 {
-			compatible = "fsl,mpic-msi";
-			reg = <0x41a00 0x200>;
-			msi-available-ranges = <0 0x100>;
-			interrupts = <
-				0xf0 0 0 0
-				0xf1 0 0 0
-				0xf2 0 0 0
-				0xf3 0 0 0
-				0xf4 0 0 0
-				0xf5 0 0 0
-				0xf6 0 0 0
-				0xf7 0 0 0>;
-		};
-
-		guts: global-utilities@e0000 {
-			compatible = "fsl,qoriq-device-config-1.0";
-			reg = <0xe0000 0xe00>;
-			fsl,has-rstcr;
-			#sleep-cells = <1>;
-			fsl,liodn-bits = <12>;
-		};
-
-		pins: global-utilities@e0e00 {
-			compatible = "fsl,qoriq-pin-control-1.0";
-			reg = <0xe0e00 0x200>;
-			#sleep-cells = <2>;
-		};
-
-		clockgen: global-utilities@e1000 {
-			compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
-			reg = <0xe1000 0x1000>;
-			clock-frequency = <0>;
-		};
-
-		rcpm: global-utilities@e2000 {
-			compatible = "fsl,qoriq-rcpm-1.0";
-			reg = <0xe2000 0x1000>;
-			#sleep-cells = <1>;
-		};
-
-		sfp: sfp@e8000 {
-			compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
-			reg	   = <0xe8000 0x1000>;
-		};
-
-		serdes: serdes@ea000 {
-			compatible = "fsl,p3041-serdes";
-			reg	   = <0xea000 0x1000>;
-		};
-
-		dma0: dma@100300 {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "fsl,p3041-dma", "fsl,eloplus-dma";
-			reg = <0x100300 0x4>;
-			ranges = <0x0 0x100100 0x200>;
-			cell-index = <0>;
-			dma-channel@0 {
-				compatible = "fsl,p3041-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x0 0x80>;
-				cell-index = <0>;
-				interrupts = <28 2 0 0>;
-			};
-			dma-channel@80 {
-				compatible = "fsl,p3041-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x80 0x80>;
-				cell-index = <1>;
-				interrupts = <29 2 0 0>;
-			};
-			dma-channel@100 {
-				compatible = "fsl,p3041-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x100 0x80>;
-				cell-index = <2>;
-				interrupts = <30 2 0 0>;
-			};
-			dma-channel@180 {
-				compatible = "fsl,p3041-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x180 0x80>;
-				cell-index = <3>;
-				interrupts = <31 2 0 0>;
-			};
-		};
-
-		dma1: dma@101300 {
-			#address-cells = <1>;
-			#size-cells = <1>;
-			compatible = "fsl,p3041-dma", "fsl,eloplus-dma";
-			reg = <0x101300 0x4>;
-			ranges = <0x0 0x101100 0x200>;
-			cell-index = <1>;
-			dma-channel@0 {
-				compatible = "fsl,p3041-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x0 0x80>;
-				cell-index = <0>;
-				interrupts = <32 2 0 0>;
-			};
-			dma-channel@80 {
-				compatible = "fsl,p3041-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x80 0x80>;
-				cell-index = <1>;
-				interrupts = <33 2 0 0>;
-			};
-			dma-channel@100 {
-				compatible = "fsl,p3041-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x100 0x80>;
-				cell-index = <2>;
-				interrupts = <34 2 0 0>;
-			};
-			dma-channel@180 {
-				compatible = "fsl,p3041-dma-channel",
-						"fsl,eloplus-dma-channel";
-				reg = <0x180 0x80>;
-				cell-index = <3>;
-				interrupts = <35 2 0 0>;
-			};
-		};
-
 		spi@110000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			compatible = "fsl,p3041-espi", "fsl,mpc8536-espi";
-			reg = <0x110000 0x1000>;
-			interrupts = <53 0x2 0 0>;
-			fsl,espi-num-chipselects = <4>;
-
 			flash@0 {
 				#address-cells = <1>;
 				#size-cells = <1>;
@@ -363,32 +75,7 @@
 			};
 		};
 
-		sdhc: sdhc@114000 {
-			compatible = "fsl,p3041-esdhc", "fsl,esdhc";
-			reg = <0x114000 0x1000>;
-			interrupts = <48 2 0 0>;
-			sdhci,auto-cmd12;
-			clock-frequency = <0>;
-		};
-
-		i2c@118000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			cell-index = <0>;
-			compatible = "fsl-i2c";
-			reg = <0x118000 0x100>;
-			interrupts = <38 2 0 0>;
-			dfsrr;
-		};
-
 		i2c@118100 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			cell-index = <1>;
-			compatible = "fsl-i2c";
-			reg = <0x118100 0x100>;
-			interrupts = <38 2 0 0>;
-			dfsrr;
 			eeprom@51 {
 				compatible = "at24,24c256";
 				reg = <0x51>;
@@ -399,193 +86,17 @@
 			};
 		};
 
-		i2c@119000 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			cell-index = <2>;
-			compatible = "fsl-i2c";
-			reg = <0x119000 0x100>;
-			interrupts = <39 2 0 0>;
-			dfsrr;
-		};
-
 		i2c@119100 {
-			#address-cells = <1>;
-			#size-cells = <0>;
-			cell-index = <3>;
-			compatible = "fsl-i2c";
-			reg = <0x119100 0x100>;
-			interrupts = <39 2 0 0>;
-			dfsrr;
 			rtc@68 {
 				compatible = "dallas,ds3232";
 				reg = <0x68>;
 				interrupts = <0x1 0x1 0 0>;
 			};
 		};
-
-		serial0: serial@11c500 {
-			cell-index = <0>;
-			device_type = "serial";
-			compatible = "ns16550";
-			reg = <0x11c500 0x100>;
-			clock-frequency = <0>;
-			interrupts = <36 2 0 0>;
-		};
-
-		serial1: serial@11c600 {
-			cell-index = <1>;
-			device_type = "serial";
-			compatible = "ns16550";
-			reg = <0x11c600 0x100>;
-			clock-frequency = <0>;
-			interrupts = <36 2 0 0>;
-		};
-
-		serial2: serial@11d500 {
-			cell-index = <2>;
-			device_type = "serial";
-			compatible = "ns16550";
-			reg = <0x11d500 0x100>;
-			clock-frequency = <0>;
-			interrupts = <37 2 0 0>;
-		};
-
-		serial3: serial@11d600 {
-			cell-index = <3>;
-			device_type = "serial";
-			compatible = "ns16550";
-			reg = <0x11d600 0x100>;
-			clock-frequency = <0>;
-			interrupts = <37 2 0 0>;
-		};
-
-		gpio0: gpio@130000 {
-			compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio";
-			reg = <0x130000 0x1000>;
-			interrupts = <55 2 0 0>;
-			#gpio-cells = <2>;
-			gpio-controller;
-		};
-
-		usb0: usb@210000 {
-			compatible = "fsl,p3041-usb2-mph",
-					"fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
-			reg = <0x210000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			interrupts = <44 0x2 0 0>;
-			phy_type = "utmi";
-			port0;
-		};
-
-		usb1: usb@211000 {
-			compatible = "fsl,p3041-usb2-dr",
-					"fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
-			reg = <0x211000 0x1000>;
-			#address-cells = <1>;
-			#size-cells = <0>;
-			interrupts = <45 0x2 0 0>;
-			dr_mode = "host";
-			phy_type = "utmi";
-		};
-
-		sata@220000 {
-			compatible = "fsl,p3041-sata", "fsl,pq-sata-v2";
-			reg = <0x220000 0x1000>;
-			interrupts = <68 0x2 0 0>;
-		};
-
-		sata@221000 {
-			compatible = "fsl,p3041-sata", "fsl,pq-sata-v2";
-			reg = <0x221000 0x1000>;
-			interrupts = <69 0x2 0 0>;
-		};
-
-		crypto: crypto@300000 {
-			compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
-			#address-cells = <1>;
-			#size-cells = <1>;
-			reg = <0x300000 0x10000>;
-			ranges = <0 0x300000 0x10000>;
-			interrupts = <92 2 0 0>;
-
-			sec_jr0: jr@1000 {
-				compatible = "fsl,sec-v4.2-job-ring",
-					     "fsl,sec-v4.0-job-ring";
-				reg = <0x1000 0x1000>;
-				interrupts = <88 2 0 0>;
-			};
-
-			sec_jr1: jr@2000 {
-				compatible = "fsl,sec-v4.2-job-ring",
-					     "fsl,sec-v4.0-job-ring";
-				reg = <0x2000 0x1000>;
-				interrupts = <89 2 0 0>;
-			};
-
-			sec_jr2: jr@3000 {
-				compatible = "fsl,sec-v4.2-job-ring",
-					     "fsl,sec-v4.0-job-ring";
-				reg = <0x3000 0x1000>;
-				interrupts = <90 2 0 0>;
-			};
-
-			sec_jr3: jr@4000 {
-				compatible = "fsl,sec-v4.2-job-ring",
-					     "fsl,sec-v4.0-job-ring";
-				reg = <0x4000 0x1000>;
-				interrupts = <91 2 0 0>;
-			};
-
-			rtic@6000 {
-				compatible = "fsl,sec-v4.2-rtic",
-					     "fsl,sec-v4.0-rtic";
-				#address-cells = <1>;
-				#size-cells = <1>;
-				reg = <0x6000 0x100>;
-				ranges = <0x0 0x6100 0xe00>;
-
-				rtic_a: rtic-a@0 {
-					compatible = "fsl,sec-v4.2-rtic-memory",
-						     "fsl,sec-v4.0-rtic-memory";
-					reg = <0x00 0x20 0x100 0x80>;
-				};
-
-				rtic_b: rtic-b@20 {
-					compatible = "fsl,sec-v4.2-rtic-memory",
-						     "fsl,sec-v4.0-rtic-memory";
-					reg = <0x20 0x20 0x200 0x80>;
-				};
-
-				rtic_c: rtic-c@40 {
-					compatible = "fsl,sec-v4.2-rtic-memory",
-						     "fsl,sec-v4.0-rtic-memory";
-					reg = <0x40 0x20 0x300 0x80>;
-				};
-
-				rtic_d: rtic-d@60 {
-					compatible = "fsl,sec-v4.2-rtic-memory",
-						     "fsl,sec-v4.0-rtic-memory";
-					reg = <0x60 0x20 0x500 0x80>;
-				};
-			};
-		};
-
-		sec_mon: sec_mon@314000 {
-			compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
-			reg = <0x314000 0x1000>;
-			interrupts = <93 2 0 0>;
-		};
 	};
 
 	localbus@ffe124000 {
-		compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
 		reg = <0xf 0xfe124000 0 0x1000>;
-		interrupts = <25 2 0 0>;
-		#address-cells = <2>;
-		#size-cells = <1>;
-
 		ranges = <0 0 0xf 0xe8000000 0x08000000
 			  2 0 0xf 0xffa00000 0x00040000
 			  3 0 0xf 0xffdf0000 0x00008000>;
@@ -642,32 +153,10 @@
 	};
 
 	pci0: pcie@ffe200000 {
-		compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
-		device_type = "pci";
-		#size-cells = <2>;
-		#address-cells = <3>;
 		reg = <0xf 0xfe200000 0 0x1000>;
-		bus-range = <0x0 0xff>;
 		ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
 			  0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
-		clock-frequency = <0x1fca055>;
-		fsl,msi = <&msi0>;
-		interrupts = <16 2 1 15>;
 		pcie@0 {
-			reg = <0 0 0 0 0>;
-			#interrupt-cells = <1>;
-			#size-cells = <2>;
-			#address-cells = <3>;
-			device_type = "pci";
-			interrupts = <16 2 1 15>;
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <
-				/* IDSEL 0x0 */
-				0000 0 0 1 &mpic 40 1 0 0
-				0000 0 0 2 &mpic 1 1 0 0
-				0000 0 0 3 &mpic 2 1 0 0
-				0000 0 0 4 &mpic 3 1 0 0
-				>;
 			ranges = <0x02000000 0 0xe0000000
 				  0x02000000 0 0xe0000000
 				  0 0x20000000
@@ -679,32 +168,10 @@
 	};
 
 	pci1: pcie@ffe201000 {
-		compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
-		device_type = "pci";
-		#size-cells = <2>;
-		#address-cells = <3>;
 		reg = <0xf 0xfe201000 0 0x1000>;
-		bus-range = <0 0xff>;
 		ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
 			  0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
-		clock-frequency = <0x1fca055>;
-		fsl,msi = <&msi1>;
-		interrupts = <16 2 1 14>;
 		pcie@0 {
-			reg = <0 0 0 0 0>;
-			#interrupt-cells = <1>;
-			#size-cells = <2>;
-			#address-cells = <3>;
-			device_type = "pci";
-			interrupts = <16 2 1 14>;
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <
-				/* IDSEL 0x0 */
-				0000 0 0 1 &mpic 41 1 0 0
-				0000 0 0 2 &mpic 5 1 0 0
-				0000 0 0 3 &mpic 6 1 0 0
-				0000 0 0 4 &mpic 7 1 0 0
-				>;
 			ranges = <0x02000000 0 0xe0000000
 				  0x02000000 0 0xe0000000
 				  0 0x20000000
@@ -716,32 +183,10 @@
 	};
 
 	pci2: pcie@ffe202000 {
-		compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
-		device_type = "pci";
-		#size-cells = <2>;
-		#address-cells = <3>;
 		reg = <0xf 0xfe202000 0 0x1000>;
-		bus-range = <0x0 0xff>;
 		ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
 			  0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
-		clock-frequency = <0x1fca055>;
-		fsl,msi = <&msi2>;
-		interrupts = <16 2 1 13>;
 		pcie@0 {
-			reg = <0 0 0 0 0>;
-			#interrupt-cells = <1>;
-			#size-cells = <2>;
-			#address-cells = <3>;
-			device_type = "pci";
-			interrupts = <16 2 1 13>;
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <
-				/* IDSEL 0x0 */
-				0000 0 0 1 &mpic 42 1 0 0
-				0000 0 0 2 &mpic 9 1 0 0
-				0000 0 0 3 &mpic 10 1 0 0
-				0000 0 0 4 &mpic 11 1 0 0
-				>;
 			ranges = <0x02000000 0 0xe0000000
 				  0x02000000 0 0xe0000000
 				  0 0x20000000
@@ -753,32 +198,10 @@
 	};
 
 	pci3: pcie@ffe203000 {
-		compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
-		device_type = "pci";
-		#size-cells = <2>;
-		#address-cells = <3>;
 		reg = <0xf 0xfe203000 0 0x1000>;
-		bus-range = <0x0 0xff>;
 		ranges = <0x02000000 0 0xe0000000 0xc 0x60000000 0 0x20000000
 			  0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>;
-		clock-frequency = <0x1fca055>;
-		fsl,msi = <&msi2>;
-		interrupts = <16 2 1 12>;
 		pcie@0 {
-			reg = <0 0 0 0 0>;
-			#interrupt-cells = <1>;
-			#size-cells = <2>;
-			#address-cells = <3>;
-			device_type = "pci";
-			interrupts = <16 2 1 12>;
-			interrupt-map-mask = <0xf800 0 0 7>;
-			interrupt-map = <
-				/* IDSEL 0x0 */
-				0000 0 0 1 &mpic 43 1 0 0
-				0000 0 0 2 &mpic 0 1 0 0
-				0000 0 0 3 &mpic 4 1 0 0
-				0000 0 0 4 &mpic 8 1 0 0
-				>;
 			ranges = <0x02000000 0 0xe0000000
 				  0x02000000 0 0xe0000000
 				  0 0x20000000
diff --git a/arch/powerpc/boot/dts/p3041si.dtsi b/arch/powerpc/boot/dts/p3041si.dtsi
new file mode 100644
index 0000000..8b69580
--- /dev/null
+++ b/arch/powerpc/boot/dts/p3041si.dtsi
@@ -0,0 +1,660 @@
+/*
+ * P3041 Silicon Device Tree Source
+ *
+ * Copyright 2010-2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/ {
+	compatible = "fsl,P3041";
+	#address-cells = <2>;
+	#size-cells = <2>;
+	interrupt-parent = <&mpic>;
+
+	aliases {
+		ccsr = &soc;
+
+		serial0 = &serial0;
+		serial1 = &serial1;
+		serial2 = &serial2;
+		serial3 = &serial3;
+		pci0 = &pci0;
+		pci1 = &pci1;
+		pci2 = &pci2;
+		pci3 = &pci3;
+		usb0 = &usb0;
+		usb1 = &usb1;
+		dma0 = &dma0;
+		dma1 = &dma1;
+		sdhc = &sdhc;
+		msi0 = &msi0;
+		msi1 = &msi1;
+		msi2 = &msi2;
+
+		crypto = &crypto;
+		sec_jr0 = &sec_jr0;
+		sec_jr1 = &sec_jr1;
+		sec_jr2 = &sec_jr2;
+		sec_jr3 = &sec_jr3;
+		rtic_a = &rtic_a;
+		rtic_b = &rtic_b;
+		rtic_c = &rtic_c;
+		rtic_d = &rtic_d;
+		sec_mon = &sec_mon;
+
+/*
+		rio0 = &rapidio0;
+ */
+	};
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: PowerPC,e500mc@0 {
+			device_type = "cpu";
+			reg = <0>;
+			next-level-cache = <&L2_0>;
+			L2_0: l2-cache {
+				next-level-cache = <&cpc>;
+			};
+		};
+		cpu1: PowerPC,e500mc@1 {
+			device_type = "cpu";
+			reg = <1>;
+			next-level-cache = <&L2_1>;
+			L2_1: l2-cache {
+				next-level-cache = <&cpc>;
+			};
+		};
+		cpu2: PowerPC,e500mc@2 {
+			device_type = "cpu";
+			reg = <2>;
+			next-level-cache = <&L2_2>;
+			L2_2: l2-cache {
+				next-level-cache = <&cpc>;
+			};
+		};
+		cpu3: PowerPC,e500mc@3 {
+			device_type = "cpu";
+			reg = <3>;
+			next-level-cache = <&L2_3>;
+			L2_3: l2-cache {
+				next-level-cache = <&cpc>;
+			};
+		};
+	};
+
+	soc: soc@ffe000000 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		device_type = "soc";
+		compatible = "simple-bus";
+		ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+		reg = <0xf 0xfe000000 0 0x00001000>;
+
+		soc-sram-error {
+			compatible = "fsl,soc-sram-error";
+			interrupts = <16 2 1 29>;
+		};
+
+		corenet-law@0 {
+			compatible = "fsl,corenet-law";
+			reg = <0x0 0x1000>;
+			fsl,num-laws = <32>;
+		};
+
+		memory-controller@8000 {
+			compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
+			reg = <0x8000 0x1000>;
+			interrupts = <16 2 1 23>;
+		};
+
+		cpc: l3-cache-controller@10000 {
+			compatible = "fsl,p3041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
+			reg = <0x10000 0x1000>;
+			interrupts = <16 2 1 27>;
+		};
+
+		corenet-cf@18000 {
+			compatible = "fsl,corenet-cf";
+			reg = <0x18000 0x1000>;
+			interrupts = <16 2 1 31>;
+			fsl,ccf-num-csdids = <32>;
+			fsl,ccf-num-snoopids = <32>;
+		};
+
+		iommu@20000 {
+			compatible = "fsl,pamu-v1.0", "fsl,pamu";
+			reg = <0x20000 0x4000>;
+			interrupts = <
+				24 2 0 0
+				16 2 1 30>;
+		};
+
+		mpic: pic@40000 {
+			clock-frequency = <0>;
+			interrupt-controller;
+			#address-cells = <0>;
+			#interrupt-cells = <4>;
+			reg = <0x40000 0x40000>;
+			compatible = "fsl,mpic", "chrp,open-pic";
+			device_type = "open-pic";
+		};
+
+		msi0: msi@41600 {
+			compatible = "fsl,mpic-msi";
+			reg = <0x41600 0x200>;
+			msi-available-ranges = <0 0x100>;
+			interrupts = <
+				0xe0 0 0 0
+				0xe1 0 0 0
+				0xe2 0 0 0
+				0xe3 0 0 0
+				0xe4 0 0 0
+				0xe5 0 0 0
+				0xe6 0 0 0
+				0xe7 0 0 0>;
+		};
+
+		msi1: msi@41800 {
+			compatible = "fsl,mpic-msi";
+			reg = <0x41800 0x200>;
+			msi-available-ranges = <0 0x100>;
+			interrupts = <
+				0xe8 0 0 0
+				0xe9 0 0 0
+				0xea 0 0 0
+				0xeb 0 0 0
+				0xec 0 0 0
+				0xed 0 0 0
+				0xee 0 0 0
+				0xef 0 0 0>;
+		};
+
+		msi2: msi@41a00 {
+			compatible = "fsl,mpic-msi";
+			reg = <0x41a00 0x200>;
+			msi-available-ranges = <0 0x100>;
+			interrupts = <
+				0xf0 0 0 0
+				0xf1 0 0 0
+				0xf2 0 0 0
+				0xf3 0 0 0
+				0xf4 0 0 0
+				0xf5 0 0 0
+				0xf6 0 0 0
+				0xf7 0 0 0>;
+		};
+
+		guts: global-utilities@e0000 {
+			compatible = "fsl,qoriq-device-config-1.0";
+			reg = <0xe0000 0xe00>;
+			fsl,has-rstcr;
+			#sleep-cells = <1>;
+			fsl,liodn-bits = <12>;
+		};
+
+		pins: global-utilities@e0e00 {
+			compatible = "fsl,qoriq-pin-control-1.0";
+			reg = <0xe0e00 0x200>;
+			#sleep-cells = <2>;
+		};
+
+		clockgen: global-utilities@e1000 {
+			compatible = "fsl,p3041-clockgen", "fsl,qoriq-clockgen-1.0";
+			reg = <0xe1000 0x1000>;
+			clock-frequency = <0>;
+		};
+
+		rcpm: global-utilities@e2000 {
+			compatible = "fsl,qoriq-rcpm-1.0";
+			reg = <0xe2000 0x1000>;
+			#sleep-cells = <1>;
+		};
+
+		sfp: sfp@e8000 {
+			compatible = "fsl,p3041-sfp", "fsl,qoriq-sfp-1.0";
+			reg	   = <0xe8000 0x1000>;
+		};
+
+		serdes: serdes@ea000 {
+			compatible = "fsl,p3041-serdes";
+			reg	   = <0xea000 0x1000>;
+		};
+
+		dma0: dma@100300 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,p3041-dma", "fsl,eloplus-dma";
+			reg = <0x100300 0x4>;
+			ranges = <0x0 0x100100 0x200>;
+			cell-index = <0>;
+			dma-channel@0 {
+				compatible = "fsl,p3041-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x0 0x80>;
+				cell-index = <0>;
+				interrupts = <28 2 0 0>;
+			};
+			dma-channel@80 {
+				compatible = "fsl,p3041-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x80 0x80>;
+				cell-index = <1>;
+				interrupts = <29 2 0 0>;
+			};
+			dma-channel@100 {
+				compatible = "fsl,p3041-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x100 0x80>;
+				cell-index = <2>;
+				interrupts = <30 2 0 0>;
+			};
+			dma-channel@180 {
+				compatible = "fsl,p3041-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x180 0x80>;
+				cell-index = <3>;
+				interrupts = <31 2 0 0>;
+			};
+		};
+
+		dma1: dma@101300 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "fsl,p3041-dma", "fsl,eloplus-dma";
+			reg = <0x101300 0x4>;
+			ranges = <0x0 0x101100 0x200>;
+			cell-index = <1>;
+			dma-channel@0 {
+				compatible = "fsl,p3041-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x0 0x80>;
+				cell-index = <0>;
+				interrupts = <32 2 0 0>;
+			};
+			dma-channel@80 {
+				compatible = "fsl,p3041-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x80 0x80>;
+				cell-index = <1>;
+				interrupts = <33 2 0 0>;
+			};
+			dma-channel@100 {
+				compatible = "fsl,p3041-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x100 0x80>;
+				cell-index = <2>;
+				interrupts = <34 2 0 0>;
+			};
+			dma-channel@180 {
+				compatible = "fsl,p3041-dma-channel",
+						"fsl,eloplus-dma-channel";
+				reg = <0x180 0x80>;
+				cell-index = <3>;
+				interrupts = <35 2 0 0>;
+			};
+		};
+
+		spi@110000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			compatible = "fsl,p3041-espi", "fsl,mpc8536-espi";
+			reg = <0x110000 0x1000>;
+			interrupts = <53 0x2 0 0>;
+			fsl,espi-num-chipselects = <4>;
+		};
+
+		sdhc: sdhc@114000 {
+			compatible = "fsl,p3041-esdhc", "fsl,esdhc";
+			reg = <0x114000 0x1000>;
+			interrupts = <48 2 0 0>;
+			sdhci,auto-cmd12;
+			clock-frequency = <0>;
+		};
+
+		i2c@118000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			cell-index = <0>;
+			compatible = "fsl-i2c";
+			reg = <0x118000 0x100>;
+			interrupts = <38 2 0 0>;
+			dfsrr;
+		};
+
+		i2c@118100 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			cell-index = <1>;
+			compatible = "fsl-i2c";
+			reg = <0x118100 0x100>;
+			interrupts = <38 2 0 0>;
+			dfsrr;
+		};
+
+		i2c@119000 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			cell-index = <2>;
+			compatible = "fsl-i2c";
+			reg = <0x119000 0x100>;
+			interrupts = <39 2 0 0>;
+			dfsrr;
+		};
+
+		i2c@119100 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			cell-index = <3>;
+			compatible = "fsl-i2c";
+			reg = <0x119100 0x100>;
+			interrupts = <39 2 0 0>;
+			dfsrr;
+		};
+
+		serial0: serial@11c500 {
+			cell-index = <0>;
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x11c500 0x100>;
+			clock-frequency = <0>;
+			interrupts = <36 2 0 0>;
+		};
+
+		serial1: serial@11c600 {
+			cell-index = <1>;
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x11c600 0x100>;
+			clock-frequency = <0>;
+			interrupts = <36 2 0 0>;
+		};
+
+		serial2: serial@11d500 {
+			cell-index = <2>;
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x11d500 0x100>;
+			clock-frequency = <0>;
+			interrupts = <37 2 0 0>;
+		};
+
+		serial3: serial@11d600 {
+			cell-index = <3>;
+			device_type = "serial";
+			compatible = "ns16550";
+			reg = <0x11d600 0x100>;
+			clock-frequency = <0>;
+			interrupts = <37 2 0 0>;
+		};
+
+		gpio0: gpio@130000 {
+			compatible = "fsl,p3041-gpio", "fsl,qoriq-gpio";
+			reg = <0x130000 0x1000>;
+			interrupts = <55 2 0 0>;
+			#gpio-cells = <2>;
+			gpio-controller;
+		};
+
+		usb0: usb@210000 {
+			compatible = "fsl,p3041-usb2-mph",
+					"fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
+			reg = <0x210000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <44 0x2 0 0>;
+			phy_type = "utmi";
+			port0;
+		};
+
+		usb1: usb@211000 {
+			compatible = "fsl,p3041-usb2-dr",
+					"fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
+			reg = <0x211000 0x1000>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			interrupts = <45 0x2 0 0>;
+			dr_mode = "host";
+			phy_type = "utmi";
+		};
+
+		sata@220000 {
+			compatible = "fsl,p3041-sata", "fsl,pq-sata-v2";
+			reg = <0x220000 0x1000>;
+			interrupts = <68 0x2 0 0>;
+		};
+
+		sata@221000 {
+			compatible = "fsl,p3041-sata", "fsl,pq-sata-v2";
+			reg = <0x221000 0x1000>;
+			interrupts = <69 0x2 0 0>;
+		};
+
+		crypto: crypto@300000 {
+			compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			reg		 = <0x300000 0x10000>;
+			ranges		 = <0 0x300000 0x10000>;
+			interrupts	 = <92 2 0 0>;
+
+			sec_jr0: jr@1000 {
+				compatible = "fsl,sec-v4.2-job-ring",
+					     "fsl,sec-v4.0-job-ring";
+				reg = <0x1000 0x1000>;
+				interrupts = <88 2 0 0>;
+			};
+
+			sec_jr1: jr@2000 {
+				compatible = "fsl,sec-v4.2-job-ring",
+					     "fsl,sec-v4.0-job-ring";
+				reg = <0x2000 0x1000>;
+				interrupts = <89 2 0 0>;
+			};
+
+			sec_jr2: jr@3000 {
+				compatible = "fsl,sec-v4.2-job-ring",
+					     "fsl,sec-v4.0-job-ring";
+				reg = <0x3000 0x1000>;
+				interrupts = <90 2 0 0>;
+			};
+
+			sec_jr3: jr@4000 {
+				compatible = "fsl,sec-v4.2-job-ring",
+					     "fsl,sec-v4.0-job-ring";
+				reg = <0x4000 0x1000>;
+				interrupts = <91 2 0 0>;
+			};
+
+			rtic@6000 {
+				compatible = "fsl,sec-v4.2-rtic",
+					     "fsl,sec-v4.0-rtic";
+				#address-cells = <1>;
+				#size-cells = <1>;
+				reg = <0x6000 0x100>;
+				ranges = <0x0 0x6100 0xe00>;
+
+				rtic_a: rtic-a@0 {
+					compatible = "fsl,sec-v4.2-rtic-memory",
+						     "fsl,sec-v4.0-rtic-memory";
+					reg = <0x00 0x20 0x100 0x80>;
+				};
+
+				rtic_b: rtic-b@20 {
+					compatible = "fsl,sec-v4.2-rtic-memory",
+						     "fsl,sec-v4.0-rtic-memory";
+					reg = <0x20 0x20 0x200 0x80>;
+				};
+
+				rtic_c: rtic-c@40 {
+					compatible = "fsl,sec-v4.2-rtic-memory",
+						     "fsl,sec-v4.0-rtic-memory";
+					reg = <0x40 0x20 0x300 0x80>;
+				};
+
+				rtic_d: rtic-d@60 {
+					compatible = "fsl,sec-v4.2-rtic-memory",
+						     "fsl,sec-v4.0-rtic-memory";
+					reg = <0x60 0x20 0x500 0x80>;
+				};
+			};
+		};
+
+		sec_mon: sec_mon@314000 {
+			compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
+			reg = <0x314000 0x1000>;
+			interrupts = <93 2 0 0>;
+		};
+	};
+
+/*
+	rapidio0: rapidio@ffe0c0000
+*/
+
+	localbus@ffe124000 {
+		compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus";
+		interrupts = <25 2 0 0>;
+		#address-cells = <2>;
+		#size-cells = <1>;
+	};
+
+	pci0: pcie@ffe200000 {
+		compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+		device_type = "pci";
+		#size-cells = <2>;
+		#address-cells = <3>;
+		bus-range = <0x0 0xff>;
+		clock-frequency = <0x1fca055>;
+		fsl,msi = <&msi0>;
+		interrupts = <16 2 1 15>;
+
+		pcie@0 {
+			reg = <0 0 0 0 0>;
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			device_type = "pci";
+			interrupts = <16 2 1 15>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <
+				/* IDSEL 0x0 */
+				0000 0 0 1 &mpic 40 1 0 0
+				0000 0 0 2 &mpic 1 1 0 0
+				0000 0 0 3 &mpic 2 1 0 0
+				0000 0 0 4 &mpic 3 1 0 0
+				>;
+		};
+	};
+
+	pci1: pcie@ffe201000 {
+		compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+		device_type = "pci";
+		#size-cells = <2>;
+		#address-cells = <3>;
+		bus-range = <0 0xff>;
+		clock-frequency = <0x1fca055>;
+		fsl,msi = <&msi1>;
+		interrupts = <16 2 1 14>;
+		pcie@0 {
+			reg = <0 0 0 0 0>;
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			device_type = "pci";
+			interrupts = <16 2 1 14>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <
+				/* IDSEL 0x0 */
+				0000 0 0 1 &mpic 41 1 0 0
+				0000 0 0 2 &mpic 5 1 0 0
+				0000 0 0 3 &mpic 6 1 0 0
+				0000 0 0 4 &mpic 7 1 0 0
+				>;
+		};
+	};
+
+	pci2: pcie@ffe202000 {
+		compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+		device_type = "pci";
+		#size-cells = <2>;
+		#address-cells = <3>;
+		bus-range = <0x0 0xff>;
+		clock-frequency = <0x1fca055>;
+		fsl,msi = <&msi2>;
+		interrupts = <16 2 1 13>;
+		pcie@0 {
+			reg = <0 0 0 0 0>;
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			device_type = "pci";
+			interrupts = <16 2 1 13>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <
+				/* IDSEL 0x0 */
+				0000 0 0 1 &mpic 42 1 0 0
+				0000 0 0 2 &mpic 9 1 0 0
+				0000 0 0 3 &mpic 10 1 0 0
+				0000 0 0 4 &mpic 11 1 0 0
+				>;
+		};
+	};
+
+	pci3: pcie@ffe203000 {
+		compatible = "fsl,p3041-pcie", "fsl,qoriq-pcie-v2.2";
+		device_type = "pci";
+		#size-cells = <2>;
+		#address-cells = <3>;
+		bus-range = <0x0 0xff>;
+		clock-frequency = <0x1fca055>;
+		fsl,msi = <&msi2>;
+		interrupts = <16 2 1 12>;
+		pcie@0 {
+			reg = <0 0 0 0 0>;
+			#interrupt-cells = <1>;
+			#size-cells = <2>;
+			#address-cells = <3>;
+			device_type = "pci";
+			interrupts = <16 2 1 12>;
+			interrupt-map-mask = <0xf800 0 0 7>;
+			interrupt-map = <
+				/* IDSEL 0x0 */
+				0000 0 0 1 &mpic 43 1 0 0
+				0000 0 0 2 &mpic 0 1 0 0
+				0000 0 0 3 &mpic 4 1 0 0
+				0000 0 0 4 &mpic 8 1 0 0
+				>;
+		};
+	};
+};
-- 
1.7.3.4

^ permalink raw reply related

* Re: [PATCH] powerpc/85xx: clamp the P1022DS DIU pixel clock to allowed values
From: Kumar Gala @ 2011-06-27 13:35 UTC (permalink / raw)
  To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1308858535-17396-1-git-send-email-timur@freescale.com>


On Jun 23, 2011, at 2:48 PM, Timur Tabi wrote:

> To ensure that the DIU pixel clock will not be set to an invalid value,
> clamp the PXCLK divider to the allowed range (2-255).  This also acts as
> a limiter for the pixel clock.
> 
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/platforms/85xx/p1022_ds.c |    7 ++++++-
> 1 files changed, 6 insertions(+), 1 deletions(-)


applied to next

- K

^ permalink raw reply

* Re: [PATCH] powerpc/85xx: enable the framebuffer console for the defconfigs
From: Kumar Gala @ 2011-06-27 13:35 UTC (permalink / raw)
  To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1308858535-17396-2-git-send-email-timur@freescale.com>


On Jun 23, 2011, at 2:48 PM, Timur Tabi wrote:

> Enable framebuffer console support by default in the defconfigs for the
> Freescale 85xx-based reference board.  This allows the boot messages to
> be shown on the video display on the P1022DS.
> 
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/configs/mpc85xx_defconfig     |    4 ++++
> arch/powerpc/configs/mpc85xx_smp_defconfig |    4 ++++
> 2 files changed, 8 insertions(+), 0 deletions(-)

applied to next

- K

^ permalink raw reply

* Re: [PATCH 1/2] powerpc/86xx: enable the framebuffer console on the MPC8610 HPCD
From: Kumar Gala @ 2011-06-27 13:35 UTC (permalink / raw)
  To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1308845808-11392-1-git-send-email-timur@freescale.com>


On Jun 23, 2011, at 11:16 AM, Timur Tabi wrote:

> Enable framebuffer console support by default in the defconfig on the
> Freescale MPC8610 HPCD reference board.  This allows the boot messages to
> be shown on the video display.
> 
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig |    5 +++++
> 1 files changed, 5 insertions(+), 0 deletions(-)

applied to next

- K

^ permalink raw reply

* Re: [PATCH] powerpc/85xx: Add P4080 SoC device tree include stub
From: Kumar Gala @ 2011-06-27 13:35 UTC (permalink / raw)
  To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <1308830770-1954-1-git-send-email-galak@kernel.crashing.org>


On Jun 23, 2011, at 7:06 AM, Kumar Gala wrote:

> Split out common (non-board specific) parts of the SoC related device
> tree into a stub so multiple board dts files can include it and we can
> reduce duplication and maintenance effort.
>=20
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/boot/dts/p4080ds.dts  |  588 =
+--------------------------------
> arch/powerpc/boot/dts/p4080si.dtsi |  661 =
++++++++++++++++++++++++++++++++++++
> 2 files changed, 662 insertions(+), 587 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/p4080si.dtsi

applied to next

- K=

^ permalink raw reply

* Re: [PATCH] powerpc/e500mc: Add support for the wait instruction in e500_idle
From: Kumar Gala @ 2011-06-27 13:35 UTC (permalink / raw)
  To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20110622231030.GA17242@schlenkerla.am.freescale.net>


On Jun 22, 2011, at 6:10 PM, Scott Wood wrote:

> e500mc cannot doze or nap due to an erratum (as well as having a
> different mechanism than previous e500), but it has a "wait" instruction
> that is similar to doze.
> 
> On 64-bit, due to the soft-irq-disable mechanism, the existing
> book3e_idle should be used instead.
> 
> Signed-off-by: Vakul Garg <vakul@freescale.com>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> arch/powerpc/kernel/idle_e500.S        |   12 ++++++++++++
> arch/powerpc/platforms/85xx/p3041_ds.c |    1 +
> arch/powerpc/platforms/85xx/p4080_ds.c |    1 +
> arch/powerpc/platforms/85xx/p5020_ds.c |    5 +++++
> 4 files changed, 19 insertions(+), 0 deletions(-)

applied to next

- K

^ permalink raw reply

* Re: [PATCH] powerpc/85xx: disable timebase synchronization under the hypervisor
From: Kumar Gala @ 2011-06-27 13:35 UTC (permalink / raw)
  To: Timur Tabi; +Cc: scottwood, B29882, linuxppc-dev
In-Reply-To: <1308092673-13045-1-git-send-email-timur@freescale.com>


On Jun 14, 2011, at 6:04 PM, Timur Tabi wrote:

> The Freescale hypervisor does not allow guests to write to the timebase
> registers (virtualizing the timebase register was deemed too complicated),
> so don't try to synchronize the timebase registers when we're running
> under the hypervisor.
> 
> This typically happens when kexec support is enabled.
> 
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/platforms/85xx/p3041_ds.c |   11 +++++++++++
> arch/powerpc/platforms/85xx/p4080_ds.c |   11 +++++++++++
> arch/powerpc/platforms/85xx/p5020_ds.c |   11 +++++++++++
> 3 files changed, 33 insertions(+), 0 deletions(-)

applied to next

- K

^ permalink raw reply

* Re: [PATCH 2/2] powerpc/86xx: improve calculation of DIU pixel clock on the MPC8610 HPCD
From: Kumar Gala @ 2011-06-27 13:34 UTC (permalink / raw)
  To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1308845808-11392-2-git-send-email-timur@freescale.com>


On Jun 23, 2011, at 11:16 AM, Timur Tabi wrote:

> mpc8610hpcd_set_pixel_clock() calculates the correct value of the =
PXCLK
> bits in the CLKDVDR register for a given pixel clock rate.  The code =
which
> performs this calculation is overly complicated and includes an error
> estimation routine that doesn't work most of the time anyway.  Replace =
the
> code with the simpler routine that's currently used on the P1022DS.
>=20
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/platforms/86xx/mpc8610_hpcd.c |  107 =
++++++++++++---------------
> 1 files changed, 48 insertions(+), 59 deletions(-)

applied to next

- K=

^ permalink raw reply

* Re: powerpc/4xx: Regression failed on sil24 (and other) drivers
From: Benjamin Herrenschmidt @ 2011-06-27 12:29 UTC (permalink / raw)
  To: Ayman El-Khashab; +Cc: cam, linuxppc-dev
In-Reply-To: <20110627113137.GA10387@crust.elkhashab.com>

On Mon, 2011-06-27 at 06:31 -0500, Ayman El-Khashab wrote:

> That was my initial thought as well, but I wasn't versed
> enough in the pci magic in order to completely figure it
> out.
> 
> Here is the output, it is dmesg, iomem, then ioports for the
> passing and then the failing cases.

Ok, I can see some resource allocation errors in the log, I don't have
enough active brain cells left today to figure out what's going on but
I'll have a look tomorrow.

Cheers,
Ben.

> thanks
> ayman
> 
> ============== Passing ======================
> 
> Using PowerPC 44x Platform machine description
> Linux version 2.6.36-rc3-00186-g0e52247-dirty (aymane@lablinux) (gcc version 4.2.2) #18 Sat Jun 25 13:51:44 CDT 2011
> Found initrd at 0xdfa5c000:0xdfe4cbfa
> Found legacy serial port 0 for /plb/opb/serial@ef600300
>   mem=4ef600300, taddr=4ef600300, irq=0, clk=6451612, speed=0
> Found legacy serial port 1 for /plb/opb/serial@ef600400
>   mem=4ef600400, taddr=4ef600400, irq=0, clk=6451612, speed=0
> Top of RAM: 0x20000000, Total RAM: 0x20000000
> Memory hole size: 0MB
> Zone PFN ranges:
>   DMA      0x00000000 -> 0x00020000
>   Normal   empty
>   HighMem  empty
> Movable zone start PFN for each node
> early_node_map[1] active PFN ranges
>     0: 0x00000000 -> 0x00020000
> On node 0 totalpages: 131072
> free_area_init_node: node 0, pgdat c03b9f48, node_mem_map c03ed000
>   DMA zone: 1024 pages used for memmap
>   DMA zone: 0 pages reserved
>   DMA zone: 130048 pages, LIFO batch:31
> MMU: Allocated 1088 bytes of context maps for 255 contexts
> Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 130048
> Kernel command line: root=/dev/ram rw mem=512M ip=169.254.0.180:169.254.0.100:169.254.0.100:255.255.255.0:tanosx:eth0:off panic=1 console=ttyS0,57600
> PID hash table entries: 2048 (order: 1, 8192 bytes)
> Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
> Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
> High memory: 0k
> Memory: 511668k/524288k available (3692k kernel code, 12620k reserved, 176k data, 141k bss, 184k init)
> Kernel virtual memory layout:
>   * 0xfffcf000..0xfffff000  : fixmap
>   * 0xffc00000..0xffe00000  : highmem PTEs
>   * 0xffa00000..0xffc00000  : consistent mem
>   * 0xffa00000..0xffa00000  : early ioremap
>   * 0xe1000000..0xffa00000  : vmalloc & ioremap
> SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
> NR_IRQS:512
> UIC0 (32 IRQ sources) at DCR 0xc0
> UIC1 (32 IRQ sources) at DCR 0xd0
> irq: irq 30 on host /interrupt-controller0 mapped to virtual irq 30
> UIC2 (32 IRQ sources) at DCR 0xe0
> irq: irq 10 on host /interrupt-controller0 mapped to virtual irq 16
> UIC3 (32 IRQ sources) at DCR 0xf0
> irq: irq 16 on host /interrupt-controller0 mapped to virtual irq 17
> time_init: decrementer frequency = 800.000010 MHz
> time_init: processor frequency   = 800.000010 MHz
> clocksource: timebase mult[500000] shift[22] registered
> clockevent: decrementer mult[ccccccf7] shift[32] cpu[0]
> pid_max: default: 32768 minimum: 301
> Mount-cache hash table entries: 512
> NET: Registered protocol family 16
> i2c-core: driver [dummy] registered
> irq: irq 11 on host /interrupt-controller1 mapped to virtual irq 18
> 256k L2-cache enabled
> PCIE0: Checking link...
> PCIE0: No device detected.
> PCI host bridge /plb/pciex@d00000000 (primary) ranges:
>  MEM 0x0000000e00000000..0x0000000e7fffffff -> 0x0000000080000000 
>  MEM 0x0000000f00000000..0x0000000f000fffff -> 0x0000000000000000 
>   IO 0x0000000f80000000..0x0000000f8000ffff -> 0x0000000000000000
>  Removing ISA hole at 0x0000000f00000000
> 4xx PCI DMA offset set to 0x00000000
> /plb/pciex@d00000000: Legacy ISA memory support enabled
> PCIE0: successfully set as root-complex
> PCIE1: Checking link...
> PCIE1: Device detected, waiting for link...
> PCIE1: link is up !
> PCI host bridge /plb/pciex@d20000000 (primary) ranges:
>  MEM 0x0000000e80000000..0x0000000effffffff -> 0x0000000080000000 
>  MEM 0x0000000f00100000..0x0000000f001fffff -> 0x0000000000000000 
>   IO 0x0000000f80010000..0x0000000f8001ffff -> 0x0000000000000000
>  Removing ISA hole at 0x0000000f00100000
> 4xx PCI DMA offset set to 0x00000000
> /plb/pciex@d20000000: Legacy ISA memory support enabled
> PCIE1: successfully set as root-complex
> PCI host bridge /plb/pci@c0ec00000 (primary) ranges:
>  MEM 0x0000000d80000000..0x0000000dffffffff -> 0x0000000080000000 
>  MEM 0x0000000c0ee00000..0x0000000c0eefffff -> 0x0000000000000000 
>   IO 0x0000000c08000000..0x0000000c0800ffff -> 0x0000000000000000
>  Removing ISA hole at 0x0000000c0ee00000
> 4xx PCI DMA offset set to 0x00000000
> /plb/pci@c0ec00000: Legacy ISA memory support enabled
> PCI: Probing PCI hardware
> pci_bus 0000:40: scanning bus
> pci 0000:40:00.0: found [aaa0:bed0] class 000604 header type 01
> pci 0000:40:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
> pci_bus 0000:40: fixups for bus
> pci 0000:40:00.0: scanning [bus 41-7f] behind bridge, pass 0
> pci_bus 0000:41: scanning bus
> pci_bus 0000:41: fixups for bus
> pci 0000:40:00.0: PCI bridge to [bus 41-7f]
> pci 0000:40:00.0:   bridge window [io  0x0000-0x0000] (disabled)
> pci 0000:40:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
> pci 0000:40:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
> pci_bus 0000:41: bus scan returning with max=41
> pci 0000:40:00.0: scanning [bus 41-7f] behind bridge, pass 1
> pci_bus 0000:40: bus scan returning with max=7f
> pci_bus 0001:80: scanning bus
> pci 0001:80:00.0: found [aaa1:bed1] class 000604 header type 01
> pci 0001:80:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
> pci_bus 0001:80: fixups for bus
> pci 0001:80:00.0: scanning [bus 81-bf] behind bridge, pass 0
> pci_bus 0001:81: scanning bus
> pci 0001:81:00.0: found [1095:3531] class 000180 header type 00
> pci 0001:81:00.0: reg 10: [mem 0x00000000-0x0000007f 64bit]
> pci 0001:81:00.0: reg 18: [mem 0x00000000-0x00001fff 64bit]
> pci 0001:81:00.0: reg 20: [io  0x0000-0x007f]
> pci 0001:81:00.0: supports D1 D2
> pci_bus 0001:81: fixups for bus
> pci 0001:80:00.0: PCI bridge to [bus 81-bf]
> pci 0001:80:00.0:   bridge window [io  0x0000-0x0000] (disabled)
> pci 0001:80:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
> pci 0001:80:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
> irq: irq 16 on host /interrupt-controller3 mapped to virtual irq 19
> pci_bus 0001:81: bus scan returning with max=81
> pci 0001:80:00.0: scanning [bus 81-bf] behind bridge, pass 1
> pci_bus 0001:80: bus scan returning with max=bf
> pci_bus 0002:00: scanning bus
> pci_bus 0002:00: fixups for bus
> pci_bus 0002:00: bus scan returning with max=00
> pci 0000:40:00.0: BAR 0: can't assign mem pref (size 0x80000000)
> pci 0000:40:00.0: PCI bridge to [bus 41-7f]
> pci 0000:40:00.0:   bridge window [io  disabled]
> pci 0000:40:00.0:   bridge window [mem disabled]
> pci 0000:40:00.0:   bridge window [mem pref disabled]
> pci 0001:80:00.0: BAR 0: can't assign mem pref (size 0x80000000)
> pci 0001:80:00.0: BAR 8: assigned [mem 0xe80000000-0xe800fffff]
> pci 0001:80:00.0: BAR 7: assigned [io  0xfffe1000-0xfffe1fff]
> pci 0001:81:00.0: BAR 2: assigned [mem 0xe80000000-0xe80001fff 64bit]
> pci 0001:81:00.0: BAR 2: set to [mem 0xe80000000-0xe80001fff 64bit] (PCI address [0x80000000-0x80001fff]
> pci 0001:81:00.0: BAR 0: assigned [mem 0xe80002000-0xe8000207f 64bit]
> pci 0001:81:00.0: BAR 0: set to [mem 0xe80002000-0xe8000207f 64bit] (PCI address [0x80002000-0x8000207f]
> pci 0001:81:00.0: BAR 4: assigned [io  0xfffe1000-0xfffe107f]
> pci 0001:81:00.0: BAR 4: set to [io  0xfffe1000-0xfffe107f] (PCI address [0x1000-0x107f]
> pci 0001:80:00.0: PCI bridge to [bus 81-bf]
> pci 0001:80:00.0:   bridge window [io  0xfffe1000-0xfffe1fff]
> pci 0001:80:00.0:   bridge window [mem 0xe80000000-0xe800fffff]
> pci 0001:80:00.0:   bridge window [mem pref disabled]
> pci_bus 0000:40: resource 0 [io  0xfffc0000-0xfffcffff]
> pci_bus 0000:40: resource 1 [mem 0xe00000000-0xe7fffffff]
> pci_bus 0001:80: resource 0 [io  0xfffe0000-0xfffeffff]
> pci_bus 0001:80: resource 1 [mem 0xe80000000-0xeffffffff]
> pci_bus 0001:81: resource 0 [io  0xfffe1000-0xfffe1fff]
> pci_bus 0001:81: resource 1 [mem 0xe80000000-0xe800fffff]
> pci_bus 0002:00: resource 0 [io  0x0000-0xffff]
> pci_bus 0002:00: resource 1 [mem 0xd80000000-0xdffffffff]
> bio: create slab <bio-0> at 0
> i2c-core: driver [pcf857x] registered
> vgaarb: loaded
> SCSI subsystem initialized
> libata version 3.00 loaded.
> Switching to clocksource timebase
> NET: Registered protocol family 2
> IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
> TCP established hash table entries: 16384 (order: 5, 131072 bytes)
> TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
> TCP: Hash tables configured (established 16384 bind 16384)
> TCP reno registered
> UDP hash table entries: 256 (order: 0, 4096 bytes)
> UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
> NET: Registered protocol family 1
> RPC: Registered udp transport module.
> RPC: Registered tcp transport module.
> RPC: Registered tcp NFSv4.1 backchannel transport module.
> Trying to unpack rootfs image as initramfs...
> rootfs image is not initramfs (no cpio magic); looks like an initrd
> Freeing initrd memory: 4034k freed
> irq: irq 1 on host /interrupt-controller1 mapped to virtual irq 20
> irq: irq 1 on host /interrupt-controller0 mapped to virtual irq 21
> irq: irq 29 on host /interrupt-controller0 mapped to virtual irq 29
> irq: irq 6 on host /interrupt-controller2 mapped to virtual irq 22
> irq: irq 7 on host /interrupt-controller2 mapped to virtual irq 23
> irq: irq 3 on host /interrupt-controller2 mapped to virtual irq 24
> irq: irq 4 on host /interrupt-controller2 mapped to virtual irq 25
> irq: irq 5 on host /interrupt-controller2 mapped to virtual irq 26
> irq: irq 29 on host /interrupt-controller2 mapped to virtual irq 27
> irq: irq 30 on host /interrupt-controller2 mapped to virtual irq 28
> irq: irq 28 on host /interrupt-controller2 mapped to virtual irq 31
> irq: irq 26 on host /interrupt-controller1 mapped to virtual irq 32
> irq: irq 12 on host /interrupt-controller0 mapped to virtual irq 33
> irq: irq 0 on host /interrupt-controller3 mapped to virtual irq 34
> irq: irq 5 on host /interrupt-controller3 mapped to virtual irq 35
> irq: irq 6 on host /interrupt-controller1 mapped to virtual irq 36
> irq: irq 2 on host /interrupt-controller0 mapped to virtual irq 37
> irq: irq 3 on host /interrupt-controller0 mapped to virtual irq 38
> irq: irq 16 on host /interrupt-controller2 mapped to virtual irq 39
> irq: irq 20 on host /interrupt-controller2 mapped to virtual irq 40
> irq: irq 17 on host /interrupt-controller2 mapped to virtual irq 41
> irq: irq 21 on host /interrupt-controller2 mapped to virtual irq 42
> msgmni has been set to 1007
> Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
> io scheduler noop registered
> io scheduler deadline registered
> io scheduler cfq registered (default)
> pci_hotplug: PCI Hot Plug PCI Core version: 0.5
> pciehp: PCI Express Hot Plug Controller Driver version: 0.4
> Serial: 8250/16550 driver, 2 ports, IRQ sharing enabled
> serial8250.0: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a U6_16550A
> console [ttyS0] enabled
> serial8250.0: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a U6_16550A
> 4ef600300.serial: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a 16550
> 4ef600400.serial: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a 16550
> brd: module loaded
> i2c-core: driver [at24] registered
> sata_sil24 0001:81:00.0: version 1.1
> sata_sil24 0001:81:00.0: enabling device (0000 -> 0003)
> sata_sil24 0001:81:00.0: enabling bus mastering
> scsi0 : sata_sil24
> ata1: SATA max UDMA/100 host m128@0xe80002000 port 0xe80000000 irq 19
> PPC 4xx OCP EMAC driver, version 3.54
> MAL v2 /plb/mcmal, 2 TX channels, 16 RX channels
> ZMII /plb/opb/emac-zmii@ef600d00 initialized
> RGMII /plb/opb/emac-rgmii@ef601500 initialized with MDIO support
> TAH /plb/opb/emac-tah@ef601350 initialized
> TAH /plb/opb/emac-tah@ef601450 initialized
> /plb/opb/emac-rgmii@ef601500: input 0 in RGMII mode
> eth0: EMAC-0 /plb/opb/ethernet@ef600e00, MAC 00:10:ec:01:02:b9
> eth0: found Generic MII PHY (0x00)
> /plb/opb/emac-rgmii@ef601500: input 1 in RGMII mode
> eth1: EMAC-1 /plb/opb/ethernet@ef600f00, MAC 00:10:ec:81:02:b9
> eth1: found Generic MII PHY (0x01)
> i2c /dev entries driver
> i2c-core: driver [dev_driver] registered
> of:ibm-iic 4ef600700.i2c: clckdiv = 9
> i2c i2c-0: adapter [IBM IIC] registered
> irq: irq 25 on host /interrupt-controller2 mapped to virtual irq 43
> i2c 0-0068: uevent
> i2c i2c-0: client [m41t80] registered with bus id 0-0068
> irq: irq 20 on host /interrupt-controller1 mapped to virtual irq 44
> i2c 0-0048: uevent
> i2c i2c-0: client [ad7414] registered with bus id 0-0048
> i2c-dev: adapter [IBM IIC] registered as minor 0
> of:ibm-iic 4ef600700.i2c: using standard (100 kHz) mode
> of:ibm-iic 4ef600800.i2c: clckdiv = 9
> i2c i2c-1: adapter [IBM IIC] registered
> i2c-dev: adapter [IBM IIC] registered as minor 1
> of:ibm-iic 4ef600800.i2c: using standard (100 kHz) mode
> Netfilter messages via NETLINK v0.30.
> nf_conntrack version 0.5.0 (8057 buckets, 32228 max)
> ctnetlink v0.93: registering with nfnetlink.
> xt_time: kernel timezone is -0000
> IPVS: Registered protocols ()
> IPVS: Connection hash table configured (size=4096, memory=32Kbytes)
> IPVS: ipvs loaded.
> ip_tables: (C) 2000-2006 Netfilter Core Team
> ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully
> arp_tables: (C) 2002 David S. Miller
> TCP cubic registered
> NET: Registered protocol family 17
> Bridge firewalling registered
> Ebtables v2.0 registered
> eth0: link is down
> IP-Config: Complete:
>      device=eth0, addr=169.254.0.180, mask=255.255.255.0, gw=169.254.0.100,
>      host=tanosx, domain=, nis-domain=(none),
>      bootserver=169.254.0.100, rootserver=169.254.0.100, rootpath=
> ata1: SATA link down (SStatus 0 SControl 0)
> RAMDISK: gzip image found at block 0
> eth0: link is up, 100 FDX, pause enabled
> VFS: Mounted root (ext2 filesystem) on device 1:0.
> Freeing unused kernel memory: 184k init
> 
> 
> /proc/iomem
> 
> 4ef600300-4ef600307 : serial
> 4ef600400-4ef600407 : serial
> d80000000-dffffffff : /plb/pci@c0ec00000
> e00000000-e7fffffff : /plb/pciex@d00000000
> e80000000-effffffff : /plb/pciex@d20000000
>   e80000000-e800fffff : PCI Bus 0001:81
>     e80000000-e80001fff : 0001:81:00.0
>       e80000000-e80001fff : sata_sil24
>     e80002000-e8000207f : 0001:81:00.0
>       e80002000-e8000207f : sata_sil24
> 
> 
> /proc/ioports
> 
> 00000000-0000ffff : /plb/pci@c0ec00000
>   00000000-00000fff : Legacy IO
> fffc0000-fffcffff : /plb/pciex@d00000000
>   fffc0000-fffc0fff : Legacy IO
> fffe0000-fffeffff : /plb/pciex@d20000000
>   fffe0000-fffe0fff : Legacy IO
>   fffe1000-fffe1fff : PCI Bus 0001:81
>     fffe1000-fffe107f : 0001:81:00.0
> 
> 
> 
> ============== Failing ======================
> 
> 
> Using PowerPC 44x Platform machine description
> Linux version 2.6.36-rc3-00186-g0e52247 (aymane@lablinux) (gcc version 4.2.2) #19 Mon Jun 27 06:09:26 CDT 2011
> Found initrd at 0xdfa5c000:0xdfe4cbfa
> Found legacy serial port 0 for /plb/opb/serial@ef600300
>   mem=4ef600300, taddr=4ef600300, irq=0, clk=6451612, speed=0
> Found legacy serial port 1 for /plb/opb/serial@ef600400
>   mem=4ef600400, taddr=4ef600400, irq=0, clk=6451612, speed=0
> Top of RAM: 0x20000000, Total RAM: 0x20000000
> Memory hole size: 0MB
> Zone PFN ranges:
>   DMA      0x00000000 -> 0x00020000
>   Normal   empty
>   HighMem  empty
> Movable zone start PFN for each node
> early_node_map[1] active PFN ranges
>     0: 0x00000000 -> 0x00020000
> On node 0 totalpages: 131072
> free_area_init_node: node 0, pgdat c03b9f48, node_mem_map c03ed000
>   DMA zone: 1024 pages used for memmap
>   DMA zone: 0 pages reserved
>   DMA zone: 130048 pages, LIFO batch:31
> MMU: Allocated 1088 bytes of context maps for 255 contexts
> Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 130048
> Kernel command line: root=/dev/ram rw mem=512M ip=169.254.0.180:169.254.0.100:169.254.0.100:255.255.255.0:tanosx:eth0:off panic=1 console=ttyS0,57600
> PID hash table entries: 2048 (order: 1, 8192 bytes)
> Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
> Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
> High memory: 0k
> Memory: 511668k/524288k available (3692k kernel code, 12620k reserved, 176k data, 141k bss, 184k init)
> Kernel virtual memory layout:
>   * 0xfffcf000..0xfffff000  : fixmap
>   * 0xffc00000..0xffe00000  : highmem PTEs
>   * 0xffa00000..0xffc00000  : consistent mem
>   * 0xffa00000..0xffa00000  : early ioremap
>   * 0xe1000000..0xffa00000  : vmalloc & ioremap
> SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
> NR_IRQS:512
> UIC0 (32 IRQ sources) at DCR 0xc0
> UIC1 (32 IRQ sources) at DCR 0xd0
> irq: irq 30 on host /interrupt-controller0 mapped to virtual irq 30
> UIC2 (32 IRQ sources) at DCR 0xe0
> irq: irq 10 on host /interrupt-controller0 mapped to virtual irq 16
> UIC3 (32 IRQ sources) at DCR 0xf0
> irq: irq 16 on host /interrupt-controller0 mapped to virtual irq 17
> time_init: decrementer frequency = 800.000010 MHz
> time_init: processor frequency   = 800.000010 MHz
> clocksource: timebase mult[500000] shift[22] registered
> clockevent: decrementer mult[ccccccf7] shift[32] cpu[0]
> pid_max: default: 32768 minimum: 301
> Mount-cache hash table entries: 512
> NET: Registered protocol family 16
> i2c-core: driver [dummy] registered
> irq: irq 11 on host /interrupt-controller1 mapped to virtual irq 18
> 256k L2-cache enabled
> PCIE0: Checking link...
> PCIE0: No device detected.
> PCI host bridge /plb/pciex@d00000000 (primary) ranges:
>  MEM 0x0000000e00000000..0x0000000e7fffffff -> 0x0000000080000000 
>  MEM 0x0000000f00000000..0x0000000f000fffff -> 0x0000000000000000 
>   IO 0x0000000f80000000..0x0000000f8000ffff -> 0x0000000000000000
>  Removing ISA hole at 0x0000000f00000000
> 4xx PCI DMA offset set to 0x00000000
> /plb/pciex@d00000000: Legacy ISA memory support enabled
> PCIE0: successfully set as root-complex
> PCIE1: Checking link...
> PCIE1: Device detected, waiting for link...
> PCIE1: link is up !
> PCI host bridge /plb/pciex@d20000000 (primary) ranges:
>  MEM 0x0000000e80000000..0x0000000effffffff -> 0x0000000080000000 
>  MEM 0x0000000f00100000..0x0000000f001fffff -> 0x0000000000000000 
>   IO 0x0000000f80010000..0x0000000f8001ffff -> 0x0000000000000000
>  Removing ISA hole at 0x0000000f00100000
> 4xx PCI DMA offset set to 0x00000000
> /plb/pciex@d20000000: Legacy ISA memory support enabled
> PCIE1: successfully set as root-complex
> PCI host bridge /plb/pci@c0ec00000 (primary) ranges:
>  MEM 0x0000000d80000000..0x0000000dffffffff -> 0x0000000080000000 
>  MEM 0x0000000c0ee00000..0x0000000c0eefffff -> 0x0000000000000000 
>   IO 0x0000000c08000000..0x0000000c0800ffff -> 0x0000000000000000
>  Removing ISA hole at 0x0000000c0ee00000
> 4xx PCI DMA offset set to 0x00000000
> /plb/pci@c0ec00000: Legacy ISA memory support enabled
> PCI: Probing PCI hardware
> pci_bus 0000:40: scanning bus
> pci 0000:40:00.0: found [aaa0:bed0] class 000604 header type 01
> pci 0000:40:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
> pci_bus 0000:40: fixups for bus
> pci 0000:40:00.0: scanning [bus 41-7f] behind bridge, pass 0
> pci_bus 0000:41: scanning bus
> pci_bus 0000:41: fixups for bus
> pci 0000:40:00.0: PCI bridge to [bus 41-7f]
> pci 0000:40:00.0:   bridge window [io  0x0000-0x0000] (disabled)
> pci 0000:40:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
> pci 0000:40:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
> pci_bus 0000:41: bus scan returning with max=41
> pci 0000:40:00.0: scanning [bus 41-7f] behind bridge, pass 1
> pci_bus 0000:40: bus scan returning with max=7f
> pci_bus 0001:80: scanning bus
> pci 0001:80:00.0: found [aaa1:bed1] class 000604 header type 01
> pci 0001:80:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
> pci_bus 0001:80: fixups for bus
> pci 0001:80:00.0: scanning [bus 81-bf] behind bridge, pass 0
> pci_bus 0001:81: scanning bus
> pci 0001:81:00.0: found [1095:3531] class 000180 header type 00
> pci 0001:81:00.0: reg 10: [mem 0x00000000-0x0000007f 64bit]
> pci 0001:81:00.0: reg 18: [mem 0x00000000-0x00001fff 64bit]
> pci 0001:81:00.0: reg 20: [io  0x0000-0x007f]
> pci 0001:81:00.0: supports D1 D2
> pci_bus 0001:81: fixups for bus
> pci 0001:80:00.0: PCI bridge to [bus 81-bf]
> pci 0001:80:00.0:   bridge window [io  0x0000-0x0000] (disabled)
> pci 0001:80:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
> pci 0001:80:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
> irq: irq 16 on host /interrupt-controller3 mapped to virtual irq 19
> pci_bus 0001:81: bus scan returning with max=81
> pci 0001:80:00.0: scanning [bus 81-bf] behind bridge, pass 1
> pci_bus 0001:80: bus scan returning with max=bf
> pci_bus 0002:00: scanning bus
> pci_bus 0002:00: fixups for bus
> pci_bus 0002:00: bus scan returning with max=00
> pci 0000:40:00.0: BAR 0: assigned [mem 0xe00000000-0xe7fffffff pref]
> pci 0000:40:00.0: BAR 0: set to [mem 0xe00000000-0xe7fffffff pref] (PCI address [0x80000000-0xffffffff]
> pci 0000:40:00.0: PCI bridge to [bus 41-7f]
> pci 0000:40:00.0:   bridge window [io  disabled]
> pci 0000:40:00.0:   bridge window [mem disabled]
> pci 0000:40:00.0:   bridge window [mem pref disabled]
> pci 0001:80:00.0: BAR 0: assigned [mem 0xe80000000-0xeffffffff pref]
> pci 0001:80:00.0: BAR 0: set to [mem 0xe80000000-0xeffffffff pref] (PCI address [0x80000000-0xffffffff]
> pci 0001:80:00.0: BAR 8: can't assign mem (size 0x100000)
> pci 0001:80:00.0: BAR 7: assigned [io  0xfffe1000-0xfffe1fff]
> pci 0001:81:00.0: BAR 2: can't assign mem (size 0x2000)
> pci 0001:81:00.0: BAR 0: can't assign mem (size 0x80)
> pci 0001:81:00.0: BAR 4: assigned [io  0xfffe1000-0xfffe107f]
> pci 0001:81:00.0: BAR 4: set to [io  0xfffe1000-0xfffe107f] (PCI address [0x1000-0x107f]
> pci 0001:80:00.0: PCI bridge to [bus 81-bf]
> pci 0001:80:00.0:   bridge window [io  0xfffe1000-0xfffe1fff]
> pci 0001:80:00.0:   bridge window [mem disabled]
> pci 0001:80:00.0:   bridge window [mem pref disabled]
> pci_bus 0000:40: resource 0 [io  0xfffc0000-0xfffcffff]
> pci_bus 0000:40: resource 1 [mem 0xe00000000-0xe7fffffff]
> pci_bus 0001:80: resource 0 [io  0xfffe0000-0xfffeffff]
> pci_bus 0001:80: resource 1 [mem 0xe80000000-0xeffffffff]
> pci_bus 0001:81: resource 0 [io  0xfffe1000-0xfffe1fff]
> pci_bus 0002:00: resource 0 [io  0x0000-0xffff]
> pci_bus 0002:00: resource 1 [mem 0xd80000000-0xdffffffff]
> bio: create slab <bio-0> at 0
> i2c-core: driver [pcf857x] registered
> vgaarb: loaded
> SCSI subsystem initialized
> libata version 3.00 loaded.
> Switching to clocksource timebase
> NET: Registered protocol family 2
> IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
> TCP established hash table entries: 16384 (order: 5, 131072 bytes)
> TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
> TCP: Hash tables configured (established 16384 bind 16384)
> TCP reno registered
> UDP hash table entries: 256 (order: 0, 4096 bytes)
> UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
> NET: Registered protocol family 1
> RPC: Registered udp transport module.
> RPC: Registered tcp transport module.
> RPC: Registered tcp NFSv4.1 backchannel transport module.
> Trying to unpack rootfs image as initramfs...
> rootfs image is not initramfs (no cpio magic); looks like an initrd
> Freeing initrd memory: 4034k freed
> irq: irq 1 on host /interrupt-controller1 mapped to virtual irq 20
> irq: irq 1 on host /interrupt-controller0 mapped to virtual irq 21
> irq: irq 29 on host /interrupt-controller0 mapped to virtual irq 29
> irq: irq 6 on host /interrupt-controller2 mapped to virtual irq 22
> irq: irq 7 on host /interrupt-controller2 mapped to virtual irq 23
> irq: irq 3 on host /interrupt-controller2 mapped to virtual irq 24
> irq: irq 4 on host /interrupt-controller2 mapped to virtual irq 25
> irq: irq 5 on host /interrupt-controller2 mapped to virtual irq 26
> irq: irq 29 on host /interrupt-controller2 mapped to virtual irq 27
> irq: irq 30 on host /interrupt-controller2 mapped to virtual irq 28
> irq: irq 28 on host /interrupt-controller2 mapped to virtual irq 31
> irq: irq 26 on host /interrupt-controller1 mapped to virtual irq 32
> irq: irq 12 on host /interrupt-controller0 mapped to virtual irq 33
> irq: irq 0 on host /interrupt-controller3 mapped to virtual irq 34
> irq: irq 5 on host /interrupt-controller3 mapped to virtual irq 35
> irq: irq 6 on host /interrupt-controller1 mapped to virtual irq 36
> irq: irq 2 on host /interrupt-controller0 mapped to virtual irq 37
> irq: irq 3 on host /interrupt-controller0 mapped to virtual irq 38
> irq: irq 16 on host /interrupt-controller2 mapped to virtual irq 39
> irq: irq 20 on host /interrupt-controller2 mapped to virtual irq 40
> irq: irq 17 on host /interrupt-controller2 mapped to virtual irq 41
> irq: irq 21 on host /interrupt-controller2 mapped to virtual irq 42
> msgmni has been set to 1007
> Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
> io scheduler noop registered
> io scheduler deadline registered
> io scheduler cfq registered (default)
> pci_hotplug: PCI Hot Plug PCI Core version: 0.5
> pciehp: PCI Express Hot Plug Controller Driver version: 0.4
> Serial: 8250/16550 driver, 2 ports, IRQ sharing enabled
> serial8250.0: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a U6_16550A
> console [ttyS0] enabled
> serial8250.0: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a U6_16550A
> 4ef600300.serial: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a 16550
> 4ef600400.serial: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a 16550
> brd: module loaded
> i2c-core: driver [at24] registered
> sata_sil24 0001:81:00.0: version 1.1
> sata_sil24 0001:81:00.0: enabling device (0000 -> 0001)
> sata_sil24: probe of 0001:81:00.0 failed with error -22
> PPC 4xx OCP EMAC driver, version 3.54
> MAL v2 /plb/mcmal, 2 TX channels, 16 RX channels
> ZMII /plb/opb/emac-zmii@ef600d00 initialized
> RGMII /plb/opb/emac-rgmii@ef601500 initialized with MDIO support
> TAH /plb/opb/emac-tah@ef601350 initialized
> TAH /plb/opb/emac-tah@ef601450 initialized
> /plb/opb/emac-rgmii@ef601500: input 0 in RGMII mode
> eth0: EMAC-0 /plb/opb/ethernet@ef600e00, MAC 00:10:ec:01:02:b9
> eth0: found Generic MII PHY (0x00)
> /plb/opb/emac-rgmii@ef601500: input 1 in RGMII mode
> eth1: EMAC-1 /plb/opb/ethernet@ef600f00, MAC 00:10:ec:81:02:b9
> eth1: found Generic MII PHY (0x01)
> i2c /dev entries driver
> i2c-core: driver [dev_driver] registered
> of:ibm-iic 4ef600700.i2c: clckdiv = 9
> i2c i2c-0: adapter [IBM IIC] registered
> irq: irq 25 on host /interrupt-controller2 mapped to virtual irq 43
> i2c 0-0068: uevent
> i2c i2c-0: client [m41t80] registered with bus id 0-0068
> irq: irq 20 on host /interrupt-controller1 mapped to virtual irq 44
> i2c 0-0048: uevent
> i2c i2c-0: client [ad7414] registered with bus id 0-0048
> i2c-dev: adapter [IBM IIC] registered as minor 0
> of:ibm-iic 4ef600700.i2c: using standard (100 kHz) mode
> of:ibm-iic 4ef600800.i2c: clckdiv = 9
> i2c i2c-1: adapter [IBM IIC] registered
> i2c-dev: adapter [IBM IIC] registered as minor 1
> of:ibm-iic 4ef600800.i2c: using standard (100 kHz) mode
> Netfilter messages via NETLINK v0.30.
> nf_conntrack version 0.5.0 (8057 buckets, 32228 max)
> ctnetlink v0.93: registering with nfnetlink.
> xt_time: kernel timezone is -0000
> IPVS: Registered protocols ()
> IPVS: Connection hash table configured (size=4096, memory=32Kbytes)
> IPVS: ipvs loaded.
> ip_tables: (C) 2000-2006 Netfilter Core Team
> ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully
> arp_tables: (C) 2002 David S. Miller
> TCP cubic registered
> NET: Registered protocol family 17
> Bridge firewalling registered
> Ebtables v2.0 registered
> eth0: link is down
> IP-Config: Complete:
>      device=eth0, addr=169.254.0.180, mask=255.255.255.0, gw=169.254.0.100,
>      host=tanosx, domain=, nis-domain=(none),
>      bootserver=169.254.0.100, rootserver=169.254.0.100, rootpath=
> RAMDISK: gzip image found at block 0
> eth0: link is up, 100 FDX, pause enabled
> VFS: Mounted root (ext2 filesystem) on device 1:0.
> Freeing unused kernel memory: 184k init
> 
> /proc/iomem
> 
> 4ef600300-4ef600307 : serial
> 4ef600400-4ef600407 : serial
> d80000000-dffffffff : /plb/pci@c0ec00000
> e00000000-e7fffffff : /plb/pciex@d00000000
>   e00000000-e7fffffff : 0000:40:00.0
> e80000000-effffffff : /plb/pciex@d20000000
>   e80000000-effffffff : 0001:80:00.0
> 
> /proc/ioports
> 
> 00000000-0000ffff : /plb/pci@c0ec00000
>   00000000-00000fff : Legacy IO
> fffc0000-fffcffff : /plb/pciex@d00000000
>   fffc0000-fffc0fff : Legacy IO
> fffe0000-fffeffff : /plb/pciex@d20000000
>   fffe0000-fffe0fff : Legacy IO
>   fffe1000-fffe1fff : PCI Bus 0001:81
>     fffe1000-fffe107f : 0001:81:00.0

^ permalink raw reply

* Re: powerpc/4xx: Regression failed on sil24 (and other) drivers
From: Ayman El-Khashab @ 2011-06-27 11:31 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: cam, linuxppc-dev
In-Reply-To: <1309169996.32158.390.camel@pasglop>

On Mon, Jun 27, 2011 at 08:19:56PM +1000, Benjamin Herrenschmidt wrote:
> On Sat, 2011-06-25 at 18:52 -0500, Ayman El-Khashab wrote:
> > I noticed during a recent development with the 460SX that a
> > simple device that once worked stopped.  I did a bisect to
> > find the offending commit and it turns out to be this one:
> > 
> > 0e52247a2ed1f211f0c4f682dc999610a368903f is the first bad
> > commit
> > commit 0e52247a2ed1f211f0c4f682dc999610a368903f
> > Author: Cam Macdonell <cam@cs.ualberta.ca>
> > Date:   Tue Sep 7 17:25:20 2010 -0700
> > 
> >     PCI: fix pci_resource_alignment prototype
> > 

<snip>

> > 
> > The device driver fails with "error -22" on a 460SX (which 
> > has the 36 bit pci space).
> > 
> > sil24 /drivers/ata/sata_sil24.c
> 
> Can you send a dmesg & output of /proc/iomem & ioport with and without
> the patch (same kernel otherwise) ?
> 
> Also can you try to figure out (printk's) where in the driver does it
> fail ? (Which function fails)

Yes, here is the output from a canyonlands (460ex) that exhibits
the same problem and in the same place.  Of the two devices
I have that fail (sil24 and one other), both fail in exactly 
the same place in lib/devres.c within the function
pcim_iomap_regions.  In that function, there is the
following call -- it fails b/c len returns 0 and tha failure
bubbles up to "error -22".

 len = pci_resource_len(pdev, i);

> It's possible that this changes something in the core resource
> assignment code causing something else to fail elsewhere or exposing
> another bug elsewhere with the consequence of leaving the SiL with badly
> assigned resources.

That was my initial thought as well, but I wasn't versed
enough in the pci magic in order to completely figure it
out.

Here is the output, it is dmesg, iomem, then ioports for the
passing and then the failing cases.

thanks
ayman

============== Passing ======================

Using PowerPC 44x Platform machine description
Linux version 2.6.36-rc3-00186-g0e52247-dirty (aymane@lablinux) (gcc version 4.2.2) #18 Sat Jun 25 13:51:44 CDT 2011
Found initrd at 0xdfa5c000:0xdfe4cbfa
Found legacy serial port 0 for /plb/opb/serial@ef600300
  mem=4ef600300, taddr=4ef600300, irq=0, clk=6451612, speed=0
Found legacy serial port 1 for /plb/opb/serial@ef600400
  mem=4ef600400, taddr=4ef600400, irq=0, clk=6451612, speed=0
Top of RAM: 0x20000000, Total RAM: 0x20000000
Memory hole size: 0MB
Zone PFN ranges:
  DMA      0x00000000 -> 0x00020000
  Normal   empty
  HighMem  empty
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
    0: 0x00000000 -> 0x00020000
On node 0 totalpages: 131072
free_area_init_node: node 0, pgdat c03b9f48, node_mem_map c03ed000
  DMA zone: 1024 pages used for memmap
  DMA zone: 0 pages reserved
  DMA zone: 130048 pages, LIFO batch:31
MMU: Allocated 1088 bytes of context maps for 255 contexts
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 130048
Kernel command line: root=/dev/ram rw mem=512M ip=169.254.0.180:169.254.0.100:169.254.0.100:255.255.255.0:tanosx:eth0:off panic=1 console=ttyS0,57600
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
High memory: 0k
Memory: 511668k/524288k available (3692k kernel code, 12620k reserved, 176k data, 141k bss, 184k init)
Kernel virtual memory layout:
  * 0xfffcf000..0xfffff000  : fixmap
  * 0xffc00000..0xffe00000  : highmem PTEs
  * 0xffa00000..0xffc00000  : consistent mem
  * 0xffa00000..0xffa00000  : early ioremap
  * 0xe1000000..0xffa00000  : vmalloc & ioremap
SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:512
UIC0 (32 IRQ sources) at DCR 0xc0
UIC1 (32 IRQ sources) at DCR 0xd0
irq: irq 30 on host /interrupt-controller0 mapped to virtual irq 30
UIC2 (32 IRQ sources) at DCR 0xe0
irq: irq 10 on host /interrupt-controller0 mapped to virtual irq 16
UIC3 (32 IRQ sources) at DCR 0xf0
irq: irq 16 on host /interrupt-controller0 mapped to virtual irq 17
time_init: decrementer frequency = 800.000010 MHz
time_init: processor frequency   = 800.000010 MHz
clocksource: timebase mult[500000] shift[22] registered
clockevent: decrementer mult[ccccccf7] shift[32] cpu[0]
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
NET: Registered protocol family 16
i2c-core: driver [dummy] registered
irq: irq 11 on host /interrupt-controller1 mapped to virtual irq 18
256k L2-cache enabled
PCIE0: Checking link...
PCIE0: No device detected.
PCI host bridge /plb/pciex@d00000000 (primary) ranges:
 MEM 0x0000000e00000000..0x0000000e7fffffff -> 0x0000000080000000 
 MEM 0x0000000f00000000..0x0000000f000fffff -> 0x0000000000000000 
  IO 0x0000000f80000000..0x0000000f8000ffff -> 0x0000000000000000
 Removing ISA hole at 0x0000000f00000000
4xx PCI DMA offset set to 0x00000000
/plb/pciex@d00000000: Legacy ISA memory support enabled
PCIE0: successfully set as root-complex
PCIE1: Checking link...
PCIE1: Device detected, waiting for link...
PCIE1: link is up !
PCI host bridge /plb/pciex@d20000000 (primary) ranges:
 MEM 0x0000000e80000000..0x0000000effffffff -> 0x0000000080000000 
 MEM 0x0000000f00100000..0x0000000f001fffff -> 0x0000000000000000 
  IO 0x0000000f80010000..0x0000000f8001ffff -> 0x0000000000000000
 Removing ISA hole at 0x0000000f00100000
4xx PCI DMA offset set to 0x00000000
/plb/pciex@d20000000: Legacy ISA memory support enabled
PCIE1: successfully set as root-complex
PCI host bridge /plb/pci@c0ec00000 (primary) ranges:
 MEM 0x0000000d80000000..0x0000000dffffffff -> 0x0000000080000000 
 MEM 0x0000000c0ee00000..0x0000000c0eefffff -> 0x0000000000000000 
  IO 0x0000000c08000000..0x0000000c0800ffff -> 0x0000000000000000
 Removing ISA hole at 0x0000000c0ee00000
4xx PCI DMA offset set to 0x00000000
/plb/pci@c0ec00000: Legacy ISA memory support enabled
PCI: Probing PCI hardware
pci_bus 0000:40: scanning bus
pci 0000:40:00.0: found [aaa0:bed0] class 000604 header type 01
pci 0000:40:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
pci_bus 0000:40: fixups for bus
pci 0000:40:00.0: scanning [bus 41-7f] behind bridge, pass 0
pci_bus 0000:41: scanning bus
pci_bus 0000:41: fixups for bus
pci 0000:40:00.0: PCI bridge to [bus 41-7f]
pci 0000:40:00.0:   bridge window [io  0x0000-0x0000] (disabled)
pci 0000:40:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
pci 0000:40:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
pci_bus 0000:41: bus scan returning with max=41
pci 0000:40:00.0: scanning [bus 41-7f] behind bridge, pass 1
pci_bus 0000:40: bus scan returning with max=7f
pci_bus 0001:80: scanning bus
pci 0001:80:00.0: found [aaa1:bed1] class 000604 header type 01
pci 0001:80:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
pci_bus 0001:80: fixups for bus
pci 0001:80:00.0: scanning [bus 81-bf] behind bridge, pass 0
pci_bus 0001:81: scanning bus
pci 0001:81:00.0: found [1095:3531] class 000180 header type 00
pci 0001:81:00.0: reg 10: [mem 0x00000000-0x0000007f 64bit]
pci 0001:81:00.0: reg 18: [mem 0x00000000-0x00001fff 64bit]
pci 0001:81:00.0: reg 20: [io  0x0000-0x007f]
pci 0001:81:00.0: supports D1 D2
pci_bus 0001:81: fixups for bus
pci 0001:80:00.0: PCI bridge to [bus 81-bf]
pci 0001:80:00.0:   bridge window [io  0x0000-0x0000] (disabled)
pci 0001:80:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
pci 0001:80:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
irq: irq 16 on host /interrupt-controller3 mapped to virtual irq 19
pci_bus 0001:81: bus scan returning with max=81
pci 0001:80:00.0: scanning [bus 81-bf] behind bridge, pass 1
pci_bus 0001:80: bus scan returning with max=bf
pci_bus 0002:00: scanning bus
pci_bus 0002:00: fixups for bus
pci_bus 0002:00: bus scan returning with max=00
pci 0000:40:00.0: BAR 0: can't assign mem pref (size 0x80000000)
pci 0000:40:00.0: PCI bridge to [bus 41-7f]
pci 0000:40:00.0:   bridge window [io  disabled]
pci 0000:40:00.0:   bridge window [mem disabled]
pci 0000:40:00.0:   bridge window [mem pref disabled]
pci 0001:80:00.0: BAR 0: can't assign mem pref (size 0x80000000)
pci 0001:80:00.0: BAR 8: assigned [mem 0xe80000000-0xe800fffff]
pci 0001:80:00.0: BAR 7: assigned [io  0xfffe1000-0xfffe1fff]
pci 0001:81:00.0: BAR 2: assigned [mem 0xe80000000-0xe80001fff 64bit]
pci 0001:81:00.0: BAR 2: set to [mem 0xe80000000-0xe80001fff 64bit] (PCI address [0x80000000-0x80001fff]
pci 0001:81:00.0: BAR 0: assigned [mem 0xe80002000-0xe8000207f 64bit]
pci 0001:81:00.0: BAR 0: set to [mem 0xe80002000-0xe8000207f 64bit] (PCI address [0x80002000-0x8000207f]
pci 0001:81:00.0: BAR 4: assigned [io  0xfffe1000-0xfffe107f]
pci 0001:81:00.0: BAR 4: set to [io  0xfffe1000-0xfffe107f] (PCI address [0x1000-0x107f]
pci 0001:80:00.0: PCI bridge to [bus 81-bf]
pci 0001:80:00.0:   bridge window [io  0xfffe1000-0xfffe1fff]
pci 0001:80:00.0:   bridge window [mem 0xe80000000-0xe800fffff]
pci 0001:80:00.0:   bridge window [mem pref disabled]
pci_bus 0000:40: resource 0 [io  0xfffc0000-0xfffcffff]
pci_bus 0000:40: resource 1 [mem 0xe00000000-0xe7fffffff]
pci_bus 0001:80: resource 0 [io  0xfffe0000-0xfffeffff]
pci_bus 0001:80: resource 1 [mem 0xe80000000-0xeffffffff]
pci_bus 0001:81: resource 0 [io  0xfffe1000-0xfffe1fff]
pci_bus 0001:81: resource 1 [mem 0xe80000000-0xe800fffff]
pci_bus 0002:00: resource 0 [io  0x0000-0xffff]
pci_bus 0002:00: resource 1 [mem 0xd80000000-0xdffffffff]
bio: create slab <bio-0> at 0
i2c-core: driver [pcf857x] registered
vgaarb: loaded
SCSI subsystem initialized
libata version 3.00 loaded.
Switching to clocksource timebase
NET: Registered protocol family 2
IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
TCP established hash table entries: 16384 (order: 5, 131072 bytes)
TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 16384 bind 16384)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Trying to unpack rootfs image as initramfs...
rootfs image is not initramfs (no cpio magic); looks like an initrd
Freeing initrd memory: 4034k freed
irq: irq 1 on host /interrupt-controller1 mapped to virtual irq 20
irq: irq 1 on host /interrupt-controller0 mapped to virtual irq 21
irq: irq 29 on host /interrupt-controller0 mapped to virtual irq 29
irq: irq 6 on host /interrupt-controller2 mapped to virtual irq 22
irq: irq 7 on host /interrupt-controller2 mapped to virtual irq 23
irq: irq 3 on host /interrupt-controller2 mapped to virtual irq 24
irq: irq 4 on host /interrupt-controller2 mapped to virtual irq 25
irq: irq 5 on host /interrupt-controller2 mapped to virtual irq 26
irq: irq 29 on host /interrupt-controller2 mapped to virtual irq 27
irq: irq 30 on host /interrupt-controller2 mapped to virtual irq 28
irq: irq 28 on host /interrupt-controller2 mapped to virtual irq 31
irq: irq 26 on host /interrupt-controller1 mapped to virtual irq 32
irq: irq 12 on host /interrupt-controller0 mapped to virtual irq 33
irq: irq 0 on host /interrupt-controller3 mapped to virtual irq 34
irq: irq 5 on host /interrupt-controller3 mapped to virtual irq 35
irq: irq 6 on host /interrupt-controller1 mapped to virtual irq 36
irq: irq 2 on host /interrupt-controller0 mapped to virtual irq 37
irq: irq 3 on host /interrupt-controller0 mapped to virtual irq 38
irq: irq 16 on host /interrupt-controller2 mapped to virtual irq 39
irq: irq 20 on host /interrupt-controller2 mapped to virtual irq 40
irq: irq 17 on host /interrupt-controller2 mapped to virtual irq 41
irq: irq 21 on host /interrupt-controller2 mapped to virtual irq 42
msgmni has been set to 1007
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
pciehp: PCI Express Hot Plug Controller Driver version: 0.4
Serial: 8250/16550 driver, 2 ports, IRQ sharing enabled
serial8250.0: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a U6_16550A
console [ttyS0] enabled
serial8250.0: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a U6_16550A
4ef600300.serial: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a 16550
4ef600400.serial: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a 16550
brd: module loaded
i2c-core: driver [at24] registered
sata_sil24 0001:81:00.0: version 1.1
sata_sil24 0001:81:00.0: enabling device (0000 -> 0003)
sata_sil24 0001:81:00.0: enabling bus mastering
scsi0 : sata_sil24
ata1: SATA max UDMA/100 host m128@0xe80002000 port 0xe80000000 irq 19
PPC 4xx OCP EMAC driver, version 3.54
MAL v2 /plb/mcmal, 2 TX channels, 16 RX channels
ZMII /plb/opb/emac-zmii@ef600d00 initialized
RGMII /plb/opb/emac-rgmii@ef601500 initialized with MDIO support
TAH /plb/opb/emac-tah@ef601350 initialized
TAH /plb/opb/emac-tah@ef601450 initialized
/plb/opb/emac-rgmii@ef601500: input 0 in RGMII mode
eth0: EMAC-0 /plb/opb/ethernet@ef600e00, MAC 00:10:ec:01:02:b9
eth0: found Generic MII PHY (0x00)
/plb/opb/emac-rgmii@ef601500: input 1 in RGMII mode
eth1: EMAC-1 /plb/opb/ethernet@ef600f00, MAC 00:10:ec:81:02:b9
eth1: found Generic MII PHY (0x01)
i2c /dev entries driver
i2c-core: driver [dev_driver] registered
of:ibm-iic 4ef600700.i2c: clckdiv = 9
i2c i2c-0: adapter [IBM IIC] registered
irq: irq 25 on host /interrupt-controller2 mapped to virtual irq 43
i2c 0-0068: uevent
i2c i2c-0: client [m41t80] registered with bus id 0-0068
irq: irq 20 on host /interrupt-controller1 mapped to virtual irq 44
i2c 0-0048: uevent
i2c i2c-0: client [ad7414] registered with bus id 0-0048
i2c-dev: adapter [IBM IIC] registered as minor 0
of:ibm-iic 4ef600700.i2c: using standard (100 kHz) mode
of:ibm-iic 4ef600800.i2c: clckdiv = 9
i2c i2c-1: adapter [IBM IIC] registered
i2c-dev: adapter [IBM IIC] registered as minor 1
of:ibm-iic 4ef600800.i2c: using standard (100 kHz) mode
Netfilter messages via NETLINK v0.30.
nf_conntrack version 0.5.0 (8057 buckets, 32228 max)
ctnetlink v0.93: registering with nfnetlink.
xt_time: kernel timezone is -0000
IPVS: Registered protocols ()
IPVS: Connection hash table configured (size=4096, memory=32Kbytes)
IPVS: ipvs loaded.
ip_tables: (C) 2000-2006 Netfilter Core Team
ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully
arp_tables: (C) 2002 David S. Miller
TCP cubic registered
NET: Registered protocol family 17
Bridge firewalling registered
Ebtables v2.0 registered
eth0: link is down
IP-Config: Complete:
     device=eth0, addr=169.254.0.180, mask=255.255.255.0, gw=169.254.0.100,
     host=tanosx, domain=, nis-domain=(none),
     bootserver=169.254.0.100, rootserver=169.254.0.100, rootpath=
ata1: SATA link down (SStatus 0 SControl 0)
RAMDISK: gzip image found at block 0
eth0: link is up, 100 FDX, pause enabled
VFS: Mounted root (ext2 filesystem) on device 1:0.
Freeing unused kernel memory: 184k init


/proc/iomem

4ef600300-4ef600307 : serial
4ef600400-4ef600407 : serial
d80000000-dffffffff : /plb/pci@c0ec00000
e00000000-e7fffffff : /plb/pciex@d00000000
e80000000-effffffff : /plb/pciex@d20000000
  e80000000-e800fffff : PCI Bus 0001:81
    e80000000-e80001fff : 0001:81:00.0
      e80000000-e80001fff : sata_sil24
    e80002000-e8000207f : 0001:81:00.0
      e80002000-e8000207f : sata_sil24


/proc/ioports

00000000-0000ffff : /plb/pci@c0ec00000
  00000000-00000fff : Legacy IO
fffc0000-fffcffff : /plb/pciex@d00000000
  fffc0000-fffc0fff : Legacy IO
fffe0000-fffeffff : /plb/pciex@d20000000
  fffe0000-fffe0fff : Legacy IO
  fffe1000-fffe1fff : PCI Bus 0001:81
    fffe1000-fffe107f : 0001:81:00.0



============== Failing ======================


Using PowerPC 44x Platform machine description
Linux version 2.6.36-rc3-00186-g0e52247 (aymane@lablinux) (gcc version 4.2.2) #19 Mon Jun 27 06:09:26 CDT 2011
Found initrd at 0xdfa5c000:0xdfe4cbfa
Found legacy serial port 0 for /plb/opb/serial@ef600300
  mem=4ef600300, taddr=4ef600300, irq=0, clk=6451612, speed=0
Found legacy serial port 1 for /plb/opb/serial@ef600400
  mem=4ef600400, taddr=4ef600400, irq=0, clk=6451612, speed=0
Top of RAM: 0x20000000, Total RAM: 0x20000000
Memory hole size: 0MB
Zone PFN ranges:
  DMA      0x00000000 -> 0x00020000
  Normal   empty
  HighMem  empty
Movable zone start PFN for each node
early_node_map[1] active PFN ranges
    0: 0x00000000 -> 0x00020000
On node 0 totalpages: 131072
free_area_init_node: node 0, pgdat c03b9f48, node_mem_map c03ed000
  DMA zone: 1024 pages used for memmap
  DMA zone: 0 pages reserved
  DMA zone: 130048 pages, LIFO batch:31
MMU: Allocated 1088 bytes of context maps for 255 contexts
Built 1 zonelists in Zone order, mobility grouping on.  Total pages: 130048
Kernel command line: root=/dev/ram rw mem=512M ip=169.254.0.180:169.254.0.100:169.254.0.100:255.255.255.0:tanosx:eth0:off panic=1 console=ttyS0,57600
PID hash table entries: 2048 (order: 1, 8192 bytes)
Dentry cache hash table entries: 65536 (order: 6, 262144 bytes)
Inode-cache hash table entries: 32768 (order: 5, 131072 bytes)
High memory: 0k
Memory: 511668k/524288k available (3692k kernel code, 12620k reserved, 176k data, 141k bss, 184k init)
Kernel virtual memory layout:
  * 0xfffcf000..0xfffff000  : fixmap
  * 0xffc00000..0xffe00000  : highmem PTEs
  * 0xffa00000..0xffc00000  : consistent mem
  * 0xffa00000..0xffa00000  : early ioremap
  * 0xe1000000..0xffa00000  : vmalloc & ioremap
SLUB: Genslabs=11, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:512
UIC0 (32 IRQ sources) at DCR 0xc0
UIC1 (32 IRQ sources) at DCR 0xd0
irq: irq 30 on host /interrupt-controller0 mapped to virtual irq 30
UIC2 (32 IRQ sources) at DCR 0xe0
irq: irq 10 on host /interrupt-controller0 mapped to virtual irq 16
UIC3 (32 IRQ sources) at DCR 0xf0
irq: irq 16 on host /interrupt-controller0 mapped to virtual irq 17
time_init: decrementer frequency = 800.000010 MHz
time_init: processor frequency   = 800.000010 MHz
clocksource: timebase mult[500000] shift[22] registered
clockevent: decrementer mult[ccccccf7] shift[32] cpu[0]
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
NET: Registered protocol family 16
i2c-core: driver [dummy] registered
irq: irq 11 on host /interrupt-controller1 mapped to virtual irq 18
256k L2-cache enabled
PCIE0: Checking link...
PCIE0: No device detected.
PCI host bridge /plb/pciex@d00000000 (primary) ranges:
 MEM 0x0000000e00000000..0x0000000e7fffffff -> 0x0000000080000000 
 MEM 0x0000000f00000000..0x0000000f000fffff -> 0x0000000000000000 
  IO 0x0000000f80000000..0x0000000f8000ffff -> 0x0000000000000000
 Removing ISA hole at 0x0000000f00000000
4xx PCI DMA offset set to 0x00000000
/plb/pciex@d00000000: Legacy ISA memory support enabled
PCIE0: successfully set as root-complex
PCIE1: Checking link...
PCIE1: Device detected, waiting for link...
PCIE1: link is up !
PCI host bridge /plb/pciex@d20000000 (primary) ranges:
 MEM 0x0000000e80000000..0x0000000effffffff -> 0x0000000080000000 
 MEM 0x0000000f00100000..0x0000000f001fffff -> 0x0000000000000000 
  IO 0x0000000f80010000..0x0000000f8001ffff -> 0x0000000000000000
 Removing ISA hole at 0x0000000f00100000
4xx PCI DMA offset set to 0x00000000
/plb/pciex@d20000000: Legacy ISA memory support enabled
PCIE1: successfully set as root-complex
PCI host bridge /plb/pci@c0ec00000 (primary) ranges:
 MEM 0x0000000d80000000..0x0000000dffffffff -> 0x0000000080000000 
 MEM 0x0000000c0ee00000..0x0000000c0eefffff -> 0x0000000000000000 
  IO 0x0000000c08000000..0x0000000c0800ffff -> 0x0000000000000000
 Removing ISA hole at 0x0000000c0ee00000
4xx PCI DMA offset set to 0x00000000
/plb/pci@c0ec00000: Legacy ISA memory support enabled
PCI: Probing PCI hardware
pci_bus 0000:40: scanning bus
pci 0000:40:00.0: found [aaa0:bed0] class 000604 header type 01
pci 0000:40:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
pci_bus 0000:40: fixups for bus
pci 0000:40:00.0: scanning [bus 41-7f] behind bridge, pass 0
pci_bus 0000:41: scanning bus
pci_bus 0000:41: fixups for bus
pci 0000:40:00.0: PCI bridge to [bus 41-7f]
pci 0000:40:00.0:   bridge window [io  0x0000-0x0000] (disabled)
pci 0000:40:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
pci 0000:40:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
pci_bus 0000:41: bus scan returning with max=41
pci 0000:40:00.0: scanning [bus 41-7f] behind bridge, pass 1
pci_bus 0000:40: bus scan returning with max=7f
pci_bus 0001:80: scanning bus
pci 0001:80:00.0: found [aaa1:bed1] class 000604 header type 01
pci 0001:80:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
pci_bus 0001:80: fixups for bus
pci 0001:80:00.0: scanning [bus 81-bf] behind bridge, pass 0
pci_bus 0001:81: scanning bus
pci 0001:81:00.0: found [1095:3531] class 000180 header type 00
pci 0001:81:00.0: reg 10: [mem 0x00000000-0x0000007f 64bit]
pci 0001:81:00.0: reg 18: [mem 0x00000000-0x00001fff 64bit]
pci 0001:81:00.0: reg 20: [io  0x0000-0x007f]
pci 0001:81:00.0: supports D1 D2
pci_bus 0001:81: fixups for bus
pci 0001:80:00.0: PCI bridge to [bus 81-bf]
pci 0001:80:00.0:   bridge window [io  0x0000-0x0000] (disabled)
pci 0001:80:00.0:   bridge window [mem 0x00000000-0x000fffff] (disabled)
pci 0001:80:00.0:   bridge window [mem 0x00000000-0x000fffff pref] (disabled)
irq: irq 16 on host /interrupt-controller3 mapped to virtual irq 19
pci_bus 0001:81: bus scan returning with max=81
pci 0001:80:00.0: scanning [bus 81-bf] behind bridge, pass 1
pci_bus 0001:80: bus scan returning with max=bf
pci_bus 0002:00: scanning bus
pci_bus 0002:00: fixups for bus
pci_bus 0002:00: bus scan returning with max=00
pci 0000:40:00.0: BAR 0: assigned [mem 0xe00000000-0xe7fffffff pref]
pci 0000:40:00.0: BAR 0: set to [mem 0xe00000000-0xe7fffffff pref] (PCI address [0x80000000-0xffffffff]
pci 0000:40:00.0: PCI bridge to [bus 41-7f]
pci 0000:40:00.0:   bridge window [io  disabled]
pci 0000:40:00.0:   bridge window [mem disabled]
pci 0000:40:00.0:   bridge window [mem pref disabled]
pci 0001:80:00.0: BAR 0: assigned [mem 0xe80000000-0xeffffffff pref]
pci 0001:80:00.0: BAR 0: set to [mem 0xe80000000-0xeffffffff pref] (PCI address [0x80000000-0xffffffff]
pci 0001:80:00.0: BAR 8: can't assign mem (size 0x100000)
pci 0001:80:00.0: BAR 7: assigned [io  0xfffe1000-0xfffe1fff]
pci 0001:81:00.0: BAR 2: can't assign mem (size 0x2000)
pci 0001:81:00.0: BAR 0: can't assign mem (size 0x80)
pci 0001:81:00.0: BAR 4: assigned [io  0xfffe1000-0xfffe107f]
pci 0001:81:00.0: BAR 4: set to [io  0xfffe1000-0xfffe107f] (PCI address [0x1000-0x107f]
pci 0001:80:00.0: PCI bridge to [bus 81-bf]
pci 0001:80:00.0:   bridge window [io  0xfffe1000-0xfffe1fff]
pci 0001:80:00.0:   bridge window [mem disabled]
pci 0001:80:00.0:   bridge window [mem pref disabled]
pci_bus 0000:40: resource 0 [io  0xfffc0000-0xfffcffff]
pci_bus 0000:40: resource 1 [mem 0xe00000000-0xe7fffffff]
pci_bus 0001:80: resource 0 [io  0xfffe0000-0xfffeffff]
pci_bus 0001:80: resource 1 [mem 0xe80000000-0xeffffffff]
pci_bus 0001:81: resource 0 [io  0xfffe1000-0xfffe1fff]
pci_bus 0002:00: resource 0 [io  0x0000-0xffff]
pci_bus 0002:00: resource 1 [mem 0xd80000000-0xdffffffff]
bio: create slab <bio-0> at 0
i2c-core: driver [pcf857x] registered
vgaarb: loaded
SCSI subsystem initialized
libata version 3.00 loaded.
Switching to clocksource timebase
NET: Registered protocol family 2
IP route cache hash table entries: 4096 (order: 2, 16384 bytes)
TCP established hash table entries: 16384 (order: 5, 131072 bytes)
TCP bind hash table entries: 16384 (order: 4, 65536 bytes)
TCP: Hash tables configured (established 16384 bind 16384)
TCP reno registered
UDP hash table entries: 256 (order: 0, 4096 bytes)
UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
NET: Registered protocol family 1
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Trying to unpack rootfs image as initramfs...
rootfs image is not initramfs (no cpio magic); looks like an initrd
Freeing initrd memory: 4034k freed
irq: irq 1 on host /interrupt-controller1 mapped to virtual irq 20
irq: irq 1 on host /interrupt-controller0 mapped to virtual irq 21
irq: irq 29 on host /interrupt-controller0 mapped to virtual irq 29
irq: irq 6 on host /interrupt-controller2 mapped to virtual irq 22
irq: irq 7 on host /interrupt-controller2 mapped to virtual irq 23
irq: irq 3 on host /interrupt-controller2 mapped to virtual irq 24
irq: irq 4 on host /interrupt-controller2 mapped to virtual irq 25
irq: irq 5 on host /interrupt-controller2 mapped to virtual irq 26
irq: irq 29 on host /interrupt-controller2 mapped to virtual irq 27
irq: irq 30 on host /interrupt-controller2 mapped to virtual irq 28
irq: irq 28 on host /interrupt-controller2 mapped to virtual irq 31
irq: irq 26 on host /interrupt-controller1 mapped to virtual irq 32
irq: irq 12 on host /interrupt-controller0 mapped to virtual irq 33
irq: irq 0 on host /interrupt-controller3 mapped to virtual irq 34
irq: irq 5 on host /interrupt-controller3 mapped to virtual irq 35
irq: irq 6 on host /interrupt-controller1 mapped to virtual irq 36
irq: irq 2 on host /interrupt-controller0 mapped to virtual irq 37
irq: irq 3 on host /interrupt-controller0 mapped to virtual irq 38
irq: irq 16 on host /interrupt-controller2 mapped to virtual irq 39
irq: irq 20 on host /interrupt-controller2 mapped to virtual irq 40
irq: irq 17 on host /interrupt-controller2 mapped to virtual irq 41
irq: irq 21 on host /interrupt-controller2 mapped to virtual irq 42
msgmni has been set to 1007
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 254)
io scheduler noop registered
io scheduler deadline registered
io scheduler cfq registered (default)
pci_hotplug: PCI Hot Plug PCI Core version: 0.5
pciehp: PCI Express Hot Plug Controller Driver version: 0.4
Serial: 8250/16550 driver, 2 ports, IRQ sharing enabled
serial8250.0: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a U6_16550A
console [ttyS0] enabled
serial8250.0: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a U6_16550A
4ef600300.serial: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a 16550
4ef600400.serial: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a 16550
brd: module loaded
i2c-core: driver [at24] registered
sata_sil24 0001:81:00.0: version 1.1
sata_sil24 0001:81:00.0: enabling device (0000 -> 0001)
sata_sil24: probe of 0001:81:00.0 failed with error -22
PPC 4xx OCP EMAC driver, version 3.54
MAL v2 /plb/mcmal, 2 TX channels, 16 RX channels
ZMII /plb/opb/emac-zmii@ef600d00 initialized
RGMII /plb/opb/emac-rgmii@ef601500 initialized with MDIO support
TAH /plb/opb/emac-tah@ef601350 initialized
TAH /plb/opb/emac-tah@ef601450 initialized
/plb/opb/emac-rgmii@ef601500: input 0 in RGMII mode
eth0: EMAC-0 /plb/opb/ethernet@ef600e00, MAC 00:10:ec:01:02:b9
eth0: found Generic MII PHY (0x00)
/plb/opb/emac-rgmii@ef601500: input 1 in RGMII mode
eth1: EMAC-1 /plb/opb/ethernet@ef600f00, MAC 00:10:ec:81:02:b9
eth1: found Generic MII PHY (0x01)
i2c /dev entries driver
i2c-core: driver [dev_driver] registered
of:ibm-iic 4ef600700.i2c: clckdiv = 9
i2c i2c-0: adapter [IBM IIC] registered
irq: irq 25 on host /interrupt-controller2 mapped to virtual irq 43
i2c 0-0068: uevent
i2c i2c-0: client [m41t80] registered with bus id 0-0068
irq: irq 20 on host /interrupt-controller1 mapped to virtual irq 44
i2c 0-0048: uevent
i2c i2c-0: client [ad7414] registered with bus id 0-0048
i2c-dev: adapter [IBM IIC] registered as minor 0
of:ibm-iic 4ef600700.i2c: using standard (100 kHz) mode
of:ibm-iic 4ef600800.i2c: clckdiv = 9
i2c i2c-1: adapter [IBM IIC] registered
i2c-dev: adapter [IBM IIC] registered as minor 1
of:ibm-iic 4ef600800.i2c: using standard (100 kHz) mode
Netfilter messages via NETLINK v0.30.
nf_conntrack version 0.5.0 (8057 buckets, 32228 max)
ctnetlink v0.93: registering with nfnetlink.
xt_time: kernel timezone is -0000
IPVS: Registered protocols ()
IPVS: Connection hash table configured (size=4096, memory=32Kbytes)
IPVS: ipvs loaded.
ip_tables: (C) 2000-2006 Netfilter Core Team
ipt_CLUSTERIP: ClusterIP Version 0.8 loaded successfully
arp_tables: (C) 2002 David S. Miller
TCP cubic registered
NET: Registered protocol family 17
Bridge firewalling registered
Ebtables v2.0 registered
eth0: link is down
IP-Config: Complete:
     device=eth0, addr=169.254.0.180, mask=255.255.255.0, gw=169.254.0.100,
     host=tanosx, domain=, nis-domain=(none),
     bootserver=169.254.0.100, rootserver=169.254.0.100, rootpath=
RAMDISK: gzip image found at block 0
eth0: link is up, 100 FDX, pause enabled
VFS: Mounted root (ext2 filesystem) on device 1:0.
Freeing unused kernel memory: 184k init

/proc/iomem

4ef600300-4ef600307 : serial
4ef600400-4ef600407 : serial
d80000000-dffffffff : /plb/pci@c0ec00000
e00000000-e7fffffff : /plb/pciex@d00000000
  e00000000-e7fffffff : 0000:40:00.0
e80000000-effffffff : /plb/pciex@d20000000
  e80000000-effffffff : 0001:80:00.0

/proc/ioports

00000000-0000ffff : /plb/pci@c0ec00000
  00000000-00000fff : Legacy IO
fffc0000-fffcffff : /plb/pciex@d00000000
  fffc0000-fffc0fff : Legacy IO
fffe0000-fffeffff : /plb/pciex@d20000000
  fffe0000-fffe0fff : Legacy IO
  fffe1000-fffe1fff : PCI Bus 0001:81
    fffe1000-fffe107f : 0001:81:00.0

^ permalink raw reply

* Re: powerpc/4xx: Regression failed on sil24 (and other) drivers
From: Benjamin Herrenschmidt @ 2011-06-27 10:19 UTC (permalink / raw)
  To: Ayman El-Khashab; +Cc: cam, linuxppc-dev
In-Reply-To: <20110625235259.GA18837@crust.elkhashab.com>

On Sat, 2011-06-25 at 18:52 -0500, Ayman El-Khashab wrote:
> I noticed during a recent development with the 460SX that a
> simple device that once worked stopped.  I did a bisect to
> find the offending commit and it turns out to be this one:
> 
> 0e52247a2ed1f211f0c4f682dc999610a368903f is the first bad
> commit
> commit 0e52247a2ed1f211f0c4f682dc999610a368903f
> Author: Cam Macdonell <cam@cs.ualberta.ca>
> Date:   Tue Sep 7 17:25:20 2010 -0700
> 
>     PCI: fix pci_resource_alignment prototype
> 
> I found it working with 2.6.36 but it seems that it is in
> the current trunk as well.
> 
> I patched my code to take out this commit and (quickly)
> verified it was ok.  I am guessing the patch is ok since it
> converts int types to resource_size_t.  My guess is that the
> problem is in the sil24 driver but I did not see anything 
> obvious in that code.  Any tips on what could be wrong?  Is
> the problem potentially somewhere being called by that code?
> 
> The device driver fails with "error -22" on a 460SX (which 
> has the 36 bit pci space).
> 
> sil24 /drivers/ata/sata_sil24.c

Can you send a dmesg & output of /proc/iomem & ioport with and without
the patch (same kernel otherwise) ?

Also can you try to figure out (printk's) where in the driver does it
fail ? (Which function fails)

It's possible that this changes something in the core resource
assignment code causing something else to fail elsewhere or exposing
another bug elsewhere with the consequence of leaving the SiL with badly
assigned resources.

Cheers,
Ben.

^ permalink raw reply

* Re: [PATCH 0/1] ppc4xx: Fix PCIe scanning for the 460SX
From: Benjamin Herrenschmidt @ 2011-06-27 10:15 UTC (permalink / raw)
  To: Ayman El-Khashab
  Cc: Tirumala Marri, linuxppc-dev, Paul Mackerras, Tony Breeds
In-Reply-To: <20110627101414.GA9369@crust.elkhashab.com>

On Mon, 2011-06-27 at 05:14 -0500, Ayman El-Khashab wrote:
> > I took care of that in my patch.  Basically it let the
> > system go to gen-2 speeds and negotiate down.
> > [marri] Great thx.
> 
> Ok, so I am back from doing whatever it is that I do.  Shall
> I go ahead and take a stab at making a new functor to handle
> the "link check"? -- which IIRC was the thought from last
> month about how best to handle the 460SX and whatever some
> people were using internally. 

Catch up with Tony (CC), he's working on something similar for a new
variant of that PCIe controller used internally by some IBM stuff.

Cheers,
Ben.

^ permalink raw reply

* Re: [PATCH 0/1] ppc4xx: Fix PCIe scanning for the 460SX
From: Ayman El-Khashab @ 2011-06-27 10:14 UTC (permalink / raw)
  To: Tirumala Marri; +Cc: Paul Mackerras, linuxppc-dev
In-Reply-To: <fa765cbed63d89c50a79b34f25dc9f5c@mail.gmail.com>

On Tue, May 31, 2011 at 02:27:19PM -0700, Tirumala Marri wrote:
> Not sure how I would know --  But with my eiger kit, I got a
> cd from amcc that had a patched 2.6.30 or something kernel
> in it to support the 460SX.  The pci code was basically
> subverted by adding a "port->link=1" at the very end of the
> link check to always force it to succeed.  However this code
> never appeared in the public git repositories, so I am not
> sure how the 460SX functioned (if it ever did) since the
> link check that is in there now can't work on that SOC.
> 
> 
> [marri]I don't know what PCI-E devices you use. We use E1000
> As a device for testing. Link-up was working before the submission.
> There were some changes happened afterwards to the common code
> Which seems to affected all 4xx devices. I will try latest code
> On our other SoCs.

Well, briefly we build a custom processor board that has
a couple powerpcs on it and some pcie switches.  We end up
plugging our devices into the switches which is unlike what
most people try.  In any case, we use several different
drive controllers for SAS, SCSI, and SSDs.  For testing
purposes (i.e. when things don't go the way they should) we
have an adapter to make "regular" pcie slots that we plug in
whatever.  But our switches are on the board with the CPUs
so as far as the CPU goes, it will always see a gen-2 link
8 lane link, irrespective of what the endpoint actually is.
We let the switches handle the speed changes and the port
bifurcation.  

> I took care of that in my patch.  Basically it let the
> system go to gen-2 speeds and negotiate down.
> [marri] Great thx.

Ok, so I am back from doing whatever it is that I do.  Shall
I go ahead and take a stab at making a new functor to handle
the "link check"? -- which IIRC was the thought from last
month about how best to handle the 460SX and whatever some
people were using internally.

Ayman

^ permalink raw reply

* Re: [BUG?]3.0-rc4+ftrace+kprobe: set kprobe at instruction 'stwu' lead to system crash/freeze
From: Ananth N Mavinakayanahalli @ 2011-06-27 10:01 UTC (permalink / raw)
  To: Masami Hiramatsu
  Cc: Jim Keniston, linux-kernel, Steven Rostedt, Yong Zhang, paulus,
	yrl.pp-manager.tt, linuxppc-dev
In-Reply-To: <4E074671.7060100@hitachi.com>

On Sun, Jun 26, 2011 at 11:47:13PM +0900, Masami Hiramatsu wrote:
> (2011/06/24 19:29), Steven Rostedt wrote:
> > On Fri, 2011-06-24 at 17:21 +0800, Yong Zhang wrote:
> >> Hi,
> >>
> >> When I use kprobe to do something, I found some wired thing.
> >>
> >> When CONFIG_FUNCTION_TRACER is disabled:
> >> (gdb) disassemble do_fork
> >> Dump of assembler code for function do_fork:
> >>    0xc0037390 <+0>:	mflr    r0
> >>    0xc0037394 <+4>:	stwu    r1,-64(r1)
> >>    0xc0037398 <+8>:	mfcr    r12
> >>    0xc003739c <+12>:	stmw    r27,44(r1)
> >>
> >> Then I:
> >> modprobe kprobe_example func=do_fork offset=4
> >> ls
> >> Things works well.
> >>
> >> But when CONFIG_FUNCTION_TRACER is enabled:
> >> (gdb) disassemble do_fork
> >> Dump of assembler code for function do_fork:
> >>    0xc0040334 <+0>:	mflr    r0
> >>    0xc0040338 <+4>:	stw     r0,4(r1)
> >>    0xc004033c <+8>:	bl      0xc00109d4 <mcount>
> >>    0xc0040340 <+12>:	stwu    r1,-80(r1)
> >>    0xc0040344 <+16>:	mflr    r0
> >>    0xc0040348 <+20>:	stw     r0,84(r1)
> >>    0xc004034c <+24>:	mfcr    r12
> >> Then I:
> >> modprobe kprobe_example func=do_fork offset=12
> >> ls
> >> 'ls' will never retrun. system freeze.
> > 
> > I'm not sure if x86 had a similar issue.
> > 
> > Masami, have any ideas to why this happened?
> 
> No, I don't familiar with ppc implementation. I guess
> that single-step resume code failed to emulate the
> instruction, but it strongly depends on ppc arch.
> Maybe IBM people may know what happened.
> 
> Ananth, Jim, would you have any ideas?

On powerpc, we emulate sstep whenever possible. Only recently support to
emulate loads and stores got added. I don't have access to a powerpc box
today... but will try to recreate the problem ASAP and see what could be
happening in the presence of mcount.

Ananth

^ permalink raw reply

* Re: [PATCH] hwrng: ppc4xx - add support for ppc4xx TRNG
From: Herbert Xu @ 2011-06-27  7:39 UTC (permalink / raw)
  To: Matt Mackall; +Cc: linuxppc-dev
In-Reply-To: <1308671762.4954.0.camel@calx>

On Tue, Jun 21, 2011 at 10:56:02AM -0500, Matt Mackall wrote:
> On Tue, 2011-06-21 at 08:19 -0400, Josh Boyer wrote:
> > Various PowerPC 4xx SoCs contain a TRNG embedded in the Security function.
> > This adds a device driver for that TRNG.
> > 
> > Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
> 
> Looks good.
> 
> Acked-by: Matt Mackall <mpm@selenic.com>

Also applied.  Thanks!
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply

* Re: [PATCH] crypto: crypto4xx - Perform read/modify/write on device control register
From: Herbert Xu @ 2011-06-27  7:33 UTC (permalink / raw)
  To: Josh Boyer; +Cc: linuxppc-dev, James Hsiao, linux-crypto
In-Reply-To: <20110621121321.GA2414@zod.rchland.ibm.com>

On Tue, Jun 21, 2011 at 08:13:21AM -0400, Josh Boyer wrote:
> The Security function on the AMCC SoCs has multiple engines within a
> single MMIO range.  The crypto driver currently enables the 3DES
> functionality by doing a blind write to the device control register.
> This can unintentionally disable other functions like the PKA or TRNG
> when the driver is loaded.
> 
> Perform a read/modify/write to enable the 3DES function instead.
> 
> Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>

Patch applied.  Thanks.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply

* Re: Bug#630845: linux-image-2.6.39-2-powerpc: CHRP Pegasos2 boot failure
From: Ben Hutchings @ 2011-06-26 22:14 UTC (permalink / raw)
  To: Gabriel Paubert, Michael Ellerman; +Cc: 630845, Andrew Buckeridge, linuxppc-dev
In-Reply-To: <20110623203654.04f151e1.andrewb@zagam.net>

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On Thu, 2011-06-23 at 20:36 +0800, Andrew Buckeridge wrote:
> Package: linux-image-3.0.0-rc3-powerpc
> Version: 3.0.0~rc3-1~experimental.1
> 
> On Wed, 22 Jun 2011 04:01:38 +0100
> Ben Hutchings <ben@decadent.org.uk> wrote:
> 
> > > linux-image-2.6.36-trunk-powerpc_2.6.36-1~experimental.1_powerpc.deb
> > > linux-image-2.6.37-1-powerpc_2.6.37-1_powerpc.deb
> > > linux-image-2.6.37-2-powerpc_2.6.37-2_powerpc.deb
> > > These failed to boot. In all cases stuck at the spinner.
> > 
> > At a guess, this may be fixed by a change in Linux 3.0-rc1:
> 
> > Please can you test Linux 3.0-rc3, currently available in experimental?
> 
> linux-image-3.0.0-rc3-powerpc_3.0.0~rc3-1~experimental.1_powerpc.deb
> Also failed to boot and got stuck at spinner.

Gabriel, Michael, do you recognise this bug?  Are there any fixes for
Pegasos that are missing from 3.0-rc3?

Ben.

-- 
Ben Hutchings
If more than one person is responsible for a bug, no one is at fault.

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^ permalink raw reply


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