* Re: [PATCH 14/14] arm/include/asm/io.h : added macros to read/write big/little endian register
From: Benjamin Herrenschmidt @ 2011-09-02 11:02 UTC (permalink / raw)
To: Pratyush Anand
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
tmarri, Sebastian Andrzej Siewior, linux-usb, vipin.kumar,
shiraz.hashim, Amit.VIRDI, rajeev-dlh.kumar, mmiesfeld,
deepak.sikri, linuxppc-dev, fchen
In-Reply-To: <CAHM4w1k56SgXXvDm0f8-P_LOsmYgG4_RjBVD3T9ws+BNk+U_+Q@mail.gmail.com>
> There can be some peripheral like dwc-otg, whose registers will be
> either in LE or in BE
> depending on the RTL configuration selected by a implementor.
> Software always expects a LE value when it will call "in_" and will
> provide a LE value when "out_".
> It expects beacuse , it wants to do same bit wise operation for both
> configurations.
Then these are the wrong accessors.
Cheers,
Ben.
>
>
> >>+
> >
> > Please split this patch out and get it accepterd by ARM community. USB
> > people won't merge this.
> >
>
> Ok, will send it to ARM mailing list.
>
> Regards
> Pratyush
>
> > Sebastian
> > --
> > To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> > the body of a message to majordomo@vger.kernel.org
> > More majordomo info at http://vger.kernel.org/majordomo-info.html
> >
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH 02/14] dwc/otg: Structure declaration for shared data
From: Alexander Gordeev @ 2011-09-02 12:30 UTC (permalink / raw)
To: Pratyush Anand
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
Tirumala Marri, linux-usb, vipin.kumar, shiraz.hashim, Amit.VIRDI,
rajeev-dlh.kumar, Mark Miesfeld, deepak.sikri, linuxppc-dev,
Fushen Chen
In-Reply-To: <CAHM4w1nZkjT2zXB=KfXw0ueOBTLRL2hMFxRYyFwTAoWsdrD9iA@mail.gmail.com>
[-- Attachment #1: Type: text/plain, Size: 875 bytes --]
В Fri, 2 Sep 2011 17:12:17 +0530
Pratyush Anand <pratyush.anand@gmail.com> пишет:
> I will send you those patches.
> But, how to go about it? Will you send next revision of your patces soon, and
> will also include comments for current review?
>
> Or,
>
> I replly all the comments from community and get agreed about
> modifications first.
> Then I will release next revision with all these modifications and get
> it included. Once these patches are
> included then we can keep on sending further patches over those
> included. This will shorten review time
> and will be easier for inclusion.
What do you think about making a public git repository on github, for
example? I'm using dwc_otg on several MIPS boards and would be happy to
contribute too (at least, fix things pointed out by reviewers to speed
up inclusion).
--
Alexander
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[-- Type: application/pgp-signature, Size: 490 bytes --]
^ permalink raw reply
* Re: [PATCH 03/14] dwc/otg: Add driver framework
From: Pratyush Anand @ 2011-09-02 11:55 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
tmarri, linux-usb, vipin.kumar, shiraz.hashim, Amit.VIRDI,
rajeev-dlh.kumar, mmiesfeld, deepak.sikri, linuxppc-dev, fchen
In-Reply-To: <4E60BEB9.4020200@linutronix.de>
On Fri, Sep 2, 2011 at 5:02 PM, Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
> On 09/02/2011 01:17 PM, Pratyush Anand wrote:
>>>
>>> oh boy, oh boy. This is a huge number of module parameters. Do you
>>> actually expect someone setting all of them on modprobe? And if udev is
>>> faster you rmmod and modpobe again, right? The clever ones would enter
>>> it somewhere in modprobe.conf or so. Anyway. Since you have
>>> already device tree bindings and I assume you are using them, why not
>>> move all this parameters into the device and remove _all_ module
>>> parameters?
>>
>> In my case, I am passing necessary parameters from platform_data.
>> I do not use module param.
>
> From what I can see in
> =A0http://permalink.gmane.org/gmane.linux.ports.arm.kernel/76267
>
> is that it is being worked on DT-support for SPEAr. So I think it
> would be better to grab this information from the device tree if
> available (and keep the standard value otherwise) instead of starting
> doing the platform_data thingy.
will get the knowledge about device tree and will explore this option.
Regards
Pratyush
>
> Sebastian
>
^ permalink raw reply
* Re: [PATCH 02/14] dwc/otg: Structure declaration for shared data
From: Pratyush Anand @ 2011-09-02 11:49 UTC (permalink / raw)
To: Greg KH
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
tmarri, linux-usb, vipin.kumar, shiraz.hashim, Amit.VIRDI,
rajeev-dlh.kumar, mmiesfeld, deepak.sikri, linuxppc-dev, fchen
In-Reply-To: <20110831223604.GB27818@kroah.com>
On Thu, Sep 1, 2011 at 4:06 AM, Greg KH <greg@kroah.com> wrote:
> On Tue, Aug 30, 2011 at 05:27:49PM +0530, Pratyush Anand wrote:
>> There are some DWC OTG parameters which might be passed by a platform.
>> Declaration for structure of those parameters have been provided in this
>> include file.
>>
>> Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
>> ---
>> =A0include/linux/usb/dwc_otg.h | =A0274 ++++++++++++++++++++++++++++++++=
+++++++++++
>> =A01 files changed, 274 insertions(+), 0 deletions(-)
>> =A0create mode 100644 include/linux/usb/dwc_otg.h
>>
>> diff --git a/include/linux/usb/dwc_otg.h b/include/linux/usb/dwc_otg.h
>
> Shouldn't this be in include/linux/platform/ instead?
do you mean linux/platform_data/?
seems better place.
Regards
Pratyush
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at =A0http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: [PATCH 02/14] dwc/otg: Structure declaration for shared data
From: Pratyush Anand @ 2011-09-02 11:42 UTC (permalink / raw)
To: Tirumala Marri
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
linux-usb, vipin.kumar, shiraz.hashim, Amit.VIRDI,
rajeev-dlh.kumar, Mark Miesfeld, deepak.sikri, linuxppc-dev,
Fushen Chen
In-Reply-To: <a85a652e82b2bacdda84d7286b804aa3@mail.gmail.com>
I will send you those patches.
But, how to go about it? Will you send next revision of your patces soon, and
will also include comments for current review?
Or,
I replly all the comments from community and get agreed about
modifications first.
Then I will release next revision with all these modifications and get
it included. Once these patches are
included then we can keep on sending further patches over those
included. This will shorten review time
and will be easier for inclusion.
Regards
Pratyush
On Wed, Aug 31, 2011 at 10:47 PM, Tirumala Marri <tmarri@apm.com> wrote:
> <
> <Tirumala,
> <
> <If you agree , then I can send you modifications which I did over your
> <patches(v13) separately,
> <and then you can decide the final inclusion of only these modifications.
> [Tirumala Marri] Sounds like a plan. Could you send the changes, I will
> take
> A look at the changes.
>
> --marri
>
^ permalink raw reply
* Re: [PATCH 03/14] dwc/otg: Add driver framework
From: Sebastian Andrzej Siewior @ 2011-09-02 11:32 UTC (permalink / raw)
To: Pratyush Anand
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
tmarri, linux-usb, vipin.kumar, shiraz.hashim, Amit.VIRDI,
rajeev-dlh.kumar, mmiesfeld, deepak.sikri, linuxppc-dev, fchen
In-Reply-To: <CAHM4w1nwyCxJYyPxJn=yXmcD+cAMY4txorrgfKHdp-FGDZ7BKg@mail.gmail.com>
On 09/02/2011 01:17 PM, Pratyush Anand wrote:
>> oh boy, oh boy. This is a huge number of module parameters. Do you
>> actually expect someone setting all of them on modprobe? And if udev is
>> faster you rmmod and modpobe again, right? The clever ones would enter
>> it somewhere in modprobe.conf or so. Anyway. Since you have
>> already device tree bindings and I assume you are using them, why not
>> move all this parameters into the device and remove _all_ module
>> parameters?
>
> In my case, I am passing necessary parameters from platform_data.
> I do not use module param.
From what I can see in
http://permalink.gmane.org/gmane.linux.ports.arm.kernel/76267
is that it is being worked on DT-support for SPEAr. So I think it
would be better to grab this information from the device tree if
available (and keep the standard value otherwise) instead of starting
doing the platform_data thingy.
Sebastian
^ permalink raw reply
* Re: [PATCH 01/14] dwc/otg: Add Register definitions
From: Pratyush Anand @ 2011-09-02 11:31 UTC (permalink / raw)
To: Greg KH
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
tmarri, linux-usb, vipin.kumar, shiraz.hashim, Amit.VIRDI,
rajeev-dlh.kumar, mmiesfeld, deepak.sikri, linuxppc-dev, fchen
In-Reply-To: <20110831223506.GA27818@kroah.com>
On Thu, Sep 1, 2011 at 4:05 AM, Greg KH <greg@kroah.com> wrote:
> On Tue, Aug 30, 2011 at 05:27:48PM +0530, Pratyush Anand wrote:
>> From: Tirumala Marri <tmarri@apm.com>
>>
>> Add Synopsys Design Ware core register definitions.
>>
>> Signed-off-by: Tirumala R Marri <tmarri@apm.com>
>> Signed-off-by: Fushen Chen <fchen@apm.com>
>> Signed-off-by: Mark Miesfeld <mmiesfeld@apm.com>
>> Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
>> ---
>> =A0drivers/usb/dwc/regs.h | 1324 +++++++++++++++++++++++++++++++++++++++=
+++++++++
>> =A01 files changed, 1324 insertions(+), 0 deletions(-)
>> =A0create mode 100644 drivers/usb/dwc/regs.h
>>
>> diff --git a/drivers/usb/dwc/regs.h b/drivers/usb/dwc/regs.h
>> new file mode 100644
>> index 0000000..f29e945
>> --- /dev/null
>> +++ b/drivers/usb/dwc/regs.h
>> @@ -0,0 +1,1324 @@
>> +/*
>> + * DesignWare HS OTG controller driver
>> + * Copyright (C) 2006 Synopsys, Inc.
>> + * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
>> + *
>> + * This program is free software: you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * version 2 as published by the Free Software Foundation.
>
> You can stop the boiler-plate text here, because:
:) Ok
>
>> + *
>> + * This program is distributed in the hope that it will be useful
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>> + * GNU General Public License version 2 for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program; if not, see http://www.gnu.org/licenses
>> + * or write to the Free Software Foundation, Inc., 51 Franklin Street,
>> + * Suite 500, Boston, MA 02110-1335 USA.
>
> Unless you wish to track the office location of the FSF for the next 20+
> years, remove this, and the previous paragraph please.
>
:) ok
>> + *
>> + * Based on Synopsys driver version 2.60a
>> + * Modified by Mark Miesfeld <mmiesfeld@apm.com>
>> + *
>> + * Revamped register difinitions by Tirumala R Marri(tmarri@apm.com)
>> + *
>> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS =
"AS IS"
>> + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO =
THE
>> + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR P=
URPOSE
>> + * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY D=
IRECT,
>> + * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
>> + * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SE=
RVICES;
>> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAU=
SED AND
>> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR=
TORT
>> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE US=
E OF
>> + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>
> This paragraph is not needed, right?
will remove.
>
>> + *
>> + */
>> +
>> +#ifndef __DWC_OTG_REGS_H__
>> +#define __DWC_OTG_REGS_H__
>> +
>> +#include <linux/types.h>
>> +#include <linux/usb/dwc_otg.h>
>> +/*Bit fields in the Device EP Transfer Size Register is 11 bits */
>
> What is this comment for?
>
> Did you drop a space? =A0And forget an extra line?
will correct.
>
>> +#undef DWC_LIMITED_XFER_SIZE
>> +/*
>> + * This file contains the Macro defintions for accessing the DWC_otg co=
re
>> + * registers.
>> + *
>> + * The application interfaces with the HS OTG core by reading from and
>> + * writing to the Control and Status Register (CSR) space through the
>> + * AHB Slave interface. These registers are 32 bits wide, and the
>> + * addresses are 32-bit-block aligned.
>> + * CSRs are classified as follows:
>> + * - Core Global Registers
>> + * - Device Mode Registers
>> + * - Device Global Registers
>> + * - Device Endpoint Specific Registers
>> + * - Host Mode Registers
>> + * - Host Global Registers
>> + * - Host Port CSRs
>> + * - Host Channel Specific Registers
>> + *
>> + * Only the Core Global registers can be accessed in both Device and
>> + * Host modes. When the HS OTG core is operating in one mode, either
>> + * Device or Host, the application must not access registers from the
>> + * other mode. When the core switches from one mode to another, the
>> + * registers in the new mode of operation must be reprogrammed as they
>> + * would be after a power-on reset.
>> + */
>> +
>> +/*
>> + * DWC_otg Core registers. =A0The core_global_regs structure defines th=
e
>> + * size and relative field offsets for the Core Global registers.
>> + */
>> +#define =A0 =A0 =A0DWC_GOTGCTL =A0 =A0 =A0 =A0 =A0 =A0 0x000
>> +#define =A0 =A0 =A0DWC_GOTGINT =A0 =A0 =A0 =A0 =A0 =A0 0x004
>> +#define =A0 =A0 =A0DWC_GAHBCFG =A0 =A0 =A0 =A0 =A0 =A0 0x008
>> +#define =A0 =A0 =A0DWC_GUSBCFG =A0 =A0 =A0 =A0 =A0 =A0 0x00C
>> +#define =A0 =A0 =A0DWC_GRSTCTL =A0 =A0 =A0 =A0 =A0 =A0 0x010
>> +#define =A0 =A0 =A0DWC_GINTSTS =A0 =A0 =A0 =A0 =A0 =A0 0x014
>> +#define =A0 =A0 =A0DWC_GINTMSK =A0 =A0 =A0 =A0 =A0 =A0 0x018
>> +#define =A0 =A0 =A0DWC_GRXSTSR =A0 =A0 =A0 =A0 =A0 =A0 0x01C
>> +#define =A0 =A0 =A0DWC_GRXSTSP =A0 =A0 =A0 =A0 =A0 =A0 0x020
>> +#define =A0 =A0 =A0DWC_GRXFSIZ =A0 =A0 =A0 =A0 =A0 =A0 0x024
>> +#define =A0 =A0 =A0DWC_GNPTXFSIZ =A0 =A0 =A0 =A0 =A0 0x028
>> +#define =A0 =A0 =A0DWC_GNPTXSTS =A0 =A0 =A0 =A0 =A0 =A00x02C
>> +#define =A0 =A0 =A0DWC_GI2CCTL =A0 =A0 =A0 =A0 =A0 =A0 0x030
>> +#define =A0 =A0 =A0DWC_VDCTL =A0 =A0 =A0 =A0 =A0 =A0 =A0 0x034
>> +#define =A0 =A0 =A0DWC_GGPIO =A0 =A0 =A0 =A0 =A0 =A0 =A0 0x038
>> +#define =A0 =A0 =A0DWC_GUID =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A00x03C
>> +#define =A0 =A0 =A0DWC_GSNPSID =A0 =A0 =A0 =A0 =A0 =A0 0x040
>> +#define =A0 =A0 =A0DWC_GHWCFG1 =A0 =A0 =A0 =A0 =A0 =A0 0x044
>> +#define =A0 =A0 =A0DWC_GHWCFG2 =A0 =A0 =A0 =A0 =A0 =A0 0x048
>> +#define =A0 =A0 =A0DWC_GHWCFG3 =A0 =A0 =A0 =A0 =A0 =A0 0x04c
>> +#define =A0 =A0 =A0DWC_GHWCFG4 =A0 =A0 =A0 =A0 =A0 =A0 0x050
>> +#define =A0 =A0 =A0DWC_HPTXFSIZ =A0 =A0 =A0 =A0 =A0 =A00x100
>> +#define =A0 =A0 =A0DWC_DPTX_FSIZ_DIPTXF(x) (0x104 + x * 4) /* 15 <=3D x=
> 1 */
>
> Drop the tab after #define please, as you don't have it anywhere else.
ok. will correct.
Regards
Pratyush
>
>
> thanks,
>
> greg k-h
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at =A0http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: [PATCH 08/14] dwc/otg: Add PCD function
From: Pratyush Anand @ 2011-09-02 11:26 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
tmarri, linux-usb, vipin.kumar, shiraz.hashim, Amit.VIRDI,
rajeev-dlh.kumar, mmiesfeld, deepak.sikri, linuxppc-dev, fchen
In-Reply-To: <20110831074418.GC9353@linutronix.de>
On Wed, Aug 31, 2011 at 1:14 PM, Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
> * Pratyush Anand | 2011-08-30 17:27:55 [+0530]:
>>diff --git a/drivers/usb/dwc/pcd.c b/drivers/usb/dwc/pcd.c
>>new file mode 100644
>>index 0000000..2ef6405
>>--- /dev/null
>>+++ b/drivers/usb/dwc/pcd.c
>>+static const struct usb_gadget_ops dwc_otg_pcd_ops =3D {
>>+ =A0 =A0 =A0.get_frame =3D dwc_otg_pcd_get_frame,
>>+ =A0 =A0 =A0.wakeup =3D dwc_otg_pcd_wakeup,
>
> You may want to provide udc_start and udc_stop hooks.
> drivers/usb/dwc3/gadget.c and drivers/usb/musb/musb_gadget.c are two
> driver which are using it. The other gadget are using .start and .stop
> hooks which I would like to go.
>
>>+ =A0 =A0 =A0/* not selfpowered */
>>+};
>>+
>>+/**
>>+ * This function registers a gadget driver with the PCD.
>>+ *
>>+ * When a driver is successfully registered, it will receive control
>>+ * requests including set_configuration(), which enables non-control
>>+ * requests. =A0then usb traffic follows until a disconnect is reported.
>>+ * then a host may connect again, or the driver might get unbound.
>>+ */
>>+int usb_gadget_probe_driver(struct usb_gadget_driver *driver,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0int (*bind) (struct =
usb_gadget *))
>
> You can not provide usb_gadget_probe_driver() anymore. That is why you
> need to provide those hooks I mentioned.
will correct.
Regards
Pratyush
>
> Sebastian
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at =A0http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: [PATCH 03/14] dwc/otg: Add driver framework
From: Pratyush Anand @ 2011-09-02 11:17 UTC (permalink / raw)
To: Sebastian Andrzej Siewior, tmarri
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
linux-usb, vipin.kumar, shiraz.hashim, Amit.VIRDI,
rajeev-dlh.kumar, mmiesfeld, deepak.sikri, linuxppc-dev, fchen
In-Reply-To: <20110831071929.GA9353@linutronix.de>
On Wed, Aug 31, 2011 at 12:49 PM, Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
> * Pratyush Anand | 2011-08-30 17:27:50 [+0530]:
>
>>diff --git a/drivers/usb/dwc/apmppc.c b/drivers/usb/dwc/apmppc.c
>>new file mode 100644
>>index 0000000..80ea274
>>--- /dev/null
>>+++ b/drivers/usb/dwc/apmppc.c
>>@@ -0,0 +1,436 @@
>>+/*
>>+ * DesignWare HS OTG controller driver
>>+ * Copyright (C) 2006 Synopsys, Inc.
>>+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
>>+ *
>>+ * This program is free software: you can redistribute it and/or
>>+ * modify it under the terms of the GNU General Public License
>>+ * version 2 as published by the Free Software Foundation.
>>+ *
>>+ * This program is distributed in the hope that it will be useful
>>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>+ * GNU General Public License version 2 for more details.
>>+ *
>>+ * You should have received a copy of the GNU General Public License
>>+ * along with this program; if not, see http://www.gnu.org/licenses
>>+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
>>+ * Suite 500, Boston, MA 02110-1335 USA.
>>+ *
>>+ * Based on Synopsys driver version 2.60a
>>+ * Modified by Mark Miesfeld <mmiesfeld@apm.com>
>>+ * Modified by Stefan Roese <sr@denx.de>, DENX Software Engineering
>>+ *
>>+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "=
AS IS"
>>+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO T=
HE
>>+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PU=
RPOSE
>>+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DI=
RECT,
>>+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
>>+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SER=
VICES;
>>+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
>>+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR =
TORT
>>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF
>>+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>>+ *
>>+ */
> In every file...
>
>>+/*
>>+ * The dwc_otg module provides the initialization and cleanup entry
>>+ * points for the dwcotg driver. This module will be dynamically install=
ed
>>+ * after Linux is booted using the insmod command. When the module is
>>+ * installed, the dwc_otg_driver_init function is called. When the modul=
e is
>>+ * removed (using rmmod), the dwc_otg_driver_cleanup function is called.
>>+ *
>>+ * This module also defines a data structure for the dwc_otg driver, whi=
ch is
>>+ * used in conjunction with the standard device structure. These
>>+ * structures allow the OTG driver to comply with the standard Linux dri=
ver
>>+ * model in which devices and drivers are registered with a bus driver. =
This
>>+ * has the benefit that Linux can expose attributes of the driver and de=
vice
>>+ * in its special sysfs file system. Users can then read or write files =
in
>>+ * this file system to perform diagnostics on the driver components or t=
he
>>+ * device.
>>+ */
>>+
>>+#include <linux/platform_device.h>
>>+
>>+#include "driver.h"
>>+
>>+#define DWC_DRIVER_VERSION =A0 =A0 =A0 =A0 =A0 =A0"1.05"
> do you intend to increment this version number?
>
I do not see any other reference of this define.
@Tirumala, Can we remove it?
>>+#define DWC_DRIVER_DESC =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 "HS =
OTG USB Controller driver"
>>+static const char dwc_driver_name[] =3D "dwc_otg";
>>+
>>+/**
>>+ * This function is the top level interrupt handler for the Common
>>+ * (Device and host modes) interrupts.
>>+ */
>>+static irqreturn_t dwc_otg_common_irq(int _irq, void *dev)
>>+{
>>+ =A0 =A0 =A0struct dwc_otg_device *dwc_dev =3D dev;
>>+ =A0 =A0 =A0int retval;
>>+
>>+ =A0 =A0 =A0retval =3D dwc_otg_handle_common_intr(dwc_dev->core_if);
>>+ =A0 =A0 =A0return IRQ_RETVAL(retval);
>>+}
>>+
>>+/**
>>+ * This function is the interrupt handler for the OverCurrent condition
>>+ * from the external charge pump (if enabled)
>>+ */
>>+static irqreturn_t dwc_otg_externalchgpump_irq(int _irq, void *dev)
>>+{
>>+ =A0 =A0 =A0struct dwc_otg_device *dwc_dev =3D dev;
>>+
>>+ =A0 =A0 =A0if (dwc_otg_is_host_mode(dwc_dev->core_if)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0struct dwc_hcd *dwc_hcd;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0u32 hprt0 =3D 0;
>>+
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_hcd =3D dwc_dev->hcd;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0spin_lock(&dwc_hcd->lock);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_hcd->flags.b.port_over_current_change =
=3D 1;
>>+
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0hprt0 =3D DWC_HPRT0_PRT_PWR_RW(hprt0, 0);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_write32(dwc_dev->core_if->host_if->hprt0=
, hprt0);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0spin_unlock(&dwc_hcd->lock);
>>+ =A0 =A0 =A0} else {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0/* Device mode - This int is n/a for device =
mode */
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_dbg(dev, "DeviceMode: OTG OverCurrent De=
tected\n");
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0return IRQ_HANDLED;
>>+}
>>+
>>+/**
>>+ * This function is called when a device is unregistered with the
>>+ * dwc_otg_driver. This happens, for example, when the rmmod command is
>>+ * executed. The device may or may not be electrically present. If it is
>>+ * present, the driver stops device processing. Any resources used on be=
half
>>+ * of this device are freed.
>>+ */
>>+static int __devexit dwc_otg_driver_remove(struct platform_device *ofdev=
)
>>+{
>>+ =A0 =A0 =A0struct device *dev =3D &ofdev->dev;
>>+ =A0 =A0 =A0struct dwc_otg_device *dwc_dev =3D dev_get_drvdata(dev);
>>+
>>+ =A0 =A0 =A0/* Memory allocation for dwc_otg_device may have failed. */
>>+ =A0 =A0 =A0if (!dwc_dev)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0return 0;
>>+
>>+ =A0 =A0 =A0/* Free the IRQ */
>>+ =A0 =A0 =A0if (dwc_dev->common_irq_installed)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0free_irq(dwc_dev->irq, dwc_dev);
>>+
>>+ =A0 =A0 =A0if (!dwc_has_feature(dwc_dev->core_if, DWC_DEVICE_ONLY)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (dwc_dev->hcd) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (dwc_dev->hcd->cp_irq_ins=
talled)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0free_irq(dwc=
_dev->hcd->cp_irq, dwc_dev);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_hcd_remove(dev);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0}
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0if (!dwc_has_feature(dwc_dev->core_if, DWC_HOST_ONLY)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (dwc_dev->pcd)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_pcd_remove(dev);
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0if (dwc_dev->core_if)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_cil_remove(dwc_dev->core_if);
>>+
>>+ =A0 =A0 =A0/* Return the memory. */
>>+ =A0 =A0 =A0if (dwc_dev->base)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0iounmap(dwc_dev->base);
>>+
>>+ =A0 =A0 =A0if (dwc_dev->phys_addr)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0release_mem_region(dwc_dev->phys_addr, dwc_d=
ev->base_len);
>>+
>>+ =A0 =A0 =A0if (dwc_dev->core_if->xceiv) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0otg_put_transceiver(dwc_dev->core_if->xceiv)=
;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_dev->core_if->xceiv =3D NULL;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0usb_nop_xceiv_unregister();
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0kfree(dwc_dev);
>>+
>>+ =A0 =A0 =A0/* Clear the drvdata pointer. */
>>+ =A0 =A0 =A0dev_set_drvdata(dev, NULL);
>>+ =A0 =A0 =A0return 0;
>>+}
>>+
>>+/**
>>+ * This function is called when an device is bound to a
>>+ * dwc_otg_driver. It creates the driver components required to
>>+ * control the device (CIL, HCD, and PCD) and it initializes the
>>+ * device. The driver components are stored in a dwc_otg_device
>>+ * structure. A reference to the dwc_otg_device is saved in the
>>+ * device. This allows the driver to access the dwc_otg_device
>>+ * structure on subsequent calls to driver methods for this device.
>>+ */
>
> This is almost kernel doc. Mind doing a proper kernel doc?
will take care.
>
>>+static int __devinit dwc_otg_driver_probe(struct platform_device *ofdev)
>>+{
>>+ =A0 =A0 =A0int retval;
>>+ =A0 =A0 =A0struct dwc_otg_device *dwc_dev;
>>+ =A0 =A0 =A0struct device *dev =3D &ofdev->dev;
>>+ =A0 =A0 =A0struct resource *res;
>>+ =A0 =A0 =A0struct dwc_otg_plat_data *pdata;
>>+ =A0 =A0 =A0ulong gusbcfg_addr;
>>+ =A0 =A0 =A0u32 usbcfg =3D 0;
>>+
>>+ =A0 =A0 =A0dev_dbg(dev, "dwc_otg_driver_probe(%p)\n", dev);
>
> __func__, but do you really care?
>
will correct.
>>+ =A0 =A0 =A0dwc_dev =3D kzalloc(sizeof(*dwc_dev), GFP_KERNEL);
>>+ =A0 =A0 =A0if (!dwc_dev) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "kmalloc of dwc_otg_device fail=
ed\n");
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -ENOMEM;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_dwc_dev;
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0/* Retrieve the memory and IRQ resources. */
> Most people can read C
>
:( : will take care.
>>+ =A0 =A0 =A0dwc_dev->irq =3D platform_get_irq(ofdev, 0);
>>+ =A0 =A0 =A0if (dwc_dev->irq =3D=3D NO_IRQ) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "no device irq\n");
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -ENODEV;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_of_irq;
>>+ =A0 =A0 =A0}
>>+ =A0 =A0 =A0dev_dbg(dev, "OTG - device irq: %d\n", dwc_dev->irq);
>>+
>>+ =A0 =A0 =A0res =3D platform_get_resource(ofdev, IORESOURCE_MEM, 0);
>>+ =A0 =A0 =A0if (!res) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "%s: Can't get USB-OTG register=
address\n",
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0__func__);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -ENOMEM;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_of_irq;
>>+ =A0 =A0 =A0}
>>+ =A0 =A0 =A0dev_dbg(dev, "OTG - ioresource_mem start0x%llx: end:0x%llx\n=
",
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0(unsigned long long)res->start, (unsigned lo=
ng long)res->end);
>>+
>>+ =A0 =A0 =A0dwc_dev->phys_addr =3D res->start;
>>+ =A0 =A0 =A0dwc_dev->base_len =3D res->end - res->start + 1;
>>+ =A0 =A0 =A0if (!request_mem_region(dwc_dev->phys_addr,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_dev->bas=
e_len, dwc_driver_name)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "request_mem_region failed\n");
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -EBUSY;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_of_irq;
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0/* Map the DWC_otg Core memory into virtual address space. *=
/
>>+ =A0 =A0 =A0dwc_dev->base =3D ioremap(dwc_dev->phys_addr, dwc_dev->base_=
len);
>>+ =A0 =A0 =A0if (!dwc_dev->base) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "ioremap() failed\n");
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -ENOMEM;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_ioremap;
>>+ =A0 =A0 =A0}
>>+ =A0 =A0 =A0dev_dbg(dev, "mapped base=3D0x%08x\n", (__force u32)dwc_dev-=
>base);
>>+
>>+ =A0 =A0 =A0pdata =3D dev_get_platdata(dev);
>>+ =A0 =A0 =A0if (pdata) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (pdata->phy_init)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0pdata->phy_init();
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (pdata->param_init)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0pdata->param_init(&dwc_otg_m=
odule_params);
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0/*
>>+ =A0 =A0 =A0 * Initialize driver data to point to the global DWC_otg
>>+ =A0 =A0 =A0 * Device structure.
>>+ =A0 =A0 =A0 */
>>+ =A0 =A0 =A0dev_set_drvdata(dev, dwc_dev);
>>+
>>+ =A0 =A0 =A0dwc_dev->core_if =3D
>>+ =A0 =A0 =A0 =A0 =A0dwc_otg_cil_init(dwc_dev->base, &dwc_otg_module_para=
ms);
>>+ =A0 =A0 =A0if (!dwc_dev->core_if) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "CIL initialization failed!\n")=
;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -ENOMEM;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_cil_init;
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0/*
>>+ =A0 =A0 =A0 * Validate parameter values after dwc_otg_cil_init.
>>+ =A0 =A0 =A0 */
> Single line would do it.
>
ok.
>>+ =A0 =A0 =A0if (check_parameters(dwc_dev->core_if)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -EINVAL;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_check_param;
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0usb_nop_xceiv_register();
>>+ =A0 =A0 =A0dwc_dev->core_if->xceiv =3D otg_get_transceiver();
>>+ =A0 =A0 =A0if (!dwc_dev->core_if->xceiv) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -ENODEV;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_xceiv;
>>+ =A0 =A0 =A0}
>>+ =A0 =A0 =A0dwc_set_feature(dwc_dev->core_if);
>>+
>>+ =A0 =A0 =A0/* Initialize the DWC_otg core. */
>>+ =A0 =A0 =A0dwc_otg_core_init(dwc_dev->core_if);
>>+
>>+ =A0 =A0 =A0/*
>>+ =A0 =A0 =A0 * Disable the global interrupt until all the interrupt
>>+ =A0 =A0 =A0 * handlers are installed.
>>+ =A0 =A0 =A0 */
>>+ =A0 =A0 =A0dwc_otg_disable_global_interrupts(dwc_dev->core_if);
>>+
>>+ =A0 =A0 =A0/*
>>+ =A0 =A0 =A0 * Install the interrupt handler for the common interrupts b=
efore
>>+ =A0 =A0 =A0 * enabling common interrupts in core_init below.
>>+ =A0 =A0 =A0 */
>>+ =A0 =A0 =A0retval =3D request_irq(dwc_dev->irq, dwc_otg_common_irq,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 IRQF_SHARED, "dwc_o=
tg", dwc_dev);
>>+ =A0 =A0 =A0if (retval) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "request of irq%d failed retval=
: %d\n",
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_dev->irq, retval);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -EBUSY;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_req_irq;
>>+ =A0 =A0 =A0} else {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_dev->common_irq_installed =3D 1;
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0gusbcfg_addr =3D (ulong) (dwc_dev->core_if->core_global_regs=
)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0+ DWC_GUSBCFG;
>
> This looks wrong. If this is a virtual pointer (i.e. from ioremap()) it
> should have the type "__iomem void *" and never be casted to something
> else.
>
will remove typecasting.
>>+ =A0 =A0 =A0if (dwc_has_feature(dwc_dev->core_if, DWC_DEVICE_ONLY)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0usbcfg =3D dwc_read32(gusbcfg_addr);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0usbcfg &=3D ~DWC_USBCFG_FRC_HST_MODE;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0usbcfg |=3D DWC_USBCFG_FRC_DEV_MODE;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_write32(gusbcfg_addr, usbcfg);
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0if (!dwc_has_feature(dwc_dev->core_if, DWC_HOST_ONLY)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0/* Initialize the PCD */
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D dwc_otg_pcd_init(dev);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (retval) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "dwc_otg_pcd_in=
it failed\n");
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_dev->pcd =3D NULL;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_req_irq;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0}
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0if (dwc_has_feature(dwc_dev->core_if, DWC_HOST_ONLY)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0/* Initialize the HCD and force_host_mode */
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0usbcfg =3D dwc_read32(gusbcfg_addr);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0usbcfg |=3D DWC_USBCFG_FRC_HST_MODE;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0usbcfg &=3D ~DWC_USBCFG_FRC_DEV_MODE;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_write32(gusbcfg_addr, usbcfg);
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0if (!dwc_has_feature(dwc_dev->core_if, DWC_DEVICE_ONLY)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0/* update transiver state */
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_dev->core_if->xceiv->state =3D OTG_STATE=
_A_HOST;
>>+
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D dwc_otg_hcd_init(dev, dwc_dev);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (retval) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev, "dwc_otg_hcd_in=
it failed\n");
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_dev->hcd =3D NULL;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_hcd;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0}
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0/* configure chargepump interrupt */
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_dev->hcd->cp_irq =3D platform_get_irq(of=
dev, 1);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (dwc_dev->hcd->cp_irq !=3D -ENXIO) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D request_irq(dwc_d=
ev->hcd->cp_irq,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 dwc_otg_externalchgpump_irq,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 IRQF_SHARED,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0 =A0 =A0 "dwc_otg_ext_chg_pump", dwc_dev);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0if (retval) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_err(dev,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0"request of irq failed retval: %d\n",
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0retval);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0retval =3D -=
EBUSY;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0goto fail_hc=
d;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0} else {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dev_dbg(dev,=
"%s: ExtChgPump Detection "
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0=
=A0"IRQ registered\n", dwc_driver_name);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_dev->hcd=
->cp_irq_installed =3D 1;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0}
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0}
>>+ =A0 =A0 =A0}
>>+ =A0 =A0 =A0/*
>>+ =A0 =A0 =A0 * Enable the global interrupt after all the interrupt
>>+ =A0 =A0 =A0 * handlers are installed.
>>+ =A0 =A0 =A0 */
>>+ =A0 =A0 =A0dwc_otg_enable_global_interrupts(dwc_dev->core_if);
>>+ =A0 =A0 =A0return 0;
>>+fail_hcd:
>>+ =A0 =A0 =A0free_irq(dwc_dev->irq, dwc_dev);
>>+ =A0 =A0 =A0if (!dwc_has_feature(dwc_dev->core_if, DWC_HOST_ONLY)) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (dwc_dev->pcd)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_pcd_remove(dev);
>>+ =A0 =A0 =A0}
>>+fail_req_irq:
>>+ =A0 =A0 =A0otg_put_transceiver(dwc_dev->core_if->xceiv);
>>+fail_xceiv:
>>+ =A0 =A0 =A0usb_nop_xceiv_unregister();
>>+fail_check_param:
>>+ =A0 =A0 =A0dwc_otg_cil_remove(dwc_dev->core_if);
>>+fail_cil_init:
>>+ =A0 =A0 =A0dev_set_drvdata(dev, NULL);
>>+ =A0 =A0 =A0iounmap(dwc_dev->base);
>>+fail_ioremap:
>>+ =A0 =A0 =A0release_mem_region(dwc_dev->phys_addr, dwc_dev->base_len);
>>+fail_of_irq:
>>+ =A0 =A0 =A0kfree(dwc_dev);
>>+fail_dwc_dev:
>>+ =A0 =A0 =A0return retval;
>>+}
>>+
>>+/*
>>+ * This structure defines the methods to be called by a bus driver
>>+ * during the lifecycle of a device on that bus. Both drivers and
>>+ * devices are registered with a bus driver. The bus driver matches
>>+ * devices to drivers based on information in the device and driver
>>+ * structures.
>>+ *
>>+ * The probe function is called when the bus driver matches a device
>>+ * to this driver. The remove function is called when a device is
>>+ * unregistered with the bus driver.
>>+ */
>>+
>>+#if defined(CONFIG_OF)
>>+static const struct of_device_id dwc_otg_match[] =3D {
>>+ =A0 =A0 =A0{.compatible =3D "amcc,dwc-otg",},
>
> Do you explain this binding somewhere? I.e. additional properties and
> so? If so ignore this, I will find it :)
>
I think Tirumala can explain it.
My platform (SPEAr) works with dwc_otg.
>>+ =A0 =A0 =A0{}
>>+};
>>+MODULE_DEVICE_TABLE(of, dwc_otg_match);
>>+#endif
>>+
>>+static struct platform_driver dwc_otg_driver =3D {
>>+ =A0 =A0 =A0.probe =3D dwc_otg_driver_probe,
>>+ =A0 =A0 =A0.remove =3D __devexit_p(dwc_otg_driver_remove),
>>+ =A0 =A0 =A0.driver =3D {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 .name =3D "dwc_otg",
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 .owner =3D THIS_MODULE,
>>+#if defined(CONFIG_OF)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 .of_match_table =3D dwc_otg_match,
>>+#endif
>
> ifdef CONFIG_OF is not required at all.
ok.
>
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 },
>>+};
>>+
>>+/**
>>+ * This function is called when the dwc_otg_driver is installed with the
>>+ * insmod command. It registers the dwc_otg_driver structure with the
>>+ * appropriate bus driver. This will cause the dwc_otg_driver_probe func=
tion
>>+ * to be called. In addition, the bus driver will automatically expose
>>+ * attributes defined for the device and driver in the special sysfs fil=
e
>>+ * system.
>>+ */
>>+static int __init dwc_otg_driver_init(void)
>>+{
>>+
>>+ =A0 =A0 =A0pr_info("%s: version %s\n", dwc_driver_name, DWC_DRIVER_VERS=
ION);
>>+ =A0 =A0 =A0return platform_driver_register(&dwc_otg_driver);
>>+}
>>+
>>+module_init(dwc_otg_driver_init);
>>+
>>+/**
>>+ * This function is called when the driver is removed from the kernel
>>+ * with the rmmod command. The driver unregisters itself with its bus
>>+ * driver.
>>+ *
>>+ */
>>+static void __exit dwc_otg_driver_cleanup(void)
>>+{
>>+ =A0 =A0 =A0platform_driver_unregister(&dwc_otg_driver);
>>+}
>>+
>>+module_exit(dwc_otg_driver_cleanup);
>>+
>>+MODULE_DESCRIPTION(DWC_DRIVER_DESC);
>>+MODULE_AUTHOR("Mark Miesfeld <mmiesfeld@apm.com");
>>+MODULE_LICENSE("GPL");
>>diff --git a/drivers/usb/dwc/driver.h b/drivers/usb/dwc/driver.h
>>new file mode 100644
>>index 0000000..a86532b
>>--- /dev/null
>>+++ b/drivers/usb/dwc/driver.h
>>@@ -0,0 +1,76 @@
>>+/*
>>+ * DesignWare HS OTG controller driver
>>+ * Copyright (C) 2006 Synopsys, Inc.
>>+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
>>+ *
>>+ * This program is free software: you can redistribute it and/or
>>+ * modify it under the terms of the GNU General Public License
>>+ * version 2 as published by the Free Software Foundation.
>>+ *
>>+ * This program is distributed in the hope that it will be useful
>>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>+ * GNU General Public License version 2 for more details.
>>+ *
>>+ * You should have received a copy of the GNU General Public License
>>+ * along with this program; if not, see http://www.gnu.org/licenses
>>+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
>>+ * Suite 500, Boston, MA 02110-1335 USA.
>>+ *
>>+ * Based on Synopsys driver version 2.60a
>>+ * Modified by Mark Miesfeld <mmiesfeld@apm.com>
>>+ *
>>+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "=
AS IS"
>>+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO T=
HE
>>+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PU=
RPOSE
>>+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DI=
RECT,
>>+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
>>+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SER=
VICES;
>>+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
>>+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR =
TORT
>>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF
>>+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>>+ *
>>+ */
>>+
>>+#if !defined(__DWC_OTG_DRIVER_H__)
>>+#define __DWC_OTG_DRIVER_H__
>>+
>>+/*
>>+ * This file contains the interface to the Linux driver.
>>+ */
>>+#include "cil.h"
>
> Oh, onion layers? Will check, never mind.
>
>>+/*
>>+ * This structure is a wrapper that encapsulates the driver components u=
sed to
>>+ * manage a single DWC_otg controller.
>>+ */
>>+struct dwc_otg_device {
>>+ =A0 =A0 =A0/* Base address returned from ioremap() */
>>+ =A0 =A0 =A0__iomem void *base;
>>+
>>+ =A0 =A0 =A0/* Pointer to the core interface structure. */
>>+ =A0 =A0 =A0struct core_if *core_if;
>>+
>>+ =A0 =A0 =A0/* Pointer to the PCD structure. */
>>+ =A0 =A0 =A0struct dwc_pcd *pcd;
>>+
>>+ =A0 =A0 =A0/* Pointer to the HCD structure. */
>>+ =A0 =A0 =A0struct dwc_hcd *hcd;
>>+
>>+ =A0 =A0 =A0/* Flag to indicate whether the common IRQ handler is instal=
led. */
>>+ =A0 =A0 =A0u8 common_irq_installed;
>
> please correct if I'm wring but it seems the only reason when this is
> not set is in an error case. In this case the driver is not loaded. So
> why do we have this here?
yes, you are coorect.
Must not be used.
>
>>+
>>+ =A0 =A0 =A0/* Interrupt request number. */
>>+ =A0 =A0 =A0unsigned int irq;
>>+
>>+ =A0 =A0 =A0/*
>>+ =A0 =A0 =A0 * Physical address of Control and Status registers, used by
>>+ =A0 =A0 =A0 * release_mem_region().
>>+ =A0 =A0 =A0 */
>>+ =A0 =A0 =A0resource_size_t phys_addr;
>
> If this is a physical address it should phys_addr_t.
>
yes this is a physical address..will correct.
>>+
>>+ =A0 =A0 =A0/* Length of memory region, used by release_mem_region(). */
>>+ =A0 =A0 =A0unsigned long base_len;
> this should be resource_size_t. But why are you collecting all this
> informations? You need it just for probe and remove right? Wouldn't it
> be easier to grab it again from platoform_device?
will review all these and correct.
>
>>+};
>>+#endif
>>diff --git a/drivers/usb/dwc/param.c b/drivers/usb/dwc/param.c
>>new file mode 100644
>>index 0000000..b9fcfa3
>>--- /dev/null
>>+++ b/drivers/usb/dwc/param.c
>>@@ -0,0 +1,219 @@
>>+/*
>>+ * DesignWare HS OTG controller driver
>>+ * Copyright (C) 2006 Synopsys, Inc.
>>+ * Portions Copyright (C) 2010 Applied Micro Circuits Corporation.
>>+ *
>>+ * This program is free software: you can redistribute it and/or
>>+ * modify it under the terms of the GNU General Public License
>>+ * version 2 as published by the Free Software Foundation.
>>+ *
>>+ * This program is distributed in the hope that it will be useful
>>+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
>>+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
>>+ * GNU General Public License version 2 for more details.
>>+ *
>>+ * You should have received a copy of the GNU General Public License
>>+ * along with this program; if not, see http://www.gnu.org/licenses
>>+ * or write to the Free Software Foundation, Inc., 51 Franklin Street,
>>+ * Suite 500, Boston, MA 02110-1335 USA.
>>+ *
>>+ * Based on Synopsys driver version 2.60a
>>+ * Modified by Mark Miesfeld <mmiesfeld@apm.com>
>>+ *
>>+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "=
AS IS"
>>+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING BUT NOT LIMITED TO T=
HE
>>+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PU=
RPOSE
>>+ * ARE DISCLAIMED. IN NO EVENT SHALL SYNOPSYS, INC. BE LIABLE FOR ANY DI=
RECT,
>>+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES
>>+ * (INCLUDING BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SER=
VICES;
>>+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUS=
ED AND
>>+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR =
TORT
>>+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE=
OF
>>+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
>>+ *
>>+ */
>>+
>>+/*
>>+ * This file provides dwc_otg driver parameter and parameter checking.
>>+ */
>>+
>>+#include "cil.h"
>>+
>>+/*
>>+ * Encapsulate the module parameter settings
>>+ */
>>+struct core_params dwc_otg_module_params =3D {
>>+ =A0 =A0 =A0.otg_cap =3D dwc_param_otg_cap_default,
>>+ =A0 =A0 =A0.dma_enable =3D dwc_param_dma_enable_default,
>>+ =A0 =A0 =A0.dma_burst_size =3D dwc_param_dma_burst_size_default,
>>+ =A0 =A0 =A0.speed =3D dwc_param_speed_default,
>>+ =A0 =A0 =A0.host_support_fs_ls_low_power
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0=3D dwc_param_host_support_fs_ls_low_power_d=
efault,
>>+ =A0 =A0 =A0.host_ls_low_power_phy_clk
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0=3D dwc_param_host_ls_low_power_phy_clk_defa=
ult,
>>+ =A0 =A0 =A0.enable_dynamic_fifo =3D -1,
>>+ =A0 =A0 =A0.dev_rx_fifo_size =3D -1,
>>+ =A0 =A0 =A0.dev_nperio_tx_fifo_size =3D -1,
>>+ =A0 =A0 =A0.dev_perio_tx_fifo_size =3D {-1, -1, -1, -1, -1, -1, -1, -1,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0-1, -1, -1, -1, -1, -1, -1}, =A0 =A0/* 15 */
>>+ =A0 =A0 =A0.host_rx_fifo_size =3D -1,
>>+ =A0 =A0 =A0.host_nperio_tx_fifo_size =3D -1,
>>+ =A0 =A0 =A0.host_perio_tx_fifo_size =3D -1,
>>+ =A0 =A0 =A0.max_transfer_size =3D -1,
>>+ =A0 =A0 =A0.max_packet_count =3D -1,
>>+ =A0 =A0 =A0.host_channels =3D -1,
>>+ =A0 =A0 =A0.dev_endpoints =3D -1,
>>+ =A0 =A0 =A0.phy_type =3D dwc_param_phy_type_default,
>>+ =A0 =A0 =A0.phy_utmi_width =3D dwc_param_phy_utmi_width_default,
>>+ =A0 =A0 =A0.phy_ulpi_ddr =3D dwc_param_phy_ulpi_ddr_default,
>>+ =A0 =A0 =A0.phy_ulpi_ext_vbus =3D dwc_param_phy_ulpi_ext_vbus_default,
>>+ =A0 =A0 =A0.i2c_enable =3D dwc_param_i2c_enable_default,
>>+ =A0 =A0 =A0.ulpi_fs_ls =3D dwc_param_ulpi_fs_ls_default,
>>+ =A0 =A0 =A0.ts_dline =3D dwc_param_ts_dline_default,
>>+ =A0 =A0 =A0.en_multiple_tx_fifo =3D -1,
>>+ =A0 =A0 =A0.dev_tx_fifo_size =3D {-1, -1, -1, -1, -1, -1, -1, -1, -1,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0-1, -1, -1, -1, -1, -1}, =A0 =A0 =A0 =A0/* 1=
5 */
>>+ =A0 =A0 =A0.fifo_number =3D MAX_TX_FIFOS,
>>+ =A0 =A0 =A0.thr_ctl =3D dwc_param_thr_ctl_default,
>>+ =A0 =A0 =A0.tx_thr_length =3D dwc_param_tx_thr_length_default,
>>+ =A0 =A0 =A0.rx_thr_length =3D dwc_param_rx_thr_length_default,
>>+};
>>+
>>+/**
>>+ * Checks that parameter settings for the periodic Tx FIFO sizes are cor=
rect
>>+ * according to the hardware configuration. Sets the size to the hardwar=
e
>>+ * configuration if an incorrect size is detected.
>>+ */
>>+static int set_valid_perio_tx_fifo_sizes(struct core_if *core_if)
>>+{
>>+ =A0 =A0 =A0ulong regs =3D (u32) core_if->core_global_regs;
>>+ =A0 =A0 =A0u32 *param_size =3D &dwc_otg_module_params.dev_perio_tx_fifo=
_size[0];
>>+ =A0 =A0 =A0u32 i, size;
>>+
>>+ =A0 =A0 =A0for (i =3D 0; i < dwc_otg_module_params.fifo_number; i++) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (param_size[i] =3D=3D -1) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0size =3D dwc_read32(regs + D=
WC_DPTX_FSIZ_DIPTXF(i));
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0param_size[i] =3D DWC_TX_FIF=
O_DEPTH_RD(size);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0}
>>+ =A0 =A0 =A0}
>>+ =A0 =A0 =A0return 0;
>>+}
>>+
>>+/**
>>+ * Checks that parameter settings for the Tx FIFO sizes are correct acco=
rding to
>>+ * the hardware configuration. =A0Sets the size to the hardware configur=
ation if
>>+ * an incorrect size is detected.
>>+ */
>>+static int set_valid_tx_fifo_sizes(struct core_if *core_if)
>>+{
>>+ =A0 =A0 =A0ulong regs =3D (u32) core_if->core_global_regs;
>>+ =A0 =A0 =A0u32 *param_size =3D &dwc_otg_module_params.dev_tx_fifo_size[=
0];
>>+ =A0 =A0 =A0u32 i, size;
>>+
>>+ =A0 =A0 =A0for (i =3D 0; i < dwc_otg_module_params.fifo_number; i++) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0if (param_size[i] =3D=3D -1) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0size =3D dwc_read32(regs + D=
WC_DPTX_FSIZ_DIPTXF(i));
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0param_size[i] =3D DWC_TX_FIF=
O_DEPTH_RD(size);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0}
>>+ =A0 =A0 =A0}
>>+ =A0 =A0 =A0return 0;
>>+}
>>+
>>+/**
>>+ * This function is called during module intialization to verify that
>>+ * the module parameters are in a valid state.
>>+ */
>>+int __devinit check_parameters(struct core_if *core_if)
>>+{
>>+ =A0 =A0 =A0int size;
>>+
>>+ =A0 =A0 =A0/* Hardware read only configurations of the OTG core. */
>>+ =A0 =A0 =A0dwc_otg_module_params.enable_dynamic_fifo =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0DWC_HWCFG2_DYN_FIFO_RD(core_if->hwcfg2);
>>+ =A0 =A0 =A0dwc_otg_module_params.max_transfer_size =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0(1 << (DWC_HWCFG3_XFERSIZE_CTR_WIDTH_RD(core=
_if->hwcfg3) + 11))
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0- 1;
>>+ =A0 =A0 =A0dwc_otg_module_params.max_packet_count =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0(1 << (DWC_HWCFG3_PKTSIZE_CTR_WIDTH_RD(core_=
if->hwcfg3) + 4))
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0- 1;
>>+ =A0 =A0 =A0dwc_otg_module_params.host_channels =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0DWC_HWCFG2_NO_HST_CHAN_RD(core_if->hwcfg2) +=
1;
>>+ =A0 =A0 =A0dwc_otg_module_params.dev_endpoints =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0DWC_HWCFG2_NO_DEV_EP_RD(core_if->hwcfg2);
>>+ =A0 =A0 =A0dwc_otg_module_params.en_multiple_tx_fifo =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0(DWC_HWCFG4_DED_FIFO_ENA_RD(core_if->hwcfg4)=
=3D=3D 0)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0? 0 : 1, 0;
>>+
>>+ =A0 =A0 =A0/*
>>+ =A0 =A0 =A0 * Hardware read/write configurations of the OTG core.
>>+ =A0 =A0 =A0 * If not defined by platform then read it from HW itself
>>+ =A0 =A0 =A0 */
>>+ =A0 =A0 =A0if (dwc_otg_module_params.dev_rx_fifo_size =3D=3D -1)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.dev_rx_fifo_size =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_read32(core_if->core_global_regs + DWC_G=
RXFSIZ);
>>+
>>+ =A0 =A0 =A0if (dwc_otg_module_params.dev_nperio_tx_fifo_size =3D=3D -1)=
{
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0size =3D dwc_read32(core_if->core_global_reg=
s + DWC_GNPTXFSIZ);
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.dev_nperio_tx_fifo_siz=
e =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0DWC_TX_FIFO_DEPTH_RD(size);
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0if (dwc_otg_module_params.en_multiple_tx_fifo)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0set_valid_tx_fifo_sizes(core_if);
>>+ =A0 =A0 =A0else
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0set_valid_perio_tx_fifo_sizes(core_if);
>>+
>>+ =A0 =A0 =A0if (dwc_otg_module_params.host_rx_fifo_size =3D=3D -1)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.host_rx_fifo_size =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_read32(core_if->core_global_regs + DWC_G=
RXFSIZ);
>>+ =A0 =A0 =A0if (dwc_otg_module_params.host_nperio_tx_fifo_size =3D=3D -1=
) {
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0size
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0=3D dwc_read32(core_if->core_global_regs + D=
WC_GNPTXFSIZ) >> 16;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.host_nperio_tx_fifo_si=
ze =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0DWC_TX_FIFO_DEPTH_RD(size);
>>+ =A0 =A0 =A0}
>>+ =A0 =A0 =A0if (dwc_otg_module_params.host_perio_tx_fifo_size =3D=3D -1)=
{
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0size =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_read32(core_if->core_global_regs + DWC_H=
PTXFSIZ) >> 16;
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.host_perio_tx_fifo_siz=
e =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0DWC_TX_FIFO_DEPTH_RD(size);
>>+ =A0 =A0 =A0}
>>+
>>+ =A0 =A0 =A0/*
>>+ =A0 =A0 =A0 * Hardware read/write configurations of the OTG core.
>>+ =A0 =A0 =A0 * If not defined by platform then read it from HW itself
>>+ =A0 =A0 =A0 * If defined by platform then write the same value in HW re=
gs
>>+ =A0 =A0 =A0 */
>>+ =A0 =A0 =A0if (dwc_otg_module_params.dev_rx_fifo_size =3D=3D -1)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.dev_rx_fifo_size =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_read32(core_if->core_global_regs + DWC_G=
RXFSIZ);
>>+ =A0 =A0 =A0else
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_write32(core_if->core_global_regs + DWC_=
GRXFSIZ,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.dev_rx_fifo_size);
>>+
>>+ =A0 =A0 =A0if (dwc_otg_module_params.dev_nperio_tx_fifo_size =3D=3D -1)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.dev_nperio_tx_fifo_siz=
e =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_read32(core_if->core_global_regs + DWC_G=
NPTXFSIZ) >> 16;
>>+ =A0 =A0 =A0else
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_write32(core_if->core_global_regs + DWC_=
GNPTXFSIZ,
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0(dwc_otg_module_params.dev_r=
x_fifo_size |
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0(dwc_otg_module_params.dev_n=
perio_tx_fifo_size << 16)));
>>+
>>+ =A0 =A0 =A0set_valid_perio_tx_fifo_sizes(core_if);
>>+ =A0 =A0 =A0set_valid_tx_fifo_sizes(core_if);
>>+
>>+ =A0 =A0 =A0if (dwc_otg_module_params.host_rx_fifo_size =3D=3D -1)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.host_rx_fifo_size =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_read32(core_if->core_global_regs + DWC_G=
RXFSIZ);
>>+ =A0 =A0 =A0if (dwc_otg_module_params.host_nperio_tx_fifo_size =3D=3D -1=
)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.host_nperio_tx_fifo_si=
ze =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_read32(core_if->core_global_regs + DWC_G=
NPTXFSIZ) >> 16;
>>+ =A0 =A0 =A0if (dwc_otg_module_params.host_perio_tx_fifo_size =3D=3D -1)
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_otg_module_params.host_perio_tx_fifo_siz=
e =3D
>>+ =A0 =A0 =A0 =A0 =A0 =A0 =A0dwc_read32(core_if->core_global_regs + DWC_H=
PTXFSIZ) >> 16;
>
> oh boy, oh boy. This is a huge number of module parameters. Do you
> actually expect someone setting all of them on modprobe? And if udev is
> faster you rmmod and modpobe again, right? The clever ones would enter
> it somewhere in modprobe.conf or so. Anyway. Since you have
> already device tree bindings and I assume you are using them, why not
> move all this parameters into the device and remove _all_ module
> parameters?
In my case, I am passing necessary parameters from platform_data.
I do not use module param.
@Tirumala: please reply.
>
>>+ =A0 =A0 =A0return 0;
>>+}
>>+
>>+module_param_named(dma_enable, dwc_otg_module_params.dma_enable, bool, 0=
444);
>>+MODULE_PARM_DESC(dma_enable, "DMA Mode 0=3DSlave 1=3DDMA enabled");
>
> Sebastian
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at =A0http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: [PATCH 14/14] arm/include/asm/io.h : added macros to read/write big/little endian register
From: Benjamin Herrenschmidt @ 2011-09-02 11:01 UTC (permalink / raw)
To: Pratyush Anand
Cc: viresh.kumar, vipulkumar.samar, bhupesh.sharma, tmarri, linux-usb,
vipin.kumar, shiraz.hashim, Amit.VIRDI, rajeev-dlh.kumar,
mmiesfeld, deepak.sikri, linuxppc-dev, fchen
In-Reply-To: <335243c9467c0127206234819a94c9f72358fdf2.1314704558.git.pratyush.anand@st.com>
On Tue, 2011-08-30 at 17:28 +0530, Pratyush Anand wrote:
> There are some peripheral(e.g dwc otg) whose registers can be configured to
> work in either little or big endian mode. Therefor macros like out_be32,
> in_be32, out_le32 and in_le32 have been added to support such peripherals.
Yuck.
Don't copy those ppc specific historical accessors :-)
Doesn't arm have writel_be ? If not , define those, it's a bit more
common, or better, switch to the newer iomap variants which should be
provided in both endianness.
Cheers,
Ben.
> Signed-off-by: Pratyush Anand <pratyush.anand@st.com>
> ---
> arch/arm/include/asm/io.h | 8 ++++++++
> 1 files changed, 8 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
> index 815efa2..32282b4 100644
> --- a/arch/arm/include/asm/io.h
> +++ b/arch/arm/include/asm/io.h
> @@ -297,6 +297,14 @@ extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
> extern int devmem_is_allowed(unsigned long pfn);
> #endif
>
> +/* Big Endian */
> +#define out_be32(a, v) writel(__cpu_to_be32(v), a)
> +#define in_be32(a) __be32_to_cpu(readl(a))
> +
> +/* Little endian */
> +#define out_le32(a, v) writel(__cpu_to_le32(v), a)
> +#define in_le32(a) __le32_to_cpu(readl(a))
> +
> /*
> * Convert a physical pointer to a virtual kernel pointer for /dev/mem
> * access
^ permalink raw reply
* Re: [PATCH 14/14] arm/include/asm/io.h : added macros to read/write big/little endian register
From: Pratyush Anand @ 2011-09-02 10:43 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: Pratyush Anand, viresh.kumar, vipulkumar.samar, bhupesh.sharma,
tmarri, linux-usb, vipin.kumar, shiraz.hashim, Amit.VIRDI,
rajeev-dlh.kumar, mmiesfeld, deepak.sikri, linuxppc-dev, fchen
In-Reply-To: <20110831073500.GB9353@linutronix.de>
On Wed, Aug 31, 2011 at 1:05 PM, Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
> * Pratyush Anand | 2011-08-30 17:28:01 [+0530]:
>
>>diff --git a/arch/arm/include/asm/io.h b/arch/arm/include/asm/io.h
>>index 815efa2..32282b4 100644
>>--- a/arch/arm/include/asm/io.h
>>+++ b/arch/arm/include/asm/io.h
>>@@ -297,6 +297,14 @@ extern int valid_mmap_phys_addr_range(unsigned long =
pfn, size_t size);
>> extern int devmem_is_allowed(unsigned long pfn);
>> #endif
>>
>>+/* Big Endian */
>>+#define out_be32(a, v) writel(__cpu_to_be32(v), a)
>>+#define in_be32(a) __be32_to_cpu(readl(a))
>>+
>>+/* Little endian */
>>+#define out_le32(a, v) writel(__cpu_to_le32(v), a)
>>+#define in_le32(a) __le32_to_cpu(readl(a))
>
> In LE-mode __le32_to_cpu() is NOP and you get a LE value.
> In BE-mode readl() will swap a and le32_to_cpu will swap a again. So you
> get a BE value. Is this what you want?
>
There can be some peripheral like dwc-otg, whose registers will be
either in LE or in BE
depending on the RTL configuration selected by a implementor.
Software always expects a LE value when it will call "in_" and will
provide a LE value when "out_".
It expects beacuse , it wants to do same bit wise operation for both
configurations.
>>+
>
> Please split this patch out and get it accepterd by ARM community. USB
> people won't merge this.
>
Ok, will send it to ARM mailing list.
Regards
Pratyush
> Sebastian
> --
> To unsubscribe from this list: send the line "unsubscribe linux-usb" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at =A0http://vger.kernel.org/majordomo-info.html
>
^ permalink raw reply
* Re: [PATCH 1/3] i2c: move of_i2c_register_devices call into core
From: Jean Delvare @ 2011-09-02 9:23 UTC (permalink / raw)
To: Rob Herring
Cc: Stephen Warren, Sebastian Andrzej Siewior, linux-kernel,
linux-i2c, Ben Dooks, Dirk Brandewie, linuxppc-dev
In-Reply-To: <4E3C7B3C.1090100@gmail.com>
Hi Rob, Grant,
On Fri, 05 Aug 2011 18:22:36 -0500, Rob Herring wrote:
> Grant,
>
> On 08/05/2011 05:54 PM, Grant Likely wrote:
> > On Fri, Aug 05, 2011 at 04:24:26PM -0500, Rob Herring wrote:
> >> From: Rob Herring <rob.herring@calxeda.com>
> >>
> >> All callers of of_i2c_register_devices are immediately preceded by a call
> >> to i2c_add_adapter or i2c_add_numbered_adapter. Add call to
> >> of_i2c_register_devices and remove all other callers.
> >>
> >> This causes a module dependency loop that is resolved by the next commit.
> >
> > Wrong way around. Don't break bisectability. I'll leave it up to Ben
> > and Jean on weather or not they want to move this code. I intend to
> > do the same thing for spi/gpio, but I maintain those subsystems so I
> > get to choose. i2c is not up to me.
>
> Well, I know, but it's only broken for bisect in the case of both being
> modules. So it's only run-time brokenness. That's better than the 3
> months it was broken before. I couldn't come up with a better way. The
> choices I thought of were:
>
> -temporarily exporting and adding of_i2c_register_devices to i2c.h and
> then removing it. I'm not a fan of adding that churn.
> -just combining it all into 1 patch.
That would have been the right thing to do, yes. The two patches are
not so large, so the resulting merged patch would still be reasonable.
There's no point in splitting patches if they can't be applied in
sequence, bisected, and rejected, reverted or backported individually;
which is clearly not the case here.
But anyway, I don't buy the whole thing. We currently have a nice
separation between OF and the underlying bus types. Breaking it all
just for the sake of saving one call in 4 drivers (out of ~70 in the
current kernel tree) doesn't seem worth it, at all. It would make
things harder to maintain, too (I definitely do not want to maintain
OF-specific code).
If you are really worried about the extra call to
of_i2c_register_devices(), then maybe the of_i2c implementation is
incorrect, and you should rework it to build on top of
i2c_register_board_info() rather than i2c_new_device().
> -reverse the order and leave i2c device registration broken for 1
> commit. Thinking some more about it, perhaps that is a bit better than
> broken module loading. Guess it depends if you are doing modules or
> built-in.
--
Jean Delvare
^ permalink raw reply
* Re: [PATCH] powerpc/5200: enable audio in the defconfig
From: Wolfram Sang @ 2011-09-02 8:09 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1314916282-13863-1-git-send-email-timur@freescale.com>
[-- Attachment #1: Type: text/plain, Size: 444 bytes --]
On Thu, Sep 01, 2011 at 05:31:22PM -0500, Timur Tabi wrote:
> Audio support for the MPC5200 exists, so enable it by default.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
Yup, I like to have the PCM030 in a working state
Acked-by: Wolfram Sang <w.sang@pengutronix.de>
--
Pengutronix e.K. | Wolfram Sang |
Industrial Linux Solutions | http://www.pengutronix.de/ |
[-- Attachment #2: Digital signature --]
[-- Type: application/pgp-signature, Size: 198 bytes --]
^ permalink raw reply
* Re: [PATCH v2] mtd/nand : workaround for Freescale FCM to support large-page Nand chip
From: Stijn Devriendt @ 2011-09-02 7:10 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, b35362, dwmw2, linux-mtd, dedekind1
In-Reply-To: <4E494520.7050509@freescale.com>
On Mon, Aug 15, 2011 at 6:11 PM, Scott Wood <scottwood@freescale.com> wrote=
:
> On 08/15/2011 10:59 AM, Artem Bityutskiy wrote:
>> On Tue, 2011-07-12 at 12:48 +0800, b35362@freescale.com wrote:
>>> + =A0 =A0/*
>>> + =A0 =A0 * Hack for supporting the flash chip whose writesize is
>>> + =A0 =A0 * larger than 2K bytes.
>>> + =A0 =A0 */
>>> + =A0 =A0if (mtd->writesize > 2048) {
>>> + =A0 =A0 =A0 =A0 =A0 =A0elbc_fcm_ctrl->subpage_shift =3D ffs(mtd->writ=
esize >> 11) - 1;
>>> + =A0 =A0 =A0 =A0 =A0 =A0elbc_fcm_ctrl->subpage_mask =3D
>>> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0(1 << elbc_fcm_ctrl->subpage_s=
hift) - 1;
>>> + =A0 =A0 =A0 =A0 =A0 =A0/*
>>> + =A0 =A0 =A0 =A0 =A0 =A0 * Rewrite mtd->writesize, mtd->oobsize, chip-=
>page_shift
>>> + =A0 =A0 =A0 =A0 =A0 =A0 * and chip->pagemask.
>>> + =A0 =A0 =A0 =A0 =A0 =A0 */
>>> + =A0 =A0 =A0 =A0 =A0 =A0mtd->writesize =3D 2048;
>>> + =A0 =A0 =A0 =A0 =A0 =A0mtd->oobsize =3D 64;
>>> + =A0 =A0 =A0 =A0 =A0 =A0chip->page_shift =3D ffs(mtd->writesize) - 1;
>>> + =A0 =A0 =A0 =A0 =A0 =A0chip->pagemask =3D (chip->chipsize >> chip->pa=
ge_shift) - 1;
>>> + =A0 =A0}
>>
>> So basically if the flash has 4KiB NAND pages, you are considering it as
>> a flash with 2KiB NAND pages. But surely this will work only if the
>> underlying flash has NOP 2 at least. Or even, if you consider that JFFS2
>> and YAFFS want to write to OOB, you need NOP 4 (2 ECC writes and 2
>> writes from YAFFS/JFFS2) ? So this won't work for NOP1 flashes?
>
> Right. =A0The set of chips that work with this controller is still larger
> with this than without this.
>
> It looks like NOP1 tends to be MLC -- you probably wouldn't want to use
> MLC with this controller anyway as it only does 1-bit ECC.
>
I currently have the fsl_elbc_nand driver working with BCH codes in softwar=
e.
The patch is fairly small (although I'm just hardcoding the required ECC
configuration). I'll see if I can clean it up and push it upstream soon.
Regards,
Stijn
^ permalink raw reply
* Re: VFIO v2 design plan
From: David Gibson @ 2011-09-02 5:07 UTC (permalink / raw)
To: Alex Williamson
Cc: chrisw, Alexey Kardashevskiy, kvm, Paul Mackerras, Roedel, Joerg,
agraf, qemu-devel, aafabbri, iommu, Avi Kivity, Anthony Liguori,
linux-pci@vger.kernel.org, linuxppc-dev, benve
In-Reply-To: <1314908821.2859.531.camel@bling.home>
On Thu, Sep 01, 2011 at 02:27:00PM -0600, Alex Williamson wrote:
> On Thu, 2011-09-01 at 14:10 +1000, David Gibson wrote:
> > On Tue, Aug 30, 2011 at 08:51:38AM -0600, Alex Williamson wrote:
[snip]
> > > > If you open a group, merge in a bunch of other groups, then re-open
> > > > /dev/vfio/NNN for one of the groups mergeed, presumably the new fd
> > > > must also see the merged group? So presumably you must only unmerge
> > > > everything when all the fds are closed.
> > >
> > > The device fds for the group to be unmerged must be closed before an
> > > unmerge. The iommu fd is tricky. The iommu fd is really the iommu for
> > > the merged group, not the individual groups, so it's context stays with
> > > the remaining group. Therefore I don't enforce a refcnt on the iommu
> > > fd. The usage model I expect is that if a merge works, the user will
> > > probably use a single iommu fd for the whole merged group. Maybe that
> > > should be enforced?
> >
> > I thought I recalled you saying earlier that the iommu fd could not be
> > open when merging new groups in. I would expect that also to be true
> > when unmerging in that case.
>
> We have to support hotplug. The group-to-be-merged can't be in use (no
> open device or iommu fds). To unmerge a group, we only require that no
> device fds are in use as the merged-group-iommu may still be in use by
> the remaining members.
I'm not entirely clear how this relates to hotplug. But I guess the
crucial point is that the group-to-be-merged may not have open device
or iommu fds, but the group-to-be-merged-into can?
But couldn't either a merge or an unmerge cause a change in the
effective capabilities of the IOMMU?
> > > > If you open groups a and b, then merge a (disjoint) bunch of things
> > > > into each, then merge b into a, what are the semantics? Wheat about
> > > > if you then unmerge b from a - does it just remove the atomic group b,
> > > > or everything you merged into b earlier? Or, what happens if you open
> > > > group a, merge in some things, then attempt to unmerge a from the
> > > > merged group?
> > >
> > > Simple, don't allow merging and unmerging of merged groups. Merge and
> > > unmerge only work on singleton groups.
> >
> > Ok, in that case I think we should call it "add" and "remove" rather
> > than merge and unmerge.
> >
> > > The last case we must support.
> > > In that case you just use:
> > >
> > > ioctl(a.fd, VFIO_GROUP_MERGE, b.fd)
> > > ioctl(b.fd, VFIO_GROUP_UNMERGE, a.fd)
> > >
> > > The groups are peers when merged, so b can remove a as easily as a can
> > > remove b. Group b is left with any iommu context setup while
> > > merged.
> >
> > Um *goes cross-eyed*. So, if you open (atomic) groups a and b, then
> > add group b to a, are the two open fds now functionally identical?
>
> Yes.
>
> > And likewise if you then open either a or b again straight from from
> > /dev/vfio?
>
> Yes.
>
> > Except, that the b fd must then retain the fact that it was originally
> > for atomic group (b), so that it can be used as a handle for an
> > unmerge/remove.
>
> Right.
Ugh. Having the file handle represent the meta-group for most
purposes, but also represent (invisibly) an atomic group is just
horrible. Especially when - using one of the examples mentioned
above, it's actually possible to remove the atomic group represented
by an fd from the meta-group it's also representing.
> > The more I dig into the details of these semantics the more I dislike
> > them.
>
> Suggest something better. I spent half a day thinking about what vfio
> would look like in configfs, it has some very appealing aspects, but
> since it doesn't support ioctls we'd still have a chardev interface and
> it gets ugly again.
Well, again, I prefer a persistent group interface, where the
meta-group is not bound to the lifetime of a file handle. Instead you
use a different interface to create a meta-group (which has an ID
disjoint from the atomic groups), then you can open
/dev/vfio/<metagroup-id>. The constituent atomic group devices are
still visible, and their enumeration interface works, but are otherwise
unusable (like a group which still has kernel drivers bound to some
constituent devices).
Hrm. In the interests of making forward progress here, can I suggest
we implement the other APIs without group-binding/metagrouping for
now. It doesn't look as if any of the suggested approaches for this
so far are fundamentally incompatible with the rest of the interface.
[snip]
> > > > > > I'd be more comfortable with a model where there was a distinction
> > > > > > between a "soft" and "hard" remove. The soft would either simply
> > > > > > fail, if the device is in use by vfio, or block indefinitely. The
> > > > > > hard would kill the user process without delay. This effectively
> > > > > > allows your semantics to be implemented in userspace (soft remove,
> > > > > > wait, hard remove) - where it's easier to tweak the policy of how long
> > > > > > to wait.
> > > > >
> > > > > Your first example is essentially what current vfio does now, request
> > > > > remove, wait indefinitely and qemu triggers an abort if the guest
> > > > > doesn't respond. The trouble with moving this policy to userspace is
> > > > > that we're not protecting the host.
> > > >
> > > > How is the host not protected? Bear in mind that when I say
> > > > "userspace" I'm not thinking qemu, I'm thinking the admin equipped
> > > > with whatever tools he uses for moving devices between guests. So
> > > > they go:
> > > > - Please remove this group from the guest
> > > > - Waits for an amount of time of their choice
> > > > - Decide, crap, the guest is broken
> > > > - Hard remove the group from the guest, killing the guest
> > > >
> > > > It's basic in perfect analogy to the old:
> > > > - kill -15
> > > > - *drum fingers*
> > > > - Damn, it's stuck
> > > > - kill -9
> > >
> > > And what if the remove is initiated by a hardware admin that walks over
> > > to the system, and presses the PCI device hot unplug doorbell? It just
> > > looks like a driver hang. Thanks,
> >
> > Hm, true. How is this case handled on the host side?
>
> Same as if you attempt to unbind the device from the driver, release
> callback, iirc. Thanks,
Roght, I guess my point is whether there's some kind of userspace
notification or not. If there is, then it's reasonable to do a soft
unbind, and the userspace callback can do a hard kill after a delay.
If not, then it does need to be a hard unbind / kill.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply
* Re: [PATCH 1/4] powerpc/85xx: Rename PowerPC core nodes to match other e500mc based .dts
From: Kumar Gala @ 2011-09-02 3:35 UTC (permalink / raw)
To: Tabi Timur-B04825; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <CAOZdJXUfgkvCCgW-KEgGJ0wW+EyGnhf+=aLV7E4SsKBoztP7uQ@mail.gmail.com>
On Sep 1, 2011, at 5:33 PM, Tabi Timur-B04825 wrote:
> On Thu, Sep 1, 2011 at 2:26 PM, Kumar Gala <galak@kernel.crashing.org> =
wrote:
>> The P4080 silicon device tree was using PowerPC,4080 while the other
>> e500mc based SoCs used PowerPC,e500mc. Use the core name to be
>> consistent going forward.
>=20
> Shouldn't we change the nodes for all e500 based device trees in one
> shot, instead of just the P4080?
I changed all the e500mc class to match what is used by everyone else. =
The e500v1/e500v2 are use the same convention at this time so figured a =
separate patch can handle them.
- k=
^ permalink raw reply
* Re: [PATCH 1/4] powerpc/85xx: Rename PowerPC core nodes to match other e500mc based .dts
From: Kumar Gala @ 2011-09-02 3:21 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <4E5FEE40.7080901@freescale.com>
On Sep 1, 2011, at 3:42 PM, Scott Wood wrote:
> On 09/01/2011 02:26 PM, Kumar Gala wrote:
>> The P4080 silicon device tree was using PowerPC,4080 while the other
>> e500mc based SoCs used PowerPC,e500mc. Use the core name to be
>> consistent going forward.
>=20
> Why are we not using the generic names recommendation?
>=20
> Is the "PowerPC" vendor string still appropriate here, or should we =
use
> "fsl"?
>=20
> -Scott
I have mixed feelings on this. The PowerPC,NAME has a long history & =
precedence. Is there any use or value to change this?
- k=
^ permalink raw reply
* AUTO: Michael Barry is out of the office (returning 12/09/2011)
From: Michael Barry @ 2011-09-02 3:00 UTC (permalink / raw)
To: linuxppc-dev
I am out of the office until 12/09/2011.
Note: This is an automated response to your message "Linuxppc-dev Digest,
Vol 85, Issue 4" sent on 1/9/2011 19:49:48.
This is the only notification you will receive while this person is away.
^ permalink raw reply
* Re: [PATCH 1/4] powerpc/85xx: Rename PowerPC core nodes to match other e500mc based .dts
From: Tabi Timur-B04825 @ 2011-09-01 22:33 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <1314905175-4371-1-git-send-email-galak@kernel.crashing.org>
On Thu, Sep 1, 2011 at 2:26 PM, Kumar Gala <galak@kernel.crashing.org> wrot=
e:
> The P4080 silicon device tree was using PowerPC,4080 while the other
> e500mc based SoCs used PowerPC,e500mc. =A0Use the core name to be
> consistent going forward.
Shouldn't we change the nodes for all e500 based device trees in one
shot, instead of just the P4080?
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* Re: [PATCH 1/4] powerpc/85xx: Rename PowerPC core nodes to match other e500mc based .dts
From: Tabi Timur-B04825 @ 2011-09-01 22:34 UTC (permalink / raw)
To: Wood Scott-B07421; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <4E5FEE40.7080901@freescale.com>
On Thu, Sep 1, 2011 at 3:42 PM, Scott Wood <scottwood@freescale.com> wrote:
> On 09/01/2011 02:26 PM, Kumar Gala wrote:
>> The P4080 silicon device tree was using PowerPC,4080 while the other
>> e500mc based SoCs used PowerPC,e500mc. =A0Use the core name to be
>> consistent going forward.
>
> Why are we not using the generic names recommendation?
>
> Is the "PowerPC" vendor string still appropriate here, or should we use
> "fsl"?
And what about a compatible property?
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* [PATCH] powerpc/5200: enable audio in the defconfig
From: Timur Tabi @ 2011-09-01 22:31 UTC (permalink / raw)
To: benh, grant.likely, linuxppc-dev
Audio support for the MPC5200 exists, so enable it by default.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
There was a bug in the audio drivers related to the of_platform
changes that was never discovered because these drivers were
never compiled by default. This patch should make sure that
never happens again.
arch/powerpc/configs/mpc5200_defconfig | 12 ++++++++++++
1 files changed, 12 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
index e63f537..2a1320f 100644
--- a/arch/powerpc/configs/mpc5200_defconfig
+++ b/arch/powerpc/configs/mpc5200_defconfig
@@ -88,6 +88,18 @@ CONFIG_FB_RADEON=y
# CONFIG_VGA_CONSOLE is not set
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_LOGO=y
+CONFIG_SOUND=y
+CONFIG_SND=y
+# CONFIG_SND_SUPPORT_OLD_API is not set
+# CONFIG_SND_DRIVERS is not set
+# CONFIG_SND_PCI is not set
+# CONFIG_SND_PPC is not set
+# CONFIG_SND_SPI is not set
+# CONFIG_SND_USB is not set
+CONFIG_SND_SOC=y
+CONFIG_SND_SOC_MPC5200_I2S=y
+CONFIG_SND_MPC52xx_SOC_PCM030=y
+CONFIG_SND_MPC52xx_SOC_EFIKA=y
CONFIG_HID_DRAGONRISE=y
CONFIG_HID_GYRATION=y
CONFIG_HID_TWINHAN=y
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH v3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip
From: Scott Wood @ 2011-09-01 22:30 UTC (permalink / raw)
To: LiuShuo
Cc: linuxppc-dev@ozlabs.org, linux-mtd@lists.infradead.org,
dwmw2@infradead.org, Li Yang-R58472, Matthieu CASTET
In-Reply-To: <4E5F5360.6060400@freescale.com>
On 09/01/2011 04:41 AM, LiuShuo wrote:
> After doing some tests, I found that the elbc controller can read/write
> 4k with one command
> if we insert a FIR_OP_NOP between first half reading/wring and second
> half reading/writing.(delay for something ?)
>From the docs:
> A NOP instruction that appears in FIR ahead of the last instruction
> is executed with the timing of a regular command instruction, but
> neither LFCLE nor LFWE are asserted. Thus a NOP instruction may be
> used to insert a pause matching the time taken for a regular command
> write.
So the NOP does generate a delay. Would be nice to know exactly why
it's required.
Have you tried doing this under load with parallel NOR activity? With
CE-don't-care operation, during the times when CE is not asserted, does
it matter what happens with CLE/ALE/RE? These signals could be driven
for another chipselect during that time.
-Scott
^ permalink raw reply
* Re: [PATCH 1/4] powerpc/85xx: Rename PowerPC core nodes to match other e500mc based .dts
From: Scott Wood @ 2011-09-01 20:42 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <1314905175-4371-1-git-send-email-galak@kernel.crashing.org>
On 09/01/2011 02:26 PM, Kumar Gala wrote:
> The P4080 silicon device tree was using PowerPC,4080 while the other
> e500mc based SoCs used PowerPC,e500mc. Use the core name to be
> consistent going forward.
Why are we not using the generic names recommendation?
Is the "PowerPC" vendor string still appropriate here, or should we use
"fsl"?
-Scott
^ permalink raw reply
* Re: VFIO v2 design plan
From: Alex Williamson @ 2011-09-01 20:27 UTC (permalink / raw)
To: David Gibson
Cc: aafabbri, Alexey Kardashevskiy, kvm, Paul Mackerras,
Roedel, Joerg, agraf, qemu-devel, chrisw, iommu, Avi Kivity,
Anthony Liguori, linux-pci@vger.kernel.org, linuxppc-dev, benve
In-Reply-To: <20110901041035.GJ11906@yookeroo.fritz.box>
On Thu, 2011-09-01 at 14:10 +1000, David Gibson wrote:
> On Tue, Aug 30, 2011 at 08:51:38AM -0600, Alex Williamson wrote:
> > On Tue, 2011-08-30 at 17:48 +1000, David Gibson wrote:
> > > On Mon, Aug 29, 2011 at 10:24:43PM -0600, Alex Williamson wrote:
> > > > On Tue, 2011-08-30 at 13:04 +1000, David Gibson wrote:
> > > > > On Fri, Aug 26, 2011 at 11:05:23AM -0600, Alex Williamson wrote:
> [snip]
> > > > > > Once the group is viable, the user may bind the
> > > > > > group to another group, retrieve the iommu fd, or retrieve device fds.
> > > > > > Internally, each of these operations will result in an iommu domain
> > > > > > being allocated and all of the devices attached to the domain.
> > > > > >
> > > > > > The purpose of binding groups is to share the iommu domain. Groups
> > > > > > making use of incompatible iommu domains will fail to bind. Groups
> > > > > > making use of different mm's will fail to bind. The vfio driver may
> > > > > > reject some binding based on domain capabilities, but final veto power
> > > > > > is left to the iommu driver[1]. If a user makes use of a group
> > > > > > independently and later wishes to bind it to another group, all the
> > > > > > device fds and the iommu fd must first be closed. This prevents using a
> > > > > > stale iommu fd or accessing devices while the iommu is being switched.
> > > > > > Operations on any group fds of a merged group are performed globally on
> > > > > > the group (ie. enumerating the devices lists all devices in the merged
> > > > > > group, retrieving the iommu fd from any group fd results in the same fd,
> > > > > > device fds from any group can be retrieved from any group fd[2]).
> > > > > > Groups can be merged and unmerged dynamically. Unmerging a group
> > > > > > requires the device fds for the outgoing group are closed. The iommu fd
> > > > > > will remain persistent for the remaining merged group.
> > > > >
> > > > > As I've said I prefer a persistent group model, rather than this
> > > > > transient group model, but it's not a dealbreaker by itself. How are
> > > > > unmerges specified?
> > > >
> > > > VFIO_GROUP_UNMERGE ioctl taking a group fd parameter.
> > > >
> > > > > I'm also assuming that in this model closing a
> > > > > (bound) group fd will unmerge everything down to atomic groups again.
> > > >
> > > > Yes, it will unmerge the closed group down to the atomic group.
> > >
> > > Hrm, not thrilled with the merging semantics, but I can probably live
> > > with them. Still some clarifications, though..
> > >
> > > If you open a group, merge in a bunch of other groups, then re-open
> > > /dev/vfio/NNN for one of the groups mergeed, presumably the new fd
> > > must also see the merged group? So presumably you must only unmerge
> > > everything when all the fds are closed.
> >
> > The device fds for the group to be unmerged must be closed before an
> > unmerge. The iommu fd is tricky. The iommu fd is really the iommu for
> > the merged group, not the individual groups, so it's context stays with
> > the remaining group. Therefore I don't enforce a refcnt on the iommu
> > fd. The usage model I expect is that if a merge works, the user will
> > probably use a single iommu fd for the whole merged group. Maybe that
> > should be enforced?
>
> I thought I recalled you saying earlier that the iommu fd could not be
> open when merging new groups in. I would expect that also to be true
> when unmerging in that case.
We have to support hotplug. The group-to-be-merged can't be in use (no
open device or iommu fds). To unmerge a group, we only require that no
device fds are in use as the merged-group-iommu may still be in use by
the remaining members.
> > > If you open groups a and b, then merge a (disjoint) bunch of things
> > > into each, then merge b into a, what are the semantics? Wheat about
> > > if you then unmerge b from a - does it just remove the atomic group b,
> > > or everything you merged into b earlier? Or, what happens if you open
> > > group a, merge in some things, then attempt to unmerge a from the
> > > merged group?
> >
> > Simple, don't allow merging and unmerging of merged groups. Merge and
> > unmerge only work on singleton groups.
>
> Ok, in that case I think we should call it "add" and "remove" rather
> than merge and unmerge.
>
> > The last case we must support.
> > In that case you just use:
> >
> > ioctl(a.fd, VFIO_GROUP_MERGE, b.fd)
> > ioctl(b.fd, VFIO_GROUP_UNMERGE, a.fd)
> >
> > The groups are peers when merged, so b can remove a as easily as a can
> > remove b. Group b is left with any iommu context setup while
> > merged.
>
> Um *goes cross-eyed*. So, if you open (atomic) groups a and b, then
> add group b to a, are the two open fds now functionally identical?
Yes.
> And likewise if you then open either a or b again straight from from
> /dev/vfio?
Yes.
> Except, that the b fd must then retain the fact that it was originally
> for atomic group (b), so that it can be used as a handle for an
> unmerge/remove.
Right.
> The more I dig into the details of these semantics the more I dislike
> them.
Suggest something better. I spent half a day thinking about what vfio
would look like in configfs, it has some very appealing aspects, but
since it doesn't support ioctls we'd still have a chardev interface and
it gets ugly again.
> [snip]
> > > > Beyond unbind, we also need to think about hotplug. If a system had
> > > > multiple hotplug slots below a P2P bridge and a device was added while
> > > > the group is in use, what do we do? Maybe we can somehow disable it or
> > > > mark it for vfio in our bus notifier routines(?).
> > >
> > > That is a very good point. It actually brings into focus a niggling
> > > concern I had about this model where the group becomes vfio usable
> > > once all the devices in it are bound to vfio. Because of the
> > > possibility of hotplug, I think its conceptually more correct to not
> > > treat vfio as just another kernel driver which can bind devices, but a
> > > special state that the whole group goes into atomically. So the
> > > sequence would be:
> > > - Admin asks that a group go into vfio state
> > > - kernel (attempts to) unbind kernel drivers from every device
> > > in the group
> > > - group is marked in vfio/limbo state
> > >
> > > At this point no kernel drivers may bind to anything in the group,
> > > including things that are hotplugged into the group after this initial
> > > sequence.
> >
> > It seems like this is a mode that could only be accessible if the group
> > is opened w/ admin capabilities, I don't think we'd want to let the vfio
> > group chrdev owner be able to do that automatically.
>
> They have to do something that's just as restrictive automatically.
> If new devices enter an atomic group that's in use by a guest, the
> kernel must not bind drivers to them. I'm just trying to make the
> semantics clearer, than proxying the restrictions by binding a dummy
> driver to everything.
>
> > I don't know of
> > any other drivers that behave like this, being able to unbind running
> > drivers and pull devices into itself.
>
> Well, it's not a driver behaving like this, it's an explicit admin
> operation to unbind all drivers from the whole group and put it in a
> state that's suitable for vfio assignment.
>
> > > > > > If the device fds are not released and
> > > > > > subsequently the iommu fd released as well, vfio will kill the user
> > > > > > process after some delay.
> > > > >
> > > > > Ouch, this seems to me a problematic semantic. Whether the user
> > > > > process survives depends on whether it processes the remove requests
> > > > > fast enough - and a user process could be slowed down by system load
> > > > > or other factors not entirely in its control.
> > > >
> > > > I was assuming "ample" time to process a hot remove, but yes, it's an
> > > > area of concern. I'm not sure how much of a problem it is in practice
> > > > though. Yes you can shoot your VM accidentally as root... don't do
> > > > that.
> > >
> > > They can, but with this semantic they can't know in advance whether
> > > the command is going to kill the VM or not. I can just see a
> > > situation where the admin issues a command to remove the device from
> > > the guest, and usually that goes through the hot guest unplug
> > > mechanisms, the guest keeps running and everything is happy. Then one
> > > time they issue *exactly the same command* and the VM dies, because
> > > the system is running really slow for some reason (huge load, or maybe
> > > someone switched the VM into full emulation for debugging).
> >
> > Not sure how to handle this other than leave a trail of bread crumbs.
>
> I have no idea what you mean by that.
printk(KERN_WARNING "vfio: killing processes %d (%s) to release device %s.\n", ...)
> > > > > I'd be more comfortable with a model where there was a distinction
> > > > > between a "soft" and "hard" remove. The soft would either simply
> > > > > fail, if the device is in use by vfio, or block indefinitely. The
> > > > > hard would kill the user process without delay. This effectively
> > > > > allows your semantics to be implemented in userspace (soft remove,
> > > > > wait, hard remove) - where it's easier to tweak the policy of how long
> > > > > to wait.
> > > >
> > > > Your first example is essentially what current vfio does now, request
> > > > remove, wait indefinitely and qemu triggers an abort if the guest
> > > > doesn't respond. The trouble with moving this policy to userspace is
> > > > that we're not protecting the host.
> > >
> > > How is the host not protected? Bear in mind that when I say
> > > "userspace" I'm not thinking qemu, I'm thinking the admin equipped
> > > with whatever tools he uses for moving devices between guests. So
> > > they go:
> > > - Please remove this group from the guest
> > > - Waits for an amount of time of their choice
> > > - Decide, crap, the guest is broken
> > > - Hard remove the group from the guest, killing the guest
> > >
> > > It's basic in perfect analogy to the old:
> > > - kill -15
> > > - *drum fingers*
> > > - Damn, it's stuck
> > > - kill -9
> >
> > And what if the remove is initiated by a hardware admin that walks over
> > to the system, and presses the PCI device hot unplug doorbell? It just
> > looks like a driver hang. Thanks,
>
> Hm, true. How is this case handled on the host side?
Same as if you attempt to unbind the device from the driver, release
callback, iirc. Thanks,
Alex
^ permalink raw reply
* [PATCH 2/4] powerpc/85xx: Rename p2040_rdb.c to p2041_rdb.c
From: Kumar Gala @ 2011-09-01 20:00 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Mingkai Hu
From: Mingkai Hu <Mingkai.hu@freescale.com>
There's only p2041rdb board for official release, but the p2041 silicon
on the board can be converted to p2040 silicon without XAUI and L2 cache
function, then the board becomes p2040rdb board. so we use the file name
p2041_rdb.c to handle P2040RDB board and P2041RDB board which is also
consistent with the board name under U-Boot.
During the rename we make few other minor changes to the device tree:
* Move USB phy setting into p2041si.dtsi as its SoC not board defined
* Convert PCI clock-frequency to decimal to be more readable
Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
arch/powerpc/boot/dts/p2040rdb.dts | 166 -------
arch/powerpc/boot/dts/p2040si.dtsi | 623 --------------------------
arch/powerpc/boot/dts/p2041rdb.dts | 161 +++++++
arch/powerpc/boot/dts/p2041si.dtsi | 623 ++++++++++++++++++++++++++
arch/powerpc/configs/corenet32_smp_defconfig | 2 +-
arch/powerpc/platforms/85xx/Kconfig | 6 +-
arch/powerpc/platforms/85xx/Makefile | 2 +-
arch/powerpc/platforms/85xx/p2040_rdb.c | 88 ----
arch/powerpc/platforms/85xx/p2041_rdb.c | 88 ++++
9 files changed, 877 insertions(+), 882 deletions(-)
delete mode 100644 arch/powerpc/boot/dts/p2040rdb.dts
delete mode 100644 arch/powerpc/boot/dts/p2040si.dtsi
create mode 100644 arch/powerpc/boot/dts/p2041rdb.dts
create mode 100644 arch/powerpc/boot/dts/p2041si.dtsi
delete mode 100644 arch/powerpc/platforms/85xx/p2040_rdb.c
create mode 100644 arch/powerpc/platforms/85xx/p2041_rdb.c
diff --git a/arch/powerpc/boot/dts/p2040rdb.dts b/arch/powerpc/boot/dts/p2040rdb.dts
deleted file mode 100644
index 7d84e39..0000000
--- a/arch/powerpc/boot/dts/p2040rdb.dts
+++ /dev/null
@@ -1,166 +0,0 @@
-/*
- * P2040RDB Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/include/ "p2040si.dtsi"
-
-/ {
- model = "fsl,P2040RDB";
- compatible = "fsl,P2040RDB";
- #address-cells = <2>;
- #size-cells = <2>;
- interrupt-parent = <&mpic>;
-
- memory {
- device_type = "memory";
- };
-
- soc: soc@ffe000000 {
- spi@110000 {
- flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "spansion,s25sl12801";
- reg = <0>;
- spi-max-frequency = <40000000>; /* input clock */
- partition@u-boot {
- label = "u-boot";
- reg = <0x00000000 0x00100000>;
- read-only;
- };
- partition@kernel {
- label = "kernel";
- reg = <0x00100000 0x00500000>;
- read-only;
- };
- partition@dtb {
- label = "dtb";
- reg = <0x00600000 0x00100000>;
- read-only;
- };
- partition@fs {
- label = "file system";
- reg = <0x00700000 0x00900000>;
- };
- };
- };
-
- i2c@118000 {
- lm75b@48 {
- compatible = "nxp,lm75a";
- reg = <0x48>;
- };
- eeprom@50 {
- compatible = "at24,24c256";
- reg = <0x50>;
- };
- rtc@68 {
- compatible = "pericom,pt7c4338";
- reg = <0x68>;
- };
- };
-
- i2c@118100 {
- eeprom@50 {
- compatible = "at24,24c256";
- reg = <0x50>;
- };
- };
-
- usb0: usb@210000 {
- phy_type = "utmi";
- };
-
- usb1: usb@211000 {
- dr_mode = "host";
- phy_type = "utmi";
- };
- };
-
- localbus@ffe124000 {
- reg = <0xf 0xfe124000 0 0x1000>;
- ranges = <0 0 0xf 0xe8000000 0x08000000>;
-
- flash@0,0 {
- compatible = "cfi-flash";
- reg = <0 0 0x08000000>;
- bank-width = <2>;
- device-width = <2>;
- };
- };
-
- pci0: pcie@ffe200000 {
- reg = <0xf 0xfe200000 0 0x1000>;
- ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
- 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
- pcie@0 {
- ranges = <0x02000000 0 0xe0000000
- 0x02000000 0 0xe0000000
- 0 0x20000000
-
- 0x01000000 0 0x00000000
- 0x01000000 0 0x00000000
- 0 0x00010000>;
- };
- };
-
- pci1: pcie@ffe201000 {
- reg = <0xf 0xfe201000 0 0x1000>;
- ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
- 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
- pcie@0 {
- ranges = <0x02000000 0 0xe0000000
- 0x02000000 0 0xe0000000
- 0 0x20000000
-
- 0x01000000 0 0x00000000
- 0x01000000 0 0x00000000
- 0 0x00010000>;
- };
- };
-
- pci2: pcie@ffe202000 {
- reg = <0xf 0xfe202000 0 0x1000>;
- ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
- 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
- pcie@0 {
- ranges = <0x02000000 0 0xe0000000
- 0x02000000 0 0xe0000000
- 0 0x20000000
-
- 0x01000000 0 0x00000000
- 0x01000000 0 0x00000000
- 0 0x00010000>;
- };
- };
-};
diff --git a/arch/powerpc/boot/dts/p2040si.dtsi b/arch/powerpc/boot/dts/p2040si.dtsi
deleted file mode 100644
index 5fdbb24..0000000
--- a/arch/powerpc/boot/dts/p2040si.dtsi
+++ /dev/null
@@ -1,623 +0,0 @@
-/*
- * P2040 Silicon Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * * Neither the name of Freescale Semiconductor nor the
- * names of its contributors may be used to endorse or promote products
- * derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-/dts-v1/;
-
-/ {
- compatible = "fsl,P2040";
- #address-cells = <2>;
- #size-cells = <2>;
- interrupt-parent = <&mpic>;
-
- aliases {
- ccsr = &soc;
-
- serial0 = &serial0;
- serial1 = &serial1;
- serial2 = &serial2;
- serial3 = &serial3;
- pci0 = &pci0;
- pci1 = &pci1;
- pci2 = &pci2;
- usb0 = &usb0;
- usb1 = &usb1;
- dma0 = &dma0;
- dma1 = &dma1;
- sdhc = &sdhc;
- msi0 = &msi0;
- msi1 = &msi1;
- msi2 = &msi2;
-
- crypto = &crypto;
- sec_jr0 = &sec_jr0;
- sec_jr1 = &sec_jr1;
- sec_jr2 = &sec_jr2;
- sec_jr3 = &sec_jr3;
- rtic_a = &rtic_a;
- rtic_b = &rtic_b;
- rtic_c = &rtic_c;
- rtic_d = &rtic_d;
- sec_mon = &sec_mon;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu0: PowerPC,e500mc@0 {
- device_type = "cpu";
- reg = <0>;
- next-level-cache = <&L2_0>;
- L2_0: l2-cache {
- next-level-cache = <&cpc>;
- };
- };
- cpu1: PowerPC,e500mc@1 {
- device_type = "cpu";
- reg = <1>;
- next-level-cache = <&L2_1>;
- L2_1: l2-cache {
- next-level-cache = <&cpc>;
- };
- };
- cpu2: PowerPC,e500mc@2 {
- device_type = "cpu";
- reg = <2>;
- next-level-cache = <&L2_2>;
- L2_2: l2-cache {
- next-level-cache = <&cpc>;
- };
- };
- cpu3: PowerPC,e500mc@3 {
- device_type = "cpu";
- reg = <3>;
- next-level-cache = <&L2_3>;
- L2_3: l2-cache {
- next-level-cache = <&cpc>;
- };
- };
- };
-
- soc: soc@ffe000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- device_type = "soc";
- compatible = "simple-bus";
- ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
- reg = <0xf 0xfe000000 0 0x00001000>;
-
- soc-sram-error {
- compatible = "fsl,soc-sram-error";
- interrupts = <16 2 1 29>;
- };
-
- corenet-law@0 {
- compatible = "fsl,corenet-law";
- reg = <0x0 0x1000>;
- fsl,num-laws = <32>;
- };
-
- memory-controller@8000 {
- compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
- reg = <0x8000 0x1000>;
- interrupts = <16 2 1 23>;
- };
-
- cpc: l3-cache-controller@10000 {
- compatible = "fsl,p2040-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
- reg = <0x10000 0x1000>;
- interrupts = <16 2 1 27>;
- };
-
- corenet-cf@18000 {
- compatible = "fsl,corenet-cf";
- reg = <0x18000 0x1000>;
- interrupts = <16 2 1 31>;
- fsl,ccf-num-csdids = <32>;
- fsl,ccf-num-snoopids = <32>;
- };
-
- iommu@20000 {
- compatible = "fsl,pamu-v1.0", "fsl,pamu";
- reg = <0x20000 0x4000>;
- interrupts = <
- 24 2 0 0
- 16 2 1 30>;
- };
-
- mpic: pic@40000 {
- clock-frequency = <0>;
- interrupt-controller;
- #address-cells = <0>;
- #interrupt-cells = <4>;
- reg = <0x40000 0x40000>;
- compatible = "fsl,mpic", "chrp,open-pic";
- device_type = "open-pic";
- };
-
- msi0: msi@41600 {
- compatible = "fsl,mpic-msi";
- reg = <0x41600 0x200>;
- msi-available-ranges = <0 0x100>;
- interrupts = <
- 0xe0 0 0 0
- 0xe1 0 0 0
- 0xe2 0 0 0
- 0xe3 0 0 0
- 0xe4 0 0 0
- 0xe5 0 0 0
- 0xe6 0 0 0
- 0xe7 0 0 0>;
- };
-
- msi1: msi@41800 {
- compatible = "fsl,mpic-msi";
- reg = <0x41800 0x200>;
- msi-available-ranges = <0 0x100>;
- interrupts = <
- 0xe8 0 0 0
- 0xe9 0 0 0
- 0xea 0 0 0
- 0xeb 0 0 0
- 0xec 0 0 0
- 0xed 0 0 0
- 0xee 0 0 0
- 0xef 0 0 0>;
- };
-
- msi2: msi@41a00 {
- compatible = "fsl,mpic-msi";
- reg = <0x41a00 0x200>;
- msi-available-ranges = <0 0x100>;
- interrupts = <
- 0xf0 0 0 0
- 0xf1 0 0 0
- 0xf2 0 0 0
- 0xf3 0 0 0
- 0xf4 0 0 0
- 0xf5 0 0 0
- 0xf6 0 0 0
- 0xf7 0 0 0>;
- };
-
- guts: global-utilities@e0000 {
- compatible = "fsl,qoriq-device-config-1.0";
- reg = <0xe0000 0xe00>;
- fsl,has-rstcr;
- #sleep-cells = <1>;
- fsl,liodn-bits = <12>;
- };
-
- pins: global-utilities@e0e00 {
- compatible = "fsl,qoriq-pin-control-1.0";
- reg = <0xe0e00 0x200>;
- #sleep-cells = <2>;
- };
-
- clockgen: global-utilities@e1000 {
- compatible = "fsl,p2040-clockgen", "fsl,qoriq-clockgen-1.0";
- reg = <0xe1000 0x1000>;
- clock-frequency = <0>;
- };
-
- rcpm: global-utilities@e2000 {
- compatible = "fsl,qoriq-rcpm-1.0";
- reg = <0xe2000 0x1000>;
- #sleep-cells = <1>;
- };
-
- sfp: sfp@e8000 {
- compatible = "fsl,p2040-sfp", "fsl,qoriq-sfp-1.0";
- reg = <0xe8000 0x1000>;
- };
-
- serdes: serdes@ea000 {
- compatible = "fsl,p2040-serdes";
- reg = <0xea000 0x1000>;
- };
-
- dma0: dma@100300 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,p2040-dma", "fsl,eloplus-dma";
- reg = <0x100300 0x4>;
- ranges = <0x0 0x100100 0x200>;
- cell-index = <0>;
- dma-channel@0 {
- compatible = "fsl,p2040-dma-channel",
- "fsl,eloplus-dma-channel";
- reg = <0x0 0x80>;
- cell-index = <0>;
- interrupts = <28 2 0 0>;
- };
- dma-channel@80 {
- compatible = "fsl,p2040-dma-channel",
- "fsl,eloplus-dma-channel";
- reg = <0x80 0x80>;
- cell-index = <1>;
- interrupts = <29 2 0 0>;
- };
- dma-channel@100 {
- compatible = "fsl,p2040-dma-channel",
- "fsl,eloplus-dma-channel";
- reg = <0x100 0x80>;
- cell-index = <2>;
- interrupts = <30 2 0 0>;
- };
- dma-channel@180 {
- compatible = "fsl,p2040-dma-channel",
- "fsl,eloplus-dma-channel";
- reg = <0x180 0x80>;
- cell-index = <3>;
- interrupts = <31 2 0 0>;
- };
- };
-
- dma1: dma@101300 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "fsl,p2040-dma", "fsl,eloplus-dma";
- reg = <0x101300 0x4>;
- ranges = <0x0 0x101100 0x200>;
- cell-index = <1>;
- dma-channel@0 {
- compatible = "fsl,p2040-dma-channel",
- "fsl,eloplus-dma-channel";
- reg = <0x0 0x80>;
- cell-index = <0>;
- interrupts = <32 2 0 0>;
- };
- dma-channel@80 {
- compatible = "fsl,p2040-dma-channel",
- "fsl,eloplus-dma-channel";
- reg = <0x80 0x80>;
- cell-index = <1>;
- interrupts = <33 2 0 0>;
- };
- dma-channel@100 {
- compatible = "fsl,p2040-dma-channel",
- "fsl,eloplus-dma-channel";
- reg = <0x100 0x80>;
- cell-index = <2>;
- interrupts = <34 2 0 0>;
- };
- dma-channel@180 {
- compatible = "fsl,p2040-dma-channel",
- "fsl,eloplus-dma-channel";
- reg = <0x180 0x80>;
- cell-index = <3>;
- interrupts = <35 2 0 0>;
- };
- };
-
- spi@110000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "fsl,p2040-espi", "fsl,mpc8536-espi";
- reg = <0x110000 0x1000>;
- interrupts = <53 0x2 0 0>;
- fsl,espi-num-chipselects = <4>;
-
- };
-
- sdhc: sdhc@114000 {
- compatible = "fsl,p2040-esdhc", "fsl,esdhc";
- reg = <0x114000 0x1000>;
- interrupts = <48 2 0 0>;
- sdhci,auto-cmd12;
- clock-frequency = <0>;
- };
-
-
- i2c@118000 {
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <0>;
- compatible = "fsl-i2c";
- reg = <0x118000 0x100>;
- interrupts = <38 2 0 0>;
- dfsrr;
- };
-
- i2c@118100 {
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <1>;
- compatible = "fsl-i2c";
- reg = <0x118100 0x100>;
- interrupts = <38 2 0 0>;
- dfsrr;
- };
-
- i2c@119000 {
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <2>;
- compatible = "fsl-i2c";
- reg = <0x119000 0x100>;
- interrupts = <39 2 0 0>;
- dfsrr;
- };
-
- i2c@119100 {
- #address-cells = <1>;
- #size-cells = <0>;
- cell-index = <3>;
- compatible = "fsl-i2c";
- reg = <0x119100 0x100>;
- interrupts = <39 2 0 0>;
- dfsrr;
- };
-
- serial0: serial@11c500 {
- cell-index = <0>;
- device_type = "serial";
- compatible = "ns16550";
- reg = <0x11c500 0x100>;
- clock-frequency = <0>;
- interrupts = <36 2 0 0>;
- };
-
- serial1: serial@11c600 {
- cell-index = <1>;
- device_type = "serial";
- compatible = "ns16550";
- reg = <0x11c600 0x100>;
- clock-frequency = <0>;
- interrupts = <36 2 0 0>;
- };
-
- serial2: serial@11d500 {
- cell-index = <2>;
- device_type = "serial";
- compatible = "ns16550";
- reg = <0x11d500 0x100>;
- clock-frequency = <0>;
- interrupts = <37 2 0 0>;
- };
-
- serial3: serial@11d600 {
- cell-index = <3>;
- device_type = "serial";
- compatible = "ns16550";
- reg = <0x11d600 0x100>;
- clock-frequency = <0>;
- interrupts = <37 2 0 0>;
- };
-
- gpio0: gpio@130000 {
- compatible = "fsl,p2040-gpio", "fsl,qoriq-gpio";
- reg = <0x130000 0x1000>;
- interrupts = <55 2 0 0>;
- #gpio-cells = <2>;
- gpio-controller;
- };
-
- usb0: usb@210000 {
- compatible = "fsl,p2040-usb2-mph",
- "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
- reg = <0x210000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <44 0x2 0 0>;
- port0;
- };
-
- usb1: usb@211000 {
- compatible = "fsl,p2040-usb2-dr",
- "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
- reg = <0x211000 0x1000>;
- #address-cells = <1>;
- #size-cells = <0>;
- interrupts = <45 0x2 0 0>;
- };
-
- sata@220000 {
- compatible = "fsl,p2040-sata", "fsl,pq-sata-v2";
- reg = <0x220000 0x1000>;
- interrupts = <68 0x2 0 0>;
- };
-
- sata@221000 {
- compatible = "fsl,p2040-sata", "fsl,pq-sata-v2";
- reg = <0x221000 0x1000>;
- interrupts = <69 0x2 0 0>;
- };
-
- crypto: crypto@300000 {
- compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x300000 0x10000>;
- ranges = <0 0x300000 0x10000>;
- interrupts = <92 2 0 0>;
-
- sec_jr0: jr@1000 {
- compatible = "fsl,sec-v4.2-job-ring",
- "fsl,sec-v4.0-job-ring";
- reg = <0x1000 0x1000>;
- interrupts = <88 2 0 0>;
- };
-
- sec_jr1: jr@2000 {
- compatible = "fsl,sec-v4.2-job-ring",
- "fsl,sec-v4.0-job-ring";
- reg = <0x2000 0x1000>;
- interrupts = <89 2 0 0>;
- };
-
- sec_jr2: jr@3000 {
- compatible = "fsl,sec-v4.2-job-ring",
- "fsl,sec-v4.0-job-ring";
- reg = <0x3000 0x1000>;
- interrupts = <90 2 0 0>;
- };
-
- sec_jr3: jr@4000 {
- compatible = "fsl,sec-v4.2-job-ring",
- "fsl,sec-v4.0-job-ring";
- reg = <0x4000 0x1000>;
- interrupts = <91 2 0 0>;
- };
-
- rtic@6000 {
- compatible = "fsl,sec-v4.2-rtic",
- "fsl,sec-v4.0-rtic";
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0x6000 0x100>;
- ranges = <0x0 0x6100 0xe00>;
-
- rtic_a: rtic-a@0 {
- compatible = "fsl,sec-v4.2-rtic-memory",
- "fsl,sec-v4.0-rtic-memory";
- reg = <0x00 0x20 0x100 0x80>;
- };
-
- rtic_b: rtic-b@20 {
- compatible = "fsl,sec-v4.2-rtic-memory",
- "fsl,sec-v4.0-rtic-memory";
- reg = <0x20 0x20 0x200 0x80>;
- };
-
- rtic_c: rtic-c@40 {
- compatible = "fsl,sec-v4.2-rtic-memory",
- "fsl,sec-v4.0-rtic-memory";
- reg = <0x40 0x20 0x300 0x80>;
- };
-
- rtic_d: rtic-d@60 {
- compatible = "fsl,sec-v4.2-rtic-memory",
- "fsl,sec-v4.0-rtic-memory";
- reg = <0x60 0x20 0x500 0x80>;
- };
- };
- };
-
- sec_mon: sec_mon@314000 {
- compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
- reg = <0x314000 0x1000>;
- interrupts = <93 2 0 0>;
- };
-
- };
-
- localbus@ffe124000 {
- compatible = "fsl,p2040-elbc", "fsl,elbc", "simple-bus";
- interrupts = <25 2 0 0>;
- #address-cells = <2>;
- #size-cells = <1>;
- };
-
- pci0: pcie@ffe200000 {
- compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2";
- device_type = "pci";
- #size-cells = <2>;
- #address-cells = <3>;
- bus-range = <0x0 0xff>;
- clock-frequency = <0x1fca055>;
- fsl,msi = <&msi0>;
- interrupts = <16 2 1 15>;
- pcie@0 {
- reg = <0 0 0 0 0>;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- device_type = "pci";
- interrupts = <16 2 1 15>;
- interrupt-map-mask = <0xf800 0 0 7>;
- interrupt-map = <
- /* IDSEL 0x0 */
- 0000 0 0 1 &mpic 40 1 0 0
- 0000 0 0 2 &mpic 1 1 0 0
- 0000 0 0 3 &mpic 2 1 0 0
- 0000 0 0 4 &mpic 3 1 0 0
- >;
- };
- };
-
- pci1: pcie@ffe201000 {
- compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2";
- device_type = "pci";
- #size-cells = <2>;
- #address-cells = <3>;
- bus-range = <0 0xff>;
- clock-frequency = <0x1fca055>;
- fsl,msi = <&msi1>;
- interrupts = <16 2 1 14>;
- pcie@0 {
- reg = <0 0 0 0 0>;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- device_type = "pci";
- interrupts = <16 2 1 14>;
- interrupt-map-mask = <0xf800 0 0 7>;
- interrupt-map = <
- /* IDSEL 0x0 */
- 0000 0 0 1 &mpic 41 1 0 0
- 0000 0 0 2 &mpic 5 1 0 0
- 0000 0 0 3 &mpic 6 1 0 0
- 0000 0 0 4 &mpic 7 1 0 0
- >;
- };
- };
-
- pci2: pcie@ffe202000 {
- compatible = "fsl,p2040-pcie", "fsl,qoriq-pcie-v2.2";
- device_type = "pci";
- #size-cells = <2>;
- #address-cells = <3>;
- bus-range = <0x0 0xff>;
- clock-frequency = <0x1fca055>;
- fsl,msi = <&msi2>;
- interrupts = <16 2 1 13>;
- pcie@0 {
- reg = <0 0 0 0 0>;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- device_type = "pci";
- interrupts = <16 2 1 13>;
- interrupt-map-mask = <0xf800 0 0 7>;
- interrupt-map = <
- /* IDSEL 0x0 */
- 0000 0 0 1 &mpic 42 1 0 0
- 0000 0 0 2 &mpic 9 1 0 0
- 0000 0 0 3 &mpic 10 1 0 0
- 0000 0 0 4 &mpic 11 1 0 0
- >;
- };
- };
-};
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
new file mode 100644
index 0000000..47bb461
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -0,0 +1,161 @@
+/*
+ * P2041RDB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/include/ "p2041si.dtsi"
+
+/ {
+ model = "fsl,P2041RDB";
+ compatible = "fsl,P2041RDB";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ memory {
+ device_type = "memory";
+ };
+
+ soc: soc@ffe000000 {
+ spi@110000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25sl12801";
+ reg = <0>;
+ spi-max-frequency = <40000000>; /* input clock */
+ partition@u-boot {
+ label = "u-boot";
+ reg = <0x00000000 0x00100000>;
+ read-only;
+ };
+ partition@kernel {
+ label = "kernel";
+ reg = <0x00100000 0x00500000>;
+ read-only;
+ };
+ partition@dtb {
+ label = "dtb";
+ reg = <0x00600000 0x00100000>;
+ read-only;
+ };
+ partition@fs {
+ label = "file system";
+ reg = <0x00700000 0x00900000>;
+ };
+ };
+ };
+
+ i2c@118000 {
+ lm75b@48 {
+ compatible = "nxp,lm75a";
+ reg = <0x48>;
+ };
+ eeprom@50 {
+ compatible = "at24,24c256";
+ reg = <0x50>;
+ };
+ rtc@68 {
+ compatible = "pericom,pt7c4338";
+ reg = <0x68>;
+ };
+ };
+
+ i2c@118100 {
+ eeprom@50 {
+ compatible = "at24,24c256";
+ reg = <0x50>;
+ };
+ };
+
+ usb1: usb@211000 {
+ dr_mode = "host";
+ };
+ };
+
+ localbus@ffe124000 {
+ reg = <0xf 0xfe124000 0 0x1000>;
+ ranges = <0 0 0xf 0xe8000000 0x08000000>;
+
+ flash@0,0 {
+ compatible = "cfi-flash";
+ reg = <0 0 0x08000000>;
+ bank-width = <2>;
+ device-width = <2>;
+ };
+ };
+
+ pci0: pcie@ffe200000 {
+ reg = <0xf 0xfe200000 0 0x1000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci1: pcie@ffe201000 {
+ reg = <0xf 0xfe201000 0 0x1000>;
+ ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+ 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+
+ pci2: pcie@ffe202000 {
+ reg = <0xf 0xfe202000 0 0x1000>;
+ ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
+ 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
+ pcie@0 {
+ ranges = <0x02000000 0 0xe0000000
+ 0x02000000 0 0xe0000000
+ 0 0x20000000
+
+ 0x01000000 0 0x00000000
+ 0x01000000 0 0x00000000
+ 0 0x00010000>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/p2041si.dtsi b/arch/powerpc/boot/dts/p2041si.dtsi
new file mode 100644
index 0000000..420cdb0
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2041si.dtsi
@@ -0,0 +1,623 @@
+/*
+ * P2041 Silicon Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+
+/ {
+ compatible = "fsl,P2041";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ ccsr = &soc;
+
+ serial0 = &serial0;
+ serial1 = &serial1;
+ serial2 = &serial2;
+ serial3 = &serial3;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ pci2 = &pci2;
+ usb0 = &usb0;
+ usb1 = &usb1;
+ dma0 = &dma0;
+ dma1 = &dma1;
+ sdhc = &sdhc;
+ msi0 = &msi0;
+ msi1 = &msi1;
+ msi2 = &msi2;
+
+ crypto = &crypto;
+ sec_jr0 = &sec_jr0;
+ sec_jr1 = &sec_jr1;
+ sec_jr2 = &sec_jr2;
+ sec_jr3 = &sec_jr3;
+ rtic_a = &rtic_a;
+ rtic_b = &rtic_b;
+ rtic_c = &rtic_c;
+ rtic_d = &rtic_d;
+ sec_mon = &sec_mon;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: PowerPC,e500mc@0 {
+ device_type = "cpu";
+ reg = <0>;
+ next-level-cache = <&L2_0>;
+ L2_0: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu1: PowerPC,e500mc@1 {
+ device_type = "cpu";
+ reg = <1>;
+ next-level-cache = <&L2_1>;
+ L2_1: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu2: PowerPC,e500mc@2 {
+ device_type = "cpu";
+ reg = <2>;
+ next-level-cache = <&L2_2>;
+ L2_2: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ cpu3: PowerPC,e500mc@3 {
+ device_type = "cpu";
+ reg = <3>;
+ next-level-cache = <&L2_3>;
+ L2_3: l2-cache {
+ next-level-cache = <&cpc>;
+ };
+ };
+ };
+
+ soc: soc@ffe000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "simple-bus";
+ ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
+ reg = <0xf 0xfe000000 0 0x00001000>;
+
+ soc-sram-error {
+ compatible = "fsl,soc-sram-error";
+ interrupts = <16 2 1 29>;
+ };
+
+ corenet-law@0 {
+ compatible = "fsl,corenet-law";
+ reg = <0x0 0x1000>;
+ fsl,num-laws = <32>;
+ };
+
+ memory-controller@8000 {
+ compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller";
+ reg = <0x8000 0x1000>;
+ interrupts = <16 2 1 23>;
+ };
+
+ cpc: l3-cache-controller@10000 {
+ compatible = "fsl,p2041-l3-cache-controller", "fsl,p4080-l3-cache-controller", "cache";
+ reg = <0x10000 0x1000>;
+ interrupts = <16 2 1 27>;
+ };
+
+ corenet-cf@18000 {
+ compatible = "fsl,corenet-cf";
+ reg = <0x18000 0x1000>;
+ interrupts = <16 2 1 31>;
+ fsl,ccf-num-csdids = <32>;
+ fsl,ccf-num-snoopids = <32>;
+ };
+
+ iommu@20000 {
+ compatible = "fsl,pamu-v1.0", "fsl,pamu";
+ reg = <0x20000 0x4000>;
+ interrupts = <
+ 24 2 0 0
+ 16 2 1 30>;
+ };
+
+ mpic: pic@40000 {
+ clock-frequency = <0>;
+ interrupt-controller;
+ #address-cells = <0>;
+ #interrupt-cells = <4>;
+ reg = <0x40000 0x40000>;
+ compatible = "fsl,mpic", "chrp,open-pic";
+ device_type = "open-pic";
+ };
+
+ msi0: msi@41600 {
+ compatible = "fsl,mpic-msi";
+ reg = <0x41600 0x200>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xe0 0 0 0
+ 0xe1 0 0 0
+ 0xe2 0 0 0
+ 0xe3 0 0 0
+ 0xe4 0 0 0
+ 0xe5 0 0 0
+ 0xe6 0 0 0
+ 0xe7 0 0 0>;
+ };
+
+ msi1: msi@41800 {
+ compatible = "fsl,mpic-msi";
+ reg = <0x41800 0x200>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xe8 0 0 0
+ 0xe9 0 0 0
+ 0xea 0 0 0
+ 0xeb 0 0 0
+ 0xec 0 0 0
+ 0xed 0 0 0
+ 0xee 0 0 0
+ 0xef 0 0 0>;
+ };
+
+ msi2: msi@41a00 {
+ compatible = "fsl,mpic-msi";
+ reg = <0x41a00 0x200>;
+ msi-available-ranges = <0 0x100>;
+ interrupts = <
+ 0xf0 0 0 0
+ 0xf1 0 0 0
+ 0xf2 0 0 0
+ 0xf3 0 0 0
+ 0xf4 0 0 0
+ 0xf5 0 0 0
+ 0xf6 0 0 0
+ 0xf7 0 0 0>;
+ };
+
+ guts: global-utilities@e0000 {
+ compatible = "fsl,qoriq-device-config-1.0";
+ reg = <0xe0000 0xe00>;
+ fsl,has-rstcr;
+ #sleep-cells = <1>;
+ fsl,liodn-bits = <12>;
+ };
+
+ pins: global-utilities@e0e00 {
+ compatible = "fsl,qoriq-pin-control-1.0";
+ reg = <0xe0e00 0x200>;
+ #sleep-cells = <2>;
+ };
+
+ clockgen: global-utilities@e1000 {
+ compatible = "fsl,p2041-clockgen", "fsl,qoriq-clockgen-1.0";
+ reg = <0xe1000 0x1000>;
+ clock-frequency = <0>;
+ };
+
+ rcpm: global-utilities@e2000 {
+ compatible = "fsl,qoriq-rcpm-1.0";
+ reg = <0xe2000 0x1000>;
+ #sleep-cells = <1>;
+ };
+
+ sfp: sfp@e8000 {
+ compatible = "fsl,p2041-sfp", "fsl,qoriq-sfp-1.0";
+ reg = <0xe8000 0x1000>;
+ };
+
+ serdes: serdes@ea000 {
+ compatible = "fsl,p2041-serdes";
+ reg = <0xea000 0x1000>;
+ };
+
+ dma0: dma@100300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p2041-dma", "fsl,eloplus-dma";
+ reg = <0x100300 0x4>;
+ ranges = <0x0 0x100100 0x200>;
+ cell-index = <0>;
+ dma-channel@0 {
+ compatible = "fsl,p2041-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupts = <28 2 0 0>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,p2041-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupts = <29 2 0 0>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,p2041-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupts = <30 2 0 0>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,p2041-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupts = <31 2 0 0>;
+ };
+ };
+
+ dma1: dma@101300 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p2041-dma", "fsl,eloplus-dma";
+ reg = <0x101300 0x4>;
+ ranges = <0x0 0x101100 0x200>;
+ cell-index = <1>;
+ dma-channel@0 {
+ compatible = "fsl,p2041-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x0 0x80>;
+ cell-index = <0>;
+ interrupts = <32 2 0 0>;
+ };
+ dma-channel@80 {
+ compatible = "fsl,p2041-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x80 0x80>;
+ cell-index = <1>;
+ interrupts = <33 2 0 0>;
+ };
+ dma-channel@100 {
+ compatible = "fsl,p2041-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x100 0x80>;
+ cell-index = <2>;
+ interrupts = <34 2 0 0>;
+ };
+ dma-channel@180 {
+ compatible = "fsl,p2041-dma-channel",
+ "fsl,eloplus-dma-channel";
+ reg = <0x180 0x80>;
+ cell-index = <3>;
+ interrupts = <35 2 0 0>;
+ };
+ };
+
+ spi@110000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,p2041-espi", "fsl,mpc8536-espi";
+ reg = <0x110000 0x1000>;
+ interrupts = <53 0x2 0 0>;
+ fsl,espi-num-chipselects = <4>;
+ };
+
+ sdhc: sdhc@114000 {
+ compatible = "fsl,p2041-esdhc", "fsl,esdhc";
+ reg = <0x114000 0x1000>;
+ interrupts = <48 2 0 0>;
+ sdhci,auto-cmd12;
+ clock-frequency = <0>;
+ };
+
+ i2c@118000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <0>;
+ compatible = "fsl-i2c";
+ reg = <0x118000 0x100>;
+ interrupts = <38 2 0 0>;
+ dfsrr;
+ };
+
+ i2c@118100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <1>;
+ compatible = "fsl-i2c";
+ reg = <0x118100 0x100>;
+ interrupts = <38 2 0 0>;
+ dfsrr;
+ };
+
+ i2c@119000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <2>;
+ compatible = "fsl-i2c";
+ reg = <0x119000 0x100>;
+ interrupts = <39 2 0 0>;
+ dfsrr;
+ };
+
+ i2c@119100 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ cell-index = <3>;
+ compatible = "fsl-i2c";
+ reg = <0x119100 0x100>;
+ interrupts = <39 2 0 0>;
+ dfsrr;
+ };
+
+ serial0: serial@11c500 {
+ cell-index = <0>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x11c500 0x100>;
+ clock-frequency = <0>;
+ interrupts = <36 2 0 0>;
+ };
+
+ serial1: serial@11c600 {
+ cell-index = <1>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x11c600 0x100>;
+ clock-frequency = <0>;
+ interrupts = <36 2 0 0>;
+ };
+
+ serial2: serial@11d500 {
+ cell-index = <2>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x11d500 0x100>;
+ clock-frequency = <0>;
+ interrupts = <37 2 0 0>;
+ };
+
+ serial3: serial@11d600 {
+ cell-index = <3>;
+ device_type = "serial";
+ compatible = "ns16550";
+ reg = <0x11d600 0x100>;
+ clock-frequency = <0>;
+ interrupts = <37 2 0 0>;
+ };
+
+ gpio0: gpio@130000 {
+ compatible = "fsl,p2041-gpio", "fsl,qoriq-gpio";
+ reg = <0x130000 0x1000>;
+ interrupts = <55 2 0 0>;
+ #gpio-cells = <2>;
+ gpio-controller;
+ };
+
+ usb0: usb@210000 {
+ compatible = "fsl,p2041-usb2-mph",
+ "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
+ reg = <0x210000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <44 0x2 0 0>;
+ phy_type = "utmi";
+ port0;
+ };
+
+ usb1: usb@211000 {
+ compatible = "fsl,p2041-usb2-dr",
+ "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
+ reg = <0x211000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ interrupts = <45 0x2 0 0>;
+ phy_type = "utmi";
+ };
+
+ sata@220000 {
+ compatible = "fsl,p2041-sata", "fsl,pq-sata-v2";
+ reg = <0x220000 0x1000>;
+ interrupts = <68 0x2 0 0>;
+ };
+
+ sata@221000 {
+ compatible = "fsl,p2041-sata", "fsl,pq-sata-v2";
+ reg = <0x221000 0x1000>;
+ interrupts = <69 0x2 0 0>;
+ };
+
+ crypto: crypto@300000 {
+ compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x300000 0x10000>;
+ ranges = <0 0x300000 0x10000>;
+ interrupts = <92 2 0 0>;
+
+ sec_jr0: jr@1000 {
+ compatible = "fsl,sec-v4.2-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x1000 0x1000>;
+ interrupts = <88 2 0 0>;
+ };
+
+ sec_jr1: jr@2000 {
+ compatible = "fsl,sec-v4.2-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x2000 0x1000>;
+ interrupts = <89 2 0 0>;
+ };
+
+ sec_jr2: jr@3000 {
+ compatible = "fsl,sec-v4.2-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x3000 0x1000>;
+ interrupts = <90 2 0 0>;
+ };
+
+ sec_jr3: jr@4000 {
+ compatible = "fsl,sec-v4.2-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x4000 0x1000>;
+ interrupts = <91 2 0 0>;
+ };
+
+ rtic@6000 {
+ compatible = "fsl,sec-v4.2-rtic",
+ "fsl,sec-v4.0-rtic";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x6000 0x100>;
+ ranges = <0x0 0x6100 0xe00>;
+
+ rtic_a: rtic-a@0 {
+ compatible = "fsl,sec-v4.2-rtic-memory",
+ "fsl,sec-v4.0-rtic-memory";
+ reg = <0x00 0x20 0x100 0x80>;
+ };
+
+ rtic_b: rtic-b@20 {
+ compatible = "fsl,sec-v4.2-rtic-memory",
+ "fsl,sec-v4.0-rtic-memory";
+ reg = <0x20 0x20 0x200 0x80>;
+ };
+
+ rtic_c: rtic-c@40 {
+ compatible = "fsl,sec-v4.2-rtic-memory",
+ "fsl,sec-v4.0-rtic-memory";
+ reg = <0x40 0x20 0x300 0x80>;
+ };
+
+ rtic_d: rtic-d@60 {
+ compatible = "fsl,sec-v4.2-rtic-memory",
+ "fsl,sec-v4.0-rtic-memory";
+ reg = <0x60 0x20 0x500 0x80>;
+ };
+ };
+ };
+
+ sec_mon: sec_mon@314000 {
+ compatible = "fsl,sec-v4.2-mon", "fsl,sec-v4.0-mon";
+ reg = <0x314000 0x1000>;
+ interrupts = <93 2 0 0>;
+ };
+
+ };
+
+ localbus@ffe124000 {
+ compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus";
+ interrupts = <25 2 0 0>;
+ #address-cells = <2>;
+ #size-cells = <1>;
+ };
+
+ pci0: pcie@ffe200000 {
+ compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0x0 0xff>;
+ clock-frequency = <33333333>;
+ fsl,msi = <&msi0>;
+ interrupts = <16 2 1 15>;
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <16 2 1 15>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 40 1 0 0
+ 0000 0 0 2 &mpic 1 1 0 0
+ 0000 0 0 3 &mpic 2 1 0 0
+ 0000 0 0 4 &mpic 3 1 0 0
+ >;
+ };
+ };
+
+ pci1: pcie@ffe201000 {
+ compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0 0xff>;
+ clock-frequency = <33333333>;
+ fsl,msi = <&msi1>;
+ interrupts = <16 2 1 14>;
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <16 2 1 14>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 41 1 0 0
+ 0000 0 0 2 &mpic 5 1 0 0
+ 0000 0 0 3 &mpic 6 1 0 0
+ 0000 0 0 4 &mpic 7 1 0 0
+ >;
+ };
+ };
+
+ pci2: pcie@ffe202000 {
+ compatible = "fsl,p2041-pcie", "fsl,qoriq-pcie-v2.2";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0x0 0xff>;
+ clock-frequency = <33333333>;
+ fsl,msi = <&msi2>;
+ interrupts = <16 2 1 13>;
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <16 2 1 13>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0 0 1 &mpic 42 1 0 0
+ 0000 0 0 2 &mpic 9 1 0 0
+ 0000 0 0 3 &mpic 10 1 0 0
+ 0000 0 0 4 &mpic 11 1 0 0
+ >;
+ };
+ };
+};
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 4311d02..49cfe85 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -23,7 +23,7 @@ CONFIG_MODULE_UNLOAD=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MODVERSIONS=y
# CONFIG_BLK_DEV_BSG is not set
-CONFIG_P2040_RDB=y
+CONFIG_P2041_RDB=y
CONFIG_P3041_DS=y
CONFIG_P4080_DS=y
CONFIG_P5020_DS=y
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 498534c..ae82322 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -171,8 +171,8 @@ config SBC8560
help
This option enables support for the Wind River SBC8560 board
-config P2040_RDB
- bool "Freescale P2040 RDB"
+config P2041_RDB
+ bool "Freescale P2041 RDB"
select DEFAULT_UIMAGE
select PPC_E500MC
select PHYS_64BIT
@@ -181,7 +181,7 @@ config P2040_RDB
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
help
- This option enables support for the P2040 RDB board
+ This option enables support for the P2041 RDB board
config P3041_DS
bool "Freescale P3041 DS"
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index a971b32..39e6c22 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -13,7 +13,7 @@ obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
obj-$(CONFIG_P1010_RDB) += p1010rdb.o
obj-$(CONFIG_P1022_DS) += p1022_ds.o
obj-$(CONFIG_P1023_RDS) += p1023_rds.o
-obj-$(CONFIG_P2040_RDB) += p2040_rdb.o corenet_ds.o
+obj-$(CONFIG_P2041_RDB) += p2041_rdb.o corenet_ds.o
obj-$(CONFIG_P3041_DS) += p3041_ds.o corenet_ds.o
obj-$(CONFIG_P4080_DS) += p4080_ds.o corenet_ds.o
obj-$(CONFIG_P5020_DS) += p5020_ds.o corenet_ds.o
diff --git a/arch/powerpc/platforms/85xx/p2040_rdb.c b/arch/powerpc/platforms/85xx/p2040_rdb.c
deleted file mode 100644
index 32b56ac..0000000
--- a/arch/powerpc/platforms/85xx/p2040_rdb.c
+++ /dev/null
@@ -1,88 +0,0 @@
-/*
- * P2040 RDB Setup
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/delay.h>
-#include <linux/interrupt.h>
-#include <linux/phy.h>
-
-#include <asm/system.h>
-#include <asm/time.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <mm/mmu_decl.h>
-#include <asm/prom.h>
-#include <asm/udbg.h>
-#include <asm/mpic.h>
-
-#include <linux/of_platform.h>
-#include <sysdev/fsl_soc.h>
-#include <sysdev/fsl_pci.h>
-#include <asm/ehv_pic.h>
-
-#include "corenet_ds.h"
-
-/*
- * Called very early, device-tree isn't unflattened
- */
-static int __init p2040_rdb_probe(void)
-{
- unsigned long root = of_get_flat_dt_root();
-#ifdef CONFIG_SMP
- extern struct smp_ops_t smp_85xx_ops;
-#endif
-
- if (of_flat_dt_is_compatible(root, "fsl,P2040RDB"))
- return 1;
-
- /* Check if we're running under the Freescale hypervisor */
- if (of_flat_dt_is_compatible(root, "fsl,P2040RDB-hv")) {
- ppc_md.init_IRQ = ehv_pic_init;
- ppc_md.get_irq = ehv_pic_get_irq;
- ppc_md.restart = fsl_hv_restart;
- ppc_md.power_off = fsl_hv_halt;
- ppc_md.halt = fsl_hv_halt;
-#ifdef CONFIG_SMP
- /*
- * Disable the timebase sync operations because we can't write
- * to the timebase registers under the hypervisor.
- */
- smp_85xx_ops.give_timebase = NULL;
- smp_85xx_ops.take_timebase = NULL;
-#endif
- return 1;
- }
-
- return 0;
-}
-
-define_machine(p2040_rdb) {
- .name = "P2040 RDB",
- .probe = p2040_rdb_probe,
- .setup_arch = corenet_ds_setup_arch,
- .init_IRQ = corenet_ds_pic_init,
-#ifdef CONFIG_PCI
- .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
-#endif
- .get_irq = mpic_get_coreint_irq,
- .restart = fsl_rstcr_restart,
- .calibrate_decr = generic_calibrate_decr,
- .progress = udbg_progress,
- .power_save = e500_idle,
-};
-
-machine_device_initcall(p2040_rdb, corenet_ds_publish_devices);
-
-#ifdef CONFIG_SWIOTLB
-machine_arch_initcall(p2040_rdb, swiotlb_setup_bus_notifier);
-#endif
diff --git a/arch/powerpc/platforms/85xx/p2041_rdb.c b/arch/powerpc/platforms/85xx/p2041_rdb.c
new file mode 100644
index 0000000..eda6ed5
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/p2041_rdb.c
@@ -0,0 +1,88 @@
+/*
+ * P2041 RDB Setup
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/phy.h>
+
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+
+#include <linux/of_platform.h>
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include <asm/ehv_pic.h>
+
+#include "corenet_ds.h"
+
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init p2041_rdb_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+#ifdef CONFIG_SMP
+ extern struct smp_ops_t smp_85xx_ops;
+#endif
+
+ if (of_flat_dt_is_compatible(root, "fsl,P2041RDB"))
+ return 1;
+
+ /* Check if we're running under the Freescale hypervisor */
+ if (of_flat_dt_is_compatible(root, "fsl,P2041RDB-hv")) {
+ ppc_md.init_IRQ = ehv_pic_init;
+ ppc_md.get_irq = ehv_pic_get_irq;
+ ppc_md.restart = fsl_hv_restart;
+ ppc_md.power_off = fsl_hv_halt;
+ ppc_md.halt = fsl_hv_halt;
+#ifdef CONFIG_SMP
+ /*
+ * Disable the timebase sync operations because we can't write
+ * to the timebase registers under the hypervisor.
+ */
+ smp_85xx_ops.give_timebase = NULL;
+ smp_85xx_ops.take_timebase = NULL;
+#endif
+ return 1;
+ }
+
+ return 0;
+}
+
+define_machine(p2041_rdb) {
+ .name = "P2041 RDB",
+ .probe = p2041_rdb_probe,
+ .setup_arch = corenet_ds_setup_arch,
+ .init_IRQ = corenet_ds_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_coreint_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+ .power_save = e500_idle,
+};
+
+machine_device_initcall(p2041_rdb, corenet_ds_publish_devices);
+
+#ifdef CONFIG_SWIOTLB
+machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier);
+#endif
--
1.7.3.4
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