* Re: [PATCH v3 2/3] hvc_init(): Enforce one-time initialization.
From: Rusty Russell @ 2011-11-11 4:30 UTC (permalink / raw)
To: Miche Baker-Harvey, Greg Kroah-Hartman
Cc: Stephen Rothwell, xen-devel, Konrad Rzeszutek Wilk, linux-kernel,
virtualization, Anton Blanchard, Amit Shah, Mike Waychison,
ppc-dev, Eric Northrup
In-Reply-To: <20111108214504.28884.61814.stgit@miche.sea.corp.google.com>
On Tue, 08 Nov 2011 13:45:04 -0800, Miche Baker-Harvey <miche@google.com> wrote:
> hvc_init() must only be called once, and no thread should continue with hvc_alloc()
> until after initialization is complete. The original code does not enforce either
> of these requirements. A new mutex limits entry to hvc_init() to a single thread,
> and blocks all later comers until it has completed.
>
> This patch fixes multiple crash symptoms.
No, it doesn't: not now your previous double-hvc_init patch has been
reverted.
It's easy to show this is the case though: replace mutex_lock() with:
if (!mutex_trylock()) {
WARN(1, "hvc_console: mutex is stopping us!\n");
mutex_lock();
}
If you get that warning, then your mutex is doing something.
Thanks,
Rusty.
^ permalink raw reply
* Re: [RFC PATCH 00/17] powerpc/e500: separate e500 from e500mc
From: Benjamin Herrenschmidt @ 2011-11-11 4:40 UTC (permalink / raw)
To: Moffett, Kyle D
Cc: Timur Tabi, linux-kernel@vger.kernel.org, Paul Gortmaker,
Scott Wood, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <15AB1C61-181F-4454-AF99-772B73DE0AA5@boeing.com>
On Thu, 2011-11-10 at 18:38 -0600, Moffett, Kyle D wrote:
> Ok, so I've been poking around this code a bunch and as far as I can
> tell, the cacheline stuff has basically always been subtly wrong in
> twelve different ways and it's only largely coincidence that it works
> today.
Yay ! Somebody to clean that shit up ! :-)
That's the biggest missing step to being able to have 440 and 476 in a
single binary :-)
> So PowerPC64 systems have their own "ppc64_caches" structure set up
> before start_kernel() is called by parsing the OpenFirmware "cpu" nodes.
> That structure is then checked in every piece of 64-bit kernel code
> (except xmon) that uses the "dcbXX" and "icbXX" opcodes.
Yup. (And we should really fix xmon btw...)
> There is an entirely separate mechanism built into the "cputable" that
> is used on all PowerPC systems to compute cacheline sizes to pass in via
> ELF headers for userspace to use in memset()/memcpy(), etc.
Yeah well, it actually uses global variables which are set from cputable
on ppc32 and from the ppc64_caches structure on ppc64. Yeah it's not
pretty.
> Furthermore, the VDSO gets cacheline sizes stored into it, but on 64-bit
> they come from the ppc64_caches structure and on 32-bit they come from
> dcache_bsize/icache_bsize copied from the cputable.
Yup.
> Then there's the value in arch/powerpc/include/asm/cache.h which is used
> throughout the kernel to figure out how far apart to space CPU-specific
> datastructures (EG: __cacheline_aligned_on_smp).
Not much we can do about that one since it has to be compile time. Maybe
something like calculating the biggest cache line size supported by all
built-in processor types ?
> Despite the fact that all PPC64 have an "L1_CACHE_SIZE" value of 128,
> the PowerPC A2 and e5500 have {d,i}cache_bsize values of 64 in cputable
> and presumably also get correct values from OpenFirmware, so the bogus
> constant in asm/cache.h does nothing more than waste a bit of memory
> for unnecessary padding.
More or less yes, though we haven't totally given up on the idea of
eventually, one day, produce binaries capable of running both 64-bit S
and E :-)
> Unfortunately, lots of PPC32 assembly pretends that the value found in
> asm/cache.h is a hard truth and uses it for "dcbz", etc, which is why
> there are all of those ugly #ifdefs in asm/cache.h
Yes, well... -some- assembly, mostly the copy routines. It's been the
main reason why this hasn't been fixed yet.
> Based on all of that, my proposal is going to be a patch which does the
> following:
>
> (1) Conditionally set L1_CACHE_SHIFT to the maximum value used by any
> platform being compiled in for alignment purposes.
Yay !
> (2) Make the ppc64_caches struct apply to ppc32 as well, and
> preinitialize it with a minimum value used by any platform being
> compiled in (for "dcbXX"/"icbXX" purposes). This is safe because
> the pagesize is always a multiple of the cache block size and the
> kernel only uses dcbXX/icbXX on whole pages. The only impact is a
> temporary small performance hit from flushing or zeroing the same
> block 8 times if too small.
Are you sure about dcbz ? Getting that wrong can be deadly ... I'd
rather get rid of some fancy optims and use a soft value in some cases.
That or we can compile multiple variants for the common case of some of
the copy routines and use patching (alternate sections) to branch to the
right one at runtime, at least for the common cases (32 and 128 for
example for 440 and 476).
> (3) Try to initialize the ppc_caches struct on ppc32 from the
> OpenFirmware device-tree. If that fails, then use the values we
> find in the cputable. After this is initialized any performance
> hit in copy_page()/zero_page() will obviously disappear.
>
> (4) Fix all of the PPC32 assembly code that is misusing L1_CACHE_SHIFT
> to use the ppc_caches struct instead.
Yes. This could be done while keeping the hand-optimized stuff by
compiling several variants of it.
> Does that sound like a reasonable approach?
It absolutely does ! Thanks for looking at that, it's been on my todo
list for ages and I've been always finding good reasons to do something
else instead :-)
Cheers,
Ben.
> Cheers,
> Kyle Moffett
>
> --
> Curious about my work on the Debian powerpcspe port?
> I'm keeping a blog here: http://pureperl.blogspot.com/
^ permalink raw reply
* Re: [RFC PATCH 08/17] powerpc/e500: Remove conditional "lwsync" substitution
From: Benjamin Herrenschmidt @ 2011-11-11 4:43 UTC (permalink / raw)
To: Moffett, Kyle D
Cc: Baruch Siach, Timur Tabi, linux-kernel@vger.kernel.org,
Paul Gortmaker, Paul Mackerras, Scott Wood,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <4567A1A9-51D2-4D21-9080-BD3D78901C1D@boeing.com>
On Thu, 2011-11-10 at 14:27 -0600, Moffett, Kyle D wrote:
>
> Does this mean that PPC_BOOK3E_64 needs to be split into two separate
> Book 3-III families the same way that 32-bit has been split? Is there
> another way around it?
No, I don't want more split, on the contrary.
Cheers,
Ben.
^ permalink raw reply
* Re: [RFC PATCH 08/17] powerpc/e500: Remove conditional "lwsync" substitution
From: Benjamin Herrenschmidt @ 2011-11-11 4:45 UTC (permalink / raw)
To: Kumar Gala
Cc: Baruch Siach, Timur Tabi, linux-kernel@vger.kernel.org,
Paul Gortmaker, Paul Mackerras, Moffett, Kyle D, Scott Wood,
linuxppc-dev@lists.ozlabs.org
In-Reply-To: <FCE81732-AD2B-4EF2-BC31-E24D0F9D41A9@kernel.crashing.org>
On Thu, 2011-11-10 at 14:34 -0600, Kumar Gala wrote:
> No idea, we have to ask Ben how much he cares. I don't see any FSL
> customers pushing us to run the same kernel on A2 and P5020 (or future
> FSL devices).
I do care. For example, imagine somebody wanting to support an
enterprise distro on both BG/Q and some FSL based HW ...
Besides, this has generally forced us to do things more cleanly and I
don't want to go back into #ifdef land. These cores are both arch 2.06 E
compilant, there is no good reason to prevent or forbid having them
build into a single binary image.
Look at the mess ARM got into and the pain they are having getting out
of with that stuff ... No way I'm going backward with split configs. If
anything, I'd like to reconcile things even more.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc: Export PIR data through sysfs
From: Ananth N Mavinakayanahalli @ 2011-11-11 4:47 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Scott Wood, linuxppc-dev, Anton Blanchard, mahesh
In-Reply-To: <1320985094.21206.35.camel@pasglop>
On Fri, Nov 11, 2011 at 03:18:14PM +1100, Benjamin Herrenschmidt wrote:
> On Thu, 2011-11-10 at 14:18 +0530, Ananth N Mavinakayanahalli wrote:
>
> >
> > From: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
> >
> > The Processor Identification Register (PIR) on some powerpc platforms
> > provides information to decode the processor identification tag.
> > Decoding this information is platform specific.
> >
> > We currently need this information for POWERx processors and hence
> > follows a similar model as adopted for the other POWERx specific
> > features.
>
> At this rate we're going to end up with no bits left for CPU features
> way too quickly... Especially for something we only care about once at
> boot time.
>
> Wouldn't CPU_FTR_PPCAS_ARCH_V2 be a good enough test ?
/me checks Cell manuals... yes, that test would be good enough. I will
cook up a patch to use this.
> Can you tell us a bit more about the real use for that feature ? I still
> don't see what's the point of getting the underlying HW ID.
This is a requirement from the hardware system test folks for use with
their core, node and thread tests.
Ananth
^ permalink raw reply
* Re: [RFC PATCH 02/17] powerpc: Split up PHYS_64BIT config option to fix "select" issues
From: Benjamin Herrenschmidt @ 2011-11-11 4:50 UTC (permalink / raw)
To: Timur Tabi
Cc: Baruch Siach, Sonny Rao, linux-kernel@vger.kernel.org,
Paul Gortmaker, Paul Mackerras, Moffett, Kyle D, Scott Wood,
Anatolij Gustschin, linuxppc-dev@lists.ozlabs.org, Paul Bolle
In-Reply-To: <4EBC00D2.2030208@freescale.com>
On Thu, 2011-11-10 at 10:50 -0600, Timur Tabi wrote:
> I'm not sure that Kconfig rule is enforceable. We use 'select' all the time to make sure that our boards enable the options that need to be enabled. I'd rather see this:
>
> config X
> select A
>
> config Y
> select A
>
> config Z
> select A
>
> than this:
>
> config A
> default y if X | Y | Z
>
> The former is more maintainable and does not allow the option of disabling "A" if someone wants "X".
This is fine as long as config A is not a user selectable option.
We do the wrong thing in a few places (i2c comes to mind) and we should
most certainly consider fixing it. Some of the solution is to move some
select's to defconfigs, some is to do things the way Kyle proposed.
For PHYS_64BIT, I'm not 100% certain at this point what the best
approach it. It should clearly be fixed and hidden for real 64-bit. As
for the rest, should it be user selectable ? I tend to think it should
be fixed & selected by the board config and keep it that way, avoiding
the user question entirely... but you may have good reasons to want to
keep it around.
Cheers,
Ben.
^ permalink raw reply
* [PATCH V2] powerpc: Export PIR data through sysfs
From: Ananth N Mavinakayanahalli @ 2011-11-11 5:58 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Scott Wood, linuxppc-dev, Anton Blanchard, mahesh
In-Reply-To: <20111111044755.GA19107@in.ibm.com>
On Fri, Nov 11, 2011 at 10:17:55AM +0530, Ananth N Mavinakayanahalli wrote:
> >
> > At this rate we're going to end up with no bits left for CPU features
> > way too quickly... Especially for something we only care about once at
> > boot time.
> >
> > Wouldn't CPU_FTR_PPCAS_ARCH_V2 be a good enough test ?
>
> /me checks Cell manuals... yes, that test would be good enough. I will
> cook up a patch to use this.
Here it is...
---
From: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
The Processor Identification Register (PIR) on some powerpc platforms
provides information to decode the processor identification tag that
can be used for node/core/thread affinity tests and for debugging.
Decoding this information is platform specific.
Export PIR contents through sysfs.
[V2] Use CPU_FTR_PPCAS_ARCH_V2 as a test for PIR's presence per
BenH's suggestion.
Signed-off-by: Ananth N Mavinakayanahalli <ananth@in.ibm.com>
---
arch/powerpc/kernel/sysfs.c | 8 ++++++++
1 file changed, 8 insertions(+)
Index: linux-3.2-rc1/arch/powerpc/kernel/sysfs.c
===================================================================
--- linux-3.2-rc1.orig/arch/powerpc/kernel/sysfs.c
+++ linux-3.2-rc1/arch/powerpc/kernel/sysfs.c
@@ -177,11 +177,13 @@ SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
SYSFS_PMCSETUP(purr, SPRN_PURR);
SYSFS_PMCSETUP(spurr, SPRN_SPURR);
SYSFS_PMCSETUP(dscr, SPRN_DSCR);
+SYSFS_PMCSETUP(pir, SPRN_PIR);
static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL);
static SYSDEV_ATTR(dscr, 0600, show_dscr, store_dscr);
static SYSDEV_ATTR(purr, 0600, show_purr, store_purr);
+static SYSDEV_ATTR(pir, 0400, show_pir, NULL);
unsigned long dscr_default = 0;
EXPORT_SYMBOL(dscr_default);
@@ -392,6 +394,9 @@ static void __cpuinit register_cpu_onlin
if (cpu_has_feature(CPU_FTR_DSCR))
sysdev_create_file(s, &attr_dscr);
+
+ if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
+ sysdev_create_file(s, &attr_pir);
#endif /* CONFIG_PPC64 */
cacheinfo_cpu_online(cpu);
@@ -462,6 +467,9 @@ static void unregister_cpu_online(unsign
if (cpu_has_feature(CPU_FTR_DSCR))
sysdev_remove_file(s, &attr_dscr);
+
+ if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
+ sysdev_remove_file(s, &attr_pir);
#endif /* CONFIG_PPC64 */
cacheinfo_cpu_offline(cpu);
^ permalink raw reply
* [PATCH] usb/fsl_udc: fix dequeuing a request in progress
From: Li Yang @ 2011-11-11 12:38 UTC (permalink / raw)
To: balbi, gregkh; +Cc: linux-usb, linuxppc-dev
The original implementation of dequeuing a request in progress
is not correct. Change to use a correct process and also clean
up the related functions a little bit.
Signed-off-by: Li Yang <leoli@freescale.com>
---
drivers/usb/gadget/fsl_udc_core.c | 62 +++++++++++++++++-------------------
1 files changed, 29 insertions(+), 33 deletions(-)
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
index b2c44e1..beef9b7 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -696,12 +696,31 @@ static void fsl_free_request(struct usb_ep *_ep, struct usb_request *_req)
kfree(req);
}
-/*-------------------------------------------------------------------------*/
+/* Actually add a dTD chain to an empty dQH and let go */
+static void fsl_prime_ep(struct fsl_ep *ep, struct ep_td_struct *td)
+{
+ struct ep_queue_head *qh = ep->qh;
+
+ /* Write dQH next pointer and terminate bit to 0 */
+ qh->next_dtd_ptr = cpu_to_hc32(td->td_dma
+ & EP_QUEUE_HEAD_NEXT_POINTER_MASK);
+
+ /* Clear active and halt bit */
+ qh->size_ioc_int_sts &= cpu_to_hc32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
+ | EP_QUEUE_HEAD_STATUS_HALT));
+
+ /* Ensure that updates to the QH will occur before priming. */
+ wmb();
+
+ /* Prime endpoint by writing correct bit to ENDPTPRIME */
+ fsl_writel(ep_is_in(ep) ? (1 << (ep_index(ep) + 16))
+ : (1 << (ep_index(ep))), &dr_regs->endpointprime);
+}
+
+/* Add dTD chain to the dQH of an EP */
static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
{
- int i = ep_index(ep) * 2 + ep_is_in(ep);
u32 temp, bitmask, tmp_stat;
- struct ep_queue_head *dQH = &ep->udc->ep_qh[i];
/* VDBG("QH addr Register 0x%8x", dr_regs->endpointlistaddr);
VDBG("ep_qh[%d] addr is 0x%8x", i, (u32)&(ep->udc->ep_qh[i])); */
@@ -719,7 +738,7 @@ static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
cpu_to_hc32(req->head->td_dma & DTD_ADDR_MASK);
/* Read prime bit, if 1 goto done */
if (fsl_readl(&dr_regs->endpointprime) & bitmask)
- goto out;
+ return;
do {
/* Set ATDTW bit in USBCMD */
@@ -736,28 +755,10 @@ static void fsl_queue_td(struct fsl_ep *ep, struct fsl_req *req)
fsl_writel(temp & ~USB_CMD_ATDTW, &dr_regs->usbcmd);
if (tmp_stat)
- goto out;
+ return;
}
- /* Write dQH next pointer and terminate bit to 0 */
- temp = req->head->td_dma & EP_QUEUE_HEAD_NEXT_POINTER_MASK;
- dQH->next_dtd_ptr = cpu_to_hc32(temp);
-
- /* Clear active and halt bit */
- temp = cpu_to_hc32(~(EP_QUEUE_HEAD_STATUS_ACTIVE
- | EP_QUEUE_HEAD_STATUS_HALT));
- dQH->size_ioc_int_sts &= temp;
-
- /* Ensure that updates to the QH will occur before priming. */
- wmb();
-
- /* Prime endpoint by writing 1 to ENDPTPRIME */
- temp = ep_is_in(ep)
- ? (1 << (ep_index(ep) + 16))
- : (1 << (ep_index(ep)));
- fsl_writel(temp, &dr_regs->endpointprime);
-out:
- return;
+ fsl_prime_ep(ep, req->head);
}
/* Fill in the dTD structure
@@ -973,25 +974,20 @@ static int fsl_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
/* The request isn't the last request in this ep queue */
if (req->queue.next != &ep->queue) {
- struct ep_queue_head *qh;
struct fsl_req *next_req;
- qh = ep->qh;
next_req = list_entry(req->queue.next, struct fsl_req,
queue);
- /* Point the QH to the first TD of next request */
- fsl_writel((u32) next_req->head, &qh->curr_dtd_ptr);
+ /* prime with dTD of next request */
+ fsl_prime_ep(ep, next_req->head);
}
-
- /* The request hasn't been processed, patch up the TD chain */
+ /* The request hasn't been processed, patch up the TD chain */
} else {
struct fsl_req *prev_req;
prev_req = list_entry(req->queue.prev, struct fsl_req, queue);
- fsl_writel(fsl_readl(&req->tail->next_td_ptr),
- &prev_req->tail->next_td_ptr);
-
+ prev_req->tail->next_td_ptr = req->tail->next_td_ptr;
}
done(ep, req, -ECONNRESET);
--
1.5.4.3
^ permalink raw reply related
* RE: [PATCH 2/7] powerpc/85xx: add HOTPLUG_CPU support
From: Zhao Chenhui-B35336 @ 2011-11-11 12:26 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <1320985376.21206.39.camel@pasglop>
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cmUoaW50IG5yKQ0KPiA+ICt7DQo+ID4gKwlfX2lvbWVtIHUzMiAqdmFkZHIsICpwaXJfdmFkZHI7
DQo+ID4gKwl1MzIgdmFsLCBjcHVfbWFzazsNCj4gPiArDQo+ID4gKwkvKiBJZiBDb3JlTmV0IHBs
YXRmb3JtLCB1c2UgQlJSIGFzIHJlbGVhc2UgcmVnaXN0ZXIuICovDQo+ID4gKwlpZiAoaXNfY29y
ZW5ldCkgew0KPiA+ICsJCWNwdV9tYXNrID0gMSA8PCBucjsNCj4gPiArCQl2YWRkciA9IGlvcmVt
YXAoZ2V0X2ltbXJiYXNlKCkgKyBNUEM4NXh4X0JSUl9PRkYsIDQpOw0KPiA+ICsJfSBlbHNlIHsN
Cj4gPiArCQljcHVfbWFzayA9IDEgPDwgKDI0ICsgbnIpOw0KPiA+ICsJCXZhZGRyID0gaW9yZW1h
cChnZXRfaW1tcmJhc2UoKSArIE1QQzg1eHhfRUNNX0VFQlBDUl9PRkYsIDQpOw0KPiA+ICsJfQ0K
PiANCj4gSW5zdGVhZCwgY2FuJ3QgeW91IGluc3RlYWQgaGF2ZSB0d28gZnVuY3Rpb25zIHVzaW5n
IGEgY29tbW9uIGhlbHBlciBhbmQNCj4gcGljay9ob29rIHRoZSByaWdodCBvbmUgPw0KPiANCj4g
QWxzbyBpbiB3aGF0IGNvbnRleHQgaXMgdGhhdCByZXNldF9jb3JlKCkgY2FsbGVkID8gRG9pbmcg
aW9yZW1hcCBpc24ndA0KPiBzb21ldGhpbmcgeW91IGNhbiBkbyBhdCBhbnkgcmFuZG9tIHRpbWUu
Li4NCj4gDQo+IENoZWVycywNCj4gQmVuLg0KPiANCj4gDQoNClRoYW5rcy4gSSB3aWxsIGZpeCB0
aGVtLg0KDQotY2hlbmh1aQ0KDQo=
^ permalink raw reply
* Re: [RFC PATCH 02/17] powerpc: Split up PHYS_64BIT config option to fix "select" issues
From: Tabi Timur-B04825 @ 2011-11-11 13:12 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: Wood Scott-B07421, Baruch Siach, Sonny Rao, Tabi Timur-B04825,
linux-kernel@vger.kernel.org, Paul Gortmaker, Paul Mackerras,
Moffett, Kyle D, Anatolij Gustschin,
linuxppc-dev@lists.ozlabs.org, Paul Bolle
In-Reply-To: <1320987054.21206.55.camel@pasglop>
Benjamin Herrenschmidt wrote:
> For PHYS_64BIT, I'm not 100% certain at this point what the best
> approach it. It should clearly be fixed and hidden for real 64-bit. As
> for the rest, should it be user selectable ?
I have been unable to convince our BSP teams that the minor performance=20
improvement of a 32-bit kernel vs 36-bit is not worth the hassle. We ship=
=20
a lot of lower-end e500 systems that will never have more than 2GB of memor=
y.
The P1022DS is an example. We ship 32-bit and 36-bit versions of U-Boot,=20
the kernel, and the device tree. I recently added code to U-boot to=20
detect if you have a mismatched U-Boot and device tree, because it is so=20
easy to mess that up. I would like nothing more than to abandon 32-bit=20
for all e500, but I don't see Freescale allowing that any time soon.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* [PATCH] fsl-rio: fix compile error
From: Liu Gang @ 2011-11-11 13:48 UTC (permalink / raw)
To: linuxppc-dev, Alexandre.Bounine
Cc: r58472, linux-kernel, r61911, paul.gortmaker, Liu Gang, akpm,
B11780
The "#include <linux/module.h>" was replaced by "#include <linux/export.h>"
in the patch "powerpc: various straight conversions from module.h --> export.h".
This will cause the following compile problem:
arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
arch/powerpc/sysdev/fsl_rio.c:296: error: implicit declaration of function 'search_exception_tables'.
The file fsl_rio.c needs the declaration of function "search_exception_tables"
in the header file "linux/module.h".
Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
---
arch/powerpc/sysdev/fsl_rio.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index de170fd..22ffccd 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -23,7 +23,7 @@
*/
#include <linux/init.h>
-#include <linux/export.h>
+#include <linux/module.h>
#include <linux/types.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
--
1.7.3.1
^ permalink raw reply related
* Re: [RFC][PATCH 08/30] powerpc/85xx: Rework P1020 SoC device tree
From: Scott Wood @ 2011-11-11 15:29 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev
In-Reply-To: <D0E6C17E-B79C-4EE5-ACC9-F46131AB9693@kernel.crashing.org>
On Thu, Nov 10, 2011 at 02:27:11PM -0600, Kumar Gala wrote:
> On Nov 10, 2011, at 12:58 PM, Scott Wood wrote:
> > On Thu, Nov 10, 2011 at 12:46:27PM -0600, Kumar Gala wrote:
> >> On Nov 10, 2011, at 12:05 PM, Scott Wood wrote:
> >>> What does the SoC part need to specify that has to override or go within
> >>> something the board specifies?
> >>
> >> Not sure I follow the question.
> >
> > My question is, why does the stuff in post need to be in post, versus pre?
> >
> > Why can't pre define the soc node, and let the board dts set ranges?
> > Likewise for localbus, pci, etc.
> >
> > -Scott
>
> Gotcha, the reason we have -pre and -post is because of how dtc include
> mechanism works. It builds it's tree in the order things are parsed in
> the file.
That doesn't really answer the question.
> In addition, "labeled nodes" like we have in post for 'soc', 'lbc',
> etc. have to be defined after they are referenced.
Don't you mean defined before they are referenced?
What's wrong with defining them in pre?
-Scott
^ permalink raw reply
* Disabling TCP slow start after idle
From: David Laight @ 2011-11-11 15:30 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel
We have some connections that suffer very badly from the TCP
'slow start' algorithm. These are connections that will
always be local - they may be MAC-Switch-MAC using RGMII
crossover, they might also be connected via an external
switch. In either case the RTT is most likely to be almost
zero, certainly below 1ms.
The traffic is single packets (carrying another protocol)
so we have Nagle disabled and the send and receive sides
run separately. So the traffic is neither bulk, nor
command/response.
This means that there is very rarely any unacked data,
so almost every packet is sent using 'slow start'.
If the external switch drops a packet (they do!) then
slow start stops more packets being sent, and nothing
progresses for about 1.5 seconds by which time there
is a significant amount of traffic queued and, in some
cases, data has to be discarded.
Similar issues happen if the receiving system decides
to defer the ack until a timer tick (instead of
sending one after every second packet). In this case
only 4 packets are sent. (We fixed this one be sending
a software ACK every 4 packets.)
Quite cleary the 'slow start' algorithm just doesn't
work in these cases.
I found this https://lkml.org/lkml/2010/4/9/427
discussion about a socket option to disable slow start.
But it seems that some people are completely against the idea.
I'd have thought that the global option would be more of a
problem - since that will affect ftp connections to remote
hosts where slow start is alomost certainly benefitial.
I'd have thought it would be sensible to allow one (or more)
of the following (either as a sysctl, socket option, or
code change):
1) Disable slow start for the local subnet.
2) Disable slow start for connections with very low RTT.
3) Disable slow start for a minimum period with no traffic
(after the last packet is acked).
I'm not sure of the resolution used by the Linux RTT
calculations. I know NetBSD had a recent set of patches
to fix calculation errors with low RTT because the code
had been written when all RTT were much longer.
David
(Copied to linuxppc-dev because I'm subscribed to it.)
^ permalink raw reply
* Re: [PATCH] fsl-rio: fix compile error
From: Paul Gortmaker @ 2011-11-11 15:48 UTC (permalink / raw)
To: Liu Gang
Cc: r58472, linux-kernel, r61911, Alexandre.Bounine, akpm,
linuxppc-dev, B11780
In-Reply-To: <1321019308-7785-1-git-send-email-Gang.Liu@freescale.com>
On 11-11-11 08:48 AM, Liu Gang wrote:
> The "#include <linux/module.h>" was replaced by "#include <linux/export.h>"
> in the patch "powerpc: various straight conversions from module.h --> export.h".
> This will cause the following compile problem:
> arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
> arch/powerpc/sysdev/fsl_rio.c:296: error: implicit declaration of function 'search_exception_tables'.
>
> The file fsl_rio.c needs the declaration of function "search_exception_tables"
> in the header file "linux/module.h".
Thanks -- not sure why this never showed up in my builds of all the
powerpc configs, _or_ the linux-next builds. Maybe srio isn't enabled
in any of them?
In any case it looks fine to me. Having the search_exception_tables
live in module.h seems odd, but that is an independent issue for later.
I can queue this unless someone else has already done so.
Paul.
>
> Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_rio.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
> index de170fd..22ffccd 100644
> --- a/arch/powerpc/sysdev/fsl_rio.c
> +++ b/arch/powerpc/sysdev/fsl_rio.c
> @@ -23,7 +23,7 @@
> */
>
> #include <linux/init.h>
> -#include <linux/export.h>
> +#include <linux/module.h>
> #include <linux/types.h>
> #include <linux/dma-mapping.h>
> #include <linux/interrupt.h>
^ permalink raw reply
* Re: [PATCH] powerpc kvm: fix kvmppc_start_thread() for CONFIG_SMP=N
From: Alexander Graf @ 2011-11-11 16:01 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, kvm-ppc, linuxppc-dev
In-Reply-To: <12283.1320977000@neuling.org>
On 11/11/2011 03:03 AM, Michael Neuling wrote:
> Currently kvmppc_start_thread() tries to wake other SMT threads via
> xics_wake_cpu(). Unfortunately xics_wake_cpu only exists when
> CONFIG_SMP=Y so when compiling with CONFIG_SMP=N we get:
>
> arch/powerpc/kvm/built-in.o: In function `.kvmppc_start_thread':
> book3s_hv.c:(.text+0xa1e0): undefined reference to `.xics_wake_cpu'
>
> The following should be fine since kvmppc_start_thread() shouldn't
> called to start non-zero threads when SMP=N since threads_per_core=1.
>
> Signed-off-by: Michael Neuling<mikey@neuling.org>
Thanks, applied to kvm-ppc-next. Please CC kvm-ppc@vger next time :).
Alex
^ permalink raw reply
* Re: [PATCH] KVM: PPC: protect use of kvmppc_h_pr
From: Alexander Graf @ 2011-11-11 16:03 UTC (permalink / raw)
To: Andreas Schwab; +Cc: linuxppc-dev, paulus, kvm, kvm-ppc
In-Reply-To: <m27h3apm8c.fsf_-_@igel.home>
On 11/08/2011 06:17 PM, Andreas Schwab wrote:
> kvmppc_h_pr is only available if CONFIG_KVM_BOOK3S_64_PR.
>
> Signed-off-by: Andreas Schwab<schwab@linux-m68k.org>
Thanks, applied to kvm-ppc-next.
Alex
^ permalink raw reply
* Re: [PATCH] KVM: PPC: move compute_tlbie_rb to book3s_64 common header
From: Alexander Graf @ 2011-11-11 16:03 UTC (permalink / raw)
To: Andreas Schwab; +Cc: linuxppc-dev, paulus, kvm, kvm-ppc
In-Reply-To: <m2bosmpmmz.fsf_-_@igel.home>
On 11/08/2011 06:08 PM, Andreas Schwab wrote:
> compute_tlbie_rb is only used on ppc64 and cannot be compiled on ppc32.
>
> Signed-off-by: Andreas Schwab<schwab@linux-m68k.org>
Thanks, applied to kvm-ppc-next.
Alex
^ permalink raw reply
* [PATCH] P1021: set IReady in QE Microcode Upload
From: Kokoris, Ioannis @ 2011-11-11 16:05 UTC (permalink / raw)
To: timur@freescale.com
Cc: linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
Hi,
QE Microcode Initialization using qe_upload_microcode() does not work on P1=
021 if the IRAM-Ready register is not set after the microcode upload. This =
patch adds a definition for the "I-RAM Ready" register and sets it uppon mi=
crocode upload completion.
Signed-off-by: Ioannis Kokkoris <ioannis.kokoris@siemens-enterprise.com>
diff -Nru a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/=
immap_qe.h
--- a/arch/powerpc/include/asm/immap_qe.h 2011-11-11 17:47:45.000000000 +02=
00
+++ b/arch/powerpc/include/asm/immap_qe.h 2011-11-11 17:49:31.000000000 +02=
00
@@ -26,7 +26,9 @@
struct qe_iram {
__be32 iadd; /* I-RAM Address Register */
__be32 idata; /* I-RAM Data Register */
- u8 res0[0x78];
+ u8 res0[0x04];
+ __be32 iready; /* I-RAM Ready Register */
+ u8 res1[0x70];
} __attribute__ ((packed));
=20
/* QE Interrupt Controller */
diff -Nru a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
--- a/arch/powerpc/include/asm/qe.h 2011-11-11 17:47:57.000000000 +0200
+++ b/arch/powerpc/include/asm/qe.h 2011-11-11 17:49:42.000000000 +0200
@@ -499,6 +499,7 @@
/* I-RAM */
#define QE_IRAM_IADD_AIE 0x80000000 /* Auto Increment Enable */
#define QE_IRAM_IADD_BADDR 0x00080000 /* Base Address */
+#define QE_IRAM_READY 0x80000000 /* Ready */
=20
/* UPC */
#define UPGCR_PROTOCOL 0x80000000 /* protocol ul2 or pl2 */
diff -Nru a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe=
.c
--- a/arch/powerpc/sysdev/qe_lib/qe.c 2011-11-11 17:48:44.000000000 +0200
+++ b/arch/powerpc/sysdev/qe_lib/qe.c 2011-11-11 17:49:59.000000000 +0200
@@ -377,6 +377,9 @@
=20
for (i =3D 0; i < be32_to_cpu(ucode->count); i++)
out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));
+=09
+ /* Set I-RAM Ready Register */=09
+ out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY));
}
=20
/*
--
Best Regards,
Ioannis
^ permalink raw reply
* Re: [PATCH] P1021: set IReady in QE Microcode Upload
From: Tabi Timur-B04825 @ 2011-11-11 16:39 UTC (permalink / raw)
To: Kokoris, Ioannis
Cc: linuxppc-dev@lists.ozlabs.org, Tabi Timur-B04825,
linux-kernel@vger.kernel.org
In-Reply-To: <026483A88B848047A08C3F03E20822D0267B1F4A55@MCHP058A.global-ad.net>
Kokoris, Ioannis wrote:
> Hi,
>
> QE Microcode Initialization using qe_upload_microcode() does not work
> on P1021 if the IRAM-Ready register is not set after the microcode
> upload. This patch adds a definition for the "I-RAM Ready" register and
> sets it uppon microcode upload completion.
Will this code still work on other QE parts, like the MPC8323?
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* RE: [PATCH] fsl-rio: fix compile error
From: Bounine, Alexandre @ 2011-11-11 16:49 UTC (permalink / raw)
To: Liu Gang, linuxppc-dev
Cc: r58472, linux-kernel, r61911, paul.gortmaker, akpm, B11780
In-Reply-To: <1321019308-7785-1-git-send-email-Gang.Liu@freescale.com>
On Fri, Nov 11, 2011 at 8:48 AM Liu Gang <Gang.Liu@freescale.com> wrote:
> Sent: Friday, November 11, 2011 8:48 AM
> To: linuxppc-dev@lists.ozlabs.org; Bounine, Alexandre
> Cc: akpm@linux-foundation.org; linux-kernel@vger.kernel.org;
> paul.gortmaker@windriver.com; r58472@freescale.com;
> B11780@freescale.com; r61911@freescale.com; Liu Gang
> Subject: [PATCH] fsl-rio: fix compile error
>=20
> The "#include <linux/module.h>" was replaced by "#include
> <linux/export.h>"
> in the patch "powerpc: various straight conversions from module.h -->
> export.h".
> This will cause the following compile problem:
> arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
> arch/powerpc/sysdev/fsl_rio.c:296: error: implicit declaration of
> function 'search_exception_tables'.
>=20
> The file fsl_rio.c needs the declaration of function
> "search_exception_tables"
> in the header file "linux/module.h".
>=20
> Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_rio.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/fsl_rio.c
> b/arch/powerpc/sysdev/fsl_rio.c
> index de170fd..22ffccd 100644
> --- a/arch/powerpc/sysdev/fsl_rio.c
> +++ b/arch/powerpc/sysdev/fsl_rio.c
> @@ -23,7 +23,7 @@
> */
>=20
> #include <linux/init.h>
> -#include <linux/export.h>
> +#include <linux/module.h>
> #include <linux/types.h>
> #include <linux/dma-mapping.h>
> #include <linux/interrupt.h>
> --
> 1.7.3.1
>=20
Acked-by: Alexandre Bounine <alexandre.bounine@idt.com>
^ permalink raw reply
* Re: Disabling TCP slow start after idle
From: Stephen Rothwell @ 2011-11-12 0:05 UTC (permalink / raw)
To: David Laight; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <AE90C24D6B3A694183C094C60CF0A2F6D8AEBA@saturn3.aculab.com>
[-- Attachment #1: Type: text/plain, Size: 632 bytes --]
Hi David,
On Fri, 11 Nov 2011 15:30:23 -0000 "David Laight" <David.Laight@ACULAB.COM> wrote:
>
> We have some connections that suffer very badly from the TCP
> 'slow start' algorithm. These are connections that will
> always be local - they may be MAC-Switch-MAC using RGMII
> crossover, they might also be connected via an external
> switch. In either case the RTT is most likely to be almost
> zero, certainly below 1ms.
You would be better off asking networking questions on netdev at
vger.kernel.org ...
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
http://www.canb.auug.org.au/~sfr/
[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply
* RE: Linuxppc-dev Digest, Vol 87, Issue 61
From: Bob Stover @ 2011-11-12 1:34 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <mailman.2441.1320941713.15294.linuxppc-dev@lists.ozlabs.org>
[-- Attachment #1: Type: text/plain, Size: 40347 bytes --]
You have been great. Im in a pinch. I put linux on alot of computers. The customers want ITunes. Do you have a package that will work on RPM or Debian.
Bob
> From: linuxppc-dev-request@lists.ozlabs.org
> Subject: Linuxppc-dev Digest, Vol 87, Issue 61
> To: linuxppc-dev@lists.ozlabs.org
> Date: Fri, 11 Nov 2011 03:15:13 +1100
>
> Send Linuxppc-dev mailing list submissions to
> linuxppc-dev@lists.ozlabs.org
>
> To subscribe or unsubscribe via the World Wide Web, visit
> https://lists.ozlabs.org/listinfo/linuxppc-dev
> or, via email, send a message with subject or body 'help' to
> linuxppc-dev-request@lists.ozlabs.org
>
> You can reach the person managing the list at
> linuxppc-dev-owner@lists.ozlabs.org
>
> When replying, please edit your Subject line so it is more specific
> than "Re: Contents of Linuxppc-dev digest..."
>
>
> Today's Topics:
>
> 1. [RFC][PATCH 23/30] powerpc/85xx: Rework P4080DS device trees
> (Kumar Gala)
>
>
> ----------------------------------------------------------------------
>
> Message: 1
> Date: Thu, 10 Nov 2011 10:14:06 -0600
> From: Kumar Gala <galak@kernel.crashing.org>
> To: linuxppc-dev@ozlabs.org
> Subject: [RFC][PATCH 23/30] powerpc/85xx: Rework P4080DS device trees
> Message-ID:
> <1320941653-29797-24-git-send-email-galak@kernel.crashing.org>
>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 342 ++++++++++++
> arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi | 145 +++++
> arch/powerpc/boot/dts/p4080ds.dts | 14 +-
> arch/powerpc/boot/dts/p4080si.dtsi | 755 ---------------------------
> 4 files changed, 498 insertions(+), 758 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
> create mode 100644 arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
> delete mode 100644 arch/powerpc/boot/dts/p4080si.dtsi
>
> diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
> new file mode 100644
> index 0000000..1510991
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
> @@ -0,0 +1,342 @@
> +/*
> + * P4080/P4040 Silicon/SoC Device Tree Source (post include)
> + *
> + * Copyright 2011 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + * * Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * * Neither the name of Freescale Semiconductor nor the
> + * names of its contributors may be used to endorse or promote products
> + * derived from this software without specific prior written permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") as published by the Free Software
> + * Foundation, either version 2 of that License or (at your option) any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +&lbc {
> + compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
> + interrupts = <25 2 0 0>;
> + #address-cells = <2>;
> + #size-cells = <1>;
> +};
> +
> +/* controller at 0x200000 */
> +&pci0 {
> + compatible = "fsl,p4080-pcie";
> + device_type = "pci";
> + #size-cells = <2>;
> + #address-cells = <3>;
> + bus-range = <0x0 0xff>;
> + clock-frequency = <33333333>;
> + interrupts = <16 2 1 15>;
> + pcie@0 {
> + reg = <0 0 0 0 0>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + #address-cells = <3>;
> + device_type = "pci";
> + interrupts = <16 2 1 15>;
> + interrupt-map-mask = <0xf800 0 0 7>;
> + interrupt-map = <
> + /* IDSEL 0x0 */
> + 0000 0 0 1 &mpic 40 1 0 0
> + 0000 0 0 2 &mpic 1 1 0 0
> + 0000 0 0 3 &mpic 2 1 0 0
> + 0000 0 0 4 &mpic 3 1 0 0
> + >;
> + };
> +};
> +
> +/* controller at 0x201000 */
> +&pci1 {
> + compatible = "fsl,p4080-pcie";
> + device_type = "pci";
> + #size-cells = <2>;
> + #address-cells = <3>;
> + bus-range = <0 0xff>;
> + clock-frequency = <33333333>;
> + interrupts = <16 2 1 14>;
> + pcie@0 {
> + reg = <0 0 0 0 0>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + #address-cells = <3>;
> + device_type = "pci";
> + interrupts = <16 2 1 14>;
> + interrupt-map-mask = <0xf800 0 0 7>;
> + interrupt-map = <
> + /* IDSEL 0x0 */
> + 0000 0 0 1 &mpic 41 1 0 0
> + 0000 0 0 2 &mpic 5 1 0 0
> + 0000 0 0 3 &mpic 6 1 0 0
> + 0000 0 0 4 &mpic 7 1 0 0
> + >;
> + };
> +};
> +
> +/* controller at 0x202000 */
> +&pci2 {
> + compatible = "fsl,p4080-pcie";
> + device_type = "pci";
> + #size-cells = <2>;
> + #address-cells = <3>;
> + bus-range = <0x0 0xff>;
> + clock-frequency = <33333333>;
> + interrupts = <16 2 1 13>;
> + pcie@0 {
> + reg = <0 0 0 0 0>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + #address-cells = <3>;
> + device_type = "pci";
> + interrupts = <16 2 1 13>;
> + interrupt-map-mask = <0xf800 0 0 7>;
> + interrupt-map = <
> + /* IDSEL 0x0 */
> + 0000 0 0 1 &mpic 42 1 0 0
> + 0000 0 0 2 &mpic 9 1 0 0
> + 0000 0 0 3 &mpic 10 1 0 0
> + 0000 0 0 4 &mpic 11 1 0 0
> + >;
> + };
> +};
> +
> +&rio {
> + #address-cells = <2>;
> + #size-cells = <2>;
> + compatible = "fsl,rapidio-delta";
> + interrupts = <
> + 16 2 1 11 /* err_irq */
> + 56 2 0 0 /* bell_outb_irq */
> + 57 2 0 0 /* bell_inb_irq */
> + 60 2 0 0 /* msg1_tx_irq */
> + 61 2 0 0 /* msg1_rx_irq */
> + 62 2 0 0 /* msg2_tx_irq */
> + 63 2 0 0>; /* msg2_rx_irq */
> +};
> +
> +&dcsr {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,dcsr", "simple-bus";
> +
> + dcsr-epu@0 {
> + compatible = "fsl,dcsr-epu";
> + interrupts = <52 2 0 0
> + 84 2 0 0
> + 85 2 0 0>;
> + reg = <0x0 0x1000>;
> + };
> + dcsr-npc {
> + compatible = "fsl,dcsr-npc";
> + reg = <0x1000 0x1000 0x1000000 0x8000>;
> + };
> + dcsr-nxc@2000 {
> + compatible = "fsl,dcsr-nxc";
> + reg = <0x2000 0x1000>;
> + };
> + dcsr-corenet {
> + compatible = "fsl,dcsr-corenet";
> + reg = <0x8000 0x1000 0xB0000 0x1000>;
> + };
> + dcsr-dpaa@9000 {
> + compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
> + reg = <0x9000 0x1000>;
> + };
> + dcsr-ocn@11000 {
> + compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
> + reg = <0x11000 0x1000>;
> + };
> + dcsr-ddr@12000 {
> + compatible = "fsl,dcsr-ddr";
> + dev-handle = <&ddr1>;
> + reg = <0x12000 0x1000>;
> + };
> + dcsr-ddr@13000 {
> + compatible = "fsl,dcsr-ddr";
> + dev-handle = <&ddr2>;
> + reg = <0x13000 0x1000>;
> + };
> + dcsr-nal@18000 {
> + compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
> + reg = <0x18000 0x1000>;
> + };
> + dcsr-rcpm@22000 {
> + compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
> + reg = <0x22000 0x1000>;
> + };
> + dcsr-cpu-sb-proxy@40000 {
> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> + cpu-handle = <&cpu0>;
> + reg = <0x40000 0x1000>;
> + };
> + dcsr-cpu-sb-proxy@41000 {
> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> + cpu-handle = <&cpu1>;
> + reg = <0x41000 0x1000>;
> + };
> + dcsr-cpu-sb-proxy@42000 {
> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> + cpu-handle = <&cpu2>;
> + reg = <0x42000 0x1000>;
> + };
> + dcsr-cpu-sb-proxy@43000 {
> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> + cpu-handle = <&cpu3>;
> + reg = <0x43000 0x1000>;
> + };
> + dcsr-cpu-sb-proxy@44000 {
> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> + cpu-handle = <&cpu4>;
> + reg = <0x44000 0x1000>;
> + };
> + dcsr-cpu-sb-proxy@45000 {
> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> + cpu-handle = <&cpu5>;
> + reg = <0x45000 0x1000>;
> + };
> + dcsr-cpu-sb-proxy@46000 {
> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> + cpu-handle = <&cpu6>;
> + reg = <0x46000 0x1000>;
> + };
> + dcsr-cpu-sb-proxy@47000 {
> + compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> + cpu-handle = <&cpu7>;
> + reg = <0x47000 0x1000>;
> + };
> +
> +};
> +
> +&soc {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + device_type = "soc";
> + compatible = "simple-bus";
> +
> + soc-sram-error {
> + compatible = "fsl,soc-sram-error";
> + interrupts = <16 2 1 29>;
> + };
> +
> + corenet-law@0 {
> + compatible = "fsl,corenet-law";
> + reg = <0x0 0x1000>;
> + fsl,num-laws = <32>;
> + };
> +
> + ddr1: memory-controller@8000 {
> + compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
> + reg = <0x8000 0x1000>;
> + interrupts = <16 2 1 23>;
> + };
> +
> + ddr2: memory-controller@9000 {
> + compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
> + reg = <0x9000 0x1000>;
> + interrupts = <16 2 1 22>;
> + };
> +
> + cpc: l3-cache-controller@10000 {
> + compatible = "fsl,p4080-l3-cache-controller", "cache";
> + reg = <0x10000 0x1000
> + 0x11000 0x1000>;
> + interrupts = <16 2 1 27
> + 16 2 1 26>;
> + };
> +
> + corenet-cf@18000 {
> + compatible = "fsl,corenet-cf";
> + reg = <0x18000 0x1000>;
> + interrupts = <16 2 1 31>;
> + fsl,ccf-num-csdids = <32>;
> + fsl,ccf-num-snoopids = <32>;
> + };
> +
> + iommu@20000 {
> + compatible = "fsl,pamu-v1.0", "fsl,pamu";
> + reg = <0x20000 0x5000>;
> + interrupts = <
> + 24 2 0 0
> + 16 2 1 30>;
> + };
> +
> +/include/ "qoriq-mpic.dtsi"
> +
> + guts: global-utilities@e0000 {
> + compatible = "fsl,qoriq-device-config-1.0";
> + reg = <0xe0000 0xe00>;
> + fsl,has-rstcr;
> + #sleep-cells = <1>;
> + fsl,liodn-bits = <12>;
> + };
> +
> + pins: global-utilities@e0e00 {
> + compatible = "fsl,qoriq-pin-control-1.0";
> + reg = <0xe0e00 0x200>;
> + #sleep-cells = <2>;
> + };
> +
> + clockgen: global-utilities@e1000 {
> + compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
> + reg = <0xe1000 0x1000>;
> + clock-frequency = <0>;
> + };
> +
> + rcpm: global-utilities@e2000 {
> + compatible = "fsl,qoriq-rcpm-1.0";
> + reg = <0xe2000 0x1000>;
> + #sleep-cells = <1>;
> + };
> +
> + sfp: sfp@e8000 {
> + compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
> + reg = <0xe8000 0x1000>;
> + };
> +
> + serdes: serdes@ea000 {
> + compatible = "fsl,p4080-serdes";
> + reg = <0xea000 0x1000>;
> + };
> +
> +/include/ "qoriq-dma-0.dtsi"
> +/include/ "qoriq-dma-1.dtsi"
> +/include/ "qoriq-espi-0.dtsi"
> + spi@110000 {
> + fsl,espi-num-chipselects = <4>;
> + };
> +
> +/include/ "qoriq-esdhc-0.dtsi"
> + sdhc@114000 {
> + voltage-ranges = <3300 3300>;
> + sdhci,auto-cmd12;
> + };
> +
> +/include/ "qoriq-i2c-0.dtsi"
> +/include/ "qoriq-i2c-1.dtsi"
> +/include/ "qoriq-duart-0.dtsi"
> +/include/ "qoriq-duart-1.dtsi"
> +/include/ "qoriq-gpio-0.dtsi"
> +/include/ "qoriq-usb2-mph-0.dtsi"
> +/include/ "qoriq-usb2-dr-0.dtsi"
> +/include/ "qoriq-sec4.0-0.dtsi"
> +};
> diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
> new file mode 100644
> index 0000000..b353ac9
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
> @@ -0,0 +1,145 @@
> +/*
> + * P4080/P4040 Silicon/SoC Device Tree Source (pre include)
> + *
> + * Copyright 2011 Freescale Semiconductor Inc.
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions are met:
> + * * Redistributions of source code must retain the above copyright
> + * notice, this list of conditions and the following disclaimer.
> + * * Redistributions in binary form must reproduce the above copyright
> + * notice, this list of conditions and the following disclaimer in the
> + * documentation and/or other materials provided with the distribution.
> + * * Neither the name of Freescale Semiconductor nor the
> + * names of its contributors may be used to endorse or promote products
> + * derived from this software without specific prior written permission.
> + *
> + *
> + * ALTERNATIVELY, this software may be distributed under the terms of the
> + * GNU General Public License ("GPL") as published by the Free Software
> + * Foundation, either version 2 of that License or (at your option) any
> + * later version.
> + *
> + * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> + * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> + * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + */
> +
> +/dts-v1/;
> +/ {
> + compatible = "fsl,P4080";
> + #address-cells = <2>;
> + #size-cells = <2>;
> + interrupt-parent = <&mpic>;
> +
> + aliases {
> + ccsr = &soc;
> + dcsr = &dcsr;
> +
> + serial0 = &serial0;
> + serial1 = &serial1;
> + serial2 = &serial2;
> + serial3 = &serial3;
> + pci0 = &pci0;
> + pci1 = &pci1;
> + pci2 = &pci2;
> + usb0 = &usb0;
> + usb1 = &usb1;
> + dma0 = &dma0;
> + dma1 = &dma1;
> + sdhc = &sdhc;
> + msi0 = &msi0;
> + msi1 = &msi1;
> + msi2 = &msi2;
> +
> + crypto = &crypto;
> + sec_jr0 = &sec_jr0;
> + sec_jr1 = &sec_jr1;
> + sec_jr2 = &sec_jr2;
> + sec_jr3 = &sec_jr3;
> + rtic_a = &rtic_a;
> + rtic_b = &rtic_b;
> + rtic_c = &rtic_c;
> + rtic_d = &rtic_d;
> + sec_mon = &sec_mon;
> +
> + rio0 = &rapidio0;
> + };
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu0: PowerPC,e500mc@0 {
> + device_type = "cpu";
> + reg = <0>;
> + next-level-cache = <&L2_0>;
> + L2_0: l2-cache {
> + next-level-cache = <&cpc>;
> + };
> + };
> + cpu1: PowerPC,e500mc@1 {
> + device_type = "cpu";
> + reg = <1>;
> + next-level-cache = <&L2_1>;
> + L2_1: l2-cache {
> + next-level-cache = <&cpc>;
> + };
> + };
> + cpu2: PowerPC,e500mc@2 {
> + device_type = "cpu";
> + reg = <2>;
> + next-level-cache = <&L2_2>;
> + L2_2: l2-cache {
> + next-level-cache = <&cpc>;
> + };
> + };
> + cpu3: PowerPC,e500mc@3 {
> + device_type = "cpu";
> + reg = <3>;
> + next-level-cache = <&L2_3>;
> + L2_3: l2-cache {
> + next-level-cache = <&cpc>;
> + };
> + };
> + cpu4: PowerPC,e500mc@4 {
> + device_type = "cpu";
> + reg = <4>;
> + next-level-cache = <&L2_4>;
> + L2_4: l2-cache {
> + next-level-cache = <&cpc>;
> + };
> + };
> + cpu5: PowerPC,e500mc@5 {
> + device_type = "cpu";
> + reg = <5>;
> + next-level-cache = <&L2_5>;
> + L2_5: l2-cache {
> + next-level-cache = <&cpc>;
> + };
> + };
> + cpu6: PowerPC,e500mc@6 {
> + device_type = "cpu";
> + reg = <6>;
> + next-level-cache = <&L2_6>;
> + L2_6: l2-cache {
> + next-level-cache = <&cpc>;
> + };
> + };
> + cpu7: PowerPC,e500mc@7 {
> + device_type = "cpu";
> + reg = <7>;
> + next-level-cache = <&L2_7>;
> + L2_7: l2-cache {
> + next-level-cache = <&cpc>;
> + };
> + };
> + };
> +};
> diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
> index c7916dc..8ea1ae9 100644
> --- a/arch/powerpc/boot/dts/p4080ds.dts
> +++ b/arch/powerpc/boot/dts/p4080ds.dts
> @@ -32,7 +32,7 @@
> * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> */
>
> -/include/ "p4080si.dtsi"
> +/include/ "fsl/p4080si-pre.dtsi"
>
> / {
> model = "fsl,P4080DS";
> @@ -50,6 +50,9 @@
> };
>
> soc: soc@ffe000000 {
> + ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
> + reg = <0xf 0xfe000000 0 0x00001000>;
> +
> spi@110000 {
> flash@0 {
> #address-cells = <1>;
> @@ -105,12 +108,12 @@
> };
> };
>
> - rapidio0: rapidio@ffe0c0000 {
> + rio: rapidio0: rapidio@ffe0c0000 {
> reg = <0xf 0xfe0c0000 0 0x20000>;
> ranges = <0 0 0xc 0x20000000 0 0x01000000>;
> };
>
> - localbus@ffe124000 {
> + lbc: localbus@ffe124000 {
> reg = <0xf 0xfe124000 0 0x1000>;
> ranges = <0 0 0xf 0xe8000000 0x08000000
> 3 0 0xf 0xffdf0000 0x00008000>;
> @@ -132,6 +135,7 @@
> reg = <0xf 0xfe200000 0 0x1000>;
> ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
> 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
> + fsl,msi = <&msi0>;
> pcie@0 {
> ranges = <0x02000000 0 0xe0000000
> 0x02000000 0 0xe0000000
> @@ -147,6 +151,7 @@
> reg = <0xf 0xfe201000 0 0x1000>;
> ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
> 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
> + fsl,msi = <&msi1>;
> pcie@0 {
> ranges = <0x02000000 0 0xe0000000
> 0x02000000 0 0xe0000000
> @@ -162,6 +167,7 @@
> reg = <0xf 0xfe202000 0 0x1000>;
> ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
> 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
> + fsl,msi = <&msi2>;
> pcie@0 {
> ranges = <0x02000000 0 0xe0000000
> 0x02000000 0 0xe0000000
> @@ -174,3 +180,5 @@
> };
>
> };
> +
> +/include/ "fsl/p4080si-post.dtsi"
> diff --git a/arch/powerpc/boot/dts/p4080si.dtsi b/arch/powerpc/boot/dts/p4080si.dtsi
> deleted file mode 100644
> index f20c01a..0000000
> --- a/arch/powerpc/boot/dts/p4080si.dtsi
> +++ /dev/null
> @@ -1,755 +0,0 @@
> -/*
> - * P4080 Silicon Device Tree Source
> - *
> - * Copyright 2009-2011 Freescale Semiconductor Inc.
> - *
> - * Redistribution and use in source and binary forms, with or without
> - * modification, are permitted provided that the following conditions are met:
> - * * Redistributions of source code must retain the above copyright
> - * notice, this list of conditions and the following disclaimer.
> - * * Redistributions in binary form must reproduce the above copyright
> - * notice, this list of conditions and the following disclaimer in the
> - * documentation and/or other materials provided with the distribution.
> - * * Neither the name of Freescale Semiconductor nor the
> - * names of its contributors may be used to endorse or promote products
> - * derived from this software without specific prior written permission.
> - *
> - *
> - * ALTERNATIVELY, this software may be distributed under the terms of the
> - * GNU General Public License ("GPL") as published by the Free Software
> - * Foundation, either version 2 of that License or (at your option) any
> - * later version.
> - *
> - * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
> - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
> - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
> - * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
> - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
> - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
> - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
> - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
> - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> - */
> -
> -/dts-v1/;
> -
> -/ {
> - compatible = "fsl,P4080";
> - #address-cells = <2>;
> - #size-cells = <2>;
> - interrupt-parent = <&mpic>;
> -
> - aliases {
> - ccsr = &soc;
> - dcsr = &dcsr;
> -
> - serial0 = &serial0;
> - serial1 = &serial1;
> - serial2 = &serial2;
> - serial3 = &serial3;
> - pci0 = &pci0;
> - pci1 = &pci1;
> - pci2 = &pci2;
> - usb0 = &usb0;
> - usb1 = &usb1;
> - dma0 = &dma0;
> - dma1 = &dma1;
> - sdhc = &sdhc;
> - msi0 = &msi0;
> - msi1 = &msi1;
> - msi2 = &msi2;
> -
> - crypto = &crypto;
> - sec_jr0 = &sec_jr0;
> - sec_jr1 = &sec_jr1;
> - sec_jr2 = &sec_jr2;
> - sec_jr3 = &sec_jr3;
> - rtic_a = &rtic_a;
> - rtic_b = &rtic_b;
> - rtic_c = &rtic_c;
> - rtic_d = &rtic_d;
> - sec_mon = &sec_mon;
> -
> - rio0 = &rapidio0;
> - };
> -
> - cpus {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - cpu0: PowerPC,e500mc@0 {
> - device_type = "cpu";
> - reg = <0>;
> - next-level-cache = <&L2_0>;
> - L2_0: l2-cache {
> - next-level-cache = <&cpc>;
> - };
> - };
> - cpu1: PowerPC,e500mc@1 {
> - device_type = "cpu";
> - reg = <1>;
> - next-level-cache = <&L2_1>;
> - L2_1: l2-cache {
> - next-level-cache = <&cpc>;
> - };
> - };
> - cpu2: PowerPC,e500mc@2 {
> - device_type = "cpu";
> - reg = <2>;
> - next-level-cache = <&L2_2>;
> - L2_2: l2-cache {
> - next-level-cache = <&cpc>;
> - };
> - };
> - cpu3: PowerPC,e500mc@3 {
> - device_type = "cpu";
> - reg = <3>;
> - next-level-cache = <&L2_3>;
> - L2_3: l2-cache {
> - next-level-cache = <&cpc>;
> - };
> - };
> - cpu4: PowerPC,e500mc@4 {
> - device_type = "cpu";
> - reg = <4>;
> - next-level-cache = <&L2_4>;
> - L2_4: l2-cache {
> - next-level-cache = <&cpc>;
> - };
> - };
> - cpu5: PowerPC,e500mc@5 {
> - device_type = "cpu";
> - reg = <5>;
> - next-level-cache = <&L2_5>;
> - L2_5: l2-cache {
> - next-level-cache = <&cpc>;
> - };
> - };
> - cpu6: PowerPC,e500mc@6 {
> - device_type = "cpu";
> - reg = <6>;
> - next-level-cache = <&L2_6>;
> - L2_6: l2-cache {
> - next-level-cache = <&cpc>;
> - };
> - };
> - cpu7: PowerPC,e500mc@7 {
> - device_type = "cpu";
> - reg = <7>;
> - next-level-cache = <&L2_7>;
> - L2_7: l2-cache {
> - next-level-cache = <&cpc>;
> - };
> - };
> - };
> -
> - dcsr: dcsr@f00000000 {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "fsl,dcsr", "simple-bus";
> -
> - dcsr-epu@0 {
> - compatible = "fsl,dcsr-epu";
> - interrupts = <52 2 0 0
> - 84 2 0 0
> - 85 2 0 0>;
> - interrupt-parent = <&mpic>;
> - reg = <0x0 0x1000>;
> - };
> - dcsr-npc {
> - compatible = "fsl,dcsr-npc";
> - reg = <0x1000 0x1000 0x1000000 0x8000>;
> - };
> - dcsr-nxc@2000 {
> - compatible = "fsl,dcsr-nxc";
> - reg = <0x2000 0x1000>;
> - };
> - dcsr-corenet {
> - compatible = "fsl,dcsr-corenet";
> - reg = <0x8000 0x1000 0xB0000 0x1000>;
> - };
> - dcsr-dpaa@9000 {
> - compatible = "fsl,p4080-dcsr-dpaa", "fsl,dcsr-dpaa";
> - reg = <0x9000 0x1000>;
> - };
> - dcsr-ocn@11000 {
> - compatible = "fsl,p4080-dcsr-ocn", "fsl,dcsr-ocn";
> - reg = <0x11000 0x1000>;
> - };
> - dcsr-ddr@12000 {
> - compatible = "fsl,dcsr-ddr";
> - dev-handle = <&ddr1>;
> - reg = <0x12000 0x1000>;
> - };
> - dcsr-ddr@13000 {
> - compatible = "fsl,dcsr-ddr";
> - dev-handle = <&ddr2>;
> - reg = <0x13000 0x1000>;
> - };
> - dcsr-nal@18000 {
> - compatible = "fsl,p4080-dcsr-nal", "fsl,dcsr-nal";
> - reg = <0x18000 0x1000>;
> - };
> - dcsr-rcpm@22000 {
> - compatible = "fsl,p4080-dcsr-rcpm", "fsl,dcsr-rcpm";
> - reg = <0x22000 0x1000>;
> - };
> - dcsr-cpu-sb-proxy@40000 {
> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> - cpu-handle = <&cpu0>;
> - reg = <0x40000 0x1000>;
> - };
> - dcsr-cpu-sb-proxy@41000 {
> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> - cpu-handle = <&cpu1>;
> - reg = <0x41000 0x1000>;
> - };
> - dcsr-cpu-sb-proxy@42000 {
> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> - cpu-handle = <&cpu2>;
> - reg = <0x42000 0x1000>;
> - };
> - dcsr-cpu-sb-proxy@43000 {
> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> - cpu-handle = <&cpu3>;
> - reg = <0x43000 0x1000>;
> - };
> - dcsr-cpu-sb-proxy@44000 {
> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> - cpu-handle = <&cpu4>;
> - reg = <0x44000 0x1000>;
> - };
> - dcsr-cpu-sb-proxy@45000 {
> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> - cpu-handle = <&cpu5>;
> - reg = <0x45000 0x1000>;
> - };
> - dcsr-cpu-sb-proxy@46000 {
> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> - cpu-handle = <&cpu6>;
> - reg = <0x46000 0x1000>;
> - };
> - dcsr-cpu-sb-proxy@47000 {
> - compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
> - cpu-handle = <&cpu7>;
> - reg = <0x47000 0x1000>;
> - };
> - };
> -
> - soc: soc@ffe000000 {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - device_type = "soc";
> - compatible = "simple-bus";
> - ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
> - reg = <0xf 0xfe000000 0 0x00001000>;
> -
> - soc-sram-error {
> - compatible = "fsl,soc-sram-error";
> - interrupts = <16 2 1 29>;
> - };
> -
> - corenet-law@0 {
> - compatible = "fsl,corenet-law";
> - reg = <0x0 0x1000>;
> - fsl,num-laws = <32>;
> - };
> -
> - ddr1: memory-controller@8000 {
> - compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
> - reg = <0x8000 0x1000>;
> - interrupts = <16 2 1 23>;
> - };
> -
> - ddr2: memory-controller@9000 {
> - compatible = "fsl,qoriq-memory-controller-v4.4","fsl,qoriq-memory-controller";
> - reg = <0x9000 0x1000>;
> - interrupts = <16 2 1 22>;
> - };
> -
> - cpc: l3-cache-controller@10000 {
> - compatible = "fsl,p4080-l3-cache-controller", "cache";
> - reg = <0x10000 0x1000
> - 0x11000 0x1000>;
> - interrupts = <16 2 1 27
> - 16 2 1 26>;
> - };
> -
> - corenet-cf@18000 {
> - compatible = "fsl,corenet-cf";
> - reg = <0x18000 0x1000>;
> - interrupts = <16 2 1 31>;
> - fsl,ccf-num-csdids = <32>;
> - fsl,ccf-num-snoopids = <32>;
> - };
> -
> - iommu@20000 {
> - compatible = "fsl,pamu-v1.0", "fsl,pamu";
> - reg = <0x20000 0x5000>;
> - interrupts = <
> - 24 2 0 0
> - 16 2 1 30>;
> - };
> -
> - mpic: pic@40000 {
> - clock-frequency = <0>;
> - interrupt-controller;
> - #address-cells = <0>;
> - #interrupt-cells = <4>;
> - reg = <0x40000 0x40000>;
> - compatible = "fsl,mpic", "chrp,open-pic";
> - device_type = "open-pic";
> - };
> -
> - msi0: msi@41600 {
> - compatible = "fsl,mpic-msi";
> - reg = <0x41600 0x200>;
> - msi-available-ranges = <0 0x100>;
> - interrupts = <
> - 0xe0 0 0 0
> - 0xe1 0 0 0
> - 0xe2 0 0 0
> - 0xe3 0 0 0
> - 0xe4 0 0 0
> - 0xe5 0 0 0
> - 0xe6 0 0 0
> - 0xe7 0 0 0>;
> - };
> -
> - msi1: msi@41800 {
> - compatible = "fsl,mpic-msi";
> - reg = <0x41800 0x200>;
> - msi-available-ranges = <0 0x100>;
> - interrupts = <
> - 0xe8 0 0 0
> - 0xe9 0 0 0
> - 0xea 0 0 0
> - 0xeb 0 0 0
> - 0xec 0 0 0
> - 0xed 0 0 0
> - 0xee 0 0 0
> - 0xef 0 0 0>;
> - };
> -
> - msi2: msi@41a00 {
> - compatible = "fsl,mpic-msi";
> - reg = <0x41a00 0x200>;
> - msi-available-ranges = <0 0x100>;
> - interrupts = <
> - 0xf0 0 0 0
> - 0xf1 0 0 0
> - 0xf2 0 0 0
> - 0xf3 0 0 0
> - 0xf4 0 0 0
> - 0xf5 0 0 0
> - 0xf6 0 0 0
> - 0xf7 0 0 0>;
> - };
> -
> - guts: global-utilities@e0000 {
> - compatible = "fsl,qoriq-device-config-1.0";
> - reg = <0xe0000 0xe00>;
> - fsl,has-rstcr;
> - #sleep-cells = <1>;
> - fsl,liodn-bits = <12>;
> - };
> -
> - pins: global-utilities@e0e00 {
> - compatible = "fsl,qoriq-pin-control-1.0";
> - reg = <0xe0e00 0x200>;
> - #sleep-cells = <2>;
> - };
> -
> - clockgen: global-utilities@e1000 {
> - compatible = "fsl,p4080-clockgen", "fsl,qoriq-clockgen-1.0";
> - reg = <0xe1000 0x1000>;
> - clock-frequency = <0>;
> - };
> -
> - rcpm: global-utilities@e2000 {
> - compatible = "fsl,qoriq-rcpm-1.0";
> - reg = <0xe2000 0x1000>;
> - #sleep-cells = <1>;
> - };
> -
> - sfp: sfp@e8000 {
> - compatible = "fsl,p4080-sfp", "fsl,qoriq-sfp-1.0";
> - reg = <0xe8000 0x1000>;
> - };
> -
> - serdes: serdes@ea000 {
> - compatible = "fsl,p4080-serdes";
> - reg = <0xea000 0x1000>;
> - };
> -
> - dma0: dma@100300 {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "fsl,p4080-dma", "fsl,eloplus-dma";
> - reg = <0x100300 0x4>;
> - ranges = <0x0 0x100100 0x200>;
> - cell-index = <0>;
> - dma-channel@0 {
> - compatible = "fsl,p4080-dma-channel",
> - "fsl,eloplus-dma-channel";
> - reg = <0x0 0x80>;
> - cell-index = <0>;
> - interrupts = <28 2 0 0>;
> - };
> - dma-channel@80 {
> - compatible = "fsl,p4080-dma-channel",
> - "fsl,eloplus-dma-channel";
> - reg = <0x80 0x80>;
> - cell-index = <1>;
> - interrupts = <29 2 0 0>;
> - };
> - dma-channel@100 {
> - compatible = "fsl,p4080-dma-channel",
> - "fsl,eloplus-dma-channel";
> - reg = <0x100 0x80>;
> - cell-index = <2>;
> - interrupts = <30 2 0 0>;
> - };
> - dma-channel@180 {
> - compatible = "fsl,p4080-dma-channel",
> - "fsl,eloplus-dma-channel";
> - reg = <0x180 0x80>;
> - cell-index = <3>;
> - interrupts = <31 2 0 0>;
> - };
> - };
> -
> - dma1: dma@101300 {
> - #address-cells = <1>;
> - #size-cells = <1>;
> - compatible = "fsl,p4080-dma", "fsl,eloplus-dma";
> - reg = <0x101300 0x4>;
> - ranges = <0x0 0x101100 0x200>;
> - cell-index = <1>;
> - dma-channel@0 {
> - compatible = "fsl,p4080-dma-channel",
> - "fsl,eloplus-dma-channel";
> - reg = <0x0 0x80>;
> - cell-index = <0>;
> - interrupts = <32 2 0 0>;
> - };
> - dma-channel@80 {
> - compatible = "fsl,p4080-dma-channel",
> - "fsl,eloplus-dma-channel";
> - reg = <0x80 0x80>;
> - cell-index = <1>;
> - interrupts = <33 2 0 0>;
> - };
> - dma-channel@100 {
> - compatible = "fsl,p4080-dma-channel",
> - "fsl,eloplus-dma-channel";
> - reg = <0x100 0x80>;
> - cell-index = <2>;
> - interrupts = <34 2 0 0>;
> - };
> - dma-channel@180 {
> - compatible = "fsl,p4080-dma-channel",
> - "fsl,eloplus-dma-channel";
> - reg = <0x180 0x80>;
> - cell-index = <3>;
> - interrupts = <35 2 0 0>;
> - };
> - };
> -
> - spi@110000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - compatible = "fsl,p4080-espi", "fsl,mpc8536-espi";
> - reg = <0x110000 0x1000>;
> - interrupts = <53 0x2 0 0>;
> - fsl,espi-num-chipselects = <4>;
> - };
> -
> - sdhc: sdhc@114000 {
> - compatible = "fsl,p4080-esdhc", "fsl,esdhc";
> - reg = <0x114000 0x1000>;
> - interrupts = <48 2 0 0>;
> - voltage-ranges = <3300 3300>;
> - sdhci,auto-cmd12;
> - clock-frequency = <0>;
> - };
> -
> - i2c@118000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - cell-index = <0>;
> - compatible = "fsl-i2c";
> - reg = <0x118000 0x100>;
> - interrupts = <38 2 0 0>;
> - dfsrr;
> - };
> -
> - i2c@118100 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - cell-index = <1>;
> - compatible = "fsl-i2c";
> - reg = <0x118100 0x100>;
> - interrupts = <38 2 0 0>;
> - dfsrr;
> - };
> -
> - i2c@119000 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - cell-index = <2>;
> - compatible = "fsl-i2c";
> - reg = <0x119000 0x100>;
> - interrupts = <39 2 0 0>;
> - dfsrr;
> - };
> -
> - i2c@119100 {
> - #address-cells = <1>;
> - #size-cells = <0>;
> - cell-index = <3>;
> - compatible = "fsl-i2c";
> - reg = <0x119100 0x100>;
> - interrupts = <39 2 0 0>;
> - dfsrr;
> - };
> -
> - serial0: serial@11c500 {
> - cell-index = <0>;
> - device_type = "serial";
> - compatible = "ns16550";
> - reg = <0x11c500 0x100>;
> - clock-frequency = <0>;
> - interrupts = <36 2 0 0>;
> - };
> -
> - serial1: serial@11c600 {
> - cell-index = <1>;
> - device_type = "serial";
> - compatible = "ns16550";
> - reg = <0x11c600 0x100>;
> - clock-frequency = <0>;
> - interrupts = <36 2 0 0>;
> - };
> -
> - serial2: serial@11d500 {
> - cell-index = <2>;
> - device_type = "serial";
> - compatible = "ns16550";
> - reg = <0x11d500 0x100>;
> - clock-frequency = <0>;
> - interrupts = <37 2 0 0>;
> - };
> -
> - serial3: serial@11d600 {
> - cell-index = <3>;
> - device_type = "serial";
> - compatible = "ns16550";
> - reg = <0x11d600 0x100>;
> - clock-frequency = <0>;
> - interrupts = <37 2 0 0>;
> - };
> -
> - gpio0: gpio@130000 {
> - compatible = "fsl,p4080-gpio", "fsl,qoriq-gpio";
> - reg = <0x130000 0x1000>;
> - interrupts = <55 2 0 0>;
> - #gpio-cells = <2>;
> - gpio-controller;
> - };
> -
> - usb0: usb@210000 {
> - compatible = "fsl,p4080-usb2-mph",
> - "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
> - reg = <0x210000 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - interrupts = <44 0x2 0 0>;
> - };
> -
> - usb1: usb@211000 {
> - compatible = "fsl,p4080-usb2-dr",
> - "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
> - reg = <0x211000 0x1000>;
> - #address-cells = <1>;
> - #size-cells = <0>;
> - interrupts = <45 0x2 0 0>;
> - };
> -
> - crypto: crypto@300000 {
> - compatible = "fsl,sec-v4.0";
> - #address-cells = <1>;
> - #size-cells = <1>;
> - reg = <0x300000 0x10000>;
> - ranges = <0 0x300000 0x10000>;
> - interrupt-parent = <&mpic>;
> - interrupts = <92 2 0 0>;
> -
> - sec_jr0: jr@1000 {
> - compatible = "fsl,sec-v4.0-job-ring";
> - reg = <0x1000 0x1000>;
> - interrupt-parent = <&mpic>;
> - interrupts = <88 2 0 0>;
> - };
> -
> - sec_jr1: jr@2000 {
> - compatible = "fsl,sec-v4.0-job-ring";
> - reg = <0x2000 0x1000>;
> - interrupt-parent = <&mpic>;
> - interrupts = <89 2 0 0>;
> - };
> -
> - sec_jr2: jr@3000 {
> - compatible = "fsl,sec-v4.0-job-ring";
> - reg = <0x3000 0x1000>;
> - interrupt-parent = <&mpic>;
> - interrupts = <90 2 0 0>;
> - };
> -
> - sec_jr3: jr@4000 {
> - compatible = "fsl,sec-v4.0-job-ring";
> - reg = <0x4000 0x1000>;
> - interrupt-parent = <&mpic>;
> - interrupts = <91 2 0 0>;
> - };
> -
> - rtic@6000 {
> - compatible = "fsl,sec-v4.0-rtic";
> - #address-cells = <1>;
> - #size-cells = <1>;
> - reg = <0x6000 0x100>;
> - ranges = <0x0 0x6100 0xe00>;
> -
> - rtic_a: rtic-a@0 {
> - compatible = "fsl,sec-v4.0-rtic-memory";
> - reg = <0x00 0x20 0x100 0x80>;
> - };
> -
> - rtic_b: rtic-b@20 {
> - compatible = "fsl,sec-v4.0-rtic-memory";
> - reg = <0x20 0x20 0x200 0x80>;
> - };
> -
> - rtic_c: rtic-c@40 {
> - compatible = "fsl,sec-v4.0-rtic-memory";
> - reg = <0x40 0x20 0x300 0x80>;
> - };
> -
> - rtic_d: rtic-d@60 {
> - compatible = "fsl,sec-v4.0-rtic-memory";
> - reg = <0x60 0x20 0x500 0x80>;
> - };
> - };
> - };
> -
> - sec_mon: sec_mon@314000 {
> - compatible = "fsl,sec-v4.0-mon";
> - reg = <0x314000 0x1000>;
> - interrupt-parent = <&mpic>;
> - interrupts = <93 2 0 0>;
> - };
> - };
> -
> - rapidio0: rapidio@ffe0c0000 {
> - #address-cells = <2>;
> - #size-cells = <2>;
> - compatible = "fsl,rapidio-delta";
> - interrupts = <
> - 16 2 1 11 /* err_irq */
> - 56 2 0 0 /* bell_outb_irq */
> - 57 2 0 0 /* bell_inb_irq */
> - 60 2 0 0 /* msg1_tx_irq */
> - 61 2 0 0 /* msg1_rx_irq */
> - 62 2 0 0 /* msg2_tx_irq */
> - 63 2 0 0>; /* msg2_rx_irq */
> - };
> -
> - localbus@ffe124000 {
> - compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus";
> - interrupts = <25 2 0 0>;
> - #address-cells = <2>;
> - #size-cells = <1>;
> - };
> -
> - pci0: pcie@ffe200000 {
> - compatible = "fsl,p4080-pcie";
> - device_type = "pci";
> - #size-cells = <2>;
> - #address-cells = <3>;
> - bus-range = <0x0 0xff>;
> - clock-frequency = <0x1fca055>;
> - fsl,msi = <&msi0>;
> - interrupts = <16 2 1 15>;
> - pcie@0 {
> - reg = <0 0 0 0 0>;
> - #interrupt-cells = <1>;
> - #size-cells = <2>;
> - #address-cells = <3>;
> - device_type = "pci";
> - interrupts = <16 2 1 15>;
> - interrupt-map-mask = <0xf800 0 0 7>;
> - interrupt-map = <
> - /* IDSEL 0x0 */
> - 0000 0 0 1 &mpic 40 1 0 0
> - 0000 0 0 2 &mpic 1 1 0 0
> - 0000 0 0 3 &mpic 2 1 0 0
> - 0000 0 0 4 &mpic 3 1 0 0
> - >;
> - };
> - };
> -
> - pci1: pcie@ffe201000 {
> - compatible = "fsl,p4080-pcie";
> - device_type = "pci";
> - #size-cells = <2>;
> - #address-cells = <3>;
> - bus-range = <0 0xff>;
> - clock-frequency = <0x1fca055>;
> - fsl,msi = <&msi1>;
> - interrupts = <16 2 1 14>;
> - pcie@0 {
> - reg = <0 0 0 0 0>;
> - #interrupt-cells = <1>;
> - #size-cells = <2>;
> - #address-cells = <3>;
> - device_type = "pci";
> - interrupts = <16 2 1 14>;
> - interrupt-map-mask = <0xf800 0 0 7>;
> - interrupt-map = <
> - /* IDSEL 0x0 */
> - 0000 0 0 1 &mpic 41 1 0 0
> - 0000 0 0 2 &mpic 5 1 0 0
> - 0000 0 0 3 &mpic 6 1 0 0
> - 0000 0 0 4 &mpic 7 1 0 0
> - >;
> - };
> - };
> -
> - pci2: pcie@ffe202000 {
> - compatible = "fsl,p4080-pcie";
> - device_type = "pci";
> - #size-cells = <2>;
> - #address-cells = <3>;
> - bus-range = <0x0 0xff>;
> - clock-frequency = <0x1fca055>;
> - fsl,msi = <&msi2>;
> - interrupts = <16 2 1 13>;
> - pcie@0 {
> - reg = <0 0 0 0 0>;
> - #interrupt-cells = <1>;
> - #size-cells = <2>;
> - #address-cells = <3>;
> - device_type = "pci";
> - interrupts = <16 2 1 13>;
> - interrupt-map-mask = <0xf800 0 0 7>;
> - interrupt-map = <
> - /* IDSEL 0x0 */
> - 0000 0 0 1 &mpic 42 1 0 0
> - 0000 0 0 2 &mpic 9 1 0 0
> - 0000 0 0 3 &mpic 10 1 0 0
> - 0000 0 0 4 &mpic 11 1 0 0
> - >;
> - };
> - };
> -};
> --
> 1.7.3.4
>
>
>
> ------------------------------
>
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>
> End of Linuxppc-dev Digest, Vol 87, Issue 61
> ********************************************
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* AUTO: Michael Barry is out of the office (returning 15/11/2011)
From: Michael Barry @ 2011-11-12 4:00 UTC (permalink / raw)
To: linuxppc-dev
I am out of the office until 15/11/2011.
Note: This is an automated response to your message "Linuxppc-dev Digest,
Vol 87, Issue 74" sent on 12/11/2011 1:00:02.
This is the only notification you will receive while this person is away.
^ permalink raw reply
* Re: [PATCH] powerpc kvm: fix kvmppc_start_thread() for CONFIG_SMP=N
From: Michael Neuling @ 2011-11-12 4:07 UTC (permalink / raw)
To: Alexander Graf; +Cc: Paul Mackerras, kvm-ppc, linuxppc-dev
In-Reply-To: <4EBD46F4.5040503@suse.de>
In message <4EBD46F4.5040503@suse.de> you wrote:
> On 11/11/2011 03:03 AM, Michael Neuling wrote:
> > Currently kvmppc_start_thread() tries to wake other SMT threads via
> > xics_wake_cpu(). Unfortunately xics_wake_cpu only exists when
> > CONFIG_SMP=Y so when compiling with CONFIG_SMP=N we get:
> >
> > arch/powerpc/kvm/built-in.o: In function `.kvmppc_start_thread':
> > book3s_hv.c:(.text+0xa1e0): undefined reference to `.xics_wake_cpu'
> >
> > The following should be fine since kvmppc_start_thread() shouldn't
> > called to start non-zero threads when SMP=N since threads_per_core=1.
> >
> > Signed-off-by: Michael Neuling<mikey@neuling.org>
>
> Thanks, applied to kvm-ppc-next. Please CC kvm-ppc@vger next time :).
Thanks will do.
Mikey
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* RE: [PATCH] fsl-rio: fix compile error
From: Liu Gang-B34182 @ 2011-11-12 5:42 UTC (permalink / raw)
To: 'Paul Gortmaker'
Cc: Li Yang-R58472, 'linux-kernel@vger.kernel.org',
Zang Roy-R61911, 'Alexandre.Bounine@idt.com',
'akpm@linux-foundation.org',
'linuxppc-dev@lists.ozlabs.org', Gala Kumar-B11780
In-Reply-To: <4EBD43BB.8090903@windriver.com>
Yes, I'm afraid srio was not enabled when you compiled.
Regards,
Liu Gang
-----Original Message-----
From: Paul Gortmaker [mailto:paul.gortmaker@windriver.com]=20
Sent: Friday, November 11, 2011 11:48 PM
To: Liu Gang-B34182
Cc: linuxppc-dev@lists.ozlabs.org; Alexandre.Bounine@idt.com; akpm@linux-fo=
undation.org; linux-kernel@vger.kernel.org; Li Yang-R58472; Gala Kumar-B117=
80; Zang Roy-R61911
Subject: Re: [PATCH] fsl-rio: fix compile error
On 11-11-11 08:48 AM, Liu Gang wrote:
> The "#include <linux/module.h>" was replaced by "#include <linux/export.h=
>"
> in the patch "powerpc: various straight conversions from module.h --> exp=
ort.h".
> This will cause the following compile problem:
> arch/powerpc/sysdev/fsl_rio.c: In function 'fsl_rio_mcheck_exception':
> arch/powerpc/sysdev/fsl_rio.c:296: error: implicit declaration of functio=
n 'search_exception_tables'.
>=20
> The file fsl_rio.c needs the declaration of function "search_exception_ta=
bles"
> in the header file "linux/module.h".
Thanks -- not sure why this never showed up in my builds of all the powerpc=
configs, _or_ the linux-next builds. Maybe srio isn't enabled in any of t=
hem?=20
In any case it looks fine to me. Having the search_exception_tables live i=
n module.h seems odd, but that is an independent issue for later.
I can queue this unless someone else has already done so.
Paul.
>=20
> Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_rio.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/fsl_rio.c=20
> b/arch/powerpc/sysdev/fsl_rio.c index de170fd..22ffccd 100644
> --- a/arch/powerpc/sysdev/fsl_rio.c
> +++ b/arch/powerpc/sysdev/fsl_rio.c
> @@ -23,7 +23,7 @@
> */
> =20
> #include <linux/init.h>
> -#include <linux/export.h>
> +#include <linux/module.h>
> #include <linux/types.h>
> #include <linux/dma-mapping.h>
> #include <linux/interrupt.h>
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