* Re: [PATCH 7/8] 44x/476fpe: Add 476fpe SoC code
From: Tony Breeds @ 2011-12-03 21:52 UTC (permalink / raw)
To: Josh Boyer; +Cc: LinuxPPC-dev
In-Reply-To: <CA+5PVA67iOfn2L8zjnjKKGhfQzhEFeU2RN90bF+5xU3=p4SN=A@mail.gmail.com>
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On Sat, Dec 03, 2011 at 08:33:40AM -0500, Josh Boyer wrote:
> If the plan is to have them go through my tree, I can fix them up when
> I apply them.
I was expecting them to go through your tree, so it'd be grat if you
didn't mind finxing those up.
Yours Tony
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^ permalink raw reply
* Re: [PATCH] pq3: Add default tbi address
From: Andy Fleming @ 2011-12-03 20:15 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev, Andy Fleming, David Miller, netdev
In-Reply-To: <B84C6222-2359-46D5-BA54-5024E43ECD3F@kernel.crashing.org>
>> arch/powerpc/boot/dts/fsl/pq3-etsec1-0.dtsi | =A0 =A05 +++++
>> arch/powerpc/boot/dts/fsl/pq3-etsec2-0.dtsi | =A0 =A05 +++++
>> 2 files changed, 10 insertions(+), 0 deletions(-)
>
> This doesn't seem correct, meaning this should really be in the board .dt=
s not in the IP.
>
> I think the driver should check and warn if this property doesn't exist.
Hmm... in principle, I agree with you. I suppose I was just being
lazy, and avoiding changing all the device trees again. However, it's
not an unreasonable default. A search through *all* of the device
trees for the tbi node indicates that 0x11 is chosen about 50% of the
time.
However, I'll devise a patch which complains if the node isn't found,
and another patch which modifies all of the offending device trees.
Andy
^ permalink raw reply
* Re: [PATCH v3 05/10] powerpc/mpic: Search for open-pic device-tree node if NULL
From: Kumar Gala @ 2011-12-03 16:05 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev list, Paul Mackerras, Michael Ellerman, Kyle Moffett
In-Reply-To: <1322843287-2745-6-git-send-email-Kyle.D.Moffett@boeing.com>
On Dec 2, 2011, at 10:28 AM, Kyle Moffett wrote:
> Almost all PowerPC platforms use a standard "open-pic" device node so
> the mpic_alloc() function now accepts NULL for the device-node. This
> will cause it to perform a default search with =
of_find_matching_node().
>=20
> Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
> ---
> arch/powerpc/platforms/85xx/corenet_ds.c | 10 +-----
> arch/powerpc/platforms/85xx/ksi8560.c | 14 +--------
> arch/powerpc/platforms/85xx/mpc8536_ds.c | 13 +-------
> arch/powerpc/platforms/85xx/mpc85xx_ads.c | 13 +-------
> arch/powerpc/platforms/85xx/mpc85xx_cds.c | 15 +--------
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 14 ++-------
> arch/powerpc/platforms/85xx/mpc85xx_mds.c | 10 +-----
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 14 +-------
> arch/powerpc/platforms/85xx/p1010rdb.c | 12 +------
> arch/powerpc/platforms/85xx/p1022_ds.c | 14 +--------
> arch/powerpc/platforms/85xx/p1023_rds.c | 11 +------
> arch/powerpc/platforms/85xx/sbc8548.c | 16 +---------
> arch/powerpc/platforms/85xx/sbc8560.c | 13 +-------
> arch/powerpc/platforms/85xx/socrates.c | 11 +------
> arch/powerpc/platforms/85xx/stx_gp3.c | 13 +-------
> arch/powerpc/platforms/85xx/tqm85xx.c | 13 +-------
> arch/powerpc/platforms/85xx/xes_mpc85xx.c | 13 +-------
> arch/powerpc/platforms/86xx/pic.c | 11 +-----
> arch/powerpc/platforms/embedded6xx/holly.c | 10 +-----
> arch/powerpc/platforms/embedded6xx/linkstation.c | 8 +----
> arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c | 10 +-----
> arch/powerpc/platforms/embedded6xx/storcenter.c | 10 +-----
> arch/powerpc/sysdev/mpic.c | 34 =
++++++++++++++++++--
> 23 files changed, 58 insertions(+), 244 deletions(-)
Ben,
What do pseries, cell, & maple really have in there device trees? We =
should be able to move all this into mpic.c
- k=
^ permalink raw reply
* Re: [PATCH v3 02/10] powerpc: Consolidate mpic_alloc() OF address translation
From: Kumar Gala @ 2011-12-03 15:53 UTC (permalink / raw)
To: Kyle Moffett; +Cc: Paul Mackerras, linuxppc-dev, Michael Ellerman
In-Reply-To: <1322843287-2745-3-git-send-email-Kyle.D.Moffett@boeing.com>
On Dec 2, 2011, at 10:27 AM, Kyle Moffett wrote:
> Instead of using the open-coded "reg" property lookup and address
> translation in mpic_alloc(), directly call of_address_to_resource().
> This includes various workarounds for special cases which the naive
> of_address_translate() does not.
>=20
> Afterwards it is possible to remove the copiously copy-pasted calls to
> of_address_translate() from the 85xx/86xx/powermac platforms.
>=20
> Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Paul Mackerras <paulus@samba.org>
> Cc: Grant Likely <grant.likely@secretlab.ca>
> Cc: Kumar Gala <galak@kernel.crashing.org>
> ---
> arch/powerpc/platforms/85xx/corenet_ds.c | 9 +----
> arch/powerpc/platforms/85xx/ksi8560.c | 9 +----
> arch/powerpc/platforms/85xx/mpc8536_ds.c | 9 +----
> arch/powerpc/platforms/85xx/mpc85xx_ads.c | 9 +----
> arch/powerpc/platforms/85xx/mpc85xx_cds.c | 9 +----
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 11 +----
> arch/powerpc/platforms/85xx/mpc85xx_mds.c | 9 +----
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 11 +----
> arch/powerpc/platforms/85xx/p1010rdb.c | 9 +----
> arch/powerpc/platforms/85xx/p1022_ds.c | 9 +----
> arch/powerpc/platforms/85xx/p1023_rds.c | 9 +----
> arch/powerpc/platforms/85xx/sbc8548.c | 9 +----
> arch/powerpc/platforms/85xx/sbc8560.c | 9 +----
> arch/powerpc/platforms/85xx/socrates.c | 9 +----
> arch/powerpc/platforms/85xx/stx_gp3.c | 9 +----
> arch/powerpc/platforms/85xx/tqm85xx.c | 9 +----
> arch/powerpc/platforms/85xx/xes_mpc85xx.c | 9 +----
> arch/powerpc/platforms/86xx/pic.c | 4 +-
> arch/powerpc/platforms/powermac/pic.c | 8 +---
> arch/powerpc/sysdev/mpic.c | 61 =
++++++++++++++++-------------
> 20 files changed, 55 insertions(+), 175 deletions(-)
What about cleaning up:
arch/powerpc/platforms/chrp/setup.c: chrp_mpic =3D mpic_alloc(np, =
opaddr, MPIC_PRIMARY,
arch/powerpc/platforms/embedded6xx/holly.c: mpic =3D =
mpic_alloc(tsi_pic, mpic_paddr,
arch/powerpc/platforms/embedded6xx/linkstation.c: mpic =3D =
mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC
arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c: mpic =3D =
mpic_alloc(tsi_pic, mpic_paddr,
arch/powerpc/platforms/embedded6xx/storcenter.c: mpic =3D =
mpic_alloc(dnp, paddr, MPIC_PRIMARY | MPIC
arch/powerpc/platforms/maple/setup.c: mpic =3D mpic_alloc(mpic_node, =
openpic_addr, flags,
arch/powerpc/platforms/pasemi/setup.c: mpic =3D mpic_alloc(mpic_node, =
openpic_addr,
arch/powerpc/platforms/pseries/setup.c: mpic =3D =
mpic_alloc(pSeries_mpic_node, openpic_addr,
Seems like we should be able to remove the 'phys_addr' argument =
altogether.
- k=
^ permalink raw reply
* Re: [PATCH 7/8] 44x/476fpe: Add 476fpe SoC code
From: Josh Boyer @ 2011-12-03 13:33 UTC (permalink / raw)
To: Benjamin Herrenschmidt, Josh Boyer, LinuxPPC-dev
In-Reply-To: <20111203101116.GA7805@thor.bakeyournoodle.com>
On Sat, Dec 3, 2011 at 5:11 AM, Tony Breeds <tony@bakeyournoodle.com> wrote=
:
> On Sat, Dec 03, 2011 at 07:58:17AM +1100, Benjamin Herrenschmidt wrote:
>> On Thu, 2011-12-01 at 18:39 +1100, Tony Breeds wrote:
>> > Based on original work by David 'Shaggy' Kliekamp.
>>
>> Typo in Shaggy's last name :-)
>
> Rats!
>
> Looks like I stuffed it up once. =A0Do you need me to respin with these
> changes or are the minor enough to be done as the patches are applied?
If the plan is to have them go through my tree, I can fix them up when
I apply them.
josh
^ permalink raw reply
* Re: [PATCH 7/8] 44x/476fpe: Add 476fpe SoC code
From: Tony Breeds @ 2011-12-03 10:11 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: LinuxPPC-dev
In-Reply-To: <1322859497.11728.13.camel@pasglop>
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On Sat, Dec 03, 2011 at 07:58:17AM +1100, Benjamin Herrenschmidt wrote:
> On Thu, 2011-12-01 at 18:39 +1100, Tony Breeds wrote:
> > Based on original work by David 'Shaggy' Kliekamp.
>
> Typo in Shaggy's last name :-)
Rats!
Looks like I stuffed it up once. Do you need me to respin with these
changes or are the minor enough to be done as the patches are applied?
Yours Tony
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^ permalink raw reply
* Re: [PATCH 1/1] Punch a hole in /dev/mem for librtas
From: Segher Boessenkool @ 2011-12-03 3:22 UTC (permalink / raw)
To: Sukadev Bhattiprolu; +Cc: sbest, paulus, anton, linuxppc-dev
In-Reply-To: <20111202222623.GA31354@us.ibm.com>
> +static inline int page_is_rtas_user_buf(unsigned long pfn)
> +{
> + unsigned long paddr = (pfn << PAGE_SHIFT);
> + if (paddr >= rtas_rmo_buf && paddr < (rtas_rmo_buf +
> RTAS_RMOBUF_MAX))
It probably cannot overflow with actual values of rtas_rmo_buf
and RTAS_RMOBUF_MAX, but otherwise it is an incorrect test;
please write
if (paddr >= rtas_rmo_buf && paddr - rtas_rmo_buf < RTAS_RMOBUF_MAX)
(and, _MAX? Shouldn't it be the actual size here? Or is _MAX
just a confusing name :-) )
Segher
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree
From: Scott Wood @ 2011-12-02 23:50 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, kumar.gala
In-Reply-To: <4ED96236.9030505@freescale.com>
On 12/02/2011 05:41 PM, Timur Tabi wrote:
> Scott Wood wrote:
>
>> Nothing that happens in Linux excuses handing Linux a device tree that
>> is wrong. That you need special handling in Linux indicates that this
>> is not a simple-bus.
>
> How about this:
>
> diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts
> index 16239b1..2a62edd 100644
> --- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
> @@ -35,7 +35,11 @@
> &lbc {
> #address-cells = <2>;
> #size-cells = <1>;
> - compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
> + /*
> + * The localbus on the P1022 is not a simple-bus because of the eLBC
> + * pin muxing when the DIU is enabled.
> + */
> + compatible = "fsl,p1022-elbc", "fsl,elbc";
> interrupts = <19 2 0 0>;
> };
>
OK.
-Scott
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree
From: Timur Tabi @ 2011-12-02 23:41 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, kumar.gala
In-Reply-To: <4ED95287.1010606@freescale.com>
Scott Wood wrote:
> Nothing that happens in Linux excuses handing Linux a device tree that
> is wrong. That you need special handling in Linux indicates that this
> is not a simple-bus.
How about this:
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts
index 16239b1..2a62edd 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -35,7 +35,11 @@
&lbc {
#address-cells = <2>;
#size-cells = <1>;
- compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
+ /*
+ * The localbus on the P1022 is not a simple-bus because of the eLBC
+ * pin muxing when the DIU is enabled.
+ */
+ compatible = "fsl,p1022-elbc", "fsl,elbc";
interrupts = <19 2 0 0>;
};
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply related
* Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree
From: Kumar Gala @ 2011-12-02 23:03 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev
In-Reply-To: <1322863714-6818-2-git-send-email-timur@freescale.com>
On Dec 2, 2011, at 4:08 PM, Timur Tabi wrote:
> Add a 32-bit version of the device tree for the Freescale P1022DS =
reference
> board.
>=20
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/boot/dts/p1022ds_32b.dts | 270 =
+++++++++++++++++++++++++++++++++
> 1 files changed, 270 insertions(+), 0 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/p1022ds_32b.dts
look at how mpc8572ds handles 36b.dts we put common definitions in a =
shared file.
- k=
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree
From: Scott Wood @ 2011-12-02 22:34 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, kumar.gala
In-Reply-To: <4ED95006.9010301@freescale.com>
On 12/02/2011 04:24 PM, Timur Tabi wrote:
> Scott Wood wrote:
>
>> Please add something after post to strip simple-bus off of the localbus
>> node's compatible. Either you have board-control@0,0, or you have the
>> other stuff (did you ever find out what the situation with NAND is?) --
>> not both at the same time. Or do you have U-Boot patching in status
>> updates now?
>
> I posted a Linux patch that disables the NOR flash node if video needs to be enabled.
>
> http://patchwork.ozlabs.org/patch/126459/
>
> However, I only now notice that Kumar requested some changes.
Nothing that happens in Linux excuses handing Linux a device tree that
is wrong. That you need special handling in Linux indicates that this
is not a simple-bus.
-Scott
^ permalink raw reply
* [PATCH 1/1] Punch a hole in /dev/mem for librtas
From: Sukadev Bhattiprolu @ 2011-12-02 22:26 UTC (permalink / raw)
To: benh; +Cc: linuxppc-dev, sbest, paulus, anton
Subject: [PATCH 1/1] Punch a hole in /dev/mem for librtas
With CONFIG_STRICT_DEVMEM=y, user space cannot read any part of /dev/mem.
Since this breaks librtas, punch a hole in /dev/mem to allow access to the
rmo_buffer that librtas needs.
Anton Blanchard reported the problem and helped with the fix.
A quick test for this patch:
# cat /proc/rtas/rmo_buffer
000000000f190000 10000
# python -c "print 0x000000000f190000 / 0x10000"
3865
# dd if=/dev/mem of=/tmp/foo count=1 bs=64k skip=3865
1+0 records in
1+0 records out
65536 bytes (66 kB) copied, 0.000205235 s, 319 MB/s
# dd if=/dev/mem of=/tmp/foo
dd: reading `/dev/mem': Operation not permitted
0+0 records in
0+0 records out
0 bytes (0 B) copied, 0.00022519 s, 0.0 kB/s
Changelog[v3]: [Ben Harrenschmidt]: Incremental patch for the punched hole,
since CONFIG_STRICT_DEVMEM was merged into the -next branch.
[Ben Harrenschmidt]: Rename interface to page_is_rtas_user_buf()
move declaration to a header file and ensure it doesn't break
CONFIG_PPC_RTAS=n.
Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/rtas.h | 12 ++++++++++++
arch/powerpc/mm/mem.c | 3 +++
2 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 58625d1..c2d3c9f 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -305,5 +305,17 @@ static inline u32 rtas_config_addr(int busno, int devfn, int reg)
extern void __cpuinit rtas_give_timebase(void);
extern void __cpuinit rtas_take_timebase(void);
+#ifdef CONFIG_PPC_RTAS
+static inline int page_is_rtas_user_buf(unsigned long pfn)
+{
+ unsigned long paddr = (pfn << PAGE_SHIFT);
+ if (paddr >= rtas_rmo_buf && paddr < (rtas_rmo_buf + RTAS_RMOBUF_MAX))
+ return 1;
+ return 0;
+}
+#else
+static inline int page_is_rtas_user_buf(unsigned long pfn) { return 0;}
+#endif
+
#endif /* __KERNEL__ */
#endif /* _POWERPC_RTAS_H */
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 553fb41..05abd49 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -50,6 +50,7 @@
#include <asm/vdso.h>
#include <asm/fixmap.h>
#include <asm/swiotlb.h>
+#include <asm/rtas.h>
#include "mmu_decl.h"
@@ -564,6 +565,8 @@ int devmem_is_allowed(unsigned long pfn)
return 0;
if (!page_is_ram(pfn))
return 1;
+ if (page_is_rtas_user_buf(pfn))
+ return 1;
return 0;
}
#endif /* CONFIG_STRICT_DEVMEM */
--
1.7.0.4
^ permalink raw reply related
* Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree
From: Timur Tabi @ 2011-12-02 22:24 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, kumar.gala
In-Reply-To: <4ED94EF5.2090406@freescale.com>
Scott Wood wrote:
> Please add something after post to strip simple-bus off of the localbus
> node's compatible. Either you have board-control@0,0, or you have the
> other stuff (did you ever find out what the situation with NAND is?) --
> not both at the same time. Or do you have U-Boot patching in status
> updates now?
I posted a Linux patch that disables the NOR flash node if video needs to be enabled.
http://patchwork.ozlabs.org/patch/126459/
However, I only now notice that Kumar requested some changes.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree
From: Scott Wood @ 2011-12-02 22:19 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, kumar.gala
In-Reply-To: <1322863714-6818-2-git-send-email-timur@freescale.com>
On 12/02/2011 04:08 PM, Timur Tabi wrote:
> + lbc: localbus@ffe05000 {
> + reg = <0x0 0xffe05000 0 0x1000>;
> + ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
> + 0x1 0x0 0x0 0xe0000000 0x08000000
> + 0x2 0x0 0x0 0xff800000 0x00040000
> + 0x3 0x0 0x0 0xffdf0000 0x00008000>;
> +
> + /*
> + * This node is used to access the pixis via "indirect" mode,
> + * which is done by writing the pixis register index to chip
> + * select 0 and the value to/from chip select 1. Indirect
> + * mode is the only way to access the pixis when DIU video
> + * is enabled. Note that this assumes that the first column
> + * of the 'ranges' property above is the chip select number.
> + */
> + board-control@0,0 {
> + compatible = "fsl,p1022ds-indirect-pixis";
> + reg = <0x0 0x0 1 /* CS0 */
> + 0x1 0x0 1>; /* CS1 */
> + };
> +
> + nor@0,0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "cfi-flash";
> + reg = <0x0 0x0 0x8000000>;
> + bank-width = <2>;
> + device-width = <1>;
[snip]
> + };
> +
> + nand@2,0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "fsl,elbc-fcm-nand";
> + reg = <0x2 0x0 0x40000>;
[snip]
> + };
> + };
> +
> + board-control@3,0 {
> + compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
> + reg = <3 0 0x30>;
> + interrupt-parent = <&mpic>;
> + /*
> + * IRQ8 is generated if the "EVENT" switch is pressed
> + * and PX_CTL[EVESEL] is set to 00.
> + */
> + interrupts = <8 8 0 0>;
> + };
> + };
[snip]
> +/include/ "fsl/p1022si-post.dtsi"
Please add something after post to strip simple-bus off of the localbus
node's compatible. Either you have board-control@0,0, or you have the
other stuff (did you ever find out what the situation with NAND is?) --
not both at the same time. Or do you have U-Boot patching in status
updates now?
I realize this isn't a 32-bit versus 36-bit issue, but this seemed as
good a time as any to repeat this complaint. :-)
-Scott
^ permalink raw reply
* [PATCH 2/2] powerpc/85xx: add a 32-bit P1022DS device tree
From: Timur Tabi @ 2011-12-02 22:08 UTC (permalink / raw)
To: kumar.gala, linuxppc-dev
In-Reply-To: <1322863714-6818-1-git-send-email-timur@freescale.com>
Add a 32-bit version of the device tree for the Freescale P1022DS reference
board.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
arch/powerpc/boot/dts/p1022ds_32b.dts | 270 +++++++++++++++++++++++++++++++++
1 files changed, 270 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/p1022ds_32b.dts
diff --git a/arch/powerpc/boot/dts/p1022ds_32b.dts b/arch/powerpc/boot/dts/p1022ds_32b.dts
new file mode 100644
index 0000000..18787d9
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1022ds_32b.dts
@@ -0,0 +1,270 @@
+/*
+ * P1022 DS 32-Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public License
+ * version 2. This program is licensed "as is" without any warranty of any
+ * kind, whether express or implied.
+ */
+
+/include/ "fsl/p1022si-pre.dtsi"
+/ {
+ model = "fsl,P1022DS";
+ compatible = "fsl,P1022DS";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg = <0x0 0xffe05000 0 0x1000>;
+ ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
+ 0x1 0x0 0x0 0xe0000000 0x08000000
+ 0x2 0x0 0x0 0xff800000 0x00040000
+ 0x3 0x0 0x0 0xffdf0000 0x00008000>;
+
+ /*
+ * This node is used to access the pixis via "indirect" mode,
+ * which is done by writing the pixis register index to chip
+ * select 0 and the value to/from chip select 1. Indirect
+ * mode is the only way to access the pixis when DIU video
+ * is enabled. Note that this assumes that the first column
+ * of the 'ranges' property above is the chip select number.
+ */
+ board-control@0,0 {
+ compatible = "fsl,p1022ds-indirect-pixis";
+ reg = <0x0 0x0 1 /* CS0 */
+ 0x1 0x0 1>; /* CS1 */
+ };
+
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x8000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ reg = <0x0 0x03000000>;
+ label = "ramdisk-nor";
+ read-only;
+ };
+
+ partition@3000000 {
+ reg = <0x03000000 0x00e00000>;
+ label = "diagnostic-nor";
+ read-only;
+ };
+
+ partition@3e00000 {
+ reg = <0x03e00000 0x00200000>;
+ label = "dink-nor";
+ read-only;
+ };
+
+ partition@4000000 {
+ reg = <0x04000000 0x00400000>;
+ label = "kernel-nor";
+ read-only;
+ };
+
+ partition@4400000 {
+ reg = <0x04400000 0x03b00000>;
+ label = "jffs2-nor";
+ };
+
+ partition@7f00000 {
+ reg = <0x07f00000 0x00080000>;
+ label = "dtb-nor";
+ read-only;
+ };
+
+ partition@7f80000 {
+ reg = <0x07f80000 0x00080000>;
+ label = "u-boot-nor";
+ read-only;
+ };
+ };
+
+ nand@2,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,elbc-fcm-nand";
+ reg = <0x2 0x0 0x40000>;
+
+ partition@0 {
+ reg = <0x0 0x02000000>;
+ label = "u-boot-nand";
+ read-only;
+ };
+
+ partition@2000000 {
+ reg = <0x02000000 0x10000000>;
+ label = "jffs2-nand";
+ };
+
+ partition@12000000 {
+ reg = <0x12000000 0x10000000>;
+ label = "ramdisk-nand";
+ read-only;
+ };
+
+ partition@22000000 {
+ reg = <0x22000000 0x04000000>;
+ label = "kernel-nand";
+ };
+
+ partition@26000000 {
+ reg = <0x26000000 0x01000000>;
+ label = "dtb-nand";
+ read-only;
+ };
+
+ partition@27000000 {
+ reg = <0x27000000 0x19000000>;
+ label = "reserved-nand";
+ };
+ };
+
+ board-control@3,0 {
+ compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
+ reg = <3 0 0x30>;
+ interrupt-parent = <&mpic>;
+ /*
+ * IRQ8 is generated if the "EVENT" switch is pressed
+ * and PX_CTL[EVESEL] is set to 00.
+ */
+ interrupts = <8 8 0 0>;
+ };
+ };
+
+ soc: soc@ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+
+ i2c@3100 {
+ wm8776:codec@1a {
+ compatible = "wlf,wm8776";
+ reg = <0x1a>;
+ /*
+ * clock-frequency will be set by U-Boot if
+ * the clock is enabled.
+ */
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25sl12801";
+ reg = <0>;
+ spi-max-frequency = <40000000>; /* input clock */
+
+ partition@0 {
+ label = "u-boot-spi";
+ reg = <0x00000000 0x00100000>;
+ read-only;
+ };
+ partition@100000 {
+ label = "kernel-spi";
+ reg = <0x00100000 0x00500000>;
+ read-only;
+ };
+ partition@600000 {
+ label = "dtb-spi";
+ reg = <0x00600000 0x00100000>;
+ read-only;
+ };
+ partition@700000 {
+ label = "file system-spi";
+ reg = <0x00700000 0x00900000>;
+ };
+ };
+ };
+
+ ssi@15000 {
+ fsl,mode = "i2s-slave";
+ codec-handle = <&wm8776>;
+ fsl,ssi-asynchronous;
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ };
+
+ usb@23000 {
+ status = "disabled";
+ };
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupts = <3 1 0 0>;
+ reg = <0x1>;
+ };
+ phy1: ethernet-phy@1 {
+ interrupts = <9 1 0 0>;
+ reg = <0x2>;
+ };
+ };
+
+ ethernet@b0000 {
+ phy-handle = <&phy0>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ ethernet@b1000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+ };
+
+ pci0: pcie@ffe09000 {
+ reg = <0x0 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg = <0 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0 0xc0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+ pcie@0 {
+ reg = <0x0 0x0 0x0 0x0 0x0>;
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci2: pcie@ffe0b000 {
+ reg = <0 0xffe0b000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0 0x80000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "fsl/p1022si-post.dtsi"
--
1.7.3.4
^ permalink raw reply related
* [PATCH 1/2] powerpc/85xx: fix localbus and PCI addresses in the P1022DS 36-bit device tree
From: Timur Tabi @ 2011-12-02 22:08 UTC (permalink / raw)
To: kumar.gala, linuxppc-dev
Fix the PCI buses in the 36-bit device tree for the P1022DS. It was using
values copy-pasted from another device tree.
Also fix the NAND localbus bus address from ffa00000 to ff800000, which is
what U-boot sets it to.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
arch/powerpc/boot/dts/p1022ds.dts | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 3e85d8c..a54dd13 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -21,7 +21,7 @@
reg = <0xf 0xffe05000 0 0x1000>;
ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
0x1 0x0 0xf 0xe0000000 0x08000000
- 0x2 0x0 0xf 0xffa00000 0x00040000
+ 0x2 0x0 0xf 0xff800000 0x00040000
0x3 0x0 0xf 0xffdf0000 0x00008000>;
/*
@@ -222,7 +222,7 @@
pci0: pcie@fffe09000 {
reg = <0xf 0xffe09000 0 0x1000>;
- ranges = <0x2000000 0x0 0xa0000000 0xc 0x20000000 0x0 0x20000000
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xe0000000
@@ -237,7 +237,7 @@
pci1: pcie@fffe0a000 {
reg = <0xf 0xffe0a000 0 0x1000>;
- ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x40000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
pcie@0 {
reg = <0x0 0x0 0x0 0x0 0x0>;
@@ -253,7 +253,7 @@
pci2: pcie@fffe0b000 {
reg = <0xf 0xffe0b000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
pcie@0 {
ranges = <0x2000000 0x0 0xe0000000
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH 7/8] 44x/476fpe: Add 476fpe SoC code
From: Benjamin Herrenschmidt @ 2011-12-02 20:58 UTC (permalink / raw)
To: Tony Breeds; +Cc: LinuxPPC-dev
In-Reply-To: <1322725164-4391-8-git-send-email-tony@bakeyournoodle.com>
On Thu, 2011-12-01 at 18:39 +1100, Tony Breeds wrote:
> Based on original work by David 'Shaggy' Kliekamp.
Typo in Shaggy's last name :-)
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 2/8] 44x/pci: Add a want_sdr flag into ppc4xx_pciex_hwops
From: Benjamin Herrenschmidt @ 2011-12-02 20:57 UTC (permalink / raw)
To: Tony Breeds; +Cc: LinuxPPC-dev
In-Reply-To: <1322725164-4391-3-git-send-email-tony@bakeyournoodle.com>
On Thu, 2011-12-01 at 18:39 +1100, Tony Breeds wrote:
> + if (ppc4xx_pciex_hwops->want_sdr == true) {
if (ppc4xx_pciex_hwops->want_sdr) {
Please ! This is a boolean after all :-)
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH 3/3] 8250: add workaround for MPC8[356]xx UART break IRQ storm
From: Scott Wood @ 2011-12-02 17:27 UTC (permalink / raw)
To: Paul Gortmaker
Cc: gregkh, linux-kernel, linux-serial, linuxppc-dev, Alan Cox, alan
In-Reply-To: <4ED8FE14.7020007@windriver.com>
On 12/02/2011 10:34 AM, Paul Gortmaker wrote:
> On 11-12-02 06:30 AM, Alan Cox wrote:
>>>> OK, I'll simply change the above to CONFIG_PPC then.
>>>
>>> It does, the bug is in the uart IP which I don't think we ever plan on fixing, so 32 or 64-bit parts will have it for ever and ever ;)
>>
>> It should be runtime selected, there should be no ifdefs here.
>
> The ifdef wasn't strictly required; it just made it so gcc would
> toss the errata code out of the irq handler for !PPC. Anyway it
> will be a moot point if I can somehow hide all the mess by snooping
> serial_inp() traffic and deploying the errata fix from there....
Eww.
If it's not to be allowed in the main 8250 code (even for ppc builds
only), a custom handle_port sounds like a saner option.
-Scott
^ permalink raw reply
* Re: [PATCH][RFC] fsldma: fix performance degradation by optimizing spinlock use.
From: Ira W. Snyder @ 2011-12-02 17:13 UTC (permalink / raw)
To: Shi Xuelin-B29237
Cc: vinod.koul@intel.com, dan.j.williams@intel.com,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org,
Li Yang-R58472
In-Reply-To: <DBB740589CE8814680DECFE34BE197AB14BCBC@039-SN1MPN1-006.039d.mgd.msft.net>
On Fri, Dec 02, 2011 at 03:47:27AM +0000, Shi Xuelin-B29237 wrote:
> Hi Iris,
>
> >I'm convinced that "smp_rmb()" is needed when removing the spinlock. As noted, Documentation/memory-barriers.txt says that stores on one CPU can be
> >observed by another CPU in a different order.
> >Previously, there was an UNLOCK (in fsl_dma_tx_submit) followed by a LOCK (in fsl_tx_status). This provided a "full barrier", forcing the operations to
> >complete correctly when viewed by the second CPU.
>
> I do not agree this smp_rmb() works here. Because when this smp_rmb() executed and begin to read chan->common.cookie, you still cannot avoid the order issue. Something like one is reading old value, but another CPU is updating the new value.
>
> My point is here the order is not important for the DMA decision.
> Completed DMA tx is decided as not complete is not a big deal, because next time it will be OK.
>
> I believe there is no case that could cause uncompleted DMA tx is decided as completed, because the fsl_tx_status is called after fsl_dma_tx_submit for a specific cookie. If you can give me an example here, I will agree with you.
>
According to memory-barriers.txt, writes to main memory may be observed in
any order if memory barriers are not used. This means that writes can
appear to happen in a different order than they were issued by the CPU.
Citing from the text:
> There are certain things that the Linux kernel memory barriers do not guarantee:
>
> (*) There is no guarantee that any of the memory accesses specified before a
> memory barrier will be _complete_ by the completion of a memory barrier
> instruction; the barrier can be considered to draw a line in that CPU's
> access queue that accesses of the appropriate type may not cross.
Also:
> Without intervention, CPU 2 may perceive the events on CPU 1 in some
> effectively random order, despite the write barrier issued by CPU 1:
Also:
> When dealing with CPU-CPU interactions, certain types of memory barrier should
> always be paired. A lack of appropriate pairing is almost certainly an error.
>
> A write barrier should always be paired with a data dependency barrier or read
> barrier, though a general barrier would also be viable.
Therefore, in an SMP system, the following situation can happen.
descriptor->cookie = 2
chan->common.cookie = 1
chan->completed_cookie = 1
This occurs when CPU-A calls fsl_dma_tx_submit() and then CPU-B calls
dma_async_is_complete() ***after*** CPU-B has observed the write to
descriptor->cookie, and ***before*** before CPU-B has observed the write to
chan->common.cookie.
Remember, without barriers, CPU-B can observe CPU-A's memory accesses in
*any possible order*. Memory accesses are not guaranteed to be *complete*
by the time fsl_dma_tx_submit() returns!
With the above values, dma_async_is_complete() returns DMA_COMPLETE. This
is incorrect: the DMA is still in progress. The required invariant
chan->common.cookie >= descriptor->cookie has not been met.
By adding an smp_rmb(), I force CPU-B to stall until *both* stores in
fsl_dma_tx_submit() (descriptor->cookie and chan->common.cookie) actually
hit main memory. This avoids the above situation: all CPU's observe
descriptor->cookie and chan->common.cookie to update in sync with each
other.
Is this unclear in any way?
Please run your test with the smp_rmb() and measure the performance
impact.
Ira
^ permalink raw reply
* Re: [PATCH 3/3] 8250: add workaround for MPC8[356]xx UART break IRQ storm
From: Paul Gortmaker @ 2011-12-02 16:34 UTC (permalink / raw)
To: Alan Cox; +Cc: gregkh, linux-kernel, linux-serial, Scott Wood, linuxppc-dev,
alan
In-Reply-To: <20111202113059.15d73840@lxorguk.ukuu.org.uk>
On 11-12-02 06:30 AM, Alan Cox wrote:
>>> OK, I'll simply change the above to CONFIG_PPC then.
>>
>> It does, the bug is in the uart IP which I don't think we ever plan on fixing, so 32 or 64-bit parts will have it for ever and ever ;)
>
> It should be runtime selected, there should be no ifdefs here.
The ifdef wasn't strictly required; it just made it so gcc would
toss the errata code out of the irq handler for !PPC. Anyway it
will be a moot point if I can somehow hide all the mess by snooping
serial_inp() traffic and deploying the errata fix from there....
P.
>
^ permalink raw reply
* [PATCH v3 10/10] powerpc/mpic: Add in-core support for cascaded MPICs
From: Kyle Moffett @ 2011-12-02 16:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Paul Mackerras, Michael Ellerman, Kyle Moffett
In-Reply-To: <1322795058.3729.48.camel@pasglop>
The Cell and PowerMac platforms use virtually identical cascaded-IRQ
setup code, so just merge it into the core. Ideally this code would
trigger automatically when an MPIC device-node specifies an "interrupts"
property, perhaps even enabling MPIC_SECONDARY along the way.
Unfortunately, Benjamin Herrenschmidt has had bad experiences in the
past with the quality of Apple PowerMac device-trees, so to be safe we
will only try to parse out an IRQ if the MPIC_SECONDARY flag is set by
the caller.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
---
arch/powerpc/platforms/cell/setup.c | 23 ---------------------
arch/powerpc/platforms/powermac/pic.c | 36 ++++----------------------------
arch/powerpc/sysdev/mpic.c | 30 +++++++++++++++++++++++++-
3 files changed, 33 insertions(+), 56 deletions(-)
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index cd00ca8..62002a7 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -184,24 +184,10 @@ static int __init cell_publish_devices(void)
}
machine_subsys_initcall(cell, cell_publish_devices);
-static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
-{
- struct irq_chip *chip = irq_desc_get_chip(desc);
- struct mpic *mpic = irq_desc_get_handler_data(desc);
- unsigned int virq;
-
- virq = mpic_get_one_irq(mpic);
- if (virq != NO_IRQ)
- generic_handle_irq(virq);
-
- chip->irq_eoi(&desc->irq_data);
-}
-
static void __init mpic_init_IRQ(void)
{
struct device_node *dn;
struct mpic *mpic;
- unsigned int virq;
for (dn = NULL;
(dn = of_find_node_by_name(dn, "interrupt-controller"));) {
@@ -215,15 +201,6 @@ static void __init mpic_init_IRQ(void)
if (mpic == NULL)
continue;
mpic_init(mpic);
-
- virq = irq_of_parse_and_map(dn, 0);
- if (virq == NO_IRQ)
- continue;
-
- printk(KERN_INFO "%s : hooking up to IRQ %d\n",
- dn->full_name, virq);
- irq_set_handler_data(virq, mpic);
- irq_set_chained_handler(virq, cell_mpic_cascade);
}
}
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index b962101..d8aedf1 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -464,18 +464,6 @@ int of_irq_map_oldworld(struct device_node *device, int index,
}
#endif /* CONFIG_PPC32 */
-static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc)
-{
- struct irq_chip *chip = irq_desc_get_chip(desc);
- struct mpic *mpic = irq_desc_get_handler_data(desc);
- unsigned int cascade_irq = mpic_get_one_irq(mpic);
-
- if (cascade_irq != NO_IRQ)
- generic_handle_irq(cascade_irq);
-
- chip->irq_eoi(&desc->irq_data);
-}
-
static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
{
#if defined(CONFIG_XMON) && defined(CONFIG_PPC32)
@@ -526,7 +514,6 @@ static int __init pmac_pic_probe_mpic(void)
{
struct mpic *mpic1, *mpic2;
struct device_node *np, *master = NULL, *slave = NULL;
- unsigned int cascade;
/* We can have up to 2 MPICs cascaded */
for (np = NULL; (np = of_find_node_by_type(np, "open-pic"))
@@ -562,27 +549,14 @@ static int __init pmac_pic_probe_mpic(void)
of_node_put(master);
- /* No slave, let's go out */
- if (slave == NULL)
- return 0;
-
- /* Get/Map slave interrupt */
- cascade = irq_of_parse_and_map(slave, 0);
- if (cascade == NO_IRQ) {
- printk(KERN_ERR "Failed to map cascade IRQ\n");
- return 0;
- }
-
- mpic2 = pmac_setup_one_mpic(slave, 0);
- if (mpic2 == NULL) {
- printk(KERN_ERR "Failed to setup slave MPIC\n");
+ /* Set up a cascaded controller, if present */
+ if (slave) {
+ mpic2 = pmac_setup_one_mpic(slave, 0);
+ if (mpic2 == NULL)
+ printk(KERN_ERR "Failed to setup slave MPIC\n");
of_node_put(slave);
- return 0;
}
- irq_set_handler_data(cascade, mpic2);
- irq_set_chained_handler(cascade, pmac_u3_cascade);
- of_node_put(slave);
return 0;
}
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7611060..4e9ccb1 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1111,6 +1111,22 @@ static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
return 0;
}
+/* IRQ handler for a secondary MPIC cascaded from another IRQ controller */
+static void mpic_cascade(unsigned int irq, struct irq_desc *desc)
+{
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct mpic *mpic = irq_desc_get_handler_data(desc);
+ unsigned int virq;
+
+ BUG_ON(!(mpic->flags & MPIC_SECONDARY));
+
+ virq = mpic_get_one_irq(mpic);
+ if (virq != NO_IRQ)
+ generic_handle_irq(virq);
+
+ chip->irq_eoi(&desc->irq_data);
+}
+
static struct irq_host_ops mpic_host_ops = {
.match = mpic_host_match,
.map = mpic_host_map,
@@ -1402,8 +1418,7 @@ void __init mpic_set_default_senses(struct mpic *mpic, u8 *senses, int count)
void __init mpic_init(struct mpic *mpic)
{
- int i;
- int cpu;
+ int i, cpu;
BUG_ON(mpic->num_sources == 0);
@@ -1488,6 +1503,17 @@ void __init mpic_init(struct mpic *mpic)
GFP_KERNEL);
BUG_ON(mpic->save_data == NULL);
#endif
+
+ /* Check if this MPIC is chained from a parent interrupt controller */
+ if (mpic->flags & MPIC_SECONDARY) {
+ int virq = irq_of_parse_and_map(mpic->node, 0);
+ if (virq != NO_IRQ) {
+ printk(KERN_INFO "%s: hooking up to IRQ %d\n",
+ mpic->node->full_name, virq);
+ irq_set_handler_data(virq, mpic);
+ irq_set_chained_handler(virq, &mpic_cascade);
+ }
+ }
}
void __init mpic_set_clk_ratio(struct mpic *mpic, u32 clock_ratio)
--
1.7.2.5
^ permalink raw reply related
* [PATCH v3 09/10] powerpc/mpic: Cache the device-tree node in "struct mpic"
From: Kyle Moffett @ 2011-12-02 16:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Paul Mackerras, Michael Ellerman, Kyle Moffett
In-Reply-To: <1322795058.3729.48.camel@pasglop>
Store the node pointer in the MPIC during initialization so that all of
the later operational code can just reuse the cached pointer.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
---
arch/powerpc/include/asm/mpic.h | 3 +++
arch/powerpc/sysdev/mpic.c | 33 ++++++++++++++++-----------------
2 files changed, 19 insertions(+), 17 deletions(-)
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index b9d2c0f..67b4d98 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -251,6 +251,9 @@ struct mpic_irq_save {
/* The instance data of a given MPIC */
struct mpic
{
+ /* The OpenFirmware dt node for this MPIC */
+ struct device_node *node;
+
/* The remapper for this MPIC */
struct irq_host *irqhost;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 3240bba..7611060 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -315,26 +315,25 @@ static void _mpic_map_mmio(struct mpic *mpic, phys_addr_t phys_addr,
}
#ifdef CONFIG_PPC_DCR
-static void _mpic_map_dcr(struct mpic *mpic, struct device_node *node,
- struct mpic_reg_bank *rb,
+static void _mpic_map_dcr(struct mpic *mpic, struct mpic_reg_bank *rb,
unsigned int offset, unsigned int size)
{
- phys_addr_t phys_addr = dcr_resource_start(node, 0);
+ phys_addr_t phys_addr = dcr_resource_start(mpic->node, 0);
rb->dhost = dcr_map(mpic->node, phys_addr + offset, size);
BUG_ON(!DCR_MAP_OK(rb->dhost));
}
-static inline void mpic_map(struct mpic *mpic, struct device_node *node,
+static inline void mpic_map(struct mpic *mpic,
phys_addr_t phys_addr, struct mpic_reg_bank *rb,
unsigned int offset, unsigned int size)
{
if (mpic->flags & MPIC_USES_DCR)
- _mpic_map_dcr(mpic, node, rb, offset, size);
+ _mpic_map_dcr(mpic, rb, offset, size);
else
_mpic_map_mmio(mpic, phys_addr, rb, offset, size);
}
#else /* CONFIG_PPC_DCR */
-#define mpic_map(m,n,p,b,o,s) _mpic_map_mmio(m,p,b,o,s)
+#define mpic_map(m,p,b,o,s) _mpic_map_mmio(m,p,b,o,s)
#endif /* !CONFIG_PPC_DCR */
@@ -1172,6 +1171,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
goto err_of_node_put;
mpic->name = name;
+ mpic->node = node;
mpic->paddr = phys_addr;
mpic->hc_irq = mpic_irq_chip;
@@ -1218,13 +1218,13 @@ struct mpic * __init mpic_alloc(struct device_node *node,
mpic->spurious_vec = intvec_top;
/* Check for "big-endian" in device-tree */
- if (of_get_property(node, "big-endian", NULL) != NULL)
+ if (of_get_property(mpic->node, "big-endian", NULL) != NULL)
mpic->flags |= MPIC_BIG_ENDIAN;
- if (of_device_is_compatible(node, "fsl,mpic"))
+ if (of_device_is_compatible(mpic->node, "fsl,mpic"))
mpic->flags |= MPIC_FSL;
/* Look for protected sources */
- psrc = of_get_property(node, "protected-sources", &psize);
+ psrc = of_get_property(mpic->node, "protected-sources", &psize);
if (psrc) {
/* Allocate a bitmap with one bit per interrupt */
unsigned int mapsize = BITS_TO_LONGS(intvec_top + 1);
@@ -1259,15 +1259,15 @@ struct mpic * __init mpic_alloc(struct device_node *node,
#endif
/* Map the global registers */
- mpic_map(mpic, node, mpic->paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
- mpic_map(mpic, node, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
+ mpic_map(mpic, mpic->paddr, &mpic->gregs, MPIC_INFO(GREG_BASE), 0x1000);
+ mpic_map(mpic, mpic->paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
/* Reset */
/* When using a device-node, reset requests are only honored if the MPIC
* is allowed to reset.
*/
- if (of_get_property(node, "pic-no-reset", NULL))
+ if (of_get_property(mpic->node, "pic-no-reset", NULL))
mpic->flags |= MPIC_NO_RESET;
if ((flags & MPIC_WANTS_RESET) && !(mpic->flags & MPIC_NO_RESET)) {
@@ -1315,7 +1315,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
for_each_possible_cpu(i) {
unsigned int cpu = get_hard_smp_processor_id(i);
- mpic_map(mpic, node, mpic->paddr, &mpic->cpuregs[cpu],
+ mpic_map(mpic, mpic->paddr, &mpic->cpuregs[cpu],
MPIC_INFO(CPU_BASE) + cpu * MPIC_INFO(CPU_STRIDE),
0x1000);
}
@@ -1323,13 +1323,13 @@ struct mpic * __init mpic_alloc(struct device_node *node,
/* Initialize main ISU if none provided */
if (mpic->isu_size == 0) {
mpic->isu_size = mpic->num_sources;
- mpic_map(mpic, node, mpic->paddr, &mpic->isus[0],
+ mpic_map(mpic, mpic->paddr, &mpic->isus[0],
MPIC_INFO(IRQ_BASE), MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
}
mpic->isu_shift = 1 + __ilog2(mpic->isu_size - 1);
mpic->isu_mask = (1 << mpic->isu_shift) - 1;
- mpic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
+ mpic->irqhost = irq_alloc_host(mpic->node, IRQ_HOST_MAP_LINEAR,
isu_size ? isu_size : mpic->num_sources,
&mpic_host_ops,
flags & MPIC_LARGE_VECTORS ? 2048 : 256);
@@ -1372,7 +1372,6 @@ struct mpic * __init mpic_alloc(struct device_node *node,
irq_set_default_host(mpic->irqhost);
}
- of_node_put(node);
return mpic;
err_of_node_put:
@@ -1387,7 +1386,7 @@ void __init mpic_assign_isu(struct mpic *mpic, unsigned int isu_num,
BUG_ON(isu_num >= MPIC_MAX_ISU);
- mpic_map(mpic, mpic->irqhost->of_node,
+ mpic_map(mpic,
paddr, &mpic->isus[isu_num], 0,
MPIC_INFO(IRQ_STRIDE) * mpic->isu_size);
--
1.7.2.5
^ permalink raw reply related
* [PATCH v3 08/10] powerpc/mpic: Put "pic-no-reset" test back into the MPIC code
From: Kyle Moffett @ 2011-12-02 16:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Paul Mackerras, Michael Ellerman, Kyle Moffett
In-Reply-To: <1322795058.3729.48.camel@pasglop>
There's not really any reason to have this one-liner in a separate
static inline function, given that all the other similar tests are
already in the alloc_mpic() code.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
---
arch/powerpc/sysdev/mpic.c | 7 +------
1 files changed, 1 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 1e7584b..3240bba 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1118,11 +1118,6 @@ static struct irq_host_ops mpic_host_ops = {
.xlate = mpic_host_xlate,
};
-static int mpic_reset_prohibited(struct device_node *node)
-{
- return node && of_get_property(node, "pic-no-reset", NULL);
-}
-
/*
* Exported functions
*/
@@ -1272,7 +1267,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
/* When using a device-node, reset requests are only honored if the MPIC
* is allowed to reset.
*/
- if (mpic_reset_prohibited(node))
+ if (of_get_property(node, "pic-no-reset", NULL))
mpic->flags |= MPIC_NO_RESET;
if ((flags & MPIC_WANTS_RESET) && !(mpic->flags & MPIC_NO_RESET)) {
--
1.7.2.5
^ permalink raw reply related
* [PATCH v3 07/10] powerpc/mpic: Don't open-code dcr_resource_start
From: Kyle Moffett @ 2011-12-02 16:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linuxppc-dev, Paul Mackerras, Michael Ellerman, Kyle Moffett
In-Reply-To: <1322795058.3729.48.camel@pasglop>
Don't open-code the OpenFirmware "dcr-reg" property lookup trying to map
DCR resources. This makes the code a bit easier to read.
Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com>
---
arch/powerpc/sysdev/mpic.c | 7 ++-----
1 files changed, 2 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 6d42ad1..1e7584b 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -319,11 +319,8 @@ static void _mpic_map_dcr(struct mpic *mpic, struct device_node *node,
struct mpic_reg_bank *rb,
unsigned int offset, unsigned int size)
{
- const u32 *dbasep;
-
- dbasep = of_get_property(node, "dcr-reg", NULL);
-
- rb->dhost = dcr_map(node, *dbasep + offset, size);
+ phys_addr_t phys_addr = dcr_resource_start(node, 0);
+ rb->dhost = dcr_map(mpic->node, phys_addr + offset, size);
BUG_ON(!DCR_MAP_OK(rb->dhost));
}
--
1.7.2.5
^ permalink raw reply related
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