* Re: [RFC PATCH 1/2] KVM: PPC: Book3S HV: Make virtual processor area registration more robust
From: Alexander Graf @ 2012-01-17 12:19 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev@ozlabs.org, kvm-ppc@vger.kernel.org
In-Reply-To: <20120117113140.GA9093@bloggs.ozlabs.ibm.com>
On 17.01.2012, at 12:31, Paul Mackerras wrote:
> On Tue, Jan 17, 2012 at 10:27:26AM +0100, Alexander Graf wrote:
>=20
>> The thing I was getting at was not the map during the lifetime, but
>> the map during registration. Currently we have:
>>=20
>> 1) Set VPA to x
>> 2) Assign feature y to VPA
>> 3) Use VPA
>>=20
>> 1 and 2 are the slow path, 3 occurs more frequently. So we want 3 to
>> be fast. 1 and 2 don't matter that much wrt performance.
>>=20
>> You are currently mapping the VPA at /, which gets you into this
>> map/unmap mess trying to free the previous mapping. If you moved the
>> map to step 2 and only stored the GPA at step 1, all map+unmap
>> operations except for final unmaps would be in one spot, so you
>> wouldn't need to construct this big complex state machine.
>=20
> That might simplify things - I'll try it and see. The worry with
> doing the map/pin at 2 is that if anything goes wrong we no longer
> have the opportunity to return an error for the H_REGISTER_VPA call,
> so I'll have to at least do some checking in 1, leading to possibly
> more code overall.
Well, then map and unmap it in step 1 and map it in step 2 again. We're =
in the slow path so performance isn't critical. Readability and =
maintainability however are :)
Alex
^ permalink raw reply
* Re: Problem with full speed devices on PowerPC MPC5121 host port
From: Matthias Fuchs @ 2012-01-17 14:12 UTC (permalink / raw)
To: Alan Stern; +Cc: Greg KH, linux-usb, linuxppc-dev
In-Reply-To: <Pine.LNX.4.44L0.1201061258040.1326-100000@iolanthe.rowland.org>
On 06.01.2012 19:03, Alan Stern wrote:
> On Fri, 6 Jan 2012, Matthias Fuchs wrote:
>
>> For my eyes it does not really look like a general USB issue.
>> It looks like a problem with the Freescale EHCI implementation that is
>> influenced by high interrupt or internal bus load caused by the flood ping.
>
> Indeed, it might be a problem with the built-in Transaction Translator.
> That would explain why it affect full-speed devices.
>
> However, I would expect the resetting the controller hardware (which
> happens when you reload the ehci-fsl driver) would fix any such issues.
> It's hard to imagine how a problem could survive a reset like that.
I did the tests again. When the error occured I reloaded the ehci-hcd driver and reconnected the device. It ends up with some kernel messages
that come up time after time:
usb 1-1: new full-speed USB device number 2 using fsl-ehci
usb 1-1: device descriptor read/64, error -110
usb 1-1: device descriptor read/64, error -110
usb 1-1: new full-speed USB device number 3 using fsl-ehci
usb 1-1: device descriptor read/64, error -110
usb 1-1: device descriptor read/64, error -110
usb 1-1: new full-speed USB device number 4 using fsl-ehci
usb 1-1: device not accepting address 4, error -110
usb 1-1: new full-speed USB device number 5 using fsl-ehci
usb 1-1: device not accepting address 5, error -110
hub 1-0:1.0: unable to enumerate USB device on port 1
A recommondation from freescale was to check the TXFILLTUNING register settings ("Initialization of this registers can produce problem if full-speed device is used").
So I tried various values in the TXFILLTUNING register (I added this
code to ehci_reset()). Finally I disabled USB streaming mode in the USBMODE register (set bit USBMODE_SDIS - btw., it should be defined as "1 << 4" in ehci_def.h at least for the MPC5121).
All this does not fix the problem or even have an impact.
This is my stripped down version of the test:
on the MPC5121 unit I do nothing but:
$~ stty -F /dev/ttyUSB0 -echo -crtscts -cstopb
$~ stty -F /dev/ttyUSB0 115200
$~ while true; do \
read LINE < /dev/ttyUSB0 \
echo $LINE > /dev/ttyUSB0 \
done
The other side looks like this:
$~ while true; do \
echo "_THE QUICK BROWN FOX JUMPS OVER THE LAZY DOG 1234567890#" > /dev/ttyS0 \
done
and also I start a flood ping against the MPC5121 unit (.. to speed things up).
Can anybody with a MPC5121 board try to reproduce this?
Matthias
^ permalink raw reply
* Re: Cannot wake-up from standby with MPC8313
From: Norbert van Bolhuis @ 2012-01-17 16:56 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <4F1486F1.7000406@freescale.com>
On 01/16/12 21:22, Scott Wood wrote:
> On 01/13/2012 08:13 AM, Norbert van Bolhuis wrote:
>> I dumped SIPNR/SIMSR and uart IIR/EIR (since console triggers wake-up)
>> but they do not change just before entering standby (via
>> mpc6xx_enter_standby
>> which omits setting MSR_POW). uart IRQ is always enabled, unmasked and
>> not pending.
>>
>> I tried to log to physical memory to see what's going on whenever the
>> board fails to wake-up.
>> (I can examine physical memory after CPU is stuck in sleep, by connecting
>> a JTAG debugger, start u-boot and stop after DDR2 SDRAM ctrl is
>> re-configured)
>
> Are you sure this isn't going to disturb anything? Why does U-Boot need
> to be involved, and the SDRAM reconfigured?
>
If CPU is stuck in sleep, JTAG will send HRESET or SRESET (i'm nor sure
which one it is) and u-boot is needed to reconfigure CPU and DDR2 SDRAM ctrl.
SDRAM contents (for physical memory "unknown" to u-boot and linux) seems to
survive such a soft-reset.
>> It looks like an interupt does occur, but do_IRQ seems to be stuck
>> in ppc_md.get_irq=ipic_get_irq where it reads SIVCR.
>
> Stuck as in the load never completes, or as in ipic_get_irq() gets
> called repeatedly? If the latter, what value is it reading out? Is the
> interrupt pending in SIPNR at this point?
>
I think I was wrong. I enabled tracing do_IRQ just a little bit too soon
(in suspend_enter). The interrupt I saw was probably one that occured
just before CPU entered sleep (mpc6xx_enter_standby).
Right now I see no external interrupt happening, so that brings us back
where we were before: I'm not getting an interrupt regardless of low-power state.
So now my main question is: how can JTAG and/or any other external signal
cause this ?
Another weird thing I noticed is that whenever I dump CPU memmap
(which starts at 0xe0000000) under linux it always crashes with a "check stop"
when it is displaying somewhere at 0xe0000800-0xe0001000
If I connect our JTAG debugger it never crashes and dumping CPU memmap
always works.
---
NvBolhuis
^ permalink raw reply
* RE: [PATCH 2/2] Kbuild: Use dtc's -d (dependency) option
From: Stephen Warren @ 2012-01-17 17:20 UTC (permalink / raw)
To: Michal Marek, Mark Salter
Cc: Jonas Bonn, Jon Loeliger, Russell King,
linux-c6x-dev@linux-c6x.org, Arnd Bergmann, Aurelien Jacquiot,
linux@openrisc.net, linux-kbuild@vger.kernel.org, Michal Simek,
Rob Herring, linux-kernel@vger.kernel.org, Paul Mackerras,
microblaze-uclinux@itee.uq.edu.au, linuxppc-dev@lists.ozlabs.org,
Devicetree Discuss, linux-arm-kernel@lists.infradead.org,
David Gibson
In-Reply-To: <4F1206F1.5090405@suse.cz>
Michal Marek wrote at Saturday, January 14, 2012 3:51 PM:
> On 11.1.2012 20:36, Mark Salter wrote:
> > On Mon, 2012-01-09 at 11:38 -0700, Stephen Warren wrote:
> >> This hooks dtc into Kbuild's dependency system.
> >>
> >> Thus, for example, "make dtbs" will rebuild tegra-harmony.dtb if only
> >> tegra20.dtsi has changed yet tegra-harmony.dts has not. The previous
> >> lack of this feature recently caused me to have very confusing "git
> >> bisect" results.
> >>
> >> For ARM, it's obvious what to add to $(targets). I'm not familiar enou=
gh
> >> with other architectures to know what to add there. Powerpc appears to
> >> already add various .dtb files into $(targets), but the other archs ma=
y
> >> need something added to $(targets) to work.
> >>
> >> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> >>
> >
> > Acked-by: Mark Salter <msalter@redhat.com>
> >
> > For the arch/c6x bit.
>=20
> As the C6X port has been merged in this merge window, I can't easily
> apply this patch to my kbuild branch and at the same time please Linus
> by basing the pull request on a tagged release. So I'm going to drop the
> arch/c6x part to keep the kbuild branch "pretty" and let either Mark or
> Stephen send the patch to Linus directly, once he has merged the kbuild
> branch. Would that work?
I was assuming my patches were for 3.4 rather than 3.3, since it's pretty
late for new features in 3.3. In that case, there wouldn't be an issue,
right?
If you do want to go ahead and push my patches into 3.3, your proposal
looks fine to me. Mark, do you want me to push the patch to Linus, or
do you want to pick it up?
Thanks.
--=20
nvpublic
^ permalink raw reply
* RE: [PATCH 2/2] Kbuild: Use dtc's -d (dependency) option
From: Mark Salter @ 2012-01-17 18:26 UTC (permalink / raw)
To: Stephen Warren
Cc: Michal Marek, Jonas Bonn, Jon Loeliger, Russell King,
linux-c6x-dev@linux-c6x.org, Arnd Bergmann, Aurelien Jacquiot,
linux@openrisc.net, linux-kbuild@vger.kernel.org, Michal Simek,
Rob Herring, linux-kernel@vger.kernel.org, Paul Mackerras,
microblaze-uclinux@itee.uq.edu.au, linuxppc-dev@lists.ozlabs.org,
Devicetree Discuss, linux-arm-kernel@lists.infradead.org,
David Gibson
In-Reply-To: <74CDBE0F657A3D45AFBB94109FB122FF17801D2255@HQMAIL01.nvidia.com>
On Tue, 2012-01-17 at 09:20 -0800, Stephen Warren wrote:
> Michal Marek wrote at Saturday, January 14, 2012 3:51 PM:
> > On 11.1.2012 20:36, Mark Salter wrote:
> > > On Mon, 2012-01-09 at 11:38 -0700, Stephen Warren wrote:
> > >> This hooks dtc into Kbuild's dependency system.
> > >>
> > >> Thus, for example, "make dtbs" will rebuild tegra-harmony.dtb if only
> > >> tegra20.dtsi has changed yet tegra-harmony.dts has not. The previous
> > >> lack of this feature recently caused me to have very confusing "git
> > >> bisect" results.
> > >>
> > >> For ARM, it's obvious what to add to $(targets). I'm not familiar enough
> > >> with other architectures to know what to add there. Powerpc appears to
> > >> already add various .dtb files into $(targets), but the other archs may
> > >> need something added to $(targets) to work.
> > >>
> > >> Signed-off-by: Stephen Warren <swarren@nvidia.com>
> > >>
> > >
> > > Acked-by: Mark Salter <msalter@redhat.com>
> > >
> > > For the arch/c6x bit.
> >
> > As the C6X port has been merged in this merge window, I can't easily
> > apply this patch to my kbuild branch and at the same time please Linus
> > by basing the pull request on a tagged release. So I'm going to drop the
> > arch/c6x part to keep the kbuild branch "pretty" and let either Mark or
> > Stephen send the patch to Linus directly, once he has merged the kbuild
> > branch. Would that work?
>
> I was assuming my patches were for 3.4 rather than 3.3, since it's pretty
> late for new features in 3.3. In that case, there wouldn't be an issue,
> right?
>
> If you do want to go ahead and push my patches into 3.3, your proposal
> looks fine to me. Mark, do you want me to push the patch to Linus, or
> do you want to pick it up?
It would probably be best to keep it all together, but if there's a need
to break out c6x individually, I don't mind picking it up.
--Mark
^ permalink raw reply
* Re: [PATCH 2/2][v2] mtd/nand: Fix IFC driver to support 2K NAND page
From: Kumar Gala @ 2012-01-17 18:57 UTC (permalink / raw)
To: Scott Wood; +Cc: Poonam Aggrwal, linuxppc-dev, linux-mtd, Prabhakar Kushwaha
In-Reply-To: <4F0B901C.6020100@freescale.com>
On Jan 9, 2012, at 7:10 PM, Scott Wood wrote:
> On 01/09/2012 06:24 AM, Prabhakar Kushwaha wrote:
>> 1) OOB area should be updated irrespective of NAND page size. Earlier =
it was
>> updated only for 512byte NAND page.
>>=20
>> 2) During OOB update fbcr should be equal to OOB size.
>>=20
>> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
>> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
>> ---
>> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git =
(branch next)
>>=20
>> This patch is created on top of IFC driver patch (already floated in =
mailing
>> list). Please find their link:
>> http://patchwork.ozlabs.org/patch/133315/
>> http://patchwork.ozlabs.org/patch/133316/
>=20
> Looks good.
>=20
> -Scott
Can we not merge all these into one updated IFC NAND patch?
- k=
^ permalink raw reply
* Re: [PATCH 2/2][v2] mtd/nand: Fix IFC driver to support 2K NAND page
From: Scott Wood @ 2012-01-17 19:10 UTC (permalink / raw)
To: Kumar Gala; +Cc: Poonam Aggrwal, linuxppc-dev, linux-mtd, Prabhakar Kushwaha
In-Reply-To: <C8C27406-1682-4316-97D1-00EFB5898805@kernel.crashing.org>
On 01/17/2012 12:57 PM, Kumar Gala wrote:
>
> On Jan 9, 2012, at 7:10 PM, Scott Wood wrote:
>
>> On 01/09/2012 06:24 AM, Prabhakar Kushwaha wrote:
>>> 1) OOB area should be updated irrespective of NAND page size. Earlier it was
>>> updated only for 512byte NAND page.
>>>
>>> 2) During OOB update fbcr should be equal to OOB size.
>>>
>>> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
>>> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
>>> ---
>>> git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git (branch next)
>>>
>>> This patch is created on top of IFC driver patch (already floated in mailing
>>> list). Please find their link:
>>> http://patchwork.ozlabs.org/patch/133315/
>>> http://patchwork.ozlabs.org/patch/133316/
>>
>> Looks good.
>>
>> -Scott
>
> Can we not merge all these into one updated IFC NAND patch?
Sure, once we've agreed on what the right fix is for the is_blank issue
(and I think we're pretty close). It's been useful to see these fixes
as separate patches during the review/iteration phase, though.
-Scott
^ permalink raw reply
* Re: Cannot wake-up from standby with MPC8313
From: Scott Wood @ 2012-01-17 22:09 UTC (permalink / raw)
To: Norbert van Bolhuis; +Cc: linuxppc-dev@ozlabs.org
In-Reply-To: <4F15A83C.7020805@aimvalley.nl>
On 01/17/2012 10:56 AM, Norbert van Bolhuis wrote:
> On 01/16/12 21:22, Scott Wood wrote:
>> On 01/13/2012 08:13 AM, Norbert van Bolhuis wrote:
>>> I dumped SIPNR/SIMSR and uart IIR/EIR (since console triggers wake-up)
>>> but they do not change just before entering standby (via
>>> mpc6xx_enter_standby
>>> which omits setting MSR_POW). uart IRQ is always enabled, unmasked and
>>> not pending.
>>>
>>> I tried to log to physical memory to see what's going on whenever the
>>> board fails to wake-up.
>>> (I can examine physical memory after CPU is stuck in sleep, by
>>> connecting
>>> a JTAG debugger, start u-boot and stop after DDR2 SDRAM ctrl is
>>> re-configured)
>>
>> Are you sure this isn't going to disturb anything? Why does U-Boot need
>> to be involved, and the SDRAM reconfigured?
>>
>
>
> If CPU is stuck in sleep, JTAG will send HRESET or SRESET (i'm nor sure
> which one it is) and u-boot is needed to reconfigure CPU and DDR2 SDRAM
> ctrl.
Why is a reset needed in order to examine physical memory?
> SDRAM contents (for physical memory "unknown" to u-boot and linux) seems to
> survive such a soft-reset.
And all register and device state is as Linux left it?
>>> It looks like an interupt does occur, but do_IRQ seems to be stuck
>>> in ppc_md.get_irq=ipic_get_irq where it reads SIVCR.
>>
>> Stuck as in the load never completes, or as in ipic_get_irq() gets
>> called repeatedly? If the latter, what value is it reading out? Is the
>> interrupt pending in SIPNR at this point?
>>
>
>
> I think I was wrong. I enabled tracing do_IRQ just a little bit too soon
> (in suspend_enter). The interrupt I saw was probably one that occured
> just before CPU entered sleep (mpc6xx_enter_standby).
>
> Right now I see no external interrupt happening, so that brings us back
> where we were before: I'm not getting an interrupt regardless of
> low-power state.
> So now my main question is: how can JTAG and/or any other external signal
> cause this ?
I can't help you with the hardware side of it, other than to say that it
sounds similar to an issue we had on early revs of mpc8313erdb. Could
you make sure that TRST (JTAG Test Reset) is not being asserted except
while PORESET is asserted?
If that's not it, I'm wondering what the relevant difference is on the
software side to differentiate the case where you go through all the
motions but don't set MSR[POW] from the case where you don't try to
suspend at all (just take the interrupt during normal execution). Are
you sure that you're making it to mpc6xx_enter_standby, and that it's
not hanging on a PMC register access?
> Another weird thing I noticed is that whenever I dump CPU memmap
> (which starts at 0xe0000000) under linux it always crashes with a "check
> stop"
> when it is displaying somewhere at 0xe0000800-0xe0001000
> If I connect our JTAG debugger it never crashes and dumping CPU memmap
> always works.
Is it 0xe0000bXX? A hang when accessing the PMC registers is what I saw
with the mpc8313erdb bug.
-Scott
^ permalink raw reply
* [git pull] Please pull powerpc.git merge branch
From: Kumar Gala @ 2012-01-17 22:26 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
Ben,
Pulled in a few other minor fixes, in addition the the compile issue on
p1022.
- k
The following changes since commit c2bc3a316a7281f67e36b34dac2802cbe36a9128:
Merge branch 'x86/rdrand' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip (2012-01-16 18:23:09 -0800)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git merge
Jerry Huang (1):
powerpc/85xx: Fix cmd12 bug and add the chip compatible for eSDHC
Julia Lawall (1):
arch/powerpc/sysdev/fsl_pci.c: add missing iounmap
Michael Neuling (1):
powerpc: fix compile error with 85xx/p1022_ds.c
Zhicheng Fan (1):
powerpc/85xx: Fix minor issues in P1020RDB device tree
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 4 ++++
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 3 ++-
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi | 3 +++
arch/powerpc/boot/dts/fsl/p1022si-post.dtsi | 3 ++-
arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 4 ++++
arch/powerpc/boot/dts/p1020rdb.dts | 2 +-
arch/powerpc/boot/dts/p1020rdb_36b.dts | 2 +-
arch/powerpc/platforms/85xx/p1022_ds.c | 1 +
arch/powerpc/sysdev/fsl_pci.c | 5 +++--
9 files changed, 21 insertions(+), 6 deletions(-)
^ permalink raw reply
* Re: [PATCH v2] DTS: fix cmd12 bug and add the chip compatible for eSDHC
From: Kumar Gala @ 2012-01-17 22:41 UTC (permalink / raw)
To: <r66093@freescale.com>; +Cc: Jerry Huang, linuxppc-dev
In-Reply-To: <1325727656-18672-1-git-send-email-r66093@freescale.com>
On Jan 4, 2012, at 7:40 PM, <r66093@freescale.com> =
<r66093@freescale.com> wrote:
> From: Jerry Huang <Chang-Ming.Huang@freescale.com>
>=20
> Accordint to latest kernel, the auto-cmd12 property should be
> "sdhci,auto-cmd12", and according to the SDHC binding and the =
workaround for
> the special chip, add the chip compatible for eSDHC: =
"fsl,p1022-esdhc",
> "fsl,mpc8536-esdhc", "fsl,p2020-esdhc" and "fsl,p1010-esdhc".
>=20
> Signed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com>
> ---
> changes for v2:
> - reverse the special compatible entries
>=20
> arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 4 ++++
> arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/p1022si-post.dtsi | 3 ++-
> arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 4 ++++
> 4 files changed, 12 insertions(+), 2 deletions(-)
applied to merge
- k=
^ permalink raw reply
* Re: [PATCH] powerpc/dts: update dts for p1020rdb
From: Kumar Gala @ 2012-01-17 22:41 UTC (permalink / raw)
To: Zhicheng Fan; +Cc: linuxppc-dev
In-Reply-To: <1326362665-9715-1-git-send-email-B32736@freescale.com>
On Jan 12, 2012, at 4:04 AM, Zhicheng Fan wrote:
> nand: Sync base address with U-boot
> sdhc: Add suppot auto cmd12
>
> Signed-off-by: Zhicheng Fan <B32736@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/p1020si-post.dtsi | 3 +++
> arch/powerpc/boot/dts/p1020rdb.dts | 2 +-
> arch/powerpc/boot/dts/p1020rdb_36b.dts | 2 +-
> 3 files changed, 5 insertions(+), 2 deletions(-)
applied to merge
- k
^ permalink raw reply
* Re: [PATCH 12/15] arch/powerpc/sysdev/fsl_pci.c: add missing iounmap
From: Kumar Gala @ 2012-01-17 22:41 UTC (permalink / raw)
To: Julia Lawall
Cc: devicetree-discuss, kernel-janitors, linux-kernel, Rob Herring,
linuxppc-dev
In-Reply-To: <1326362117-29371-12-git-send-email-Julia.Lawall@lip6.fr>
On Jan 12, 2012, at 3:55 AM, Julia Lawall wrote:
> From: Julia Lawall <Julia.Lawall@lip6.fr>
>
> Add missing iounmap in error handling code, in a case where the function
> already preforms iounmap on some other execution path.
>
> A simplified version of the semantic match that finds this problem is as
> follows: (http://coccinelle.lip6.fr/)
>
> // <smpl>
> @@
> expression e;
> statement S,S1;
> int ret;
> @@
> e = \(ioremap\|ioremap_nocache\)(...)
> ... when != iounmap(e)
> if (<+...e...+>) S
> ... when any
> when != iounmap(e)
> *if (...)
> { ... when != iounmap(e)
> return ...; }
> ... when any
> iounmap(e);
> // </smpl>
>
> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
>
> ---
> arch/powerpc/sysdev/fsl_pci.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
applied to merge
- k
^ permalink raw reply
* Re: [RFC 13/14] irq_domain: Remove 'new' irq_domain in favour of the ppc one
From: Grant Likely @ 2012-01-18 0:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: sfr, Russell King, linux-arm-msm, linux-kernel, Rob Herring,
Michael Bohan, Thomas Gleixner, linuxppc-dev,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <1326771731.26116.29.camel@pasglop>
On Mon, Jan 16, 2012 at 8:42 PM, Benjamin Herrenschmidt
<benh@kernel.crashing.org> wrote:
> On Mon, 2012-01-16 at 18:43 -0800, Michael Bohan wrote:
>>
>> I was planning on sending these patches out, but it seems like with
>> Grant's patches, they may no longer be up to date. I was curious if any
>> thought was given to supporting configurations like this the one I
>> mentioned with the advent of these patches. I am happy to help test if
>> you can steer me in the right direction.
>
> I haven't had a chance to look in detail at what Grant is doing in his
> latest series, but the ppc domain scheme that he's basing it on has the
> concept of sparse interrupt domains.
>
> For these, we use a radix tree for the reverse map (we do not rely on a
> linear range) and we "allocate" linux IRQ numbers on-demand as we create
> mapping for individual HW interrupts.
My latest patches are primarily a direct port of the ppc code to be
generic for all architectures, and it does pretty much what you want.
As Ben suggests, you should look at the radix revmap code. Use the
irq_domain_add_tree() function for creating the irq_domain, and there
is no need to even pre-allocate the number of hwirqs that you want to
support. It uses a radix tree to manage arbitrary mappings from hwirq
number to linux numbers.
The other option is the linear map which maintains a static array with
one entry per hwirq number. Use irq_domain_add_linear() to create one
and pass in the maximum number of hwirqs supported by the controller.
It will allocate an array of irq_desc* so that irq_descs can be
allocated dynamically.
It is also important to note that for both these revmaps, the actual
virq number is irrelevant. The irq_domain is entirely responsible for
allocation and management. There will be no need for a 'chunk of
virqs' assigned to an irq controller.
BTW: Ben, if you can carve out some time, I'd appreciate a look over
my series and make sure you're okay with it. Once it's had some
testing by arm and ppc folks, I want to get it into linux-next.
g.
^ permalink raw reply
* Re: [RFC 06/14] irq_domain/powerpc: Eliminate virq_is_host()
From: Grant Likely @ 2012-01-18 0:38 UTC (permalink / raw)
To: Milton Miller; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <keep-irq-is-domain@mdm.bga.com>
On Thu, Jan 12, 2012 at 3:17 AM, Milton Miller <miltonm@bga.com> wrote:
> On Wed Jan 11 2012 about 15:24:34 EST, Grant Likely wrote:
>> There is only one user, and it is trivial to open-code.
>
> I added virq_is_host because I had planned to change how we find the
> host (domain) from a virq.
>
> Instead of storing a pointer in irq_desc (a pointer for every irq),
> I planned to use a NR_IRQ(+extra) bitmap per domain. =A0This should be
> a win storage-wise when the number of irq controllers is less than the
> number of bits in a long.
>
> This would also convert scanning for a reverse map from walking every
> irqdesc to walking find_next_bit over the irqs assigned to the host.
>
> Thus my rule was "code outside kernel/irq must not touch domain";
> both the contents and how it was associated were abstracted.
>
> Other planned changes included splitting the reverse lookup into
> domain dependent pieces, creating the ida for sparse map at domain
> creation time (init irq is after radix_tree_init as its used by the
> current irq code) so we never fall back to linear search. =A0Linear
> populated the reverse map as the irq was assigned, and changed to
> a seperate subtype if it mapped an irq above the map size.
>
> I thought some of the domains would be split into seperate files
> selected by Kconfig, at least the sparse tree.
>
> There was also a nomap varient to handle iseries (and one of the cell
> varients) where the interrupt number to use for an event is controlled
> by the guest, that led to the discussion with tlgx about how to
> disallow the extra irqs above the limit set by the arch callback.
>
> Actually making virq-is-domain a domain callback could eliminate the
> need for the bitmap on legacy (range limited) domains.
>
>
> I have my work in progress patches from 2.6.39 if you would like to
> see them. =A0I was trying to clean up powerpc before pushing it over,
> and didn't get all the concepts written. =A0So I just sent Ben what
> was ready at the time and haven't had time to get back to it.
Go ahead and send me your patches. I'll see what I can add into my series.
> Overall, I think most of the other concepts are ok, although I would
> have chosen to remove NO_IRQ before moving the code, and probably
> the rename from host to domain.
Haha. Yeah, I debated reordering those a bit, but it would have
created a bunch of rebase work for little benefit. Unless someone
really complains loudly, I'm going to leave it in the order as is.
> =A0I haven't studied the patches in
> detail since your tree is based on linux-next and my drive doesn't
> have space for that. =A0It took me a while to realize the code removed
> from the header file in 4/14 (powerpc use commmon host) was actually
> moved to irq-domain in 1/14 (a comment to that effect would be nice).
Okay, I'll add a comment to that effect. If I rebase to Linus' tree
after 3.3-rc1 is released, can you help me test?
g.
^ permalink raw reply
* Re: [PATCH][SDK v1.2] sata: I/O load balancing
From: Jeff Garzik @ 2012-01-18 1:45 UTC (permalink / raw)
To: Liu Qiang-B32616
Cc: linux-ide@vger.kernel.org, linuxppc-dev@lists.ozlabs.org,
Li Yang-R58472, linux-kernel@vger.kernel.org
In-Reply-To: <BCB48C05FCE8BC4D9E61E841ECBE6DB701320C@039-SN2MPN1-011.039d.mgd.msft.net>
On 01/13/2012 04:57 AM, Liu Qiang-B32616 wrote:
> No, I didn't test small file. I think this won't affect system load. I can have a test
> and describe the result in next patch.
Please do...
^ permalink raw reply
* Re: [RFC 13/14] irq_domain: Remove 'new' irq_domain in favour of the ppc one
From: Benjamin Herrenschmidt @ 2012-01-18 2:16 UTC (permalink / raw)
To: Grant Likely
Cc: sfr, Russell King, linux-arm-msm, linux-kernel, Rob Herring,
Michael Bohan, Thomas Gleixner, linuxppc-dev,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <CACxGe6ufk+BUoXZBKm5Q-O1Aj1j=18fJ5KjOC-fKQMbpw4z=mw@mail.gmail.com>
On Tue, 2012-01-17 at 17:28 -0700, Grant Likely wrote:
> BTW: Ben, if you can carve out some time, I'd appreciate a look over
> my series and make sure you're okay with it. Once it's had some
> testing by arm and ppc folks, I want to get it into linux-next.
I intend to do so but not while I'm at LCA :-)
Cheers,
Ben.
^ permalink raw reply
* [PATCH] mtd/nand:Fix wrong usage of is_blank() in fsl_ifc_run_command
From: Prabhakar Kushwaha @ 2012-01-18 4:13 UTC (permalink / raw)
To: linuxppc-dev, linux-mtd; +Cc: Scott Wood, Poonam Aggrwal, Prabhakar Kushwaha
Freescale IFC NAND Machine calculates ECC on 512byte sector and same is used in
fsl_ifc_run_command() during ECC status verification. Also this sector is passed
to is_blank() for blank checking. It is wrong at first place because
is_blank()'s implementation checks for Page size and OOB area size.
is_blank() should be called per page for main and OOB area verification.
Variables name are redefined to avoid confusion between buffer and ecc sector.
Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
---
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git (branch next)
Tested on P1010RDB
This patch is created on top of IFC driver patch (already floated in mailing
list). Please find their link:
http://patchwork.ozlabs.org/patch/133315/
http://patchwork.ozlabs.org/patch/133316/
This patch is replacement of my earlier patch
"mtd/nand:Fix wrong address read in is_blank()"
drivers/mtd/nand/fsl_ifc_nand.c | 52 +++++++++++++++++++++------------------
1 files changed, 28 insertions(+), 24 deletions(-)
diff --git a/drivers/mtd/nand/fsl_ifc_nand.c b/drivers/mtd/nand/fsl_ifc_nand.c
index 854fe95..33b55d2 100644
--- a/drivers/mtd/nand/fsl_ifc_nand.c
+++ b/drivers/mtd/nand/fsl_ifc_nand.c
@@ -1,7 +1,7 @@
/*
* Freescale Integrated Flash Controller NAND driver
*
- * Copyright 2011 Freescale Semiconductor, Inc
+ * Copyright 2011,2012 Freescale Semiconductor, Inc
*
* Author: Dipen Dudhat <Dipen.Dudhat@freescale.com>
*
@@ -216,24 +216,11 @@ static int check_read_ecc(struct mtd_info *mtd, struct fsl_ifc_ctrl *ctrl,
u32 *eccstat, unsigned int bufnum)
{
u32 reg = eccstat[bufnum / 4];
- int errors = (reg >> ((3 - bufnum % 4) * 8)) & 15;
+ int errors;
- if (errors == 15) { /* uncorrectable */
- /* Blank pages fail hw ECC checks */
- if (is_blank(mtd, bufnum))
- return 1;
+ errors = (reg >> ((3 - bufnum % 4) * 8)) & 15;
- /*
- * We disable ECCER reporting in hardware due to
- * erratum IFC-A002770 -- so report it now if we
- * see an uncorrectable error in ECCSTAT.
- */
- ctrl->nand_stat |= IFC_NAND_EVTER_STAT_ECCER;
- } else if (errors > 0) {
- mtd->ecc_stats.corrected += errors;
- }
-
- return 0;
+ return errors;
}
/*
@@ -273,16 +260,33 @@ static void fsl_ifc_run_command(struct mtd_info *mtd)
dev_err(priv->dev, "NAND Flash Write Protect Error\n");
if (nctrl->eccread) {
- int bufperpage = mtd->writesize / 512;
- int bufnum = (nctrl->page & priv->bufnum_mask) * bufperpage;
- int bufnum_end = bufnum + bufperpage - 1;
+ int errors;
+ int bufnum = nctrl->page & priv->bufnum_mask;
+ int sector = bufnum * chip->ecc.steps;
+ int sector_end = sector + chip->ecc.steps - 1;
- for (i = bufnum / 4; i <= bufnum_end / 4; i++)
+ for (i = sector / 4; i <= sector_end / 4; i++)
eccstat[i] = in_be32(&ifc->ifc_nand.nand_eccstat[i]);
- for (i = bufnum; i <= bufnum_end; i++) {
- if (check_read_ecc(mtd, ctrl, eccstat, i))
+ for (i = sector; i <= sector_end; i++) {
+ errors = check_read_ecc(mtd, ctrl, eccstat, i);
+
+ if (errors == 15) {
+ /*
+ * Uncorrectable error.
+ * OK only if the whole page is blank.
+ *
+ * We disable ECCER reporting due to...
+ * erratum IFC-A002770 -- so report it now if we
+ * see an uncorrectable error in ECCSTAT.
+ */
+ if (!is_blank(mtd, bufnum))
+ ctrl->nand_stat |=
+ IFC_NAND_EVTER_STAT_ECCER;
break;
+ }
+
+ mtd->ecc_stats.corrected += errors;
}
nctrl->eccread = 0;
--
1.7.5.4
^ permalink raw reply related
* error: ‘cpus_in_crash’ defined but not used
From: Christian Kujau @ 2012-01-18 4:13 UTC (permalink / raw)
To: LKML; +Cc: linuxppc-dev
Hi,
compiling today's git (mainline, a25a2b8) on powerpc32 gives:
CC arch/powerpc/kernel/crash.o
cc1: warnings being treated as errors
/usr/local/src/linux-2.6-git/arch/powerpc/kernel/crash.c:49: error:
‘cpus_in_crash’ defined but not used
make[2]: *** [arch/powerpc/kernel/crash.o] Error 1
make[1]: *** [arch/powerpc/kernel] Error 2
make: *** [sub-make] Error 2
I think I've seen some discussion on the list where
"treat-warnings-as-errors" for powerpc were discussed a while ago, but
cannot remember for sure right now. Full .config:
http://nerdbynature.de/bits/3.2.0/
Thanks,
Christian.
--
BOFH excuse #149:
Dew on the telephone lines.
^ permalink raw reply
* Re: error: 'cpus_in_crash' defined but not used
From: Christian Kujau @ 2012-01-18 5:13 UTC (permalink / raw)
To: LKML; +Cc: linuxppc-dev
In-Reply-To: <alpine.DEB.2.01.1201172006310.2895@trent.utfs.org>
On Tue, 17 Jan 2012 at 20:13, Christian Kujau wrote:
>
> compiling today's git (mainline, a25a2b8) on powerpc32 gives:
>
> CC arch/powerpc/kernel/crash.o
> cc1: warnings being treated as errors
> /usr/local/src/linux-2.6-git/arch/powerpc/kernel/crash.c:49: error:
> ‘cpus_in_crash’ defined but not used
> make[2]: *** [arch/powerpc/kernel/crash.o] Error 1
> make[1]: *** [arch/powerpc/kernel] Error 2
> make: *** [sub-make] Error 2
I could not find cpus_in_crash anywhere in the sourcetree, except for
arch/powerpc/kernel/crash.c. Moving the definition into the CONFIG_SMP
ifdef helps on my UP system, of course - not sure about other machines
though:
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index 28be345..abef751 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -46,7 +46,6 @@
/* This keeps a track of which one is the crashing cpu. */
int crashing_cpu = -1;
-static atomic_t cpus_in_crash;
static int time_to_dump;
#define CRASH_HANDLER_MAX 3
@@ -66,6 +65,7 @@ static int handle_fault(struct pt_regs *regs)
#ifdef CONFIG_SMP
+static atomic_t cpus_in_crash;
void crash_ipi_callback(struct pt_regs *regs)
{
static cpumask_t cpus_state_saved = CPU_MASK_NONE;
Christian.
--
BOFH excuse #272:
Netscape has crashed
^ permalink raw reply related
* [PATCH] powerpc/85xx:Add usb controller version info
From: Ramneek Mehresh @ 2012-01-18 5:40 UTC (permalink / raw)
To: linuxppc-dev; +Cc: devicetree-discuss, Ramneek Mehresh
Add usb controller version info for the following:
MPC8536, P1010, P1020, P1021, P1022, P1023, P2020, P2041,
P3041, P3060, P5020
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
---
Applies on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
(branch next)
arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi | 4 ++--
arch/powerpc/boot/dts/fsl/p1010si-post.dtsi | 3 +++
arch/powerpc/boot/dts/fsl/p1020si-post.dtsi | 6 ++++++
arch/powerpc/boot/dts/fsl/p1021si-post.dtsi | 3 +++
arch/powerpc/boot/dts/fsl/p1022si-post.dtsi | 6 ++++++
arch/powerpc/boot/dts/fsl/p1023si-post.dtsi | 3 +++
arch/powerpc/boot/dts/fsl/p2020si-post.dtsi | 3 +++
arch/powerpc/boot/dts/fsl/p2041si-post.dtsi | 2 ++
arch/powerpc/boot/dts/fsl/p3041si-post.dtsi | 2 ++
arch/powerpc/boot/dts/fsl/p3060si-post.dtsi | 6 ++++++
arch/powerpc/boot/dts/fsl/p5020si-post.dtsi | 2 ++
11 files changed, 38 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
index 89af626..88026e5 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8536si-post.dtsi
@@ -202,7 +202,7 @@
/include/ "pq3-etsec1-timer-0.dtsi"
usb@22000 {
- compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
+ compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
reg = <0x22000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
@@ -210,7 +210,7 @@
};
usb@23000 {
- compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
+ compatible = "fsl-usb2-mph-v1.2", "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
reg = <0x23000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
index bd9e163..8245931 100644
--- a/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1010si-post.dtsi
@@ -156,6 +156,9 @@
/include/ "pq3-dma-0.dtsi"
/include/ "pq3-usb2-dr-0.dtsi"
+ usb@22000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
+ };
/include/ "pq3-esdhc-0.dtsi"
sdhc@2e000 {
fsl,sdhci-auto-cmd12;
diff --git a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
index fc924c5..10c75ca 100644
--- a/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1020si-post.dtsi
@@ -142,7 +142,13 @@
/include/ "pq3-dma-0.dtsi"
/include/ "pq3-usb2-dr-0.dtsi"
+ usb@22000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
+ };
/include/ "pq3-usb2-dr-1.dtsi"
+ usb@23000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
+ };
/include/ "pq3-esdhc-0.dtsi"
/include/ "pq3-sec3.3-0.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
index 38ba54d..f157ffd 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -142,6 +142,9 @@
/include/ "pq3-dma-0.dtsi"
/include/ "pq3-usb2-dr-0.dtsi"
+ usb@22000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
+ };
/include/ "pq3-esdhc-0.dtsi"
/include/ "pq3-sec3.3-0.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
index 16239b1..acb933e 100644
--- a/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1022si-post.dtsi
@@ -199,7 +199,13 @@
/include/ "pq3-dma-0.dtsi"
/include/ "pq3-usb2-dr-0.dtsi"
+ usb@22000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
+ };
/include/ "pq3-usb2-dr-1.dtsi"
+ usb@23000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
+ };
/include/ "pq3-esdhc-0.dtsi"
sdhc@2e000 {
diff --git a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
index b06bb4c..941fa15 100644
--- a/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1023si-post.dtsi
@@ -142,6 +142,9 @@
/include/ "pq3-dma-0.dtsi"
/include/ "pq3-usb2-dr-0.dtsi"
+ usb@22000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
+ };
crypto: crypto@300000 {
compatible = "fsl,sec-v4.2", "fsl,sec-v4.0";
diff --git a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
index c041050..6772299 100644
--- a/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2020si-post.dtsi
@@ -171,6 +171,9 @@
/include/ "pq3-dma-0.dtsi"
/include/ "pq3-usb2-dr-0.dtsi"
+ usb@22000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl-usb2-dr";
+ };
/include/ "pq3-etsec1-0.dtsi"
/include/ "pq3-etsec1-timer-0.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
index 234a399..531eab8 100644
--- a/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p2041si-post.dtsi
@@ -309,12 +309,14 @@
/include/ "qoriq-gpio-0.dtsi"
/include/ "qoriq-usb2-mph-0.dtsi"
usb0: usb@210000 {
+ compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
phy_type = "utmi";
port0;
};
/include/ "qoriq-usb2-dr-0.dtsi"
usb1: usb@211000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
dr_mode = "host";
phy_type = "utmi";
};
diff --git a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
index d41d08d..af4ebc8 100644
--- a/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3041si-post.dtsi
@@ -336,12 +336,14 @@
/include/ "qoriq-gpio-0.dtsi"
/include/ "qoriq-usb2-mph-0.dtsi"
usb0: usb@210000 {
+ compatible = "fsl-usb2-mph-v1.6", "fsl-usb2-mph";
phy_type = "utmi";
port0;
};
/include/ "qoriq-usb2-dr-0.dtsi"
usb1: usb@211000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
dr_mode = "host";
phy_type = "utmi";
};
diff --git a/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
index a63edd1..b3e5692 100644
--- a/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
@@ -291,6 +291,12 @@
/include/ "qoriq-duart-1.dtsi"
/include/ "qoriq-gpio-0.dtsi"
/include/ "qoriq-usb2-mph-0.dtsi"
+ usb@210000 {
+ compatible = "fsl-usb2-mph-v2.2", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
+ };
/include/ "qoriq-usb2-dr-0.dtsi"
+ usb@211000 {
+ compatible = "fsl-usb2-dr-v2.2", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
+ };
/include/ "qoriq-sec4.1-0.dtsi"
};
diff --git a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
index 914074b..64b6abe 100644
--- a/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p5020si-post.dtsi
@@ -339,12 +339,14 @@
/include/ "qoriq-gpio-0.dtsi"
/include/ "qoriq-usb2-mph-0.dtsi"
usb0: usb@210000 {
+ compatible = "fsl-usb2-mph-v1.6", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
phy_type = "utmi";
port0;
};
/include/ "qoriq-usb2-dr-0.dtsi"
usb1: usb@211000 {
+ compatible = "fsl-usb2-dr-v1.6", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
dr_mode = "host";
phy_type = "utmi";
};
--
1.7.1
^ permalink raw reply related
* [PATCH] powerpc/85xx:Enable USB2 controller node for P1020RDB
From: Ramneek Mehresh @ 2012-01-18 5:50 UTC (permalink / raw)
To: linuxppc-dev; +Cc: devicetree-discuss, Ramneek Mehresh
Enable USB2 controller node for P1020RDB. USB2 controller is used only
when board boots from SPI or SD as it is muxed with eLBC
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
---
Applies on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
(branch next)
arch/powerpc/boot/dts/p1020rdb.dtsi | 11 ++++-------
1 files changed, 4 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1020rdb.dtsi b/arch/powerpc/boot/dts/p1020rdb.dtsi
index b5bd86f..17559c4 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1020rdb.dtsi
@@ -1,7 +1,7 @@
/*
* P1020 RDB Device Tree Source stub (no addresses or top-level ranges)
*
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -192,15 +192,12 @@
phy_type = "ulpi";
};
- /* USB2 is shared with localbus, so it must be disabled
- by default. We can't put 'status = "disabled";' here
- since U-Boot doesn't clear the status property when
- it enables USB2. OTOH, U-Boot does create a new node
- when there isn't any. So, just comment it out.
+ /* USB2 is shared with localbus. It is used
+ only in case of SPI and SD boot after
+ appropriate device-tree fixup done by uboot */
usb@23000 {
phy_type = "ulpi";
};
- */
mdio@24000 {
phy0: ethernet-phy@0 {
--
1.7.1
^ permalink raw reply related
* [PATCH] powerpc/85xx:Add dr_mode property in USB nodes
From: Ramneek Mehresh @ 2012-01-18 6:48 UTC (permalink / raw)
To: linuxppc-dev; +Cc: devicetree-discuss, Ramneek Mehresh
Add usb2 controller node for P1020RDB, P2020RDB, P2020DS, P1021MDS
Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
---
Applies on git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git
(branch next)
arch/powerpc/boot/dts/p1020rdb.dtsi | 2 ++
arch/powerpc/boot/dts/p1021mds.dts | 3 ++-
arch/powerpc/boot/dts/p2020ds.dtsi | 3 ++-
arch/powerpc/boot/dts/p2020rdb.dts | 3 ++-
4 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/boot/dts/p1020rdb.dtsi b/arch/powerpc/boot/dts/p1020rdb.dtsi
index 17559c4..1fb7e0e 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1020rdb.dtsi
@@ -190,6 +190,7 @@
usb@22000 {
phy_type = "ulpi";
+ dr_mode = "host";
};
/* USB2 is shared with localbus. It is used
@@ -197,6 +198,7 @@
appropriate device-tree fixup done by uboot */
usb@23000 {
phy_type = "ulpi";
+ dr_mode = "host";
};
mdio@24000 {
diff --git a/arch/powerpc/boot/dts/p1021mds.dts b/arch/powerpc/boot/dts/p1021mds.dts
index d954079..97116f1 100644
--- a/arch/powerpc/boot/dts/p1021mds.dts
+++ b/arch/powerpc/boot/dts/p1021mds.dts
@@ -1,7 +1,7 @@
/*
* P1021 MDS Device Tree Source
*
- * Copyright 2010 Freescale Semiconductor Inc.
+ * Copyright 2010,2012 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -151,6 +151,7 @@
usb@22000 {
phy_type = "ulpi";
+ dr_mode = "host";
};
mdio@24000 {
diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/p2020ds.dtsi
index c1cf6ce..d3b939c 100644
--- a/arch/powerpc/boot/dts/p2020ds.dtsi
+++ b/arch/powerpc/boot/dts/p2020ds.dtsi
@@ -1,7 +1,7 @@
/*
* P2020DS Device Tree Source stub (no addresses or top-level ranges)
*
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
@@ -134,6 +134,7 @@
&board_soc {
usb@22000 {
phy_type = "ulpi";
+ dr_mode = "host";
};
mdio@24520 {
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index 26759a5..eb8a6aa 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -1,7 +1,7 @@
/*
* P2020 RDB Device Tree Source
*
- * Copyright 2009-2011 Freescale Semiconductor Inc.
+ * Copyright 2009-2012 Freescale Semiconductor Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
@@ -197,6 +197,7 @@
usb@22000 {
phy_type = "ulpi";
+ dr_mode = "host";
};
mdio@24520 {
--
1.7.1
^ permalink raw reply related
* Re: [RFC 13/14] irq_domain: Remove 'new' irq_domain in favour of the ppc one
From: Grant Likely @ 2012-01-18 6:50 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: sfr, Russell King, linux-arm-msm, linux-kernel, Rob Herring,
Michael Bohan, Thomas Gleixner, linuxppc-dev,
linux-arm-kernel@lists.infradead.org
In-Reply-To: <1326853009.26116.30.camel@pasglop>
[-- Attachment #1: Type: text/plain, Size: 504 bytes --]
On Jan 17, 2012 7:17 PM, "Benjamin Herrenschmidt" <benh@kernel.crashing.org>
wrote:
>
> On Tue, 2012-01-17 at 17:28 -0700, Grant Likely wrote:
> > BTW: Ben, if you can carve out some time, I'd appreciate a look over
> > my series and make sure you're okay with it. Once it's had some
> > testing by arm and ppc folks, I want to get it into linux-next.
>
> I intend to do so but not while I'm at LCA :-)
Pish... slacker.
:-p
No problem, enjoy LCA. One of these years I need to make it over there.
g.
[-- Attachment #2: Type: text/html, Size: 700 bytes --]
^ permalink raw reply
* [PATCH 1/2] P1025RDB: Add p1025rdb platform support
From: Zhicheng Fan @ 2012-01-18 9:01 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: Fanzc
From: Fanzc <b32736@freeescale.com>
Signed-off-by: Fanzc <b32736@freeescale.com>
---
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 24 ++++++++++++++++++++++++
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index ccf520e..1950076 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -90,6 +90,7 @@ static void __init mpc85xx_rdb_setup_arch(void)
machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
+machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
@@ -112,6 +113,15 @@ static int __init p1020_rdb_probe(void)
return 0;
}
+static int __init p1025_rdb_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ if (of_flat_dt_is_compatible(root, "fsl,P1025RDB"))
+ return 1;
+ return 0;
+}
+
define_machine(p2020_rdb) {
.name = "P2020 RDB",
.probe = p2020_rdb_probe,
@@ -139,3 +149,17 @@ define_machine(p1020_rdb) {
.calibrate_decr = generic_calibrate_decr,
.progress = udbg_progress,
};
+
+define_machine(p1025_rdb) {
+ .name = "P1025 RDB",
+ .probe = p1025_rdb_probe,
+ .setup_arch = mpc85xx_rdb_setup_arch,
+ .init_IRQ = mpc85xx_rdb_pic_init,
+#ifdef CONFIG_PCI
+ .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
+#endif
+ .get_irq = mpic_get_irq,
+ .restart = fsl_rstcr_restart,
+ .calibrate_decr = generic_calibrate_decr,
+ .progress = udbg_progress,
+};
--
1.7.0.4
^ permalink raw reply related
* [PATCH 2/2] powerpc/dts: Add dts for p1025rdb board
From: Zhicheng Fan @ 2012-01-18 9:01 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: Fanzc
In-Reply-To: <1326877318-21352-1-git-send-email-B32736@freescale.com>
From: Fanzc <b32736@freeescale.com>
P1025RDB Overview
------------------
1Gbyte DDR3 SDRAM
32 Mbyte NAND flash
16Mbyte NOR flash
16 Mbyte SPI flash
SD connector to interface with the SD memory card
Real-time clock on I2C bus
PCIe:
- x1 PCIe slot
- x1 mini-PCIe slot
10/100/1000 BaseT Ethernet ports:
- eTSEC1, RGMII: one 10/100/1000 port using AtherosTM AR8021
- eTSEC2, SGMII: one 10/100/1000 port using VitesseTM VSC8221
- eTSEC3, RGMII: one 10/100/1000 port using AtherosTM AR8021
USB 2.0 port:
- Two USB2.0 Type A receptacles
- One USB2.0 signal to Mini PCIe slot
Dual RJ45 UART ports:
- DUART interface: supports two UARTs up to 115200 bps for console display
Signed-off-by: Fanzc <b32736@freeescale.com>
---
arch/powerpc/boot/dts/fsl/p1025si-post.dtsi | 228 +++++++++++++++++++++
arch/powerpc/boot/dts/fsl/p1025si-pre.dtsi | 70 +++++++
arch/powerpc/boot/dts/p1025rdb.dts | 113 +++++++++++
arch/powerpc/boot/dts/p1025rdb.dtsi | 286 +++++++++++++++++++++++++++
arch/powerpc/boot/dts/p1025rdb_36b.dts | 65 ++++++
5 files changed, 762 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/p1025si-post.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/p1025si-pre.dtsi
create mode 100644 arch/powerpc/boot/dts/p1025rdb.dts
create mode 100644 arch/powerpc/boot/dts/p1025rdb.dtsi
create mode 100644 arch/powerpc/boot/dts/p1025rdb_36b.dts
diff --git a/arch/powerpc/boot/dts/fsl/p1025si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1025si-post.dtsi
new file mode 100644
index 0000000..e0e3e4d
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1025si-post.dtsi
@@ -0,0 +1,228 @@
+/*
+ * P1025 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "fsl,p1025-elbc", "fsl,elbc", "simple-bus";
+ interrupts = <19 2 0 0>;
+};
+
+/* controller at 0x9000 */
+&pci0 {
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0 255>;
+ clock-frequency = <33333333>;
+ interrupts = <16 2 0 0>;
+
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <16 2 0 0>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0x0 0x0 0x1 &mpic 0x4 0x1 0x0 0x0
+ 0000 0x0 0x0 0x2 &mpic 0x5 0x1 0x0 0x0
+ 0000 0x0 0x0 0x3 &mpic 0x6 0x1 0x0 0x0
+ 0000 0x0 0x0 0x4 &mpic 0x7 0x1 0x0 0x0
+ >;
+ };
+};
+
+/* controller at 0xa000 */
+&pci1 {
+ compatible = "fsl,mpc8548-pcie";
+ device_type = "pci";
+ #size-cells = <2>;
+ #address-cells = <3>;
+ bus-range = <0 255>;
+ clock-frequency = <33333333>;
+ interrupts = <16 2 0 0>;
+
+ pcie@0 {
+ reg = <0 0 0 0 0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ device_type = "pci";
+ interrupts = <16 2 0 0>;
+ interrupt-map-mask = <0xf800 0 0 7>;
+
+ interrupt-map = <
+ /* IDSEL 0x0 */
+ 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0x0 0x0
+ 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0x0 0x0
+ 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0x0 0x0
+ 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0x0 0x0
+ >;
+ };
+};
+
+&soc {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "soc";
+ compatible = "fsl,p1025-immr", "simple-bus";
+ bus-frequency = <0>; // Filled out by uboot.
+
+ ecm-law@0 {
+ compatible = "fsl,ecm-law";
+ reg = <0x0 0x1000>;
+ fsl,num-laws = <12>;
+ };
+
+ ecm@1000 {
+ compatible = "fsl,p1025-ecm", "fsl,ecm";
+ reg = <0x1000 0x1000>;
+ interrupts = <16 2 0 0>;
+ };
+
+ memory-controller@2000 {
+ compatible = "fsl,p1025-memory-controller";
+ reg = <0x2000 0x1000>;
+ interrupts = <16 2 0 0>;
+ };
+
+/include/ "pq3-i2c-0.dtsi"
+/include/ "pq3-i2c-1.dtsi"
+/include/ "pq3-duart-0.dtsi"
+
+/include/ "pq3-espi-0.dtsi"
+ spi@7000 {
+ fsl,espi-num-chipselects = <4>;
+ };
+
+/include/ "pq3-gpio-0.dtsi"
+
+ L2: l2-cache-controller@20000 {
+ compatible = "fsl,p1025-l2-cache-controller";
+ reg = <0x20000 0x1000>;
+ cache-line-size = <32>; // 32 bytes
+ cache-size = <0x40000>; // L2,256K
+ interrupts = <16 2 0 0>;
+ };
+
+/include/ "pq3-dma-0.dtsi"
+/include/ "pq3-usb2-dr-0.dtsi"
+
+/include/ "pq3-esdhc-0.dtsi"
+ sdhc@2e000 {
+ sdhci,auto-cmd12;
+ };
+/include/ "pq3-sec3.3-0.dtsi"
+
+/include/ "pq3-mpic.dtsi"
+/include/ "pq3-mpic-timer-B.dtsi"
+
+/include/ "pq3-etsec2-0.dtsi"
+ enet0: enet0_grp2: ethernet@b0000 {
+ };
+
+/include/ "pq3-etsec2-1.dtsi"
+ enet1: enet1_grp2: ethernet@b1000 {
+ };
+
+/include/ "pq3-etsec2-2.dtsi"
+ enet2: enet2_grp2: ethernet@b2000 {
+ };
+
+ global-utilities@e0000 {
+ compatible = "fsl,p1025-guts";
+ reg = <0xe0000 0x1000>;
+ fsl,has-rstcr;
+ };
+};
+
+&qe {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ device_type = "qe";
+ compatible = "fsl,qe";
+ fsl,qe-num-riscs = <1>;
+ fsl,qe-num-snums = <28>;
+
+ qeic: interrupt-controller@80 {
+ interrupt-controller;
+ compatible = "fsl,qe-ic";
+ #address-cells = <0>;
+ #interrupt-cells = <1>;
+ reg = <0x80 0x80>;
+ interrupts = <63 2 0 0 60 2 0 0>; //high:47 low:44
+ };
+
+ ucc@2000 {
+ cell-index = <1>;
+ reg = <0x2000 0x200>;
+ interrupts = <32>;
+ interrupt-parent = <&qeic>;
+ };
+
+ mdio@2120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x2120 0x18>;
+ compatible = "fsl,ucc-mdio";
+ };
+
+ ucc@2400 {
+ cell-index = <5>;
+ reg = <0x2400 0x200>;
+ interrupts = <40>;
+ interrupt-parent = <&qeic>;
+ };
+
+ muram@10000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,qe-muram", "fsl,cpm-muram";
+ ranges = <0x0 0x10000 0x6000>;
+
+ data-only@0 {
+ compatible = "fsl,qe-muram-data",
+ "fsl,cpm-muram-data";
+ reg = <0x0 0x6000>;
+ };
+ };
+};
+
+/include/ "pq3-etsec2-grp2-0.dtsi"
+/include/ "pq3-etsec2-grp2-1.dtsi"
+/include/ "pq3-etsec2-grp2-2.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/p1025si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p1025si-pre.dtsi
new file mode 100644
index 0000000..ef5f6db
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/p1025si-pre.dtsi
@@ -0,0 +1,70 @@
+/*
+ * P1025 Silicon/SoC Device Tree Source (pre include)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/dts-v1/;
+/ {
+ compatible = "fsl,P1025";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ interrupt-parent = <&mpic>;
+
+ aliases {
+ serial0 = &serial0;
+ serial1 = &serial1;
+ ethernet0 = &enet0;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
+ ethernet4 = &enet4;
+ pci0 = &pci0;
+ pci1 = &pci1;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ PowerPC,P1025@0 {
+ device_type = "cpu";
+ reg = <0x0>;
+ next-level-cache = <&L2>;
+ };
+
+ PowerPC,P1025@1 {
+ device_type = "cpu";
+ reg = <0x1>;
+ next-level-cache = <&L2>;
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1025rdb.dts b/arch/powerpc/boot/dts/p1025rdb.dts
new file mode 100644
index 0000000..21b7f46
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1025rdb.dts
@@ -0,0 +1,113 @@
+/*
+ * P1025 RDB Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+/include/ "fsl/p1025si-pre.dtsi"
+/ {
+ model = "fsl,P1025RDB";
+ compatible = "fsl,P1025RDB";
+
+ memory {
+ device_type = "memory";
+ };
+
+ lbc: localbus@ffe05000 {
+ reg = <0 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes */
+ ranges = <0x0 0x0 0x0 0xef000000 0x01000000
+ 0x1 0x0 0x0 0xff800000 0x00040000>;
+ };
+
+ soc: soc@ffe00000 {
+ ranges = <0x0 0x0 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@ffe09000 {
+ ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+ reg = <0 0xffe09000 0 0x1000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@ffe0a000 {
+ reg = <0 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0 0xe0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ qe: qe@ffe80000 {
+ ranges = <0x0 0x0 0xffe80000 0x40000>;
+ reg = <0 0xffe80000 0 0x480>;
+ brg-frequency = <0>;
+ bus-frequency = <0>;
+ status = "disabled"; /* no firmware loaded */
+
+ enet3: ucc@2000 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ rx-clock-name = "clk12";
+ tx-clock-name = "clk9";
+ pio-handle = <&pio1>;
+ phy-handle = <&qe_phy0>;
+ phy-connection-type = "mii";
+ };
+
+ mdio@2120 {
+ qe_phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
+ interrupts = <4 1 0 0>;
+ reg = <0x6>;
+ device_type = "ethernet-phy";
+ };
+ qe_phy1: ethernet-phy@03 {
+ interrupt-parent = <&mpic>;
+ interrupts = <5 1 0 0>;
+ reg = <0x3>;
+ device_type = "ethernet-phy";
+ };
+ tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet4: ucc@2400 {
+ device_type = "network";
+ compatible = "ucc_geth";
+ local-mac-address = [ 00 00 00 00 00 00 ];
+ rx-clock-name = "none";
+ tx-clock-name = "clk13";
+ pio-handle = <&pio2>;
+ phy-handle = <&qe_phy1>;
+ phy-connection-type = "rmii";
+ };
+ };
+};
+
+/include/ "p1025rdb.dtsi"
+/include/ "fsl/p1025si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025rdb.dtsi b/arch/powerpc/boot/dts/p1025rdb.dtsi
new file mode 100644
index 0000000..46d9e33
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1025rdb.dtsi
@@ -0,0 +1,286 @@
+/*
+ * P1025 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&lbc {
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x1000000>;
+ bank-width = <2>;
+ device-width = <1>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 256KB for Vitesse 7385 Switch firmware */
+ reg = <0x0 0x00040000>;
+ label = "Vitesse-7385 Firmware";
+ read-only;
+ };
+
+ partition@40000 {
+ /* 256KB for DTB Image */
+ reg = <0x00040000 0x00040000>;
+ label = "DTB Image";
+ };
+
+ partition@80000 {
+ /* 3.5 MB for Linux Kernel Image */
+ reg = <0x00080000 0x00380000>;
+ label = "Linux Kernel Image";
+ };
+
+ partition@400000 {
+ /* 11MB for JFFS2 based Root file System */
+ reg = <0x00400000 0x00b00000>;
+ label = "JFFS2 Root File System";
+ };
+
+ partition@f00000 {
+ /* This location must not be altered */
+ /* 512KB for u-boot Bootloader Image */
+ /* 512KB for u-boot Environment Variables */
+ reg = <0x00f00000 0x00100000>;
+ label = "U-Boot Image";
+ read-only;
+ };
+ };
+
+ nand@1,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,p1025-fcm-nand",
+ "fsl,elbc-fcm-nand";
+ reg = <0x1 0x0 0x40000>;
+
+ partition@0 {
+ /* This location must not be altered */
+ /* 1MB for u-boot Bootloader Image */
+ reg = <0x0 0x00100000>;
+ label = "NAND U-Boot Image";
+ read-only;
+ };
+
+ partition@100000 {
+ /* 1MB for DTB Image */
+ reg = <0x00100000 0x00100000>;
+ label = "NAND DTB Image";
+ };
+
+ partition@200000 {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00200000 0x00400000>;
+ label = "NAND Linux Kernel Image";
+ };
+
+ partition@600000 {
+ /* 4MB for Compressed Root file System Image */
+ reg = <0x00600000 0x00400000>;
+ label = "NAND Compressed RFS Image";
+ };
+
+ partition@a00000 {
+ /* 7MB for JFFS2 based Root file System */
+ reg = <0x00a00000 0x00700000>;
+ label = "NAND JFFS2 Root File System";
+ };
+
+ partition@1100000 {
+ /* 15MB for JFFS2 based Root file System */
+ reg = <0x01100000 0x00f00000>;
+ label = "NAND Writable User area";
+ };
+ };
+
+};
+
+&soc {
+ i2c@3000 {
+ rtc@68 {
+ compatible = "dallas,ds1339";
+ reg = <0x68>;
+ };
+ };
+
+ spi@7000 {
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "spansion,s25sl12801";
+ reg = <0>;
+ spi-max-frequency = <40000000>; /* input clock */
+
+ partition@u-boot {
+ /* 512KB for u-boot Bootloader Image */
+ reg = <0x0 0x00080000>;
+ label = "u-boot";
+ read-only;
+ };
+
+ partition@dtb {
+ /* 512KB for DTB Image */
+ reg = <0x00080000 0x00080000>;
+ label = "dtb";
+ };
+
+ partition@kernel {
+ /* 4MB for Linux Kernel Image */
+ reg = <0x00100000 0x00400000>;
+ label = "kernel";
+ };
+
+ partition@fs {
+ /* 4MB for Compressed RFS Image */
+ reg = <0x00500000 0x00400000>;
+ label = "file system";
+ };
+
+ partition@jffs-fs {
+ /* 7MB for JFFS2 based RFS */
+ reg = <0x00900000 0x00700000>;
+ label = "file system jffs2";
+ };
+ };
+ };
+
+ usb@22000 {
+ phy_type = "ulpi";
+ };
+
+ /* USB2 is shared with localbus, so it must be disabled
+ by default. We can't put 'status = "disabled";' here
+ since U-Boot doesn't clear the status property when
+ it enables USB2. OTOH, U-Boot does create a new node
+ when there isn't any. So, just comment it out.
+ usb@23000 {
+ phy_type = "ulpi";
+ };
+ */
+
+ mdio@24000 {
+ phy0: ethernet-phy@0 {
+ interrupt-parent = <&mpic>;
+ interrupts = <3 1>;
+ reg = <0x0>;
+ };
+
+ phy1: ethernet-phy@1 {
+ interrupt-parent = <&mpic>;
+ interrupts = <2 1>;
+ reg = <0x1>;
+ };
+
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@25000 {
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ mdio@26000 {
+ tbi2: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet0: ethernet@b0000 {
+ fixed-link = <1 1 1000 0 0>;
+ phy-connection-type = "rgmii-id";
+
+ };
+
+ enet1: ethernet@b1000 {
+ phy-handle = <&phy0>;
+ tbi-handle = <&tbi1>;
+ phy-connection-type = "sgmii";
+ };
+
+ enet2: ethernet@b2000 {
+ phy-handle = <&phy1>;
+ phy-connection-type = "rgmii-id";
+ };
+
+ par_io@e0100 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0xe0100 0x60>;
+ ranges = <0x0 0xe0100 0x60>;
+ device_type = "par_io";
+ num-ports = <3>;
+ pio1: ucc_pin@01 {
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
+ 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
+ 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
+ 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
+ 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
+ 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
+ 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
+ 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
+ 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
+ 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
+ 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
+ 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
+ 0x0 0x5 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */
+ 0x0 0xd 0x1 0x0 0x2 0x0 /* ENET1_TX_ER */
+ 0x0 0x4 0x2 0x0 0x2 0x0 /* ENET1_RX_DV_SER1_CTS_B */
+ 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RX_ER_SER1_CD_B */
+ 0x0 0x11 0x2 0x0 0x2 0x0 /* ENET1_CRS */
+ 0x0 0x10 0x2 0x0 0x2 0x0>; /* ENET1_COL */
+ };
+
+ pio2: ucc_pin@02 {
+ pio-map = <
+ /* port pin dir open_drain assignment has_irq */
+ 0x1 0x13 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
+ 0x1 0x14 0x3 0x0 0x1 0x0 /* QE_MUX_MDIO */
+ 0x1 0xb 0x2 0x0 0x1 0x0 /* CLK13 */
+ 0x1 0x7 0x1 0x0 0x2 0x0 /* ENET5_TXD0_SER5_TXD0 */
+ 0x1 0xa 0x1 0x0 0x2 0x0 /* ENET5_TXD1_SER5_TXD1 */
+ 0x1 0x6 0x2 0x0 0x2 0x0 /* ENET5_RXD0_SER5_RXD0 */
+ 0x1 0x9 0x2 0x0 0x2 0x0 /* ENET5_RXD1_SER5_RXD1 */
+ 0x1 0x5 0x1 0x0 0x2 0x0 /* ENET5_TX_EN_SER5_RTS_B */
+ 0x1 0x4 0x2 0x0 0x2 0x0 /* ENET5_RX_DV_SER5_CTS_B */
+ 0x1 0x8 0x2 0x0 0x2 0x0>; /* ENET5_RX_ER_SER5_CD_B */
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/p1025rdb_36b.dts b/arch/powerpc/boot/dts/p1025rdb_36b.dts
new file mode 100644
index 0000000..01148f7
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1025rdb_36b.dts
@@ -0,0 +1,65 @@
+/*
+ * P1025 RDB Device Tree Source (36-bit address map)
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/p1025si-pre.dtsi"
+/ {
+ model = "fsl,P1025RDB";
+ compatible = "fsl,P1025RDB";
+
+ memory {
+ device_type = "memory";
+ };
+
+ board_lbc: lbc: localbus@fffe05000 {
+ reg = <0xf 0xffe05000 0 0x1000>;
+
+ /* NOR, NAND Flashes */
+ ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+ 0x1 0x0 0xf 0xff800000 0x00040000>;
+ };
+
+ board_soc: soc: soc@fffe00000 {
+ ranges = <0x0 0xf 0xffe00000 0x100000>;
+ };
+
+ pci0: pcie@fffe09000 {
+ reg = <0xf 0xffe09000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xe 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ pci1: pcie@fffe0a000 {
+ reg = <0xf 0xffe0a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xe0000000
+ 0x2000000 0x0 0xe0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+};
+
+/include/ "p1025rdb.dtsi"
+/include/ "fsl/p1025si-post.dtsi"
--
1.7.0.4
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