* Re: [PATCH v2] powerpc/usb: fix issue of CPU halt when missing USB PHY clock
From: Greg KH @ 2012-02-02 19:14 UTC (permalink / raw)
To: Sergei Shtylyov; +Cc: linux-usb, linuxppc-dev, Shengzhou Liu
In-Reply-To: <4F2A7604.9060102@mvista.com>
On Thu, Feb 02, 2012 at 03:39:48PM +0400, Sergei Shtylyov wrote:
> Hello.
>
> On 02-02-2012 7:23, Shengzhou Liu wrote:
>
> >when missing USB PHY clock, kernel booting up will halt during USB
> >initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
> >CPU hang in this case.
>
> >Signed-off-by: Shengzhou Liu<Shengzhou.Liu@freescale.com>
> [...]
>
> >diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
> >index 4918062..dd3dc47 100644
> >--- a/drivers/usb/host/ehci-fsl.h
> >+++ b/drivers/usb/host/ehci-fsl.h
> >@@ -45,5 +45,6 @@
> > #define FSL_SOC_USB_PRICTRL 0x40c /* NOTE: big-endian */
> > #define FSL_SOC_USB_SICTRL 0x410 /* NOTE: big-endian */
> > #define FSL_SOC_USB_CTRL 0x500 /* NOTE: big-endian */
> >+#define CTRL_PHY_CLK_VALID (1 << 17)
>
> Indent the macro value with tabs please.
I fixed this by hand.
^ permalink raw reply
* Re: [PATCH] Implement GET_IP/SET_IP for powerpc architecture.
From: Benjamin Herrenschmidt @ 2012-02-02 21:23 UTC (permalink / raw)
To: Mike Frysinger; +Cc: linuxppc-dev, Srikar Dronamraju
In-Reply-To: <201202021128.49188.vapier@gentoo.org>
On Thu, 2012-02-02 at 11:28 -0500, Mike Frysinger wrote:
> On Thursday 02 February 2012 09:41:25 Srikar Dronamraju wrote:
> > +#define GET_FP(regs) (0)
> > +#define SET_FP(regs, val)
>
> ppc doesn't have a standard FP location ?
Not really no, it's the sp (r1). r31 might be considered a "frame
pointer" under some circumstances but there isn't much you can do with
it, it's really r1 that gives you the ability to backtrace (each stack
frame contains a pointer to the next one).
> > +#define profile_pc(regs) GET_IP(regs)
>
> pretty sure you don't need this as asm-generic/ptrace.h already has a
> definition for you
> -mike
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] powerpc: dont include 8250 pre-setup if 8250 driver isn't enabled.
From: Benjamin Herrenschmidt @ 2012-02-02 21:26 UTC (permalink / raw)
To: Paul Gortmaker; +Cc: Paul Gortmaker, paulus, linuxppc-dev
In-Reply-To: <CAP=VYLrPMwfEe09uW0=4NKNDPHkNEFcGjGBfDVa_rEFT3kMkZw@mail.gmail.com>
On Thu, 2012-02-02 at 12:56 -0500, Paul Gortmaker wrote:
> On Fri, Jan 20, 2012 at 10:50 PM, Paul Gortmaker
> <paul.gortmaker@windriver.com> wrote:
> > The legacy_serial code was setting things up based on the assumption
> > that the main 8250 driver would be loaded shortly after. But some
> > randconfigs exposed an issue where early debug (UDB) UART support was
> > enabled, yet the core UART 8250 support was disabled.
>
> Hi Ben,
>
> Can you mark this in patchworks as Superseded? It is at:
>
> http://patchwork.ozlabs.org/patch/137142/
>
> You fixed it independently with this:
>
> http://git.kernel.org/?p=linux/kernel/git/benh/powerpc.git;a=commit;h=3493c85366ba09c9d0972c919e7123367a39982a
No worries, thanks.
Cheers,
Ben.
> Thanks,
> Paul.
>
>
> >
> > In theory a person could care about _really_ early UART output for
> > early debug, but not care about generic console output via UART on
> > embedded devices, so fix things so it is a valid combination.
> >
> > While this might seem like a pointless randconfig change, there are
> > some existing default configs that actually reflect the above setup.
> >
> > Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
> >
> > diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
> > index 3fea368..9a82a49 100644
> > --- a/arch/powerpc/kernel/legacy_serial.c
> > +++ b/arch/powerpc/kernel/legacy_serial.c
> > @@ -413,6 +413,14 @@ void __init find_legacy_serial_ports(void)
> > DBG(" <- find_legacy_serial_port()\n");
> > }
> >
> > +/*
> > + * In theory, one could have the early debugging enabled, but yet not care
> > + * about 8250 after that, i.e. PPC_UDBG_16550=y but "SERIAL_8250 is not set".
> > + * Mostly appears in randconfig builds, but some defconfigs have this.
> > + */
> > +
> > +#ifdef CONFIG_SERIAL_8250
> > +
> > static struct platform_device serial_device = {
> > .name = "serial8250",
> > .id = PLAT8250_DEV_PLATFORM,
> > @@ -523,6 +531,7 @@ static int __init serial_dev_init(void)
> > }
> > device_initcall(serial_dev_init);
> >
> > +#endif /* CONFIG_SERIAL_8250 */
> >
> > #ifdef CONFIG_SERIAL_8250_CONSOLE
> > /*
> > --
> > 1.7.7.2
> >
> > _______________________________________________
> > Linuxppc-dev mailing list
> > Linuxppc-dev@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Re: Efika (mpc5200b): sound doesn't build/work from linux-2.6.38.x
From: Tabi Timur-B04825 @ 2012-02-02 21:50 UTC (permalink / raw)
To: acrux; +Cc: linuxppc-dev@lists.ozlabs.org, Jon Smirl
In-Reply-To: <20120202175751.2c6e4bb9.acrux_it@libero.it>
On Thu, Feb 2, 2012 at 10:57 AM, acrux <acrux_it@libero.it> wrote:
> well, i got the same error with also linux-2.6.37. Btw, this was already =
reported about a year ago:
> http://lists.ozlabs.org/pipermail/linuxppc-dev/2011-February/088415.html
I think this was fixed already. You're using an obsolete kernel.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* [RFC] Multi queue support in ethernet/freescale/ucc_geth.c
From: Paul Gortmaker @ 2012-02-02 22:42 UTC (permalink / raw)
To: leoli; +Cc: netdev@vger.kernel.org, linuxppc-dev
Hi Li,
A while back DaveM mentioned that it would be good to
break out the ring allocations[1] in this driver.
I was looking at it, and in the process noticed this:
$ grep 'numQueues.*=' drivers/net/ethernet/freescale/ucc_geth.c
.numQueuesTx = 1,
.numQueuesRx = 1,
$
My interpretation of the above is that there is no way
(aside from a code edit) to enable multi queue support.
They are only ever assigned one time, to a value of one.
Assuming I'm not missing something obvious, is the multi
queue support functional and tested, or just old code
that never got tested and subsequently enabled?
The reason I ask, is that the ring allocation code gets rid
of the loop wrapping it, if the driver is really only meant
to ever have just single queues for Rx/Tx. And other areas
of the driver can also be simplified accordingly as well.
Thanks,
Paul.
[1] http://lists.openwall.net/netdev/2010/09/06/45
^ permalink raw reply
* [PATCH] powerpc: Rework lazy-interrupt handling
From: Benjamin Herrenschmidt @ 2012-02-03 4:34 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Scott Wood, Deepthi Dharwar, Anton Blanchard, Paul Mackerras
The current implementation of lazy interrupts handling has some
issues that this tries to address.
Except on iSeries, we don't do the various workarounds we need to
do on re-enable when returning from an interrupt, which can do an
implicit re-enable, and thus we may still lose or get delayed
decrementer or doorbell interrupts.
The current scheme also makes it much harder to handle the external
"edge" interrupts provided by some BookE processors when using the
EPR facility (External Proxy) and the Freescale Hypervisor.
We also hard mask on decrementer interrupts which is sub-optimal.
This is an attempt at fixing it all in one go by reworking the way
we do the lazy interrupt disabling.
The base idea is to replace the "hard_enabled" field with a
"irq_happened" field in which we store a bit mask of what interrupt
occurred while soft-disabled.
When re-enabling, either via arch_local_irq_restore() or when returning
from an interrupt, we can now decide what to do by testing bits in that
field. We then implement re-emitting of the lost interrupts via either
a re-use of the existing exception frame (exception exit case) or via
the creation of a new one from assembly code (arch_local_irq_enable),
without the need to trigger a fake one using set_dec() or similar.
In addition, we no longer hard disable decrementer interrupts that occur
while soft-disabled. We now simply bump the decrementer back to max
(on BookS) or leave it stopped (on BookE) and continue with hard interrupts
enabled, which means that we'll potentially get better sample quality from
performance monitor interrupts.
There are additional refinements that we can do on top of this patch:
- We could remove the ps3 workaround from arch_local_irq_enable(),
I believe that it should no longer be necessary
- We should consider hard-enabling when taking timer interrupts rather
than keeping interrupts off until the timer interrupt itself soft-enables
- The external interrupts no longer soft-enable, so we should consider
hard-enabling instead, again to improve the quality of performance samples
- We could make "masked" decrementer interrupts act as NMIs to improve
timer-based stochastic sampling
- There are additional simplifications of the exception entry/exit path
that I've spotted along the way, such as merging fast_exception_return
with the normal code path.
>From there, implementing proper support for EPR should just be a matter
of having its specific masked handler store the values in a little per-cpu
stack and have ppc_md.get_irq() fetch from that stack when it's not empty.
This patch needs a LOT more testing & review than it had so far !!!
Not-signed-off-by-yet: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
---
arch/powerpc/include/asm/exception-64s.h | 21 ++-
arch/powerpc/include/asm/hw_irq.h | 37 ++++-
arch/powerpc/include/asm/irqflags.h | 13 +-
arch/powerpc/include/asm/paca.h | 2 +-
arch/powerpc/kernel/asm-offsets.c | 2 +-
arch/powerpc/kernel/entry_64.S | 96 ++++++------
arch/powerpc/kernel/exceptions-64e.S | 188 ++++++++++++++++-------
arch/powerpc/kernel/exceptions-64s.S | 90 +++++++-----
arch/powerpc/kernel/head_64.S | 9 -
arch/powerpc/kernel/idle_book3e.S | 8 +-
arch/powerpc/kernel/idle_power4.S | 17 ++-
arch/powerpc/kernel/idle_power7.S | 20 ++-
arch/powerpc/kernel/irq.c | 164 +++++++++++++-------
arch/powerpc/kernel/time.c | 3 -
arch/powerpc/platforms/iseries/Makefile | 2 +-
arch/powerpc/platforms/iseries/exception.S | 11 +-
arch/powerpc/platforms/iseries/misc.S | 26 ---
arch/powerpc/platforms/pseries/processor_idle.c | 24 +++-
18 files changed, 462 insertions(+), 271 deletions(-)
delete mode 100644 arch/powerpc/platforms/iseries/misc.S
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index 8057f4f..b3f42e9 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -232,23 +232,24 @@ label##_hv: \
EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, \
EXC_HV, KVMTEST, vec)
-#define __SOFTEN_TEST(h) \
+#define __SOFTEN_TEST(h, vec) \
lbz r10,PACASOFTIRQEN(r13); \
cmpwi r10,0; \
+ li r10,(vec)>>8; \
beq masked_##h##interrupt
-#define _SOFTEN_TEST(h) __SOFTEN_TEST(h)
+#define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
#define SOFTEN_TEST_PR(vec) \
KVMTEST_PR(vec); \
- _SOFTEN_TEST(EXC_STD)
+ _SOFTEN_TEST(EXC_STD, vec)
#define SOFTEN_TEST_HV(vec) \
KVMTEST(vec); \
- _SOFTEN_TEST(EXC_HV)
+ _SOFTEN_TEST(EXC_HV, vec)
#define SOFTEN_TEST_HV_201(vec) \
KVMTEST(vec); \
- _SOFTEN_TEST(EXC_STD)
+ _SOFTEN_TEST(EXC_STD, vec)
#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
HMT_MEDIUM; \
@@ -276,9 +277,9 @@ label##_hv: \
#define DISABLE_INTS \
li r11,0; \
stb r11,PACASOFTIRQEN(r13); \
-BEGIN_FW_FTR_SECTION; \
- stb r11,PACAHARDIRQEN(r13); \
-END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES); \
+ lbz r11,PACAIRQHAPPENED(r13); \
+ ori r11,r11,PACA_HAPPENED; \
+ stb r11,PACAIRQHAPPENED(r13); \
TRACE_DISABLE_INTS; \
BEGIN_FW_FTR_SECTION; \
mfmsr r10; \
@@ -289,7 +290,9 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
#define DISABLE_INTS \
li r11,0; \
stb r11,PACASOFTIRQEN(r13); \
- stb r11,PACAHARDIRQEN(r13); \
+ lbz r11,PACAIRQHAPPENED(r13); \
+ ori r11,r11,PACA_HAPPENED; \
+ stb r11,PACAIRQHAPPENED(r13); \
TRACE_DISABLE_INTS
#endif /* CONFIG_PPC_ISERIES */
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index bb712c9..e235e7f 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -10,12 +10,37 @@
#include <linux/compiler.h>
#include <asm/ptrace.h>
#include <asm/processor.h>
+/*
+ * PACA flags in paca->irq_happened. These flags are set by
+ * oring in the interrupt vector shifted right by 8, so what
+ * we actually have in there is:
+ *
+ * EE : 0x50x >> 8 = 0x05
+ * DEC : 0x90x >> 8 = 0x09
+ *
+ * The bits we test are thus 0x4 and 0x8 respectively, with bit
+ * 0x1 always set when "something happened".
+ *
+ * Note: That "something happened" bit is important as we set it
+ * when manually hard-disabling. This allows arch_local_irq_restore()
+ * to "know" that it can't just return and has to actually hard
+ * enable.
+ */
+#define PACA_HAPPENED 0x01
+#define PACA_HAPPENED_DBELL 0x02
+#define PACA_HAPPENED_EE 0x04
+#define PACA_HAPPENED_DEC 0x08 /* Or FIT */
+#define PACA_HAPPENED_PERFMON 0x10 /* BookE only */
+
+#ifndef __ASSEMBLY__
extern void timer_interrupt(struct pt_regs *);
#ifdef CONFIG_PPC64
#include <asm/paca.h>
+extern void __reemit_interrupt(unsigned int vector);
+
static inline unsigned long arch_local_save_flags(void)
{
unsigned long flags;
@@ -42,7 +67,6 @@ static inline unsigned long arch_local_irq_disable(void)
}
extern void arch_local_irq_restore(unsigned long);
-extern void iseries_handle_interrupts(void);
static inline void arch_local_irq_enable(void)
{
@@ -72,11 +96,11 @@ static inline bool arch_irqs_disabled(void)
#define __hard_irq_disable() __mtmsrd(mfmsr() & ~MSR_EE, 1)
#endif
-#define hard_irq_disable() \
- do { \
- __hard_irq_disable(); \
- get_paca()->soft_enabled = 0; \
- get_paca()->hard_enabled = 0; \
+#define hard_irq_disable() \
+ do { \
+ __hard_irq_disable(); \
+ get_paca()->soft_enabled = 0; \
+ get_paca()->irq_happened |= PACA_HAPPENED; \
} while(0)
#else /* CONFIG_PPC64 */
@@ -149,5 +173,6 @@ static inline bool arch_irqs_disabled(void)
*/
struct irq_chip;
+#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_HW_IRQ_H */
diff --git a/arch/powerpc/include/asm/irqflags.h b/arch/powerpc/include/asm/irqflags.h
index b0b06d8..4bfbf0a 100644
--- a/arch/powerpc/include/asm/irqflags.h
+++ b/arch/powerpc/include/asm/irqflags.h
@@ -47,16 +47,15 @@
b skip; \
95: TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on) \
li en,1;
-#define TRACE_AND_RESTORE_IRQ(en) \
- TRACE_AND_RESTORE_IRQ_PARTIAL(en,96f); \
- stb en,PACASOFTIRQEN(r13); \
-96:
#else
#define TRACE_ENABLE_INTS
#define TRACE_DISABLE_INTS
-#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip)
-#define TRACE_AND_RESTORE_IRQ(en) \
- stb en,PACASOFTIRQEN(r13)
+#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip) \
+ cmpdi en,0; \
+ bne 95f; \
+ stb en,PACASOFTIRQEN(r13); \
+ b skip; \
+95:
#endif
#endif
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 269c05a..daf813f 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -132,7 +132,7 @@ struct paca_struct {
u64 saved_msr; /* MSR saved here by enter_rtas */
u16 trap_save; /* Used when bad stack is encountered */
u8 soft_enabled; /* irq soft-enable flag */
- u8 hard_enabled; /* set if irqs are enabled in MSR */
+ u8 irq_happened; /* irq happened while soft-disabled */
u8 io_sync; /* writel() needs spin_unlock sync */
u8 irq_work_pending; /* IRQ_WORK interrupt while soft-disable */
u8 nap_state_lost; /* NV GPR values lost in power7_idle */
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 04caee7..cdd0d26 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -147,7 +147,7 @@ int main(void)
DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
- DEFINE(PACAHARDIRQEN, offsetof(struct paca_struct, hard_enabled));
+ DEFINE(PACAIRQHAPPENED, offsetof(struct paca_struct, irq_happened));
DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
#ifdef CONFIG_PPC_MM_SLICES
DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index d834425..b93d84a 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -31,6 +31,7 @@
#include <asm/bug.h>
#include <asm/ptrace.h>
#include <asm/irqflags.h>
+#include <asm/hw_irq.h>
#include <asm/ftrace.h>
/*
@@ -125,19 +126,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
#endif /* CONFIG_TRACE_IRQFLAGS */
li r10,1
stb r10,PACASOFTIRQEN(r13)
- stb r10,PACAHARDIRQEN(r13)
std r10,SOFTE(r1)
-#ifdef CONFIG_PPC_ISERIES
-BEGIN_FW_FTR_SECTION
- /* Hack for handling interrupts when soft-enabling on iSeries */
- cmpdi cr1,r0,0x5555 /* syscall 0x5555 */
- andi. r10,r12,MSR_PR /* from kernel */
- crand 4*cr0+eq,4*cr1+eq,4*cr0+eq
- bne 2f
- b hardware_interrupt_entry
-2:
-END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
-#endif /* CONFIG_PPC_ISERIES */
/* Hard enable interrupts */
#ifdef CONFIG_PPC_BOOK3E
@@ -593,23 +582,33 @@ _GLOBAL(ret_from_except_lite)
bne do_work
#endif
+_GLOBAL(fast_exception_return_irq)
restore:
-BEGIN_FW_FTR_SECTION
ld r5,SOFTE(r1)
-FW_FTR_SECTION_ELSE
- b .Liseries_check_pending_irqs
-ALT_FW_FTR_SECTION_END_IFCLR(FW_FEATURE_ISERIES)
-2:
- TRACE_AND_RESTORE_IRQ(r5);
+ TRACE_AND_RESTORE_IRQ_PARTIAL(r5, 3f);
- /* extract EE bit and use it to restore paca->hard_enabled */
- ld r3,_MSR(r1)
- rldicl r4,r3,49,63 /* r0 = (r3 >> 15) & 1 */
- stb r4,PACAHARDIRQEN(r13)
+ /*
+ * We are about to soft-enable interrupts (we are hard disabled
+ * at this point). We check if there's anything that needs to
+ * be replayed first
+ */
+ lbz r0,PACAIRQHAPPENED(r13)
+ cmpwi cr0,r0,0
+ bne- 4f
+
+ /*
+ * Get here when nothing happened while soft-disabled, just
+ * soft-enable and move-on. We will hard-enable as a side
+ * effect of rfi
+ */
+2: li r0,1
+ stb r0,PACASOFTIRQEN(r13);
+3:
#ifdef CONFIG_PPC_BOOK3E
b .exception_return_book3e
#else
+ ld r3,_MSR(r1)
ld r4,_CTR(r1)
ld r0,_LINK(r1)
mtctr r4
@@ -644,7 +643,8 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
/*
* r13 is our per cpu area, only restore it if we are returning to
- * userspace
+ * userspace the value stored in the stack frame may belong to
+ * another CPU.
*/
andi. r0,r3,MSR_PR
beq 1f
@@ -669,29 +669,36 @@ ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
#endif /* CONFIG_PPC_BOOK3E */
-.Liseries_check_pending_irqs:
-#ifdef CONFIG_PPC_ISERIES
- ld r5,SOFTE(r1)
- cmpdi 0,r5,0
+ /*
+ * Something did happen, check if a re-emit is needed
+ * (this also clears paca->irq_happened)
+ */
+4: bl .__check_irq_reemit
+ cmpwi cr0,r3,0
beq 2b
- /* Check for pending interrupts (iSeries) */
- ld r3,PACALPPACAPTR(r13)
- ld r3,LPPACAANYINT(r3)
- cmpdi r3,0
- beq+ 2b /* skip do_IRQ if no interrupts */
- li r3,0
- stb r3,PACASOFTIRQEN(r13) /* ensure we are soft-disabled */
-#ifdef CONFIG_TRACE_IRQFLAGS
- bl .trace_hardirqs_off
- mfmsr r10
-#endif
- ori r10,r10,MSR_EE
- mtmsrd r10 /* hard-enable again */
- addi r3,r1,STACK_FRAME_OVERHEAD
+ /*
+ * We need to re-emit an interrupt. We do so by re-using our
+ * existing exception frame. We first change the trap value,
+ * but we need to ensure we preserve the low nibble of it
+ */
+ ld r4,_TRAP(r1)
+ clrldi r4,r4,60
+ or r4,r4,r3
+ std r4,_TRAP(r1)
+
+ /*
+ * Then find the right handler and call it. Interrupts are
+ * still soft-disabled and we keep them that way.
+ */
+ cmpwi cr0,r3,0x500
+ bne 1f
+ addi r3,r1,STACK_FRAME_OVERHEAD;
+ bl .timer_interrupt
+ b .ret_from_except
+1: addi r3,r1,STACK_FRAME_OVERHEAD;
bl .do_IRQ
- b .ret_from_except_lite /* loop back and handle more */
-#endif
+ b .ret_from_except
do_work:
#ifdef CONFIG_PREEMPT
@@ -713,7 +720,6 @@ do_work:
*/
li r0,0
stb r0,PACASOFTIRQEN(r13)
- stb r0,PACAHARDIRQEN(r13)
TRACE_DISABLE_INTS
/* Call the scheduler with soft IRQs off */
@@ -728,8 +734,6 @@ do_work:
rotldi r10,r10,16
mtmsrd r10,1
#endif /* CONFIG_PPC_BOOK3E */
- li r0,0
- stb r0,PACAHARDIRQEN(r13)
/* Re-test flags and eventually loop */
clrrdi r9,r1,THREAD_SHIFT
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 429983c..04f83d3 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -21,6 +21,7 @@
#include <asm/exception-64e.h>
#include <asm/bug.h>
#include <asm/irqflags.h>
+#include <asm/hw_irq.h>
#include <asm/ptrace.h>
#include <asm/ppc-opcode.h>
#include <asm/mmu.h>
@@ -77,59 +78,55 @@
#define SPRN_MC_SRR1 SPRN_MCSRR1
#define NORMAL_EXCEPTION_PROLOG(n, addition) \
- EXCEPTION_PROLOG(n, GEN, addition##_GEN)
+ EXCEPTION_PROLOG(n, GEN, addition##_GEN(n))
#define CRIT_EXCEPTION_PROLOG(n, addition) \
- EXCEPTION_PROLOG(n, CRIT, addition##_CRIT)
+ EXCEPTION_PROLOG(n, CRIT, addition##_CRIT(n))
#define DBG_EXCEPTION_PROLOG(n, addition) \
- EXCEPTION_PROLOG(n, DBG, addition##_DBG)
+ EXCEPTION_PROLOG(n, DBG, addition##_DBG(n))
#define MC_EXCEPTION_PROLOG(n, addition) \
- EXCEPTION_PROLOG(n, MC, addition##_MC)
+ EXCEPTION_PROLOG(n, MC, addition##_MC(n))
/* Variants of the "addition" argument for the prolog
*/
-#define PROLOG_ADDITION_NONE_GEN
-#define PROLOG_ADDITION_NONE_CRIT
-#define PROLOG_ADDITION_NONE_DBG
-#define PROLOG_ADDITION_NONE_MC
+#define PROLOG_ADDITION_NONE_GEN(n)
+#define PROLOG_ADDITION_NONE_CRIT(n)
+#define PROLOG_ADDITION_NONE_DBG(n)
+#define PROLOG_ADDITION_NONE_MC(n)
-#define PROLOG_ADDITION_MASKABLE_GEN \
+#define PROLOG_ADDITION_MASKABLE_GEN(n) \
lbz r11,PACASOFTIRQEN(r13); /* are irqs soft-disabled ? */ \
cmpwi cr0,r11,0; /* yes -> go out of line */ \
- beq masked_interrupt_book3e;
+ beq masked_interrupt_book3e_##n;
-#define PROLOG_ADDITION_2REGS_GEN \
+#define PROLOG_ADDITION_2REGS_GEN(n) \
std r14,PACA_EXGEN+EX_R14(r13); \
std r15,PACA_EXGEN+EX_R15(r13)
-#define PROLOG_ADDITION_1REG_GEN \
+#define PROLOG_ADDITION_1REG_GEN(n) \
std r14,PACA_EXGEN+EX_R14(r13);
-#define PROLOG_ADDITION_2REGS_CRIT \
+#define PROLOG_ADDITION_2REGS_CRIT(n) \
std r14,PACA_EXCRIT+EX_R14(r13); \
std r15,PACA_EXCRIT+EX_R15(r13)
-#define PROLOG_ADDITION_2REGS_DBG \
+#define PROLOG_ADDITION_2REGS_DBG(n) \
std r14,PACA_EXDBG+EX_R14(r13); \
std r15,PACA_EXDBG+EX_R15(r13)
-#define PROLOG_ADDITION_2REGS_MC \
+#define PROLOG_ADDITION_2REGS_MC(n) \
std r14,PACA_EXMC+EX_R14(r13); \
std r15,PACA_EXMC+EX_R15(r13)
-#define PROLOG_ADDITION_DOORBELL_GEN \
- lbz r11,PACASOFTIRQEN(r13); /* are irqs soft-disabled ? */ \
- cmpwi cr0,r11,0; /* yes -> go out of line */ \
- beq masked_doorbell_book3e
-
/* Core exception code for all exceptions except TLB misses.
* XXX: Needs to make SPRN_SPRG_GEN depend on exception type
*/
#define EXCEPTION_COMMON(n, excf, ints) \
+exc_##n##_common: \
std r0,GPR0(r1); /* save r0 in stackframe */ \
std r2,GPR2(r1); /* save r2 in stackframe */ \
SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
@@ -169,14 +166,12 @@
/* Variants for the "ints" argument */
#define INTS_KEEP
-#define INTS_DISABLE_SOFT \
+#define INTS_DISABLE \
stb r0,PACASOFTIRQEN(r13); /* mark interrupts soft-disabled */ \
+ lbz r0,PACAIRQHAPPENED(r13); \
+ ori r0,r0,PACA_HAPPENED; \
+ stb r0,PACAIRQHAPPENED(r13); \
TRACE_DISABLE_INTS;
-#define INTS_DISABLE_HARD \
- stb r0,PACAHARDIRQEN(r13); /* and hard disabled */
-#define INTS_DISABLE_ALL \
- INTS_DISABLE_SOFT \
- INTS_DISABLE_HARD
/* This is called by exceptions that used INTS_KEEP (that is did not clear
* neither soft nor hard IRQ indicators in the PACA. This will restore MSR:EE
@@ -238,7 +233,7 @@ exc_##n##_bad_stack: \
#define MASKABLE_EXCEPTION(trapnum, label, hdlr, ack) \
START_EXCEPTION(label); \
NORMAL_EXCEPTION_PROLOG(trapnum, PROLOG_ADDITION_MASKABLE) \
- EXCEPTION_COMMON(trapnum, PACA_EXGEN, INTS_DISABLE_ALL) \
+ EXCEPTION_COMMON(trapnum, PACA_EXGEN, INTS_DISABLE) \
ack(r8); \
CHECK_NAPPING(); \
addi r3,r1,STACK_FRAME_OVERHEAD; \
@@ -289,7 +284,7 @@ interrupt_end_book3e:
/* Critical Input Interrupt */
START_EXCEPTION(critical_input);
CRIT_EXCEPTION_PROLOG(0x100, PROLOG_ADDITION_NONE)
-// EXCEPTION_COMMON(0x100, PACA_EXCRIT, INTS_DISABLE_ALL)
+// EXCEPTION_COMMON(0x100, PACA_EXCRIT, INTS_DISABLE)
// bl special_reg_save_crit
// CHECK_NAPPING();
// addi r3,r1,STACK_FRAME_OVERHEAD
@@ -300,7 +295,7 @@ interrupt_end_book3e:
/* Machine Check Interrupt */
START_EXCEPTION(machine_check);
CRIT_EXCEPTION_PROLOG(0x200, PROLOG_ADDITION_NONE)
-// EXCEPTION_COMMON(0x200, PACA_EXMC, INTS_DISABLE_ALL)
+// EXCEPTION_COMMON(0x200, PACA_EXMC, INTS_DISABLE)
// bl special_reg_save_mc
// addi r3,r1,STACK_FRAME_OVERHEAD
// CHECK_NAPPING();
@@ -339,7 +334,7 @@ interrupt_end_book3e:
START_EXCEPTION(program);
NORMAL_EXCEPTION_PROLOG(0x700, PROLOG_ADDITION_1REG)
mfspr r14,SPRN_ESR
- EXCEPTION_COMMON(0x700, PACA_EXGEN, INTS_DISABLE_SOFT)
+ EXCEPTION_COMMON(0x700, PACA_EXGEN, INTS_DISABLE)
std r14,_DSISR(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
ld r14,PACA_EXGEN+EX_R14(r13)
@@ -372,7 +367,7 @@ interrupt_end_book3e:
/* Watchdog Timer Interrupt */
START_EXCEPTION(watchdog);
CRIT_EXCEPTION_PROLOG(0x9f0, PROLOG_ADDITION_NONE)
-// EXCEPTION_COMMON(0x9f0, PACA_EXCRIT, INTS_DISABLE_ALL)
+// EXCEPTION_COMMON(0x9f0, PACA_EXCRIT, INTS_DISABLE)
// bl special_reg_save_crit
// CHECK_NAPPING();
// addi r3,r1,STACK_FRAME_OVERHEAD
@@ -450,7 +445,7 @@ interrupt_end_book3e:
mfspr r15,SPRN_SPRG_CRIT_SCRATCH
mtspr SPRN_SPRG_GEN_SCRATCH,r15
mfspr r14,SPRN_DBSR
- EXCEPTION_COMMON(0xd00, PACA_EXCRIT, INTS_DISABLE_ALL)
+ EXCEPTION_COMMON(0xd00, PACA_EXCRIT, INTS_DISABLE)
std r14,_DSISR(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
mr r4,r14
@@ -515,7 +510,7 @@ kernel_dbg_exc:
mfspr r15,SPRN_SPRG_DBG_SCRATCH
mtspr SPRN_SPRG_GEN_SCRATCH,r15
mfspr r14,SPRN_DBSR
- EXCEPTION_COMMON(0xd00, PACA_EXDBG, INTS_DISABLE_ALL)
+ EXCEPTION_COMMON(0xd08, PACA_EXDBG, INTS_DISABLE)
std r14,_DSISR(r1)
addi r3,r1,STACK_FRAME_OVERHEAD
mr r4,r14
@@ -528,18 +523,12 @@ kernel_dbg_exc:
MASKABLE_EXCEPTION(0x260, perfmon, .performance_monitor_exception, ACK_NONE)
/* Doorbell interrupt */
- START_EXCEPTION(doorbell)
- NORMAL_EXCEPTION_PROLOG(0x2070, PROLOG_ADDITION_DOORBELL)
- EXCEPTION_COMMON(0x2070, PACA_EXGEN, INTS_DISABLE_ALL)
- CHECK_NAPPING()
- addi r3,r1,STACK_FRAME_OVERHEAD
- bl .doorbell_exception
- b .ret_from_except_lite
+ MASKABLE_EXCEPTION(0x280, doorbell, .doorbell_exception, ACK_NONE)
/* Doorbell critical Interrupt */
START_EXCEPTION(doorbell_crit);
- CRIT_EXCEPTION_PROLOG(0x2080, PROLOG_ADDITION_NONE)
-// EXCEPTION_COMMON(0x2080, PACA_EXCRIT, INTS_DISABLE_ALL)
+ CRIT_EXCEPTION_PROLOG(0x2a0, PROLOG_ADDITION_NONE)
+// EXCEPTION_COMMON(0x280, PACA_EXCRIT, INTS_DISABLE)
// bl special_reg_save_crit
// CHECK_NAPPING();
// addi r3,r1,STACK_FRAME_OVERHEAD
@@ -547,38 +536,119 @@ kernel_dbg_exc:
// b ret_from_crit_except
b .
+/* Guest Doorbell */
MASKABLE_EXCEPTION(0x2c0, guest_doorbell, .unknown_exception, ACK_NONE)
- MASKABLE_EXCEPTION(0x2e0, guest_doorbell_crit, .unknown_exception, ACK_NONE)
- MASKABLE_EXCEPTION(0x310, hypercall, .unknown_exception, ACK_NONE)
- MASKABLE_EXCEPTION(0x320, ehpriv, .unknown_exception, ACK_NONE)
+
+/* Guest Doorbell critical Interrupt */
+ START_EXCEPTION(guest_doorbell_crit);
+ CRIT_EXCEPTION_PROLOG(0x2e0, PROLOG_ADDITION_NONE)
+// EXCEPTION_COMMON(0x2e0, PACA_EXCRIT, INTS_DISABLE)
+// bl special_reg_save_crit
+// CHECK_NAPPING();
+// addi r3,r1,STACK_FRAME_OVERHEAD
+// bl .guest_doorbell_critical_exception
+// b ret_from_crit_except
+ b .
+
+/* Hypervisor call */
+ START_EXCEPTION(hypercall);
+ NORMAL_EXCEPTION_PROLOG(0x310, PROLOG_ADDITION_NONE)
+ EXCEPTION_COMMON(0x310, PACA_EXGEN, INTS_KEEP)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ bl .save_nvgprs
+ INTS_RESTORE_HARD
+ bl .unknown_exception
+ b .ret_from_except
+
+/* Embedded Hypervisor priviledged */
+ START_EXCEPTION(ehpriv);
+ NORMAL_EXCEPTION_PROLOG(0x320, PROLOG_ADDITION_NONE)
+ EXCEPTION_COMMON(0x320, PACA_EXGEN, INTS_KEEP)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ bl .save_nvgprs
+ INTS_RESTORE_HARD
+ bl .unknown_exception
+ b .ret_from_except
/*
- * An interrupt came in while soft-disabled; clear EE in SRR1,
- * clear paca->hard_enabled and return.
+ * An interrupt came in while soft-disabled; We mark paca->irq_happened
+ * accordingly and if the interrupt is level sensitive, we hard disable
*/
-masked_doorbell_book3e:
- mtcr r10
- /* Resend the doorbell to fire again when ints enabled */
- mfspr r10,SPRN_PIR
- PPC_MSGSND(r10)
- b masked_interrupt_book3e_common
-masked_interrupt_book3e:
- mtcr r10
-masked_interrupt_book3e_common:
- stb r11,PACAHARDIRQEN(r13)
+masked_interrupt_book3e_0x500:
+ li r10,PACA_HAPPENED_EE
+ b masked_interrupt_book3e_full_mask
+masked_interrupt_book3e_0x260:
+ li r10,PACA_HAPPENED_PERFMON
+ b masked_interrupt_book3e_full_mask
+
+masked_interrupt_book3e_0x900:
+ ACK_DEC(r10);
+ li r10,PACA_HAPPENED_DEC
+ b masked_interrupt_book3e_no_mask
+masked_interrupt_book3e_0x980:
+ ACK_FIT(r10);
+ li r10,PACA_HAPPENED_DEC
+ b masked_interrupt_book3e_no_mask
+masked_interrupt_book3e_0x280:
+masked_interrupt_book3e_0x2c0:
+ li r10,PACA_HAPPENED_DBELL
+ b masked_interrupt_book3e_no_mask
+
+masked_interrupt_book3e_no_mask:
+ lbz r11,PACAIRQHAPPENED(r13)
+ ori r11,r11,r10
+ stb r11,PACAIRQHAPPENED(r13)
+ b 1f
+masked_interrupt_book3e_full_mask:
+ lbz r11,PACAIRQHAPPENED(r13)
+ ori r11,r11,r10
+ stb r11,PACAIRQHAPPENED(r13)
mfspr r10,SPRN_SRR1
rldicl r11,r10,48,1 /* clear MSR_EE */
rotldi r10,r11,16
mtspr SPRN_SRR1,r10
- ld r10,PACA_EXGEN+EX_R10(r13); /* restore registers */
+1: ld r10,PACA_EXGEN+EX_R10(r13);
ld r11,PACA_EXGEN+EX_R11(r13);
mfspr r13,SPRN_SPRG_GEN_SCRATCH;
rfi
b .
/*
+ * Called from arch_local_irq_enable when an interrupt needs
+ * to be resent. r3 contains either 0x500,0x900,0x260 or 0x280
+ * to indicate the kind of interrupt. MSR:EE is already off.
+ * We generate a stackframe like if a real interrupt had happened.
+ *
+ * Note: While MSR:EE is off, we need to make sure that _MSR
+ * in the generated frame has EE set to 1 or the exception
+ * handler will not properly re-enable them.
+ */
+_GLOBAL(__reemit_interrupt)
+ /* We are going to jump to the exception common code which
+ * will retrieve various register values from the PACA which
+ * we don't give a damn about.
+ */
+ mflr r10
+ mfmsr r11
+ mfcr r4;
+ mtspr SPRN_SPRG_GEN_SCRATCH,r13;
+ std r1,PACA_EXGEN+EX_R1(r13);
+ stw r4,PACA_EXGEN+EX_CR(r13);
+ ori r11,r11,MSR_EE
+ subi r1,r1,INT_FRAME_SIZE;
+ cmpwi cr0,r3,0x500
+ beq exc_0x500_common
+ cmpwi cr0,r3,0x900
+ beq+ exc_0x900_common
+ cmpwi cr0,r3,0x260
+ beq+ exc_0x260_common
+ cmpwi cr0,r3,0x280
+ beq+ exc_0x280_common
+ blr
+
+/*
* This is called from 0x300 and 0x400 handlers after the prologs with
* r14 and r15 containing the fault address and error code, with the
* original values stashed away in the PACA
@@ -680,6 +750,8 @@ BAD_STACK_TRAMPOLINE(0x000)
BAD_STACK_TRAMPOLINE(0x100)
BAD_STACK_TRAMPOLINE(0x200)
BAD_STACK_TRAMPOLINE(0x260)
+BAD_STACK_TRAMPOLINE(0x280)
+BAD_STACK_TRAMPOLINE(0x2a0)
BAD_STACK_TRAMPOLINE(0x2c0)
BAD_STACK_TRAMPOLINE(0x2e0)
BAD_STACK_TRAMPOLINE(0x300)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index d4be7bb..896eea8 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -12,6 +12,7 @@
*
*/
+#include <asm/hw_irq.h>
#include <asm/exception-64s.h>
#include <asm/ptrace.h>
@@ -356,34 +357,60 @@ do_stab_bolted_pSeries:
KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
/*
- * An interrupt came in while soft-disabled; clear EE in SRR1,
- * clear paca->hard_enabled and return.
+ * An interrupt came in while soft-disabled. We set paca->irq_happened,
+ * then, if it was a decrementer interrupt, we bump the dec to max and
+ * and return, else we hard disable and return.
*/
-masked_interrupt:
- stb r10,PACAHARDIRQEN(r13)
- mtcrf 0x80,r9
- ld r9,PACA_EXGEN+EX_R9(r13)
- mfspr r10,SPRN_SRR1
- rldicl r10,r10,48,1 /* clear MSR_EE */
- rotldi r10,r10,16
- mtspr SPRN_SRR1,r10
- ld r10,PACA_EXGEN+EX_R10(r13)
- GET_SCRATCH0(r13)
- rfid
- b .
-masked_Hinterrupt:
- stb r10,PACAHARDIRQEN(r13)
- mtcrf 0x80,r9
- ld r9,PACA_EXGEN+EX_R9(r13)
- mfspr r10,SPRN_HSRR1
- rldicl r10,r10,48,1 /* clear MSR_EE */
- rotldi r10,r10,16
- mtspr SPRN_HSRR1,r10
- ld r10,PACA_EXGEN+EX_R10(r13)
- GET_SCRATCH0(r13)
- hrfid
+#define MASKED_INTERRUPT(_H) \
+masked_##_H##interrupt: \
+ std r11,PACA_EXGEN+EX_R11(r13); \
+ lbz r11,PACAIRQHAPPENED(r13); \
+ or r11,r11,r10; \
+ stb r11,PACAIRQHAPPENED(r13); \
+ andi. r10,r10,PACA_HAPPENED_DEC; \
+ beq 1f; \
+ lis r10,0x7fff; \
+ ori r10,r10,0xffff; \
+ mtspr SPRN_DEC,r10; \
+ b 2f; \
+1: mfspr r10,SPRN_##_H##SRR1; \
+ rldicl r10,r10,48,1; /* clear MSR_EE */ \
+ rotldi r10,r10,16; \
+ mtspr SPRN_##_H##SRR1,r10; \
+2: mtcrf 0x80,r9; \
+ ld r9,PACA_EXGEN+EX_R9(r13); \
+ ld r10,PACA_EXGEN+EX_R10(r13); \
+ ld r11,PACA_EXGEN+EX_R11(r13); \
+ GET_SCRATCH0(r13); \
+ ##_H##rfid; \
b .
+
+ MASKED_INTERRUPT()
+ MASKED_INTERRUPT(H)
+
+/*
+ * Called from arch_local_irq_enable when an interrupt needs
+ * to be resent. r3 contains 0x500 or 0x900 to indicate which
+ * kind of interrupt. MSR:EE is already off. We generate a
+ * stackframe like if a real interrupt had happened.
+ *
+ * Note: While MSR:EE is off, we need to make sure that _MSR
+ * in the generated frame has EE set to 1 or the exception
+ * handler will not properly re-enable them.
+ */
+_GLOBAL(__reemit_interrupt)
+ /* We are going to jump to the exception common code which
+ * will retrieve various register values from the PACA which
+ * we don't give a damn about, so we don't bother storing them.
+ */
+ mfmsr r12
+ mflr r11
+ mfcr r9
+ ori r12,r12,MSR_EE
+ andi. r3,r3,0x0800
+ bne decrementer_common
+ b hardware_interrupt_common
#ifdef CONFIG_PPC_PSERIES
/*
@@ -838,18 +865,10 @@ __end_handlers:
* any task or sent any task a signal, you should use
* ret_from_except or ret_from_except_lite instead of this.
*/
-fast_exc_return_irq: /* restores irq state too */
- ld r3,SOFTE(r1)
- TRACE_AND_RESTORE_IRQ(r3);
- ld r12,_MSR(r1)
- rldicl r4,r12,49,63 /* get MSR_EE to LSB */
- stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
- b 1f
-
.globl fast_exception_return
fast_exception_return:
ld r12,_MSR(r1)
-1: ld r11,_NIP(r1)
+ ld r11,_NIP(r1)
andi. r3,r12,MSR_RI /* check if RI is set */
beq- unrecov_fer
@@ -973,7 +992,7 @@ BEGIN_FW_FTR_SECTION
* Here we have interrupts hard-disabled, so it is sufficient
* to restore paca->{soft,hard}_enable and get out.
*/
- beq fast_exc_return_irq /* Return from exception on success */
+ beq 14f
END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
/* For a hash failure, we don't bother re-enabling interrupts */
@@ -1015,6 +1034,7 @@ handle_page_fault:
b .ret_from_except
13: b .ret_from_except_lite
+14: b .fast_exception_return_irq
/* We have a page fault that hash_page could handle but HV refused
* the PTE insertion
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 06c7251..ffe08a6 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -564,7 +564,6 @@ _GLOBAL(pmac_secondary_start)
*/
li r0,0
stb r0,PACASOFTIRQEN(r13)
- stb r0,PACAHARDIRQEN(r13)
/* Create a temp kernel stack for use before relocation is on. */
ld r1,PACAEMERGSP(r13)
@@ -621,13 +620,8 @@ __secondary_start:
#ifdef CONFIG_PPC_ISERIES
BEGIN_FW_FTR_SECTION
ori r4,r4,MSR_EE
- li r8,1
- stb r8,PACAHARDIRQEN(r13)
END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
#endif
-BEGIN_FW_FTR_SECTION
- stb r7,PACAHARDIRQEN(r13)
-END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
stb r7,PACASOFTIRQEN(r13)
mtspr SPRN_SRR0,r3
@@ -782,11 +776,8 @@ BEGIN_FW_FTR_SECTION
mfmsr r5
ori r5,r5,MSR_EE /* Hard Enabled on iSeries*/
mtmsrd r5
- li r5,1
END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
#endif
- stb r5,PACAHARDIRQEN(r13) /* Hard Disabled on others */
-
bl .start_kernel
/* Not reached */
diff --git a/arch/powerpc/kernel/idle_book3e.S b/arch/powerpc/kernel/idle_book3e.S
index 16c002d..b1199f8 100644
--- a/arch/powerpc/kernel/idle_book3e.S
+++ b/arch/powerpc/kernel/idle_book3e.S
@@ -32,11 +32,11 @@ _GLOBAL(book3e_idle)
* since we may otherwise lose it (doorbells etc...). We know
* that since PACAHARDIRQEN will have been cleared in that case.
*/
- lbz r3,PACAHARDIRQEN(r13)
+ lbz r3,PACAIRQHAPPENED(r13)
cmpwi cr0,r3,0
- beqlr
+ bnelr
- /* Now we are going to mark ourselves as soft and hard enables in
+ /* Now we are going to mark ourselves as soft and hard enabled in
* order to be able to take interrupts while asleep. We inform lockdep
* of that. We don't actually turn interrupts on just yet tho.
*/
@@ -46,7 +46,6 @@ _GLOBAL(book3e_idle)
#endif
li r0,1
stb r0,PACASOFTIRQEN(r13)
- stb r0,PACAHARDIRQEN(r13)
/* Interrupts will make use return to LR, so get something we want
* in there
@@ -59,7 +58,6 @@ _GLOBAL(book3e_idle)
/* Mark them off again in the PACA as well */
li r0,0
stb r0,PACASOFTIRQEN(r13)
- stb r0,PACAHARDIRQEN(r13)
/* Tell lockdep about it */
#ifdef CONFIG_TRACE_IRQFLAGS
diff --git a/arch/powerpc/kernel/idle_power4.S b/arch/powerpc/kernel/idle_power4.S
index ba31954..c30af92 100644
--- a/arch/powerpc/kernel/idle_power4.S
+++ b/arch/powerpc/kernel/idle_power4.S
@@ -29,14 +29,27 @@ END_FTR_SECTION_IFCLR(CPU_FTR_CAN_NAP)
cmpwi 0,r4,0
beqlr
- /* Go to NAP now */
+ /* Hard disable */
mfmsr r7
rldicl r0,r7,48,1
rotldi r0,r0,16
mtmsrd r0,1 /* hard-disable interrupts */
+
+ /* Check if something happened while soft-disabled */
+ lbz r0,PACAIRQHAPPENED(r13)
+ cmpwi cr0,r0,0
+ bnelr
+
+ /*
+ * Here we mark ourselves soft-enabled. We should probably
+ * tell lockdep about it, but the interrupt will re-disable
+ * immediately so it shouldn't be a big issue. If it becomes
+ * one, then we should implement things the way we do on
+ * book3e.
+ */
li r0,1
stb r0,PACASOFTIRQEN(r13) /* we'll hard-enable shortly */
- stb r0,PACAHARDIRQEN(r13)
+
BEGIN_FTR_SECTION
DSSALL
sync
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
index fcdff19..61f8cac 100644
--- a/arch/powerpc/kernel/idle_power7.S
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -1,5 +1,5 @@
/*
- * This file contains the power_save function for 970-family CPUs.
+ * This file contains the power_save function for Power7 CPUs
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
@@ -51,9 +51,23 @@ _GLOBAL(power7_idle)
rldicl r9,r9,48,1
rotldi r9,r9,16
mtmsrd r9,1 /* hard-disable interrupts */
- li r0,0
+
+ /* Check if something happened while soft-disabled */
+ lbz r0,PACAIRQHAPPENED(r13)
+ cmpwi cr0,r0,0
+ beq 1f
+ addi r1,r1,INT_FRAME_SIZE
+ ld r0,16(r1)
+ mtlr r0
+ blr
+
+ /*
+ * Here we mark ourselves soft-diasbled (we should already be
+ * actually...). The interrupt is only going to happen after
+ * we return to the caller and it does a local_irq_enable()
+ */
+1: li r0,0
stb r0,PACASOFTIRQEN(r13) /* we'll hard-enable shortly */
- stb r0,PACAHARDIRQEN(r13)
stb r0,PACA_NAPSTATELOST(r13)
/* Continue saving state */
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 701d4ac..97d3062 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -72,6 +72,7 @@
#include <asm/paca.h>
#include <asm/firmware.h>
#include <asm/lv1call.h>
+#include <asm/irqflags.h>
#endif
#define CREATE_TRACE_POINTS
#include <asm/trace.h>
@@ -99,14 +100,14 @@ EXPORT_SYMBOL(irq_desc);
int distribute_irqs = 1;
-static inline notrace unsigned long get_hard_enabled(void)
+static inline notrace unsigned long get_irq_happened(void)
{
- unsigned long enabled;
+ unsigned long happened;
__asm__ __volatile__("lbz %0,%1(13)"
- : "=r" (enabled) : "i" (offsetof(struct paca_struct, hard_enabled)));
+ : "=r" (happened) : "i" (offsetof(struct paca_struct, irq_happened)));
- return enabled;
+ return happened;
}
static inline notrace void set_soft_enabled(unsigned long enable)
@@ -115,81 +116,136 @@ static inline notrace void set_soft_enabled(unsigned long enable)
: : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
}
-static inline notrace void decrementer_check_overflow(void)
+static inline int decrementer_check_overflow(void)
{
u64 now = get_tb_or_rtc();
u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
- if (now >= *next_tb)
- set_dec(1);
+ return now >= *next_tb;
}
-notrace void arch_local_irq_restore(unsigned long en)
+/* This is called whenever we are re-enabling interrupts
+ * and returns either 0 (nothing to do) or 500/900 if there's
+ * either an EE or a DEC to generate.
+ *
+ * This is called in two contexts: From arch_local_irq_restore()
+ * before soft-enabling interrupts, and from the exception exit
+ * path when returning from an interrupt from a soft-disabled to
+ * a soft enabled context. In both case we have interrupts hard
+ * disabled.
+ *
+ * We take care of only clearing the bits we handled in the
+ * PACA irq_happened field since we can only re-emit one at a
+ * time and we don't want to "lose" one.
+ */
+notrace unsigned int __check_irq_reemit(void)
{
/*
- * get_paca()->soft_enabled = en;
- * Is it ever valid to use local_irq_restore(0) when soft_enabled is 1?
- * That was allowed before, and in such a case we do need to take care
- * that gcc will set soft_enabled directly via r13, not choose to use
- * an intermediate register, lest we're preempted to a different cpu.
+ * We use local_paca rather than get_paca() to avoid all
+ * the debug_smp_processor_id() business in this low level
+ * function
*/
- set_soft_enabled(en);
- if (!en)
- return;
+ unsigned char happened = local_paca->irq_happened;
+
+ /* Clear bit 0 which we wouldn't clear otherwise */
+ local_paca->irq_happened &= ~1;
-#ifdef CONFIG_PPC_STD_MMU_64
- if (firmware_has_feature(FW_FEATURE_ISERIES)) {
- /*
- * Do we need to disable preemption here? Not really: in the
- * unlikely event that we're preempted to a different cpu in
- * between getting r13, loading its lppaca_ptr, and loading
- * its any_int, we might call iseries_handle_interrupts without
- * an interrupt pending on the new cpu, but that's no disaster,
- * is it? And the business of preempting us off the old cpu
- * would itself involve a local_irq_restore which handles the
- * interrupt to that cpu.
- *
- * But use "local_paca->lppaca_ptr" instead of "get_lppaca()"
- * to avoid any preemption checking added into get_paca().
- */
- if (local_paca->lppaca_ptr->int_dword.any_int)
- iseries_handle_interrupts();
+ /*
+ * Force the delivery of pending soft-disabled interrupts on PS3.
+ * Any HV call will have this side effect.
+ */
+ if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
+ u64 tmp, tmp2;
+ lv1_get_version_info(&tmp, &tmp2);
}
-#endif /* CONFIG_PPC_STD_MMU_64 */
/*
- * if (get_paca()->hard_enabled) return;
- * But again we need to take care that gcc gets hard_enabled directly
- * via r13, not choose to use an intermediate register, lest we're
- * preempted to a different cpu in between the two instructions.
+ * We may have missed a decrementer interrupt. We check the
+ * decrementer itself rather than the paca irq_happened field
+ * in case we also had a rollover while hard disabled
*/
- if (get_hard_enabled())
- return;
+ local_paca->irq_happened &= ~PACA_HAPPENED_DEC;
+ if (decrementer_check_overflow())
+ return 0x900;
+
+ /* Finally check if an external interrupt happened */
+ local_paca->irq_happened &= ~PACA_HAPPENED_EE;
+ if (happened & PACA_HAPPENED_EE)
+ return 0x500;
+
+#ifdef CONFIG_PPC_BOOK3E
+ local_paca->irq_happened &= ~PACA_HAPPENED_PERFMON;
+ if (happened & PACA_HAPPENED_PERFMON)
+ return 0x260;
+
+ local_paca->irq_happened &= ~PACA_HAPPENED_DBELL;
+ if (happened & PACA_HAPPENED_DBELL)
+ return 0x280;
+#endif /* CONFIG_PPC_BOOK3E */
+
+ /* There should be nothing left ! */
+ BUG_ON(local_paca->irq_happened != 0);
+ return 0;
+}
+
+notrace void arch_local_irq_restore(unsigned long en)
+{
+ unsigned int reemit;
+
+ /* Write the new soft-enabled value */
+ set_soft_enabled(en);
+ if (!en)
+ return;
/*
- * Need to hard-enable interrupts here. Since currently disabled,
- * no need to take further asm precautions against preemption; but
- * use local_paca instead of get_paca() to avoid preemption checking.
+ * From this point onward, we can take interrupts, preempt,
+ * etc... unless we got hard-disabled. We check if an event
+ * happened. If none happened, we know we can just return.
+ *
+ * We may have preempted before the check below, in which case
+ * we are checking the "new" CPU instead of the old one. This
+ * is only a problem if an event happened on the "old" CPU.
+ *
+ * External interrupt events on non-iseries will have caused
+ * interrupts to be hard-disabled, so there is no problem, we
+ * cannot have preempted.
+ *
+ * That leaves us with EEs on iSeries or decrementer interrupts,
+ * which I decided to safely ignore. The preemption would have
+ * itself been the result of an interrupt, upon which return we
+ * will have checked for pending events on the old CPU.
*/
- local_paca->hard_enabled = en;
+ if (!get_irq_happened())
+ return;
+ /*
+ * We need to hard disable to get a trusted value from
+ * __check_irq_reemit(). We also need to soft-disable
+ * again to avoid warnings in there due to the use of
+ * per-cpu variables.
+ */
+ __hard_irq_disable();
+ set_soft_enabled(0);
/*
- * Trigger the decrementer if we have a pending event. Some processors
- * only trigger on edge transitions of the sign bit. We might also
- * have disabled interrupts long enough that the decrementer wrapped
- * to positive.
+ * Check if anything needs to be re-emitted. We haven't
+ * soft-enabled yet to avoid warnings in decrementer_check_overflow
+ * accessing per-cpu variables
*/
- decrementer_check_overflow();
+ reemit = __check_irq_reemit();
+
+ /* We can soft-enable now */
+ set_soft_enabled(1);
/*
- * Force the delivery of pending soft-disabled interrupts on PS3.
- * Any HV call will have this side effect.
+ * And re-emit if we have to. This will return with interrupts
+ * hard-enabled.
*/
- if (firmware_has_feature(FW_FEATURE_PS3_LV1)) {
- u64 tmp, tmp2;
- lv1_get_version_info(&tmp, &tmp2);
+ if (reemit) {
+ __reemit_interrupt(reemit);
+ return;
}
+ /* Finally, let's ensure we are hard enabled */
__hard_irq_enable();
}
EXPORT_SYMBOL(arch_local_irq_restore);
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 567dd7c..61b7e17 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -259,7 +259,6 @@ void accumulate_stolen_time(void)
u64 sst, ust;
u8 save_soft_enabled = local_paca->soft_enabled;
- u8 save_hard_enabled = local_paca->hard_enabled;
/* We are called early in the exception entry, before
* soft/hard_enabled are sync'ed to the expected state
@@ -268,7 +267,6 @@ void accumulate_stolen_time(void)
* complain
*/
local_paca->soft_enabled = 0;
- local_paca->hard_enabled = 0;
sst = scan_dispatch_log(local_paca->starttime_user);
ust = scan_dispatch_log(local_paca->starttime);
@@ -277,7 +275,6 @@ void accumulate_stolen_time(void)
local_paca->stolen_time += ust + sst;
local_paca->soft_enabled = save_soft_enabled;
- local_paca->hard_enabled = save_hard_enabled;
}
static inline u64 calculate_stolen_time(u64 stop_tb)
diff --git a/arch/powerpc/platforms/iseries/Makefile b/arch/powerpc/platforms/iseries/Makefile
index a7602b1..7208589 100644
--- a/arch/powerpc/platforms/iseries/Makefile
+++ b/arch/powerpc/platforms/iseries/Makefile
@@ -2,7 +2,7 @@ ccflags-y := -mno-minimal-toc
obj-y += exception.o
obj-y += hvlog.o hvlpconfig.o lpardata.o setup.o dt.o mf.o lpevents.o \
- hvcall.o proc.o htab.o iommu.o misc.o irq.o
+ hvcall.o proc.o htab.o iommu.o irq.o
obj-$(CONFIG_PCI) += pci.o
obj-$(CONFIG_SMP) += smp.o
obj-$(CONFIG_VIOPATH) += viopath.o vio.o
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index f519ee1..06cafb6 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -32,6 +32,7 @@
#include <asm/ptrace.h>
#include <asm/cputable.h>
#include <asm/mmu.h>
+#include <asm/hw_irq.h>
#include "exception.h"
@@ -261,16 +262,20 @@ system_call_iSeries:
decrementer_iSeries_masked:
/* We may not have a valid TOC pointer in here. */
- li r11,1
+ li r11,PACA_HAPPENED_DEC
ld r12,PACALPPACAPTR(r13)
stb r11,LPPACADECRINT(r12)
li r12,-1
clrldi r12,r12,33 /* set DEC to 0x7fffffff */
mtspr SPRN_DEC,r12
- /* fall through */
+ b 1f
hardware_interrupt_iSeries_masked:
- mtcrf 0x80,r9 /* Restore regs */
+ li r11,PACA_HAPPENED_EE
+1: mtcrf 0x80,r9 /* Restore regs */
+ lbz r10,PACAIRQHAPPENED(r13)
+ ori r11,r10,r11
+ stb r11,PACAIRQHAPPENED(r13)
ld r12,PACALPPACAPTR(r13)
ld r11,LPPACASRR0(r12)
ld r12,LPPACASRR1(r12)
diff --git a/arch/powerpc/platforms/iseries/misc.S b/arch/powerpc/platforms/iseries/misc.S
deleted file mode 100644
index 2c6ff0f..0000000
--- a/arch/powerpc/platforms/iseries/misc.S
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * This file contains miscellaneous low-level functions.
- * Copyright (C) 1995-2005 IBM Corp
- *
- * Largely rewritten by Cort Dougan (cort@cs.nmt.edu)
- * and Paul Mackerras.
- * Adapted for iSeries by Mike Corrigan (mikejc@us.ibm.com)
- * PPC64 updates by Dave Engebretsen (engebret@us.ibm.com)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- */
-
-#include <asm/processor.h>
-#include <asm/asm-offsets.h>
-#include <asm/ppc_asm.h>
-
- .text
-
-/* Handle pending interrupts in interrupt context */
-_GLOBAL(iseries_handle_interrupts)
- li r0,0x5555
- sc
- blr
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c
index 085fd3f..019a529 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -96,6 +96,25 @@ out:
return index;
}
+static int check_and_cede_processor(void)
+{
+ /*
+ * Interrupts are soft-disabled at this point,
+ * but not hard disabled. So an interrupt might have
+ * occurred before entering NAP, and would be potentially
+ * lost (edge events, decrementer events, etc...) unless
+ * we first hard disable then check.
+ *
+ * We must use the low level __hard_irq_disable() and not
+ * hard_irq_disable() as the later will set a bit in
+ * paca->irq_happened (to force re-enable later) which we
+ * don't need nor want here.
+ */
+ __hard_irq_disable();
+ if (get_paca()->irq_happened == 0)
+ cede_processor();
+}
+
static int dedicated_cede_loop(struct cpuidle_device *dev,
struct cpuidle_driver *drv,
int index)
@@ -108,7 +127,8 @@ static int dedicated_cede_loop(struct cpuidle_device *dev,
ppc64_runlatch_off();
HMT_medium();
- cede_processor();
+
+ check_and_cede_processor();
get_lppaca()->donate_dedicated_cpu = 0;
dev->last_residency =
@@ -132,7 +152,7 @@ static int shared_cede_loop(struct cpuidle_device *dev,
* processor. When returning here, external interrupts
* are enabled.
*/
- cede_processor();
+ check_and_cede_processor();
dev->last_residency =
(int)idle_loop_epilog(in_purr, kt_before);
^ permalink raw reply related
* Using existing function instead statement
From: majianpeng @ 2012-02-03 6:46 UTC (permalink / raw)
To: linuxppc-dev
>From 53bcbc301e72ed951f67abb6428199e7edfccc16 Mon Sep 17 00:00:00 2001
From: majianpeng <majianpeng@gmail.com>
Date: Fri, 3 Feb 2012 14:35:59 +0000
Subject: [PATCH] Using existing function instead statement.
Signed-off-by: majianpeng <majianpeng@gmail.com>
---
drivers/macintosh/adb.c | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/macintosh/adb.c b/drivers/macintosh/adb.c
index 75049e7..b026896 100644
--- a/drivers/macintosh/adb.c
+++ b/drivers/macintosh/adb.c
@@ -710,7 +710,7 @@ static ssize_t adb_read(struct file *file, char __user *buf,
req = NULL;
spin_lock_irqsave(&state->lock, flags);
add_wait_queue(&state->wait_queue, &wait);
- current->state = TASK_INTERRUPTIBLE;
+ set_current_state(TASK_INTERRUPTIBLE);
for (;;) {
req = state->completed;
@@ -734,7 +734,7 @@ static ssize_t adb_read(struct file *file, char __user *buf,
spin_lock_irqsave(&state->lock, flags);
}
- current->state = TASK_RUNNING;
+ set_current_state(TASK_RUNNING);
remove_wait_queue(&state->wait_queue, &wait);
spin_unlock_irqrestore(&state->lock, flags);
--
1.7.3
--------------
majianpeng
2012-02-03
^ permalink raw reply related
* Re: P2020 with BCM53115
From: Abraham Yaniv @ 2012-02-03 9:54 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <20101220124911.141ce72d@udp111988uds.am.freescale.net>
> Scott Wood <scottwood <at> freescale.com> writes:
>
> On Mon, 20 Dec 2010 13:08:55 -0500
> "Dry, Craig" <cdry <at> mc.com> wrote:
>
> > I am trying to bring up a P2020 board which uses the Broadcom BCM53115
switch in unmanaged mode. The board is
> patterned after the P2020RDB, except the Vitesse switch has been replaced with
a BCM53115. There is no
> MDIO connection to the switch, but there is an SPI connection available if
needed.
> >
> > When running Uboot, the BCM53115 works just fine, as I am able to
download the Linux Kernel and
> P2020RDB.dtb across the network without issue. But as Linux is booting up, I
get the message:
> >
> > mdio_bus mdio <at> ffe24520: error probing PHY at address 0
> > mdio_bus mdio <at> ffe24520: error probing PHY at address 1
> >
> > I expect these errors occur because the P2020RDB.dts file has these entries.
> >
> > I'm not sure what to try next to get Linux to use the BCM53115 switch in
unmanaged mode.
>
> See the fixed-link property in
> Documentation/powerpc/dts-bindings/fsl/tsec.txt
>
> -Scott
>
Hi there Craig!
I have the same setup (Freescale P2020 CPU with Broadcom BCM53115 switch)
but I'm having a hard time bringing it up.
The P2020's eTSEC2 is connected to port 5 (WAN) of the BCM53115.
I managed to make a link up status on the BCM53115 port 5 but I believe this is a
false link up because no traffic is passing between the P2020 and the BCM53115
and the BCM53115 SerDes/SGMII status register says there is a False Carrier
situation.
The P2020 eTSEC is configured to SGMII/TBI (ECNTRL[SGMIIM]=1,
ECNTRL[TBIM]=1, and MACCFG2[I/F]=10).
Is there a chance you can share with me what is the configuration required
to my BCM53115 to make a true link up?
Thanks a million,
Yaniv
^ permalink raw reply
* Re: [PATCH v3 13/25] irq_domain: Remove 'new' irq_domain in favour of the ppc one
From: Cousson, Benoit @ 2012-02-03 14:48 UTC (permalink / raw)
To: Grant Likely
Cc: Stephen Rothwell, devicetree-discuss, linux-kernel, Rob Herring,
Milton Miller, Thomas Gleixner, linuxppc-dev, linux-arm-kernel
In-Reply-To: <1327700179-17454-14-git-send-email-grant.likely@secretlab.ca>
Hi Grant,
I finally had the time to rebase most of the OMAP3 and OMAP4 DT patches
on your latest irq_domain series and found a couple of minors
regressions that breaks OMAP3 boot.
On 1/27/2012 10:36 PM, Grant Likely wrote:
[...]
> diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
> index e04e04dd..aab236f 100644
> --- a/drivers/mfd/twl-core.c
> +++ b/drivers/mfd/twl-core.c
> @@ -263,8 +263,6 @@ struct twl_client {
>
> static struct twl_client twl_modules[TWL_NUM_SLAVES];
>
> -static struct irq_domain domain;
> -
> /* mapping the module id to slave id and base address */
> struct twl_mapping {
> unsigned char sid; /* Slave ID */
> @@ -1225,14 +1223,8 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
>
> pdata->irq_base = status;
> pdata->irq_end = pdata->irq_base + nr_irqs;
> -
> - domain.irq_base = pdata->irq_base;
> - domain.nr_irq = nr_irqs;
> -#ifdef CONFIG_OF_IRQ
> - domain.of_node = of_node_get(node);
> - domain.ops =&irq_domain_simple_ops;
> -#endif
> - irq_domain_add(&domain);
> + irq_domain_add_legacy(node, nr_irqs, pdata->irq_base, 0,
> + &irq_domain_simple_ops);
This commit cannot build due to the missing last parameter.
And in fact you fixed that in the next commit (#14), but the will break
git bisect and anyway that fix does not really belong to this commit.
[PATCH v3 14/25] irq_domain: Remove irq_domain_add_simple()
irq_domain_add_legacy(node, nr_irqs, pdata->irq_base, 0,
- &irq_domain_simple_ops);
+ &irq_domain_simple_ops, NULL);
Moreover, it looks like this new irq_domain code is checking the number
of hwirq and is not as lazy as the previous one :-)
Because of that and because of the wrong number of IRQs I put for the
twl4030 :-(, it does not handle properly the children of the twl4030 now
and print a big warning at boot time due to the following check.
WARN_ON(hwirq < first_hwirq || hwirq >= first_hwirq + size)
In fact 8 was just the number for the core functionality, but that chip
does have some other interrupts for sub function like GPIOs and power
events.
With the following fix, it works fine.
Regards,
Benoit
---
From 12781619d2ab8d6d724acabc6873954f0f9f4347 Mon Sep 17 00:00:00 2001
From: Benoit Cousson <b-cousson@ti.com>
Date: Fri, 3 Feb 2012 14:58:17 +0100
Subject: [PATCH] mfd: twl-core.c: Fix the number of interrupts managed
by twl4030
TWL4030 does handle 3 different interrupts ranges: 8 for the core, 8 for
the power events and 18 for the GPIOs.
Change the total number of interrupts managed by TWL4030 from 8 to 34.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
---
drivers/mfd/twl-core.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index e63b408..66f9bff 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -149,7 +149,7 @@
#define TWL_MODULE_LAST TWL4030_MODULE_LAST
-#define TWL4030_NR_IRQS 8
+#define TWL4030_NR_IRQS 34 /* core:8, power:8, gpio: 18 */
#define TWL6030_NR_IRQS 20
/* Base Address defns for twl4030_map[] */
--
1.7.0.4
^ permalink raw reply related
* Re: [PATCH v3 13/25] irq_domain: Remove 'new' irq_domain in favour of the ppc one
From: Grant Likely @ 2012-02-03 16:42 UTC (permalink / raw)
To: Cousson, Benoit
Cc: Stephen Rothwell, devicetree-discuss, linux-kernel, Milton Miller,
Rob Herring, Thomas Gleixner, linuxppc-dev, linux-arm-kernel
In-Reply-To: <4F2BF3A9.8030200@ti.com>
On Fri, Feb 03, 2012 at 03:48:09PM +0100, Cousson, Benoit wrote:
> Hi Grant,
>
> I finally had the time to rebase most of the OMAP3 and OMAP4 DT
> patches on your latest irq_domain series and found a couple of
> minors regressions that breaks OMAP3 boot.
>
> On 1/27/2012 10:36 PM, Grant Likely wrote:
>
> [...]
>
> >diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
> >index e04e04dd..aab236f 100644
> >--- a/drivers/mfd/twl-core.c
> >+++ b/drivers/mfd/twl-core.c
> >@@ -263,8 +263,6 @@ struct twl_client {
> >
> > static struct twl_client twl_modules[TWL_NUM_SLAVES];
> >
> >-static struct irq_domain domain;
> >-
> > /* mapping the module id to slave id and base address */
> > struct twl_mapping {
> > unsigned char sid; /* Slave ID */
> >@@ -1225,14 +1223,8 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
> >
> > pdata->irq_base = status;
> > pdata->irq_end = pdata->irq_base + nr_irqs;
> >-
> >- domain.irq_base = pdata->irq_base;
> >- domain.nr_irq = nr_irqs;
> >-#ifdef CONFIG_OF_IRQ
> >- domain.of_node = of_node_get(node);
> >- domain.ops =&irq_domain_simple_ops;
> >-#endif
> >- irq_domain_add(&domain);
> >+ irq_domain_add_legacy(node, nr_irqs, pdata->irq_base, 0,
> >+ &irq_domain_simple_ops);
>
> This commit cannot build due to the missing last parameter.
>
> And in fact you fixed that in the next commit (#14), but the will
> break git bisect and anyway that fix does not really belong to this
> commit.
>
> [PATCH v3 14/25] irq_domain: Remove irq_domain_add_simple()
>
> irq_domain_add_legacy(node, nr_irqs, pdata->irq_base, 0,
> - &irq_domain_simple_ops);
> + &irq_domain_simple_ops, NULL);
Good catch, thanks. I'll update the series to fix that.
>
>
> Moreover, it looks like this new irq_domain code is checking the
> number of hwirq and is not as lazy as the previous one :-)
>
> Because of that and because of the wrong number of IRQs I put for
> the twl4030 :-(, it does not handle properly the children of the
> twl4030 now and print a big warning at boot time due to the
> following check.
>
> WARN_ON(hwirq < first_hwirq || hwirq >= first_hwirq + size)
Good! The warning is doing it's job. :-)
> In fact 8 was just the number for the core functionality, but that
> chip does have some other interrupts for sub function like GPIOs and
> power events.
Okay, I'll add this patch to the series before patch 13.
>
> With the following fix, it works fine.
>
> Regards,
> Benoit
>
>
> ---
> From 12781619d2ab8d6d724acabc6873954f0f9f4347 Mon Sep 17 00:00:00 2001
> From: Benoit Cousson <b-cousson@ti.com>
> Date: Fri, 3 Feb 2012 14:58:17 +0100
> Subject: [PATCH] mfd: twl-core.c: Fix the number of interrupts
> managed by twl4030
>
> TWL4030 does handle 3 different interrupts ranges: 8 for the core, 8
> for the power events and 18 for the GPIOs.
>
> Change the total number of interrupts managed by TWL4030 from 8 to 34.
>
> Signed-off-by: Benoit Cousson <b-cousson@ti.com>
> ---
> drivers/mfd/twl-core.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
> index e63b408..66f9bff 100644
> --- a/drivers/mfd/twl-core.c
> +++ b/drivers/mfd/twl-core.c
> @@ -149,7 +149,7 @@
>
> #define TWL_MODULE_LAST TWL4030_MODULE_LAST
>
> -#define TWL4030_NR_IRQS 8
> +#define TWL4030_NR_IRQS 34 /* core:8, power:8, gpio: 18 */
> #define TWL6030_NR_IRQS 20
>
> /* Base Address defns for twl4030_map[] */
> --
> 1.7.0.4
>
>
>
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
^ permalink raw reply
* Re: Efika (mpc5200b): sound doesn't build/work from linux-2.6.38.x
From: acrux @ 2012-02-04 2:02 UTC (permalink / raw)
To: Tabi Timur-B04825; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <CAOZdJXU+kiQgsM9F3JVG3o8LV4oejSA1D85bFX+ZsqB7f9j_Ew@mail.gmail.com>
On Thu, 2 Feb 2012 21:50:02 +0000
Tabi Timur-B04825 <B04825@freescale.com> wrote:
> On Thu, Feb 2, 2012 at 10:57 AM, acrux <acrux_it@libero.it> wrote:
>
>
> > well, i got the same error with also linux-2.6.37. Btw, this was already reported about a year ago:
> > http://lists.ozlabs.org/pipermail/linuxppc-dev/2011-February/088415.html
>
> I think this was fixed already. You're using an obsolete kernel.
>
hi Timur,
as i said [1] it seems to be fixed only in 3.x instead the last working one is the obsolete 2.6.36.x .
Anyway, alog the sound/soc/fsl/mpc5200_dma.c now builds the sound is still broken.
best,
--nico
[1]
On Thu, 2 Feb 2012 03:48:03 +0100
acrux <acrux_it@libero.it> wrote:
__omissis_
>
> With linux-3.0.18, linux-3.1.10 and linux-3.2.2 it builds but doesn't work.
> That's from my dmesg:
>
> [...]
> asoc: error - multiple DAI f0002200.sound registered with no name
> mpc5200-psc-ac97 f0002200.sound: Failed to register DAI
> mpc5200-psc-ac97: probe of f0002200.sound failed with error -22
>
acrux <acrux@cruxppc.org>
^ permalink raw reply
* Re: [PATCH] irq: make SPARSE_IRQ an optionally hidden option
From: Russell King - ARM Linux @ 2012-02-04 11:33 UTC (permalink / raw)
To: Rob Herring
Cc: linux-c6x-dev, Aurelien Jacquiot, linux-sh, H. Peter Anvin,
linux-kernel, Rob Herring, Paul Mundt, Paul Mackerras,
Mark Salter, Thomas Gleixner, linuxppc-dev, Ingo Molnar,
linux-arm-kernel
In-Reply-To: <1327546727-31681-1-git-send-email-robherring2@gmail.com>
So that everyone who received this patch knows...
I've just pulled Rob's series, which includes this patch, into a stable
branch in my tree and it is my intention to send this during the 3.4
merge window. This means that there is a patch in my tree which touches
other architectures' Kconfig files.
If there's any objections, please let me know asap.
Thanks.
On Wed, Jan 25, 2012 at 08:58:47PM -0600, Rob Herring wrote:
> From: Rob Herring <rob.herring@calxeda.com>
>
> On ARM, we don't want SPARSE_IRQ to be a user visible option. Make
> SPARSE_IRQ visible based on MAY_HAVE_SPARSE_IRQ instead of depending
> on HAVE_SPARSE_IRQ.
>
> With this, SPARSE_IRQ is not visible on C6X and ARM.
>
> Signed-off-by: Rob Herring <rob.herring@calxeda.com>
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Mark Salter <msalter@redhat.com>
> Cc: Aurelien Jacquiot <a-jacquiot@ti.com>
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Paul Mackerras <paulus@samba.org>
> Cc: Paul Mundt <lethal@linux-sh.org>
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: "H. Peter Anvin" <hpa@zytor.com>
> Cc: linux-arm-kernel@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org
> Cc: linux-c6x-dev@linux-c6x.org
> Cc: linuxppc-dev@lists.ozlabs.org
> Cc: linux-sh@vger.kernel.org
> ---
>
> This is part of an irq include consolidation series for ARM:
>
> http://www.spinics.net/lists/arm-kernel/msg156492.html
>
> Rob
>
> arch/arm/Kconfig | 1 -
> arch/c6x/Kconfig | 2 +-
> arch/powerpc/Kconfig | 2 +-
> arch/sh/Kconfig | 2 +-
> arch/x86/Kconfig | 1 -
> kernel/irq/Kconfig | 5 ++---
> 6 files changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 24626b0..30e7840 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -28,7 +28,6 @@ config ARM
> select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
> select HAVE_C_RECORDMCOUNT
> select HAVE_GENERIC_HARDIRQS
> - select HAVE_SPARSE_IRQ
> select GENERIC_IRQ_SHOW
> select CPU_PM if (SUSPEND || CPU_IDLE)
> select GENERIC_PCI_IOMAP
> diff --git a/arch/c6x/Kconfig b/arch/c6x/Kconfig
> index 26e67f0..2f58c61 100644
> --- a/arch/c6x/Kconfig
> +++ b/arch/c6x/Kconfig
> @@ -11,7 +11,7 @@ config TMS320C6X
> select HAVE_DMA_API_DEBUG
> select HAVE_GENERIC_HARDIRQS
> select HAVE_MEMBLOCK
> - select HAVE_SPARSE_IRQ
> + select SPARSE_IRQ
> select OF
> select OF_EARLY_FLATTREE
>
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 1919634..06c1cf0 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -133,7 +133,7 @@ config PPC
> select HAVE_REGS_AND_STACK_ACCESS_API
> select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
> select HAVE_GENERIC_HARDIRQS
> - select HAVE_SPARSE_IRQ
> + select MAY_HAVE_SPARSE_IRQ
> select IRQ_PER_CPU
> select GENERIC_IRQ_SHOW
> select GENERIC_IRQ_SHOW_LEVEL
> diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
> index 3c8db65..21b82a8 100644
> --- a/arch/sh/Kconfig
> +++ b/arch/sh/Kconfig
> @@ -22,7 +22,7 @@ config SUPERH
> select HAVE_SYSCALL_TRACEPOINTS
> select HAVE_REGS_AND_STACK_ACCESS_API
> select HAVE_GENERIC_HARDIRQS
> - select HAVE_SPARSE_IRQ
> + select MAY_HAVE_SPARSE_IRQ
> select IRQ_FORCED_THREADING
> select RTC_LIB
> select GENERIC_ATOMIC64
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index 864cc6e..fb2da44 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -69,7 +69,6 @@ config X86
> select HAVE_ARCH_JUMP_LABEL
> select HAVE_TEXT_POKE_SMP
> select HAVE_GENERIC_HARDIRQS
> - select HAVE_SPARSE_IRQ
> select SPARSE_IRQ
> select GENERIC_FIND_FIRST_BIT
> select GENERIC_IRQ_PROBE
> diff --git a/kernel/irq/Kconfig b/kernel/irq/Kconfig
> index 5a38bf4..1f2dece 100644
> --- a/kernel/irq/Kconfig
> +++ b/kernel/irq/Kconfig
> @@ -13,7 +13,7 @@ config GENERIC_HARDIRQS
> # Options selectable by the architecture code
>
> # Make sparse irq Kconfig switch below available
> -config HAVE_SPARSE_IRQ
> +config MAY_HAVE_SPARSE_IRQ
> bool
>
> # Enable the generic irq autoprobe mechanism
> @@ -61,8 +61,7 @@ config IRQ_FORCED_THREADING
> bool
>
> config SPARSE_IRQ
> - bool "Support sparse irq numbering"
> - depends on HAVE_SPARSE_IRQ
> + bool "Support sparse irq numbering" if MAY_HAVE_SPARSE_IRQ
> ---help---
>
> Sparse irq numbering is useful for distro kernels that want
> --
> 1.7.5.4
>
^ permalink raw reply
* [ppc] sm501-usb boot hang down with linux-3.1.10 and linux-3.2.4 on sam460ex
From: acrux @ 2012-02-04 17:55 UTC (permalink / raw)
To: linuxppc-dev
board: Acube Sam460ex (canyonlands based)
boot process hang down with linux-3.1.10 and 3.2.4 [1]
instead with linux-3.0.19 still boot but with a weird Oops [2]
[1]
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
Memory: 2073520k/2097152k available (6024k kernel code, 23632k reserved, 168k data, 125k bss, 196k init)
Kernel virtual memory layout:
* 0xfffcf000..0xfffff000 : fixmap
* 0xffc00000..0xffe00000 : highmem PTEs
* 0xffa00000..0xffc00000 : consistent mem
* 0xffa00000..0xffa00000 : early ioremap
* 0xf1000000..0xffa00000 : vmalloc & ioremap
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:512 nr_irqs:512 16
UIC0 (32 IRQ sources) at DCR 0xc0
UIC1 (32 IRQ sources) at DCR 0xd0
UIC2 (32 IRQ sources) at DCR 0xe0
UIC3 (32 IRQ sources) at DCR 0xf0
clocksource: timebase mult[36db6e] shift[22] registered
Console: colour dummy device 80x25
console [tty0] enabled
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
devtmpfs: initialized
NET: Registered protocol family 16
256k L2-cache enabled
PCIE0: Port disabled via device-tree
PCIE1: Checking link...
PCIE1: No device detected.
PCI host bridge /plb/pciex@d20000000 (primary) ranges:
MEM 0x0000000e80000000..0x0000000effffffff -> 0x0000000080000000
MEM 0x0000000f00100000..0x0000000f001fffff -> 0x0000000000000000
IO 0x0000000f80010000..0x0000000f8001ffff -> 0x0000000000000000
Removing ISA hole at 0x0000000f00100000
4xx PCI DMA offset set to 0x00000000
/plb/pciex@d20000000: Legacy ISA memory support enabled
PCIE1: successfully set as root-complex
PCI host bridge /plb/pci@c0ec00000 (primary) ranges:
MEM 0x0000000d80000000..0x0000000dffffffff -> 0x0000000080000000
MEM 0x0000000c0ee00000..0x0000000c0eefffff -> 0x0000000000000000
IO 0x0000000c08000000..0x0000000c0800ffff -> 0x0000000000000000
Removing ISA hole at 0x0000000c0ee00000
4xx PCI DMA offset set to 0x00000000
/plb/pci@c0ec00000: Legacy ISA memory support enabled
PCI: Probing PCI hardware
PCI: Hiding 4xx host bridge resources 0000:80:00.0
pci 0000:80:00.0: PCI bridge to [bus 81-bf]
pci 0000:80:00.0: PCI bridge to [bus 81-bf]
pci 0001:00:06.0: BAR 0: assigned [mem 0xd80000000-0xd83ffffff]
pci 0001:00:06.0: BAR 0: set to [mem 0xd80000000-0xd83ffffff] (PCI address [0x80000000-0x83ffffff])
pci 0001:00:06.0: BAR 1: assigned [mem 0xd84000000-0xd841fffff]
pci 0001:00:06.0: BAR 1: set to [mem 0xd84000000-0xd841fffff] (PCI address [0x84000000-0x841fffff])
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
Switching to clocksource timebase
Switched to NOHz mode on CPU #0
NET: Registered protocol family 2
IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 6, 262144 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
TCP reno registered
UDP hash table entries: 512 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 512 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
Could not remap bcsr
setting trigger mode 3 for irq 43 failed (uic_set_irq_type+0x0/0x164)
setting trigger mode 3 for irq 43 failed (uic_set_irq_type+0x0/0x164)
highmem bounce pool size: 64 pages
JFS: nTxBlock = 8192, nTxLock = 65536
SGI XFS with ACLs, security attributes, large block/inode numbers, no debug enabled
Btrfs loaded
msgmni has been set to 1489
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
io scheduler noop registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250.0: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a U6_16550A
console [ttyS0] enabled
serial8250.0: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a U6_16550A
4ef600300.serial: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a 16550
4ef600400.serial: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a 16550
Generic non-volatile memory driver v1.1
brd: module loaded
loop: module loaded
sm501 0001:00:06.0: SM501 At f5480000: Version 050100c0, 64 Mb, IRQ 19
sm501 0001:00:06.0: setting M1XCLK to 144000000
sm501 0001:00:06.0: setting MCLK to 72000000
serial8250.10: ttyS2 at MMIO 0xd84030000 (irq = 19) is a ST16654
serial8250.10: ttyS3 at MMIO 0xd84030020 (irq = 19) is a ST16654
sm501-fb sm501-fb.80: fb sm501fb-crt disabled at start
sm501-fb sm501-fb.80: using mode specified in @mode
Console: switching to colour frame buffer device 100x37
sm501-fb sm501-fb.80: fb0: sm501fb-crt frame buffer
sm501-fb sm501-fb.80: fb sm501fb-panel enabled at start
sm501-fb sm501-fb.80: using mode specified in @mode
sm501-fb sm501-fb.80: fb1: sm501fb-panel frame buffer
sata-dwc 4bffd1000.sata: id 0, controller version 1.82
sata-dwc 4bffd1000.sata: DMA initialized
scsi0 : sata-dwc
ata1: SATA max UDMA/133 irq 34
PPC 4xx OCP EMAC driver, version 3.54
MAL v2 /plb/mcmal, 2 TX channels, 16 RX channels
ZMII /plb/opb/emac-zmii@ef600d00 initialized
RGMII /plb/opb/emac-rgmii@ef601500 initialized with MDIO support
TAH /plb/opb/emac-tah@ef601350 initialized
TAH /plb/opb/emac-tah@ef601450 initialized
/plb/opb/emac-rgmii@ef601500: input 0 in RGMII mode
eth0: EMAC-0 /plb/opb/ethernet@ef600e00, MAC 00:50:c2:80:d4:89
eth0: found Generic MII PHY (0x00)
/plb/opb/emac-rgmii@ef601500: input 1 in RGMII mode
eth1: EMAC-1 /plb/opb/ethernet@ef600f00, MAC 00:00:00:00:00:00
eth1: found Generic MII PHY (0x01)
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ppc-of-ehci 4bffd0400.ehci: OF EHCI
ppc-of-ehci 4bffd0400.ehci: new USB bus registered, assigned bus number 1
ppc-of-ehci 4bffd0400.ehci: irq 27, io mem 0x4bffd0400
ppc-of-ehci 4bffd0400.ehci: USB 2.0 started, EHCI 1.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: OF EHCI
usb usb1: Manufacturer: Linux 3.1.10 ehci_hcd
usb usb1: SerialNumber: PPC-OF USB
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
mousedev: PS/2 mouse device common for all mice
i2c /dev entries driver
ibm-iic 4ef600700.i2c: using standard (100 kHz) mode
rtc-m41t80 0-0068: chip found, driver version 0.05
rtc-m41t80 0-0068: rtc core: registered m41t80 as rtc0
ibm-iic 4ef600800.i2c: using standard (100 kHz) mode
booke_wdt: powerpc book-e watchdog driver loaded
device-mapper: ioctl: 4.21.0-ioctl (2011-07-06) initialised: dm-devel@redhat.com
usbcore: registered new interface driver ushc
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
TCP cubic registered
NET: Registered protocol family 10
IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
Registering the dns_resolver key type
rtc-m41t80 0-0068: setting system clock to 2012-02-04 14:15:15 UTC (1328364915)
usb 1-1: new high speed USB device number 2 using ppc-of-ehci
ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata1.00: ATA-8: WDC WD5000AAKX-001CA0, 15.01H15, max UDMA/133
ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 1/32)
ata1.00: configured for UDMA/133
scsi 0:0:0:0: Direct-Access ATA WDC WD5000AAKX-0 15.0 PQ: 0 ANSI: 5
sd 0:0:0:0: [sda] 976773168 512-byte logical blocks: (500 GB/465 GiB)
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:0:0: [sda] Write Protect is off
usb 1-1: New USB device found, idVendor=0424, idProduct=2517
usb 1-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0
sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
hub 1-1:1.0: USB hub found
hub 1-1:1.0: 7 ports detected
sda: RDSK (512) sda1 (LNX^@)(res 2 spb 1) sda2 (LNX^@)(res 2 spb 1) sda3 (LNX^@)(res 2 spb 1) sda4 (LNX^@)(res 2 spb 1)
sd 0:0:0:0: [sda] Attached SCSI disk
REISERFS (device sda3): found reiserfs format "3.6" with standard journal
REISERFS (device sda3): using ordered data mode
reiserfs: using flush barriers
REISERFS (device sda3): journal params: device sda3, size 8192, journal first block 18, max trans len 1024, max batch 900, max commit age 30, max trans age 30
REISERFS (device sda3): checking transaction log (sda3)
REISERFS (device sda3): Using r5 hash to sort names
VFS: Mounted root (reiserfs filesystem) readonly on device 8:3.
devtmpfs: mounted
Freeing unused kernel memory: 196k freed
usb 1-1.1: new low speed USB device number 3 using ppc-of-ehci
usb 1-1.1: New USB device found, idVendor=062a, idProduct=0102
usb 1-1.1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 1-1.1: Product: Wireless Keyboard & Mouse
usb 1-1.1: Manufacturer: MOSART Semi.
input: MOSART Semi. Wireless Keyboard & Mouse as /devices/plb.0/4bffd0400.ehci/usb1/1-1/1-1.1/1-1.1:1.0/input/input0
generic-usb 0003:062A:0102.0001: input,hidraw0: USB HID v1.10 Keyboard [MOSART Semi. Wireless Keyboard & Mouse] on usb-PPC-OF USB-1.1/input0
input: MOSART Semi. Wireless Keyboard & Mouse as /devices/plb.0/4bffd0400.ehci/usb1/1-1/1-1.1/1-1.1:1.1/input/input1
INIT: generic-usb 0003:062A:0102.0002: input,hiddev0,hidraw1: USB HID v1.10 Mouse [MOSART Semi. Wireless Keyboard & Mouse] on usb-PPC-OF USB-1.1/input1
version 2.88 booting
usb 1-1.7: new high speed USB device number 4 using ppc-of-ehci
The system is coming up. Please wait.
usb 1-1.7: New USB device found, idVendor=0424, idProduct=2240
usb 1-1.7: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-1.7: Product: Ultra Fast Media
usb 1-1.7: Manufacturer: Generic
usb 1-1.7: SerialNumber: 000000225001
scsi1 : usb-storage 1-1.7:1.0
udevd[55]: error: runtime directory '/run/udev' not writable, for now falling back to '/dev/.udev'
udevd[56]: starting version 175
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
ppc-of-ohci 4bffd0000.usb: OF OHCI
ppc-of-ohci 4bffd0000.usb: new USB bus registered, assigned bus number 2
ppc-of-ohci 4bffd0000.usb: irq 28, io mem 0x4bffd0000
usb usb2: New USB device found, idVendor=1d6b, idProduct=0001
usb usb2: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb2: Product: OF OHCI
usb usb2: Manufacturer: Linux 3.1.10 ohci_hcd
usb usb2: SerialNumber: PPC-OF USB
scsi 1:0:0:0: Direct-Access Generic Ultra HS-COMBO 1.68 PQ: 0 ANSI: 0
sd 1:0:0:0: [sdb] Attached SCSI removable disk
sd 1:0:0:0: Attached scsi generic sg1 type 0
ad7414 0-0048: chip found
hub 2-0:1.0: USB hub found
hub 2-0:1.0: 1 port detected
sm501-usb sm501-usb.80: cannot declare coherent memory
[2]
pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768
pcpu-alloc: [0] 0
Built 1 zonelists in Zone order, mobility grouping on. Total pages: 520192
Kernel command line: root=/dev/sda3 ro video=800x600 udbg-immortal console=tty0 console=ttyS0,115200
PID hash table entries: 4096 (order: 2, 16384 bytes)
Dentry cache hash table entries: 131072 (order: 7, 524288 bytes)
Inode-cache hash table entries: 65536 (order: 6, 262144 bytes)
High memory: 1310720k
Memory: 2073496k/2097152k available (6048k kernel code, 23656k reserved, 168k data, 125k bss, 196k init)
Kernel virtual memory layout:
* 0xfffcf000..0xfffff000 : fixmap
* 0xffc00000..0xffe00000 : highmem PTEs
* 0xffa00000..0xffc00000 : consistent mem
* 0xffa00000..0xffa00000 : early ioremap
* 0xf1000000..0xffa00000 : vmalloc & ioremap
SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
NR_IRQS:512 nr_irqs:512 16
UIC0 (32 IRQ sources) at DCR 0xc0
UIC1 (32 IRQ sources) at DCR 0xd0
irq: irq 30 on host /interrupt-controller0 mapped to virtual irq 30
UIC2 (32 IRQ sources) at DCR 0xe0
irq: irq 10 on host /interrupt-controller0 mapped to virtual irq 16
UIC3 (32 IRQ sources) at DCR 0xf0
irq: irq 16 on host /interrupt-controller0 mapped to virtual irq 17
time_init: decrementer frequency = 1166.666663 MHz
time_init: processor frequency = 1166.666663 MHz
clocksource: timebase mult[36db6e] shift[22] registered
clockevent: decrementer mult[9555554d] shift[31] cpu[0]
Console: colour dummy device 80x25
console [tty0] enabled
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 512
devtmpfs: initialized
NET: Registered protocol family 16
irq: irq 11 on host /interrupt-controller1 mapped to virtual irq 18
256k L2-cache enabled
PCIE0: Port disabled via device-tree
PCIE1: Checking link...
PCIE1: No device detected.
PCI host bridge /plb/pciex@d20000000 (primary) ranges:
MEM 0x0000000e80000000..0x0000000effffffff -> 0x0000000080000000
MEM 0x0000000f00100000..0x0000000f001fffff -> 0x0000000000000000
IO 0x0000000f80010000..0x0000000f8001ffff -> 0x0000000000000000
Removing ISA hole at 0x0000000f00100000
4xx PCI DMA offset set to 0x00000000
/plb/pciex@d20000000: Legacy ISA memory support enabled
PCIE1: successfully set as root-complex
PCI host bridge /plb/pci@c0ec00000 (primary) ranges:
MEM 0x0000000d80000000..0x0000000dffffffff -> 0x0000000080000000
MEM 0x0000000c0ee00000..0x0000000c0eefffff -> 0x0000000000000000
IO 0x0000000c08000000..0x0000000c0800ffff -> 0x0000000000000000
Removing ISA hole at 0x0000000c0ee00000
4xx PCI DMA offset set to 0x00000000
/plb/pci@c0ec00000: Legacy ISA memory support enabled
PCI: Probing PCI hardware
pci 0000:80:00.0: [aaa1:bed1] type 1 class 0x000604
pci 0000:80:00.0: reg 10: [mem 0x00000000-0x7fffffff pref]
PCI: Hiding 4xx host bridge resources 0000:80:00.0
pci 0000:80:00.0: PCI bridge to [bus 81-bf]
pci 0000:80:00.0: bridge window [io 0x0000-0x0000] (disabled)
pci 0000:80:00.0: bridge window [mem 0x00000000-0x000fffff] (disabled)
pci 0000:80:00.0: bridge window [mem 0x00000000-0x000fffff pref] (disabled)
pci 0001:00:06.0: [126f:0501] type 0 class 0x000380
pci 0001:00:06.0: reg 10: [mem 0x80000000-0x83ffffff]
pci 0001:00:06.0: reg 14: [mem 0x84000000-0x841fffff]
pci 0001:00:06.0: supports D1 D2
irq: irq 0 on host /interrupt-controller1 mapped to virtual irq 19
PCI: max bus depth: 1 pci_try_num: 2
pci 0000:80:00.0: PCI bridge to [bus 81-bf]
pci 0000:80:00.0: bridge window [io disabled]
pci 0000:80:00.0: bridge window [mem disabled]
pci 0000:80:00.0: bridge window [mem pref disabled]
pci 0001:00:06.0: BAR 0: assigned [mem 0xd80000000-0xd83ffffff]
pci 0001:00:06.0: BAR 0: set to [mem 0xd80000000-0xd83ffffff] (PCI address [0x80000000-0x83ffffff])
pci 0001:00:06.0: BAR 1: assigned [mem 0xd84000000-0xd841fffff]
pci 0001:00:06.0: BAR 1: set to [mem 0xd84000000-0xd841fffff] (PCI address [0x84000000-0x841fffff])
pci_bus 0000:80: resource 0 [io 0xfffe0000-0xfffeffff]
pci_bus 0000:80: resource 1 [mem 0xe80000000-0xeffffffff]
pci_bus 0001:00: resource 0 [io 0x0000-0xffff]
pci_bus 0001:00: resource 1 [mem 0xd80000000-0xdffffffff]
bio: create slab <bio-0> at 0
vgaarb: loaded
SCSI subsystem initialized
libata version 3.00 loaded.
usbcore: registered new interface driver usbfs
usbcore: registered new interface driver hub
usbcore: registered new device driver usb
Switching to clocksource timebase
Switched to NOHz mode on CPU #0
NET: Registered protocol family 2
IP route cache hash table entries: 32768 (order: 5, 131072 bytes)
TCP established hash table entries: 131072 (order: 8, 1048576 bytes)
TCP bind hash table entries: 65536 (order: 6, 262144 bytes)
TCP: Hash tables configured (established 131072 bind 65536)
TCP reno registered
UDP hash table entries: 512 (order: 1, 8192 bytes)
UDP-Lite hash table entries: 512 (order: 1, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
PCI: CLS 0 bytes, default 32
irq: irq 1 on host /interrupt-controller1 mapped to virtual irq 20
irq: irq 1 on host /interrupt-controller0 mapped to virtual irq 21
Could not remap bcsr
irq: irq 29 on host /interrupt-controller0 mapped to virtual irq 29
irq: irq 6 on host /interrupt-controller2 mapped to virtual irq 22
irq: irq 7 on host /interrupt-controller2 mapped to virtual irq 23
irq: irq 3 on host /interrupt-controller2 mapped to virtual irq 24
irq: irq 4 on host /interrupt-controller2 mapped to virtual irq 25
irq: irq 5 on host /interrupt-controller2 mapped to virtual irq 26
irq: irq 29 on host /interrupt-controller2 mapped to virtual irq 27
irq: irq 30 on host /interrupt-controller2 mapped to virtual irq 28
irq: irq 28 on host /interrupt-controller2 mapped to virtual irq 31
irq: irq 26 on host /interrupt-controller1 mapped to virtual irq 32
irq: irq 12 on host /interrupt-controller0 mapped to virtual irq 33
irq: irq 0 on host /interrupt-controller3 mapped to virtual irq 34
irq: irq 5 on host /interrupt-controller3 mapped to virtual irq 35
irq: irq 6 on host /interrupt-controller1 mapped to virtual irq 36
irq: irq 2 on host /interrupt-controller0 mapped to virtual irq 37
irq: irq 3 on host /interrupt-controller0 mapped to virtual irq 38
irq: irq 16 on host /interrupt-controller2 mapped to virtual irq 39
irq: irq 20 on host /interrupt-controller2 mapped to virtual irq 40
irq: irq 17 on host /interrupt-controller2 mapped to virtual irq 41
irq: irq 21 on host /interrupt-controller2 mapped to virtual irq 42
irq: irq 2 on host /interrupt-controller3 mapped to virtual irq 43
setting trigger mode 3 for irq 43 failed (uic_set_irq_type+0x0/0x164)
setting trigger mode 3 for irq 43 failed (uic_set_irq_type+0x0/0x164)
highmem bounce pool size: 64 pages
JFS: nTxBlock = 8192, nTxLock = 65536
SGI XFS with ACLs, security attributes, large block/inode numbers, no debug enabled
Btrfs loaded
msgmni has been set to 1489
Block layer SCSI generic (bsg) driver version 0.4 loaded (major 253)
io scheduler noop registered
io scheduler cfq registered (default)
Serial: 8250/16550 driver, 4 ports, IRQ sharing enabled
serial8250.0: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a U6_16550A
console [ttyS0] enabled
serial8250.0: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a U6_16550A
4ef600300.serial: ttyS0 at MMIO 0x4ef600300 (irq = 20) is a 16550
4ef600400.serial: ttyS1 at MMIO 0x4ef600400 (irq = 21) is a 16550
Generic non-volatile memory driver v1.1
brd: module loaded
loop: module loaded
sm501 0001:00:06.0: SM501 At f5480000: Version 050100c0, 64 Mb, IRQ 19
sm501 0001:00:06.0: setting M1XCLK to 144000000
sm501 0001:00:06.0: setting MCLK to 72000000
sm501-usb[0] [mem 0xd84040000-0xd8405ffff]
sm501-usb[1] [mem 0xd83fc0000-0xd83ffffff]
sm501-usb[2] [irq 19]
serial8250.10: ttyS2 at MMIO 0xd84030000 (irq = 19) is a ST16654
serial8250.10: ttyS3 at MMIO 0xd84030020 (irq = 19) is a ST16654
sm501-fb[0] [mem 0xd84080000-0xd8408ffff]
sm501-fb[1] [mem 0xd84100000-0xd8414ffff]
sm501-fb[2] [mem 0xd80000000-0xd83fbffff]
sm501-fb[3] [irq 19]
sm501-fb sm501-fb.80: fb sm501fb-crt disabled at start
sm501-fb sm501-fb.80: using mode specified in @mode
Console: switching to colour frame buffer device 100x37
sm501-fb sm501-fb.80: fb0: sm501fb-crt frame buffer
sm501-fb sm501-fb.80: fb sm501fb-panel enabled at start
sm501-fb sm501-fb.80: using mode specified in @mode
sm501-fb sm501-fb.80: fb1: sm501fb-panel frame buffer
sata-dwc 4bffd1000.sata: id 0, controller version 1.82
sata-dwc 4bffd1000.sata: DMA initialized
scsi0 : sata-dwc
ata1: SATA max UDMA/133 irq 34
PPC 4xx OCP EMAC driver, version 3.54
MAL v2 /plb/mcmal, 2 TX channels, 16 RX channels
ZMII /plb/opb/emac-zmii@ef600d00 initialized
RGMII /plb/opb/emac-rgmii@ef601500 initialized with MDIO support
TAH /plb/opb/emac-tah@ef601350 initialized
TAH /plb/opb/emac-tah@ef601450 initialized
/plb/opb/emac-rgmii@ef601500: input 0 in RGMII mode
eth0: EMAC-0 /plb/opb/ethernet@ef600e00, MAC 00:50:c2:80:d4:89
eth0: found Generic MII PHY (0x00)
/plb/opb/emac-rgmii@ef601500: input 1 in RGMII mode
eth1: EMAC-1 /plb/opb/ethernet@ef600f00, MAC 00:00:00:00:00:00
eth1: found Generic MII PHY (0x01)
usbmon: debugfs is not available
ehci_hcd: USB 2.0 'Enhanced' Host Controller (EHCI) Driver
ppc-of-ehci 4bffd0400.ehci: OF EHCI
ppc-of-ehci 4bffd0400.ehci: new USB bus registered, assigned bus number 1
ppc-of-ehci 4bffd0400.ehci: irq 27, io mem 0x4bffd0400
ppc-of-ehci 4bffd0400.ehci: USB 2.0 started, EHCI 1.00
usb usb1: New USB device found, idVendor=1d6b, idProduct=0002
usb usb1: New USB device strings: Mfr=3, Product=2, SerialNumber=1
usb usb1: Product: OF EHCI
usb usb1: Manufacturer: Linux 3.0.19 ehci_hcd
usb usb1: SerialNumber: PPC-OF USB
hub 1-0:1.0: USB hub found
hub 1-0:1.0: 1 port detected
Initializing USB Mass Storage driver...
usbcore: registered new interface driver usb-storage
USB Mass Storage support registered.
mousedev: PS/2 mouse device common for all mice
i2c /dev entries driver
ibm-iic 4ef600700.i2c: using standard (100 kHz) mode
irq: irq 25 on host /interrupt-controller2 mapped to virtual irq 44
rtc-m41t80 0-0068: chip found, driver version 0.05
rtc-m41t80 0-0068: rtc core: registered m41t80 as rtc0
irq: irq 20 on host /interrupt-controller1 mapped to virtual irq 45
ibm-iic 4ef600800.i2c: using standard (100 kHz) mode
booke_wdt: powerpc book-e watchdog driver loaded
device-mapper: ioctl: 4.20.0-ioctl (2011-02-02) initialised: dm-devel@redhat.com
usbcore: registered new interface driver ushc
usbcore: registered new interface driver usbhid
usbhid: USB HID core driver
TCP cubic registered
NET: Registered protocol family 10
IPv6 over IPv4 tunneling driver
NET: Registered protocol family 17
Registering the dns_resolver key type
rtc-m41t80 0-0068: setting system clock to 2012-02-04 16:53:29 UTC (1328374409)
usb 1-1: new high speed USB device number 2 using ppc-of-ehci
ata1: SATA link up 3.0 Gbps (SStatus 123 SControl 300)
ata1.00: ATA-8: WDC WD5000AAKX-001CA0, 15.01H15, max UDMA/133
ata1.00: 976773168 sectors, multi 0: LBA48 NCQ (depth 1/32)
ata1.00: configured for UDMA/133
scsi 0:0:0:0: Direct-Access ATA WDC WD5000AAKX-0 15.0 PQ: 0 ANSI: 5
sd 0:0:0:0: Attached scsi generic sg0 type 0
sd 0:0:0:0: [sda] 976773168 512-byte logical blocks: (500 GB/465 GiB)
sd 0:0:0:0: [sda] Write Protect is off
sd 0:0:0:0: [sda] Mode Sense: 00 3a 00 00
sd 0:0:0:0: [sda] Write cache: enabled, read cache: enabled, doesn't support DPO or FUA
usb 1-1: New USB device found, idVendor=0424, idProduct=2517
usb 1-1: New USB device strings: Mfr=0, Product=0, SerialNumber=0
hub 1-1:1.0: USB hub found
sda: RDSK (512) sda1 (LNX^@)(res 2 spb 1) sda2 (LNX^@)(res 2 spb 1) sda3 (LNX^@)(res 2 spb 1) sda4 (LNX^@)(res 2 spb 1)
hub 1-1:1.0: 7 ports detected
sd 0:0:0:0: [sda] Attached SCSI disk
REISERFS (device sda3): found reiserfs format "3.6" with standard journal
REISERFS (device sda3): using ordered data mode
REISERFS (device sda3): journal params: device sda3, size 8192, journal first block 18, max trans len 1024, max batch 900, max commit age 30, max trans age 30
REISERFS (device sda3): checking transaction log (sda3)
REISERFS (device sda3): Using r5 hash to sort names
VFS: Mounted root (reiserfs filesystem) readonly on device 8:3.
devtmpfs: mounted
Freeing unused kernel memory: 196k init
usb 1-1.1: new low speed USB device number 3 using ppc-of-ehci
usb 1-1.1: New USB device found, idVendor=062a, idProduct=0102
usb 1-1.1: New USB device strings: Mfr=1, Product=2, SerialNumber=0
usb 1-1.1: Product: Wireless Keyboard & Mouse
usb 1-1.1: Manufacturer: MOSART Semi.
input: MOSART Semi. Wireless Keyboard & Mouse as /devices/plb.0/4bffd0400.ehci/usb1/1-1/1-1.1/1-1.1:1.0/input/input0
generic-usb 0003:062A:0102.0001: input,hidraw0: USB HID v1.10 Keyboard [MOSART Semi. Wireless Keyboard & Mouse] on usb-PPC-OF USB-1.1/input0
input: MOSART Semi. Wireless Keyboard & Mouse as /devices/plb.0/4bffd0400.ehci/usb1/1-1/1-1.1/1-1.1:1.1/input/input1
generic-usb 0003:062A:0102.0002: input,hiddev0,hidraw1: USB HID v1.10 Mouse [MOSART Semi. Wireless Keyboard & Mouse] on usb-PPC-OF USB-1.1/input1
usb 1-1.7: new high speed USB device number 4 using ppc-of-ehci
usb 1-1.7: New USB device found, idVendor=0424, idProduct=2240
usb 1-1.7: New USB device strings: Mfr=1, Product=2, SerialNumber=3
usb 1-1.7: Product: Ultra Fast Media
usb 1-1.7: Manufacturer: Generic
usb 1-1.7: SerialNumber: 000000225001
scsi1 : usb-storage 1-1.7:1.0
udevd[55]: starting version 175
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
sm501-usb sm501-usb.80: cannot declare coherent memory
Unable to handle kernel paging request for data at address 0xf543bfb4
Faulting instruction address: 0xc00003f0
Oops: Kernel access of bad area, sig: 11 [#1]
Canyonlands
Modules linked in: ohci_hcd(+)
NIP: c00003f0 LR: c000bd58 CTR: f54710cc
REGS: f543bf1c TRAP: 0300 Not tainted (3.0.19)
MSR: 00021000 <ME,CE> CR: 24004422 XER: 00000001
DEAR: f543bfb4, ESR: 00800000
TASK = ef102d60[77] 'modprobe' THREAD: ef172000
GPR00: c000bd58 ef102f30 ef102d60 f547101c 838bfff0 00000000 c02d276c ef221000
GPR08: 00002284 c000bf58 24004422 f543bf0c ef102f30 10024440 1000ba68 00000000
GPR16: 1000ba44 bfcbe4a4 00000000 1000ba58 00000000 1061f354 00000a60 00000000
GPR24: c004ca18 00000124 00000022 82cbffd8 82ebffdc 830bffe0 832bffe4 834bffe8
NIP [c00003f0] DataStorage+0x30/0xc0
LR [c000bd58] handle_page_fault+0xc/0x80
Call Trace:
Instruction dump:
7d5043a6 7d7143a6 7c3443a6 7d400026 7d7b02a6 716b4000 41820010 7c3342a6
8021fe34 38212000 3821ff40 7c2b0b78 <914b00a8> 918b0040 912b0034 7d5042a6
---[ end trace 8b79cce2f3ca8696 ]---
scsi 1:0:0:0: Direct-Access Generic Ultra HS-COMBO 1.68 PQ: 0 ANSI: 0
sd 1:0:0:0: Attached scsi generic sg1 type 0
sd 1:0:0:0: [sdb] Attached SCSI removable disk
ad7414 0-0048: chip found
ad7414 0-0048: ad7414_probe unable to read config register.
REISERFS (device sda4): found reiserfs format "3.6" with standard journal
REISERFS (device sda4): using ordered data mode
REISERFS (device sda4): journal params: device sda4, size 8192, journal first block 18, max trans len 1024, max batch 900, max commit age 30, max trans age 30
REISERFS (device sda4): checking transaction log (sda4)
REISERFS (device sda4): Using r5 hash to sort names
Adding 626528k swap on /dev/sda2. Priority:-1 extents:1 across:626528k
eth0: link is up, 100 FDX, pause enabled
ata1.00: configured for UDMA/133
ata1: EH complete
eth0: no IPv6 routers present
--
acrux <acrux@cruxppc.org>
^ permalink raw reply
* Re: [PATCH v3 00/25] irq_domain generalization and refinement
From: Russell King - ARM Linux @ 2012-02-04 22:17 UTC (permalink / raw)
To: Grant Likely
Cc: Stephen Rothwell, devicetree-discuss, linux-kernel, Rob Herring,
Milton Miller, Thomas Gleixner, linuxppc-dev, linux-arm-kernel
In-Reply-To: <1327700179-17454-1-git-send-email-grant.likely@secretlab.ca>
On Fri, Jan 27, 2012 at 02:35:54PM -0700, Grant Likely wrote:
> Hey everyone,
>
> This patch series is ready for much wider consumption now. I'd like
> to get it into linux-next ASAP because there will be ARM board support
> depending on it. I'll wait a few days before I ask Stephen to pull
> this in.
Grant,
Can you answer me this: does this irqdomain support require DT?
The question comes up because OMAP has converted some of their support
to require irq domain support for their PMICs, and it seems irq domain
support requires DT. This seems to have made the whole of OMAP
essentially become a DT-only platform.
Removing the dependency on IRQ_DOMAIN brings up these build errors
in the twl-core code (that being the PMIC for OMAP CPUs):
drivers/mfd/twl-core.c: In function 'twl_probe':
drivers/mfd/twl-core.c:1229: error: invalid use of undefined type 'struct irq_domain'
drivers/mfd/twl-core.c:1230: error: invalid use of undefined type 'struct irq_domain'
drivers/mfd/twl-core.c:1235: error: implicit declaration of function 'irq_domain_add'
That's a bit of a problem, because afaik there aren't the DT descriptions
for the boards I have yet, so it's causing me to see regressions when
building and booting kernels with CONFIG_OF=n.
The more core-code we end up with which requires DT, the worse this
problem is going to become - and obviously saying "everyone must now
convert to DT" is, even today, a mammoth task.
Now, here's the thing: I believe that IRQ domains - at least as far as
the hwirq stuff - should be available irrespective of whether we have
the rest of the IRQ domain support code in place, so that IRQ support
code doesn't have to keep playing games to decode from the global
space to the per-controller number space.
I believe that would certainly help the current OMAP problems, where
the current lack of CONFIG_IRQ_DOMAIN basically makes the kernel oops
on boot.
How we fix this regression for 3.4 I've no idea at present, I'm trying
to work out what the real dependencies are for OMAP on this stuff.
Finally, do we need asm/irq.h in our asm/prom.h ? That's causing
fragility between DT and non-DT builds, because people are finding
that their DT builds work without their mach/irqs.h includes but
fail when built with non-DT. The only thing which DT might need -
at the most - is NR_IRQS, but I'd hope with things like irq domains
it doesn't actually require it.
^ permalink raw reply
* Re: [PATCH v3 00/25] irq_domain generalization and refinement
From: Russell King - ARM Linux @ 2012-02-04 22:31 UTC (permalink / raw)
To: Grant Likely
Cc: Stephen Rothwell, devicetree-discuss, linux-kernel, Milton Miller,
Rob Herring, Thomas Gleixner, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20120204221748.GN14129@n2100.arm.linux.org.uk>
On Sat, Feb 04, 2012 at 10:17:48PM +0000, Russell King - ARM Linux wrote:
> On Fri, Jan 27, 2012 at 02:35:54PM -0700, Grant Likely wrote:
> > Hey everyone,
> >
> > This patch series is ready for much wider consumption now. I'd like
> > to get it into linux-next ASAP because there will be ARM board support
> > depending on it. I'll wait a few days before I ask Stephen to pull
> > this in.
>
> Grant,
>
> Can you answer me this: does this irqdomain support require DT?
>
> The question comes up because OMAP has converted some of their support
> to require irq domain support for their PMICs, and it seems irq domain
> support requires DT. This seems to have made the whole of OMAP
> essentially become a DT-only platform.
>
> Removing the dependency on IRQ_DOMAIN brings up these build errors
> in the twl-core code (that being the PMIC for OMAP CPUs):
>
> drivers/mfd/twl-core.c: In function 'twl_probe':
> drivers/mfd/twl-core.c:1229: error: invalid use of undefined type 'struct irq_domain'
> drivers/mfd/twl-core.c:1230: error: invalid use of undefined type 'struct irq_domain'
> drivers/mfd/twl-core.c:1235: error: implicit declaration of function 'irq_domain_add'
>
> That's a bit of a problem, because afaik there aren't the DT descriptions
> for the boards I have yet, so it's causing me to see regressions when
> building and booting kernels with CONFIG_OF=n.
>
> The more core-code we end up with which requires DT, the worse this
> problem is going to become - and obviously saying "everyone must now
> convert to DT" is, even today, a mammoth task.
>
> Now, here's the thing: I believe that IRQ domains - at least as far as
> the hwirq stuff - should be available irrespective of whether we have
> the rest of the IRQ domain support code in place, so that IRQ support
> code doesn't have to keep playing games to decode from the global
> space to the per-controller number space.
>
> I believe that would certainly help the current OMAP problems, where
> the current lack of CONFIG_IRQ_DOMAIN basically makes the kernel oops
> on boot.
>
> How we fix this regression for 3.4 I've no idea at present, I'm trying
> to work out what the real dependencies are for OMAP on this stuff.
Actually, it turns out to be not that hard, because twl doesn't actually
make use of the IRQ domain stuff:
commit aeb5032b3f8b9ab69daa545777433fa94b3494c4
Author: Benoit Cousson <b-cousson@ti.com>
AuthorDate: Mon Aug 29 16:20:23 2011 +0200
Commit: Samuel Ortiz <sameo@linux.intel.com>
CommitDate: Mon Jan 9 00:37:40 2012 +0100
mfd: twl-core: Add initial DT support for twl4030/twl6030
[grant.likely@secretlab.ca: Fix IRQ_DOMAIN dependency in kconfig]
Adding any dependency - especially one which wouldn't be enabled - for
a new feature which wasn't required before is going to break existing
users, so this shouldn't have been done in the first place.
A better fix to preserve existing users would've been as below - yes
it means more ifdefs, but if irq domain is to remain a DT only thing
then we're going to end up with _lots_ of this stuff.
I'd much prefer to see irq domain become more widely available so it
doesn't require these ifdefs everywhere.
drivers/mfd/Kconfig | 2 +-
drivers/mfd/twl-core.c | 4 ++++
2 files changed, 5 insertions(+), 1 deletions(-)
diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
index 28a301b..bd60ce0 100644
--- a/drivers/mfd/Kconfig
+++ b/drivers/mfd/Kconfig
@@ -200,7 +200,7 @@ config MENELAUS
config TWL4030_CORE
bool "Texas Instruments TWL4030/TWL5030/TWL6030/TPS659x0 Support"
- depends on I2C=y && GENERIC_HARDIRQS && IRQ_DOMAIN
+ depends on I2C=y && GENERIC_HARDIRQS
help
Say yes here if you have TWL4030 / TWL6030 family chip on your board.
This core driver provides register access and IRQ handling
diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
index e04e04d..5913aaa 100644
--- a/drivers/mfd/twl-core.c
+++ b/drivers/mfd/twl-core.c
@@ -263,7 +263,9 @@ struct twl_client {
static struct twl_client twl_modules[TWL_NUM_SLAVES];
+#ifdef CONFIG_IRQ_DOMAIN
static struct irq_domain domain;
+#endif
/* mapping the module id to slave id and base address */
struct twl_mapping {
@@ -1226,6 +1228,7 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
pdata->irq_base = status;
pdata->irq_end = pdata->irq_base + nr_irqs;
+#ifdef CONFIG_IRQ_DOMAIN
domain.irq_base = pdata->irq_base;
domain.nr_irq = nr_irqs;
#ifdef CONFIG_OF_IRQ
@@ -1233,6 +1236,7 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
domain.ops = &irq_domain_simple_ops;
#endif
irq_domain_add(&domain);
+#endif
if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
dev_dbg(&client->dev, "can't talk I2C?\n");
^ permalink raw reply related
* Re: [PATCH v3 00/25] irq_domain generalization and refinement
From: Benjamin Herrenschmidt @ 2012-02-05 0:01 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Stephen Rothwell, devicetree-discuss, linux-kernel, Rob Herring,
Milton Miller, Thomas Gleixner, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20120204221748.GN14129@n2100.arm.linux.org.uk>
On Sat, 2012-02-04 at 22:17 +0000, Russell King - ARM Linux wrote:
> On Fri, Jan 27, 2012 at 02:35:54PM -0700, Grant Likely wrote:
> > Hey everyone,
> >
> > This patch series is ready for much wider consumption now. I'd like
> > to get it into linux-next ASAP because there will be ARM board support
> > depending on it. I'll wait a few days before I ask Stephen to pull
> > this in.
>
> Grant,
>
> Can you answer me this: does this irqdomain support require DT?
The original powerpc code this is based on didn't require it. It was an
explicit design decision and I remember insisting that Grant follows it,
but I haven't yet reviewed his last batch.
DT is orthogonal. You have "helpers" that use the DT to resolve the
domain of an interrupt source and do the mapping for you, but I made
sure that you call always still create domains and map interrupts using
explicit domain pointers & hw numbers.
(And I need them to deal with ancient broken device-tree's on some
platforms such as oldworld PowerMacs).
> The question comes up because OMAP has converted some of their support
> to require irq domain support for their PMICs, and it seems irq domain
> support requires DT. This seems to have made the whole of OMAP
> essentially become a DT-only platform.
.../...
> Now, here's the thing: I believe that IRQ domains - at least as far as
> the hwirq stuff - should be available irrespective of whether we have
> the rest of the IRQ domain support code in place, so that IRQ support
> code doesn't have to keep playing games to decode from the global
> space to the per-controller number space.
>
> I believe that would certainly help the current OMAP problems, where
> the current lack of CONFIG_IRQ_DOMAIN basically makes the kernel oops
> on boot.
>
> How we fix this regression for 3.4 I've no idea at present, I'm trying
> to work out what the real dependencies are for OMAP on this stuff.
>
> Finally, do we need asm/irq.h in our asm/prom.h ? That's causing
> fragility between DT and non-DT builds, because people are finding
> that their DT builds work without their mach/irqs.h includes but
> fail when built with non-DT. The only thing which DT might need -
> at the most - is NR_IRQS, but I'd hope with things like irq domains
> it doesn't actually require it.
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH v3 00/25] irq_domain generalization and refinement
From: Tony Lindgren @ 2012-02-05 1:38 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Stephen Rothwell, devicetree-discuss, linux-kernel, Rob Herring,
Milton Miller, Thomas Gleixner, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20120204223125.GO14129@n2100.arm.linux.org.uk>
* Russell King - ARM Linux <linux@arm.linux.org.uk> [120204 14:00]:
>
> Actually, it turns out to be not that hard, because twl doesn't actually
> make use of the IRQ domain stuff:
>
> commit aeb5032b3f8b9ab69daa545777433fa94b3494c4
> Author: Benoit Cousson <b-cousson@ti.com>
> AuthorDate: Mon Aug 29 16:20:23 2011 +0200
> Commit: Samuel Ortiz <sameo@linux.intel.com>
> CommitDate: Mon Jan 9 00:37:40 2012 +0100
>
> mfd: twl-core: Add initial DT support for twl4030/twl6030
>
> [grant.likely@secretlab.ca: Fix IRQ_DOMAIN dependency in kconfig]
>
> Adding any dependency - especially one which wouldn't be enabled - for
> a new feature which wasn't required before is going to break existing
> users, so this shouldn't have been done in the first place.
>
> A better fix to preserve existing users would've been as below - yes
> it means more ifdefs, but if irq domain is to remain a DT only thing
> then we're going to end up with _lots_ of this stuff.
>
> I'd much prefer to see irq domain become more widely available so it
> doesn't require these ifdefs everywhere.
Your patch below looks like a correct fix to me to the problem
you and Grazvydas are seeing:
Acked-by: Tony Lindgren <tony@atomide.com>
> drivers/mfd/Kconfig | 2 +-
> drivers/mfd/twl-core.c | 4 ++++
> 2 files changed, 5 insertions(+), 1 deletions(-)
>
> diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig
> index 28a301b..bd60ce0 100644
> --- a/drivers/mfd/Kconfig
> +++ b/drivers/mfd/Kconfig
> @@ -200,7 +200,7 @@ config MENELAUS
>
> config TWL4030_CORE
> bool "Texas Instruments TWL4030/TWL5030/TWL6030/TPS659x0 Support"
> - depends on I2C=y && GENERIC_HARDIRQS && IRQ_DOMAIN
> + depends on I2C=y && GENERIC_HARDIRQS
> help
> Say yes here if you have TWL4030 / TWL6030 family chip on your board.
> This core driver provides register access and IRQ handling
> diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c
> index e04e04d..5913aaa 100644
> --- a/drivers/mfd/twl-core.c
> +++ b/drivers/mfd/twl-core.c
> @@ -263,7 +263,9 @@ struct twl_client {
>
> static struct twl_client twl_modules[TWL_NUM_SLAVES];
>
> +#ifdef CONFIG_IRQ_DOMAIN
> static struct irq_domain domain;
> +#endif
>
> /* mapping the module id to slave id and base address */
> struct twl_mapping {
> @@ -1226,6 +1228,7 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
> pdata->irq_base = status;
> pdata->irq_end = pdata->irq_base + nr_irqs;
>
> +#ifdef CONFIG_IRQ_DOMAIN
> domain.irq_base = pdata->irq_base;
> domain.nr_irq = nr_irqs;
> #ifdef CONFIG_OF_IRQ
> @@ -1233,6 +1236,7 @@ twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
> domain.ops = &irq_domain_simple_ops;
> #endif
> irq_domain_add(&domain);
> +#endif
>
> if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
> dev_dbg(&client->dev, "can't talk I2C?\n");
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply
* [PATCH 09/24] PCI, powerpc: Register busn_res for root buses
From: Yinghai Lu @ 2012-02-05 6:57 UTC (permalink / raw)
To: Jesse Barnes, Benjamin Herrenschmidt, Tony Luck
Cc: linux-arch, linuxppc-dev, linux-pci, Greg Kroah-Hartman,
linux-kernel, Dominik Brodowski, Yinghai Lu, Bjorn Helgaas,
Paul Mackerras, Andrew Morton, Linus Torvalds
In-Reply-To: <1328425088-6562-1-git-send-email-yinghai@kernel.org>
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
---
arch/powerpc/kernel/pci-common.c | 7 ++++++-
1 files changed, 6 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index cce98d7..501f29b 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1732,6 +1732,8 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
bus->secondary = hose->first_busno;
hose->bus = bus;
+ pci_bus_insert_busn_res(bus, hose->first_busno, hose->last_busno);
+
/* Get probe mode and perform scan */
mode = PCI_PROBE_NORMAL;
if (node && ppc_md.pci_probe_mode)
@@ -1742,8 +1744,11 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
of_scan_bus(node, bus);
}
- if (mode == PCI_PROBE_NORMAL)
+ if (mode == PCI_PROBE_NORMAL) {
+ pci_bus_update_busn_res_end(bus, 255);
hose->last_busno = bus->subordinate = pci_scan_child_bus(bus);
+ pci_bus_update_busn_res_end(bus, bus->subordinate);
+ }
/* Platform gets a chance to do some global fixups before
* we proceed to resource allocation
--
1.7.7
^ permalink raw reply related
* Re: Efika (mpc5200b): sound doesn't build/work from linux-2.6.38.x
From: Tabi Timur-B04825 @ 2012-02-05 15:25 UTC (permalink / raw)
To: acrux; +Cc: linuxppc-dev@lists.ozlabs.org
In-Reply-To: <20120204030207.0d5cec19.acrux_it@libero.it>
On Fri, Feb 3, 2012 at 8:02 PM, acrux <acrux_it@libero.it> wrote:
> as i said [1] it seems to be fixed only in 3.x instead the last working o=
ne is the obsolete 2.6.36.x .
> Anyway, alog the sound/soc/fsl/mpc5200_dma.c now builds the sound is stil=
l broken.
Ok, I missed that part in your email.
The Efika sound driver was not being compiled by default for a very
long time, so I think everyone just forgot about it. I posted a patch
to enable it by default and fix the compilation errors, but I'm pretty
sure that it's succumbed to bit rot. ALSA has changed, especially
with the introduction of device trees, and so now someone needs to fix
the Efika driver.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* Re: [PATCH v3 00/25] irq_domain generalization and refinement
From: Russell King - ARM Linux @ 2012-02-05 16:13 UTC (permalink / raw)
To: Tony Lindgren
Cc: Stephen Rothwell, devicetree-discuss, linux-kernel, Rob Herring,
Milton Miller, Thomas Gleixner, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20120205013853.GQ20333@atomide.com>
On Sat, Feb 04, 2012 at 05:38:53PM -0800, Tony Lindgren wrote:
> * Russell King - ARM Linux <linux@arm.linux.org.uk> [120204 14:00]:
> >
> > Actually, it turns out to be not that hard, because twl doesn't actually
> > make use of the IRQ domain stuff:
> >
> > commit aeb5032b3f8b9ab69daa545777433fa94b3494c4
> > Author: Benoit Cousson <b-cousson@ti.com>
> > AuthorDate: Mon Aug 29 16:20:23 2011 +0200
> > Commit: Samuel Ortiz <sameo@linux.intel.com>
> > CommitDate: Mon Jan 9 00:37:40 2012 +0100
> >
> > mfd: twl-core: Add initial DT support for twl4030/twl6030
> >
> > [grant.likely@secretlab.ca: Fix IRQ_DOMAIN dependency in kconfig]
> >
> > Adding any dependency - especially one which wouldn't be enabled - for
> > a new feature which wasn't required before is going to break existing
> > users, so this shouldn't have been done in the first place.
> >
> > A better fix to preserve existing users would've been as below - yes
> > it means more ifdefs, but if irq domain is to remain a DT only thing
> > then we're going to end up with _lots_ of this stuff.
> >
> > I'd much prefer to see irq domain become more widely available so it
> > doesn't require these ifdefs everywhere.
>
> Your patch below looks like a correct fix to me to the problem
> you and Grazvydas are seeing:
>
> Acked-by: Tony Lindgren <tony@atomide.com>
It's not quite correct, because OMAP4 has issues in this area as well
(which does select IRQ_DOMAIN but can be without OF.) The result is
an oops from irq_domain_add() because domain->ops is NULL.
The right solution is three fold:
1. Wrap the bits of code in CONFIG_IRQ_DOMAIN
2. Get rid of the #ifdef CONFIG_OF there, so the 'ops' member can be
initialized.
3. Fix the OMAP vp code not to oops when voltdm->pmic is NULL
which I have in my combined patch for fixing OMAP so far.
^ permalink raw reply
* Re: [PATCH] drivers/video: compile fixes for fsl-diu-fb.c
From: Michael Neuling @ 2012-02-05 22:25 UTC (permalink / raw)
To: Florian Tobias Schandinat
Cc: linuxppc-dev@ozlabs.org, linux-fbdev@vger.kernel.org,
Tabi Timur-B04825
In-Reply-To: <4F26274B.2040401@gmx.de>
In message <4F26274B.2040401@gmx.de> you wrote:
> On 01/16/2012 03:08 AM, Michael Neuling wrote:
> [...]
> > From: Michael Neuling <mikey@neuling.org>
> >
> > [PATCH] drivers/video: compile fixes for fsl-diu-fb.c
> >
> > Fix a compiler errors introduced in:
> > commit ddd3d905436b572ebadc09dcf2d12ca5b37020a0
> > Author: Timur Tabi <timur@freescale.com>
> > drivers/video: fsl-diu-fb: merge all allocated data into one block
> >
> > Signed-off-by: Michael Neuling <mikey@neuling.org>
>
> Applied.
Florian,
I've not seen this appear in mainline as yet.
When do you expect to send a pull request?
Mikey
^ permalink raw reply
* [PATCH 24/91] seqlock: Dont smp_rmb in seqlock reader spin loop
From: Willy Tarreau @ 2012-02-05 22:10 UTC (permalink / raw)
To: linux-kernel, stable
Cc: Nick Piggin, Eric Dumazet, Greg KH, linuxppc-dev, Milton Miller,
Andi Kleen, Anton Blanchard, Thomas Gleixner, Paul McKenney,
Linus Torvalds
In-Reply-To: <0635750f5f06ed2ca212b91fcb5c4483@local>
2.6.27-longterm review patch. If anyone has any objections, please let us know.
------------------
commit 5db1256a5131d3b133946fa02ac9770a784e6eb2 upstream.
Move the smp_rmb after cpu_relax loop in read_seqlock and add
ACCESS_ONCE to make sure the test and return are consistent.
A multi-threaded core in the lab didn't like the update
from 2.6.35 to 2.6.36, to the point it would hang during
boot when multiple threads were active. Bisection showed
af5ab277ded04bd9bc6b048c5a2f0e7d70ef0867 (clockevents:
Remove the per cpu tick skew) as the culprit and it is
supported with stack traces showing xtime_lock waits including
tick_do_update_jiffies64 and/or update_vsyscall.
Experimentation showed the combination of cpu_relax and smp_rmb
was significantly slowing the progress of other threads sharing
the core, and this patch is effective in avoiding the hang.
A theory is the rmb is affecting the whole core while the
cpu_relax is causing a resource rebalance flush, together they
cause an interfernce cadance that is unbroken when the seqlock
reader has interrupts disabled.
At first I was confused why the refactor in
3c22cd5709e8143444a6d08682a87f4c57902df3 (kernel: optimise
seqlock) didn't affect this patch application, but after some
study that affected seqcount not seqlock. The new seqcount was
not factored back into the seqlock. I defer that the future.
While the removal of the timer interrupt offset created
contention for the xtime lock while a cpu does the
additonal work to update the system clock, the seqlock
implementation with the tight rmb spin loop goes back much
further, and is just waiting for the right trigger.
Signed-off-by: Milton Miller <miltonm@bga.com>
Cc: <linuxppc-dev@lists.ozlabs.org>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andi Kleen <andi@firstfloor.org>
Cc: Nick Piggin <npiggin@kernel.dk>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Anton Blanchard <anton@samba.org>
Cc: Paul McKenney <paulmck@linux.vnet.ibm.com>
Acked-by: Eric Dumazet <eric.dumazet@gmail.com>
Link: http://lkml.kernel.org/r/%3Cseqlock-rmb%40mdm.bga.com%3E
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
---
include/linux/seqlock.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
Index: longterm-2.6.27/include/linux/seqlock.h
===================================================================
--- longterm-2.6.27.orig/include/linux/seqlock.h 2012-02-05 22:34:34.295914918 +0100
+++ longterm-2.6.27/include/linux/seqlock.h 2012-02-05 22:34:38.288914818 +0100
@@ -88,12 +88,12 @@
unsigned ret;
repeat:
- ret = sl->sequence;
- smp_rmb();
+ ret = ACCESS_ONCE(sl->sequence);
if (unlikely(ret & 1)) {
cpu_relax();
goto repeat;
}
+ smp_rmb();
return ret;
}
^ permalink raw reply
* [PATCH] powerpc/wsp: Permanently enable PCI class code workaround
From: Benjamin Herrenschmidt @ 2012-02-05 23:50 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Jimi Xenidis
It appears that on the Chroma card, the class code of the root
complex is still wrong even on DD2 or later chips. This could
be a firmware issue, but that breaks resource allocation so let's
unconditionally fix it up.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
---
arch/powerpc/platforms/wsp/wsp_pci.c | 8 ++++----
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/wsp/wsp_pci.c b/arch/powerpc/platforms/wsp/wsp_pci.c
index e0262cd..d24b3ac 100644
--- a/arch/powerpc/platforms/wsp/wsp_pci.c
+++ b/arch/powerpc/platforms/wsp/wsp_pci.c
@@ -468,15 +468,15 @@ static void __init wsp_pcie_configure_hw(struct pci_controller *hose)
#define DUMP_REG(x) \
pr_debug("%-30s : 0x%016llx\n", #x, in_be64(hose->cfg_data + x))
-#ifdef CONFIG_WSP_DD1_WORKAROUND_BAD_PCIE_CLASS
- /* WSP DD1 has a bogus class code by default in the PCI-E
- * root complex's built-in P2P bridge */
+ /*
+ * Some WSP variants has a bogus class code by default in the PCI-E
+ * root complex's built-in P2P bridge
+ */
val = in_be64(hose->cfg_data + PCIE_REG_SYS_CFG1);
pr_debug("PCI-E SYS_CFG1 : 0x%llx\n", val);
out_be64(hose->cfg_data + PCIE_REG_SYS_CFG1,
(val & ~PCIE_REG_SYS_CFG1_CLASS_CODE) | (PCI_CLASS_BRIDGE_PCI << 8));
pr_debug("PCI-E SYS_CFG1 : 0x%llx\n", in_be64(hose->cfg_data + PCIE_REG_SYS_CFG1));
-#endif /* CONFIG_WSP_DD1_WORKAROUND_BAD_PCIE_CLASS */
#ifdef CONFIG_WSP_DD1_WORKAROUND_DD1_TCE_BUGS
/* XXX Disable TCE caching, it doesn't work on DD1 */
--
1.7.7.3
^ permalink raw reply related
* Re: [PATCH] powerpc/wsp: Permanently enable PCI class code workaround
From: Stephen Rothwell @ 2012-02-06 0:30 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: Jimi Xenidis, linuxppc-dev
In-Reply-To: <1328485804.30631.10.camel@pasglop>
[-- Attachment #1: Type: text/plain, Size: 449 bytes --]
Hi Ben,
Just a small grammar correction:
On Mon, 06 Feb 2012 10:50:04 +1100 Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
>
> - /* WSP DD1 has a bogus class code by default in the PCI-E
> - * root complex's built-in P2P bridge */
> + /*
> + * Some WSP variants has a bogus class code by default in the PCI-E
^^^^
have
--
Cheers,
Stephen Rothwell sfr@canb.auug.org.au
[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]
^ permalink raw reply
* Re: [PATCH v3 00/25] irq_domain generalization and refinement
From: Rob Herring @ 2012-02-06 0:51 UTC (permalink / raw)
To: Russell King - ARM Linux
Cc: Stephen Rothwell, devicetree-discuss, linux-kernel, Rob Herring,
Milton Miller, Thomas Gleixner, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20120204221748.GN14129@n2100.arm.linux.org.uk>
Russell,
On 02/04/2012 04:17 PM, Russell King - ARM Linux wrote:
> On Fri, Jan 27, 2012 at 02:35:54PM -0700, Grant Likely wrote:
>> Hey everyone,
>>
>> This patch series is ready for much wider consumption now. I'd like
>> to get it into linux-next ASAP because there will be ARM board support
>> depending on it. I'll wait a few days before I ask Stephen to pull
>> this in.
>
> Grant,
>
> Can you answer me this: does this irqdomain support require DT?
>
No. It's the other way around, DT requires irqdomain. The GIC and VIC
code for example can be built with or w/o DT enabled, but both select
IRQ_DOMAIN.
FYI, I just submitted a patch that selects IRQ_DOMAIN for all of ARM:
http://www.gossamer-threads.com/lists/linux/kernel/1487231?page=last
Either we do that or we select IRQ_DOMAIN one irq_chip at a time. With
the "new" irq_domain code, we could probably do better to shrink the
code needed in the non-DT case.
> The question comes up because OMAP has converted some of their support
> to require irq domain support for their PMICs, and it seems irq domain
> support requires DT. This seems to have made the whole of OMAP
> essentially become a DT-only platform.
I think we should select DT or not at the sub-arch level. Trying to
support both builds is a needless headache.
>
> Removing the dependency on IRQ_DOMAIN brings up these build errors
> in the twl-core code (that being the PMIC for OMAP CPUs):
>
> drivers/mfd/twl-core.c: In function 'twl_probe':
> drivers/mfd/twl-core.c:1229: error: invalid use of undefined type 'struct irq_domain'
> drivers/mfd/twl-core.c:1230: error: invalid use of undefined type 'struct irq_domain'
> drivers/mfd/twl-core.c:1235: error: implicit declaration of function 'irq_domain_add'
>
> That's a bit of a problem, because afaik there aren't the DT descriptions
> for the boards I have yet, so it's causing me to see regressions when
> building and booting kernels with CONFIG_OF=n.
>
> The more core-code we end up with which requires DT, the worse this
> problem is going to become - and obviously saying "everyone must now
> convert to DT" is, even today, a mammoth task.
>
> Now, here's the thing: I believe that IRQ domains - at least as far as
> the hwirq stuff - should be available irrespective of whether we have
> the rest of the IRQ domain support code in place, so that IRQ support
> code doesn't have to keep playing games to decode from the global
> space to the per-controller number space.
>
> I believe that would certainly help the current OMAP problems, where
> the current lack of CONFIG_IRQ_DOMAIN basically makes the kernel oops
> on boot.
>
> How we fix this regression for 3.4 I've no idea at present, I'm trying
> to work out what the real dependencies are for OMAP on this stuff.
>
> Finally, do we need asm/irq.h in our asm/prom.h ? That's causing
> fragility between DT and non-DT builds, because people are finding
> that their DT builds work without their mach/irqs.h includes but
> fail when built with non-DT. The only thing which DT might need -
> at the most - is NR_IRQS, but I'd hope with things like irq domains
> it doesn't actually require it.
Doesn't look like it is needed.
Rob
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> devicetree-discuss@lists.ozlabs.org
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