* [PATCH 2/9] dmaengine: move last completed cookie into generic dma_chan structure
From: Russell King - ARM Linux @ 2012-03-06 22:34 UTC (permalink / raw)
To: Dan Williams, Vinod Koul
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Barry Song, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20120306223321.GD15201@n2100.arm.linux.org.uk>
Every DMA engine implementation declares a last completed dma cookie
in their private dma channel structures. This is pointless, and
forces driver specific code. Move this out into the common dma_chan
structure.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
---
arch/arm/include/asm/hardware/iop_adma.h | 2 --
drivers/dma/amba-pl08x.c | 8 ++++----
drivers/dma/at_hdmac.c | 10 +++++-----
drivers/dma/at_hdmac_regs.h | 2 --
drivers/dma/coh901318.c | 7 +++----
drivers/dma/dw_dmac.c | 10 +++++-----
drivers/dma/dw_dmac_regs.h | 1 -
drivers/dma/ep93xx_dma.c | 8 +++-----
drivers/dma/fsldma.c | 4 ++--
drivers/dma/fsldma.h | 1 -
drivers/dma/imx-dma.c | 7 +++----
drivers/dma/imx-sdma.c | 5 ++---
drivers/dma/intel_mid_dma.c | 9 ++++-----
drivers/dma/intel_mid_dma_regs.h | 2 --
drivers/dma/ioat/dma.c | 2 +-
drivers/dma/ioat/dma.h | 4 +---
drivers/dma/ioat/dma_v2.c | 2 +-
drivers/dma/ioat/dma_v3.c | 2 +-
drivers/dma/iop-adma.c | 10 +++++-----
drivers/dma/ipu/ipu_idmac.c | 10 ++++------
drivers/dma/mpc512x_dma.c | 7 +++----
drivers/dma/mv_xor.c | 6 +++---
drivers/dma/mv_xor.h | 2 --
drivers/dma/mxs-dma.c | 5 ++---
drivers/dma/pch_dma.c | 5 ++---
drivers/dma/pl330.c | 9 +++------
drivers/dma/ppc4xx/adma.c | 10 +++++-----
drivers/dma/ppc4xx/adma.h | 2 --
drivers/dma/shdma.c | 10 +++++-----
drivers/dma/shdma.h | 1 -
drivers/dma/sirf-dma.c | 7 +++----
drivers/dma/ste_dma40.c | 10 +++-------
drivers/dma/timb_dma.c | 7 +++----
drivers/dma/txx9dmac.c | 10 +++++-----
drivers/dma/txx9dmac.h | 1 -
include/linux/amba/pl08x.h | 2 --
include/linux/dmaengine.h | 2 ++
37 files changed, 83 insertions(+), 119 deletions(-)
diff --git a/arch/arm/include/asm/hardware/iop_adma.h b/arch/arm/include/asm/hardware/iop_adma.h
index 59b8c38..122f86d 100644
--- a/arch/arm/include/asm/hardware/iop_adma.h
+++ b/arch/arm/include/asm/hardware/iop_adma.h
@@ -49,7 +49,6 @@ struct iop_adma_device {
/**
* struct iop_adma_chan - internal representation of an ADMA device
* @pending: allows batching of hardware operations
- * @completed_cookie: identifier for the most recently completed operation
* @lock: serializes enqueue/dequeue operations to the slot pool
* @mmr_base: memory mapped register base
* @chain: device chain view of the descriptors
@@ -62,7 +61,6 @@ struct iop_adma_device {
*/
struct iop_adma_chan {
int pending;
- dma_cookie_t completed_cookie;
spinlock_t lock; /* protects the descriptor slot pool */
void __iomem *mmr_base;
struct list_head chain;
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 8a28158..2b5121f 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -971,7 +971,7 @@ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
u32 bytesleft = 0;
last_used = plchan->chan.cookie;
- last_complete = plchan->lc;
+ last_complete = plchan->chan.completed_cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
if (ret == DMA_SUCCESS) {
@@ -983,7 +983,7 @@ static enum dma_status pl08x_dma_tx_status(struct dma_chan *chan,
* This cookie not complete yet
*/
last_used = plchan->chan.cookie;
- last_complete = plchan->lc;
+ last_complete = plchan->chan.completed_cookie;
/* Get number of bytes left in the active transactions and queue */
bytesleft = pl08x_getbytes_chan(plchan);
@@ -1541,7 +1541,7 @@ static void pl08x_tasklet(unsigned long data)
if (txd) {
/* Update last completed */
- plchan->lc = txd->tx.cookie;
+ plchan->chan.completed_cookie = txd->tx.cookie;
}
/* If a new descriptor is queued, set it up plchan->at is NULL here */
@@ -1723,7 +1723,7 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x,
chan->chan.device = dmadev;
chan->chan.cookie = 0;
- chan->lc = 0;
+ chan->chan.completed_cookie = 0;
spin_lock_init(&chan->lock);
INIT_LIST_HEAD(&chan->pend_list);
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index f4aed5f..6baf5d7 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -269,7 +269,7 @@ atc_chain_complete(struct at_dma_chan *atchan, struct at_desc *desc)
dev_vdbg(chan2dev(&atchan->chan_common),
"descriptor %u complete\n", txd->cookie);
- atchan->completed_cookie = txd->cookie;
+ atchan->chan_common.completed_cookie = txd->cookie;
/* move children to free_list */
list_splice_init(&desc->tx_list, &atchan->free_list);
@@ -1016,14 +1016,14 @@ atc_tx_status(struct dma_chan *chan,
spin_lock_irqsave(&atchan->lock, flags);
- last_complete = atchan->completed_cookie;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
if (ret != DMA_SUCCESS) {
atc_cleanup_descriptors(atchan);
- last_complete = atchan->completed_cookie;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -1129,7 +1129,7 @@ static int atc_alloc_chan_resources(struct dma_chan *chan)
spin_lock_irqsave(&atchan->lock, flags);
atchan->descs_allocated = i;
list_splice(&tmp_list, &atchan->free_list);
- atchan->completed_cookie = chan->cookie = 1;
+ chan->completed_cookie = chan->cookie = 1;
spin_unlock_irqrestore(&atchan->lock, flags);
/* channel parameters */
@@ -1329,7 +1329,7 @@ static int __init at_dma_probe(struct platform_device *pdev)
struct at_dma_chan *atchan = &atdma->chan[i];
atchan->chan_common.device = &atdma->dma_common;
- atchan->chan_common.cookie = atchan->completed_cookie = 1;
+ atchan->chan_common.cookie = atchan->chan_common.completed_cookie = 1;
list_add_tail(&atchan->chan_common.device_node,
&atdma->dma_common.channels);
diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h
index a8d3277..08fd8a0 100644
--- a/drivers/dma/at_hdmac_regs.h
+++ b/drivers/dma/at_hdmac_regs.h
@@ -208,7 +208,6 @@ enum atc_status {
* @save_dscr: for cyclic operations, preserve next descriptor address in
* the cyclic list on suspend/resume cycle
* @lock: serializes enqueue/dequeue operations to descriptors lists
- * @completed_cookie: identifier for the most recently completed operation
* @active_list: list of descriptors dmaengine is being running on
* @queue: list of descriptors ready to be submitted to engine
* @free_list: list of descriptors usable by the channel
@@ -227,7 +226,6 @@ struct at_dma_chan {
spinlock_t lock;
/* these other elements are all protected by lock */
- dma_cookie_t completed_cookie;
struct list_head active_list;
struct list_head queue;
struct list_head free_list;
diff --git a/drivers/dma/coh901318.c b/drivers/dma/coh901318.c
index d65a718..521434b 100644
--- a/drivers/dma/coh901318.c
+++ b/drivers/dma/coh901318.c
@@ -59,7 +59,6 @@ struct coh901318_base {
struct coh901318_chan {
spinlock_t lock;
int allocated;
- int completed;
int id;
int stopped;
@@ -705,7 +704,7 @@ static void dma_tasklet(unsigned long data)
callback_param = cohd_fin->desc.callback_param;
/* sign this job as completed on the channel */
- cohc->completed = cohd_fin->desc.cookie;
+ cohc->chan.completed_cookie = cohd_fin->desc.cookie;
/* release the lli allocation and remove the descriptor */
coh901318_lli_free(&cohc->base->pool, &cohd_fin->lli);
@@ -929,7 +928,7 @@ static int coh901318_alloc_chan_resources(struct dma_chan *chan)
coh901318_config(cohc, NULL);
cohc->allocated = 1;
- cohc->completed = chan->cookie = 1;
+ chan->completed_cookie = chan->cookie = 1;
spin_unlock_irqrestore(&cohc->lock, flags);
@@ -1169,7 +1168,7 @@ coh901318_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
dma_cookie_t last_complete;
int ret;
- last_complete = cohc->completed;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
diff --git a/drivers/dma/dw_dmac.c b/drivers/dma/dw_dmac.c
index 9b592b0..defe574 100644
--- a/drivers/dma/dw_dmac.c
+++ b/drivers/dma/dw_dmac.c
@@ -245,7 +245,7 @@ dwc_descriptor_complete(struct dw_dma_chan *dwc, struct dw_desc *desc,
dev_vdbg(chan2dev(&dwc->chan), "descriptor %u complete\n", txd->cookie);
spin_lock_irqsave(&dwc->lock, flags);
- dwc->completed = txd->cookie;
+ dwc->chan.completed_cookie = txd->cookie;
if (callback_required) {
callback = txd->callback;
param = txd->callback_param;
@@ -955,14 +955,14 @@ dwc_tx_status(struct dma_chan *chan,
dma_cookie_t last_complete;
int ret;
- last_complete = dwc->completed;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
if (ret != DMA_SUCCESS) {
dwc_scan_descriptors(to_dw_dma(chan->device), dwc);
- last_complete = dwc->completed;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -1004,7 +1004,7 @@ static int dwc_alloc_chan_resources(struct dma_chan *chan)
return -EIO;
}
- dwc->completed = chan->cookie = 1;
+ chan->completed_cookie = chan->cookie = 1;
/*
* NOTE: some controllers may have additional features that we
@@ -1423,7 +1423,7 @@ static int __init dw_probe(struct platform_device *pdev)
struct dw_dma_chan *dwc = &dw->chan[i];
dwc->chan.device = &dw->dma;
- dwc->chan.cookie = dwc->completed = 1;
+ dwc->chan.cookie = dwc->chan.completed_cookie = 1;
if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING)
list_add_tail(&dwc->chan.device_node,
&dw->dma.channels);
diff --git a/drivers/dma/dw_dmac_regs.h b/drivers/dma/dw_dmac_regs.h
index 5eef694..cce1752 100644
--- a/drivers/dma/dw_dmac_regs.h
+++ b/drivers/dma/dw_dmac_regs.h
@@ -146,7 +146,6 @@ struct dw_dma_chan {
/* these other elements are all protected by lock */
unsigned long flags;
- dma_cookie_t completed;
struct list_head active_list;
struct list_head queue;
struct list_head free_list;
diff --git a/drivers/dma/ep93xx_dma.c b/drivers/dma/ep93xx_dma.c
index 59e7a96..bc45787 100644
--- a/drivers/dma/ep93xx_dma.c
+++ b/drivers/dma/ep93xx_dma.c
@@ -122,7 +122,6 @@ struct ep93xx_dma_desc {
* @lock: lock protecting the fields following
* @flags: flags for the channel
* @buffer: which buffer to use next (0/1)
- * @last_completed: last completed cookie value
* @active: flattened chain of descriptors currently being processed
* @queue: pending descriptors which are handled next
* @free_list: list of free descriptors which can be used
@@ -157,7 +156,6 @@ struct ep93xx_dma_chan {
#define EP93XX_DMA_IS_CYCLIC 0
int buffer;
- dma_cookie_t last_completed;
struct list_head active;
struct list_head queue;
struct list_head free_list;
@@ -703,7 +701,7 @@ static void ep93xx_dma_tasklet(unsigned long data)
desc = ep93xx_dma_get_active(edmac);
if (desc) {
if (desc->complete) {
- edmac->last_completed = desc->txd.cookie;
+ edmac->chan.completed_cookie = desc->txd.cookie;
list_splice_init(&edmac->active, &list);
}
callback = desc->txd.callback;
@@ -861,7 +859,7 @@ static int ep93xx_dma_alloc_chan_resources(struct dma_chan *chan)
goto fail_clk_disable;
spin_lock_irq(&edmac->lock);
- edmac->last_completed = 1;
+ edmac->chan.completed_cookie = 1;
edmac->chan.cookie = 1;
ret = edmac->edma->hw_setup(edmac);
spin_unlock_irq(&edmac->lock);
@@ -1254,7 +1252,7 @@ static enum dma_status ep93xx_dma_tx_status(struct dma_chan *chan,
spin_lock_irqsave(&edmac->lock, flags);
last_used = chan->cookie;
- last_completed = edmac->last_completed;
+ last_completed = chan->completed_cookie;
spin_unlock_irqrestore(&edmac->lock, flags);
ret = dma_async_is_complete(cookie, last_completed, last_used);
diff --git a/drivers/dma/fsldma.c b/drivers/dma/fsldma.c
index b98070c..9b5cb8a 100644
--- a/drivers/dma/fsldma.c
+++ b/drivers/dma/fsldma.c
@@ -990,7 +990,7 @@ static enum dma_status fsl_tx_status(struct dma_chan *dchan,
spin_lock_irqsave(&chan->desc_lock, flags);
- last_complete = chan->completed_cookie;
+ last_complete = dchan->completed_cookie;
last_used = dchan->cookie;
spin_unlock_irqrestore(&chan->desc_lock, flags);
@@ -1088,7 +1088,7 @@ static void dma_do_tasklet(unsigned long data)
desc = to_fsl_desc(chan->ld_running.prev);
cookie = desc->async_tx.cookie;
- chan->completed_cookie = cookie;
+ chan->common.completed_cookie = cookie;
chan_dbg(chan, "completed_cookie=%d\n", cookie);
}
diff --git a/drivers/dma/fsldma.h b/drivers/dma/fsldma.h
index 9cb5aa5..f5c3879 100644
--- a/drivers/dma/fsldma.h
+++ b/drivers/dma/fsldma.h
@@ -137,7 +137,6 @@ struct fsldma_device {
struct fsldma_chan {
char name[8]; /* Channel name */
struct fsldma_chan_regs __iomem *regs;
- dma_cookie_t completed_cookie; /* The maximum cookie completed */
spinlock_t desc_lock; /* Descriptor operation lock */
struct list_head ld_pending; /* Link descriptors queue */
struct list_head ld_running; /* Link descriptors queue */
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c
index e4383ee..321fc1f 100644
--- a/drivers/dma/imx-dma.c
+++ b/drivers/dma/imx-dma.c
@@ -41,7 +41,6 @@ struct imxdma_channel {
struct dma_chan chan;
spinlock_t lock;
struct dma_async_tx_descriptor desc;
- dma_cookie_t last_completed;
enum dma_status status;
int dma_request;
struct scatterlist *sg_list;
@@ -65,7 +64,7 @@ static void imxdma_handle(struct imxdma_channel *imxdmac)
{
if (imxdmac->desc.callback)
imxdmac->desc.callback(imxdmac->desc.callback_param);
- imxdmac->last_completed = imxdmac->desc.cookie;
+ imxdmac->chan.completed_cookie = imxdmac->desc.cookie;
}
static void imxdma_irq_handler(int channel, void *data)
@@ -158,8 +157,8 @@ static enum dma_status imxdma_tx_status(struct dma_chan *chan,
last_used = chan->cookie;
- ret = dma_async_is_complete(cookie, imxdmac->last_completed, last_used);
- dma_set_tx_state(txstate, imxdmac->last_completed, last_used, 0);
+ ret = dma_async_is_complete(cookie, chan->completed_cookie, last_used);
+ dma_set_tx_state(txstate, chan->completed_cookie, last_used, 0);
return ret;
}
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 8bc5acf..e857904 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -266,7 +266,6 @@ struct sdma_channel {
struct dma_chan chan;
spinlock_t lock;
struct dma_async_tx_descriptor desc;
- dma_cookie_t last_completed;
enum dma_status status;
unsigned int chn_count;
unsigned int chn_real_count;
@@ -523,7 +522,7 @@ static void mxc_sdma_handle_channel_normal(struct sdma_channel *sdmac)
else
sdmac->status = DMA_SUCCESS;
- sdmac->last_completed = sdmac->desc.cookie;
+ sdmac->chan.completed_cookie = sdmac->desc.cookie;
if (sdmac->desc.callback)
sdmac->desc.callback(sdmac->desc.callback_param);
}
@@ -1129,7 +1128,7 @@ static enum dma_status sdma_tx_status(struct dma_chan *chan,
last_used = chan->cookie;
- dma_set_tx_state(txstate, sdmac->last_completed, last_used,
+ dma_set_tx_state(txstate, chan->completed_cookie, last_used,
sdmac->chn_count - sdmac->chn_real_count);
return sdmac->status;
diff --git a/drivers/dma/intel_mid_dma.c b/drivers/dma/intel_mid_dma.c
index 74f70aa..a27ae45 100644
--- a/drivers/dma/intel_mid_dma.c
+++ b/drivers/dma/intel_mid_dma.c
@@ -288,7 +288,7 @@ static void midc_descriptor_complete(struct intel_mid_dma_chan *midc,
struct intel_mid_dma_lli *llitem;
void *param_txd = NULL;
- midc->completed = txd->cookie;
+ midc->chan.completed_cookie = txd->cookie;
callback_txd = txd->callback;
param_txd = txd->callback_param;
@@ -482,12 +482,11 @@ static enum dma_status intel_mid_dma_tx_status(struct dma_chan *chan,
dma_cookie_t cookie,
struct dma_tx_state *txstate)
{
- struct intel_mid_dma_chan *midc = to_intel_mid_dma_chan(chan);
dma_cookie_t last_used;
dma_cookie_t last_complete;
int ret;
- last_complete = midc->completed;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -496,7 +495,7 @@ static enum dma_status intel_mid_dma_tx_status(struct dma_chan *chan,
midc_scan_descriptors(to_middma_device(chan->device), midc);
spin_unlock_bh(&midc->lock);
- last_complete = midc->completed;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -886,7 +885,7 @@ static int intel_mid_dma_alloc_chan_resources(struct dma_chan *chan)
pm_runtime_put(&mid->pdev->dev);
return -EIO;
}
- midc->completed = chan->cookie = 1;
+ chan->completed_cookie = chan->cookie = 1;
spin_lock_bh(&midc->lock);
while (midc->descs_allocated < DESCS_PER_CHANNEL) {
diff --git a/drivers/dma/intel_mid_dma_regs.h b/drivers/dma/intel_mid_dma_regs.h
index c83d35b..1bfa926 100644
--- a/drivers/dma/intel_mid_dma_regs.h
+++ b/drivers/dma/intel_mid_dma_regs.h
@@ -165,7 +165,6 @@ union intel_mid_dma_cfg_hi {
* @dma_base: MMIO register space DMA engine base pointer
* @ch_id: DMA channel id
* @lock: channel spinlock
- * @completed: DMA cookie
* @active_list: current active descriptors
* @queue: current queued up descriptors
* @free_list: current free descriptors
@@ -183,7 +182,6 @@ struct intel_mid_dma_chan {
void __iomem *dma_base;
int ch_id;
spinlock_t lock;
- dma_cookie_t completed;
struct list_head active_list;
struct list_head queue;
struct list_head free_list;
diff --git a/drivers/dma/ioat/dma.c b/drivers/dma/ioat/dma.c
index a4d6cb0..fab440a 100644
--- a/drivers/dma/ioat/dma.c
+++ b/drivers/dma/ioat/dma.c
@@ -603,7 +603,7 @@ static void __cleanup(struct ioat_dma_chan *ioat, unsigned long phys_complete)
*/
dump_desc_dbg(ioat, desc);
if (tx->cookie) {
- chan->completed_cookie = tx->cookie;
+ chan->common.completed_cookie = tx->cookie;
tx->cookie = 0;
ioat_dma_unmap(chan, tx->flags, desc->len, desc->hw);
ioat->active -= desc->hw->tx_cnt;
diff --git a/drivers/dma/ioat/dma.h b/drivers/dma/ioat/dma.h
index 5216c8a..9653b6b 100644
--- a/drivers/dma/ioat/dma.h
+++ b/drivers/dma/ioat/dma.h
@@ -90,7 +90,6 @@ struct ioat_chan_common {
void __iomem *reg_base;
unsigned long last_completion;
spinlock_t cleanup_lock;
- dma_cookie_t completed_cookie;
unsigned long state;
#define IOAT_COMPLETION_PENDING 0
#define IOAT_COMPLETION_ACK 1
@@ -153,12 +152,11 @@ static inline enum dma_status
ioat_tx_status(struct dma_chan *c, dma_cookie_t cookie,
struct dma_tx_state *txstate)
{
- struct ioat_chan_common *chan = to_chan_common(c);
dma_cookie_t last_used;
dma_cookie_t last_complete;
last_used = c->cookie;
- last_complete = chan->completed_cookie;
+ last_complete = c->completed_cookie;
dma_set_tx_state(txstate, last_complete, last_used, 0);
diff --git a/drivers/dma/ioat/dma_v2.c b/drivers/dma/ioat/dma_v2.c
index 5d65f83..d3f0aff 100644
--- a/drivers/dma/ioat/dma_v2.c
+++ b/drivers/dma/ioat/dma_v2.c
@@ -147,7 +147,7 @@ static void __cleanup(struct ioat2_dma_chan *ioat, unsigned long phys_complete)
dump_desc_dbg(ioat, desc);
if (tx->cookie) {
ioat_dma_unmap(chan, tx->flags, desc->len, desc->hw);
- chan->completed_cookie = tx->cookie;
+ chan->common.completed_cookie = tx->cookie;
tx->cookie = 0;
if (tx->callback) {
tx->callback(tx->callback_param);
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index f519c93..d4afac7 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -277,7 +277,7 @@ static void __cleanup(struct ioat2_dma_chan *ioat, unsigned long phys_complete)
dump_desc_dbg(ioat, desc);
tx = &desc->txd;
if (tx->cookie) {
- chan->completed_cookie = tx->cookie;
+ chan->common.completed_cookie = tx->cookie;
ioat3_dma_unmap(ioat, desc, idx + i);
tx->cookie = 0;
if (tx->callback) {
diff --git a/drivers/dma/iop-adma.c b/drivers/dma/iop-adma.c
index 04be90b..d8027c2 100644
--- a/drivers/dma/iop-adma.c
+++ b/drivers/dma/iop-adma.c
@@ -317,7 +317,7 @@ static void __iop_adma_slot_cleanup(struct iop_adma_chan *iop_chan)
}
if (cookie > 0) {
- iop_chan->completed_cookie = cookie;
+ iop_chan->common.completed_cookie = cookie;
pr_debug("\tcompleted cookie %d\n", cookie);
}
}
@@ -909,7 +909,7 @@ static enum dma_status iop_adma_status(struct dma_chan *chan,
enum dma_status ret;
last_used = chan->cookie;
- last_complete = iop_chan->completed_cookie;
+ last_complete = chan->completed_cookie;
dma_set_tx_state(txstate, last_complete, last_used, 0);
ret = dma_async_is_complete(cookie, last_complete, last_used);
if (ret == DMA_SUCCESS)
@@ -918,7 +918,7 @@ static enum dma_status iop_adma_status(struct dma_chan *chan,
iop_adma_slot_cleanup(iop_chan);
last_used = chan->cookie;
- last_complete = iop_chan->completed_cookie;
+ last_complete = chan->completed_cookie;
dma_set_tx_state(txstate, last_complete, last_used, 0);
return dma_async_is_complete(cookie, last_complete, last_used);
@@ -1650,7 +1650,7 @@ static void iop_chan_start_null_memcpy(struct iop_adma_chan *iop_chan)
/* initialize the completed cookie to be less than
* the most recently used cookie
*/
- iop_chan->completed_cookie = cookie - 1;
+ iop_chan->common.completed_cookie = cookie - 1;
iop_chan->common.cookie = sw_desc->async_tx.cookie = cookie;
/* channel should not be busy */
@@ -1707,7 +1707,7 @@ static void iop_chan_start_null_xor(struct iop_adma_chan *iop_chan)
/* initialize the completed cookie to be less than
* the most recently used cookie
*/
- iop_chan->completed_cookie = cookie - 1;
+ iop_chan->common.completed_cookie = cookie - 1;
iop_chan->common.cookie = sw_desc->async_tx.cookie = cookie;
/* channel should not be busy */
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c
index 6212b16..9149ade 100644
--- a/drivers/dma/ipu/ipu_idmac.c
+++ b/drivers/dma/ipu/ipu_idmac.c
@@ -1295,7 +1295,7 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id)
/* Flip the active buffer - even if update above failed */
ichan->active_buffer = !ichan->active_buffer;
if (done)
- ichan->completed = desc->txd.cookie;
+ ichan->dma_chan.completed_cookie = desc->txd.cookie;
callback = desc->txd.callback;
callback_param = desc->txd.callback_param;
@@ -1511,7 +1511,7 @@ static int idmac_alloc_chan_resources(struct dma_chan *chan)
WARN_ON(ichan->status != IPU_CHANNEL_FREE);
chan->cookie = 1;
- ichan->completed = -ENXIO;
+ chan->completed_cookie = -ENXIO;
ret = ipu_irq_map(chan->chan_id);
if (ret < 0)
@@ -1600,9 +1600,7 @@ static void idmac_free_chan_resources(struct dma_chan *chan)
static enum dma_status idmac_tx_status(struct dma_chan *chan,
dma_cookie_t cookie, struct dma_tx_state *txstate)
{
- struct idmac_channel *ichan = to_idmac_chan(chan);
-
- dma_set_tx_state(txstate, ichan->completed, chan->cookie, 0);
+ dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, 0);
if (cookie != chan->cookie)
return DMA_ERROR;
return DMA_SUCCESS;
@@ -1638,11 +1636,11 @@ static int __init ipu_idmac_init(struct ipu *ipu)
ichan->status = IPU_CHANNEL_FREE;
ichan->sec_chan_en = false;
- ichan->completed = -ENXIO;
snprintf(ichan->eof_name, sizeof(ichan->eof_name), "IDMAC EOF %d", i);
dma_chan->device = &idmac->dma;
dma_chan->cookie = 1;
+ dma_chan->completed_cookie = -ENXIO;
dma_chan->chan_id = i;
list_add_tail(&dma_chan->device_node, &dma->channels);
}
diff --git a/drivers/dma/mpc512x_dma.c b/drivers/dma/mpc512x_dma.c
index 4d6d4cf..39a5cde 100644
--- a/drivers/dma/mpc512x_dma.c
+++ b/drivers/dma/mpc512x_dma.c
@@ -188,7 +188,6 @@ struct mpc_dma_chan {
struct list_head completed;
struct mpc_dma_tcd *tcd;
dma_addr_t tcd_paddr;
- dma_cookie_t completed_cookie;
/* Lock for this structure */
spinlock_t lock;
@@ -365,7 +364,7 @@ static void mpc_dma_process_completed(struct mpc_dma *mdma)
/* Free descriptors */
spin_lock_irqsave(&mchan->lock, flags);
list_splice_tail_init(&list, &mchan->free);
- mchan->completed_cookie = last_cookie;
+ mchan->chan.completed_cookie = last_cookie;
spin_unlock_irqrestore(&mchan->lock, flags);
}
}
@@ -568,7 +567,7 @@ mpc_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
spin_lock_irqsave(&mchan->lock, flags);
last_used = mchan->chan.cookie;
- last_complete = mchan->completed_cookie;
+ last_complete = mchan->chan.completed_cookie;
spin_unlock_irqrestore(&mchan->lock, flags);
dma_set_tx_state(txstate, last_complete, last_used, 0);
@@ -742,7 +741,7 @@ static int __devinit mpc_dma_probe(struct platform_device *op)
mchan->chan.device = dma;
mchan->chan.cookie = 1;
- mchan->completed_cookie = mchan->chan.cookie;
+ mchan->chan.completed_cookie = mchan->chan.cookie;
INIT_LIST_HEAD(&mchan->free);
INIT_LIST_HEAD(&mchan->prepared);
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index ad7d03f..c6a84da 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -435,7 +435,7 @@ static void __mv_xor_slot_cleanup(struct mv_xor_chan *mv_chan)
}
if (cookie > 0)
- mv_chan->completed_cookie = cookie;
+ mv_chan->common.completed_cookie = cookie;
}
static void
@@ -825,7 +825,7 @@ static enum dma_status mv_xor_status(struct dma_chan *chan,
enum dma_status ret;
last_used = chan->cookie;
- last_complete = mv_chan->completed_cookie;
+ last_complete = chan->completed_cookie;
dma_set_tx_state(txstate, last_complete, last_used, 0);
ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -836,7 +836,7 @@ static enum dma_status mv_xor_status(struct dma_chan *chan,
mv_xor_slot_cleanup(mv_chan);
last_used = chan->cookie;
- last_complete = mv_chan->completed_cookie;
+ last_complete = chan->completed_cookie;
dma_set_tx_state(txstate, last_complete, last_used, 0);
return dma_async_is_complete(cookie, last_complete, last_used);
diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h
index da04ac2..654876b 100644
--- a/drivers/dma/mv_xor.h
+++ b/drivers/dma/mv_xor.h
@@ -78,7 +78,6 @@ struct mv_xor_device {
/**
* struct mv_xor_chan - internal representation of a XOR channel
* @pending: allows batching of hardware operations
- * @completed_cookie: identifier for the most recently completed operation
* @lock: serializes enqueue/dequeue operations to the descriptors pool
* @mmr_base: memory mapped register base
* @idx: the index of the xor channel
@@ -93,7 +92,6 @@ struct mv_xor_device {
*/
struct mv_xor_chan {
int pending;
- dma_cookie_t completed_cookie;
spinlock_t lock; /* protects the descriptor slot pool */
void __iomem *mmr_base;
unsigned int idx;
diff --git a/drivers/dma/mxs-dma.c b/drivers/dma/mxs-dma.c
index b06cd4c..3696e6e 100644
--- a/drivers/dma/mxs-dma.c
+++ b/drivers/dma/mxs-dma.c
@@ -111,7 +111,6 @@ struct mxs_dma_chan {
struct mxs_dma_ccw *ccw;
dma_addr_t ccw_phys;
int desc_count;
- dma_cookie_t last_completed;
enum dma_status status;
unsigned int flags;
#define MXS_DMA_SG_LOOP (1 << 0)
@@ -274,7 +273,7 @@ static irqreturn_t mxs_dma_int_handler(int irq, void *dev_id)
stat1 &= ~(1 << channel);
if (mxs_chan->status == DMA_SUCCESS)
- mxs_chan->last_completed = mxs_chan->desc.cookie;
+ mxs_chan->chan.completed_cookie = mxs_chan->desc.cookie;
/* schedule tasklet on this channel */
tasklet_schedule(&mxs_chan->tasklet);
@@ -538,7 +537,7 @@ static enum dma_status mxs_dma_tx_status(struct dma_chan *chan,
dma_cookie_t last_used;
last_used = chan->cookie;
- dma_set_tx_state(txstate, mxs_chan->last_completed, last_used, 0);
+ dma_set_tx_state(txstate, chan->completed_cookie, last_used, 0);
return mxs_chan->status;
}
diff --git a/drivers/dma/pch_dma.c b/drivers/dma/pch_dma.c
index 823f581..79a7185 100644
--- a/drivers/dma/pch_dma.c
+++ b/drivers/dma/pch_dma.c
@@ -105,7 +105,6 @@ struct pch_dma_chan {
spinlock_t lock;
- dma_cookie_t completed_cookie;
struct list_head active_list;
struct list_head queue;
struct list_head free_list;
@@ -544,7 +543,7 @@ static int pd_alloc_chan_resources(struct dma_chan *chan)
spin_lock_irq(&pd_chan->lock);
list_splice(&tmp_list, &pd_chan->free_list);
pd_chan->descs_allocated = i;
- pd_chan->completed_cookie = chan->cookie = 1;
+ chan->completed_cookie = chan->cookie = 1;
spin_unlock_irq(&pd_chan->lock);
pdc_enable_irq(chan, 1);
@@ -583,7 +582,7 @@ static enum dma_status pd_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
int ret;
spin_lock_irq(&pd_chan->lock);
- last_completed = pd_chan->completed_cookie;
+ last_completed = chan->completed_cookie;
last_used = chan->cookie;
spin_unlock_irq(&pd_chan->lock);
diff --git a/drivers/dma/pl330.c b/drivers/dma/pl330.c
index b8ec03e..bdf04f1 100644
--- a/drivers/dma/pl330.c
+++ b/drivers/dma/pl330.c
@@ -51,9 +51,6 @@ struct dma_pl330_chan {
/* DMA-Engine Channel */
struct dma_chan chan;
- /* Last completed cookie */
- dma_cookie_t completed;
-
/* List of to be xfered descriptors */
struct list_head work_list;
@@ -234,7 +231,7 @@ static void pl330_tasklet(unsigned long data)
/* Pick up ripe tomatoes */
list_for_each_entry_safe(desc, _dt, &pch->work_list, node)
if (desc->status == DONE) {
- pch->completed = desc->txd.cookie;
+ pch->chan.completed_cookie = desc->txd.cookie;
list_move_tail(&desc->node, &list);
}
@@ -305,7 +302,7 @@ static int pl330_alloc_chan_resources(struct dma_chan *chan)
spin_lock_irqsave(&pch->lock, flags);
- pch->completed = chan->cookie = 1;
+ chan->completed_cookie = chan->cookie = 1;
pch->cyclic = false;
pch->pl330_chid = pl330_request_channel(&pdmac->pif);
@@ -400,7 +397,7 @@ pl330_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
dma_cookie_t last_done, last_used;
int ret;
- last_done = pch->completed;
+ last_done = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_done, last_used);
diff --git a/drivers/dma/ppc4xx/adma.c b/drivers/dma/ppc4xx/adma.c
index fc457a7..f878322 100644
--- a/drivers/dma/ppc4xx/adma.c
+++ b/drivers/dma/ppc4xx/adma.c
@@ -1930,7 +1930,7 @@ static void __ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan)
if (end_of_chain && slot_cnt) {
/* Should wait for ZeroSum completion */
if (cookie > 0)
- chan->completed_cookie = cookie;
+ chan->common.completed_cookie = cookie;
return;
}
@@ -1960,7 +1960,7 @@ static void __ppc440spe_adma_slot_cleanup(struct ppc440spe_adma_chan *chan)
BUG_ON(!seen_current);
if (cookie > 0) {
- chan->completed_cookie = cookie;
+ chan->common.completed_cookie = cookie;
pr_debug("\tcompleted cookie %d\n", cookie);
}
@@ -3950,7 +3950,7 @@ static enum dma_status ppc440spe_adma_tx_status(struct dma_chan *chan,
ppc440spe_chan = to_ppc440spe_adma_chan(chan);
last_used = chan->cookie;
- last_complete = ppc440spe_chan->completed_cookie;
+ last_complete = chan->completed_cookie;
dma_set_tx_state(txstate, last_complete, last_used, 0);
@@ -3961,7 +3961,7 @@ static enum dma_status ppc440spe_adma_tx_status(struct dma_chan *chan,
ppc440spe_adma_slot_cleanup(ppc440spe_chan);
last_used = chan->cookie;
- last_complete = ppc440spe_chan->completed_cookie;
+ last_complete = chan->completed_cookie;
dma_set_tx_state(txstate, last_complete, last_used, 0);
@@ -4058,7 +4058,7 @@ static void ppc440spe_chan_start_null_xor(struct ppc440spe_adma_chan *chan)
/* initialize the completed cookie to be less than
* the most recently used cookie
*/
- chan->completed_cookie = cookie - 1;
+ chan->common.completed_cookie = cookie - 1;
chan->common.cookie = sw_desc->async_tx.cookie = cookie;
/* channel should not be busy */
diff --git a/drivers/dma/ppc4xx/adma.h b/drivers/dma/ppc4xx/adma.h
index 8ada5a8..26b7a5e 100644
--- a/drivers/dma/ppc4xx/adma.h
+++ b/drivers/dma/ppc4xx/adma.h
@@ -81,7 +81,6 @@ struct ppc440spe_adma_device {
* @common: common dmaengine channel object members
* @all_slots: complete domain of slots usable by the channel
* @pending: allows batching of hardware operations
- * @completed_cookie: identifier for the most recently completed operation
* @slots_allocated: records the actual size of the descriptor slot pool
* @hw_chain_inited: h/w descriptor chain initialization flag
* @irq_tasklet: bottom half where ppc440spe_adma_slot_cleanup runs
@@ -99,7 +98,6 @@ struct ppc440spe_adma_chan {
struct list_head all_slots;
struct ppc440spe_adma_desc_slot *last_used;
int pending;
- dma_cookie_t completed_cookie;
int slots_allocated;
int hw_chain_inited;
struct tasklet_struct irq_tasklet;
diff --git a/drivers/dma/shdma.c b/drivers/dma/shdma.c
index 812fd76..ae84c12 100644
--- a/drivers/dma/shdma.c
+++ b/drivers/dma/shdma.c
@@ -764,12 +764,12 @@ static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all
cookie = tx->cookie;
if (desc->mark == DESC_COMPLETED && desc->chunks == 1) {
- if (sh_chan->completed_cookie != desc->cookie - 1)
+ if (sh_chan->common.completed_cookie != desc->cookie - 1)
dev_dbg(sh_chan->dev,
"Completing cookie %d, expected %d\n",
desc->cookie,
- sh_chan->completed_cookie + 1);
- sh_chan->completed_cookie = desc->cookie;
+ sh_chan->common.completed_cookie + 1);
+ sh_chan->common.completed_cookie = desc->cookie;
}
/* Call callback on the last chunk */
@@ -823,7 +823,7 @@ static dma_async_tx_callback __ld_cleanup(struct sh_dmae_chan *sh_chan, bool all
* Terminating and the loop completed normally: forgive
* uncompleted cookies
*/
- sh_chan->completed_cookie = sh_chan->common.cookie;
+ sh_chan->common.completed_cookie = sh_chan->common.cookie;
spin_unlock_irqrestore(&sh_chan->desc_lock, flags);
@@ -891,7 +891,7 @@ static enum dma_status sh_dmae_tx_status(struct dma_chan *chan,
sh_dmae_chan_ld_cleanup(sh_chan, false);
/* First read completed cookie to avoid a skew */
- last_complete = sh_chan->completed_cookie;
+ last_complete = chan->completed_cookie;
rmb();
last_used = chan->cookie;
BUG_ON(last_complete < 0);
diff --git a/drivers/dma/shdma.h b/drivers/dma/shdma.h
index 2b55a27..0b1d2c1 100644
--- a/drivers/dma/shdma.h
+++ b/drivers/dma/shdma.h
@@ -30,7 +30,6 @@ enum dmae_pm_state {
};
struct sh_dmae_chan {
- dma_cookie_t completed_cookie; /* The maximum cookie completed */
spinlock_t desc_lock; /* Descriptor operation lock */
struct list_head ld_queue; /* Link descriptors queue */
struct list_head ld_free; /* Link descriptors free */
diff --git a/drivers/dma/sirf-dma.c b/drivers/dma/sirf-dma.c
index 2333810..60473f0 100644
--- a/drivers/dma/sirf-dma.c
+++ b/drivers/dma/sirf-dma.c
@@ -59,7 +59,6 @@ struct sirfsoc_dma_chan {
struct list_head queued;
struct list_head active;
struct list_head completed;
- dma_cookie_t completed_cookie;
unsigned long happened_cyclic;
unsigned long completed_cyclic;
@@ -208,7 +207,7 @@ static void sirfsoc_dma_process_completed(struct sirfsoc_dma *sdma)
/* Free descriptors */
spin_lock_irqsave(&schan->lock, flags);
list_splice_tail_init(&list, &schan->free);
- schan->completed_cookie = last_cookie;
+ schan->chan.completed_cookie = last_cookie;
spin_unlock_irqrestore(&schan->lock, flags);
} else {
/* for cyclic channel, desc is always in active list */
@@ -419,7 +418,7 @@ sirfsoc_dma_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
spin_lock_irqsave(&schan->lock, flags);
last_used = schan->chan.cookie;
- last_complete = schan->completed_cookie;
+ last_complete = schan->chan.completed_cookie;
spin_unlock_irqrestore(&schan->lock, flags);
dma_set_tx_state(txstate, last_complete, last_used, 0);
@@ -636,7 +635,7 @@ static int __devinit sirfsoc_dma_probe(struct platform_device *op)
schan->chan.device = dma;
schan->chan.cookie = 1;
- schan->completed_cookie = schan->chan.cookie;
+ schan->chan.completed_cookie = schan->chan.cookie;
INIT_LIST_HEAD(&schan->free);
INIT_LIST_HEAD(&schan->prepared);
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c
index cc5ecbc..cfca2a0 100644
--- a/drivers/dma/ste_dma40.c
+++ b/drivers/dma/ste_dma40.c
@@ -220,8 +220,6 @@ struct d40_base;
*
* @lock: A spinlock to protect this struct.
* @log_num: The logical number, if any of this channel.
- * @completed: Starts with 1, after first interrupt it is set to dma engine's
- * current cookie.
* @pending_tx: The number of pending transfers. Used between interrupt handler
* and tasklet.
* @busy: Set to true when transfer is ongoing on this channel.
@@ -250,8 +248,6 @@ struct d40_base;
struct d40_chan {
spinlock_t lock;
int log_num;
- /* ID of the most recent completed transfer */
- int completed;
int pending_tx;
bool busy;
struct d40_phy_res *phy_chan;
@@ -1357,7 +1353,7 @@ static void dma_tasklet(unsigned long data)
goto err;
if (!d40d->cyclic)
- d40c->completed = d40d->txd.cookie;
+ d40c->chan.completed_cookie = d40d->txd.cookie;
/*
* If terminating a channel pending_tx is set to zero.
@@ -2182,7 +2178,7 @@ static int d40_alloc_chan_resources(struct dma_chan *chan)
bool is_free_phy;
spin_lock_irqsave(&d40c->lock, flags);
- d40c->completed = chan->cookie = 1;
+ chan->completed_cookie = chan->cookie = 1;
/* If no dma configuration is set use default configuration (memcpy) */
if (!d40c->configured) {
@@ -2351,7 +2347,7 @@ static enum dma_status d40_tx_status(struct dma_chan *chan,
return -EINVAL;
}
- last_complete = d40c->completed;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
if (d40_is_paused(d40c))
diff --git a/drivers/dma/timb_dma.c b/drivers/dma/timb_dma.c
index a6f9c16..a1d1559 100644
--- a/drivers/dma/timb_dma.c
+++ b/drivers/dma/timb_dma.c
@@ -84,7 +84,6 @@ struct timb_dma_chan {
especially the lists and descriptors,
from races between the tasklet and calls
from above */
- dma_cookie_t last_completed_cookie;
bool ongoing;
struct list_head active_list;
struct list_head queue;
@@ -284,7 +283,7 @@ static void __td_finish(struct timb_dma_chan *td_chan)
else
iowrite32(0, td_chan->membase + TIMBDMA_OFFS_TX_DLAR);
*/
- td_chan->last_completed_cookie = txd->cookie;
+ td_chan->chan.completed_cookie = txd->cookie;
td_chan->ongoing = false;
callback = txd->callback;
@@ -481,7 +480,7 @@ static int td_alloc_chan_resources(struct dma_chan *chan)
}
spin_lock_bh(&td_chan->lock);
- td_chan->last_completed_cookie = 1;
+ chan->completed_cookie = 1;
chan->cookie = 1;
spin_unlock_bh(&td_chan->lock);
@@ -523,7 +522,7 @@ static enum dma_status td_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
dev_dbg(chan2dev(chan), "%s: Entry\n", __func__);
- last_complete = td_chan->last_completed_cookie;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
diff --git a/drivers/dma/txx9dmac.c b/drivers/dma/txx9dmac.c
index 6122c36..a917b67 100644
--- a/drivers/dma/txx9dmac.c
+++ b/drivers/dma/txx9dmac.c
@@ -424,7 +424,7 @@ txx9dmac_descriptor_complete(struct txx9dmac_chan *dc,
dev_vdbg(chan2dev(&dc->chan), "descriptor %u %p complete\n",
txd->cookie, desc);
- dc->completed = txd->cookie;
+ dc->chan.completed_cookie = txd->cookie;
callback = txd->callback;
param = txd->callback_param;
@@ -976,7 +976,7 @@ txx9dmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
dma_cookie_t last_complete;
int ret;
- last_complete = dc->completed;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -985,7 +985,7 @@ txx9dmac_tx_status(struct dma_chan *chan, dma_cookie_t cookie,
txx9dmac_scan_descriptors(dc);
spin_unlock_bh(&dc->lock);
- last_complete = dc->completed;
+ last_complete = chan->completed_cookie;
last_used = chan->cookie;
ret = dma_async_is_complete(cookie, last_complete, last_used);
@@ -1057,7 +1057,7 @@ static int txx9dmac_alloc_chan_resources(struct dma_chan *chan)
return -EIO;
}
- dc->completed = chan->cookie = 1;
+ chan->completed_cookie = chan->cookie = 1;
dc->ccr = TXX9_DMA_CCR_IMMCHN | TXX9_DMA_CCR_INTENE | CCR_LE;
txx9dmac_chan_set_SMPCHN(dc);
@@ -1186,7 +1186,7 @@ static int __init txx9dmac_chan_probe(struct platform_device *pdev)
dc->ddev->chan[ch] = dc;
dc->chan.device = &dc->dma;
list_add_tail(&dc->chan.device_node, &dc->chan.device->channels);
- dc->chan.cookie = dc->completed = 1;
+ dc->chan.cookie = dc->chan.completed_cookie = 1;
if (is_dmac64(dc))
dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch];
diff --git a/drivers/dma/txx9dmac.h b/drivers/dma/txx9dmac.h
index 365d423..f5a7605 100644
--- a/drivers/dma/txx9dmac.h
+++ b/drivers/dma/txx9dmac.h
@@ -172,7 +172,6 @@ struct txx9dmac_chan {
spinlock_t lock;
/* these other elements are all protected by lock */
- dma_cookie_t completed;
struct list_head active_list;
struct list_head queue;
struct list_head free_list;
diff --git a/include/linux/amba/pl08x.h b/include/linux/amba/pl08x.h
index 033f6aa..1bb134b 100644
--- a/include/linux/amba/pl08x.h
+++ b/include/linux/amba/pl08x.h
@@ -176,7 +176,6 @@ enum pl08x_dma_chan_state {
* @runtime_addr: address for RX/TX according to the runtime config
* @runtime_direction: current direction of this channel according to
* runtime config
- * @lc: last completed transaction on this channel
* @pend_list: queued transactions pending on this channel
* @at: active transaction on this channel
* @lock: a lock for this channel data
@@ -198,7 +197,6 @@ struct pl08x_dma_chan {
u32 src_cctl;
u32 dst_cctl;
enum dma_transfer_direction runtime_direction;
- dma_cookie_t lc;
struct list_head pend_list;
struct pl08x_txd *at;
spinlock_t lock;
diff --git a/include/linux/dmaengine.h b/include/linux/dmaengine.h
index 679b349..41d0f92 100644
--- a/include/linux/dmaengine.h
+++ b/include/linux/dmaengine.h
@@ -257,6 +257,7 @@ struct dma_chan_percpu {
* struct dma_chan - devices supply DMA channels, clients use them
* @device: ptr to the dma device who supplies this channel, always !%NULL
* @cookie: last cookie value returned to client
+ * @completed_cookie: last completed cookie for this channel
* @chan_id: channel ID for sysfs
* @dev: class device for sysfs
* @device_node: used to add this to the device chan list
@@ -268,6 +269,7 @@ struct dma_chan_percpu {
struct dma_chan {
struct dma_device *device;
dma_cookie_t cookie;
+ dma_cookie_t completed_cookie;
/* sysfs */
int chan_id;
--
1.7.4.4
^ permalink raw reply related
* [PATCH v2 0/9] DMA engine cookie handling cleanups
From: Russell King - ARM Linux @ 2012-03-06 22:33 UTC (permalink / raw)
To: Dan Williams, Vinod Koul
Cc: Viresh Kumar, Stephen Warren, Linus Walleij, Srinidhi Kasagar,
Barry Song, linuxppc-dev, linux-arm-kernel
[v2 - more or less same description. Including lakml in cc for the full
set]
This patch series cleans up the handling of cookies in DMA engine drivers.
This is done by providing a set of inline library functions for common
tasks:
- moving the 'last completed cookie' into struct dma_chan - everyone
has this in their driver private channel data structure
- consolidate allocation of cookies to DMA descriptors
- common way to update 'last completed cookie' value
- standard way to implement tx_status callback and update the residue
- consolidate initialization of cookies
- update implementations differing from the majority of DMA engine drivers
to behave the same as the majority implementation in respect of cookies
What this means is that we get to the point where all DMA engine drivers
will hand out cookie value '2' as the first, and incrementing cookie
values up to INT_MAX, returning to cookie '1' as the next cookie.
Think of this patch series as round 1... I am hoping over time that more
code can be consolidated between the DMA engine drivers and end up with a
consistent way to handle various common themes in DMA engine hardware
(like physical channel<->peripheral request signal selection.)
Overall, the diffstat looks like this:
arch/arm/include/asm/hardware/iop_adma.h | 2 -
drivers/dma/amba-pl08x.c | 38 ++++---------
drivers/dma/at_hdmac.c | 48 ++++------------
drivers/dma/at_hdmac_regs.h | 2 -
drivers/dma/coh901318.c | 39 +++----------
drivers/dma/dmaengine.h | 89 ++++++++++++++++++++++++++++++
drivers/dma/dw_dmac.c | 43 +++-----------
drivers/dma/dw_dmac_regs.h | 1 -
drivers/dma/ep93xx_dma.c | 25 ++------
drivers/dma/fsldma.c | 24 ++------
drivers/dma/fsldma.h | 1 -
drivers/dma/imx-dma.c | 32 ++---------
drivers/dma/imx-sdma.c | 23 ++------
drivers/dma/intel_mid_dma.c | 37 +++---------
drivers/dma/intel_mid_dma_regs.h | 2 -
drivers/dma/ioat/dma.c | 21 +++----
drivers/dma/ioat/dma.h | 23 --------
drivers/dma/ioat/dma_v2.c | 13 ++---
drivers/dma/ioat/dma_v3.c | 11 ++--
drivers/dma/iop-adma.c | 51 ++++-------------
drivers/dma/ipu/ipu_idmac.c | 22 ++-----
drivers/dma/mpc512x_dma.c | 25 +++------
drivers/dma/mv_xor.c | 34 ++---------
drivers/dma/mv_xor.h | 3 -
drivers/dma/mxs-dma.c | 23 ++------
drivers/dma/pch_dma.c | 34 ++---------
drivers/dma/pl330.c | 36 ++----------
drivers/dma/ppc4xx/adma.c | 49 +++-------------
drivers/dma/ppc4xx/adma.h | 2 -
drivers/dma/shdma.c | 30 +++-------
drivers/dma/shdma.h | 1 -
drivers/dma/sirf-dma.c | 23 ++------
drivers/dma/ste_dma40.c | 36 +++---------
drivers/dma/timb_dma.c | 28 +++-------
drivers/dma/txx9dmac.c | 41 +++-----------
drivers/dma/txx9dmac.h | 1 -
include/linux/amba/pl08x.h | 2 -
include/linux/dmaengine.h | 6 +-
38 files changed, 293 insertions(+), 628 deletions(-)
^ permalink raw reply
* Re: [PATCH v3 1/2] powerpc/44x: Add new compatible value for EMAC node of APM821XX dts file.
From: Josh Boyer @ 2012-03-06 22:15 UTC (permalink / raw)
To: David Miller; +Cc: dhdang, linux-kernel, paulus, netdev, sr, linuxppc-dev
In-Reply-To: <20120306.170819.2135873666210523674.davem@davemloft.net>
On Tue, Mar 6, 2012 at 5:08 PM, David Miller <davem@davemloft.net> wrote:
> From: Duc Dang <dhdang@apm.com>
> Date: Mon, =A05 Mar 2012 17:57:42 +0700
>
>> This compatible value will be used to distinguish some special features =
of APM821XX EMAC: no half duplex mode support, configuring jumbo frame.
>>
>> Signed-off-by: Duc Dang <dhdang@apm.com>
>
> Applied.
So I guess we're taking these through your tree? I guess that works out
well enough since the other patches I was going to send to Ben aren't
panning out anyway.
josh
^ permalink raw reply
* Re: [PATCH v3 2/2] powerpc/44x: Add more changes for APM821XX EMAC driver
From: David Miller @ 2012-03-06 22:08 UTC (permalink / raw)
To: dhdang; +Cc: linux-kernel, paulus, netdev, sr, linuxppc-dev
In-Reply-To: <1330945102-15802-1-git-send-email-dhdang@apm.com>
From: Duc Dang <dhdang@apm.com>
Date: Mon, 5 Mar 2012 17:58:22 +0700
> This patch includes:
>
> Configure EMAC PHY clock source (clock from PHY or internal clock).
>
> Do not advertise PHY half duplex capability as APM821XX EMAC does not support half duplex mode.
>
> Add changes to support configuring jumbo frame for APM821XX EMAC.
>
> Signed-off-by: Duc Dang <dhdang@apm.com>
Applied with coding style fixes.
^ permalink raw reply
* Re: [PATCH v3 1/2] powerpc/44x: Add new compatible value for EMAC node of APM821XX dts file.
From: David Miller @ 2012-03-06 22:08 UTC (permalink / raw)
To: dhdang; +Cc: linux-kernel, paulus, netdev, sr, linuxppc-dev
In-Reply-To: <1330945062-15760-1-git-send-email-dhdang@apm.com>
From: Duc Dang <dhdang@apm.com>
Date: Mon, 5 Mar 2012 17:57:42 +0700
> This compatible value will be used to distinguish some special features of APM821XX EMAC: no half duplex mode support, configuring jumbo frame.
>
> Signed-off-by: Duc Dang <dhdang@apm.com>
Applied.
^ permalink raw reply
* Re: [PATCH] powerpc/srio: Fix the compile errors when building with 64bit
From: Kumar Gala @ 2012-03-06 17:46 UTC (permalink / raw)
To: Liu Gang
Cc: r58472, Paul Gortmaker, linux-kernel, r61911, Alexandre.Bounine,
akpm, linuxppc-dev, Shaohui Xie
In-Reply-To: <1330957222.23420.136.camel@10.ap.freescale.net>
On Mar 5, 2012, at 8:20 AM, Liu Gang wrote:
> Hi, Kumar,
>=20
> On Fri, 2012-03-02 at 09:11 -0600, Kumar Gala wrote:
>>> diff --git a/arch/powerpc/sysdev/fsl_rmu.c =
b/arch/powerpc/sysdev/fsl_rmu.c
>>> index 1548578..468011e 100644
>>> --- a/arch/powerpc/sysdev/fsl_rmu.c
>>> +++ b/arch/powerpc/sysdev/fsl_rmu.c
>>> @@ -311,8 +311,8 @@ fsl_rio_dbell_handler(int irq, void =
*dev_instance)
>>>=20
>>> /* XXX Need to check/dispatch until queue empty */
>>> if (dsr & DOORBELL_DSR_DIQI) {
>>> - u32 dmsg =3D
>>> - (u32) fsl_dbell->dbell_ring.virt +
>>> + unsigned long dmsg =3D
>>> + (unsigned long) fsl_dbell->dbell_ring.virt +
>>> (in_be32(&fsl_dbell->dbell_regs->dqdpar) & =
0xfff);
How about a struct instead:
struct rmu_dmsg {
u16 dummy;
u16 tid;
u16 sid;
u16 info;
};
struct rmu_dmsg *dmsg =3D fsl_dbell->dbell_ring.virt + =
(in_be32(&fsl_dbell->dbell_regs->dqdpar) & 0xfff);
Than you can git rid of the DBELL_* macros.
- k
^ permalink raw reply
* Re: [PATCH] powerpc/dts: fix the compatible string of sec 4.0
From: Kim Phillips @ 2012-03-06 17:41 UTC (permalink / raw)
To: Shengzhou Liu; +Cc: linuxppc-dev, Liu Shuo
In-Reply-To: <1331018476-27798-1-git-send-email-Shengzhou.Liu@freescale.com>
On Tue, 6 Mar 2012 15:21:16 +0800
Shengzhou Liu <Shengzhou.Liu@freescale.com> wrote:
> From: Liu Shuo <shuo.liu@freescale.com>
>
> Fix the compatible string of sec 4.0 to match with CAMM driver according
> to the documentation file Documentation/devicetree/bindings/crypto/fsl-sec4.txt.
s/the documentation file//, since it's pretty obvious from the
pathname.
Also, if you wrap your commit text to 75 chars, then people won't
have to use the left- and right-arrow keys when browsing git log.
> +++ b/arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi
> @@ -33,32 +33,32 @@
> */
>
> crypto@30000 {
> - compatible = "fsl,sec4.4", "fsl,sec4.0";
> + compatible = "fsl,sec-v4.4", "fsl,sec-v4.0";
so I've tracked the original error down to v3.2-rc3-18-g5652520,
which means v3.2 was released with the error. Consequently, the
driver should also be updated to check for "fsl,sec-v4.0", and,
failing that, check for "fsl,sec4.0". The fix should also be sent
to stable@kernel.org [1].
Thanks,
Kim
[1] see Documentation/stable_kernel_rules.txt
^ permalink raw reply
* Re: [PATCH 1/9] pci_ids: Add device ID for IBM PCI-X bridge
From: Greg KH @ 2012-03-06 14:32 UTC (permalink / raw)
To: Zhao Chenhui; +Cc: linux-pci, linuxppc-dev
In-Reply-To: <1331024707-15891-1-git-send-email-chenhui.zhao@freescale.com>
On Tue, Mar 06, 2012 at 05:05:07PM +0800, Zhao Chenhui wrote:
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> ---
> include/linux/pci_ids.h | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
> index 31d77af..8f026c0 100644
> --- a/include/linux/pci_ids.h
> +++ b/include/linux/pci_ids.h
> @@ -484,6 +484,7 @@
> #define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM 0x0251
> #define PCI_DEVICE_ID_IBM_ICOM_V2_ONE_PORT_RVX_ONE_PORT_MDM_PCIE 0x0361
> #define PCI_DEVICE_ID_IBM_ICOM_FOUR_PORT_MODEL 0x252
> +#define PCI_DEVICE_ID_IBM_PCIX_BRIDGE 0x01a7
Did you read the comment at the top of this file?
^ permalink raw reply
* RE: [PATCH] powerpc/srio: Fix the relocation errors when building with 64bit
From: Bounine, Alexandre @ 2012-03-06 14:35 UTC (permalink / raw)
To: Liu Gang, linuxppc-dev@lists.ozlabs.org
Cc: r58472@freescale.com, linux-kernel@vger.kernel.org,
r61911@freescale.com, paul.gortmaker@windriver.com,
scottwood@freescale.com, akpm@linux-foundation.org
In-Reply-To: <1331002692-9061-1-git-send-email-Gang.Liu@freescale.com>
On Mon, March 05, 2012 9:58 PM, Liu Gang wrote:
> Subject: [PATCH] powerpc/srio: Fix the relocation errors when building
> with 64bit
>=20
> For the file "arch/powerpc/sysdev/fsl_rio.c", there will be some
> relocation errors while using the corenet64_smp_defconfig:
>=20
> WARNING: modpost: Found 6 section mismatch(es).
> To see full details build your kernel with:
> 'make CONFIG_DEBUG_SECTION_MISMATCH=3Dy'
> GEN .version
> CHK include/generated/compile.h
> UPD include/generated/compile.h
> CC init/version.o
> LD init/built-in.o
> LD .tmp_vmlinux1
> arch/powerpc/sysdev/built-in.o:(__ex_table+0x0):
> relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3208
> arch/powerpc/sysdev/built-in.o:(__ex_table+0x2):
> relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'
> arch/powerpc/sysdev/built-in.o:(__ex_table+0x4):
> relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3230
> arch/powerpc/sysdev/built-in.o:(__ex_table+0x6):
> relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+c
> arch/powerpc/sysdev/built-in.o:(__ex_table+0x8):
> relocation truncated to fit: R_PPC64_ADDR16 against `.text'+3250
> arch/powerpc/sysdev/built-in.o:(__ex_table+0xa):
> relocation truncated to fit: R_PPC64_ADDR16 against `.fixup'+18
>=20
> Rewrote the corresponding code with the support of 64bit building.
>=20
> Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_rio.c | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>=20
> diff --git a/arch/powerpc/sysdev/fsl_rio.c
> b/arch/powerpc/sysdev/fsl_rio.c index a4c4f4a..5b6f556 100644
> --- a/arch/powerpc/sysdev/fsl_rio.c
> +++ b/arch/powerpc/sysdev/fsl_rio.c
> @@ -66,8 +66,8 @@
> " li %0,%3\n" \
> " b 2b\n" \
> ".section __ex_table,\"a\"\n" \
> - " .align 2\n" \
> - " .long 1b,3b\n" \
> + PPC_LONG_ALIGN "\n" \
> + PPC_LONG "1b,3b\n" \
> ".text" \
> : "=3Dr" (err), "=3Dr" (x) \
> : "b" (addr), "i" (-EFAULT), "0" (err))
> --
> 1.7.0.4
>=20
Looks good to me. Ack-ed.
^ permalink raw reply
* Re: [PATCH V2 1/2] powerpc: Move GE GPIO and PIC drivers
From: Linus Walleij @ 2012-03-06 12:23 UTC (permalink / raw)
To: Kumar Gala
Cc: linus.walleij, Linux Kernel list, Martyn Welch, Wim Van Sebroeck,
linuxppc-dev@lists.ozlabs.org list
In-Reply-To: <C5C3845E-9732-4A9D-B1DC-84688E7D807F@kernel.crashing.org>
On Tue, Mar 6, 2012 at 1:19 PM, Kumar Gala <galak@kernel.crashing.org> wrot=
e:
> On Feb 28, 2012, at 4:22 AM, Martyn Welch wrote:
>
>> Move the GE GPIO and PIC drivers to allow these to be used by non-86xx
>> boards.
>
> gpio driver should be in drivers/gpio. =A0Please split that move out as a=
separate patch for Grant & Linus to review as part of the GPIO subsystem
Yes please. It will get a good home there, Grant knows everything about PPC=
...
Yours,
Linus Walleij
^ permalink raw reply
* Re: [PATCH V2 1/2] powerpc: Move GE GPIO and PIC drivers
From: Kumar Gala @ 2012-03-06 12:19 UTC (permalink / raw)
To: Martyn Welch
Cc: linus.walleij, Linux Kernel list, Wim Van Sebroeck,
linuxppc-dev@lists.ozlabs.org list
In-Reply-To: <1330424541-5299-2-git-send-email-martyn.welch@ge.com>
On Feb 28, 2012, at 4:22 AM, Martyn Welch wrote:
> Move the GE GPIO and PIC drivers to allow these to be used by non-86xx
> boards.
>=20
> Signed-off-by: Martyn Welch <martyn.welch@ge.com>
> ---
>=20
> v2: Move GPIO and PIC drivers to sysdev/ge/ rather than platforms/.
>=20
> arch/powerpc/platforms/86xx/Kconfig | 3 +++
> arch/powerpc/platforms/86xx/Makefile | 7 +++----
> arch/powerpc/platforms/86xx/gef_ppc9a.c | 2 +-
> arch/powerpc/platforms/86xx/gef_sbc310.c | 2 +-
> arch/powerpc/platforms/86xx/gef_sbc610.c | 2 +-
> arch/powerpc/sysdev/Kconfig | 7 +++++++
> arch/powerpc/sysdev/Makefile | 2 ++
> arch/powerpc/sysdev/ge/Makefile | 2 ++
> .../86xx/gef_gpio.c =3D> sysdev/ge/ge_gpio.c} | 2 +-
> .../86xx/gef_pic.c =3D> sysdev/ge/ge_pic.c} | 2 +-
> .../86xx/gef_pic.h =3D> sysdev/ge/ge_pic.h} | 0
> drivers/watchdog/Kconfig | 2 +-
> 12 files changed, 23 insertions(+), 10 deletions(-)
> create mode 100644 arch/powerpc/sysdev/ge/Makefile
> rename arch/powerpc/{platforms/86xx/gef_gpio.c =3D> =
sysdev/ge/ge_gpio.c} (98%)
> rename arch/powerpc/{platforms/86xx/gef_pic.c =3D> sysdev/ge/ge_pic.c} =
(99%)
> rename arch/powerpc/{platforms/86xx/gef_pic.h =3D> sysdev/ge/ge_pic.h} =
(100%)
gpio driver should be in drivers/gpio. Please split that move out as a =
separate patch for Grant & Linus to review as part of the GPIO subsystem
- k=
^ permalink raw reply
* Re: [PATCH 6/9] powerpc/mpc8548cds: Add FPGA node to dts
From: Kumar Gala @ 2012-03-06 12:16 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev@lists.ozlabs.org list, Zhao Chenhui
In-Reply-To: <1331024805-15926-5-git-send-email-chenhui.zhao@freescale.com>
On Mar 6, 2012, at 3:06 AM, Zhao Chenhui wrote:
> From: chenhui zhao <chenhui.zhao@freescale.com>
>=20
> Remove FPGA(CADMUS) macros in code. Move it to dts.
>=20
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
Timur,
Do you mind reviewing & ack'ing.
- k
> arch/powerpc/boot/dts/mpc8548cds.dts | 8 ++++-
> arch/powerpc/platforms/85xx/mpc85xx_cds.c | 50 =
+++++++++++++++++++---------
> 2 files changed, 41 insertions(+), 17 deletions(-)
>=20
> diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts =
b/arch/powerpc/boot/dts/mpc8548cds.dts
> index 8d4df8e..0683983 100644
> --- a/arch/powerpc/boot/dts/mpc8548cds.dts
> +++ b/arch/powerpc/boot/dts/mpc8548cds.dts
> @@ -35,7 +35,8 @@
> lbc: localbus@e0005000 {
> reg =3D <0 0xe0005000 0 0x1000>;
>=20
> - ranges =3D <0x0 0x0 0x0 0xff000000 0x01000000>;
> + ranges =3D <0x0 0x0 0x0 0xff000000 0x01000000
> + 0x1 0x0 0x0 0xf8004000 0x00001000>;
>=20
> nor@0,0 {
> #address-cells =3D <1>;
> @@ -72,6 +73,11 @@
> read-only;
> };
> };
> +
> + board-control@1,0 {
> + compatible =3D "fsl,mpc8548cds-fpga";
> + reg =3D <0x1 0x0 0x1000>;
> + };
> };
>=20
> soc: soc8548@e0000000 {
> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c =
b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
> index c009c5b..a600dd0 100644
> --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
> +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
> @@ -48,17 +48,24 @@
>=20
> #include "mpc85xx.h"
>=20
> -/* CADMUS info */
> -/* xxx - galak, move into device tree */
> -#define CADMUS_BASE (0xf8004000)
> -#define CADMUS_SIZE (256)
> -#define CM_VER (0)
> -#define CM_CSR (1)
> -#define CM_RST (2)
> -
> +/*
> + * The CDS board contains an FPGA/CPLD called "Cadmus", which =
collects
> + * various logic and performs system control functions.
> + * Here is the FPGA/CPLD register map.
> + */
> +struct cadmus_reg {
> + u8 cm_ver; /* Board version */
> + u8 cm_csr; /* General control/status */
> + u8 cm_rst; /* Reset control */
> + u8 cm_hsclk; /* High speed clock */
> + u8 cm_hsxclk; /* High speed clock extended */
> + u8 cm_led; /* LED data */
> + u8 cm_pci; /* PCI control/status */
> + u8 cm_dma; /* DMA control */
> + u8 res[248]; /* Total 256 bytes */
> +};
>=20
> -static int cds_pci_slot =3D 2;
> -static volatile u8 *cadmus;
> +static struct cadmus_reg *cadmus;
>=20
> #ifdef CONFIG_PCI
>=20
> @@ -274,20 +281,30 @@ machine_device_initcall(mpc85xx_cds, =
mpc85xx_cds_8259_attach);
> */
> static void __init mpc85xx_cds_setup_arch(void)
> {
> -#ifdef CONFIG_PCI
> struct device_node *np;
> -#endif
> + int cds_pci_slot;
>=20
> if (ppc_md.progress)
> ppc_md.progress("mpc85xx_cds_setup_arch()", 0);
>=20
> - cadmus =3D ioremap(CADMUS_BASE, CADMUS_SIZE);
> - cds_pci_slot =3D ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
> + np =3D of_find_compatible_node(NULL, NULL, =
"fsl,mpc8548cds-fpga");
> + if (!np) {
> + pr_err("Could not find FPGA node.\n");
> + return;
> + }
> +
> + cadmus =3D of_iomap(np, 0);
> + of_node_put(np);
> + if (!cadmus) {
> + pr_err("Fail to map FPGA area.\n");
> + return;
> + }
>=20
> if (ppc_md.progress) {
> char buf[40];
> + cds_pci_slot =3D ((in_8(&cadmus->cm_csr) >> 6) & 0x3) + =
1;
> snprintf(buf, 40, "CDS Version =3D 0x%x in slot %d\n",
> - cadmus[CM_VER], cds_pci_slot);
> + in_8(&cadmus->cm_ver), cds_pci_slot);
> ppc_md.progress(buf, 0);
> }
>=20
> @@ -317,7 +334,8 @@ static void mpc85xx_cds_show_cpuinfo(struct =
seq_file *m)
> svid =3D mfspr(SPRN_SVR);
>=20
> seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
> - seq_printf(m, "Machine\t\t: MPC85xx CDS (0x%x)\n", =
cadmus[CM_VER]);
> + seq_printf(m, "Machine\t\t: MPC85xx CDS (0x%x)\n",
> + in_8(&cadmus->cm_ver));
> seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
> seq_printf(m, "SVR\t\t: 0x%x\n", svid);
>=20
> --=20
> 1.6.4.1
>=20
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH 2/9] powerpc/mpc85xxcds: Fix PCI I/O space resource of PCI bridge
From: Kumar Gala @ 2012-03-06 12:15 UTC (permalink / raw)
To: Zhao Chenhui; +Cc: linuxppc-dev
In-Reply-To: <1331024805-15926-1-git-send-email-chenhui.zhao@freescale.com>
On Mar 6, 2012, at 3:06 AM, Zhao Chenhui wrote:
> From: chenhui zhao <chenhui.zhao@freescale.com>
>=20
> There is a PCI bridge(Tsi310) between the MPC8548 and a VIA
> southbridge chip.
>=20
> The bootloader sets the PCI bridge to open a window from 0x0000
> to 0x1fff on the PCI I/O space. But the kernel can't set the I/O
> resource. In the routine pci_read_bridge_io(), if the base which
> is read from PCI_IO_BASE is equal to zero, the routine don't set
> the I/O resource of the child bus.
>=20
> To allow the legacy I/O space on the VIA southbridge to be accessed,
> use the fixup to fix the PCI I/O space of the PCI bridge.
>=20
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/platforms/85xx/mpc85xx_cds.c | 29 =
+++++++++++++++++++++++++++--
> 1 files changed, 27 insertions(+), 2 deletions(-)
>=20
> diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c =
b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
> index 40f03da..c009c5b 100644
> --- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
> +++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
> @@ -3,7 +3,7 @@
> *
> * Maintained by Kumar Gala (see MAINTAINERS for contact information)
> *
> - * Copyright 2005 Freescale Semiconductor Inc.
> + * Copyright 2005, 2011-2012 Freescale Semiconductor Inc.
> *
> * This program is free software; you can redistribute it and/or =
modify it
> * under the terms of the GNU General Public License as published =
by the
> @@ -158,6 +158,31 @@ DECLARE_PCI_FIXUP_EARLY(0x1957, 0x3fff, =
skip_fake_bridge);
> DECLARE_PCI_FIXUP_EARLY(0x3fff, 0x1957, skip_fake_bridge);
> DECLARE_PCI_FIXUP_EARLY(0xff3f, 0x5719, skip_fake_bridge);
>=20
> +/*
> + * Fix Tsi310 PCI-X bridge resource.
> + * Force the bridge to open a window from 0x0000-0x1fff in PCI I/O =
space.
> + * This allows legacy I/O(i8259, etc) on the VIA southbridge to be =
accessed.
> + */
This comment and the code don't make sense. Why is the bridge described =
as Tsi310 in comments but the vendor ID is IBM ?
> +void mpc85xx_cds_fixup_bus(struct pci_bus *bus)
> +{
> + struct pci_dev *dev =3D bus->self;
> + struct resource *res =3D bus->resource[0];
> +
> + if (dev !=3D NULL &&
> + dev->vendor =3D=3D PCI_VENDOR_ID_IBM &&
> + dev->device =3D=3D PCI_DEVICE_ID_IBM_PCIX_BRIDGE) {
> + if (res) {
> + res->start =3D 0;
> + res->end =3D 0x1fff;
> + res->flags =3D IORESOURCE_IO;
> + pr_info("mpc85xx_cds: PCI bridge resource fixup =
applied\n");
> + pr_info("mpc85xx_cds: %pR\n", res);
> + }
> + }
> +
> + fsl_pcibios_fixup_bus(bus);
> +}
> +
> #ifdef CONFIG_PPC_I8259
> static void mpc85xx_8259_cascade_handler(unsigned int irq,
> struct irq_desc *desc)
> @@ -323,7 +348,7 @@ define_machine(mpc85xx_cds) {
> .get_irq =3D mpic_get_irq,
> #ifdef CONFIG_PCI
> .restart =3D mpc85xx_cds_restart,
> - .pcibios_fixup_bus =3D fsl_pcibios_fixup_bus,
> + .pcibios_fixup_bus =3D mpc85xx_cds_fixup_bus,
> #else
> .restart =3D fsl_rstcr_restart,
> #endif
> --=20
> 1.6.4.1
>=20
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Re: [PATCH 1/9] pci_ids: Add device ID for IBM PCI-X bridge
From: Kumar Gala @ 2012-03-06 12:14 UTC (permalink / raw)
To: Zhao Chenhui; +Cc: linux-pci, linuxppc-dev
In-Reply-To: <1331024707-15891-1-git-send-email-chenhui.zhao@freescale.com>
On Mar 6, 2012, at 3:05 AM, Zhao Chenhui wrote:
> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
> ---
> include/linux/pci_ids.h | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
Just merge this with the 2nd patch that actually uses the ID.
- k
^ permalink raw reply
* Re: [PATCH 2/4] fsl_pci: Add a workaround for PCI 5 errata in MPC8548
From: Kumar Gala @ 2012-03-06 12:13 UTC (permalink / raw)
To: Zhao Chenhui; +Cc: linuxppc-dev
In-Reply-To: <1331025056-15983-2-git-send-email-chenhui.zhao@freescale.com>
On Mar 6, 2012, at 3:10 AM, Zhao Chenhui wrote:
> + if ((fsl_svr_is(SVR_8548) || fsl_svr_is(SVR_8548_E)) &&
Should this also have 8547, 8547E, 8545, 8545E, 8543, & 8543E?
> + !early_find_capability(hose, 0, 0, PCI_CAP_ID_PCIX)) {
> + early_read_config_word(hose, 0, 0,
> + PCI_BUS_FUNCTION, &temp);
> + temp |= PCI_BUS_FUNCTION_MDS;
> + early_write_config_word(hose, 0, 0,
> + PCI_BUS_FUNCTION, temp);
> + }
> }
^ permalink raw reply
* Re: [PATCH] powerpc/dts: fix the compatible string of sec 4.0
From: Kumar Gala @ 2012-03-06 11:45 UTC (permalink / raw)
To: Shengzhou Liu; +Cc: linuxppc-dev@lists.ozlabs.org list, Liu Shuo
In-Reply-To: <1331018476-27798-1-git-send-email-Shengzhou.Liu@freescale.com>
On Mar 6, 2012, at 1:21 AM, Shengzhou Liu wrote:
> From: Liu Shuo <shuo.liu@freescale.com>
>=20
> Fix the compatible string of sec 4.0 to match with CAMM driver =
according
> to the documentation file =
Documentation/devicetree/bindings/crypto/fsl-sec4.txt.
>=20
> Signed-off-by: Liu Shuo <shuo.liu@freescale.com>
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> against master branch of =
git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6.git
>=20
> arch/powerpc/boot/dts/fsl/pq3-sec4.4-0.dtsi | 10 +++++-----
> 1 files changed, 5 insertions(+), 5 deletions(-)
Kim,
Please ack or nack this.
- k=
^ permalink raw reply
* RE: [PATCH 4/4] powerpc/mpc8548: Add workaround for erratum NMG_SRIO135
From: David Laight @ 2012-03-06 9:56 UTC (permalink / raw)
To: Zhao Chenhui, linuxppc-dev
In-Reply-To: <1331025056-15983-4-git-send-email-chenhui.zhao@freescale.com>
=20
> Issue:
> Applications using lwarx/stwcx instructions in the core to
> compete for a software lock or semaphore with a device on
> RapidIO using read atomic set, clr, inc, or dec in a similar
> manner may falsely result in both masters seeing the lock
> as "available". This could result in data corruption as
> both masters try to modify the same piece of data protected
> by the lock.
>=20
> Workaround:
> Set bits 13 and 29 of CCSR offset 0x01010 (EEBPCR register
> of the ECM) during initialization and leave them set
> indefinitely. This may slightly degrade overall system
> performance.
Might be worth actually saying what these bits do, and
why/when overall performance is affected.
Is the problem trying to do locked read-write cycles
on a slow peripheral bus?
Might be a case for just 'not doing that'.
David
^ permalink raw reply
* [PATCH] spufs raises two exceptions
From: masterzorag @ 2012-03-06 9:26 UTC (permalink / raw)
To: linuxppc-dev
I'm running my test program, it uses all available spus to compute via
OpenCL
kernel 3.2.5 on a ps3
even on testing spu directly, it crashes
=====================================
[ BUG: bad unlock balance detected! ]
-------------------------------------
test/1067 is trying to release lock (&sb->s_type->i_mutex_key) at:
[<d0000000005828a8>] .do_spu_create+0x90/0xd8 [spufs]
but there are no more locks to release!
other info that might help us debug this:
no locks held by test/1067.
stack backtrace:
Call Trace:
[c00000000e9bfa30] [c0000000000110d0] .show_stack+0x6c/0x16c (unreliable)
[c00000000e9bfae0] [c000000000081f90] .print_unlock_inbalance_bug+0xe8/0x110
[c00000000e9bfb70] [c0000000000868cc] .lock_release+0xd8/0x200
[c00000000e9bfc10] [c0000000003efb60] .__mutex_unlock_slowpath+0x11c/0x1d8
[c00000000e9bfcb0] [d0000000005828a8] .do_spu_create+0x90/0xd8 [spufs]
[c00000000e9bfd70] [c0000000000346ac] .sys_spu_create+0x164/0x1c0
[c00000000e9bfe30] [c0000000000097d8] syscall_exit+0x0/0x40
------------[ cut here ]------------
kernel BUG at fs/dcache.c:474!
Oops: Exception in kernel mode, sig: 5 [#1]
SMP NR_CPUS=2 NUMA PS3
Modules linked in: spufs dm_mod btusb bluetooth usb_storage ohci_hcd
snd_ps3 ehci_hcd snd_pcm snd_page_alloc snd_timer sg snd usbcore
usb_common ps3flash rtc_ps3 soundcore ps3_lpm ps3vram [last unloaded:
scsi_wait_scan]
NIP: c000000000109f94 LR: c000000000109f84 CTR: c0000000000a029c
REGS: c00000000e9bf930 TRAP: 0700 Not tainted (3.2.5)
MSR: 8000000000028032 <EE,CE,IR,DR> CR: 22004822 XER: 00000000
TASK = c0000000062f0ec0[1067] 'test' THREAD: c00000000e9bc000 CPU: 1
GPR00: 0000000000000001 c00000000e9bfbb0 c0000000006812e8 c00000000543b798
GPR04: 0000000000000000 0000000000000000 0000000000000000 0000000000000002
GPR08: 0000000000000000 0000000000000000 c000000000109f84 c0000000062f0ec0
GPR12: 0000000082004824 c000000007ffe280 0000000000000004 00000000f7850688
GPR16: 00000000f7830734 00000000f78517a4 00000000f7852008 00000000f78517a8
GPR20: 00000000ff805dc0 000000000fd958a0 0000000000000000 000000000000000d
GPR24: 000000000fd98240 c00000000e101e10 0000000040000010 c00000000616e080
GPR28: c00000000543b738 c00000000543b798 c0000000006149e8 c00000000543b738
NIP [c000000000109f94] .dput+0x48/0x214
LR [c000000000109f84] .dput+0x38/0x214
Call Trace:
[c00000000e9bfbb0] [c000000000109f84] .dput+0x38/0x214 (unreliable)
[c00000000e9bfc50] [c0000000000f1740] .fput+0x24c/0x288
[c00000000e9bfd00] [c0000000000ed708] .filp_close+0xbc/0xe4
[c00000000e9bfd90] [c0000000000ed800] .SyS_close+0xd0/0x128
[c00000000e9bfe30] [c0000000000097d8] syscall_exit+0x0/0x40
Instruction dump:
fb61ffd8 fb81ffe0 fba1ffe8 f821ff61 418201c8 3bbf0060 7fa3eb78 482e7f31
60000000 813f0058 7d200074 7800d182 <0b000000> 2b890001 409d0010 3809ffff
---[ end trace c337aad05d94532f ]---
------------[ cut here ]------------
kernel BUG at fs/dcache.c:474!
Oops: Exception in kernel mode, sig: 5 [#2]
SMP NR_CPUS=2 NUMA PS3
Modules linked in: spufs dm_mod btusb bluetooth usb_storage ohci_hcd
snd_ps3 ehci_hcd snd_pcm snd_page_alloc snd_timer sg snd usbcore
usb_common ps3flash rtc_ps3 soundcore ps3_lpm ps3vram [last unloaded:
scsi_wait_scan]
NIP: c000000000109f94 LR: c000000000109f84 CTR: c0000000000a029c
REGS: c00000000e9bec20 TRAP: 0700 Tainted: G D (3.2.5)
MSR: 8000000000028032 <EE,CE,IR,DR> CR: 22004822 XER: 00000000
TASK = c0000000062f0ec0[1067] 'test' THREAD: c00000000e9bc000 CPU: 1
GPR00: 0000000000000001 c00000000e9beea0 c0000000006812e8 c0000000054361c8
GPR04: 0000000000000000 0000000000000000 0000000000000000 0000000000000002
GPR08: 0000000000000000 0000000000000000 c000000000109f84 c0000000062f0ec0
GPR12: 0000000042004824 c000000007ffe280 0000000000000004 00000000f7850688
GPR16: 00000000f7830734 00000000f78517a4 00000000f7852008 00000000f78517a8
GPR20: 00000000ff805dc0 000000000fd958a0 0000000000000000 0000000000000001
GPR24: 000000000fd98240 c00000000e9b2390 0000000000000008 c0000000062bd010
GPR28: c000000005436168 c0000000054361c8 c0000000006149e8 c000000005436168
NIP [c000000000109f94] .dput+0x48/0x214
LR [c000000000109f84] .dput+0x38/0x214
Call Trace:
[c00000000e9beea0] [c000000000109f84] .dput+0x38/0x214 (unreliable)
[c00000000e9bef40] [c0000000000f1740] .fput+0x24c/0x288
[c00000000e9beff0] [c0000000000c93a8] .remove_vma+0x68/0xcc
[c00000000e9bf080] [c0000000000c951c] .exit_mmap+0x110/0x14c
[c00000000e9bf1a0] [c00000000004b4c8] .mmput+0x5c/0x13c
[c00000000e9bf230] [d00000000058237c] .spu_forget+0x54/0x7c [spufs]
[c00000000e9bf2c0] [d00000000057c294] .spufs_dir_close+0x8c/0xc8 [spufs]
[c00000000e9bf370] [c0000000000f166c] .fput+0x178/0x288
[c00000000e9bf420] [c0000000000ed708] .filp_close+0xbc/0xe4
[c00000000e9bf4b0] [c000000000050294] .put_files_struct+0xf4/0x1b8
[c00000000e9bf560] [c0000000000520bc] .do_exit+0x23c/0x6f4
[c00000000e9bf660] [c00000000001922c] .die+0x274/0x2a4
[c00000000e9bf700] [c000000000019640] ._exception+0x88/0x17c
[c00000000e9bf8c0] [c000000000005314] program_check_common+0x114/0x180
--- Exception: 700 at .dput+0x48/0x214
LR = .dput+0x38/0x214
[c00000000e9bfc50] [c0000000000f1740] .fput+0x24c/0x288
[c00000000e9bfd00] [c0000000000ed708] .filp_close+0xbc/0xe4
[c00000000e9bfd90] [c0000000000ed800] .SyS_close+0xd0/0x128
[c00000000e9bfe30] [c0000000000097d8] syscall_exit+0x0/0x40
Instruction dump:
fb61ffd8 fb81ffe0 fba1ffe8 f821ff61 418201c8 3bbf0060 7fa3eb78 482e7f31
60000000 813f0058 7d200074 7800d182 <0b000000> 2b890001 409d0010 3809ffff
---[ end trace c337aad05d945330 ]---
Fixing recursive fault but reboot is needed!
First time, the mutex gets unlocked in spufs_create_context, then the
second time in do_spu_create.
It seems that SPU main directory dentry has invalid d_count.
This patch fixes all, OpenCL is running fine, testing spe runs without
issues.
--- arch/powerpc/platforms/cell/spufs/syscalls.c
+++ arch/powerpc/platforms/cell/spufs/syscalls.c.new
@@ -70,8 +70,8 @@
ret = PTR_ERR(dentry);
if (!IS_ERR(dentry)) {
ret = spufs_create(&path, dentry, flags, mode, neighbor);
- mutex_unlock(&path.dentry->d_inode->i_mutex);
- dput(dentry);
+ if (ret < 0)
+ dput(dentry);
path_put(&path);
}
^ permalink raw reply
* [PATCH 4/4] powerpc/mpc8548: Add workaround for erratum NMG_SRIO135
From: Zhao Chenhui @ 2012-03-06 9:10 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331025056-15983-1-git-send-email-chenhui.zhao@freescale.com>
From: chenhui zhao <chenhui.zhao@freescale.com>
Issue:
Applications using lwarx/stwcx instructions in the core to
compete for a software lock or semaphore with a device on
RapidIO using read atomic set, clr, inc, or dec in a similar
manner may falsely result in both masters seeing the lock
as "available". This could result in data corruption as
both masters try to modify the same piece of data protected
by the lock.
Workaround:
Set bits 13 and 29 of CCSR offset 0x01010 (EEBPCR register
of the ECM) during initialization and leave them set
indefinitely. This may slightly degrade overall system
performance.
Refer to SRIO39 in MPC8548 errata document.
Signed-off-by: Gong Chen <g.chen@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/fsl_rio.c | 44 +++++++++++++++++++++++++++++++++++++++++
1 files changed, 44 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index a4c4f4a..78a0c3d 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -35,6 +35,8 @@
#include <linux/io.h>
#include <linux/uaccess.h>
#include <asm/machdep.h>
+#include <asm/mpc85xx.h>
+#include <sysdev/fsl_soc.h>
#include "fsl_rio.h"
@@ -321,6 +323,37 @@ static inline void fsl_rio_info(struct device *dev, u32 ccsr)
}
}
+#define CCSR_ECM_EEBPCR_OFF 0x10
+/*
+ * fixup_erratum_srio135 - Fix Serial RapidIO atomic operation erratum
+ */
+static int fixup_erratum_srio135(struct device *dev)
+{
+ struct device_node *np;
+ void __iomem *ecm;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,mpc8548-ecm");
+ if (!np) {
+ dev_err(dev, "no ECM node found.\n");
+ return -ENODEV;
+ }
+
+ ecm = of_iomap(np, 0);
+ of_node_put(np);
+ if (!ecm) {
+ dev_err(dev, "failed to map ECM register base.\n");
+ return -ENODEV;
+ }
+ /*
+ * Set bits 13 and 29 of the EEBPCR register in the ECM
+ * during initialization and leave them set indefinitely.
+ */
+ setbits32(ecm + CCSR_ECM_EEBPCR_OFF, 0x00040004);
+ iounmap(ecm);
+
+ return 0;
+}
+
/**
* fsl_rio_setup - Setup Freescale PowerPC RapidIO interface
* @dev: platform_device pointer
@@ -358,6 +391,17 @@ int fsl_rio_setup(struct platform_device *dev)
dev->dev.of_node->full_name);
return -EFAULT;
}
+
+ /* Fix erratum NMG_SRIO135 */
+ if (fsl_svr_is(SVR_8548) || fsl_svr_is(SVR_8548_E)) {
+ rc = fixup_erratum_srio135(&dev->dev);
+ if (rc) {
+ dev_err(&dev->dev,
+ "Failed to fix the erratum NMG_SRIO135.");
+ return rc;
+ }
+ }
+
dev_info(&dev->dev, "Of-device full name %s\n",
dev->dev.of_node->full_name);
dev_info(&dev->dev, "Regs: %pR\n", ®s);
--
1.6.4.1
^ permalink raw reply related
* [PATCH 3/4] fsl_pci: Add a workaround for PCI 6 errata in MPC8548
From: Zhao Chenhui @ 2012-03-06 9:10 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331025056-15983-1-git-send-email-chenhui.zhao@freescale.com>
From: chenhui zhao <chenhui.zhao@freescale.com>
Issue:
The register bits ERR_DR[OWMSV] and ERR_DR[ORMSV] can erroneously set and
may trigger an interrupt if capturing and reporting of these events are enabled.
Workaround:
Disable OWMSV, ORMSV error capture and disable OWMSV, ORMSV error reporting.
Do not affect the functionality of the controller when the checking is disabled.
Refer to PCI 6 in MPC8548 errata document.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/fsl_pci.c | 16 ++++++++++++
arch/powerpc/sysdev/fsl_pci.h | 53 ++++++++++++++++++++++++++++++++++-------
2 files changed, 60 insertions(+), 9 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 9bdee6d..43aafc3 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -156,6 +156,22 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
return;
}
+ /*
+ * PCI/PCI-X erroneous error detection
+ * Fix erratum PCI 6 on MPC8548
+ */
+#define OWMSV 0x10
+#define ORMSV 0x08
+ if ((fsl_svr_is(SVR_8548) || fsl_svr_is(SVR_8548_E))
+ && fsl_svr_older_than(2, 1)) {
+ if (of_device_is_compatible(hose->dn, "fsl,mpc8540-pci")) {
+ /* disable OWMSV and ORMSV error capture */
+ setbits32(&pci->pcier.pecdr, OWMSV | ORMSV);
+ /* disable OWMSV and ORMSV error reporting */
+ clrbits32(&pci->pcier.peer, OWMSV | ORMSV);
+ }
+ }
+
/* Disable all windows (except powar0 since it's ignored) */
for(i = 1; i < 5; i++)
out_be32(&pci->pow[i].powar, 0);
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index a39ed5c..f09a78d 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -43,6 +43,45 @@ struct pci_inbound_window_regs {
u8 res2[12];
};
+/* PCI Error Management Registers */
+struct pci_err_regs {
+ /* 0x.e00 - PCI Error Detect Register */
+ __be32 pedr;
+ /* 0x.e04 - PCI Error Capture Disable Register */
+ __be32 pecdr;
+ /* 0x.e08 - PCI Error Interrupt Enable Register */
+ __be32 peer;
+ /* 0x.e0c - PCI Error Attributes Capture Register */
+ __be32 peattrcr;
+ /* 0x.e10 - PCI Error Address Capture Register */
+ __be32 peaddrcr;
+ /* 0x.e14 - PCI Error Extended Address Capture Register */
+ __be32 peextaddrcr;
+ /* 0x.e18 - PCI Error Data Low Capture Register */
+ __be32 pedlcr;
+ /* 0x.e1c - PCI Error Data High Capture Register */
+ __be32 pedhcr;
+ /* 0x.e20 - PCI Gasket Timer Register */
+ __be32 gas_timr;
+ u8 res21[4];
+};
+
+/* PCI Express Error Management Registers */
+struct pcie_err_regs {
+ /* 0x.e00 - PCI/PCIE error detect register */
+ __be32 pex_err_dr;
+ u8 res21[4];
+ /* 0x.e08 - PCI/PCIE error interrupt enable register */
+ __be32 pex_err_en;
+ u8 res22[4];
+ /* 0x.e10 - PCI/PCIE error disable register */
+ __be32 pex_err_disr;
+ u8 res23[12];
+ /* 0x.e20 - PCI/PCIE error capture status register */
+ __be32 pex_err_cap_stat;
+ u8 res24[4];
+};
+
/* PCI/PCI Express IO block registers for 85xx/86xx */
struct ccsr_pci {
__be32 config_addr; /* 0x.000 - PCI/PCIE Configuration Address Register */
@@ -73,15 +112,11 @@ struct ccsr_pci {
* define an inbound window base extended address register.
*/
struct pci_inbound_window_regs piw[4];
-
- __be32 pex_err_dr; /* 0x.e00 - PCI/PCIE error detect register */
- u8 res21[4];
- __be32 pex_err_en; /* 0x.e08 - PCI/PCIE error interrupt enable register */
- u8 res22[4];
- __be32 pex_err_disr; /* 0x.e10 - PCI/PCIE error disable register */
- u8 res23[12];
- __be32 pex_err_cap_stat; /* 0x.e20 - PCI/PCIE error capture status register */
- u8 res24[4];
+/* PCI/PCI Express Error Management Registers */
+ union {
+ struct pci_err_regs pcier;
+ struct pcie_err_regs pexer;
+ };
__be32 pex_err_cap_r0; /* 0x.e28 - PCIE error capture register 0 */
__be32 pex_err_cap_r1; /* 0x.e2c - PCIE error capture register 0 */
__be32 pex_err_cap_r2; /* 0x.e30 - PCIE error capture register 0 */
--
1.6.4.1
^ permalink raw reply related
* [PATCH 2/4] fsl_pci: Add a workaround for PCI 5 errata in MPC8548
From: Zhao Chenhui @ 2012-03-06 9:10 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331025056-15983-1-git-send-email-chenhui.zhao@freescale.com>
From: chenhui zhao <chenhui.zhao@freescale.com>
Issue:
As a master, the PCI IP block can combine a memory write to the last PCI double
word (4 bytes) of a cacheline with a 4 byte memory write to the first PCI double
word of the subsequent cacheline. This affects 32-bit PCI target devices that
blindly assert STOP on memory-write transactions, without detecting that the
data beat being transferred is the last data beat of the transaction. It can
cause a hang. PCI-X operation is not affected by this erratum.
Workaround:
Setting the bit MDS in the PCI Bus Function Register will disable the combining
of crossing cacheline boundary requests into one burst transaction. Therefore,
it can prevent the errata scenario from occurring.
Refer to PCI 5 in MPC8548 errata document.
Signed-off-by: Gong Chen <g.chen@freescale.com>
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/fsl_pci.c | 20 ++++++++++++++++++++
1 files changed, 20 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 6073288..9bdee6d 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -31,6 +31,7 @@
#include <asm/prom.h>
#include <asm/pci-bridge.h>
#include <asm/machdep.h>
+#include <asm/mpc85xx.h>
#include <sysdev/fsl_soc.h>
#include <sysdev/fsl_pci.h>
@@ -426,6 +427,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
struct resource rsrc;
const int *bus_range;
u8 progif;
+ u16 temp;
if (!of_device_is_available(dev)) {
pr_warning("%s: disabled\n", dev->full_name);
@@ -476,6 +478,24 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS;
if (fsl_pcie_check_link(hose))
hose->indirect_type |= PPC_INDIRECT_TYPE_NO_PCIE_LINK;
+ } else {
+ /*
+ * Set PBFR(PCI Bus Function Register)[10] = 1 to
+ * disable the combining of crossing cacheline
+ * boundary requests into one burst transaction.
+ * PCI-X operation is not affected.
+ * Fix erratum PCI 5 on MPC8548
+ */
+#define PCI_BUS_FUNCTION 0x44
+#define PCI_BUS_FUNCTION_MDS 0x400 /* Master disable streaming */
+ if ((fsl_svr_is(SVR_8548) || fsl_svr_is(SVR_8548_E)) &&
+ !early_find_capability(hose, 0, 0, PCI_CAP_ID_PCIX)) {
+ early_read_config_word(hose, 0, 0,
+ PCI_BUS_FUNCTION, &temp);
+ temp |= PCI_BUS_FUNCTION_MDS;
+ early_write_config_word(hose, 0, 0,
+ PCI_BUS_FUNCTION, temp);
+ }
}
printk(KERN_INFO "Found FSL PCI host bridge at 0x%016llx. "
--
1.6.4.1
^ permalink raw reply related
* [PATCH 1/4] powerpc/85xx: Add a head file for cpu type detection
From: Zhao Chenhui @ 2012-03-06 9:10 UTC (permalink / raw)
To: linuxppc-dev
From: chenhui zhao <chenhui.zhao@freescale.com>
The workarounds need to detect the cpu type. Add these macros
and inline routines to help cpu type detection in runtime.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/include/asm/mpc85xx.h | 72 ++++++++++++++++++++++++++++++++++++
1 files changed, 72 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/include/asm/mpc85xx.h
diff --git a/arch/powerpc/include/asm/mpc85xx.h b/arch/powerpc/include/asm/mpc85xx.h
new file mode 100644
index 0000000..451777c
--- /dev/null
+++ b/arch/powerpc/include/asm/mpc85xx.h
@@ -0,0 +1,72 @@
+/*
+ * MPC85xx cpu type detection
+ *
+ * Copyright 2011-2012 Freescale Semiconductor, Inc.
+ *
+ * This is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#ifndef __ASM_PPC_CPU_H
+#define __ASM_PPC_CPU_H
+
+#define SVR_REV(svr) ((svr) & 0xFF) /* SOC design resision */
+#define SVR_MAJ(svr) (((svr) >> 4) & 0xF) /* Major revision field*/
+#define SVR_MIN(svr) (((svr) >> 0) & 0xF) /* Minor revision field*/
+
+/* Some parts define SVR[0:23] as the SOC version */
+#define SVR_SOC_VER(svr) (((svr) >> 8) & 0xFFFFFF) /* SOC Version fields */
+
+#define IS_SVR_REV(svr, maj, min) \
+ ((SVR_MAJ(svr) == (maj)) && (SVR_MIN(svr) == (min)))
+
+#define SVR_8533 0x803400
+#define SVR_8533_E 0x803C00
+#define SVR_8535 0x803701
+#define SVR_8535_E 0x803F01
+#define SVR_8536 0x803700
+#define SVR_8536_E 0x803F00
+#define SVR_8540 0x803000
+#define SVR_8541 0x807200
+#define SVR_8541_E 0x807A00
+#define SVR_8543 0x803200
+#define SVR_8543_E 0x803A00
+#define SVR_8544 0x803401
+#define SVR_8544_E 0x803C01
+#define SVR_8545 0x803102
+#define SVR_8545_E 0x803902
+#define SVR_8547_E 0x803901
+#define SVR_8548 0x803100
+#define SVR_8548_E 0x803900
+#define SVR_8555 0x807100
+#define SVR_8555_E 0x807900
+#define SVR_8560 0x807000
+#define SVR_8567 0x807501
+#define SVR_8567_E 0x807D01
+#define SVR_8568 0x807500
+#define SVR_8568_E 0x807D00
+#define SVR_8569 0x808000
+#define SVR_8569_E 0x808800
+#define SVR_8572 0x80E000
+#define SVR_8572_E 0x80E800
+
+
+static inline int fsl_svr_is(u32 svr)
+{
+ u32 id = SVR_SOC_VER(mfspr(SPRN_SVR));
+
+ return (id == svr);
+}
+
+/* Return true if current SOC revision is prior to (maj, min) */
+static inline int fsl_svr_older_than(u8 maj, u8 min)
+{
+ u32 rev = SVR_REV(mfspr(SPRN_SVR));
+ u32 cmp = (maj << 4) | min;
+
+ return (rev < cmp);
+}
+
+#endif
--
1.6.4.1
^ permalink raw reply related
* [PATCH 9/9] powerpc/mpc8548cds: add 36-bit dts
From: Zhao Chenhui @ 2012-03-06 9:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331024805-15926-1-git-send-email-chenhui.zhao@freescale.com>
Create mpc8548cds_36b.dts. Support 36-bit mode.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/boot/dts/mpc8548cds_36b.dts | 86 ++++++++++++++++++++++++++++++
1 files changed, 86 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/mpc8548cds_36b.dts
diff --git a/arch/powerpc/boot/dts/mpc8548cds_36b.dts b/arch/powerpc/boot/dts/mpc8548cds_36b.dts
new file mode 100644
index 0000000..10e551b
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8548cds_36b.dts
@@ -0,0 +1,86 @@
+/*
+ * MPC8548 CDS Device Tree Source (36-bit address map)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/mpc8548si-pre.dtsi"
+
+/ {
+ model = "MPC8548CDS";
+ compatible = "MPC8548CDS", "MPC85xxCDS";
+
+ memory {
+ device_type = "memory";
+ reg = <0 0 0x0 0x8000000>; // 128M at 0x0
+ };
+
+ board_lbc: lbc: localbus@fe0005000 {
+ reg = <0xf 0xe0005000 0 0x1000>;
+
+ ranges = <0x0 0x0 0xf 0xff000000 0x01000000
+ 0x1 0x0 0xf 0xf8004000 0x00001000>;
+
+ };
+
+ board_soc: soc: soc8548@fe0000000 {
+ ranges = <0 0xf 0xe0000000 0x100000>;
+ };
+
+ board_pci0: pci0: pci@fe0008000 {
+ reg = <0xf 0xe0008000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x10000000
+ 0x1000000 0x0 0x00000000 0xf 0xe2000000 0x0 0x800000>;
+ clock-frequency = <66666666>;
+ };
+
+ pci1: pci@fe0009000 {
+ reg = <0xf 0xe0009000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x10000000 0x0 0x10000000
+ 0x1000000 0x0 0x00000000 0xf 0xe2800000 0x0 0x800000>;
+ clock-frequency = <66666666>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x15 */
+ 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
+ 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
+ };
+
+ pci2: pcie@fe000a000 {
+ reg = <0xf 0xe000a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0xf 0xe3000000 0x0 0x100000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ rio: rapidio@fe00c0000 {
+ reg = <0xf 0xe00c0000 0x0 0x20000>;
+ port1 {
+ ranges = <0x0 0x0 0xc 0x40000000 0x0 0x20000000>;
+ };
+ };
+};
+
+/*
+ * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
+ * for interrupt-map & interrupt-map-mask.
+ */
+
+/include/ "fsl/mpc8548si-post.dtsi"
+/include/ "mpc8548cds.dtsi"
--
1.6.4.1
^ permalink raw reply related
* [PATCH 8/9] powerpc/mpc8548cds: rename mpc8548cds.dts to mpc8548cds_32b.dts and create mpc8548cds.dtsi
From: Zhao Chenhui @ 2012-03-06 9:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331024805-15926-1-git-send-email-chenhui.zhao@freescale.com>
* Create mpc8548cds.dtsi.
* Move lbc, soc and pci0 nodes to mpc8548cds_32b.dtsi.
* Change cuImage.mpc8548cds to cuImage.mpc8548cds_32b.
* Rename mpc8548cds.dts to mpc8548cds_32b.dts.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Timur Tabi <timur@freescale.com>
---
arch/powerpc/boot/Makefile | 2 +-
arch/powerpc/boot/dts/mpc8548cds.dts | 357 ------------------------------
arch/powerpc/boot/dts/mpc8548cds.dtsi | 306 +++++++++++++++++++++++++
arch/powerpc/boot/dts/mpc8548cds_32b.dts | 86 +++++++
4 files changed, 393 insertions(+), 358 deletions(-)
delete mode 100644 arch/powerpc/boot/dts/mpc8548cds.dts
create mode 100644 arch/powerpc/boot/dts/mpc8548cds.dtsi
create mode 100644 arch/powerpc/boot/dts/mpc8548cds_32b.dts
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 8844a17..f6622e0 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -247,7 +247,7 @@ image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot
image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads
image-$(CONFIG_MPC8560_ADS) += cuImage.mpc8560ads
image-$(CONFIG_MPC85xx_CDS) += cuImage.mpc8541cds \
- cuImage.mpc8548cds \
+ cuImage.mpc8548cds_32b \
cuImage.mpc8555cds
image-$(CONFIG_MPC85xx_MDS) += cuImage.mpc8568mds
image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
deleted file mode 100644
index 0683983..0000000
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ /dev/null
@@ -1,357 +0,0 @@
-/*
- * MPC8548 CDS Device Tree Source
- *
- * Copyright 2006, 2008, 2011 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- */
-
-/include/ "fsl/mpc8548si-pre.dtsi"
-
-/ {
- model = "MPC8548CDS";
- compatible = "MPC8548CDS", "MPC85xxCDS";
-
- aliases {
- ethernet0 = &enet0;
- ethernet1 = &enet1;
- ethernet2 = &enet2;
- ethernet3 = &enet3;
- serial0 = &serial0;
- serial1 = &serial1;
- pci0 = &pci0;
- pci1 = &pci1;
- pci2 = &pci2;
- };
-
- memory {
- device_type = "memory";
- reg = <0 0 0x0 0x8000000>; // 128M at 0x0
- };
-
- lbc: localbus@e0005000 {
- reg = <0 0xe0005000 0 0x1000>;
-
- ranges = <0x0 0x0 0x0 0xff000000 0x01000000
- 0x1 0x0 0x0 0xf8004000 0x00001000>;
-
- nor@0,0 {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "cfi-flash";
- reg = <0x0 0x0 0x01000000>;
- bank-width = <2>;
- device-width = <2>;
-
- partition@0 {
- reg = <0x0 0x0b00000>;
- label = "ramdisk-nor";
- };
-
- partition@300000 {
- reg = <0x0b00000 0x0400000>;
- label = "kernel-nor";
- };
-
- partition@700000 {
- reg = <0x0f00000 0x060000>;
- label = "dtb-nor";
- };
-
- partition@760000 {
- reg = <0x0f60000 0x020000>;
- label = "env-nor";
- read-only;
- };
-
- partition@780000 {
- reg = <0x0f80000 0x080000>;
- label = "u-boot-nor";
- read-only;
- };
- };
-
- board-control@1,0 {
- compatible = "fsl,mpc8548cds-fpga";
- reg = <0x1 0x0 0x1000>;
- };
- };
-
- soc: soc8548@e0000000 {
- ranges = <0 0x0 0xe0000000 0x100000>;
-
- i2c@3000 {
- eeprom@50 {
- compatible = "atmel,24c64";
- reg = <0x50>;
- };
-
- eeprom@56 {
- compatible = "atmel,24c64";
- reg = <0x56>;
- };
-
- eeprom@57 {
- compatible = "atmel,24c64";
- reg = <0x57>;
- };
- };
-
- i2c@3100 {
- eeprom@50 {
- compatible = "atmel,24c64";
- reg = <0x50>;
- };
- };
-
- enet0: ethernet@24000 {
- tbi-handle = <&tbi0>;
- phy-handle = <&phy0>;
- };
-
- mdio@24520 {
- phy0: ethernet-phy@0 {
- interrupts = <5 1 0 0>;
- reg = <0x0>;
- device_type = "ethernet-phy";
- };
- phy1: ethernet-phy@1 {
- interrupts = <5 1 0 0>;
- reg = <0x1>;
- device_type = "ethernet-phy";
- };
- phy2: ethernet-phy@2 {
- interrupts = <5 1 0 0>;
- reg = <0x2>;
- device_type = "ethernet-phy";
- };
- phy3: ethernet-phy@3 {
- interrupts = <5 1 0 0>;
- reg = <0x3>;
- device_type = "ethernet-phy";
- };
- tbi0: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- enet1: ethernet@25000 {
- tbi-handle = <&tbi1>;
- phy-handle = <&phy1>;
- };
-
- mdio@25520 {
- tbi1: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- enet2: ethernet@26000 {
- tbi-handle = <&tbi2>;
- phy-handle = <&phy2>;
- };
-
- mdio@26520 {
- tbi2: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
-
- enet3: ethernet@27000 {
- tbi-handle = <&tbi3>;
- phy-handle = <&phy3>;
- };
-
- mdio@27520 {
- tbi3: tbi-phy@11 {
- reg = <0x11>;
- device_type = "tbi-phy";
- };
- };
- };
-
- pci0: pci@e0008000 {
- reg = <0 0xe0008000 0 0x1000>;
- ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
- 0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
- clock-frequency = <66666666>;
- interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
- interrupt-map = <
- /* IDSEL 0x4 (PCIX Slot 2) */
- 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
- 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
- 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
- 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
-
- /* IDSEL 0x5 (PCIX Slot 3) */
- 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
- 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
- 0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
- 0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
-
- /* IDSEL 0x6 (PCIX Slot 4) */
- 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
- 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
- 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
- 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
-
- /* IDSEL 0x8 (PCIX Slot 5) */
- 0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
- 0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
- 0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
- 0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
-
- /* IDSEL 0xC (Tsi310 bridge) */
- 0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
- 0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
- 0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
- 0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
-
- /* IDSEL 0x14 (Slot 2) */
- 0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
- 0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
- 0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
- 0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
-
- /* IDSEL 0x15 (Slot 3) */
- 0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
- 0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
- 0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
- 0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
-
- /* IDSEL 0x16 (Slot 4) */
- 0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
- 0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
- 0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
- 0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
-
- /* IDSEL 0x18 (Slot 5) */
- 0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
- 0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
- 0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
- 0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
-
- /* IDSEL 0x1C (Tsi310 bridge PCI primary) */
- 0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
- 0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
- 0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
- 0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
-
- pci_bridge@1c {
- interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
- interrupt-map = <
-
- /* IDSEL 0x00 (PrPMC Site) */
- 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
- 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
- 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
- 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
-
- /* IDSEL 0x04 (VIA chip) */
- 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
- 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
- 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
- 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
-
- /* IDSEL 0x05 (8139) */
- 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
-
- /* IDSEL 0x06 (Slot 6) */
- 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
- 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
- 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
- 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
-
- /* IDESL 0x07 (Slot 7) */
- 0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
- 0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0
- 0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
- 0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>;
-
- reg = <0xe000 0x0 0x0 0x0 0x0>;
- #interrupt-cells = <1>;
- #size-cells = <2>;
- #address-cells = <3>;
- ranges = <0x2000000 0x0 0x80000000
- 0x2000000 0x0 0x80000000
- 0x0 0x20000000
- 0x1000000 0x0 0x0
- 0x1000000 0x0 0x0
- 0x0 0x80000>;
- clock-frequency = <33333333>;
-
- isa@4 {
- device_type = "isa";
- #interrupt-cells = <2>;
- #size-cells = <1>;
- #address-cells = <2>;
- reg = <0x2000 0x0 0x0 0x0 0x0>;
- ranges = <0x1 0x0 0x1000000 0x0 0x0 0x1000>;
- interrupt-parent = <&i8259>;
-
- i8259: interrupt-controller@20 {
- interrupt-controller;
- device_type = "interrupt-controller";
- reg = <0x1 0x20 0x2
- 0x1 0xa0 0x2
- 0x1 0x4d0 0x2>;
- #address-cells = <0>;
- #interrupt-cells = <2>;
- compatible = "chrp,iic";
- interrupts = <0 1 0 0>;
- interrupt-parent = <&mpic>;
- };
-
- rtc@70 {
- compatible = "pnpPNP,b00";
- reg = <0x1 0x70 0x2>;
- };
- };
- };
- };
-
- pci1: pci@e0009000 {
- reg = <0 0xe0009000 0 0x1000>;
- ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
- 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
- clock-frequency = <66666666>;
- interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
- interrupt-map = <
-
- /* IDSEL 0x15 */
- 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
- 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
- 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
- 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
- };
-
- pci2: pcie@e000a000 {
- reg = <0 0xe000a000 0 0x1000>;
- ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
- 0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
- pcie@0 {
- ranges = <0x2000000 0x0 0xa0000000
- 0x2000000 0x0 0xa0000000
- 0x0 0x20000000
-
- 0x1000000 0x0 0x0
- 0x1000000 0x0 0x0
- 0x0 0x100000>;
- };
- };
-
- rio: rapidio@e00c0000 {
- reg = <0x0 0xe00c0000 0x0 0x20000>;
- port1 {
- ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
- };
- };
-};
-
-/include/ "fsl/mpc8548si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dtsi b/arch/powerpc/boot/dts/mpc8548cds.dtsi
new file mode 100644
index 0000000..c61f525
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8548cds.dtsi
@@ -0,0 +1,306 @@
+/*
+ * MPC8548CDS Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+&board_lbc {
+ nor@0,0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "cfi-flash";
+ reg = <0x0 0x0 0x01000000>;
+ bank-width = <2>;
+ device-width = <2>;
+
+ partition@0 {
+ reg = <0x0 0x0b00000>;
+ label = "ramdisk-nor";
+ };
+
+ partition@300000 {
+ reg = <0x0b00000 0x0400000>;
+ label = "kernel-nor";
+ };
+
+ partition@700000 {
+ reg = <0x0f00000 0x060000>;
+ label = "dtb-nor";
+ };
+
+ partition@760000 {
+ reg = <0x0f60000 0x020000>;
+ label = "env-nor";
+ read-only;
+ };
+
+ partition@780000 {
+ reg = <0x0f80000 0x080000>;
+ label = "u-boot-nor";
+ read-only;
+ };
+ };
+
+ board-control@1,0 {
+ compatible = "fsl,mpc8548cds-fpga";
+ reg = <0x1 0x0 0x1000>;
+ };
+};
+
+&board_soc {
+ i2c@3000 {
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
+
+ eeprom@56 {
+ compatible = "atmel,24c64";
+ reg = <0x56>;
+ };
+
+ eeprom@57 {
+ compatible = "atmel,24c64";
+ reg = <0x57>;
+ };
+ };
+
+ i2c@3100 {
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
+ };
+
+ enet0: ethernet@24000 {
+ tbi-handle = <&tbi0>;
+ phy-handle = <&phy0>;
+ };
+
+ mdio@24520 {
+ phy0: ethernet-phy@0 {
+ interrupts = <5 1 0 0>;
+ reg = <0x0>;
+ device_type = "ethernet-phy";
+ };
+ phy1: ethernet-phy@1 {
+ interrupts = <5 1 0 0>;
+ reg = <0x1>;
+ device_type = "ethernet-phy";
+ };
+ phy2: ethernet-phy@2 {
+ interrupts = <5 1 0 0>;
+ reg = <0x2>;
+ device_type = "ethernet-phy";
+ };
+ phy3: ethernet-phy@3 {
+ interrupts = <5 1 0 0>;
+ reg = <0x3>;
+ device_type = "ethernet-phy";
+ };
+ tbi0: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet1: ethernet@25000 {
+ tbi-handle = <&tbi1>;
+ phy-handle = <&phy1>;
+ };
+
+ mdio@25520 {
+ tbi1: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet2: ethernet@26000 {
+ tbi-handle = <&tbi2>;
+ phy-handle = <&phy2>;
+ };
+
+ mdio@26520 {
+ tbi2: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ enet3: ethernet@27000 {
+ tbi-handle = <&tbi3>;
+ phy-handle = <&phy3>;
+ };
+
+ mdio@27520 {
+ tbi3: tbi-phy@11 {
+ reg = <0x11>;
+ device_type = "tbi-phy";
+ };
+ };
+};
+
+&board_pci0 {
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+ /* IDSEL 0x4 (PCIX Slot 2) */
+ 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+ 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
+
+ /* IDSEL 0x5 (PCIX Slot 3) */
+ 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
+ 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
+ 0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
+ 0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
+
+ /* IDSEL 0x6 (PCIX Slot 4) */
+ 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+ 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+ 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
+ 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+ /* IDSEL 0x8 (PCIX Slot 5) */
+ 0x4000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+ 0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0x4000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
+
+ /* IDSEL 0xC (Tsi310 bridge) */
+ 0x6000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+ 0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0x6000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
+
+ /* IDSEL 0x14 (Slot 2) */
+ 0xa000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+ 0xa000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0xa000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0xa000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
+
+ /* IDSEL 0x15 (Slot 3) */
+ 0xa800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
+ 0xa800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
+ 0xa800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
+ 0xa800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
+
+ /* IDSEL 0x16 (Slot 4) */
+ 0xb000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+ 0xb000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+ 0xb000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
+ 0xb000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+ /* IDSEL 0x18 (Slot 5) */
+ 0xc000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+ 0xc000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0xc000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0xc000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
+
+ /* IDSEL 0x1C (Tsi310 bridge PCI primary) */
+ 0xe000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+ 0xe000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0xe000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0xe000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
+
+ pci_bridge@1c {
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x00 (PrPMC Site) */
+ 0000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+ 0000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
+
+ /* IDSEL 0x04 (VIA chip) */
+ 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
+ 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
+
+ /* IDSEL 0x05 (8139) */
+ 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
+
+ /* IDSEL 0x06 (Slot 6) */
+ 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
+ 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
+ 0x3000 0x0 0x0 0x3 &mpic 0x0 0x1 0 0
+ 0x3000 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
+
+ /* IDESL 0x07 (Slot 7) */
+ 0x3800 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
+ 0x3800 0x0 0x0 0x2 &mpic 0x0 0x1 0 0
+ 0x3800 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
+ 0x3800 0x0 0x0 0x4 &mpic 0x2 0x1 0 0>;
+
+ reg = <0xe000 0x0 0x0 0x0 0x0>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ #address-cells = <3>;
+ ranges = <0x2000000 0x0 0x80000000
+ 0x2000000 0x0 0x80000000
+ 0x0 0x20000000
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x80000>;
+ clock-frequency = <33333333>;
+
+ isa@4 {
+ device_type = "isa";
+ #interrupt-cells = <2>;
+ #size-cells = <1>;
+ #address-cells = <2>;
+ reg = <0x2000 0x0 0x0 0x0 0x0>;
+ ranges = <0x1 0x0 0x1000000 0x0 0x0 0x1000>;
+ interrupt-parent = <&i8259>;
+
+ i8259: interrupt-controller@20 {
+ interrupt-controller;
+ device_type = "interrupt-controller";
+ reg = <0x1 0x20 0x2
+ 0x1 0xa0 0x2
+ 0x1 0x4d0 0x2>;
+ #address-cells = <0>;
+ #interrupt-cells = <2>;
+ compatible = "chrp,iic";
+ interrupts = <0 1 0 0>;
+ interrupt-parent = <&mpic>;
+ };
+
+ rtc@70 {
+ compatible = "pnpPNP,b00";
+ reg = <0x1 0x70 0x2>;
+ };
+ };
+ };
+};
diff --git a/arch/powerpc/boot/dts/mpc8548cds_32b.dts b/arch/powerpc/boot/dts/mpc8548cds_32b.dts
new file mode 100644
index 0000000..6fd6316
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8548cds_32b.dts
@@ -0,0 +1,86 @@
+/*
+ * MPC8548 CDS Device Tree Source (32-bit address map)
+ *
+ * Copyright 2006, 2008, 2011-2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+/include/ "fsl/mpc8548si-pre.dtsi"
+
+/ {
+ model = "MPC8548CDS";
+ compatible = "MPC8548CDS", "MPC85xxCDS";
+
+ memory {
+ device_type = "memory";
+ reg = <0 0 0x0 0x8000000>; // 128M at 0x0
+ };
+
+ board_lbc: lbc: localbus@e0005000 {
+ reg = <0 0xe0005000 0 0x1000>;
+
+ ranges = <0x0 0x0 0x0 0xff000000 0x01000000
+ 0x1 0x0 0x0 0xf8004000 0x00001000>;
+
+ };
+
+ board_soc: soc: soc8548@e0000000 {
+ ranges = <0 0x0 0xe0000000 0x100000>;
+ };
+
+ board_pci0: pci0: pci@e0008000 {
+ reg = <0 0xe0008000 0 0x1000>;
+ ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x10000000
+ 0x1000000 0x0 0x00000000 0 0xe2000000 0x0 0x800000>;
+ clock-frequency = <66666666>;
+ };
+
+ pci1: pci@e0009000 {
+ reg = <0 0xe0009000 0 0x1000>;
+ ranges = <0x2000000 0x0 0x90000000 0 0x90000000 0x0 0x10000000
+ 0x1000000 0x0 0x00000000 0 0xe2800000 0x0 0x800000>;
+ clock-frequency = <66666666>;
+ interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+ interrupt-map = <
+
+ /* IDSEL 0x15 */
+ 0xa800 0x0 0x0 0x1 &mpic 0xb 0x1 0 0
+ 0xa800 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
+ 0xa800 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
+ 0xa800 0x0 0x0 0x4 &mpic 0x3 0x1 0 0>;
+ };
+
+ pci2: pcie@e000a000 {
+ reg = <0 0xe000a000 0 0x1000>;
+ ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+ 0x1000000 0x0 0x00000000 0 0xe3000000 0x0 0x100000>;
+ pcie@0 {
+ ranges = <0x2000000 0x0 0xa0000000
+ 0x2000000 0x0 0xa0000000
+ 0x0 0x20000000
+
+ 0x1000000 0x0 0x0
+ 0x1000000 0x0 0x0
+ 0x0 0x100000>;
+ };
+ };
+
+ rio: rapidio@e00c0000 {
+ reg = <0x0 0xe00c0000 0x0 0x20000>;
+ port1 {
+ ranges = <0x0 0x0 0x0 0xc0000000 0x0 0x20000000>;
+ };
+ };
+};
+
+/*
+ * mpc8548cds.dtsi must be last to ensure board_pci0 overrides pci0 settings
+ * for interrupt-map & interrupt-map-mask.
+ */
+
+/include/ "fsl/mpc8548si-post.dtsi"
+/include/ "mpc8548cds.dtsi"
--
1.6.4.1
^ permalink raw reply related
* [PATCH 7/9] powerpc/mpc8548cds: fix alias in mpc8548si-pre.dtsi
From: Zhao Chenhui @ 2012-03-06 9:06 UTC (permalink / raw)
To: linuxppc-dev
In-Reply-To: <1331024805-15926-1-git-send-email-chenhui.zhao@freescale.com>
Correct ethernet1 and add ethernet2 and ethernet3.
Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi | 4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
index 289f121..720422d 100644
--- a/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/mpc8548si-pre.dtsi
@@ -43,7 +43,9 @@
serial0 = &serial0;
serial1 = &serial1;
ethernet0 = &enet0;
- ethernet1 = &enet2;
+ ethernet1 = &enet1;
+ ethernet2 = &enet2;
+ ethernet3 = &enet3;
pci0 = &pci0;
pci1 = &pci1;
pci2 = &pci2;
--
1.6.4.1
^ permalink raw reply related
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