* Re: [RFC PATCH v3 0/13] memory-hotplug : hot-remove physical memory
From: Yasuaki Ishimatsu @ 2012-07-11 0:09 UTC (permalink / raw)
To: Jiang Liu
Cc: len.brown, wency, linux-acpi, linux-kernel, linux-mm, paulus,
minchan.kim, kosaki.motohiro, rientjes, Christoph Lameter,
linuxppc-dev, akpm
In-Reply-To: <4FFC5D43.7040206@gmail.com>
Hi Jiang,
2012/07/11 1:50, Jiang Liu wrote:
> On 07/10/2012 05:58 PM, Yasuaki Ishimatsu wrote:
>> Hi Christoph,
>>
>> 2012/07/10 0:18, Christoph Lameter wrote:
>>>
>>> On Mon, 9 Jul 2012, Yasuaki Ishimatsu wrote:
>>>
>>>> Even if you apply these patches, you cannot remove the physical memory
>>>> completely since these patches are still under development. I want you to
>>>> cooperate to improve the physical memory hot-remove. So please review these
>>>> patches and give your comment/idea.
>>>
>>> Could you at least give a method on how you want to do physical memory
>>> removal?
>>
>> We plan to release a dynamic hardware partitionable system. It will be
>> able to hot remove/add a system board which included memory and cpu.
>> But as you know, Linux does not support memory hot-remove on x86 box.
>> So I try to develop it.
>>
>> Current plan to hot remove system board is to use container driver.
>> Thus I define the system board in ACPI DSDT table as a container device.
>> It have supported hot-add a container device. And if container device
>> has _EJ0 ACPI method, "eject" file to remove the container device is
>> prepared as follow:
>>
>> # ls -l /sys/bus/acpi/devices/ACPI0004\:01/eject
>> --w-------. 1 root root 4096 Jul 10 18:19 /sys/bus/acpi/devices/ACPI0004:01/eject
>>
>> When I hot-remove the container device, I echo 1 to the file as follow:
>>
>> #echo 1 > /sys/bus/acpi/devices/ACPI0004\:02/eject
>>
>> Then acpi_bus_trim() is called. And it calls acpi_memory_device_remove()
>> for removing memory device. But the code does not do nothing.
>> So I developed the continuation of the function.
>>
>>> You would have to remove all objects from the range you want to
>>> physically remove. That is only possible under special circumstances and
>>> with a limited set of objects. Even if you exclusively use ZONE_MOVEABLE
>>> you still may get cases where pages are pinned for a long time.
>>
>> I know it. So my memory hot-remove plan is as follows:
>>
>> 1. hot-added a system board
>> All memory which included the system board is offline.
>>
>> 2. online the memory as removable page
>> The function has not supported yet. It is being developed by Lai as follow:
>> http://lkml.indiana.edu/hypermail/linux/kernel/1207.0/01478.html
>> If it is supported, I will be able to create movable memory.
>>
>> 3. hot-remove the memory by container device's eject file
> We have implemented a prototype to do physical node (mem + CPU + IOH) hotplug
> for Itanium and is now porting it to x86. But with currently solution, memory
> hotplug functionality may cause 10-20% performance decrease because we concentrate
> all DMA/Normal memory to the first NUMA node, and all other NUMA nodes only
> hosts ZONE_MOVABLE. We are working on solution to minimize the performance
> drop now.
Thank you for your interesting response.
I have a question. How do you move all other NUMA nodes to ZONE_MOVABLE?
To use ZONE_MOVABLE, we need to use boot options like kernelcore or movablecore.
But it is not enough, since the requested amount is spread evenly throughout
all nodes in the system. So I think we do not have way to move all other NUMA
node to ZONE_MOVABLE.
Thanks,
Yasuaki Ishimatsu
>
>>
>> Thanks,
>> Yasuaki Ishimatsu
>>
>>>
>>> I am not sure that these patches are useful unless we know where you are
>>> going with this. If we end up with a situation where we still cannot
>>> remove physical memory then this patchset is not helpful.
>>
>>
>>
>
>
^ permalink raw reply
* Re: [PATCH v4] PPC: use CURRENT_THREAD_INFO instead of open coded assembly
From: Alexander Graf @ 2012-07-10 22:54 UTC (permalink / raw)
To: Stuart Yoder; +Cc: linuxppc-dev, sfr
In-Reply-To: <1341499295-10795-1-git-send-email-stuart.yoder@freescale.com>
On 05.07.2012, at 16:41, Stuart Yoder wrote:
> From: Stuart Yoder <stuart.yoder@freescale.com>
>=20
> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com>
Ben, ping?
Alex
> ---
> -v4: fixed build issues in exception-64s.h and exceptions-64s.S
>=20
> arch/powerpc/include/asm/exception-64s.h | 4 ++--
> arch/powerpc/include/asm/thread_info.h | 6 ++++++
> arch/powerpc/kernel/entry_32.S | 24 =
++++++++++++------------
> arch/powerpc/kernel/entry_64.S | 14 +++++++-------
> arch/powerpc/kernel/exceptions-64e.S | 2 +-
> arch/powerpc/kernel/exceptions-64s.S | 2 +-
> arch/powerpc/kernel/head_fsl_booke.S | 2 +-
> arch/powerpc/kernel/idle_6xx.S | 4 ++--
> arch/powerpc/kernel/idle_book3e.S | 2 +-
> arch/powerpc/kernel/idle_e500.S | 4 ++--
> arch/powerpc/kernel/idle_power4.S | 2 +-
> arch/powerpc/kernel/misc_32.S | 4 ++--
> arch/powerpc/kvm/bookehv_interrupts.S | 6 +-----
> arch/powerpc/mm/hash_low_32.S | 8 ++++----
> arch/powerpc/sysdev/6xx-suspend.S | 2 +-
> 15 files changed, 44 insertions(+), 42 deletions(-)
>=20
> diff --git a/arch/powerpc/include/asm/exception-64s.h =
b/arch/powerpc/include/asm/exception-64s.h
> index d58fc4e..a43c147 100644
> --- a/arch/powerpc/include/asm/exception-64s.h
> +++ b/arch/powerpc/include/asm/exception-64s.h
> @@ -293,7 +293,7 @@ label##_hv: =
\
>=20
> #define RUNLATCH_ON \
> BEGIN_FTR_SECTION \
> - clrrdi r3,r1,THREAD_SHIFT; \
> + CURRENT_THREAD_INFO(r3, r1); \
> ld r4,TI_LOCAL_FLAGS(r3); \
> andi. r0,r4,_TLF_RUNLATCH; \
> beql ppc64_runlatch_on_trampoline; \
> @@ -332,7 +332,7 @@ label##_common: =
\
> #ifdef CONFIG_PPC_970_NAP
> #define FINISH_NAP \
> BEGIN_FTR_SECTION \
> - clrrdi r11,r1,THREAD_SHIFT; \
> + CURRENT_THREAD_INFO(r11, r1); \
> ld r9,TI_LOCAL_FLAGS(r11); \
> andi. r10,r9,_TLF_NAPPING; \
> bnel power4_fixup_nap; \
> diff --git a/arch/powerpc/include/asm/thread_info.h =
b/arch/powerpc/include/asm/thread_info.h
> index 68831e9..faf9352 100644
> --- a/arch/powerpc/include/asm/thread_info.h
> +++ b/arch/powerpc/include/asm/thread_info.h
> @@ -22,6 +22,12 @@
>=20
> #define THREAD_SIZE (1 << THREAD_SHIFT)
>=20
> +#ifdef CONFIG_PPC64
> +#define CURRENT_THREAD_INFO(dest, sp) clrrdi dest, sp, =
THREAD_SHIFT
> +#else
> +#define CURRENT_THREAD_INFO(dest, sp) rlwinm dest, sp, 0, 0, =
31-THREAD_SHIFT
> +#endif
> +
> #ifndef __ASSEMBLY__
> #include <linux/cache.h>
> #include <asm/processor.h>
> diff --git a/arch/powerpc/kernel/entry_32.S =
b/arch/powerpc/kernel/entry_32.S
> index ba3aeb4..bad42e3 100644
> --- a/arch/powerpc/kernel/entry_32.S
> +++ b/arch/powerpc/kernel/entry_32.S
> @@ -92,7 +92,7 @@ crit_transfer_to_handler:
> mfspr r8,SPRN_SPRG_THREAD
> lwz r0,KSP_LIMIT(r8)
> stw r0,SAVED_KSP_LIMIT(r11)
> - rlwimi r0,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r0, r1)
> stw r0,KSP_LIMIT(r8)
> /* fall through */
> #endif
> @@ -112,7 +112,7 @@ crit_transfer_to_handler:
> mfspr r8,SPRN_SPRG_THREAD
> lwz r0,KSP_LIMIT(r8)
> stw r0,saved_ksp_limit@l(0)
> - rlwimi r0,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r0, r1)
> stw r0,KSP_LIMIT(r8)
> /* fall through */
> #endif
> @@ -158,7 +158,7 @@ transfer_to_handler:
> tophys(r11,r11)
> addi r11,r11,global_dbcr0@l
> #ifdef CONFIG_SMP
> - rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r9, r1)
> lwz r9,TI_CPU(r9)
> slwi r9,r9,3
> add r11,r11,r9
> @@ -179,7 +179,7 @@ transfer_to_handler:
> ble- stack_ovf /* then the kernel stack =
overflowed */
> 5:
> #if defined(CONFIG_6xx) || defined(CONFIG_E500)
> - rlwinm r9,r1,0,0,31-THREAD_SHIFT
> + CURRENT_THREAD_INFO(r9, r1)
> tophys(r9,r9) /* check local flags */
> lwz r12,TI_LOCAL_FLAGS(r9)
> mtcrf 0x01,r12
> @@ -333,7 +333,7 @@ _GLOBAL(DoSyscall)
> mtmsr r11
> 1:
> #endif /* CONFIG_TRACE_IRQFLAGS */
> - rlwinm r10,r1,0,0,(31-THREAD_SHIFT) /* current_thread_info() =
*/
> + CURRENT_THREAD_INFO(r10, r1)
> lwz r11,TI_FLAGS(r10)
> andi. r11,r11,_TIF_SYSCALL_T_OR_A
> bne- syscall_dotrace
> @@ -354,7 +354,7 @@ ret_from_syscall:
> bl do_show_syscall_exit
> #endif
> mr r6,r3
> - rlwinm r12,r1,0,0,(31-THREAD_SHIFT) /* current_thread_info() =
*/
> + CURRENT_THREAD_INFO(r12, r1)
> /* disable interrupts so current_thread_info()->flags can't =
change */
> LOAD_MSR_KERNEL(r10,MSR_KERNEL) /* doesn't include MSR_EE */
> /* Note: We don't bother telling lockdep about it */
> @@ -815,7 +815,7 @@ ret_from_except:
>=20
> user_exc_return: /* r10 contains MSR_KERNEL here */
> /* Check current_thread_info()->flags */
> - rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r9, r1)
> lwz r9,TI_FLAGS(r9)
> andi. r0,r9,_TIF_USER_WORK_MASK
> bne do_work
> @@ -835,7 +835,7 @@ restore_user:
> /* N.B. the only way to get here is from the beq following =
ret_from_except. */
> resume_kernel:
> /* check current_thread_info->preempt_count */
> - rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r9, r1)
> lwz r0,TI_PREEMPT(r9)
> cmpwi 0,r0,0 /* if non-zero, just restore regs and =
return */
> bne restore
> @@ -852,7 +852,7 @@ resume_kernel:
> bl trace_hardirqs_off
> #endif
> 1: bl preempt_schedule_irq
> - rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r9, r1)
> lwz r3,TI_FLAGS(r9)
> andi. r0,r3,_TIF_NEED_RESCHED
> bne- 1b
> @@ -1122,7 +1122,7 @@ ret_from_debug_exc:
> lwz r10,SAVED_KSP_LIMIT(r1)
> stw r10,KSP_LIMIT(r9)
> lwz r9,THREAD_INFO-THREAD(r9)
> - rlwinm r10,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r10, r1)
> lwz r10,TI_PREEMPT(r10)
> stw r10,TI_PREEMPT(r9)
> RESTORE_xSRR(SRR0,SRR1);
> @@ -1156,7 +1156,7 @@ load_dbcr0:
> lis r11,global_dbcr0@ha
> addi r11,r11,global_dbcr0@l
> #ifdef CONFIG_SMP
> - rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r9, r1)
> lwz r9,TI_CPU(r9)
> slwi r9,r9,3
> add r11,r11,r9
> @@ -1197,7 +1197,7 @@ recheck:
> LOAD_MSR_KERNEL(r10,MSR_KERNEL)
> SYNC
> MTMSRD(r10) /* disable interrupts */
> - rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r9, r1)
> lwz r9,TI_FLAGS(r9)
> andi. r0,r9,_TIF_NEED_RESCHED
> bne- do_resched
> diff --git a/arch/powerpc/kernel/entry_64.S =
b/arch/powerpc/kernel/entry_64.S
> index ed1718f..ba943b9 100644
> --- a/arch/powerpc/kernel/entry_64.S
> +++ b/arch/powerpc/kernel/entry_64.S
> @@ -146,7 +146,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
> REST_2GPRS(7,r1)
> addi r9,r1,STACK_FRAME_OVERHEAD
> #endif
> - clrrdi r11,r1,THREAD_SHIFT
> + CURRENT_THREAD_INFO(r11, r1)
> ld r10,TI_FLAGS(r11)
> andi. r11,r10,_TIF_SYSCALL_T_OR_A
> bne- syscall_dotrace
> @@ -181,7 +181,7 @@ syscall_exit:
> bl .do_show_syscall_exit
> ld r3,RESULT(r1)
> #endif
> - clrrdi r12,r1,THREAD_SHIFT
> + CURRENT_THREAD_INFO(r12, r1)
>=20
> ld r8,_MSR(r1)
> #ifdef CONFIG_PPC_BOOK3S
> @@ -262,7 +262,7 @@ syscall_dotrace:
> ld r7,GPR7(r1)
> ld r8,GPR8(r1)
> addi r9,r1,STACK_FRAME_OVERHEAD
> - clrrdi r10,r1,THREAD_SHIFT
> + CURRENT_THREAD_INFO(r10, r1)
> ld r10,TI_FLAGS(r10)
> b .Lsyscall_dotrace_cont
>=20
> @@ -499,7 +499,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
> 2:
> #endif /* !CONFIG_PPC_BOOK3S */
>=20
> - clrrdi r7,r8,THREAD_SHIFT /* base of new stack */
> + CURRENT_THREAD_INFO(r7, r8) /* base of new stack */
> /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
> because we don't need to leave the 288-byte ABI gap at the
> top of the kernel stack. */
> @@ -559,7 +559,7 @@ _GLOBAL(ret_from_except_lite)
> #endif /* CONFIG_PPC_BOOK3E */
>=20
> #ifdef CONFIG_PREEMPT
> - clrrdi r9,r1,THREAD_SHIFT /* current_thread_info() */
> + CURRENT_THREAD_INFO(r9, r1)
> li r0,_TIF_NEED_RESCHED /* bits to check */
> ld r3,_MSR(r1)
> ld r4,TI_FLAGS(r9)
> @@ -574,7 +574,7 @@ _GLOBAL(ret_from_except_lite)
> beq restore /* if not, just restore regs and return =
*/
>=20
> /* Check current_thread_info()->flags */
> - clrrdi r9,r1,THREAD_SHIFT
> + CURRENT_THREAD_INFO(r9, r1)
> ld r4,TI_FLAGS(r9)
> andi. r0,r4,_TIF_USER_WORK_MASK
> bne do_work
> @@ -782,7 +782,7 @@ do_work:
> 1: bl .preempt_schedule_irq
>=20
> /* Re-test flags and eventually loop */
> - clrrdi r9,r1,THREAD_SHIFT
> + CURRENT_THREAD_INFO(r9, r1)
> ld r4,TI_FLAGS(r9)
> andi. r0,r4,_TIF_NEED_RESCHED
> bne 1b
> diff --git a/arch/powerpc/kernel/exceptions-64e.S =
b/arch/powerpc/kernel/exceptions-64e.S
> index 7215cc2..2f86db6 100644
> --- a/arch/powerpc/kernel/exceptions-64e.S
> +++ b/arch/powerpc/kernel/exceptions-64e.S
> @@ -222,7 +222,7 @@ exc_##n##_bad_stack: =
\
> * interrupts happen before the wait instruction.
> */
> #define CHECK_NAPPING() =
\
> - clrrdi r11,r1,THREAD_SHIFT; =
\
> + CURRENT_THREAD_INFO(r11, r1); =
\
> ld r10,TI_LOCAL_FLAGS(r11); =
\
> andi. r9,r10,_TLF_NAPPING; =
\
> beq+ 1f; =
\
> diff --git a/arch/powerpc/kernel/exceptions-64s.S =
b/arch/powerpc/kernel/exceptions-64s.S
> index 1c06d29..8ad3468 100644
> --- a/arch/powerpc/kernel/exceptions-64s.S
> +++ b/arch/powerpc/kernel/exceptions-64s.S
> @@ -851,7 +851,7 @@ BEGIN_FTR_SECTION
> bne- do_ste_alloc /* If so handle it */
> END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
>=20
> - clrrdi r11,r1,THREAD_SHIFT
> + CURRENT_THREAD_INFO(r11, r1)
> lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
> andis. r0,r0,NMI_MASK@h /* (i.e. an irq when =
soft-disabled) */
> bne 77f /* then don't call hash_page now =
*/
> diff --git a/arch/powerpc/kernel/head_fsl_booke.S =
b/arch/powerpc/kernel/head_fsl_booke.S
> index 1f4434a..7e7bd88 100644
> --- a/arch/powerpc/kernel/head_fsl_booke.S
> +++ b/arch/powerpc/kernel/head_fsl_booke.S
> @@ -192,7 +192,7 @@ _ENTRY(__early_start)
> li r0,0
> stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
>=20
> - rlwinm r22,r1,0,0,31-THREAD_SHIFT /* current thread_info =
*/
> + CURRENT_THREAD_INFO(r22, r1)
> stw r24, TI_CPU(r22)
>=20
> bl early_init
> diff --git a/arch/powerpc/kernel/idle_6xx.S =
b/arch/powerpc/kernel/idle_6xx.S
> index 15c611d..1686916 100644
> --- a/arch/powerpc/kernel/idle_6xx.S
> +++ b/arch/powerpc/kernel/idle_6xx.S
> @@ -135,7 +135,7 @@ BEGIN_FTR_SECTION
> DSSALL
> sync
> END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
> - rlwinm r9,r1,0,0,31-THREAD_SHIFT /* current thread_info =
*/
> + CURRENT_THREAD_INFO(r9, r1)
> lwz r8,TI_LOCAL_FLAGS(r9) /* set napping bit */
> ori r8,r8,_TLF_NAPPING /* so when we take an exception =
*/
> stw r8,TI_LOCAL_FLAGS(r9) /* it will return to our caller =
*/
> @@ -158,7 +158,7 @@ _GLOBAL(power_save_ppc32_restore)
> stw r9,_NIP(r11) /* make it do a blr */
>=20
> #ifdef CONFIG_SMP
> - rlwinm r12,r11,0,0,31-THREAD_SHIFT
> + CURRENT_THREAD_INFO(r12, r11)
> lwz r11,TI_CPU(r12) /* get cpu number * 4 */
> slwi r11,r11,2
> #else
> diff --git a/arch/powerpc/kernel/idle_book3e.S =
b/arch/powerpc/kernel/idle_book3e.S
> index ff007b5..4c7cb400 100644
> --- a/arch/powerpc/kernel/idle_book3e.S
> +++ b/arch/powerpc/kernel/idle_book3e.S
> @@ -60,7 +60,7 @@ _GLOBAL(book3e_idle)
> 1: /* Let's set the _TLF_NAPPING flag so interrupts make us return
> * to the right spot
> */
> - clrrdi r11,r1,THREAD_SHIFT
> + CURRENT_THREAD_INFO(r11, r1)
> ld r10,TI_LOCAL_FLAGS(r11)
> ori r10,r10,_TLF_NAPPING
> std r10,TI_LOCAL_FLAGS(r11)
> diff --git a/arch/powerpc/kernel/idle_e500.S =
b/arch/powerpc/kernel/idle_e500.S
> index 4f0ab85..1544866 100644
> --- a/arch/powerpc/kernel/idle_e500.S
> +++ b/arch/powerpc/kernel/idle_e500.S
> @@ -21,7 +21,7 @@
> .text
>=20
> _GLOBAL(e500_idle)
> - rlwinm r3,r1,0,0,31-THREAD_SHIFT /* current thread_info =
*/
> + CURRENT_THREAD_INFO(r3, r1)
> lwz r4,TI_LOCAL_FLAGS(r3) /* set napping bit */
> ori r4,r4,_TLF_NAPPING /* so when we take an exception =
*/
> stw r4,TI_LOCAL_FLAGS(r3) /* it will return to our caller =
*/
> @@ -96,7 +96,7 @@ _GLOBAL(power_save_ppc32_restore)
> stw r9,_NIP(r11) /* make it do a blr */
>=20
> #ifdef CONFIG_SMP
> - rlwinm r12,r1,0,0,31-THREAD_SHIFT
> + CURRENT_THREAD_INFO(r12, r1)
> lwz r11,TI_CPU(r12) /* get cpu number * 4 */
> slwi r11,r11,2
> #else
> diff --git a/arch/powerpc/kernel/idle_power4.S =
b/arch/powerpc/kernel/idle_power4.S
> index 2c71b0f..e3edaa1 100644
> --- a/arch/powerpc/kernel/idle_power4.S
> +++ b/arch/powerpc/kernel/idle_power4.S
> @@ -59,7 +59,7 @@ BEGIN_FTR_SECTION
> DSSALL
> sync
> END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
> - clrrdi r9,r1,THREAD_SHIFT /* current thread_info */
> + CURRENT_THREAD_INFO(r9, r1)
> ld r8,TI_LOCAL_FLAGS(r9) /* set napping bit */
> ori r8,r8,_TLF_NAPPING /* so when we take an exception =
*/
> std r8,TI_LOCAL_FLAGS(r9) /* it will return to our caller =
*/
> diff --git a/arch/powerpc/kernel/misc_32.S =
b/arch/powerpc/kernel/misc_32.S
> index 386d57f..407e293 100644
> --- a/arch/powerpc/kernel/misc_32.S
> +++ b/arch/powerpc/kernel/misc_32.S
> @@ -179,7 +179,7 @@ _GLOBAL(low_choose_750fx_pll)
> mtspr SPRN_HID1,r4
>=20
> /* Store new HID1 image */
> - rlwinm r6,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r6, r1)
> lwz r6,TI_CPU(r6)
> slwi r6,r6,2
> addis r6,r6,nap_save_hid1@ha
> @@ -699,7 +699,7 @@ _GLOBAL(kernel_thread)
> #ifdef CONFIG_SMP
> _GLOBAL(start_secondary_resume)
> /* Reset stack */
> - rlwinm r1,r1,0,0,(31-THREAD_SHIFT) /* current_thread_info() =
*/
> + CURRENT_THREAD_INFO(r1, r1)
> addi r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
> li r3,0
> stw r3,0(r1) /* Zero the stack frame pointer =
*/
> diff --git a/arch/powerpc/kvm/bookehv_interrupts.S =
b/arch/powerpc/kvm/bookehv_interrupts.S
> index 0fa2ef7..c8c7a04 100644
> --- a/arch/powerpc/kvm/bookehv_interrupts.S
> +++ b/arch/powerpc/kvm/bookehv_interrupts.S
> @@ -161,11 +161,7 @@
> mtspr SPRN_EPLC, r8
>=20
> /* disable preemption, so we are sure we hit the fixup handler =
*/
> -#ifdef CONFIG_PPC64
> - clrrdi r8,r1,THREAD_SHIFT
> -#else
> - rlwinm r8,r1,0,0,31-THREAD_SHIFT /* current thread_info =
*/
> -#endif
> + CURRENT_THREAD_INFO(r8, r1)
> li r7, 1
> stw r7, TI_PREEMPT(r8)
>=20
> diff --git a/arch/powerpc/mm/hash_low_32.S =
b/arch/powerpc/mm/hash_low_32.S
> index b13d589..115347f 100644
> --- a/arch/powerpc/mm/hash_low_32.S
> +++ b/arch/powerpc/mm/hash_low_32.S
> @@ -184,7 +184,7 @@ _GLOBAL(add_hash_page)
> add r3,r3,r0 /* note create_hpte trims to 24 =
bits */
>=20
> #ifdef CONFIG_SMP
> - rlwinm r8,r1,0,0,(31-THREAD_SHIFT) /* use cpu number to make =
tag */
> + CURRENT_THREAD_INFO(r8, r1) /* use cpu number to make tag */
> lwz r8,TI_CPU(r8) /* to go in mmu_hash_lock */
> oris r8,r8,12
> #endif /* CONFIG_SMP */
> @@ -545,7 +545,7 @@ _GLOBAL(flush_hash_pages)
> #ifdef CONFIG_SMP
> addis r9,r7,mmu_hash_lock@ha
> addi r9,r9,mmu_hash_lock@l
> - rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r8, r1)
> add r8,r8,r7
> lwz r8,TI_CPU(r8)
> oris r8,r8,9
> @@ -639,7 +639,7 @@ _GLOBAL(flush_hash_patch_B)
> */
> _GLOBAL(_tlbie)
> #ifdef CONFIG_SMP
> - rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r8, r1)
> lwz r8,TI_CPU(r8)
> oris r8,r8,11
> mfmsr r10
> @@ -677,7 +677,7 @@ _GLOBAL(_tlbie)
> */
> _GLOBAL(_tlbia)
> #if defined(CONFIG_SMP)
> - rlwinm r8,r1,0,0,(31-THREAD_SHIFT)
> + CURRENT_THREAD_INFO(r8, r1)
> lwz r8,TI_CPU(r8)
> oris r8,r8,10
> mfmsr r10
> diff --git a/arch/powerpc/sysdev/6xx-suspend.S =
b/arch/powerpc/sysdev/6xx-suspend.S
> index 21cda08..cf48e9c 100644
> --- a/arch/powerpc/sysdev/6xx-suspend.S
> +++ b/arch/powerpc/sysdev/6xx-suspend.S
> @@ -29,7 +29,7 @@ _GLOBAL(mpc6xx_enter_standby)
> ori r5, r5, ret_from_standby@l
> mtlr r5
>=20
> - rlwinm r5, r1, 0, 0, 31-THREAD_SHIFT
> + CURRENT_THREAD_INFO(r5, r1)
> lwz r6, TI_LOCAL_FLAGS(r5)
> ori r6, r6, _TLF_SLEEPING
> stw r6, TI_LOCAL_FLAGS(r5)
> --=20
> 1.7.3.4
>=20
>=20
^ permalink raw reply
* Re: [linuxppc-release] [PATCH 4/4] Talitos: fix the issue of dma memory leak
From: Timur Tabi @ 2012-07-10 21:25 UTC (permalink / raw)
To: Qiang Liu; +Cc: Herbert Xu, linuxppc-dev, linux-crypto, David S. Miller
In-Reply-To: <1341900014-20915-1-git-send-email-qiang.liu@freescale.com>
Qiang Liu wrote:
> An error will be happened when test with mass data:
Please don't use the phrase "fix the issue" in patch summaries. It's
redundant.
This patch should be titled,
"drivers/crypto: fix memory leak in Talitos driver"
> diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
> index 81f8497..a7da48c 100644
> --- a/drivers/crypto/talitos.c
> +++ b/drivers/crypto/talitos.c
> @@ -264,7 +264,7 @@ static void flush_channel(struct device *dev, int ch, int error, int reset_ch)
> else
> status = error;
>
> - dma_unmap_single(dev, request->dma_desc,
> + dma_unmap_single(priv->dev, request->dma_desc,
You have an indentation problem here.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH 3/4] fsl-dma: support attribute of DMA_MEMORY when async_tx enabled
From: Dan Williams @ 2012-07-10 19:39 UTC (permalink / raw)
To: Qiang Liu; +Cc: Vinod Koul, linuxppc-dev, linux-crypto
In-Reply-To: <1341899997-20879-1-git-send-email-qiang.liu@freescale.com>
On Mon, Jul 9, 2012 at 10:59 PM, Qiang Liu <qiang.liu@freescale.com> wrote:
> - delete attribute of DMA_INTERRUPT because fsl-dma doesn't support
> this function, exception will be thrown if talitos is used to compute xor
> at the same time;
> - change the release process of dma descriptor for avoiding exception when
> enable config NET_DMA, release dma descriptor from 1st to last second, the
> last descriptor which is reserved in current descriptor register may not be
> completed, race condition will be raised if free current descriptor;
> - use spin_lock_bh to instead of spin_lock_irqsave for improving performance;
>
> A race condition which is raised when use both of talitos and dmaengine to
> offload xor is because napi scheduler will sync all pending requests in dma
> channels, it will affect the process of raid operations. The descriptor is
> freed which is submitted just now, but async_tx must check whether this depend
> tx descriptor is acked, there are poison contents in the invalid address,
> then BUG_ON() is thrown, so this descriptor will be freed in the next time.
>
> Cc: Dan Williams <dan.j.williams@intel.com>
> Cc: Vinod Koul <vinod.koul@intel.com>
> Cc: Li Yang <leoli@freescale.com>
> Signed-off-by: Qiang Liu <qiang.liu@freescale.com>
> ---
>From the description this sounds like 3 or 4 patches. Can you split it up?
^ permalink raw reply
* Re: Semantics of lv1_pause()
From: Geoff Levand @ 2012-07-10 19:36 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <1341890402.2561.2.camel@pasglop>
Hi Ben,
On Tue, 2012-07-10 at 13:20 +1000, Benjamin Herrenschmidt wrote:
> regarding the precise semantics of lv1_pause() ?
Here's what's in PS3's setup.c:
static void ps3_power_save(void)
{
/*
* lv1_pause() puts the PPE thread into inactive state until an
* irq on an unmasked plug exists. MSR[EE] has no effect.
* flags: 0 = wake on DEC interrupt, 1 = ignore DEC interrupt.
*/
lv1_pause(0);
}
Just FYI, setup.c is here:
http://git.kernel.org/?p=linux/kernel/git/torvalds/linux.git;a=blob;f=arch/powerpc/platforms/ps3/setup.c;hb=HEAD#l72
> I'm fixing various issues with our idle loops, among other things,
> because we are soft-disabled when we hit ppc_md.powersave() but not
> hard-disabled, there could be an interrupt marked as pending and not
> taken yet.
>
> Will that work properly ? I have this understanding that it might
> not ... but heh.
The (virtual) HW thread that called lv1_pause() should become active
when any virq that had irq_chip.irq_unmask() called for it occurs.
I'm not sure what 'become active' means if that virq is setup to be
handled by the 'paused' HW thread. I guess the behavior depends on
if MSR_EE was set?
> Also if I call lv1_pause() with MSR_EE off, will it work ? Will it
> return with MSR_EE on like H_CEDE does on pseries ?
As above, the value of MSR_EE has no effect on activating the HW
thread, and I assume MSR_EE will still be off when lv1_pause() returns.
We can try some experiments if needed.
-Geoff
^ permalink raw reply
* Re: [git pull] Please pull powerpc.git merge branch
From: roger blofeld @ 2012-07-10 18:48 UTC (permalink / raw)
To: Gerhard Pircher, Benjamin Herrenschmidt; +Cc: linuxppc-dev list
In-Reply-To: <1341267617.2588.51.camel@pasglop>
--- On Mon, 7/2/12, Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Subject: Re: [git pull] Please pull powerpc.git merge branch
> To: "Gerhard Pircher" <gerhard_pircher@gmx.net>
> Cc: "linuxppc-dev list" <linuxppc-dev@ozlabs.org>
> Date: Monday, July 2, 2012, 3:20 PM
> On Mon, 2012-07-02 at 23:38 +0200,
> Gerhard Pircher wrote:
> >
> > What about this fix:?
> >
> > http://patchwork.ozlabs.org/patch/166346/
> >
> > At least I can't see it in the log...
>
> The module fix went in. The ftrace patch, well, it's
> untested and we
> don't even know if we have a problem with mcount yet, so no,
> I haven't
> merged it yet.
>
> Cheers,
> Ben.
>
>
I have had a chance to test this patch. Before it is applied I get the following message when loading a module:
Not a trampoline
------------[ cut here ]------------
WARNING: at /src/git/linux-powerpc/kernel/trace/ftrace.c:1583
Modules linked in: gpio_w1_transport(O+)
NIP: c008129c LR: c0082138 CTR: c021d744
REGS: c532dd80 TRAP: 0700 Tainted: G O (3.4.3-00002-g23fc8c3)
MSR: 00029032 <EE,ME,IR,DR,RI> CR: 22082282 XER: 20000000
TASK = c5256900[363] 'insmod' THREAD: c532c000
GPR00: 00000001 c532de30 c5256900 ffffffea c907b008 00000000 c046befc 20747261
GPR08: c046be40 c045c862 00008000 00000000 22082224 10019fdc 00000000 100f0000
GPR16: 100f5678 100dc70c 00000000 eac3ec00 00000000 c0011bb0 c046890c 00000000
GPR24: c907b008 c70d8f80 c0443d0c 00000000 c5338000 0000000c c907b008 c049a910
NIP [c008129c] ftrace_bug+0xc0/0x25c
LR [c0082138] ftrace_process_locs+0x47c/0x608
Call Trace:
[c532de30] [c008fe04] ftrace_now+0x38/0x78 (unreliable)
[c532de50] [c0082138] ftrace_process_locs+0x47c/0x608
[c532dea0] [c008232c] ftrace_module_notify+0x68/0x7c
[c532deb0] [c004cd80] notifier_call_chain+0x90/0xe0
[c532dee0] [c004d27c] __blocking_notifier_call_chain+0x68/0x94
[c532df10] [c004d2cc] blocking_notifier_call_chain+0x24/0x34
[c532df20] [c0073b38] sys_init_module+0xa0/0x1e0
[c532df40] [c0011254] ret_from_syscall+0x0/0x38
--- Exception: c01 at 0xff5d694
LR = 0x10000cd4
Instruction dump:
90090008 48294b71 3c60c03c 7fc4f378 7fc5f378 3863874c 48294b5d 48000188
3d20c046 3929c862 88090003 68000001 <0f000000> 2f800000 409e0148 3d20c001
---[ end trace aaa9b56024f9d2b9 ]---
ftrace failed to modify [<c907b008>] gpio_w1_reset_bus+0x8/0xc0 [gpio_w1_transport]
actual: 48:00:04:99
and the trace file dump results in:
# tracer: nop
#
# WARNING: FUNCTION TRACING IS CORRUPTED
# MAY BE MISSING FUNCTION EVENTS
# entries-in-buffer/entries-written: 0/0 #P:1
#
# _-----=> irqs-off
# / _----=> need-resched
# | / _---=> hardirq/softirq
# || / _--=> preempt-depth
# ||| / delay
# TASK-PID CPU# |||| TIMESTAMP FUNCTION
# | | | |||| | |
after the patch is applied I get no messages on module loading and ftrace no longer complains, and I can trace my module's functions.
So I can add
Tested-By: Roger Blofeld <blofeldus@yahoo.com>
-rb
^ permalink raw reply
* Re: [PATCH 3/3] powerpc/mpc85xx_ds: convert to unified PCI init
From: Kumar Gala @ 2012-07-10 18:31 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, agraf, Jia Hongtao
In-Reply-To: <20120627235007.GC9100@tyr.buserror.net>
On Jun 27, 2012, at 6:50 PM, Scott Wood wrote:
> Similar to how the primary PCI bridge is identified by looking
> for an isa subnode, we determine whether to apply uli exclusions
> by looking for a uli subnode.
>=20
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> Besides being an example of a real-hardware board to use the new PCI =
init
> (probably one of the more complicated examples due to the uli device
> exclusion), this fixes PCI under QEMU's mpc8544ds machine. QEMU was
> only creating one PCI bus, and it wasn't the one Linux had arbitrarily
> deemed primary for mpc8544ds (AFAIK, there's no legacy ISA on this
> board).
>=20
> Tested with QEMU mpc8544ds, and real-hardware mpc8572ds (with uli).
>=20
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 97 =
+++++++++---------------------
> 1 files changed, 29 insertions(+), 68 deletions(-)
Can you rebase against my 'next' branch.. having issues applying this.
- k=
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on core1 of AMP boot issue
From: Scott Wood @ 2012-07-10 18:15 UTC (permalink / raw)
To: Jia Hongtao; +Cc: linuxppc-dev
In-Reply-To: <1341900506-23401-1-git-send-email-B38951@freescale.com>
On 07/10/2012 01:08 AM, Jia Hongtao wrote:
> The issue log on core1 is:
> root@mpc8572ds:~# ifconfig eth0 10.192.208.244
> net eth0: could not attach to PHY
> SIOCSIFFLAGS: No such device
>
> To attach PHY node mdio@24520 should not be disabled in dts of core1.
> Because all PHYs are controlled through this node as follows:
So you grant it to both partitions? How do you deal with synchronization?
-Scott
^ permalink raw reply
* Re: [RFC PATCH v3 0/13] memory-hotplug : hot-remove physical memory
From: Jiang Liu @ 2012-07-10 16:50 UTC (permalink / raw)
To: Yasuaki Ishimatsu
Cc: len.brown, wency, linux-acpi, linux-kernel, linux-mm, paulus,
minchan.kim, kosaki.motohiro, rientjes, Christoph Lameter,
linuxppc-dev, akpm
In-Reply-To: <4FFBFCAC.4010007@jp.fujitsu.com>
On 07/10/2012 05:58 PM, Yasuaki Ishimatsu wrote:
> Hi Christoph,
>
> 2012/07/10 0:18, Christoph Lameter wrote:
>>
>> On Mon, 9 Jul 2012, Yasuaki Ishimatsu wrote:
>>
>>> Even if you apply these patches, you cannot remove the physical memory
>>> completely since these patches are still under development. I want you to
>>> cooperate to improve the physical memory hot-remove. So please review these
>>> patches and give your comment/idea.
>>
>> Could you at least give a method on how you want to do physical memory
>> removal?
>
> We plan to release a dynamic hardware partitionable system. It will be
> able to hot remove/add a system board which included memory and cpu.
> But as you know, Linux does not support memory hot-remove on x86 box.
> So I try to develop it.
>
> Current plan to hot remove system board is to use container driver.
> Thus I define the system board in ACPI DSDT table as a container device.
> It have supported hot-add a container device. And if container device
> has _EJ0 ACPI method, "eject" file to remove the container device is
> prepared as follow:
>
> # ls -l /sys/bus/acpi/devices/ACPI0004\:01/eject
> --w-------. 1 root root 4096 Jul 10 18:19 /sys/bus/acpi/devices/ACPI0004:01/eject
>
> When I hot-remove the container device, I echo 1 to the file as follow:
>
> #echo 1 > /sys/bus/acpi/devices/ACPI0004\:02/eject
>
> Then acpi_bus_trim() is called. And it calls acpi_memory_device_remove()
> for removing memory device. But the code does not do nothing.
> So I developed the continuation of the function.
>
>> You would have to remove all objects from the range you want to
>> physically remove. That is only possible under special circumstances and
>> with a limited set of objects. Even if you exclusively use ZONE_MOVEABLE
>> you still may get cases where pages are pinned for a long time.
>
> I know it. So my memory hot-remove plan is as follows:
>
> 1. hot-added a system board
> All memory which included the system board is offline.
>
> 2. online the memory as removable page
> The function has not supported yet. It is being developed by Lai as follow:
> http://lkml.indiana.edu/hypermail/linux/kernel/1207.0/01478.html
> If it is supported, I will be able to create movable memory.
>
> 3. hot-remove the memory by container device's eject file
We have implemented a prototype to do physical node (mem + CPU + IOH) hotplug
for Itanium and is now porting it to x86. But with currently solution, memory
hotplug functionality may cause 10-20% performance decrease because we concentrate
all DMA/Normal memory to the first NUMA node, and all other NUMA nodes only
hosts ZONE_MOVABLE. We are working on solution to minimize the performance
drop now.
>
> Thanks,
> Yasuaki Ishimatsu
>
>>
>> I am not sure that these patches are useful unless we know where you are
>> going with this. If we end up with a situation where we still cannot
>> remove physical memory then this patchset is not helpful.
>
>
>
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/85xx: Create dts of each core in CAMP mode for P1021RDB-PC
From: Scott Wood @ 2012-07-10 15:57 UTC (permalink / raw)
To: Xu Jiucheng; +Cc: Matthew McClintock, linuxppc-dev
In-Reply-To: <1341909561-6591-2-git-send-email-Jiucheng.Xu@freescale.com>
On 07/10/2012 03:39 AM, Xu Jiucheng wrote:
> + crypto@30000 {
> + status = "disabled";
> + };
Whitespace.
> +
> + mpic: pic@40000 {
> + protected-sources = <
> + 16 /* ecm, mem, L2, pci0, pci1 */
> + 43 42 59 /* i2c, serial0, spi */
> + 47 63 62 /* gpio, tdm */
> + 20 21 22 23 /* dma */
> + 03 02 /* mdio */
> + 29 30 34 /* enet0-queue-group0 */
> + 17 18 24 /* enet0-queue-group1 */
> + 35 36 40 /* enet1-queue-group0 */
> + 51 52 67 /* enet1-queue-group1 */
> + 28 72 45 58 /* usb, sdhci, crypto */
> + 0xb0 0xb1 0xb2 /* message */
> + 0xb3 0xb4 0xb5
> + 0xb6 0xb7
> + 0xe0 0xe1 0xe2 /* msi */
> + 0xe3 0xe4 0xe5
> + 0xe6 0xe7 /* sdhci, crypto , pci */
> + >;
> + pic-no-reset;
> + };
Besides what Timur said, do we really need protected-sources now that we
have pic-no-reset?
-Scott
^ permalink raw reply
* Re: [PATCH] PCI: Add pcie_irq=other to enable non MSI/INTx interrupt for port service driver
From: Kumar Gala @ 2012-07-10 15:49 UTC (permalink / raw)
To: Scott Wood
Cc: bhelgaas@google.com, Liu Shengzhou-B36685,
linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org,
Wood Scott-B07421
In-Reply-To: <4FFC4AD0.3070201@freescale.com>
On Jul 10, 2012, at 10:31 AM, Scott Wood wrote:
> On 07/10/2012 01:13 AM, Liu Shengzhou-B36685 wrote:
>>=20
>>=20
>>> -----Original Message-----
>>> From: Wood Scott-B07421
>>> Sent: Tuesday, July 10, 2012 12:39 AM
>>> To: Liu Shengzhou-B36685
>>> Cc: bhelgaas@google.com; linux-pci@vger.kernel.org; linuxppc-
>>> dev@lists.ozlabs.org
>>> Subject: Re: [PATCH] PCI: Add pcie_irq=3Dother to enable non =
MSI/INTx interrupt
>>> for port service driver
>>>=20
>>> On 07/09/2012 05:49 AM, Shengzhou Liu wrote:
>>>> On some platforms, in RC mode, root port has neither MSI/MSI-X nor
>>>> INTx interrupt generated, which are available only in EP mode on =
those
>>> platform.
>>>> In this case, we try to use other interrupt if supported (i.e. =
there
>>>> is the shared error interrupt on platform P1010, P3041, P4080, etc) =
to
>>>> have AER, Hot-plug, etc, services to work.
>>>>=20
>>>> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
>>>> ---
>>>> Documentation/kernel-parameters.txt | 4 ++++
>>>> drivers/pci/pcie/portdrv_core.c | 19 +++++++++++++++++++
>>>> 2 files changed, 23 insertions(+), 0 deletions(-)
>>>>=20
>>>> diff --git a/Documentation/kernel-parameters.txt
>>>> b/Documentation/kernel-parameters.txt
>>>> index a92c5eb..af97c81 100644
>>>> --- a/Documentation/kernel-parameters.txt
>>>> +++ b/Documentation/kernel-parameters.txt
>>>> @@ -2218,6 +2218,10 @@ bytes respectively. Such letter suffixes can =
also be
>>> entirely omitted.
>>>> nomsi Do not use MSI for native PCIe PME signaling =
(this makes
>>>> all PCIe root ports use INTx for all services).
>>>>=20
>>>> + pcie_irq=3D [PCIE] Native PCIe root port interrupt options:
>>>> + other Try to use other interrupt when root port has
>>>> + neither MSI/MSI-X nor INTx support.
>>>=20
>>> Why does the user need to specify this? Shouldn't this be a matter =
of
>>> communication between kernel internals?
>>>=20
>>=20
>> The "other interrupt" appears a non-standard interrupt way compared =
to MSI/MSI-X and INTx in point of PCIe spec.
>=20
> It still shouldn't be the user's responsibility to pass this in.
I agree with Scott, this should be done in board code or as a PCI fixup, =
not as a command line arg.
>> The intent of specifying this is to have an intervention and
>> confirmation manually to avoid causing unexpected issue on some
>> unknown platforms.
>>=20
>> I'm glad to remove the specified kernel parameter if it would be =
accepted upstream.
>=20
> Hopefully someone will comment if there is harm in doing this
> unconditionally. If there is, then we should handle this via a quirk =
or
> similar mechanism.
>=20
> -Scott
If we need to do it via quirk, wondering if we can use the pci_dev_flags =
and set the flag in a quirk.
- k=
^ permalink raw reply
* Re: [PATCH] PCI: Add pcie_irq=other to enable non MSI/INTx interrupt for port service driver
From: Scott Wood @ 2012-07-10 15:31 UTC (permalink / raw)
To: Liu Shengzhou-B36685
Cc: bhelgaas@google.com, Wood Scott-B07421,
linuxppc-dev@lists.ozlabs.org, linux-pci@vger.kernel.org
In-Reply-To: <3F453DDFF675A64A89321A1F3528102176B4BF@039-SN1MPN1-003.039d.mgd.msft.net>
On 07/10/2012 01:13 AM, Liu Shengzhou-B36685 wrote:
>
>
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Tuesday, July 10, 2012 12:39 AM
>> To: Liu Shengzhou-B36685
>> Cc: bhelgaas@google.com; linux-pci@vger.kernel.org; linuxppc-
>> dev@lists.ozlabs.org
>> Subject: Re: [PATCH] PCI: Add pcie_irq=other to enable non MSI/INTx interrupt
>> for port service driver
>>
>> On 07/09/2012 05:49 AM, Shengzhou Liu wrote:
>>> On some platforms, in RC mode, root port has neither MSI/MSI-X nor
>>> INTx interrupt generated, which are available only in EP mode on those
>> platform.
>>> In this case, we try to use other interrupt if supported (i.e. there
>>> is the shared error interrupt on platform P1010, P3041, P4080, etc) to
>>> have AER, Hot-plug, etc, services to work.
>>>
>>> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
>>> ---
>>> Documentation/kernel-parameters.txt | 4 ++++
>>> drivers/pci/pcie/portdrv_core.c | 19 +++++++++++++++++++
>>> 2 files changed, 23 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/Documentation/kernel-parameters.txt
>>> b/Documentation/kernel-parameters.txt
>>> index a92c5eb..af97c81 100644
>>> --- a/Documentation/kernel-parameters.txt
>>> +++ b/Documentation/kernel-parameters.txt
>>> @@ -2218,6 +2218,10 @@ bytes respectively. Such letter suffixes can also be
>> entirely omitted.
>>> nomsi Do not use MSI for native PCIe PME signaling (this makes
>>> all PCIe root ports use INTx for all services).
>>>
>>> + pcie_irq= [PCIE] Native PCIe root port interrupt options:
>>> + other Try to use other interrupt when root port has
>>> + neither MSI/MSI-X nor INTx support.
>>
>> Why does the user need to specify this? Shouldn't this be a matter of
>> communication between kernel internals?
>>
>
> The "other interrupt" appears a non-standard interrupt way compared to MSI/MSI-X and INTx in point of PCIe spec.
It still shouldn't be the user's responsibility to pass this in.
> The intent of specifying this is to have an intervention and
> confirmation manually to avoid causing unexpected issue on some
> unknown platforms.
>
> I'm glad to remove the specified kernel parameter if it would be accepted upstream.
Hopefully someone will comment if there is harm in doing this
unconditionally. If there is, then we should handle this via a quirk or
similar mechanism.
-Scott
^ permalink raw reply
* Re: [PATCH] powerpc: select PPC_CLOCK unconditionally for FSL_SOC
From: Kumar Gala @ 2012-07-10 12:24 UTC (permalink / raw)
To: Shawn Guo; +Cc: alsa-devel, linuxppc-dev, Timur Tabi
In-Reply-To: <1333085936-8977-1-git-send-email-shawn.guo@linaro.org>
On Mar 30, 2012, at 12:38 AM, Shawn Guo wrote:
> Freescale PowerPC SoCs share a number of IP blocks with Freescale
> ARM/IMX SoCs, FlexCAN, SSI, FEC, eSDHC, USB, etc. There are some
> effort consolidating those drivers to make them work for both
> architectures.
>
> One outstanding difference between two architectures is ARM/IMX will
> turn off module clocks during platform initialization for power saving
> and expects drivers manage clocks using clk API, while PowerPC
> mostly does not do that, and thus does not always build in clk API.
>
> Listing all those driver Kconfig options in "select PPC_CLOCK if" seems
> not scalable for long term maintenance, and could easily introduce
> Kconfig recursive dependency. This patch chooses to select PPC_CLOCK
> unconditionally for FSL_SOC to always build clk API for PowerPC in.
>
> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
> ---
> arch/powerpc/Kconfig | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH] powerpc/dts: Add ucc uart support for p1025rdb
From: Kumar Gala @ 2012-07-10 12:57 UTC (permalink / raw)
To: Zhicheng; +Cc: linuxppc-dev
In-Reply-To: <1341906730-31300-1-git-send-email-B32736@freescale.com>
On Jul 10, 2012, at 2:52 AM, Zhicheng wrote:
> From: Zhicheng Fan <B32736@freescale.com>
>=20
> Signed-off-by: Zhicheng Fan <B32736@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/p1021si-post.dtsi | 16 ++++++++++-
> arch/powerpc/boot/dts/p1025rdb.dtsi | 40 =
+++++++++++++++++++++++++++
> 2 files changed, 55 insertions(+), 1 deletions(-)
applied to next
- k=20=
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/85xx: Create dts of each core in CAMP mode for P1021RDB-PC
From: Tabi Timur-B04825 @ 2012-07-10 12:25 UTC (permalink / raw)
To: Xu Jiucheng-B37781
Cc: McClintock Matthew-B29882, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1341909561-6591-2-git-send-email-Jiucheng.Xu@freescale.com>
On Tue, Jul 10, 2012 at 3:39 AM, Xu Jiucheng <Jiucheng.Xu@freescale.com> wr=
ote:
> Create the dts files for each core and splits the devices between
> the two cores for P1021RDB-PC.
>
> Core0 has l2, serial0, i2c, spi, gpio, tdm,dma, usb, eth0, eth1,
> sdhc, crypto, global-util, message, pci0, pci1, msi, crypto.
> Core1 has l2, serial1, eth2.
>
> Signed-off-by: Xu Jiucheng <Jiucheng.Xu@freescale.com>
> Signed-off-by: Matthew McClintock <msm@freescale.com>
> ---
Do we really want AMP device trees upstream? They're very
application-specific, and AMP support has always been a hack. If
anything, I think we should be deleting AMP device trees from
upstream, not adding more.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* Re: [PATCH] P1021: set IReady in QE Microcode Upload
From: Kumar Gala @ 2012-07-10 12:24 UTC (permalink / raw)
To: Kokoris, Ioannis
Cc: linuxppc-dev@lists.ozlabs.org, timur@freescale.com,
linux-kernel@vger.kernel.org
In-Reply-To: <026483A88B848047A08C3F03E20822D0267B1F4A55@MCHP058A.global-ad.net>
On Nov 11, 2011, at 10:05 AM, Kokoris, Ioannis wrote:
> Hi,
>=20
> QE Microcode Initialization using qe_upload_microcode() does not work =
on P1021 if the IRAM-Ready register is not set after the microcode =
upload. This patch adds a definition for the "I-RAM Ready" register and =
sets it uppon microcode upload completion.
>=20
>=20
> Signed-off-by: Ioannis Kokkoris =
<ioannis.kokoris@siemens-enterprise.com>
>=20
applied to next
- k=
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/mpc8572ds: Update the MSI interrupts into 4-cell format
From: Kumar Gala @ 2012-07-10 12:24 UTC (permalink / raw)
To: Jia Hongtao; +Cc: linuxppc-dev
In-Reply-To: <1341900506-23401-2-git-send-email-B38951@freescale.com>
On Jul 10, 2012, at 1:08 AM, Jia Hongtao wrote:
> With 2-cell format interrupts of MSI PCIe ethernet card can not work.
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> ---
> arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts | 8 ++++----
> arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | 8 ++++----
> 2 files changed, 8 insertions(+), 8 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/mpc8572ds: Fix eTSEC is not available on core1 of AMP boot issue
From: Kumar Gala @ 2012-07-10 12:24 UTC (permalink / raw)
To: Jia Hongtao; +Cc: linuxppc-dev
In-Reply-To: <1341900506-23401-1-git-send-email-B38951@freescale.com>
On Jul 10, 2012, at 1:08 AM, Jia Hongtao wrote:
> The issue log on core1 is:
> root@mpc8572ds:~# ifconfig eth0 10.192.208.244
> net eth0: could not attach to PHY
> SIOCSIFFLAGS: No such device
>
> To attach PHY node mdio@24520 should not be disabled in dts of core1.
> Because all PHYs are controlled through this node as follows:
>
> mdio@24520 {
> phy0: ethernet-phy@0 {
> interrupts = <10 1 0 0>;
> reg = <0x0>;
> };
> phy1: ethernet-phy@1 {
> interrupts = <10 1 0 0>;
> reg = <0x1>;
> };
> phy2: ethernet-phy@2 {
> interrupts = <10 1 0 0>;
> reg = <0x2>;
> };
> phy3: ethernet-phy@3 {
> interrupts = <10 1 0 0>;
> reg = <0x3>;
> };
>
> tbi0: tbi-phy@11 {
> reg = <0x11>;
> device_type = "tbi-phy";
> };
> };
>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> ---
> arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts | 3 ---
> 1 files changed, 0 insertions(+), 3 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH 2/2][v2] powerpc/watchdog: replace CONFIG_FSL_BOOKE with CONFIG_PPC_FSL_BOOK3E
From: Kumar Gala @ 2012-07-10 12:24 UTC (permalink / raw)
To: Shaohui Xie; +Cc: linuxppc-dev, linux-watchdog
In-Reply-To: <1336714420-2394-1-git-send-email-Shaohui.Xie@freescale.com>
On May 11, 2012, at 12:33 AM, Shaohui Xie wrote:
> CONFIG_FSL_BOOKE is only defined in 32-bit, CONFIG_PPC_FSL_BOOK3E is
> defined in both 32-bit and 64-bit, so use CONFIG_PPC_FSL_BOOK3E to make
> driver work in 32-bit & 64-bit.
>
> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
> ---
> changes for v2:
> use PPC_FSL_BOOK3E instead of FSL_SOC_BOOKE.
>
> drivers/watchdog/Kconfig | 8 ++++----
> drivers/watchdog/booke_wdt.c | 4 ++--
> 2 files changed, 6 insertions(+), 6 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH 2/3 v2] powerpc/mpic: Use the MPIC_LARGE_VECTORS flag for FSL MPIC.
From: Kumar Gala @ 2012-07-10 12:23 UTC (permalink / raw)
To: Varun Sethi; +Cc: linuxppc-dev
In-Reply-To: <1341823595-15696-1-git-send-email-Varun.Sethi@freescale.com>
On Jul 9, 2012, at 3:46 AM, Varun Sethi wrote:
> We should use the MPIC_LARG_VECTORS flag while intializing the MPIC.
> This prevents us from eating in to hardware vector number space (MSIs)
> while setting up internal sources.
>
> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
> ---
> arch/powerpc/sysdev/mpic.c | 2 +-
> 1 files changed, 1 insertions(+), 1 deletions(-)
applied to next
- k
^ permalink raw reply
* Re: [PATCH v2 1/2] powerpc/e500: make load_up_spe a normal fuction
From: Kumar Gala @ 2012-07-10 12:23 UTC (permalink / raw)
To: Olivia Yin; +Cc: Liu Yu, linuxppc-dev, kvm, kvm-ppc
In-Reply-To: <1330564819-11139-1-git-send-email-hong-hua.yin@freescale.com>
On Feb 29, 2012, at 7:20 PM, Olivia Yin wrote:
> From: Liu Yu <yu.liu@freescale.com>
>=20
> So that we can call it when improving SPE switch like book3e did for =
fp switch.
>=20
> Signed-off-by: Liu Yu <yu.liu@freescale.com>
> Signed-off-by: Olivia Yin <hong-hua.yin@freescale.com>
> ---
> v2: add Signed-off-by
>=20
> arch/powerpc/kernel/head_fsl_booke.S | 23 ++++++-----------------
> 1 files changed, 6 insertions(+), 17 deletions(-)
applied to next
- k=
^ permalink raw reply
* [PATCH] USB: ehci-fsl: Update ifdef check to work on 64-bit ppc
From: Kumar Gala @ 2012-07-10 11:58 UTC (permalink / raw)
To: Greg KH; +Cc: linuxppc-dev, linux-usb, stern, linux-kernel
We need to use CONFIG_FSL_SOC_BOOKE instead of CONFIG_PPC_85xx as
CONFIG_PPC_85xx isn't defined when we build support for 64-bit embedded
FSL PPC SoCs.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
drivers/usb/host/ehci-fsl.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 4336257..f002525 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -313,7 +313,7 @@ static void ehci_fsl_usb_setup(struct ehci_hcd *ehci)
}
if (pdata->have_sysif_regs) {
-#ifdef CONFIG_PPC_85xx
+#ifdef CONFIG_FSL_SOC_BOOKE
out_be32(non_ehci + FSL_SOC_USB_PRICTRL, 0x00000008);
out_be32(non_ehci + FSL_SOC_USB_AGECNTTHRSH, 0x00000080);
#else
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH] powerpc/85xx: Add dts files for P1021RDB-PC board
From: Kumar Gala @ 2012-07-10 11:48 UTC (permalink / raw)
To: Xu Jiucheng; +Cc: Matthew McClintock, linuxppc-dev
In-Reply-To: <1341909561-6591-1-git-send-email-Jiucheng.Xu@freescale.com>
On Jul 10, 2012, at 3:39 AM, Xu Jiucheng wrote:
> P1021RDB-PC Overview
> -----------------
> 1Gbyte DDR3 (on board DDR)
> 16Mbyte NOR flash
> 32Mbyte eSLC NAND Flash
> 256 Kbit M24256 I2C EEPROM
> 128 Mbit SPI Flash memory
> Real-time clock on I2C bus
> SD/MMC connector to interface with the SD memory card
> PCIex
> - x1 PCIe slot or x1 PCIe to dual SATA controller
> - x1 mini-PCIe slot
> USB 2.0
> - ULPI PHY interface: SMSC USB3300 USB PHY and Genesys Logic=92s =
GL850A
> - Two USB2.0 Type A receptacles
> - One USB2.0 signal to Mini PCIe slot
> eTSEC1: Connected to RGMII PHY VSC7385
> eTSEC2: Connected to SGMII PHY VSC8221
> eTSEC3: Connected to SGMII PHY AR8021
> DUART interface: supports two UARTs up to 115200 bps for console =
display
>=20
> Signed-off-by: Xu Jiucheng <Jiucheng.Xu@freescale.com>
> Signed-off-by: Matthew McClintock <msm@freescale.com>
> ---
> arch/powerpc/boot/dts/p1021rdb-pc.dtsi | 236 =
+++++++++++++++++++++++++++++
> arch/powerpc/boot/dts/p1021rdb-pc_32b.dts | 96 ++++++++++++
> arch/powerpc/boot/dts/p1021rdb-pc_36b.dts | 96 ++++++++++++
> arch/powerpc/boot/dts/p1021rdb.dts | 96 ------------
> arch/powerpc/boot/dts/p1021rdb.dtsi | 236 =
-----------------------------
> arch/powerpc/boot/dts/p1021rdb_36b.dts | 96 ------------
> 6 files changed, 428 insertions(+), 428 deletions(-)
> create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc.dtsi
> create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
> create mode 100644 arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
> delete mode 100644 arch/powerpc/boot/dts/p1021rdb.dts
> delete mode 100644 arch/powerpc/boot/dts/p1021rdb.dtsi
> delete mode 100644 arch/powerpc/boot/dts/p1021rdb_36b.dts
Do we really need a 32 & 36 bit device tree for this board? Isnt the =
memory fixed so why not just have 32b?
Also, why are you removing the dts for the older P1021RDB??
- k=
^ permalink raw reply
* Re: [PATCH 3/3 v2] powerpc/mpic: FSL MPIC error interrupt support.
From: Kumar Gala @ 2012-07-10 11:46 UTC (permalink / raw)
To: Sethi Varun-B16395
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org,
Hamciuc Bogdan-BHAMCIU1
In-Reply-To: <C5ECD7A89D1DC44195F34B25E172658D139C36@039-SN2MPN1-013.039d.mgd.msft.net>
On Jul 10, 2012, at 4:39 AM, Sethi Varun-B16395 wrote:
>=20
>=20
>> -----Original Message-----
>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>> Sent: Tuesday, July 10, 2012 7:17 AM
>> To: Wood Scott-B07421
>> Cc: Sethi Varun-B16395; Hamciuc Bogdan-BHAMCIU1; linuxppc-
>> dev@lists.ozlabs.org
>> Subject: Re: [PATCH 3/3 v2] powerpc/mpic: FSL MPIC error interrupt
>> support.
>>=20
>>=20
>> On Jul 9, 2012, at 3:22 PM, Scott Wood wrote:
>>=20
>>> On 07/09/2012 02:03 PM, Kumar Gala wrote:
>>>>=20
>>>> On Jul 9, 2012, at 3:47 AM, Varun Sethi wrote:
>>>>=20
>>>>> +int mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum) =
{
>>>>=20
>>>> Why can't we do this during mpic_init() time?
>>>=20
>>> Are you willing to hardcode that IRQ 16 is the error interrupt,
>>> without waiting to see an intspec?
>>=20
>> I'm torn, but the bit of code in mpic_host_xlate that calls
>> mpic_err_int_init() is just ugly.
>>=20
>> We could consider it similar to how we assume IPIs.
> [Sethi Varun-B16395] I don't understand this point.
>=20
> -Varun
Just that we don't parse the .dts to get the IPI interrupts. They are =
just assumed as part of being OpenPIC. So, I was suggesting if you set =
the MPIC_FSL_HAS_EIMR flag, we just assume the IRQ #, rather than =
parsing the .dts.
- k
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/fsl: Update corenet64_smp_defconfig
From: Kumar Gala @ 2012-07-10 11:44 UTC (permalink / raw)
To: Shengzhou Liu; +Cc: Harninder Rai, Laurentiu Tudor, linuxppc-dev, Minghuan Lian
In-Reply-To: <1341916802-19619-2-git-send-email-Shengzhou.Liu@freescale.com>
On Jul 10, 2012, at 5:40 AM, Shengzhou Liu wrote:
> * Enable USB, MMC, SATA, MTD, NAND, PAMU, RTC
> * Enable FSL RAID on P5020
> * Enable general RAID features (MD + async-tx)
> * Enable RTC on P2041RDB
> * Enable UIO SRIO & UIO DMA
> * Enable USDPAA SHMEM driver
> * Enable ePAPR HV support
> * Enable PCI-E support
>=20
> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
> Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com>
> Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> arch/powerpc/configs/corenet64_smp_defconfig | 94 =
++++++++++++++++++++++++--
> 1 files changed, 89 insertions(+), 5 deletions(-)
Is this patch really against upstream? We dont have PAMU, UIO =
SRIO/DMA,etc upstream.
- k=
^ permalink raw reply
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