* Re: [PATCH 3/3 v3] powerpc/mpic: FSL MPIC error interrupt support.
From: Kumar Gala @ 2012-08-03 19:13 UTC (permalink / raw)
To: Scott Wood; +Cc: Bogdan Hamciuc, Varun Sethi, linuxppc-dev
In-Reply-To: <501C0007.8070209@freescale.com>
On Aug 3, 2012, at 11:44 AM, Scott Wood wrote:
> On 08/03/2012 08:19 AM, Kumar Gala wrote:
>>=20
>> On Jul 31, 2012, at 9:42 AM, Varun Sethi wrote:
>>> + /* ioremap'ed base for error interrupt registers */
>>> + u32 __iomem *err_regs;
>>> + /* error interrupt config */
>>> + u32 err_int_config_done;
>>> +
>>=20
>> Is this really needed ?
>=20
> Probably a left over from when it was done on demand.
>=20
>>=20
>>> /* Protected sources */
>>> unsigned long *protected;
>>>=20
>>> @@ -370,6 +381,8 @@ struct mpic
>>> #define MPIC_NO_RESET 0x00004000
>>> /* Freescale MPIC (compatible includes "fsl,mpic") */
>>> #define MPIC_FSL 0x00008000
>>> +/* Freescale MPIC supports EIMR (error interrupt mask register)*/
>>> +#define MPIC_FSL_HAS_EIMR 0x00010000
>>=20
>> Can't we use BRR for this?
>=20
> BRR is used, and this is set as a result. Better than opencoding a =
BRR
> check a bunch of places...
I'm fine w/that, but didn't see where MPIC_FSL_HAS_EMIR was being set.. =
Just want to avoid the caller of mpic_alloc() having to pass it in.
- k=
^ permalink raw reply
* RE: [PATCH 3/3 v3] powerpc/mpic: FSL MPIC error interrupt support.
From: Sethi Varun-B16395 @ 2012-08-03 18:52 UTC (permalink / raw)
To: Kumar Gala; +Cc: linuxppc-dev@lists.ozlabs.org, Hamciuc Bogdan-BHAMCIU1
In-Reply-To: <609EA81E-EC64-4539-B36B-E57525CE2492@kernel.crashing.org>
> -----Original Message-----
> From: Kumar Gala [mailto:galak@kernel.crashing.org]
> Sent: Friday, August 03, 2012 6:49 PM
> To: Sethi Varun-B16395
> Cc: linuxppc-dev@lists.ozlabs.org; Hamciuc Bogdan-BHAMCIU1
> Subject: Re: [PATCH 3/3 v3] powerpc/mpic: FSL MPIC error interrupt
> support.
>=20
>=20
> On Jul 31, 2012, at 9:42 AM, Varun Sethi wrote:
>=20
> > All SOC device error interrupts are muxed and delivered to the core as
> > a single MPIC error interrupt. Currently all the device drivers
> > requiring access to device errors have to register for the MPIC error
> interrupt as a shared interrupt.
> >
> > With this patch we add interrupt demuxing capability in the mpic
> > driver, allowing device drivers to register for their individual error
> > interrupts. This is achieved by handling error interrupts in a cascaded
> fashion.
> >
> > MPIC error interrupt is handled by the "error_int_handler", which
> > subsequently demuxes it using the EISR and delivers it to the
> respective drivers.
> >
> > The error interrupt capability is dependent on the MPIC EIMR register,
> > which was introduced in FSL MPIC version 4.1 (P4080 rev2). So, error
> > interrupt demuxing capability is dependent on the MPIC version and can
> be used for versions >=3D 4.1.
> >
> > Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
> > Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> [In the
> > initial version of the patch we were using handle_simple_irq as the
> > handler for cascaded error interrupts, this resulted in issues in case
> > of threaded isrs (with RT kernel). This issue was debugged by Bogdan
> > and decision was taken to use the handle_level_irq handler]
>=20
> [ fix commit message to wrap at 75 char columns ]
>=20
> >
> > ---
> > arch/powerpc/include/asm/mpic.h | 13 +++
> > arch/powerpc/sysdev/Makefile | 2 +-
> > arch/powerpc/sysdev/fsl_mpic_err.c | 152
> ++++++++++++++++++++++++++++++++++++
> > arch/powerpc/sysdev/mpic.c | 41 ++++++++++-
> > arch/powerpc/sysdev/mpic.h | 22 +++++
> > 5 files changed, 228 insertions(+), 2 deletions(-) create mode 100644
> > arch/powerpc/sysdev/fsl_mpic_err.c
> >
> > diff --git a/arch/powerpc/include/asm/mpic.h
> > b/arch/powerpc/include/asm/mpic.h index e14d35d..5cc8000 100644
> > --- a/arch/powerpc/include/asm/mpic.h
> > +++ b/arch/powerpc/include/asm/mpic.h
> > @@ -118,6 +118,9 @@
> > #define MPIC_MAX_CPUS 32
> > #define MPIC_MAX_ISU 32
> >
> > +#define MPIC_MAX_ERR 32
> > +#define MPIC_FSL_ERR_INT 16
> > +
> > /*
> > * Tsi108 implementation of MPIC has many differences from the original
> > one */ @@ -270,6 +273,7 @@ struct mpic
> > struct irq_chip hc_ipi;
> > #endif
> > struct irq_chip hc_tm;
> > + struct irq_chip hc_err;
> > const char *name;
> > /* Flags */
> > unsigned int flags;
> > @@ -283,6 +287,8 @@ struct mpic
> > /* vector numbers used for internal sources (ipi/timers) */
> > unsigned int ipi_vecs[4];
> > unsigned int timer_vecs[8];
> > + /* vector numbers used for FSL MPIC error interrupts */
> > + unsigned int err_int_vecs[MPIC_MAX_ERR];
> >
> > /* Spurious vector to program into unused sources */
> > unsigned int spurious_vec;
> > @@ -306,6 +312,11 @@ struct mpic
> > struct mpic_reg_bank cpuregs[MPIC_MAX_CPUS];
> > struct mpic_reg_bank isus[MPIC_MAX_ISU];
> >
> > + /* ioremap'ed base for error interrupt registers */
> > + u32 __iomem *err_regs;
> > + /* error interrupt config */
> > + u32 err_int_config_done;
> > +
>=20
> Is this really needed ?
[Sethi Varun-B16395] check for verifying if mpic_err_int_init was successfu=
l or not.
>=20
> > /* Protected sources */
> > unsigned long *protected;
> >
> > @@ -370,6 +381,8 @@ struct mpic
> > #define MPIC_NO_RESET 0x00004000
> > /* Freescale MPIC (compatible includes "fsl,mpic") */
> > #define MPIC_FSL 0x00008000
> > +/* Freescale MPIC supports EIMR (error interrupt mask register)*/
> > +#define MPIC_FSL_HAS_EIMR 0x00010000
>=20
> Can't we use BRR for this?
[Sethi Varun-B16395] This flag is set based on the BRR check. This is check=
ed at various places.
>=20
> >
> > /* MPIC HW modification ID */
> > #define MPIC_REGSET_MASK 0xf0000000
> > diff --git a/arch/powerpc/sysdev/Makefile
> > b/arch/powerpc/sysdev/Makefile index 1bd7ecb..a57600b 100644
> > --- a/arch/powerpc/sysdev/Makefile
> > +++ b/arch/powerpc/sysdev/Makefile
> > @@ -15,7 +15,7 @@ obj-$(CONFIG_PPC_DCR_NATIVE) +=3D dcr-low.o
> > obj-$(CONFIG_PPC_PMI) +=3D pmi.o
> > obj-$(CONFIG_U3_DART) +=3D dart_iommu.o
> > obj-$(CONFIG_MMIO_NVRAM) +=3D mmio_nvram.o
> > -obj-$(CONFIG_FSL_SOC) +=3D fsl_soc.o
> > +obj-$(CONFIG_FSL_SOC) +=3D fsl_soc.o fsl_mpic_err.o
> > obj-$(CONFIG_FSL_PCI) +=3D fsl_pci.o $(fsl-msi-obj-y)
> > obj-$(CONFIG_FSL_PMC) +=3D fsl_pmc.o
> > obj-$(CONFIG_FSL_LBC) +=3D fsl_lbc.o
> > diff --git a/arch/powerpc/sysdev/fsl_mpic_err.c
> > b/arch/powerpc/sysdev/fsl_mpic_err.c
> > new file mode 100644
> > index 0000000..1ebfa36
> > --- /dev/null
> > +++ b/arch/powerpc/sysdev/fsl_mpic_err.c
> > @@ -0,0 +1,152 @@
> > +/*
> > + * Copyright (C) 2012 Freescale Semiconductor, Inc.
> > + *
> > + * Author: Varun Sethi <varun.sethi@freescale.com>
> > + *
> > + * This program is free software; you can redistribute it and/or
> > + * modify it under the terms of the GNU General Public License
> > + * as published by the Free Software Foundation; version 2 of the
> > + * License.
> > + *
> > + */
> > +
> > +#include <linux/irq.h>
> > +#include <linux/smp.h>
> > +#include <linux/interrupt.h>
> > +
> > +#include <asm/io.h>
> > +#include <asm/irq.h>
> > +#include <asm/mpic.h>
> > +
> > +#include "mpic.h"
> > +
> > +#define MPIC_ERR_INT_BASE 0x3900
> > +#define MPIC_ERR_INT_EISR 0x0000
> > +#define MPIC_ERR_INT_EIMR 0x0010
> > +
> > +static inline u32 mpic_fsl_err_read(u32 __iomem *base, unsigned int
> > +err_reg) {
> > + return in_be32(base + (err_reg >> 2)); }
> > +
> > +static inline void mpic_fsl_err_write(u32 __iomem *base, u32 value) {
> > + out_be32(base + (MPIC_ERR_INT_EIMR >> 2), value); }
> > +
> > +static void fsl_mpic_mask_err(struct irq_data *d) {
> > + u32 eimr;
> > + struct mpic *mpic =3D irq_data_get_irq_chip_data(d);
> > + unsigned int src =3D virq_to_hw(d->irq) - mpic->err_int_vecs[0];
> > +
> > + eimr =3D mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);
> > + eimr |=3D (1 << (31 - src));
> > + mpic_fsl_err_write(mpic->err_regs, eimr); }
> > +
> > +static void fsl_mpic_unmask_err(struct irq_data *d) {
> > + u32 eimr;
> > + struct mpic *mpic =3D irq_data_get_irq_chip_data(d);
> > + unsigned int src =3D virq_to_hw(d->irq) - mpic->err_int_vecs[0];
> > +
> > + eimr =3D mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);
> > + eimr &=3D ~(1 << (31 - src));
> > + mpic_fsl_err_write(mpic->err_regs, eimr); }
> > +
> > +static struct irq_chip fsl_mpic_err_chip =3D {
> > + .irq_disable =3D fsl_mpic_mask_err,
> > + .irq_mask =3D fsl_mpic_mask_err,
> > + .irq_unmask =3D fsl_mpic_unmask_err,
> > +};
> > +
> > +void mpic_setup_error_int(struct mpic *mpic, int intvec) {
> > + int i;
> > +
> > + mpic->err_regs =3D ioremap(mpic->paddr + MPIC_ERR_INT_BASE, 0x1000);
> > + if (!mpic->err_regs) {
> > + pr_err("could not map mpic error registers\n");
> > + return;
>=20
> we should propagate an error back up if ioremap failed.
[Sethi Varun-B16395] Should we fail mpic_alloc when this fails?
>=20
> > + }
> > + mpic->hc_err =3D fsl_mpic_err_chip;
> > + mpic->hc_err.name =3D mpic->name;
> > + mpic->flags |=3D MPIC_FSL_HAS_EIMR;
> > + /* allocate interrupt vectors for error interrupts */
> > + for (i =3D MPIC_MAX_ERR - 1; i >=3D 0; i--)
> > + mpic->err_int_vecs[i] =3D --intvec;
> > +
> > +}
> > +
> > +int mpic_map_error_int(struct mpic *mpic, unsigned int virq,
> > +irq_hw_number_t hw) {
> > + if ((mpic->flags & MPIC_FSL_HAS_EIMR) &&
> > + (hw >=3D mpic->err_int_vecs[0] &&
> > + hw <=3D mpic->err_int_vecs[MPIC_MAX_ERR - 1])) {
> > + WARN_ON(mpic->flags & MPIC_SECONDARY);
> > +
> > + pr_debug("mpic: mapping as Error Interrupt\n");
> > + irq_set_chip_data(virq, mpic);
> > + irq_set_chip_and_handler(virq, &mpic->hc_err,
> > + handle_level_irq);
> > + return 1;
> > + }
> > +
> > + return 0;
> > +}
> > +
> > +static irqreturn_t fsl_error_int_handler(int irq, void *data) {
> > + struct mpic *mpic =3D (struct mpic *) data;
> > + u32 eisr, eimr;
> > + int errint;
> > + unsigned int cascade_irq;
> > +
> > + eisr =3D mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EISR);
> > + eimr =3D mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);
> > +
> > + if (!(eisr & ~eimr))
> > + return IRQ_NONE;
> > +
> > + while (eisr) {
> > + errint =3D __builtin_clz(eisr);
> > + cascade_irq =3D irq_linear_revmap(mpic->irqhost,
> > + mpic->err_int_vecs[errint]);
> > + WARN_ON(cascade_irq =3D=3D NO_IRQ);
> > + if (cascade_irq !=3D NO_IRQ) {
> > + generic_handle_irq(cascade_irq);
> > + } else {
> > + eimr |=3D 1 << (31 - errint);
> > + mpic_fsl_err_write(mpic->err_regs, eimr);
> > + }
> > + eisr &=3D ~(1 << (31 - errint));
> > + }
> > +
> > + return IRQ_HANDLED;
> > +}
> > +
> > +int mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum) {
> > + unsigned int virq;
> > + int ret;
> > +
> > + virq =3D irq_create_mapping(mpic->irqhost, irqnum);
> > + if (virq =3D=3D NO_IRQ) {
> > + pr_err("Error interrupt setup failed\n");
> > + return 0;
> > + }
> > +
> > + /* Mask all error interrupts */
> > + mpic_fsl_err_write(mpic->err_regs, ~0);
> > +
> > + ret =3D request_irq(virq, fsl_error_int_handler, IRQF_NO_THREAD,
> > + "mpic-error-int", mpic);
> > + if (ret) {
> > + pr_err("Failed to register error interrupt handler\n");
> > + return 0;
> > + }
> > +
> > + return 1;
> > +}
> > diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> > index 7e32db7..2a0b632 100644
> > --- a/arch/powerpc/sysdev/mpic.c
> > +++ b/arch/powerpc/sysdev/mpic.c
> > @@ -1026,6 +1026,9 @@ static int mpic_host_map(struct irq_domain *h,
> unsigned int virq,
> > return 0;
> > }
> >
> > + if (mpic_map_error_int(mpic, virq, hw))
> > + return 0;
> > +
> > if (hw >=3D mpic->num_sources)
> > return -EINVAL;
> >
> > @@ -1085,7 +1088,16 @@ static int mpic_host_xlate(struct irq_domain *h,
> struct device_node *ct,
> > */
> > switch (intspec[2]) {
> > case 0:
> > - case 1: /* no EISR/EIMR support for now, treat as shared IRQ
> */
> > + break;
> > + case 1:
> > + if (!mpic->err_int_config_done)
> > + break;
> > +
>=20
> Under what case would we call mpic_host_xlate and have not called
> mpic_init?
>=20
[Sethi Varun-B16395] Never, but we shouldn't translate the error interrupt =
specifier
If mpic_err_int_init failed.
-Varun
^ permalink raw reply
* Re: [PATCH 4/4] powerpc/booke: Add CPU_FTR_EMB_HV check for e5500.
From: Kumar Gala @ 2012-08-03 18:01 UTC (permalink / raw)
To: Varun Sethi; +Cc: linuxppc-dev, agraf, kvm-ppc, Mihai Caraman
In-Reply-To: <1341839041-17223-1-git-send-email-Varun.Sethi@freescale.com>
On Jul 9, 2012, at 8:04 AM, Varun Sethi wrote:
> Added CPU_FTR_EMB_HV feature check for e550.
>
> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
> Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
> ---
> arch/powerpc/kernel/cpu_setup_fsl_booke.S | 6 ++++++
> 1 files changed, 6 insertions(+), 0 deletions(-)
[ fixed typo e550 -> e5500 ]
applied to next
- k
^ permalink raw reply
* Re: [PATCH 3/3 v3] powerpc/mpic: FSL MPIC error interrupt support.
From: Scott Wood @ 2012-08-03 16:44 UTC (permalink / raw)
To: Kumar Gala; +Cc: Bogdan Hamciuc, Varun Sethi, linuxppc-dev
In-Reply-To: <609EA81E-EC64-4539-B36B-E57525CE2492@kernel.crashing.org>
On 08/03/2012 08:19 AM, Kumar Gala wrote:
>
> On Jul 31, 2012, at 9:42 AM, Varun Sethi wrote:
>> + /* ioremap'ed base for error interrupt registers */
>> + u32 __iomem *err_regs;
>> + /* error interrupt config */
>> + u32 err_int_config_done;
>> +
>
> Is this really needed ?
Probably a left over from when it was done on demand.
>
>> /* Protected sources */
>> unsigned long *protected;
>>
>> @@ -370,6 +381,8 @@ struct mpic
>> #define MPIC_NO_RESET 0x00004000
>> /* Freescale MPIC (compatible includes "fsl,mpic") */
>> #define MPIC_FSL 0x00008000
>> +/* Freescale MPIC supports EIMR (error interrupt mask register)*/
>> +#define MPIC_FSL_HAS_EIMR 0x00010000
>
> Can't we use BRR for this?
BRR is used, and this is set as a result. Better than opencoding a BRR
check a bunch of places...
-Scott
^ permalink raw reply
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Scott Wood @ 2012-08-03 16:27 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1343988851-884-4-git-send-email-B38951@freescale.com>
On 08/03/2012 05:14 AM, Jia Hongtao wrote:
> -void __devinit fsl_pci_init(void)
> +/* Checkout if PCI contains ISA node */
> +static int of_pci_has_isa(struct device_node *pci_node)
> +{
> + struct device_node *np;
> + int ret = 0;
> +
> + if (!pci_node)
> + return 0;
> +
> + read_lock(&devtree_lock);
> + np = pci_node->allnext;
> +
> + /* Only scan the children of PCI node */
> + for (; np != pci_node->sibling; np = np->allnext) {
> + if (np->type && (of_node_cmp(np->type, "isa") == 0)
> + && of_node_get(np)) {
> + ret = 1;
> + break;
> + }
> + }
> +
> + of_node_put(pci_node);
> + read_unlock(&devtree_lock);
> +
> + return ret;
> +}
Why do you keep insisting on substituting your ISA search code here?
What advantages does it have over the code that is already there? It
unnecessarily digs into the internals of the tree representation.
> +
> +static int __devinit fsl_pci_probe(struct platform_device *pdev)
> {
> int ret;
> - struct device_node *node;
> struct pci_controller *hose;
> - dma_addr_t max = 0xffffffff;
> + int is_primary = 0;
>
> - /* Callers can specify the primary bus using other means. */
> if (!fsl_pci_primary) {
> - /* If a PCI host bridge contains an ISA node, it's primary. */
> - node = of_find_node_by_type(NULL, "isa");
> - while ((fsl_pci_primary = of_get_parent(node))) {
> - of_node_put(node);
> - node = fsl_pci_primary;
> -
> - if (of_match_node(pci_ids, node))
> - break;
> - }
> + is_primary = of_pci_has_isa(pdev->dev.of_node);
> + if (is_primary)
> + fsl_pci_primary = pdev->dev.of_node;
> }
As I explained before, this has to be done globally, not from the probe
function, so we can assign a default primary bus if there isn't any ISA.
There are bugs in the Linux PPC PCI code relating to not having any
primary bus.
-Scott
^ permalink raw reply
* Re: [PATCH V4 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary
From: Kumar Gala @ 2012-08-03 16:15 UTC (permalink / raw)
To: Li Yang
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472,
Jia Hongtao-B38951
In-Reply-To: <CADRPPNQZZ5wWUCzhMsOxCgVhK14sb9ughReM_6CzG47YE9J4ew@mail.gmail.com>
On Aug 3, 2012, at 9:42 AM, Li Yang wrote:
> On Fri, Aug 3, 2012 at 8:38 PM, Kumar Gala <galak@kernel.crashing.org> =
wrote:
>>=20
>> On Aug 2, 2012, at 9:21 PM, Jia Hongtao-B38951 wrote:
>>=20
>>>>=20
>>>> -----Original Message-----
>>>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>>>> Sent: Thursday, August 02, 2012 8:55 PM
>>>> To: Jia Hongtao-B38951
>>>> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li =
Yang-R58472
>>>> Subject: Re: [PATCH V4 2/3] powerpc/swiotlb: Enable at early stage =
and
>>>> disable if not necessary
>>>>=20
>>>>=20
>>>> On Aug 2, 2012, at 6:42 AM, Jia Hongtao wrote:
>>>>=20
>>>>> Remove the dependency on PCI initialization for SWIOTLB =
initialization.
>>>>> So that PCI can be initialized at proper time.
>>>>>=20
>>>>> SWIOTLB is partly determined by PCI inbound/outbound map which is
>>>> assigned
>>>>> in PCI initialization. But swiotlb_init() should be done at the =
stage
>>>> of
>>>>> mem_init() which is much earlier than PCI initialization. So we =
reserve
>>>> the
>>>>> memory for SWIOTLB first and free it if not necessary.
>>>>>=20
>>>>> All boards are converted to fit this change.
>>>>>=20
>>>>> Signed-off-by: Jia Hongtao <B38951@freescale.com>
>>>>> Signed-off-by: Li Yang <leoli@freescale.com>
>>>>> ---
>>>>=20
>>>> This doesn't seem like it addresses our issue w/regards to not =
being able
>>>> to map all of memory from PCI.
>>>=20
>>> PCI init will determine ppc_swiotlb_enable due to PCI map. =
swiotlb_late_init
>>> will handle all swiotlb things depend on the result of pci init.
>>=20
>> Think about the case that we have 4095M of memory & 1G of PCI memory =
mapped space. The old code would enable swiotlb for this case since we =
would NOT be able to DMA to all 4095M of memory. The patch does not =
handle this case correctly.
>=20
> The patch can handle it. The ppc_swiotlb_enable is still being set in
> fsl_pci_init() if there is 1G of PCI memory mapped space. It is
> after next patch that the ppc_swiotlb_enable is being set in the PCI
> probe() routine.
>=20
> Leo
Gotcha. I was thinking the swiotlb_init(0) was:
if (ppc_swiotlb_enable)
swiotlb_init(0)
Now I see, we call it unconditionally, than fixup in swiotlb_late_init
- k=
^ permalink raw reply
* Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Scott Wood @ 2012-08-03 16:09 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A359AF@039-SN1MPN1-002.039d.mgd.msft.net>
On 08/02/2012 09:20 PM, Jia Hongtao-B38951 wrote:
>
>
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Friday, August 03, 2012 4:19 AM
>> To: Jia Hongtao-B38951
>> Cc: linuxppc-dev@lists.ozlabs.org; galak@kernel.crashing.org; Wood Scott-
>> B07421; Li Yang-R58472
>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>> Why are you eliminating the uli lookup? We don't want to call
>> uli_exclude_device on boards that don't have a uli.
>>
>> -Scott
>
> I found out that all 85xx_ds boards (mpc8572ds, mpc8544ds, p2020ds) have
> ULI.
Perhaps all boards currently handled by this file do, but it's not true
for all mpc85xx_ds boards. I think we could handle mpc8536ds here if we
didn't hardcode the uli assumption. Not critical, but would be nice to
make this more device tree driven.
p1022ds OTOH is weird enough that it deserves its own board file.
> Also in platform driver fsl_pci_primary is determined at arch_initcall
> which means at the stage of board_setup_arch fsl_pci_primary is not ready.
You could export the primary detection function so that boards can call
it early if they want.
-Scott
^ permalink raw reply
* Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Scott Wood @ 2012-08-03 16:03 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A35A2F@039-SN1MPN1-002.039d.mgd.msft.net>
On 08/02/2012 10:39 PM, Jia Hongtao-B38951 wrote:
>
>
>> -----Original Message-----
>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>> Sent: Thursday, August 02, 2012 8:24 PM
>> To: Jia Hongtao-B38951
>> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li Yang-R58472
>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>> You need to convert all boards to use fsl_pci_init before this patch.
>> Otherwise we'll end up with PCI getting initialized twice on boards.
>>
>> - k
>
> If we covert all boards with platform driver in this patch PCI will
> be initialized only once without converting all boards to use
> fsl_pci_init first.
Then we'd have to pick apart core changes from board changes when reviewing.
> If we convert all boards to use fsl_pci_init before this patch and
> convert them to use platform driver again after this patch. Then
> between this patch and next pci will be initialized twice too.
Why? That one patch should both create the platform driver and remove
the init from fsl_pci_init() -- except things like primary bus detection
which has to happen globally.
-Scott
^ permalink raw reply
* Threads inheriting debug state from parent threads
From: Luis Gustavo @ 2012-08-03 15:49 UTC (permalink / raw)
To: linuxppc-dev
Hi,
I'm actually chasing a problem with GDB and hw watchpoints for embedded
ppc targets.
If a thread X creates thread Y, is it expected that thread Y will
inherit all the debug state from thread X? Including, for example, any
hardware watchpoints/breakpoints that are set in thread X?
Thanks,
Luis
^ permalink raw reply
* Threads inheriting debug state from parent threads
From: Luis Gustavo @ 2012-08-03 16:01 UTC (permalink / raw)
To: linuxppc-dev
Hi,
I'm actually chasing a problem with GDB and hw watchpoints for embedded
ppc targets.
If a thread X creates thread Y, is it expected that thread Y will
inherit all the debug state from thread X? Including, for example, any
hardware watchpoints/breakpoints that are set in thread X?
Thanks,
Luis
^ permalink raw reply
* Threads inheriting debug state from parent threads
From: Luis Gustavo @ 2012-08-03 15:58 UTC (permalink / raw)
To: linuxppc-dev
*re-sending after subscribing to the list*
Hi,
I'm actually chasing a problem with GDB and hw watchpoints for embedded
ppc targets.
If a thread X creates thread Y, is it expected that thread Y will
inherit all the debug state from thread X? Including, for example, any
hardware watchpoints/breakpoints that are set in thread X?
Thanks,
Luis
^ permalink raw reply
* Re: [PATCH V4 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary
From: Li Yang @ 2012-08-03 14:42 UTC (permalink / raw)
To: Kumar Gala
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472,
Jia Hongtao-B38951
In-Reply-To: <4C5227D8-BF6D-45BE-9201-8A6CD30FFFE8@kernel.crashing.org>
On Fri, Aug 3, 2012 at 8:38 PM, Kumar Gala <galak@kernel.crashing.org> wrote:
>
> On Aug 2, 2012, at 9:21 PM, Jia Hongtao-B38951 wrote:
>
>>>
>>> -----Original Message-----
>>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>>> Sent: Thursday, August 02, 2012 8:55 PM
>>> To: Jia Hongtao-B38951
>>> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li Yang-R58472
>>> Subject: Re: [PATCH V4 2/3] powerpc/swiotlb: Enable at early stage and
>>> disable if not necessary
>>>
>>>
>>> On Aug 2, 2012, at 6:42 AM, Jia Hongtao wrote:
>>>
>>>> Remove the dependency on PCI initialization for SWIOTLB initialization.
>>>> So that PCI can be initialized at proper time.
>>>>
>>>> SWIOTLB is partly determined by PCI inbound/outbound map which is
>>> assigned
>>>> in PCI initialization. But swiotlb_init() should be done at the stage
>>> of
>>>> mem_init() which is much earlier than PCI initialization. So we reserve
>>> the
>>>> memory for SWIOTLB first and free it if not necessary.
>>>>
>>>> All boards are converted to fit this change.
>>>>
>>>> Signed-off-by: Jia Hongtao <B38951@freescale.com>
>>>> Signed-off-by: Li Yang <leoli@freescale.com>
>>>> ---
>>>
>>> This doesn't seem like it addresses our issue w/regards to not being able
>>> to map all of memory from PCI.
>>
>> PCI init will determine ppc_swiotlb_enable due to PCI map. swiotlb_late_init
>> will handle all swiotlb things depend on the result of pci init.
>
> Think about the case that we have 4095M of memory & 1G of PCI memory mapped space. The old code would enable swiotlb for this case since we would NOT be able to DMA to all 4095M of memory. The patch does not handle this case correctly.
The patch can handle it. The ppc_swiotlb_enable is still being set in
fsl_pci_init() if there is 1G of PCI memory mapped space. It is
after next patch that the ppc_swiotlb_enable is being set in the PCI
probe() routine.
Leo
^ permalink raw reply
* Re: [PATCH] powerpc/crypto: Remove virt_to_abs() usage in nx-842.c
From: Seth Jennings @ 2012-08-03 14:40 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev, herbert, linux-crypto
In-Reply-To: <1343960595-30232-1-git-send-email-michael@ellerman.id.au>
On 08/02/2012 09:23 PM, Michael Ellerman wrote:
> virt_to_abs() is just a wrapper around __pa(), use __pa() directly.
>
> We should be including <asm/page.h> to get __pa(). abs_addr.h will be
> removed shortly so drop that.
>
> We were getting of.h via abs_addr.h so we need to include that directly.
>
> Having done all that, clean up the ordering of the includes.
>
> Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
> ---
> drivers/crypto/nx/nx-842.c | 34 ++++++++++++++++++----------------
> 1 file changed, 18 insertions(+), 16 deletions(-)
Looks good here. Thanks for doing this!
Acked-by: Seth Jennings <sjenning@linux.vnet.ibm.com>
^ permalink raw reply
* Re: [PATCH V5 1/3] powerpc/fsl-pci: Only scan PCI bus if configured as a host
From: Kumar Gala @ 2012-08-03 13:57 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1343988851-884-2-git-send-email-B38951@freescale.com>
On Aug 3, 2012, at 5:14 AM, Jia Hongtao wrote:
> We change fsl_add_bridge to return -ENODEV if the controller is working in
> agent mode. Then check the return value of fsl_add_bridge to guarantee
> that only successfully added host bus will be scanned.
>
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> arch/powerpc/sysdev/fsl_pci.c | 13 ++++++++-----
> 1 files changed, 8 insertions(+), 5 deletions(-)
applied to merge
- k
^ permalink raw reply
* Re: Upstream patch status?? (v3.6-rc1 out)
From: Kumar Gala @ 2012-08-03 14:00 UTC (permalink / raw)
To: linuxppc-dev@lists.ozlabs.org list
In-Reply-To: <FB9C2F4C-267C-4A33-A64D-D7BFC5A71D1D@freescale.com>
Sorry,
This meant for an internal fsl list.
- k
On Aug 3, 2012, at 8:51 AM, Gala Kumar-B11780 wrote:
> Guys,
>=20
> As v3.6-rc1 is now out we really need to get some of these simpler =
patches upstream and accepted NOW. Please provide status updates if the =
patch is upstream already let me know.
>=20
> [P1025RDB] (some major differences between upstream and internal =
P1025RDB support)
> powerpc/85xx: Add Quicc Engine support for p1025rdb P1025RDB =
Zhicheng Fan
> powerpc/dts: Add ucc uart support for p1025rdb P1025RDB =
Zhicheng Fan
> powerpc/dts: Add dts for p1025rdb board P1025RDB =
Zhicheng Fan
>=20
> [P1022DS] (this is trivial, please take 10m and get this updated and =
submitted)
> powerpc/mpc85xx: p1022ds support the MTD for NOR and NAND flash =
P1022DS Jerry Huang
>=20
> [DTS] (Stuart, can you help and close)
> powerpc/e5500: Add power isa properties to comply with ePAPR 1.1 =
EPAPR Liu Yu
> powerpc/e500mc: Add power isa properties to comply with ePAPR 1.1 =
EPAPR Liu Yu
> powerpc/e500v2: Add power isa properties to comply with ePAPR 1.1 =
EPAPR Liu Yu
>=20
> [MSI] (I think upstream, Timur please verify)
> powerpc/fsl: add MSI support for the Freescale hypervisor KVM/HV =
Timur Tabi
>=20
> [CORE]
> powerpc/booke: Re-organize debug code CORE Kumar Gala
>=20
> [USB] (Again, this is trivial and spend 10m and send upstream)
> usb/fsl: fixed USB wakeup USB Zhao Chenhui
>=20
> [LBC]
> mtd: elbc nand: use drvdata to only remove the relevant chip LBC =
Scott Wood
>=20
> [SATA]
> libata-pmp: add schedule timeout to support some PMP cards SATA =
Jerry Huang
> fsl-sata: workaround to fix the exception of link layer SATA =
Qiang Liu
>=20
> - k
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* Upstream patch status?? (v3.6-rc1 out)
From: Gala Kumar-B11780 @ 2012-08-03 13:51 UTC (permalink / raw)
To: Wood Scott-B07421, Tabi Timur-B04825, Liu Yu-B13201,
Fan Zhicheng-B32736, Huang Changming-R66093, Liu Qiang-B32616,
Zhao Chenhui-B35336, Yoder Stuart-B08248,
Kushwaha Prabhakar-B32579
Cc: linuxppc-dev@lists.ozlabs.org list, Trefny Thomas-RAT188
Guys,
As v3.6-rc1 is now out we really need to get some of these simpler patches =
upstream and accepted NOW. Please provide status updates if the patch is u=
pstream already let me know.
[P1025RDB] (some major differences between upstream and internal P1025RDB s=
upport)
powerpc/85xx: Add Quicc Engine support for p1025rdb P1025RDB Zhicheng Fan
powerpc/dts: Add ucc uart support for p1025rdb P1025RDB Zhicheng Fan
powerpc/dts: Add dts for p1025rdb board P1025RDB Zhicheng Fan
[P1022DS] (this is trivial, please take 10m and get this updated and submit=
ted)
powerpc/mpc85xx: p1022ds support the MTD for NOR and NAND flash P1022DS Je=
rry Huang
[DTS] (Stuart, can you help and close)
powerpc/e5500: Add power isa properties to comply with ePAPR 1.1 EPAPR Liu=
Yu
powerpc/e500mc: Add power isa properties to comply with ePAPR 1.1 EPAPR Li=
u Yu
powerpc/e500v2: Add power isa properties to comply with ePAPR 1.1 EPAPR Li=
u Yu
[MSI] (I think upstream, Timur please verify)
powerpc/fsl: add MSI support for the Freescale hypervisor KVM/HV Timur Tab=
i
[CORE]
powerpc/booke: Re-organize debug code CORE Kumar Gala
[USB] (Again, this is trivial and spend 10m and send upstream)
usb/fsl: fixed USB wakeup USB Zhao Chenhui
[LBC]
mtd: elbc nand: use drvdata to only remove the relevant chip LBC Scott Woo=
d
[SATA]
libata-pmp: add schedule timeout to support some PMP cards SATA Jerry Huan=
g
fsl-sata: workaround to fix the exception of link layer SATA Qiang Liu
- k=
^ permalink raw reply
* [git pull] Please pull powerpc.git merge branch
From: Kumar Gala @ 2012-08-03 13:39 UTC (permalink / raw)
To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
Ben,
Weekly bug fix pull request.
- k
The following changes since commit 0d7614f09c1ebdbaa1599a5aba7593f147bf96ee:
Linux 3.6-rc1 (2012-08-02 16:38:10 -0700)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/galak/powerpc.git merge
for you to fetch changes up to c9f11c30374329a0d2a88cf05281ca49d8eca9ab:
powerpc/fsl-pci: Only scan PCI bus if configured as a host (2012-08-03 08:25:52 -0500)
----------------------------------------------------------------
Jia Hongtao (1):
powerpc/fsl-pci: Only scan PCI bus if configured as a host
arch/powerpc/sysdev/fsl_pci.c | 13 ++++++++-----
1 file changed, 8 insertions(+), 5 deletions(-)
^ permalink raw reply
* Re: [PATCH 3/3 v3] powerpc/mpic: FSL MPIC error interrupt support.
From: Kumar Gala @ 2012-08-03 13:19 UTC (permalink / raw)
To: Varun Sethi; +Cc: Bogdan Hamciuc, linuxppc-dev
In-Reply-To: <1343745764-3788-1-git-send-email-Varun.Sethi@freescale.com>
On Jul 31, 2012, at 9:42 AM, Varun Sethi wrote:
> All SOC device error interrupts are muxed and delivered to the core as =
a single
> MPIC error interrupt. Currently all the device drivers requiring =
access to device
> errors have to register for the MPIC error interrupt as a shared =
interrupt.
>=20
> With this patch we add interrupt demuxing capability in the mpic =
driver, allowing
> device drivers to register for their individual error interrupts. This =
is achieved
> by handling error interrupts in a cascaded fashion.
>=20
> MPIC error interrupt is handled by the "error_int_handler", which =
subsequently demuxes
> it using the EISR and delivers it to the respective drivers.=20
>=20
> The error interrupt capability is dependent on the MPIC EIMR register, =
which was
> introduced in FSL MPIC version 4.1 (P4080 rev2). So, error interrupt =
demuxing capability
> is dependent on the MPIC version and can be used for versions >=3D =
4.1.
>=20
> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com>
> Signed-off-by: Bogdan Hamciuc <bogdan.hamciuc@freescale.com>
> [In the initial version of the patch we were using handle_simple_irq
> as the handler for cascaded error interrupts, this resulted
> in issues in case of threaded isrs (with RT kernel). This issue was
> debugged by Bogdan and decision was taken to use the handle_level_irq
> handler]
[ fix commit message to wrap at 75 char columns ]
>=20
> ---
> arch/powerpc/include/asm/mpic.h | 13 +++
> arch/powerpc/sysdev/Makefile | 2 +-
> arch/powerpc/sysdev/fsl_mpic_err.c | 152 =
++++++++++++++++++++++++++++++++++++
> arch/powerpc/sysdev/mpic.c | 41 ++++++++++-
> arch/powerpc/sysdev/mpic.h | 22 +++++
> 5 files changed, 228 insertions(+), 2 deletions(-)
> create mode 100644 arch/powerpc/sysdev/fsl_mpic_err.c
>=20
> diff --git a/arch/powerpc/include/asm/mpic.h =
b/arch/powerpc/include/asm/mpic.h
> index e14d35d..5cc8000 100644
> --- a/arch/powerpc/include/asm/mpic.h
> +++ b/arch/powerpc/include/asm/mpic.h
> @@ -118,6 +118,9 @@
> #define MPIC_MAX_CPUS 32
> #define MPIC_MAX_ISU 32
>=20
> +#define MPIC_MAX_ERR 32
> +#define MPIC_FSL_ERR_INT 16
> +
> /*
> * Tsi108 implementation of MPIC has many differences from the original =
one
> */
> @@ -270,6 +273,7 @@ struct mpic
> struct irq_chip hc_ipi;
> #endif
> struct irq_chip hc_tm;
> + struct irq_chip hc_err;
> const char *name;
> /* Flags */
> unsigned int flags;
> @@ -283,6 +287,8 @@ struct mpic
> /* vector numbers used for internal sources (ipi/timers) */
> unsigned int ipi_vecs[4];
> unsigned int timer_vecs[8];
> + /* vector numbers used for FSL MPIC error interrupts */
> + unsigned int err_int_vecs[MPIC_MAX_ERR];
>=20
> /* Spurious vector to program into unused sources */
> unsigned int spurious_vec;
> @@ -306,6 +312,11 @@ struct mpic
> struct mpic_reg_bank cpuregs[MPIC_MAX_CPUS];
> struct mpic_reg_bank isus[MPIC_MAX_ISU];
>=20
> + /* ioremap'ed base for error interrupt registers */
> + u32 __iomem *err_regs;
> + /* error interrupt config */
> + u32 err_int_config_done;
> +
Is this really needed ?
> /* Protected sources */
> unsigned long *protected;
>=20
> @@ -370,6 +381,8 @@ struct mpic
> #define MPIC_NO_RESET 0x00004000
> /* Freescale MPIC (compatible includes "fsl,mpic") */
> #define MPIC_FSL 0x00008000
> +/* Freescale MPIC supports EIMR (error interrupt mask register)*/
> +#define MPIC_FSL_HAS_EIMR 0x00010000
Can't we use BRR for this?
>=20
> /* MPIC HW modification ID */
> #define MPIC_REGSET_MASK 0xf0000000
> diff --git a/arch/powerpc/sysdev/Makefile =
b/arch/powerpc/sysdev/Makefile
> index 1bd7ecb..a57600b 100644
> --- a/arch/powerpc/sysdev/Makefile
> +++ b/arch/powerpc/sysdev/Makefile
> @@ -15,7 +15,7 @@ obj-$(CONFIG_PPC_DCR_NATIVE) +=3D dcr-low.o
> obj-$(CONFIG_PPC_PMI) +=3D pmi.o
> obj-$(CONFIG_U3_DART) +=3D dart_iommu.o
> obj-$(CONFIG_MMIO_NVRAM) +=3D mmio_nvram.o
> -obj-$(CONFIG_FSL_SOC) +=3D fsl_soc.o
> +obj-$(CONFIG_FSL_SOC) +=3D fsl_soc.o fsl_mpic_err.o
> obj-$(CONFIG_FSL_PCI) +=3D fsl_pci.o $(fsl-msi-obj-y)
> obj-$(CONFIG_FSL_PMC) +=3D fsl_pmc.o
> obj-$(CONFIG_FSL_LBC) +=3D fsl_lbc.o
> diff --git a/arch/powerpc/sysdev/fsl_mpic_err.c =
b/arch/powerpc/sysdev/fsl_mpic_err.c
> new file mode 100644
> index 0000000..1ebfa36
> --- /dev/null
> +++ b/arch/powerpc/sysdev/fsl_mpic_err.c
> @@ -0,0 +1,152 @@
> +/*
> + * Copyright (C) 2012 Freescale Semiconductor, Inc.
> + *
> + * Author: Varun Sethi <varun.sethi@freescale.com>
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; version 2 of the
> + * License.
> + *
> + */
> +
> +#include <linux/irq.h>
> +#include <linux/smp.h>
> +#include <linux/interrupt.h>
> +
> +#include <asm/io.h>
> +#include <asm/irq.h>
> +#include <asm/mpic.h>
> +
> +#include "mpic.h"
> +
> +#define MPIC_ERR_INT_BASE 0x3900
> +#define MPIC_ERR_INT_EISR 0x0000
> +#define MPIC_ERR_INT_EIMR 0x0010
> +
> +static inline u32 mpic_fsl_err_read(u32 __iomem *base, unsigned int =
err_reg)
> +{
> + return in_be32(base + (err_reg >> 2));
> +}
> +
> +static inline void mpic_fsl_err_write(u32 __iomem *base, u32 value)
> +{
> + out_be32(base + (MPIC_ERR_INT_EIMR >> 2), value);
> +}
> +
> +static void fsl_mpic_mask_err(struct irq_data *d)
> +{
> + u32 eimr;
> + struct mpic *mpic =3D irq_data_get_irq_chip_data(d);
> + unsigned int src =3D virq_to_hw(d->irq) - mpic->err_int_vecs[0];
> +
> + eimr =3D mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);
> + eimr |=3D (1 << (31 - src));
> + mpic_fsl_err_write(mpic->err_regs, eimr);
> +}
> +
> +static void fsl_mpic_unmask_err(struct irq_data *d)
> +{
> + u32 eimr;
> + struct mpic *mpic =3D irq_data_get_irq_chip_data(d);
> + unsigned int src =3D virq_to_hw(d->irq) - mpic->err_int_vecs[0];
> +
> + eimr =3D mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);
> + eimr &=3D ~(1 << (31 - src));
> + mpic_fsl_err_write(mpic->err_regs, eimr);
> +}
> +
> +static struct irq_chip fsl_mpic_err_chip =3D {
> + .irq_disable =3D fsl_mpic_mask_err,
> + .irq_mask =3D fsl_mpic_mask_err,
> + .irq_unmask =3D fsl_mpic_unmask_err,
> +};
> +
> +void mpic_setup_error_int(struct mpic *mpic, int intvec)
> +{
> + int i;
> +
> + mpic->err_regs =3D ioremap(mpic->paddr + MPIC_ERR_INT_BASE, =
0x1000);
> + if (!mpic->err_regs) {
> + pr_err("could not map mpic error registers\n");
> + return;
we should propagate an error back up if ioremap failed.
> + }
> + mpic->hc_err =3D fsl_mpic_err_chip;
> + mpic->hc_err.name =3D mpic->name;
> + mpic->flags |=3D MPIC_FSL_HAS_EIMR;
> + /* allocate interrupt vectors for error interrupts */
> + for (i =3D MPIC_MAX_ERR - 1; i >=3D 0; i--)
> + mpic->err_int_vecs[i] =3D --intvec;
> +
> +}
> +
> +int mpic_map_error_int(struct mpic *mpic, unsigned int virq, =
irq_hw_number_t hw)
> +{
> + if ((mpic->flags & MPIC_FSL_HAS_EIMR) &&
> + (hw >=3D mpic->err_int_vecs[0] &&
> + hw <=3D mpic->err_int_vecs[MPIC_MAX_ERR - 1])) {
> + WARN_ON(mpic->flags & MPIC_SECONDARY);
> +
> + pr_debug("mpic: mapping as Error Interrupt\n");
> + irq_set_chip_data(virq, mpic);
> + irq_set_chip_and_handler(virq, &mpic->hc_err,
> + handle_level_irq);
> + return 1;
> + }
> +
> + return 0;
> +}
> +
> +static irqreturn_t fsl_error_int_handler(int irq, void *data)
> +{
> + struct mpic *mpic =3D (struct mpic *) data;
> + u32 eisr, eimr;
> + int errint;
> + unsigned int cascade_irq;
> +
> + eisr =3D mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EISR);
> + eimr =3D mpic_fsl_err_read(mpic->err_regs, MPIC_ERR_INT_EIMR);
> +
> + if (!(eisr & ~eimr))
> + return IRQ_NONE;
> +
> + while (eisr) {
> + errint =3D __builtin_clz(eisr);
> + cascade_irq =3D irq_linear_revmap(mpic->irqhost,
> + mpic->err_int_vecs[errint]);
> + WARN_ON(cascade_irq =3D=3D NO_IRQ);
> + if (cascade_irq !=3D NO_IRQ) {
> + generic_handle_irq(cascade_irq);
> + } else {
> + eimr |=3D 1 << (31 - errint);
> + mpic_fsl_err_write(mpic->err_regs, eimr);
> + }
> + eisr &=3D ~(1 << (31 - errint));
> + }
> +
> + return IRQ_HANDLED;
> +}
> +
> +int mpic_err_int_init(struct mpic *mpic, irq_hw_number_t irqnum)
> +{
> + unsigned int virq;
> + int ret;
> +
> + virq =3D irq_create_mapping(mpic->irqhost, irqnum);
> + if (virq =3D=3D NO_IRQ) {
> + pr_err("Error interrupt setup failed\n");
> + return 0;
> + }
> +
> + /* Mask all error interrupts */
> + mpic_fsl_err_write(mpic->err_regs, ~0);
> +
> + ret =3D request_irq(virq, fsl_error_int_handler, IRQF_NO_THREAD,
> + "mpic-error-int", mpic);
> + if (ret) {
> + pr_err("Failed to register error interrupt handler\n");
> + return 0;
> + }
> +
> + return 1;
> +}
> diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
> index 7e32db7..2a0b632 100644
> --- a/arch/powerpc/sysdev/mpic.c
> +++ b/arch/powerpc/sysdev/mpic.c
> @@ -1026,6 +1026,9 @@ static int mpic_host_map(struct irq_domain *h, =
unsigned int virq,
> return 0;
> }
>=20
> + if (mpic_map_error_int(mpic, virq, hw))
> + return 0;
> +
> if (hw >=3D mpic->num_sources)
> return -EINVAL;
>=20
> @@ -1085,7 +1088,16 @@ static int mpic_host_xlate(struct irq_domain =
*h, struct device_node *ct,
> */
> switch (intspec[2]) {
> case 0:
> - case 1: /* no EISR/EIMR support for now, treat as shared =
IRQ */
> + break;
> + case 1:
> + if (!mpic->err_int_config_done)
> + break;
> +
Under what case would we call mpic_host_xlate and have not called =
mpic_init?
> + if (intspec[3] >=3D =
ARRAY_SIZE(mpic->err_int_vecs))
> + return -EINVAL;
> +
> + *out_hwirq =3D mpic->err_int_vecs[intspec[3]];
> +
> break;
> case 2:
> if (intspec[0] >=3D ARRAY_SIZE(mpic->ipi_vecs))
> @@ -1302,6 +1314,8 @@ struct mpic * __init mpic_alloc(struct =
device_node *node,
> mpic_map(mpic, mpic->paddr, &mpic->tmregs, =
MPIC_INFO(TIMER_BASE), 0x1000);
>=20
> if (mpic->flags & MPIC_FSL) {
> + u32 brr1, version;
> +
> /*
> * Yes, Freescale really did put global registers in the
> * magic per-cpu area -- and they don't even show up in =
the
> @@ -1309,6 +1323,26 @@ struct mpic * __init mpic_alloc(struct =
device_node *node,
> */
> mpic_map(mpic, mpic->paddr, &mpic->thiscpuregs,
> MPIC_CPU_THISBASE, 0x1000);
> +
> + brr1 =3D _mpic_read(mpic->reg_type, &mpic->thiscpuregs,
> + MPIC_FSL_BRR1);
> + version =3D brr1 & MPIC_FSL_BRR1_VER;
> +
> + /* Error interrupt mask register (EIMR) is required for
> + * handling individual device error interrupts. EIMR
> + * was added in MPIC version 4.1.
> + *
> + * Over here we reserve vector number space for error
> + * interrupt vectors. This space is stolen from the
> + * global vector number space, as in case of ipis
> + * and timer interrupts.
> + *
> + * Available vector space =3D intvec_top - 12, where 12
> + * is the number of vectors which have been consumed by
> + * ipis and timer interrupts.
> + */
> + if (version >=3D 0x401)
> + mpic_setup_error_int(mpic, intvec_top - 12);
> }
>=20
> /* Reset */
> @@ -1474,6 +1508,11 @@ void __init mpic_init(struct mpic *mpic)
> num_timers =3D 8;
> }
>=20
> + /* FSL mpic error interrupt intialization */
> + if (mpic->flags & MPIC_FSL_HAS_EIMR)
> + mpic->err_int_config_done =3D
> + mpic_err_int_init(mpic, MPIC_FSL_ERR_INT);
> +
> /* Initialize timers to our reserved vectors and mask them for =
now */
> for (i =3D 0; i < num_timers; i++) {
> unsigned int offset =3D mpic_tm_offset(mpic, i);
> diff --git a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h
> index 13f3e89..1a6995a 100644
> --- a/arch/powerpc/sysdev/mpic.h
> +++ b/arch/powerpc/sysdev/mpic.h
> @@ -40,4 +40,26 @@ extern int mpic_set_affinity(struct irq_data *d,
> const struct cpumask *cpumask, bool force);
> extern void mpic_reset_core(int cpu);
>=20
> +#ifdef CONFIG_FSL_SOC
> +extern int mpic_map_error_int(struct mpic *mpic, unsigned int virq, =
irq_hw_number_t hw);
> +extern int mpic_err_int_init(struct mpic *mpic, irq_hw_number_t =
irqnum);
> +extern void mpic_setup_error_int(struct mpic *mpic, int intvec);
> +#else
> +static inline int mpic_map_error_int(struct mpic *mpic, unsigned int =
virq, irq_hw_number_t hw)
> +{
> + return 0;
> +}
> +
> +
> +static inline int mpic_err_int_init(struct mpic *mpic, =
irq_hw_number_t irqnum)
> +{
> + return -1;
> +}
> +
> +static inline void mpic_setup_error_int(struct mpic *mpic, int =
intvec)
> +{
> + return;
> +}
> +#endif
> +
> #endif /* _POWERPC_SYSDEV_MPIC_H */
> --=20
> 1.7.4.1
>=20
>=20
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
^ permalink raw reply
* [PATCH] Power 7+, OProfile: reject samples if marked event and the SIAR valid bit is not set.
From: Carl E. Love @ 2012-08-03 13:02 UTC (permalink / raw)
To: linuxppc-dev, benh, Maynard Johnson
Ben:
Here is the OProfile patch to reject samples for marked events if the
SIAR register is not valid. Please review and let me know if it looks
OK. Thanks.
Carl Love
-------------------------------------------------------------------------------------
Power 7+, OProfile: reject samples if marked event and the SIAR valid bit is not set.
Starting with Power 7+ we need to check for marked events if the SIAR
register is valid, i.e. it contains the correct address of the instruction
at the time the performance counter overflowed. The mmcra register on
Power 7+, contains a new bit to indicate that the contents of the SIAR
is valid. If the event is not marked, then the sample is recorded
independently of the SIAR valid bit setting. For older processors, there
is no SIAR valid bit to check so the samples are always recorded. This is
done by forcing the cntr_marked_events bit mask to zero. The code will
always record the sample in this case since the bit mask says the event is
not a marked event even if it really is a marked event.
Signed-off-by: Carl Love <cel@us.ibm.com>
---
arch/powerpc/oprofile/op_model_power4.c | 100 +++++++++++++++++++++++++++++++-
1 file changed, 99 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index 95ae77d..cb3fc73 100644
--- a/arch/powerpc/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -21,6 +21,13 @@
#include <asm/reg.h>
#define dbg(args...)
+#define OPROFILE_PM_PMCSEL_MSK 0xffULL
+#define OPROFILE_PM_UNIT_SHIFT 60
+#define OPROFILE_PM_UNIT_MSK 0xfULL
+#define OPROFILE_MAX_PMC_NUM 3
+#define OPROFILE_PMSEL_FIELD_WIDTH 8
+#define OPROFILE_UNIT_FIELD_WIDTH 4
+#define MMCRA_SIAR_VALID_MASK 0x10000000ULL
static unsigned long reset_value[OP_MAX_COUNTER];
@@ -31,6 +38,61 @@ static int use_slot_nums;
static u32 mmcr0_val;
static u64 mmcr1_val;
static u64 mmcra_val;
+static u32 cntr_marked_events;
+
+static int power7_marked_instr_event(u64 mmcr1)
+{
+ u64 psel, unit;
+ int pmc, cntr_marked_events = 0;
+
+ /* Given the MMCR1 value, look at the field for each counter to
+ * determine if it is a marked event. Code based on the function
+ * power7_marked_instr_event() in file arch/powerpc/perf/power7-pmu.c.
+ */
+ for (pmc = 0; pmc < 4; pmc++) {
+ psel = mmcr1 & (OPROFILE_PM_PMCSEL_MSK
+ << (OPROFILE_MAX_PMC_NUM - pmc)
+ * OPROFILE_MAX_PMC_NUM);
+ psel = (psel >> ((OPROFILE_MAX_PMC_NUM - pmc)
+ * OPROFILE_PMSEL_FIELD_WIDTH)) & ~1ULL;
+ unit = mmcr1 & (OPROFILE_PM_UNIT_MSK
+ << (OPROFILE_PM_UNIT_SHIFT
+ - (pmc * OPROFILE_PMSEL_FIELD_WIDTH )));
+ unit = unit >> (OPROFILE_PM_UNIT_SHIFT
+ - (pmc * OPROFILE_PMSEL_FIELD_WIDTH));
+
+ switch (psel >> 4) {
+ case 2:
+ cntr_marked_events |= (pmc == 1 || pmc == 3) << pmc;
+ break;
+ case 3:
+ if (psel == 0x3c) {
+ cntr_marked_events |= (pmc == 0) << pmc;
+ break;
+ }
+
+ if (psel == 0x3e) {
+ cntr_marked_events |= (pmc != 1) << pmc;
+ break;
+ }
+
+ cntr_marked_events |= 1 << pmc;
+ break;
+ case 4:
+ case 5:
+ cntr_marked_events |= (unit == 0xd) << pmc;
+ break;
+ case 6:
+ if (psel == 0x64)
+ cntr_marked_events |= (pmc >= 2) << pmc;
+ break;
+ case 8:
+ cntr_marked_events |= (unit == 0xd) << pmc;
+ break;
+ }
+ }
+ return cntr_marked_events;
+}
static int power4_reg_setup(struct op_counter_config *ctr,
struct op_system_config *sys,
@@ -47,6 +109,23 @@ static int power4_reg_setup(struct op_counter_config *ctr,
mmcr1_val = sys->mmcr1;
mmcra_val = sys->mmcra;
+ /* Power 7+ and newer architectures:
+ * Determine which counter events in the group (the group of events is
+ * specified by the bit settings in the MMCR1 register) are marked
+ * events for use in the interrupt handler. Do the calculation once
+ * before OProfile starts. Information is used in the interrupt
+ * handler. Starting with Power 7+ we only record the sample for
+ * marked events if the SIAR valid bit is set. For non marked events
+ * the sample is always recorded.
+ */
+ if (__is_processor(PV_POWER7p))
+ cntr_marked_events = power7_marked_instr_event(mmcr1_val);
+ else
+ cntr_marked_events = 0; /* For older processors, set the bit map
+ * to zero so the sample will always be
+ * be recorded.
+ */
+
for (i = 0; i < cur_cpu_spec->num_pmcs; ++i)
reset_value[i] = 0x80000000UL - ctr[i].count;
@@ -291,6 +370,7 @@ static void power4_handle_interrupt(struct pt_regs *regs,
int i;
unsigned int mmcr0;
unsigned long mmcra;
+ bool siar_valid = false;
mmcra = mfspr(SPRN_MMCRA);
@@ -300,11 +380,29 @@ static void power4_handle_interrupt(struct pt_regs *regs,
/* set the PMM bit (see comment below) */
mtmsrd(mfmsr() | MSR_PMM);
+ /* Check that the SIAR valid bit in MMCRA is set to 1. */
+ if ((mmcra & MMCRA_SIAR_VALID_MASK) == MMCRA_SIAR_VALID_MASK)
+ siar_valid = true;
+
for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
val = classic_ctr_read(i);
if (pmc_overflow(val)) {
if (oprofile_running && ctr[i].enabled) {
- oprofile_add_ext_sample(pc, regs, i, is_kernel);
+ /* Power 7+ and newer architectures:
+ * If the event is a marked event, then only
+ * save the sample if the SIAR valid bit is
+ * set. If the event is not marked, then
+ * always save the sample.
+ * Note, the Sample enable bit in the MMCRA
+ * register must be set to 1 if the group
+ * contains a marked event.
+ */
+ if ((siar_valid &&
+ (cntr_marked_events & (1 << i)))
+ || !(cntr_marked_events & (1 << i)))
+ oprofile_add_ext_sample(pc, regs, i,
+ is_kernel);
+
classic_ctr_write(i, reset_value[i]);
} else {
classic_ctr_write(i, 0);
--
1.7.11.2.249.g31c7954
^ permalink raw reply related
* Re: [PATCH V4 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary
From: Kumar Gala @ 2012-08-03 12:38 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A359C3@039-SN1MPN1-002.039d.mgd.msft.net>
On Aug 2, 2012, at 9:21 PM, Jia Hongtao-B38951 wrote:
>>=20
>> -----Original Message-----
>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>> Sent: Thursday, August 02, 2012 8:55 PM
>> To: Jia Hongtao-B38951
>> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li Yang-R58472
>> Subject: Re: [PATCH V4 2/3] powerpc/swiotlb: Enable at early stage =
and
>> disable if not necessary
>>=20
>>=20
>> On Aug 2, 2012, at 6:42 AM, Jia Hongtao wrote:
>>=20
>>> Remove the dependency on PCI initialization for SWIOTLB =
initialization.
>>> So that PCI can be initialized at proper time.
>>>=20
>>> SWIOTLB is partly determined by PCI inbound/outbound map which is
>> assigned
>>> in PCI initialization. But swiotlb_init() should be done at the =
stage
>> of
>>> mem_init() which is much earlier than PCI initialization. So we =
reserve
>> the
>>> memory for SWIOTLB first and free it if not necessary.
>>>=20
>>> All boards are converted to fit this change.
>>>=20
>>> Signed-off-by: Jia Hongtao <B38951@freescale.com>
>>> Signed-off-by: Li Yang <leoli@freescale.com>
>>> ---
>>=20
>> This doesn't seem like it addresses our issue w/regards to not being =
able
>> to map all of memory from PCI.
>=20
> PCI init will determine ppc_swiotlb_enable due to PCI map. =
swiotlb_late_init
> will handle all swiotlb things depend on the result of pci init.
Think about the case that we have 4095M of memory & 1G of PCI memory =
mapped space. The old code would enable swiotlb for this case since we =
would NOT be able to DMA to all 4095M of memory. The patch does not =
handle this case correctly.
- k
^ permalink raw reply
* [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Jia Hongtao @ 2012-08-03 10:14 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: B07421, b38951
In-Reply-To: <1343988851-884-1-git-send-email-B38951@freescale.com>
We unified the Freescale pci/pcie initialization by changing the fsl_pci
to a platform driver. In previous PCI code architecture the initialization
routine is called at board_setup_arch stage. Now the initialization is done
in probe function which is architectural better. Also It's convenient for
adding PM support for PCI controller in later patch.
Now we registered pci controllers as platform devices. So we combine two
initialization code as one platform driver.
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
---
Changed for V5:
Convert all boards to use PCI controller platform driver.
arch/powerpc/platforms/85xx/common.c | 10 +++
arch/powerpc/platforms/85xx/corenet_ds.c | 31 +--------
arch/powerpc/platforms/85xx/ge_imp3a.c | 48 +------------
arch/powerpc/platforms/85xx/mpc8536_ds.c | 36 +---------
arch/powerpc/platforms/85xx/mpc85xx_ads.c | 9 +--
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 14 +----
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 38 ++--------
arch/powerpc/platforms/85xx/mpc85xx_mds.c | 38 +---------
arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 28 +++-----
arch/powerpc/platforms/85xx/p1010rdb.c | 14 +----
arch/powerpc/platforms/85xx/p1022_ds.c | 34 +---------
arch/powerpc/platforms/85xx/p1022_rdk.c | 34 +---------
arch/powerpc/platforms/85xx/p1023_rds.c | 7 +--
arch/powerpc/platforms/85xx/p2041_rdb.c | 2 +-
arch/powerpc/platforms/85xx/p3041_ds.c | 2 +-
arch/powerpc/platforms/85xx/p4080_ds.c | 2 +-
arch/powerpc/platforms/85xx/p5020_ds.c | 2 +-
arch/powerpc/platforms/85xx/p5040_ds.c | 2 +-
arch/powerpc/platforms/85xx/qemu_e500.c | 3 +-
arch/powerpc/platforms/85xx/sbc8548.c | 19 +-----
arch/powerpc/platforms/85xx/socrates.c | 11 +---
arch/powerpc/platforms/85xx/stx_gp3.c | 11 +---
arch/powerpc/platforms/85xx/tqm85xx.c | 21 +------
arch/powerpc/platforms/85xx/xes_mpc85xx.c | 54 ++-------------
arch/powerpc/platforms/86xx/gef_ppc9a.c | 10 +--
arch/powerpc/platforms/86xx/gef_sbc310.c | 11 +---
arch/powerpc/platforms/86xx/gef_sbc610.c | 10 +--
arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 19 +----
arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 40 +----------
arch/powerpc/platforms/86xx/sbc8641d.c | 12 +---
arch/powerpc/sysdev/fsl_pci.c | 102 +++++++++++++++++-----------
arch/powerpc/sysdev/fsl_pci.h | 9 ++-
drivers/edac/mpc85xx_edac.c | 43 +++---------
33 files changed, 160 insertions(+), 566 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/common.c b/arch/powerpc/platforms/85xx/common.c
index 67dac22..d0861a0 100644
--- a/arch/powerpc/platforms/85xx/common.c
+++ b/arch/powerpc/platforms/85xx/common.c
@@ -27,6 +27,16 @@ static struct of_device_id __initdata mpc85xx_common_ids[] = {
{ .compatible = "fsl,mpc8548-guts", },
/* Probably unnecessary? */
{ .compatible = "gpio-leds", },
+ /* For all PCI controllers */
+ { .compatible = "fsl,mpc8540-pci", },
+ { .compatible = "fsl,mpc8548-pcie", },
+ { .compatible = "fsl,p1022-pcie", },
+ { .compatible = "fsl,p1010-pcie", },
+ { .compatible = "fsl,p1023-pcie", },
+ { .compatible = "fsl,p4080-pcie", },
+ { .compatible = "fsl,qoriq-pcie-v2.4", },
+ { .compatible = "fsl,qoriq-pcie-v2.3", },
+ { .compatible = "fsl,qoriq-pcie-v2.2", },
{},
};
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index 473d573..84b9d86 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -16,7 +16,6 @@
#include <linux/kdev_t.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
-#include <linux/memblock.h>
#include <asm/time.h>
#include <asm/machdep.h>
@@ -52,39 +51,13 @@ void __init corenet_ds_pic_init(void)
*/
void __init corenet_ds_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
- struct pci_controller *hose;
-#endif
- dma_addr_t max = 0xffffffff;
-
mpc85xx_smp_init();
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,p4080-pcie") ||
- of_device_is_compatible(np, "fsl,qoriq-pcie-v2.2") ||
- of_device_is_compatible(np, "fsl,qoriq-pcie-v2.3") ||
- of_device_is_compatible(np, "fsl,qoriq-pcie-v2.4")) {
- fsl_add_bridge(np, 0);
- hose = pci_find_hose_for_OF_device(np);
- max = min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
- }
- }
-
-#ifdef CONFIG_PPC64
+#if defined(CONFIG_PCI) && defined(CONFIG_PPC64)
pci_devs_phb_init();
#endif
-#endif
-#ifdef CONFIG_SWIOTLB
- if ((memblock_end_of_DRAM() - 1) > max) {
- ppc_swiotlb_enable = 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
- }
-#endif
+ swiotlb_detect_4g();
pr_info("%s board from Freescale Semiconductor\n", ppc_md.name);
}
diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c b/arch/powerpc/platforms/85xx/ge_imp3a.c
index b6a728b..0483337 100644
--- a/arch/powerpc/platforms/85xx/ge_imp3a.c
+++ b/arch/powerpc/platforms/85xx/ge_imp3a.c
@@ -22,7 +22,6 @@
#include <linux/seq_file.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
-#include <linux/memblock.h>
#include <asm/time.h>
#include <asm/machdep.h>
@@ -84,53 +83,19 @@ void __init ge_imp3a_pic_init(void)
of_node_put(cascade_node);
}
-#ifdef CONFIG_PCI
-static int primary_phb_addr;
-#endif /* CONFIG_PCI */
-
/*
* Setup the architecture
*/
static void __init ge_imp3a_setup_arch(void)
{
struct device_node *regs;
-#ifdef CONFIG_PCI
- struct device_node *np;
- struct pci_controller *hose;
-#endif
- dma_addr_t max = 0xffffffff;
if (ppc_md.progress)
ppc_md.progress("ge_imp3a_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
- of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
- of_device_is_compatible(np, "fsl,p2020-pcie")) {
- struct resource rsrc;
- of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == primary_phb_addr)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
-
- hose = pci_find_hose_for_OF_device(np);
- max = min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
- }
- }
-#endif
-
mpc85xx_smp_init();
-#ifdef CONFIG_SWIOTLB
- if ((memblock_end_of_DRAM() - 1) > max) {
- ppc_swiotlb_enable = 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
- }
-#endif
+ swiotlb_detect_4g();
/* Remap basic board registers */
regs = of_find_compatible_node(NULL, NULL, "ge,imp3a-fpga-regs");
@@ -215,17 +180,10 @@ static int __init ge_imp3a_probe(void)
{
unsigned long root = of_get_flat_dt_root();
- if (of_flat_dt_is_compatible(root, "ge,IMP3A")) {
-#ifdef CONFIG_PCI
- primary_phb_addr = 0x9000;
-#endif
- return 1;
- }
-
- return 0;
+ return of_flat_dt_is_compatible(root, "ge,IMP3A");
}
-machine_device_initcall(ge_imp3a, mpc85xx_common_publish_devices);
+machine_arch_initcall(ge_imp3a, mpc85xx_common_publish_devices);
machine_arch_initcall(ge_imp3a, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 767c7cf..9bac2c2 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -17,7 +17,6 @@
#include <linux/seq_file.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
-#include <linux/memblock.h>
#include <asm/time.h>
#include <asm/machdep.h>
@@ -46,46 +45,15 @@ void __init mpc8536_ds_pic_init(void)
*/
static void __init mpc8536_ds_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
- struct pci_controller *hose;
-#endif
- dma_addr_t max = 0xffffffff;
-
if (ppc_md.progress)
ppc_md.progress("mpc8536_ds_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
- of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
- struct resource rsrc;
- of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
-
- hose = pci_find_hose_for_OF_device(np);
- max = min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
- }
- }
-
-#endif
-
-#ifdef CONFIG_SWIOTLB
- if ((memblock_end_of_DRAM() - 1) > max) {
- ppc_swiotlb_enable = 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
- }
-#endif
+ swiotlb_detect_4g();
printk("MPC8536 DS board from Freescale Semiconductor\n");
}
-machine_device_initcall(mpc8536_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8536_ds, mpc85xx_common_publish_devices);
machine_arch_initcall(mpc8536_ds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 29ee8fc..ae3ab48 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -137,10 +137,6 @@ static void __init init_ioports(void)
static void __init mpc85xx_ads_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("mpc85xx_ads_setup_arch()", 0);
@@ -150,9 +146,6 @@ static void __init mpc85xx_ads_setup_arch(void)
#endif
#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
- fsl_add_bridge(np, 1);
-
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
#endif
}
@@ -173,7 +166,7 @@ static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
}
-machine_device_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc85xx_ads, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 11156fb..7b77b7cb 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -309,18 +309,6 @@ static void __init mpc85xx_cds_setup_arch(void)
}
#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
- of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
- struct resource rsrc;
- of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
- }
- }
-
ppc_md.pci_irq_fixup = mpc85xx_cds_pci_irq_fixup;
ppc_md.pci_exclude_device = mpc85xx_exclude_device;
#endif
@@ -355,7 +343,7 @@ static int __init mpc85xx_cds_probe(void)
return of_flat_dt_is_compatible(root, "MPC85xxCDS");
}
-machine_device_initcall(mpc85xx_cds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc85xx_cds, mpc85xx_common_publish_devices);
define_machine(mpc85xx_cds) {
.name = "MPC85xx CDS",
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 56f8c8f..f378253 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -20,7 +20,6 @@
#include <linux/seq_file.h>
#include <linux/interrupt.h>
#include <linux/of_platform.h>
-#include <linux/memblock.h>
#include <asm/time.h>
#include <asm/machdep.h>
@@ -117,40 +116,16 @@ void __init mpc85xx_ds_pic_init(void)
extern int uli_exclude_device(struct pci_controller *hose,
u_char bus, u_char devfn);
-static struct device_node *pci_with_uli;
-
static int mpc85xx_exclude_device(struct pci_controller *hose,
u_char bus, u_char devfn)
{
- if (hose->dn == pci_with_uli)
+ if (hose->dn == fsl_pci_primary)
return uli_exclude_device(hose, bus, devfn);
return PCIBIOS_SUCCESSFUL;
}
#endif /* CONFIG_PCI */
-static void __init mpc85xx_ds_pci_init(void)
-{
-#ifdef CONFIG_PCI
- struct device_node *node;
-
- fsl_pci_init();
-
- /* See if we have a ULI under the primary */
-
- node = of_find_node_by_name(NULL, "uli1575");
- while ((pci_with_uli = of_get_parent(node))) {
- of_node_put(node);
- node = pci_with_uli;
-
- if (pci_with_uli == fsl_pci_primary) {
- ppc_md.pci_exclude_device = mpc85xx_exclude_device;
- break;
- }
- }
-#endif
-}
-
/*
* Setup the architecture
*/
@@ -159,8 +134,11 @@ static void __init mpc85xx_ds_setup_arch(void)
if (ppc_md.progress)
ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
+#ifdef CONFIG_PCI
+ ppc_md.pci_exclude_device = mpc85xx_exclude_device;
+#endif
+
swiotlb_detect_4g();
- mpc85xx_ds_pci_init();
mpc85xx_smp_init();
printk("MPC85xx DS board from Freescale Semiconductor\n");
@@ -176,9 +154,9 @@ static int __init mpc8544_ds_probe(void)
return !!of_flat_dt_is_compatible(root, "MPC8544DS");
}
-machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
-machine_device_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
-machine_device_initcall(p2020_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8572_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p2020_ds, mpc85xx_common_publish_devices);
machine_arch_initcall(mpc8544_ds, swiotlb_setup_bus_notifier);
machine_arch_initcall(mpc8572_ds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 8e4b094..555b106 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -327,44 +327,14 @@ static void __init mpc85xx_mds_qeic_init(void) { }
static void __init mpc85xx_mds_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct pci_controller *hose;
- struct device_node *np;
-#endif
- dma_addr_t max = 0xffffffff;
-
if (ppc_md.progress)
ppc_md.progress("mpc85xx_mds_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
- of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
- struct resource rsrc;
- of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
-
- hose = pci_find_hose_for_OF_device(np);
- max = min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
- }
- }
-#endif
-
mpc85xx_smp_init();
mpc85xx_mds_qe_init();
-#ifdef CONFIG_SWIOTLB
- if ((memblock_end_of_DRAM() - 1) > max) {
- ppc_swiotlb_enable = 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
- }
-#endif
+ swiotlb_detect_4g();
}
@@ -409,9 +379,9 @@ static int __init mpc85xx_publish_devices(void)
return mpc85xx_common_publish_devices();
}
-machine_device_initcall(mpc8568_mds, mpc85xx_publish_devices);
-machine_device_initcall(mpc8569_mds, mpc85xx_publish_devices);
-machine_device_initcall(p1021_mds, mpc85xx_common_publish_devices);
+machine_arch_initcall(mpc8568_mds, mpc85xx_publish_devices);
+machine_arch_initcall(mpc8569_mds, mpc85xx_publish_devices);
+machine_arch_initcall(p1021_mds, mpc85xx_common_publish_devices);
machine_arch_initcall(mpc8568_mds, swiotlb_setup_bus_notifier);
machine_arch_initcall(mpc8569_mds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 1910fdc..f4a0b7a 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -86,21 +86,13 @@ void __init mpc85xx_rdb_pic_init(void)
*/
static void __init mpc85xx_rdb_setup_arch(void)
{
-#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
+#ifdef CONFIG_QUICC_ENGINE
struct device_node *np;
#endif
if (ppc_md.progress)
ppc_md.progress("mpc85xx_rdb_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,mpc8548-pcie"))
- fsl_add_bridge(np, 0);
- }
-
-#endif
-
mpc85xx_smp_init();
#ifdef CONFIG_QUICC_ENGINE
@@ -161,15 +153,15 @@ qe_fail:
printk(KERN_INFO "MPC85xx RDB board from Freescale Semiconductor\n");
}
-machine_device_initcall(p2020_rdb, mpc85xx_common_publish_devices);
-machine_device_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_rdb, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
-machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
-machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p2020_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p2020_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_mbg_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1025_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1024_rdb, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/p1010rdb.c b/arch/powerpc/platforms/85xx/p1010rdb.c
index dbaf443..a893bf1 100644
--- a/arch/powerpc/platforms/85xx/p1010rdb.c
+++ b/arch/powerpc/platforms/85xx/p1010rdb.c
@@ -46,25 +46,13 @@ void __init p1010_rdb_pic_init(void)
*/
static void __init p1010_rdb_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("p1010_rdb_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,p1010-pcie"))
- fsl_add_bridge(np, 0);
- }
-
-#endif
-
printk(KERN_INFO "P1010 RDB board from Freescale Semiconductor\n");
}
-machine_device_initcall(p1010_rdb, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1010_rdb, mpc85xx_common_publish_devices);
machine_arch_initcall(p1010_rdb, swiotlb_setup_bus_notifier);
/*
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 3c732ac..a32efb9 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -18,7 +18,6 @@
#include <linux/pci.h>
#include <linux/of_platform.h>
-#include <linux/memblock.h>
#include <asm/div64.h>
#include <asm/mpic.h>
#include <asm/swiotlb.h>
@@ -507,32 +506,9 @@ early_param("video", early_video_setup);
*/
static void __init p1022_ds_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
- dma_addr_t max = 0xffffffff;
-
if (ppc_md.progress)
ppc_md.progress("p1022_ds_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
- struct resource rsrc;
- struct pci_controller *hose;
-
- of_address_to_resource(np, 0, &rsrc);
-
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
-
- hose = pci_find_hose_for_OF_device(np);
- max = min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
- }
-#endif
-
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
diu_ops.get_pixel_format = p1022ds_get_pixel_format;
diu_ops.set_gamma_table = p1022ds_set_gamma_table;
@@ -601,18 +577,12 @@ static void __init p1022_ds_setup_arch(void)
mpc85xx_smp_init();
-#ifdef CONFIG_SWIOTLB
- if ((memblock_end_of_DRAM() - 1) > max) {
- ppc_swiotlb_enable = 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
- }
-#endif
+ swiotlb_detect_4g();
pr_info("Freescale P1022 DS reference board\n");
}
-machine_device_initcall(p1022_ds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1022_ds, mpc85xx_common_publish_devices);
machine_arch_initcall(p1022_ds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/p1022_rdk.c b/arch/powerpc/platforms/85xx/p1022_rdk.c
index b3cf11b..4d328aa 100644
--- a/arch/powerpc/platforms/85xx/p1022_rdk.c
+++ b/arch/powerpc/platforms/85xx/p1022_rdk.c
@@ -14,7 +14,6 @@
#include <linux/pci.h>
#include <linux/of_platform.h>
-#include <linux/memblock.h>
#include <asm/div64.h>
#include <asm/mpic.h>
#include <asm/swiotlb.h>
@@ -121,32 +120,9 @@ void __init p1022_rdk_pic_init(void)
*/
static void __init p1022_rdk_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
- dma_addr_t max = 0xffffffff;
-
if (ppc_md.progress)
ppc_md.progress("p1022_rdk_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,p1022-pcie") {
- struct resource rsrc;
- struct pci_controller *hose;
-
- of_address_to_resource(np, 0, &rsrc);
-
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
-
- hose = pci_find_hose_for_OF_device(np);
- max = min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
- }
-#endif
-
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
diu_ops.set_monitor_port = p1022rdk_set_monitor_port;
diu_ops.set_pixel_clock = p1022rdk_set_pixel_clock;
@@ -155,18 +131,12 @@ static void __init p1022_rdk_setup_arch(void)
mpc85xx_smp_init();
-#ifdef CONFIG_SWIOTLB
- if ((memblock_end_of_DRAM() - 1) > max) {
- ppc_swiotlb_enable = 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
- }
-#endif
+ swiotlb_detect_4g();
pr_info("Freescale / iVeia P1022 RDK reference board\n");
}
-machine_device_initcall(p1022_rdk, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1022_rdk, mpc85xx_common_publish_devices);
machine_arch_initcall(p1022_rdk, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/p1023_rds.c b/arch/powerpc/platforms/85xx/p1023_rds.c
index 2990e8b..606eff9 100644
--- a/arch/powerpc/platforms/85xx/p1023_rds.c
+++ b/arch/powerpc/platforms/85xx/p1023_rds.c
@@ -80,15 +80,10 @@ static void __init mpc85xx_rds_setup_arch(void)
}
}
-#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,p1023-pcie")
- fsl_add_bridge(np, 0);
-#endif
-
mpc85xx_smp_init();
}
-machine_device_initcall(p1023_rds, mpc85xx_common_publish_devices);
+machine_arch_initcall(p1023_rds, mpc85xx_common_publish_devices);
static void __init mpc85xx_rds_pic_init(void)
{
diff --git a/arch/powerpc/platforms/85xx/p2041_rdb.c b/arch/powerpc/platforms/85xx/p2041_rdb.c
index 6541fa2..000c089 100644
--- a/arch/powerpc/platforms/85xx/p2041_rdb.c
+++ b/arch/powerpc/platforms/85xx/p2041_rdb.c
@@ -80,7 +80,7 @@ define_machine(p2041_rdb) {
.power_save = e500_idle,
};
-machine_device_initcall(p2041_rdb, corenet_ds_publish_devices);
+machine_arch_initcall(p2041_rdb, corenet_ds_publish_devices);
#ifdef CONFIG_SWIOTLB
machine_arch_initcall(p2041_rdb, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/p3041_ds.c b/arch/powerpc/platforms/85xx/p3041_ds.c
index f238efa..b3edc20 100644
--- a/arch/powerpc/platforms/85xx/p3041_ds.c
+++ b/arch/powerpc/platforms/85xx/p3041_ds.c
@@ -82,7 +82,7 @@ define_machine(p3041_ds) {
.power_save = e500_idle,
};
-machine_device_initcall(p3041_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p3041_ds, corenet_ds_publish_devices);
#ifdef CONFIG_SWIOTLB
machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/p4080_ds.c b/arch/powerpc/platforms/85xx/p4080_ds.c
index c92417d..54df106 100644
--- a/arch/powerpc/platforms/85xx/p4080_ds.c
+++ b/arch/powerpc/platforms/85xx/p4080_ds.c
@@ -81,7 +81,7 @@ define_machine(p4080_ds) {
.power_save = e500_idle,
};
-machine_device_initcall(p4080_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p4080_ds, corenet_ds_publish_devices);
#ifdef CONFIG_SWIOTLB
machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
#endif
diff --git a/arch/powerpc/platforms/85xx/p5020_ds.c b/arch/powerpc/platforms/85xx/p5020_ds.c
index 17bef15..753a42c 100644
--- a/arch/powerpc/platforms/85xx/p5020_ds.c
+++ b/arch/powerpc/platforms/85xx/p5020_ds.c
@@ -91,7 +91,7 @@ define_machine(p5020_ds) {
#endif
};
-machine_device_initcall(p5020_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p5020_ds, corenet_ds_publish_devices);
#ifdef CONFIG_SWIOTLB
machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/p5040_ds.c b/arch/powerpc/platforms/85xx/p5040_ds.c
index 8e22a34..1138185 100644
--- a/arch/powerpc/platforms/85xx/p5040_ds.c
+++ b/arch/powerpc/platforms/85xx/p5040_ds.c
@@ -82,7 +82,7 @@ define_machine(p5040_ds) {
#endif
};
-machine_device_initcall(p5040_ds, corenet_ds_publish_devices);
+machine_arch_initcall(p5040_ds, corenet_ds_publish_devices);
#ifdef CONFIG_SWIOTLB
machine_arch_initcall(p5040_ds, swiotlb_setup_bus_notifier);
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c
index 3c5490c..b3f27c5 100644
--- a/arch/powerpc/platforms/85xx/qemu_e500.c
+++ b/arch/powerpc/platforms/85xx/qemu_e500.c
@@ -41,7 +41,6 @@ static void __init qemu_e500_setup_arch(void)
{
ppc_md.progress("qemu_e500_setup_arch()", 0);
- fsl_pci_init();
swiotlb_detect_4g();
mpc85xx_smp_init();
}
@@ -56,7 +55,7 @@ static int __init qemu_e500_probe(void)
return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500");
}
-machine_device_initcall(qemu_e500, mpc85xx_common_publish_devices);
+machine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices);
define_machine(qemu_e500) {
.name = "QEMU e500",
diff --git a/arch/powerpc/platforms/85xx/sbc8548.c b/arch/powerpc/platforms/85xx/sbc8548.c
index cd3a66b..2825a62 100644
--- a/arch/powerpc/platforms/85xx/sbc8548.c
+++ b/arch/powerpc/platforms/85xx/sbc8548.c
@@ -88,26 +88,9 @@ static int __init sbc8548_hw_rev(void)
*/
static void __init sbc8548_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("sbc8548_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
- of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
- struct resource rsrc;
- of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
- }
- }
-#endif
sbc_rev = sbc8548_hw_rev();
}
@@ -128,7 +111,7 @@ static void sbc8548_show_cpuinfo(struct seq_file *m)
seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
}
-machine_device_initcall(sbc8548, mpc85xx_common_publish_devices);
+machine_arch_initcall(sbc8548, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/socrates.c b/arch/powerpc/platforms/85xx/socrates.c
index b9c6daa..381463e 100644
--- a/arch/powerpc/platforms/85xx/socrates.c
+++ b/arch/powerpc/platforms/85xx/socrates.c
@@ -66,20 +66,11 @@ static void __init socrates_pic_init(void)
*/
static void __init socrates_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("socrates_setup_arch()", 0);
-
-#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
- fsl_add_bridge(np, 1);
-#endif
}
-machine_device_initcall(socrates, mpc85xx_common_publish_devices);
+machine_arch_initcall(socrates, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
index e050800..bb1b1a7 100644
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -60,21 +60,12 @@ static void __init stx_gp3_pic_init(void)
*/
static void __init stx_gp3_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("stx_gp3_setup_arch()", 0);
#ifdef CONFIG_CPM2
cpm2_reset();
#endif
-
-#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
- fsl_add_bridge(np, 1);
-#endif
}
static void stx_gp3_show_cpuinfo(struct seq_file *m)
@@ -93,7 +84,7 @@ static void stx_gp3_show_cpuinfo(struct seq_file *m)
seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
}
-machine_device_initcall(stx_gp3, mpc85xx_common_publish_devices);
+machine_arch_initcall(stx_gp3, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 4d786c2..c8ef526 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -59,31 +59,12 @@ static void __init tqm85xx_pic_init(void)
*/
static void __init tqm85xx_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("tqm85xx_setup_arch()", 0);
#ifdef CONFIG_CPM2
cpm2_reset();
#endif
-
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
- of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
- struct resource rsrc;
- if (!of_address_to_resource(np, 0, &rsrc)) {
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
- }
- }
- }
-#endif
}
static void tqm85xx_show_cpuinfo(struct seq_file *m)
@@ -123,7 +104,7 @@ static void __init tqm85xx_ti1520_fixup(struct pci_dev *pdev)
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1520,
tqm85xx_ti1520_fixup);
-machine_device_initcall(tqm85xx, mpc85xx_common_publish_devices);
+machine_arch_initcall(tqm85xx, mpc85xx_common_publish_devices);
static const char *board[] __initdata = {
"tqc,tqm8540",
diff --git a/arch/powerpc/platforms/85xx/xes_mpc85xx.c b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
index 41c6875..7c9cf6b 100644
--- a/arch/powerpc/platforms/85xx/xes_mpc85xx.c
+++ b/arch/powerpc/platforms/85xx/xes_mpc85xx.c
@@ -111,18 +111,11 @@ static void xes_mpc85xx_fixups(void)
}
}
-#ifdef CONFIG_PCI
-static int primary_phb_addr;
-#endif
-
/*
* Setup the architecture
*/
static void __init xes_mpc85xx_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
struct device_node *root;
const char *model = "Unknown";
@@ -137,26 +130,12 @@ static void __init xes_mpc85xx_setup_arch(void)
xes_mpc85xx_fixups();
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
- of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
- struct resource rsrc;
- of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == primary_phb_addr)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
- }
- }
-#endif
-
mpc85xx_smp_init();
}
-machine_device_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
-machine_device_initcall(xes_mpc8548, mpc85xx_common_publish_devices);
-machine_device_initcall(xes_mpc8540, mpc85xx_common_publish_devices);
+machine_arch_initcall(xes_mpc8572, mpc85xx_common_publish_devices);
+machine_arch_initcall(xes_mpc8548, mpc85xx_common_publish_devices);
+machine_arch_initcall(xes_mpc8540, mpc85xx_common_publish_devices);
/*
* Called very early, device-tree isn't unflattened
@@ -165,42 +144,21 @@ static int __init xes_mpc8572_probe(void)
{
unsigned long root = of_get_flat_dt_root();
- if (of_flat_dt_is_compatible(root, "xes,MPC8572")) {
-#ifdef CONFIG_PCI
- primary_phb_addr = 0x8000;
-#endif
- return 1;
- } else {
- return 0;
- }
+ return of_flat_dt_is_compatible(root, "xes,MPC8572");
}
static int __init xes_mpc8548_probe(void)
{
unsigned long root = of_get_flat_dt_root();
- if (of_flat_dt_is_compatible(root, "xes,MPC8548")) {
-#ifdef CONFIG_PCI
- primary_phb_addr = 0xb000;
-#endif
- return 1;
- } else {
- return 0;
- }
+ return of_flat_dt_is_compatible(root, "xes,MPC8548");
}
static int __init xes_mpc8540_probe(void)
{
unsigned long root = of_get_flat_dt_root();
- if (of_flat_dt_is_compatible(root, "xes,MPC8540")) {
-#ifdef CONFIG_PCI
- primary_phb_addr = 0xb000;
-#endif
- return 1;
- } else {
- return 0;
- }
+ return of_flat_dt_is_compatible(root, "xes,MPC8540");
}
define_machine(xes_mpc8572) {
diff --git a/arch/powerpc/platforms/86xx/gef_ppc9a.c b/arch/powerpc/platforms/86xx/gef_ppc9a.c
index 1fca663..6c7ddb3 100644
--- a/arch/powerpc/platforms/86xx/gef_ppc9a.c
+++ b/arch/powerpc/platforms/86xx/gef_ppc9a.c
@@ -73,13 +73,6 @@ static void __init gef_ppc9a_init_irq(void)
static void __init gef_ppc9a_setup_arch(void)
{
struct device_node *regs;
-#ifdef CONFIG_PCI
- struct device_node *np;
-
- for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
- fsl_add_bridge(np, 1);
- }
-#endif
printk(KERN_INFO "GE Intelligent Platforms PPC9A 6U VME SBC\n");
@@ -221,6 +214,7 @@ static long __init mpc86xx_time_init(void)
static __initdata struct of_device_id of_bus_ids[] = {
{ .compatible = "simple-bus", },
{ .compatible = "gianfar", },
+ { .compatible = "fsl,mpc8641-pcie", },
{},
};
@@ -231,7 +225,7 @@ static int __init declare_of_platform_devices(void)
return 0;
}
-machine_device_initcall(gef_ppc9a, declare_of_platform_devices);
+machine_arch_initcall(gef_ppc9a, declare_of_platform_devices);
define_machine(gef_ppc9a) {
.name = "GE PPC9A",
diff --git a/arch/powerpc/platforms/86xx/gef_sbc310.c b/arch/powerpc/platforms/86xx/gef_sbc310.c
index 14e0e576..2195ac7 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc310.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc310.c
@@ -73,14 +73,6 @@ static void __init gef_sbc310_init_irq(void)
static void __init gef_sbc310_setup_arch(void)
{
struct device_node *regs;
-#ifdef CONFIG_PCI
- struct device_node *np;
-
- for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
- fsl_add_bridge(np, 1);
- }
-#endif
-
printk(KERN_INFO "GE Intelligent Platforms SBC310 6U VPX SBC\n");
#ifdef CONFIG_SMP
@@ -209,6 +201,7 @@ static long __init mpc86xx_time_init(void)
static __initdata struct of_device_id of_bus_ids[] = {
{ .compatible = "simple-bus", },
{ .compatible = "gianfar", },
+ { .compatible = "fsl,mpc8641-pcie", },
{},
};
@@ -219,7 +212,7 @@ static int __init declare_of_platform_devices(void)
return 0;
}
-machine_device_initcall(gef_sbc310, declare_of_platform_devices);
+machine_arch_initcall(gef_sbc310, declare_of_platform_devices);
define_machine(gef_sbc310) {
.name = "GE SBC310",
diff --git a/arch/powerpc/platforms/86xx/gef_sbc610.c b/arch/powerpc/platforms/86xx/gef_sbc610.c
index 1638f43..52fd6d7 100644
--- a/arch/powerpc/platforms/86xx/gef_sbc610.c
+++ b/arch/powerpc/platforms/86xx/gef_sbc610.c
@@ -73,13 +73,6 @@ static void __init gef_sbc610_init_irq(void)
static void __init gef_sbc610_setup_arch(void)
{
struct device_node *regs;
-#ifdef CONFIG_PCI
- struct device_node *np;
-
- for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
- fsl_add_bridge(np, 1);
- }
-#endif
printk(KERN_INFO "GE Intelligent Platforms SBC610 6U VPX SBC\n");
@@ -198,6 +191,7 @@ static long __init mpc86xx_time_init(void)
static __initdata struct of_device_id of_bus_ids[] = {
{ .compatible = "simple-bus", },
{ .compatible = "gianfar", },
+ { .compatible = "fsl,mpc8641-pcie", },
{},
};
@@ -208,7 +202,7 @@ static int __init declare_of_platform_devices(void)
return 0;
}
-machine_device_initcall(gef_sbc610, declare_of_platform_devices);
+machine_arch_initcall(gef_sbc610, declare_of_platform_devices);
define_machine(gef_sbc610) {
.name = "GE SBC610",
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 62cd3c5..a8229f3 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -91,6 +91,9 @@ static struct of_device_id __initdata mpc8610_ids[] = {
{ .compatible = "simple-bus", },
/* So that the DMA channel nodes can be probed individually: */
{ .compatible = "fsl,eloplus-dma", },
+ /* PCI controllers */
+ { .compatible = "fsl,mpc8610-pci", },
+ { .compatible = "fsl,mpc8641-pcie", },
{}
};
@@ -107,7 +110,7 @@ static int __init mpc8610_declare_of_platform_devices(void)
return 0;
}
-machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
+machine_arch_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
@@ -278,25 +281,11 @@ mpc8610hpcd_valid_monitor_port(enum fsl_diu_monitor_port port)
static void __init mpc86xx_hpcd_setup_arch(void)
{
struct resource r;
- struct device_node *np;
unsigned char *pixis;
if (ppc_md.progress)
ppc_md.progress("mpc86xx_hpcd_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_node_by_type(np, "pci") {
- if (of_device_is_compatible(np, "fsl,mpc8610-pci")
- || of_device_is_compatible(np, "fsl,mpc8641-pcie")) {
- struct resource rsrc;
- of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0xa000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
- }
- }
-#endif
#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
diu_ops.get_pixel_format = mpc8610hpcd_get_pixel_format;
diu_ops.set_gamma_table = mpc8610hpcd_set_gamma_table;
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 817245b..182cbe6 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -19,7 +19,6 @@
#include <linux/delay.h>
#include <linux/seq_file.h>
#include <linux/of_platform.h>
-#include <linux/memblock.h>
#include <asm/time.h>
#include <asm/machdep.h>
@@ -51,15 +50,8 @@ extern int uli_exclude_device(struct pci_controller *hose,
static int mpc86xx_exclude_device(struct pci_controller *hose,
u_char bus, u_char devfn)
{
- struct device_node* node;
- struct resource rsrc;
-
- node = hose->dn;
- of_address_to_resource(node, 0, &rsrc);
-
- if ((rsrc.start & 0xfffff) == 0x8000) {
+ if (hose->dn == fsl_pci_primary)
return uli_exclude_device(hose, bus, devfn);
- }
return PCIBIOS_SUCCESSFUL;
}
@@ -69,30 +61,11 @@ static int mpc86xx_exclude_device(struct pci_controller *hose,
static void __init
mpc86xx_hpcn_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
- struct pci_controller *hose;
-#endif
- dma_addr_t max = 0xffffffff;
-
if (ppc_md.progress)
ppc_md.progress("mpc86xx_hpcn_setup_arch()", 0);
#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie") {
- struct resource rsrc;
- of_address_to_resource(np, 0, &rsrc);
- if ((rsrc.start & 0xfffff) == 0x8000)
- fsl_add_bridge(np, 1);
- else
- fsl_add_bridge(np, 0);
- hose = pci_find_hose_for_OF_device(np);
- max = min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
- }
-
ppc_md.pci_exclude_device = mpc86xx_exclude_device;
-
#endif
printk("MPC86xx HPCN board from Freescale Semiconductor\n");
@@ -101,13 +74,7 @@ mpc86xx_hpcn_setup_arch(void)
mpc86xx_smp_init();
#endif
-#ifdef CONFIG_SWIOTLB
- if ((memblock_end_of_DRAM() - 1) > max) {
- ppc_swiotlb_enable = 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
- }
-#endif
+ swiotlb_detect_4g();
}
@@ -162,6 +129,7 @@ static __initdata struct of_device_id of_bus_ids[] = {
{ .compatible = "simple-bus", },
{ .compatible = "fsl,srio", },
{ .compatible = "gianfar", },
+ { .compatible = "fsl,mpc8641-pcie", },
{},
};
@@ -171,7 +139,7 @@ static int __init declare_of_platform_devices(void)
return 0;
}
-machine_device_initcall(mpc86xx_hpcn, declare_of_platform_devices);
+machine_arch_initcall(mpc86xx_hpcn, declare_of_platform_devices);
machine_arch_initcall(mpc86xx_hpcn, swiotlb_setup_bus_notifier);
define_machine(mpc86xx_hpcn) {
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c
index e7007d0..52afebf 100644
--- a/arch/powerpc/platforms/86xx/sbc8641d.c
+++ b/arch/powerpc/platforms/86xx/sbc8641d.c
@@ -38,18 +38,9 @@
static void __init
sbc8641_setup_arch(void)
{
-#ifdef CONFIG_PCI
- struct device_node *np;
-#endif
-
if (ppc_md.progress)
ppc_md.progress("sbc8641_setup_arch()", 0);
-#ifdef CONFIG_PCI
- for_each_compatible_node(np, "pci", "fsl,mpc8641-pcie")
- fsl_add_bridge(np, 0);
-#endif
-
printk("SBC8641 board from Wind River\n");
#ifdef CONFIG_SMP
@@ -102,6 +93,7 @@ mpc86xx_time_init(void)
static __initdata struct of_device_id of_bus_ids[] = {
{ .compatible = "simple-bus", },
{ .compatible = "gianfar", },
+ { .compatible = "fsl,mpc8641-pcie", },
{},
};
@@ -111,7 +103,7 @@ static int __init declare_of_platform_devices(void)
return 0;
}
-machine_device_initcall(sbc8641, declare_of_platform_devices);
+machine_arch_initcall(sbc8641, declare_of_platform_devices);
define_machine(sbc8641) {
.name = "SBC8641D",
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index da7a3d7..6408d9d 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -826,54 +826,78 @@ static const struct of_device_id pci_ids[] = {
struct device_node *fsl_pci_primary;
-void __devinit fsl_pci_init(void)
+/* Checkout if PCI contains ISA node */
+static int of_pci_has_isa(struct device_node *pci_node)
+{
+ struct device_node *np;
+ int ret = 0;
+
+ if (!pci_node)
+ return 0;
+
+ read_lock(&devtree_lock);
+ np = pci_node->allnext;
+
+ /* Only scan the children of PCI node */
+ for (; np != pci_node->sibling; np = np->allnext) {
+ if (np->type && (of_node_cmp(np->type, "isa") == 0)
+ && of_node_get(np)) {
+ ret = 1;
+ break;
+ }
+ }
+
+ of_node_put(pci_node);
+ read_unlock(&devtree_lock);
+
+ return ret;
+}
+
+static int __devinit fsl_pci_probe(struct platform_device *pdev)
{
int ret;
- struct device_node *node;
struct pci_controller *hose;
- dma_addr_t max = 0xffffffff;
+ int is_primary = 0;
- /* Callers can specify the primary bus using other means. */
if (!fsl_pci_primary) {
- /* If a PCI host bridge contains an ISA node, it's primary. */
- node = of_find_node_by_type(NULL, "isa");
- while ((fsl_pci_primary = of_get_parent(node))) {
- of_node_put(node);
- node = fsl_pci_primary;
-
- if (of_match_node(pci_ids, node))
- break;
- }
+ is_primary = of_pci_has_isa(pdev->dev.of_node);
+ if (is_primary)
+ fsl_pci_primary = pdev->dev.of_node;
}
- node = NULL;
- for_each_node_by_type(node, "pci") {
- if (of_match_node(pci_ids, node)) {
- /*
- * If there's no PCI host bridge with ISA, arbitrarily
- * designate one as primary. This can go away once
- * various bugs with primary-less systems are fixed.
- */
- if (!fsl_pci_primary)
- fsl_pci_primary = node;
-
- ret = fsl_add_bridge(node, fsl_pci_primary == node);
- if (ret == 0) {
- hose = pci_find_hose_for_OF_device(node);
- max = min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
- }
- }
- }
+ ret = fsl_add_bridge(pdev->dev.of_node, is_primary);
#ifdef CONFIG_SWIOTLB
- /*
- * if we couldn't map all of DRAM via the dma windows
- * we need SWIOTLB to handle buffers located outside of
- * dma capable memory region
- */
- if (memblock_end_of_DRAM() - 1 > max)
- ppc_swiotlb_enable = 1;
+ if (ret == 0) {
+ hose = pci_find_hose_for_OF_device(pdev->dev.of_node);
+
+ /*
+ * if we couldn't map all of DRAM via the dma windows
+ * we need SWIOTLB to handle buffers located outside of
+ * dma capable memory region
+ */
+ if (memblock_end_of_DRAM() - 1 > hose->dma_window_base_cur +
+ hose->dma_window_size)
+ ppc_swiotlb_enable = 1;
+ }
#endif
+
+ mpc85xx_pci_err_probe(pdev);
+
+ return 0;
+}
+
+static struct platform_driver fsl_pci_driver = {
+ .driver = {
+ .name = "fsl-pci",
+ .of_match_table = pci_ids,
+ },
+ .probe = fsl_pci_probe,
+};
+
+static int __init fsl_pci_init(void)
+{
+ return platform_driver_register(&fsl_pci_driver);
}
+arch_initcall(fsl_pci_init);
#endif
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index baa0fd1..ad54147 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -95,10 +95,13 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose);
extern struct device_node *fsl_pci_primary;
-#ifdef CONFIG_FSL_PCI
-void fsl_pci_init(void);
+#ifdef CONFIG_EDAC_MPC85XX
+int mpc85xx_pci_err_probe(struct platform_device *op);
#else
-static inline void fsl_pci_init(void) {}
+static inline int mpc85xx_pci_err_probe(struct platform_device *op)
+{
+ return -ENOTSUPP;
+}
#endif
#endif /* __POWERPC_FSL_PCI_H */
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 0e37462..2677883 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -200,7 +200,7 @@ static irqreturn_t mpc85xx_pci_isr(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
+int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
{
struct edac_pci_ctl_info *pci;
struct mpc85xx_pci_pdata *pdata;
@@ -214,6 +214,16 @@ static int __devinit mpc85xx_pci_err_probe(struct platform_device *op)
if (!pci)
return -ENOMEM;
+ /* make sure error reporting method is sane */
+ switch (edac_op_state) {
+ case EDAC_OPSTATE_POLL:
+ case EDAC_OPSTATE_INT:
+ break;
+ default:
+ edac_op_state = EDAC_OPSTATE_INT;
+ break;
+ }
+
pdata = pci->pvt_info;
pdata->name = "mpc85xx_pci_err";
pdata->irq = NO_IRQ;
@@ -303,6 +313,7 @@ err:
devres_release_group(&op->dev, mpc85xx_pci_err_probe);
return res;
}
+EXPORT_SYMBOL_GPL(mpc85xx_pci_err_probe);
static int mpc85xx_pci_err_remove(struct platform_device *op)
{
@@ -326,27 +337,6 @@ static int mpc85xx_pci_err_remove(struct platform_device *op)
return 0;
}
-static struct of_device_id mpc85xx_pci_err_of_match[] = {
- {
- .compatible = "fsl,mpc8540-pcix",
- },
- {
- .compatible = "fsl,mpc8540-pci",
- },
- {},
-};
-MODULE_DEVICE_TABLE(of, mpc85xx_pci_err_of_match);
-
-static struct platform_driver mpc85xx_pci_err_driver = {
- .probe = mpc85xx_pci_err_probe,
- .remove = __devexit_p(mpc85xx_pci_err_remove),
- .driver = {
- .name = "mpc85xx_pci_err",
- .owner = THIS_MODULE,
- .of_match_table = mpc85xx_pci_err_of_match,
- },
-};
-
#endif /* CONFIG_PCI */
/**************************** L2 Err device ***************************/
@@ -1193,12 +1183,6 @@ static int __init mpc85xx_mc_init(void)
if (res)
printk(KERN_WARNING EDAC_MOD_STR "L2 fails to register\n");
-#ifdef CONFIG_PCI
- res = platform_driver_register(&mpc85xx_pci_err_driver);
- if (res)
- printk(KERN_WARNING EDAC_MOD_STR "PCI fails to register\n");
-#endif
-
#ifdef CONFIG_FSL_SOC_BOOKE
pvr = mfspr(SPRN_PVR);
@@ -1235,9 +1219,6 @@ static void __exit mpc85xx_mc_exit(void)
on_each_cpu(mpc85xx_mc_restore_hid1, NULL, 0);
}
#endif
-#ifdef CONFIG_PCI
- platform_driver_unregister(&mpc85xx_pci_err_driver);
-#endif
platform_driver_unregister(&mpc85xx_l2_err_driver);
platform_driver_unregister(&mpc85xx_mc_err_driver);
}
--
1.7.5.1
^ permalink raw reply related
* [PATCH V5 2/3] powerpc/swiotlb: Enable at early stage and disable if not necessary
From: Jia Hongtao @ 2012-08-03 10:14 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: B07421, b38951
In-Reply-To: <1343988851-884-1-git-send-email-B38951@freescale.com>
Remove the dependency on PCI initialization for SWIOTLB initialization.
So that PCI can be initialized at proper time.
SWIOTLB is partly determined by PCI inbound/outbound map which is assigned
in PCI initialization. But swiotlb_init() should be done at the stage of
mem_init() which is much earlier than PCI initialization. So we reserve the
memory for SWIOTLB first and free it if not necessary.
All boards are converted to fit this change.
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/include/asm/swiotlb.h | 6 ++++++
arch/powerpc/kernel/dma-swiotlb.c | 20 ++++++++++++++++++++
arch/powerpc/mm/mem.c | 3 +--
arch/powerpc/platforms/44x/currituck.c | 10 ++--------
arch/powerpc/platforms/85xx/mpc85xx_ds.c | 1 +
arch/powerpc/platforms/85xx/qemu_e500.c | 1 +
arch/powerpc/sysdev/fsl_pci.c | 5 +----
7 files changed, 32 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/include/asm/swiotlb.h b/arch/powerpc/include/asm/swiotlb.h
index 8979d4c..de99d6e 100644
--- a/arch/powerpc/include/asm/swiotlb.h
+++ b/arch/powerpc/include/asm/swiotlb.h
@@ -22,4 +22,10 @@ int __init swiotlb_setup_bus_notifier(void);
extern void pci_dma_dev_setup_swiotlb(struct pci_dev *pdev);
+#ifdef CONFIG_SWIOTLB
+void swiotlb_detect_4g(void);
+#else
+static inline void swiotlb_detect_4g(void) {}
+#endif
+
#endif /* __ASM_SWIOTLB_H */
diff --git a/arch/powerpc/kernel/dma-swiotlb.c b/arch/powerpc/kernel/dma-swiotlb.c
index 4ab88da..aa85550 100644
--- a/arch/powerpc/kernel/dma-swiotlb.c
+++ b/arch/powerpc/kernel/dma-swiotlb.c
@@ -104,3 +104,23 @@ int __init swiotlb_setup_bus_notifier(void)
&ppc_swiotlb_plat_bus_notifier);
return 0;
}
+
+void swiotlb_detect_4g(void)
+{
+ if ((memblock_end_of_DRAM() - 1) > 0xffffffff)
+ ppc_swiotlb_enable = 1;
+}
+
+static int __init swiotlb_late_init(void)
+{
+ if (ppc_swiotlb_enable) {
+ swiotlb_print_info();
+ set_pci_dma_ops(&swiotlb_dma_ops);
+ ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
+ } else {
+ swiotlb_free();
+ }
+
+ return 0;
+}
+subsys_initcall(swiotlb_late_init);
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index baaafde..f23c4e0 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -300,8 +300,7 @@ void __init mem_init(void)
unsigned long reservedpages = 0, codesize, initsize, datasize, bsssize;
#ifdef CONFIG_SWIOTLB
- if (ppc_swiotlb_enable)
- swiotlb_init(1);
+ swiotlb_init(0);
#endif
num_physpages = memblock_phys_mem_size() >> PAGE_SHIFT;
diff --git a/arch/powerpc/platforms/44x/currituck.c b/arch/powerpc/platforms/44x/currituck.c
index 9f6c33d..6bd89a0 100644
--- a/arch/powerpc/platforms/44x/currituck.c
+++ b/arch/powerpc/platforms/44x/currituck.c
@@ -21,7 +21,6 @@
*/
#include <linux/init.h>
-#include <linux/memblock.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/rtc.h>
@@ -159,13 +158,8 @@ static void __init ppc47x_setup_arch(void)
/* No need to check the DMA config as we /know/ our windows are all of
* RAM. Lets hope that doesn't change */
-#ifdef CONFIG_SWIOTLB
- if ((memblock_end_of_DRAM() - 1) > 0xffffffff) {
- ppc_swiotlb_enable = 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
- }
-#endif
+ swiotlb_detect_4g();
+
ppc47x_smp_init();
}
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 6d3265f..56f8c8f 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -159,6 +159,7 @@ static void __init mpc85xx_ds_setup_arch(void)
if (ppc_md.progress)
ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
+ swiotlb_detect_4g();
mpc85xx_ds_pci_init();
mpc85xx_smp_init();
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c
index 95a2e53..3c5490c 100644
--- a/arch/powerpc/platforms/85xx/qemu_e500.c
+++ b/arch/powerpc/platforms/85xx/qemu_e500.c
@@ -42,6 +42,7 @@ static void __init qemu_e500_setup_arch(void)
ppc_md.progress("qemu_e500_setup_arch()", 0);
fsl_pci_init();
+ swiotlb_detect_4g();
mpc85xx_smp_init();
}
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 6938792..da7a3d7 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -872,11 +872,8 @@ void __devinit fsl_pci_init(void)
* we need SWIOTLB to handle buffers located outside of
* dma capable memory region
*/
- if (memblock_end_of_DRAM() - 1 > max) {
+ if (memblock_end_of_DRAM() - 1 > max)
ppc_swiotlb_enable = 1;
- set_pci_dma_ops(&swiotlb_dma_ops);
- ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
- }
#endif
}
#endif
--
1.7.5.1
^ permalink raw reply related
* [PATCH V5 1/3] powerpc/fsl-pci: Only scan PCI bus if configured as a host
From: Jia Hongtao @ 2012-08-03 10:14 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: B07421, b38951
In-Reply-To: <1343988851-884-1-git-send-email-B38951@freescale.com>
We change fsl_add_bridge to return -ENODEV if the controller is working in
agent mode. Then check the return value of fsl_add_bridge to guarantee
that only successfully added host bus will be scanned.
Signed-off-by: Jia Hongtao <B38951@freescale.com>
Signed-off-by: Li Yang <leoli@freescale.com>
---
arch/powerpc/sysdev/fsl_pci.c | 13 ++++++++-----
1 files changed, 8 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 50a38b3..6938792 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -465,7 +465,7 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
iounmap(hose->cfg_data);
iounmap(hose->cfg_addr);
pcibios_free_controller(hose);
- return 0;
+ return -ENODEV;
}
setup_pci_cmd(hose);
@@ -828,6 +828,7 @@ struct device_node *fsl_pci_primary;
void __devinit fsl_pci_init(void)
{
+ int ret;
struct device_node *node;
struct pci_controller *hose;
dma_addr_t max = 0xffffffff;
@@ -856,10 +857,12 @@ void __devinit fsl_pci_init(void)
if (!fsl_pci_primary)
fsl_pci_primary = node;
- fsl_add_bridge(node, fsl_pci_primary == node);
- hose = pci_find_hose_for_OF_device(node);
- max = min(max, hose->dma_window_base_cur +
- hose->dma_window_size);
+ ret = fsl_add_bridge(node, fsl_pci_primary == node);
+ if (ret == 0) {
+ hose = pci_find_hose_for_OF_device(node);
+ max = min(max, hose->dma_window_base_cur +
+ hose->dma_window_size);
+ }
}
}
--
1.7.5.1
^ permalink raw reply related
* [PATCH V5 0/3] PCI patch set description
From: Jia Hongtao @ 2012-08-03 10:14 UTC (permalink / raw)
To: linuxppc-dev, galak; +Cc: B07421, b38951
The first patch fixed a kernel panic when scanning PCI bus if it is working
in agent mode.
In later two patches we unified PCI initialization code by changing fsl_pci
to a platform drvier. The approach will affect swiotlb init and this issue
is addressed in the second patch.
All boards are converted to use PCI controller platform driver.
^ permalink raw reply
* [RFC PATCH V6 10/19] memory-hotplug: add memory_block_release
From: wency @ 2012-08-03 7:49 UTC (permalink / raw)
To: linux-mm, linux-kernel, linuxppc-dev, linux-acpi, linux-s390,
linux-sh, linux-ia64, cmetcalf
Cc: len.brown, Wen Congyang, isimatu.yasuaki, paulus, minchan.kim,
kosaki.motohiro, rientjes, cl, akpm, liuj97
In-Reply-To: <1343980161-14254-1-git-send-email-wency@cn.fujitsu.com>
From: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
When calling remove_memory_block(), the function shows following message at
device_release().
Device 'memory528' does not have a release() function, it is broken and must
be fixed.
remove_memory_block() calls kfree(mem). I think it shouled be called from
device_release(). So the patch implements memory_block_release()
CC: David Rientjes <rientjes@google.com>
CC: Jiang Liu <liuj97@gmail.com>
CC: Len Brown <len.brown@intel.com>
CC: Benjamin Herrenschmidt <benh@kernel.crashing.org>
CC: Paul Mackerras <paulus@samba.org>
CC: Christoph Lameter <cl@linux.com>
Cc: Minchan Kim <minchan.kim@gmail.com>
CC: Andrew Morton <akpm@linux-foundation.org>
CC: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
CC: Wen Congyang <wency@cn.fujitsu.com>
Signed-off-by: Yasuaki Ishimatsu <isimatu.yasuaki@jp.fujitsu.com>
---
drivers/base/memory.c | 11 ++++++++++-
1 files changed, 10 insertions(+), 1 deletions(-)
diff --git a/drivers/base/memory.c b/drivers/base/memory.c
index 038be73..1cd3ef3 100644
--- a/drivers/base/memory.c
+++ b/drivers/base/memory.c
@@ -109,6 +109,15 @@ bool is_memblk_offline(unsigned long start, unsigned long size)
}
EXPORT_SYMBOL(is_memblk_offline);
+#define to_memory_block(device) container_of(device, struct memory_block, dev)
+
+static void release_memory_block(struct device *dev)
+{
+ struct memory_block *mem = to_memory_block(dev);
+
+ kfree(mem);
+}
+
/*
* register_memory - Setup a sysfs device for a memory block
*/
@@ -119,6 +128,7 @@ int register_memory(struct memory_block *memory)
memory->dev.bus = &memory_subsys;
memory->dev.id = memory->start_section_nr / sections_per_block;
+ memory->dev.release = release_memory_block;
error = device_register(&memory->dev);
return error;
@@ -674,7 +684,6 @@ int remove_memory_block(unsigned long node_id, struct mem_section *section,
mem_remove_simple_file(mem, phys_device);
mem_remove_simple_file(mem, removable);
unregister_memory(mem);
- kfree(mem);
} else
kobject_put(&mem->dev.kobj);
--
1.7.1
^ permalink raw reply related
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