* Re: [PATCH V6 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Kumar Gala @ 2012-08-10 13:12 UTC (permalink / raw)
To: Jia Hongtao; +Cc: B07421, linuxppc-dev
In-Reply-To: <1344586776-3115-1-git-send-email-B38951@freescale.com>
On Aug 10, 2012, at 3:19 AM, Jia Hongtao wrote:
> We unified the Freescale pci/pcie initialization by changing the =
fsl_pci
> to a platform driver. In previous PCI code architecture the =
initialization
> routine is called at board_setup_arch stage. Now the initialization is =
done
> in probe function which is architectural better. Also It's convenient =
for
> adding PM support for PCI controller in later patch.
>=20
> We also change the way of determining primary bus for fitting platform
> driver. Thanks to the proposal from Ben. Please refer to the link =
below:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html
>=20
> Now we registered pci controllers as platform devices. So we combine =
two
> initialization code as one platform driver.
>=20
> Signed-off-by: Jia Hongtao <B38951@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> Signed-off-by: Chunhe Lan <Chunhe.Lan@freescale.com>
> ---
> Changes for V6:
> - Fix "isa_io_base could not be zero" bug. Thanks to Ben.
>=20
> - Determining primary by looking for ISA node does not work for =
ge_imp3a.
> It's fixed by adding ISA node to its devied tree.
>=20
> arch/powerpc/boot/dts/ge_imp3a.dts | 4 +
> arch/powerpc/kernel/pci-common.c | 2 +-
> arch/powerpc/platforms/85xx/common.c | 10 +++
> arch/powerpc/platforms/85xx/corenet_ds.c | 31 +--------
> arch/powerpc/platforms/85xx/ge_imp3a.c | 48 +------------
> arch/powerpc/platforms/85xx/mpc8536_ds.c | 36 +---------
> arch/powerpc/platforms/85xx/mpc85xx_ads.c | 9 +--
> arch/powerpc/platforms/85xx/mpc85xx_cds.c | 14 +----
> arch/powerpc/platforms/85xx/mpc85xx_ds.c | 38 ++--------
> arch/powerpc/platforms/85xx/mpc85xx_mds.c | 38 +---------
> arch/powerpc/platforms/85xx/mpc85xx_rdb.c | 28 +++-----
> arch/powerpc/platforms/85xx/p1010rdb.c | 14 +----
> arch/powerpc/platforms/85xx/p1022_ds.c | 34 +---------
> arch/powerpc/platforms/85xx/p1022_rdk.c | 34 +---------
> arch/powerpc/platforms/85xx/p1023_rds.c | 7 +--
> arch/powerpc/platforms/85xx/p2041_rdb.c | 2 +-
> arch/powerpc/platforms/85xx/p3041_ds.c | 2 +-
> arch/powerpc/platforms/85xx/p4080_ds.c | 2 +-
> arch/powerpc/platforms/85xx/p5020_ds.c | 2 +-
> arch/powerpc/platforms/85xx/p5040_ds.c | 2 +-
> arch/powerpc/platforms/85xx/qemu_e500.c | 3 +-
> arch/powerpc/platforms/85xx/sbc8548.c | 19 +-----
> arch/powerpc/platforms/85xx/socrates.c | 11 +---
> arch/powerpc/platforms/85xx/stx_gp3.c | 11 +---
> arch/powerpc/platforms/85xx/tqm85xx.c | 21 +------
> arch/powerpc/platforms/85xx/xes_mpc85xx.c | 54 ++-------------
> arch/powerpc/platforms/86xx/gef_ppc9a.c | 10 +--
> arch/powerpc/platforms/86xx/gef_sbc310.c | 11 +---
> arch/powerpc/platforms/86xx/gef_sbc610.c | 10 +--
> arch/powerpc/platforms/86xx/mpc8610_hpcd.c | 19 +----
> arch/powerpc/platforms/86xx/mpc86xx_hpcn.c | 40 +----------
> arch/powerpc/platforms/86xx/sbc8641d.c | 12 +---
> arch/powerpc/sysdev/fsl_pci.c | 102 =
+++++++++++++++++-----------
> arch/powerpc/sysdev/fsl_pci.h | 9 ++-
> drivers/edac/mpc85xx_edac.c | 43 +++---------
> 35 files changed, 165 insertions(+), 567 deletions(-)
>=20
> diff --git a/arch/powerpc/boot/dts/ge_imp3a.dts =
b/arch/powerpc/boot/dts/ge_imp3a.dts
> index fefae41..aa2c4b5 100644
> --- a/arch/powerpc/boot/dts/ge_imp3a.dts
> +++ b/arch/powerpc/boot/dts/ge_imp3a.dts
> @@ -248,6 +248,10 @@
> 0x1000000 0x0 0x0
> 0x1000000 0x0 0x0
> 0x0 0x10000>;
> +
> + isa@1e {
> + device_type =3D "isa";
> + };
> };
> };
> };
Why are we adding an isa node to the ge_imp3a.dts?
If this is really needed it should be a separate patch as well.
- k
^ permalink raw reply
* Re: [PATCH v3 1/2] mmc: Move mmc_delay() to include/linux/mmc/core.h
From: Arnd Bergmann @ 2012-08-10 13:27 UTC (permalink / raw)
To: Chunhe Lan; +Cc: linuxppc-dev, kumar.gala, cjb, linux-mmc
In-Reply-To: <1344637513-29383-1-git-send-email-Chunhe.Lan@freescale.com>
On Friday 10 August 2012, Chunhe Lan wrote:
> +static inline void mmc_delay(unsigned int ms)
> +{
> + if (ms < 1000 / HZ) {
> + cond_resched();
> + mdelay(ms);
> + } else {
> + msleep(ms);
> + }
> +}
I would actually question the point in this function to start with: The
decision whether to call mdelay() or msleep() should only be based on
whether you are allowed to sleep in the caller context. The idea of
cond_resched();
mdelay(ms);
sets off alarm bells, and I would always replace that with msleep().
Arnd
^ permalink raw reply
* Re: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document
From: Gala Kumar-B11780 @ 2012-08-10 13:35 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: Wood Scott-B07421, devicetree-discuss@lists.ozlabs.org Discuss,
Paul Mackerras, linuxppc-dev@lists.ozlabs.org list
In-Reply-To: <1344578002-8057-1-git-send-email-Dongsheng.wang@freescale.com>
On Aug 10, 2012, at 12:53 AM, <Dongsheng.wang@freescale.com> <Dongsheng.wan=
g@freescale.com> wrote:
> From: Wang Dongsheng <Dongsheng.Wang@freescale.com>
>=20
> Add a description of the OPEN-PIC global timer in the OPEN-PIC document.
>=20
> Moidfy mpic-timer document. 1.Add a TFRR register region. This register
> is written by software to report the clocking frequency of the PIC timers=
.
> 2.Add a device_type. The global timer in line with the OPEN-PIC specifica=
tion.
>=20
> Signed-off-by: Wang Dongsheng <Dongsheng.Wang@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> Documentation/devicetree/bindings/open-pic.txt | 46 +++++++++++++++=
+++++
Let's separate out the open-pic.txt timer binding change into its own patch=
from the FSL timer binding & dtsi updates.
> .../devicetree/bindings/powerpc/fsl/mpic-timer.txt | 21 +++++----
> arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi | 7 ++-
> arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi | 7 ++-
> 4 files changed, 66 insertions(+), 15 deletions(-)
>=20
> diff --git a/Documentation/devicetree/bindings/open-pic.txt b/Documentati=
on/devicetree/bindings/open-pic.txt
> index 909a902..045c2e9 100644
> --- a/Documentation/devicetree/bindings/open-pic.txt
> +++ b/Documentation/devicetree/bindings/open-pic.txt
> @@ -92,6 +92,52 @@ Example 2:
>=20
> * References
>=20
> +* Open PIC global timers
> +
> +Required properties:
> +- compatible: "open-pic,global-timer"
> +
> +- reg : Contains two regions. The first is the timer frequency reportin=
g
> + register for the group. The second is the main timer register bank
> + (GTCCR, GTBCR, GTVPR, GTDR).
> +
> +- available-ranges: use <start count> style section to define which
> + timer interrupts can be used. This property is optional; without this=
,
> + all timers within the group can be used.
> +
> +- interrupts: one interrupt per timer in the group, in order, starting
> + with timer zero. If available-ranges is present, only the interrupts
> + that correspond to available timers shall be present.
> +
If we are going to require device_type property it should be in the binding=
.
Based on the comments in ePAPR, I recommend dropping device_type from the t=
imer binding.
> +* Examples
> +
> +Example 1:
> +
> + /* Note that this requires #interrupt-cells to be 4 */
> + timer: timer@010f0 {
> + compatible =3D "open-pic,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x010f0 4 0x01100 0x100>;
> +
> + /* Another AMP partition is using timer */
> + available-ranges =3D <2 2>;
> +
> + interrupts =3D <2 0 3 0
> + 3 0 3 0>;
> + };
> +
> +Example 2:
> +
> + timer: timer@010f0 {
> + compatible =3D "open-pic,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x010f0 4 0x01100 0x100>;
> + interrupts =3D <0 0 3 0
> + 1 0 3 0
> + 2 0 3 0
> + 3 0 3 0>;
> + };
> +
> [1] Power.org (TM) Standard for Embedded Power Architecture (TM) Platform
> Requirements (ePAPR), Version 1.0, July 2008.
> (http://www.power.org/resources/downloads/Power_ePAPR_APPROVED_v1.0.p=
df)
> diff --git a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt=
b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> index df41958..5aafca0 100644
> --- a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> +++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> @@ -1,13 +1,14 @@
> * Freescale MPIC timers
>=20
> Required properties:
> -- compatible: "fsl,mpic-global-timer"
> +- compatible: "fsl,global-timer"
Why are renaming?.. also use of fsl,global-timer is to generic of a name fo=
r the this.
>=20
> -- reg : Contains two regions. The first is the main timer register bank
> - (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx). The second is the timer control
> +- reg : Contains three regions. The first is the timer frequency report=
ing
> + register (TFRRx) for the group. The second is the main timer register
> + bank (GTCCRxx, GTBCRxx, GTVPRxx, GTDRxx). The third is the timer cont=
rol
> register (TCRx) for the group.
>=20
> -- fsl,available-ranges: use <start count> style section to define which
> +- available-ranges: use <start count> style section to define which
> timer interrupts can be used. This property is optional; without this,
> all timers within the group can be used.
>=20
> @@ -18,19 +19,21 @@ Required properties:
> Example:
> /* Note that this requires #interrupt-cells to be 4 */
> timer0: timer@41100 {
> - compatible =3D "fsl,mpic-global-timer";
> - reg =3D <0x41100 0x100 0x41300 4>;
> + compatible =3D "fsl,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x410f0 4 0x41100 0x100 0x41300 4>;
>=20
> /* Another AMP partition is using timers 0 and 1 */
> - fsl,available-ranges =3D <2 2>;
> + available-ranges =3D <2 2>;
>=20
> interrupts =3D <2 0 3 0
> 3 0 3 0>;
> };
>=20
> timer1: timer@42100 {
> - compatible =3D "fsl,mpic-global-timer";
> - reg =3D <0x42100 0x100 0x42300 4>;
> + compatible =3D "fsl,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x420f0 4 0x42100 0x100 0x42300 4>;
> interrupts =3D <4 0 3 0
> 5 0 3 0
> 6 0 3 0
> diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi b/arch/power=
pc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
> index 8734cff..01cd33c 100644
> --- a/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi
> @@ -32,9 +32,10 @@
> * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> */
>=20
> -timer@42100 {
> - compatible =3D "fsl,mpic-global-timer";
> - reg =3D <0x42100 0x100 0x42300 4>;
> +timer@420f0 {
> + compatible =3D "fsl,global-timer";
Shouldn't this be:
compatible =3D "fsl,mpic-global-timer", "open-pic,global-timer";
> + device_type =3D "open-pic";
> + reg =3D <0x420f0 4 0x42100 0x100 0x42300 4>;
> interrupts =3D <4 0 3 0
> 5 0 3 0
> 6 0 3 0
> diff --git a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi b/arch/powerpc/boot/=
dts/fsl/pq3-mpic.dtsi
> index 71c30eb..c71d8e0 100644
> --- a/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
> +++ b/arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi
> @@ -44,9 +44,10 @@ mpic: pic@40000 {
> last-interrupt-source =3D <255>;
> };
>=20
> -timer@41100 {
> - compatible =3D "fsl,mpic-global-timer";
> - reg =3D <0x41100 0x100 0x41300 4>;
> +timer@410f0 {
> + compatible =3D "fsl,global-timer";
same as above.
> + device_type =3D "open-pic";
> + reg =3D <0x410f0 4 0x41100 0x100 0x41300 4>;
> interrupts =3D <0 0 3 0
> 1 0 3 0
> 2 0 3 0
> --=20
> 1.7.5.1
>=20
>=20
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply
* Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock
From: Kumar Gala @ 2012-08-10 13:50 UTC (permalink / raw)
To: Shengzhou Liu; +Cc: gregkh, linux-usb, linuxppc-dev@lists.ozlabs.org list
In-Reply-To: <1344595712-12804-2-git-send-email-Shengzhou.Liu@freescale.com>
On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:
> when missing USB PHY clock, kernel booting up will hang during USB
> initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid
> CPU hanging in this case.
>=20
> Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> ---
> drivers/usb/host/ehci-fsl.c | 63 =
++++++++++++++++++++++++++++++------------
> drivers/usb/host/ehci-fsl.h | 1 +
> 2 files changed, 46 insertions(+), 18 deletions(-)
I assume this should be considered a bug fix and be looked at for =
inclusion in v3.6?
- k=
^ permalink raw reply
* Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Scott Wood @ 2012-08-10 16:00 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, Gala Kumar-B11780,
linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A52814@039-SN1MPN1-002.039d.mgd.msft.net>
On 08/10/2012 03:47 AM, Jia Hongtao-B38951 wrote:
>
>
>> -----Original Message-----
>> From: Gala Kumar-B11780
>> Sent: Thursday, August 09, 2012 3:04 AM
>> To: Wood Scott-B07421
>> Cc: Jia Hongtao-B38951; Wood Scott-B07421; Li Yang-R58472; linuxppc-
>> dev@lists.ozlabs.org
>> Subject: Re: [PATCH V5 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>>>>>>>>> As I explained before, this has to be done globally, not from
>>>>>>>>> the probe function, so we can assign a default primary bus if
>>>>>>>>> there
>>>>> isn't any ISA.
>>>>>>>>> There are bugs in the Linux PPC PCI code relating to not having
>>>>>>>>> any primary bus.
>>>>>>>>>
>>>>>>>>> -Scott
>>>>>>>>
>>>>>>>> In my way of searching ISA you can also assign a default primary
>>>>>>>> bus in board specific files.
>>>>>>>
>>>>>>> That was meant for when the board file had an alternate way of
>>>>>>> searching for the primary bus (e.g. look for i8259), not as a
>>>>>>> replacement for the mechanism that guarantees there's a primary bus.
>>>>>>>
>>>>>>> You are causing a regression in the qemu_e500.c platform.
>>>>>>
>>>>>> Can we fix the qemu device tree to address the problem if we do
>>>>>> make it a rule to use the ISA node to indicate the primary bus?
>>>>>
>>>>> No. There is no ISA, and we're not going to lie and say there is.
>>>>
>>>> But we can assign a default primary for qemu.
>>>
>>> Not in the device tree. What other mechanism do you propose? And why
>>> do you want to fix it only for QEMU and not other boards, where things
>>> happen to work but not as designed?
>>>
>>> Kumar, can you speak up here as maintainer so we can stop going back
>>> and forth endlessly?
>>
>> I'd rather we stick with the code that works for this purpose at this
>> point. That would be Scott's current upstream code. Lets get the other
>> aspects of this patchset closed (SWIOTLB, conversion to platform driver,
>> PM, etc.). The primary bus code Scott wrote does NOT need to change at
>> this point.
>>
>> - k
>
>
> I just submitted a new version of PCI patch in which I improve the primary part.
> The reasons I want to change the way of primary assignment listed below:
>
> 1. This approach is functionally equivalent to the Scott's code. In my approach
> there might be no primary assigned but it fixed by "quick fix" introduced by Ben.
> Please refer to this link:
> https://lists.ozlabs.org/pipermail/linuxppc-dev/2012-June/098586.html
You might want to get Ben's input as to whether he actually wants to see
that "quick fix" applied.
> 2. Scott's and my way could not handle the situation that "the primary is not the
> first PCI bus detected". I found that only ge_imp3a got this problem so I fixed it
> by adding ISA node to its device tree. By adding this I think the solution is
> logically completed.
How did my approach not handle this case? As I said, ge_imp3a platform
code needs to set fsl_pci_primary manually before PCI init runs.
Adding a node to the device tree is not the answer, since that will
break compatibility with old device trees.
> 3. The key advantage of my way is better unified for platform driver. If I use
> the Scott's way I have to make an routine and called in all boards code.
Only until all boards are converted, and this is *not* different with
your approach.
> The goal
> of my PCI patch is unifying all PCI initialization code and obviously primary
> determination is part of PCI code.
>
> 4. The other advantage is efficiency. All my search for ISA node is just under
> PCI node instead of all device tree.
We do so many searches over the full device tree during boot that this
is meaningless.
Do you have benchmarks to show that device tree iteration is a
significant contributor to boot time?
-Scott
^ permalink raw reply
* Re: [-next] ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
From: Scott Wood @ 2012-08-10 17:05 UTC (permalink / raw)
To: Michael Ellerman; +Cc: linuxppc-dev
In-Reply-To: <1344589252.27290.19.camel@concordia>
On 08/10/2012 04:00 AM, Michael Ellerman wrote:
> On Fri, 2012-08-10 at 18:58 +1000, Michael Ellerman wrote:
>> On Fri, 2012-08-10 at 09:43 +0200, Geert Uytterhoeven wrote:
>>> Sicne a few days, powerpc allmodconfig fails with:
>>>
>>> ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
>>> make[2]: *** [__modpost] Error 1
>>> make[1]: *** [modules] Error 2
>>>
>>> http://kisskb.ellerman.id.au/kisskb/buildresult/6883300/
>>
>>
>> Yep, modular build is broken.
>>
>> Since this commit by the looks of it:
>>
>> commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
>> Author: Liu Yu-B13201 <Yu.Liu@freescale.com>
>> Date: Tue Jul 3 05:48:56 2012 +0000
>>
>> PPC: Don't use hardcoded opcode for ePAPR hcall invocation
>>
>> Signed-off-by: Liu Yu <yu.liu@freescale.com>
>
> And this address bounces, nice.
He doesn't work here anymore. We'll take care of the breakage.
-Scott
^ permalink raw reply
* Re: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document
From: Scott Wood @ 2012-08-10 19:21 UTC (permalink / raw)
To: Dongsheng.wang; +Cc: devicetree-discuss, paulus, linuxppc-dev, kumar.gala
In-Reply-To: <1344578002-8057-1-git-send-email-Dongsheng.wang@freescale.com>
On 08/10/2012 12:53 AM, Dongsheng.wang@freescale.com wrote:
> From: Wang Dongsheng <Dongsheng.Wang@freescale.com>
>
> Add a description of the OPEN-PIC global timer in the OPEN-PIC document.
>
> Moidfy mpic-timer document. 1.Add a TFRR register region. This register
> is written by software to report the clocking frequency of the PIC timers.
> 2.Add a device_type. The global timer in line with the OPEN-PIC specification.
>
> Signed-off-by: Wang Dongsheng <Dongsheng.Wang@freescale.com>
> Signed-off-by: Li Yang <leoli@freescale.com>
> ---
> Documentation/devicetree/bindings/open-pic.txt | 46 ++++++++++++++++++++
> .../devicetree/bindings/powerpc/fsl/mpic-timer.txt | 21 +++++----
> arch/powerpc/boot/dts/fsl/pq3-mpic-timer-B.dtsi | 7 ++-
> arch/powerpc/boot/dts/fsl/pq3-mpic.dtsi | 7 ++-
> 4 files changed, 66 insertions(+), 15 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/open-pic.txt b/Documentation/devicetree/bindings/open-pic.txt
> index 909a902..045c2e9 100644
> --- a/Documentation/devicetree/bindings/open-pic.txt
> +++ b/Documentation/devicetree/bindings/open-pic.txt
> @@ -92,6 +92,52 @@ Example 2:
>
> * References
>
> +* Open PIC global timers
> +
> +Required properties:
> +- compatible: "open-pic,global-timer"
open-pic isn't a vendor (or software project that acts like a
pseudo-vendor) -- I'd go with "open-pic-global-timer".
> +- reg : Contains two regions. The first is the timer frequency reporting
> + register for the group. The second is the main timer register bank
> + (GTCCR, GTBCR, GTVPR, GTDR).
Why not just put clock-frequency in the node, instead of describing
TFRR? I don't think U-Boot currently sets TFRR.
> +- available-ranges: use <start count> style section to define which
> + timer interrupts can be used. This property is optional; without this,
> + all timers within the group can be used.
> +
> +- interrupts: one interrupt per timer in the group, in order, starting
> + with timer zero. If available-ranges is present, only the interrupts
> + that correspond to available timers shall be present.
> +
> +* Examples
> +
> +Example 1:
> +
> + /* Note that this requires #interrupt-cells to be 4 */
> + timer: timer@010f0 {
Unit addres shouldn't have leading zeroes.
> + compatible = "open-pic,global-timer";
> + device_type = "open-pic";
Remove device_type. Not only is it deprecated outside of real OF, it's
wrong -- this isn't an openpic, it's just a subset of it.
> + reg = <0x010f0 4 0x01100 0x100>;
> +
> + /* Another AMP partition is using timer */
> + available-ranges = <2 2>;
>
> +
> + interrupts = <2 0 3 0
> + 3 0 3 0>;
> + };
> +
> +Example 2:
> +
> + timer: timer@010f0 {
> + compatible = "open-pic,global-timer";
> + device_type = "open-pic";
> + reg = <0x010f0 4 0x01100 0x100>;
> + interrupts = <0 0 3 0
> + 1 0 3 0
> + 2 0 3 0
> + 3 0 3 0>;
> + };
4-cell interrupt specifiers are specific to Freescale MPICs. This means
there's no way to describe the timer interrupt on a non-Freescale
openpic. Again, I suggest we not bother with this in the absence of an
actual need to support the timer on non-Freescale openpic in partitioned
scenarios. The existing openpic node is sufficient to describe the
hardware in the absence of partitioning. We could have an
"openpic-no-timer" property to indicate that we're describing it
separately, so that the absence of a timer node isn't ambiguous as to
whether it's an old tree or a partitioned scenario. An fsl,mpic
compatible would imply openpic-no-timer.
Note that I believe many of the non-Freescale openpic nodes are going to
be found on systems with real Open Firmware, so we can't go changing the
device tree for them.
-Scott
^ permalink raw reply
* Re: [PATCH v2 2/2] powerpc/mpic: add global timer support
From: Scott Wood @ 2012-08-10 19:40 UTC (permalink / raw)
To: Dongsheng.wang; +Cc: kumar.gala, paulus, linuxppc-dev
In-Reply-To: <1344578081-8095-1-git-send-email-Dongsheng.wang@freescale.com>
On 08/10/2012 12:54 AM, Dongsheng.wang@freescale.com wrote:
> +static const struct of_device_id mpic_timer_ids[] = {
> + { .compatible = "open-pic,global-timer", },
> + { .compatible = "fsl,global-timer", },
> + {},
> +};
> +
> +static int __init mpic_timer_init(void)
> +{
> + struct device_node *np = NULL;
> +
> + for_each_node_by_type(np, "open-pic")
> + if (of_match_node(mpic_timer_ids, np))
> + group_init(np);
> +
> + if (list_empty(&group_list))
> + return -ENODEV;
> +
> + return 0;
> +}
> +arch_initcall(mpic_timer_init);
>
Where do you distinguish an FSL timer from an openpic timer? I thought
openpic timers didn't support cascading.
Oh, and don't probe by device_type.
-Scott
^ permalink raw reply
* Re: [PATCH v2 2/2] powerpc/mpic: add global timer support
From: Gala Kumar-B11780 @ 2012-08-10 20:24 UTC (permalink / raw)
To: Wood Scott-B07421
Cc: linuxppc-dev@lists.ozlabs.org, Wang Dongsheng-B40534,
paulus@samba.org
In-Reply-To: <5025639F.4070203@freescale.com>
On Aug 10, 2012, at 2:40 PM, Scott Wood wrote:
> On 08/10/2012 12:54 AM, Dongsheng.wang@freescale.com wrote:
>> +static const struct of_device_id mpic_timer_ids[] =3D {
>> + { .compatible =3D "open-pic,global-timer", },
>> + { .compatible =3D "fsl,global-timer", },
>> + {},
>> +};
>> +
>> +static int __init mpic_timer_init(void)
>> +{
>> + struct device_node *np =3D NULL;
>> +
>> + for_each_node_by_type(np, "open-pic")
>> + if (of_match_node(mpic_timer_ids, np))
>> + group_init(np);
>> +
>> + if (list_empty(&group_list))
>> + return -ENODEV;
>> +
>> + return 0;
>> +}
>> +arch_initcall(mpic_timer_init);
>>=20
>=20
> Where do you distinguish an FSL timer from an openpic timer? I thought
> openpic timers didn't support cascading.
in group_init()
+ if (of_device_is_compatible(np, "fsl,global-timer"))
+ priv->flags |=3D FSL_GLOBAL_TIMER;
+
- k
^ permalink raw reply
* Re: [PATCH v2 2/2] powerpc/mpic: add global timer support
From: Scott Wood @ 2012-08-10 20:37 UTC (permalink / raw)
To: Dongsheng.wang; +Cc: kumar.gala, paulus, linuxppc-dev
In-Reply-To: <1344578081-8095-1-git-send-email-Dongsheng.wang@freescale.com>
On 08/10/2012 12:54 AM, Dongsheng.wang@freescale.com wrote:
> +static int group_get_freq(struct group_priv *priv)
> +{
> + if (priv->flags & FSL_GLOBAL_TIMER) {
> + ccbfreq = fsl_get_sys_freq();
> + priv->timerfreq = ccbfreq;
> + } else {
> + priv->timerfreq = in_be32(priv->group_tfrr);
> + }
FSL MPICs have TFRR too. I'm not sure that the lack of fsl,mpic is a
good indication that TFRR is being set (e.g. we have old device trees
for FSL chips with U-Boot that are labelled as ordinary openpics).
> +
> + if (priv->timerfreq <= 0)
> + return -EINVAL;
> +
> + return 0;
> +}
timerfreq is unsigned. It can never be < 0.
> +
> +static int group_init_regmap(struct device_node *np, struct group_priv *priv)
> +{
> + priv->group_tfrr = of_iomap(np, 0);
> + if (!priv->group_tfrr) {
> + pr_err("%s: cannot ioremap tfrr address.\n",
> + np->full_name);
> + return -EINVAL;
> + }
> +
> + priv->regs = of_iomap(np, 1);
> + if (!priv->regs) {
> + pr_err("%s: cannot ioremap timer register address.\n",
> + np->full_name);
> + return -EINVAL;
> + }
> +
> + if (!(priv->flags & FSL_GLOBAL_TIMER))
> + return 0;
> +
> + priv->group_tcr = of_iomap(np, 2);
> + if (!priv->group_tcr) {
> + pr_err("%s: cannot ioremap tcr address.\n", np->full_name);
> + return -EINVAL;
> + }
This is not compatible with existing mpic timer nodes.
> + p = of_get_property(np, "available-ranges", &len);
> + if (p && len % (2 * sizeof(u32)) != 0) {
> + pr_err("%s: malformed fsl,available-ranges property.\n",
> + np->full_name);
> + return -EINVAL;
> + }
You need to support fsl,available-ranges since that's in an accepted
binding and people could have partitioned setups already using it.
You also have a mismatch between the property you check and the error
string.
-Scott
^ permalink raw reply
* [PATCH] powerpc/epapr: export epapr_hypercall_start
From: Scott Wood @ 2012-08-10 22:21 UTC (permalink / raw)
To: agraf; +Cc: Geert Uytterhoeven, linuxppc-dev, kvm, kvm-ppc
This fixes breakage introduced by the following commit:
commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
Author: Liu Yu-B13201 <Yu.Liu@freescale.com>
Date: Tue Jul 3 05:48:56 2012 +0000
PPC: Don't use hardcoded opcode for ePAPR hcall invocation
when a driver that uses ePAPR hypercalls is built as a module.
Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
Sending to Alex even though this isn't KVM-specific since the commit it
fixes is still only in his tree (and linux-next).
arch/powerpc/kernel/ppc_ksyms.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index 3e40315..e597dde 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -43,6 +43,7 @@
#include <asm/dcr.h>
#include <asm/ftrace.h>
#include <asm/switch_to.h>
+#include <asm/epapr_hcalls.h>
#ifdef CONFIG_PPC32
extern void transfer_to_handler(void);
@@ -192,3 +193,7 @@ EXPORT_SYMBOL(__arch_hweight64);
#ifdef CONFIG_PPC_BOOK3S_64
EXPORT_SYMBOL_GPL(mmu_psize_defs);
#endif
+
+#ifdef CONFIG_EPAPR_PARAVIRT
+EXPORT_SYMBOL(epapr_hypercall_start);
+#endif
--
1.7.9.5
^ permalink raw reply related
* [PATCH 2/2] powerpc/85xx: add Fman MDIO muxing support to the P4080DS
From: Timur Tabi @ 2012-08-10 22:31 UTC (permalink / raw)
To: Andy Fleming, Scott Wood, Kumar Gala, ddaney.cavm, linuxppc-dev,
netdev
In-Reply-To: <1344637896-14267-1-git-send-email-timur@freescale.com>
The Freescale P4080 SOC contains two Fman Ethernet controllers, each of
which contains four 1G Ethernet MACs and one 10G Ethernet MAC. The
SerDes protocol determines how the MACs are routed to various RGMII,
SGMII, or XGMII PHYs on the board, so the P4080DS reference board
provides a MDIO bus multiplexing feature that is controlled via GPIOs.
This patch adds the basic Ethernet, MDIO, mdio-mux, and PHY nodes
necessary to get MDIO bus muxing working, using Cavium's mdio-mux-gpio
driver. The remaining DPAA nodes (Qman, Bman, etc), as well as the
DPAA device drivers, are not included.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
arch/powerpc/boot/dts/fsl/p4080si-post.dtsi | 12 +
arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi | 3 +
arch/powerpc/boot/dts/p4080ds.dts | 307 +++++++++++++++++++++++++++
arch/powerpc/platforms/85xx/Kconfig | 3 +
arch/powerpc/platforms/85xx/corenet_ds.c | 7 +
5 files changed, 332 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
index 8d35d2c..1ce5056 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-post.dtsi
@@ -347,4 +347,16 @@
/include/ "qoriq-usb2-mph-0.dtsi"
/include/ "qoriq-usb2-dr-0.dtsi"
/include/ "qoriq-sec4.0-0.dtsi"
+/include/ "qoriq-fman-0.dtsi"
+/include/ "qoriq-fman-0-1g-0.dtsi"
+/include/ "qoriq-fman-0-1g-1.dtsi"
+/include/ "qoriq-fman-0-1g-2.dtsi"
+/include/ "qoriq-fman-0-1g-3.dtsi"
+/include/ "qoriq-fman-0-10g-0.dtsi"
+/include/ "qoriq-fman-1.dtsi"
+/include/ "qoriq-fman-1-1g-0.dtsi"
+/include/ "qoriq-fman-1-1g-1.dtsi"
+/include/ "qoriq-fman-1-1g-2.dtsi"
+/include/ "qoriq-fman-1-1g-3.dtsi"
+/include/ "qoriq-fman-1-10g-0.dtsi"
};
diff --git a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
index b9556ee..1be6360 100644
--- a/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p4080si-pre.dtsi
@@ -69,6 +69,9 @@
rtic_c = &rtic_c;
rtic_d = &rtic_d;
sec_mon = &sec_mon;
+
+ fman0 = &fman0;
+ fman1 = &fman1;
};
cpus {
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 3e20460..68ae3bb 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -41,6 +41,44 @@
#size-cells = <2>;
interrupt-parent = <&mpic>;
+ aliases {
+ ethernet0 = &fm1_gb0; // FM1@DTSEC1
+ ethernet1 = &fm1_gb1; // FM1@DTSEC2
+ ethernet2 = &fm1_gb2; // FM1@DTSEC3
+ ethernet3 = &fm1_gb3; // FM1@DTSEC4
+ ethernet4 = &fm1_10g; // FM1@TGEC1
+ ethernet5 = &fm2_gb0; // FM2@DTSEC1
+ ethernet6 = &fm2_gb1; // FM2@DTSEC2
+ ethernet7 = &fm2_gb2; // FM2@DTSEC3
+ ethernet8 = &fm2_gb3; // FM2@DTSEC4
+ ethernet9 = &fm2_10g; // FM2@TGEC1
+
+ phy_rgmii = &phy_rgmii;
+
+ phy_sgmii_slot3_1c = &phy_sgmii_slot3_1c;
+ phy_sgmii_slot3_1d = &phy_sgmii_slot3_1d;
+ phy_sgmii_slot3_1e = &phy_sgmii_slot3_1e;
+ phy_sgmii_slot3_1f = &phy_sgmii_slot3_1f;
+
+ phy_sgmii_slot4_1c = &phy_sgmii_slot4_1c;
+ phy_sgmii_slot4_1d = &phy_sgmii_slot4_1d;
+ phy_sgmii_slot4_1e = &phy_sgmii_slot4_1e;
+ phy_sgmii_slot4_1f = &phy_sgmii_slot4_1f;
+
+ phy_sgmii_slot5_1c = &phy_sgmii_slot5_1c;
+ phy_sgmii_slot5_1d = &phy_sgmii_slot5_1d;
+ phy_sgmii_slot5_1e = &phy_sgmii_slot5_1e;
+ phy_sgmii_slot5_1f = &phy_sgmii_slot5_1f;
+
+ // Used by U-Boot to find the mdio-mux nodes
+ emi1_rgmii = &emi1_rgmii;
+ emi1_slot3 = &emi1_slot3;
+ emi1_slot4 = &emi1_slot4;
+ emi1_slot5 = &emi1_slot5;
+ emi2_slot4 = &emi2_slot4;
+ emi2_slot5 = &emi2_slot5;
+ };
+
memory {
device_type = "memory";
};
@@ -106,6 +144,117 @@
dr_mode = "host";
phy_type = "ulpi";
};
+
+ fman0: fman@400000 {
+ fm1_gb0: ethernet@e0000 {
+ tbi-handle = <&tbi0>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio0: mdio@e1120 {
+ tbi0: tbi-phy@8 {
+ reg = <0x8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm1_gb1: ethernet@e2000 {
+ tbi-handle = <&tbi1>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e3120 {
+ tbi1: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm1_gb2: ethernet@e4000 {
+ tbi-handle = <&tbi2>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e5120 {
+ tbi2: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm1_gb3: ethernet@e6000 {
+ tbi-handle = <&tbi3>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e7120 {
+ tbi3: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm1_10g: ethernet@f0000 {
+ phy-handle = <&phy_xgmii_slot5>;
+ phy-connection-type = "xgmii";
+ };
+ };
+
+ fman1: fman@500000 {
+ fm2_gb0: ethernet@e0000 {
+ tbi-handle = <&tbi5>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e1120 {
+ tbi5: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm2_gb1: ethernet@e2000 {
+ tbi-handle = <&tbi6>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e3120 {
+ tbi6: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm2_gb2: ethernet@e4000 {
+ tbi-handle = <&tbi7>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e5120 {
+ tbi7: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm2_gb3: ethernet@e6000 {
+ tbi-handle = <&tbi8>;
+ phy-connection-type = "sgmii";
+ };
+
+ mdio@e7120 {
+ tbi8: tbi-phy@8 {
+ reg = <8>;
+ device_type = "tbi-phy";
+ };
+ };
+
+ fm2_10g: ethernet@f0000 {
+ phy-handle = <&phy_xgmii_slot4>;
+ phy-connection-type = "xgmii";
+ };
+ };
+
};
rio: rapidio@ffe0c0000 {
@@ -182,6 +331,164 @@
};
};
+ fsl,dpaa {
+ compatible = "fsl,p4080-dpaa", "fsl,dpaa";
+
+ ethernet@0 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1_gb0>;
+ };
+ ethernet@1 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1_gb1>;
+ };
+ ethernet@2 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1_gb2>;
+ };
+ ethernet@3 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1_gb3>;
+ };
+ ethernet@4 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm1_10g>;
+ };
+ ethernet@5 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2_gb0>;
+ };
+ ethernet@6 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2_gb1>;
+ };
+ ethernet@7 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2_gb2>;
+ };
+ ethernet@8 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2_gb3>;
+ };
+ ethernet@9 {
+ compatible = "fsl,p4080-dpa-ethernet", "fsl,dpa-ethernet";
+ fsl,fman-mac = <&fm2_10g>;
+ };
+ };
+
+ mdio-mux-emi1 {
+ compatible = "mdio-mux-gpio", "mdio-mux";
+ // The 'reg' property of the MDIO nodes is written to the
+ // GPIOs as a single number, but the driver parses the number
+ // in little-endian order, so these GPIO pins need to be in
+ // little-endian order.
+ gpios = <&gpio0 1 0>, <&gpio0 0 0>;
+ mdio-parent-bus = <&mdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ emi1_rgmii: mdio@0 { // RGMII
+ status = "disabled";
+ reg = <0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_rgmii: ethernet-phy@0 {
+ reg = <0x0>;
+ };
+ };
+
+ emi1_slot3: mdio@2 { // Slot 3 SGMII
+ status = "disabled";
+ reg = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_sgmii_slot3_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_slot3_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_slot3_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_slot3_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ emi1_slot4: mdio@1 { // Slot 4 SGMII
+ status = "disabled";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_sgmii_slot4_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_slot4_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_slot4_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_slot4_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+
+ emi1_slot5: mdio@3 { // Slot 5 SGMII
+ status = "disabled";
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_sgmii_slot5_1c: ethernet-phy@1c {
+ reg = <0x1c>;
+ };
+ phy_sgmii_slot5_1d: ethernet-phy@1d {
+ reg = <0x1d>;
+ };
+ phy_sgmii_slot5_1e: ethernet-phy@1e {
+ reg = <0x1e>;
+ };
+ phy_sgmii_slot5_1f: ethernet-phy@1f {
+ reg = <0x1f>;
+ };
+ };
+ };
+
+ mdio-mux-emi2 {
+ compatible = "mdio-mux-gpio", "mdio-mux";
+ // The mdio-mux-gpio driver wants GPIOs in little-endian order
+ gpios = <&gpio0 3 0>, <&gpio0 2 0>;
+ mdio-parent-bus = <&xmdio0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ emi2_slot4: mdio@1 { // Slot 4 XAUI (FM2)
+ status = "disabled";
+ reg = <1>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_xgmii_slot4: ethernet-phy@0 {
+ reg = <0>;
+ };
+ };
+
+ emi2_slot5: mdio@3 { // Slot 5 XAUI (FM1)
+ status = "disabled";
+ reg = <3>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy_xgmii_slot5: ethernet-phy@4 {
+ reg = <4>;
+ };
+ };
+ };
};
/include/ "fsl/p4080si-post.dtsi"
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index 159c01e..591ec5e 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -235,6 +235,9 @@ config P4080_DS
select GPIO_MPC8XXX
select HAS_RAPIDIO
select PPC_EPAPR_HV_PIC
+ select MPC8xxx_GPIO if PHYLIB
+ select MDIO_BUS_MUX if PHYLIB
+ select MDIO_BUS_MUX_GPIO if PHYLIB
help
This option enables support for the P4080 DS board
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index 925b028..a79fc79 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -106,6 +106,13 @@ static const struct of_device_id of_device_ids[] __devinitconst = {
{
.name = "handles",
},
+ {
+ /*
+ * Warning: this entry might need to be located before those
+ * for the Fman Ethernet nodes.
+ */
+ .compatible = "mdio-mux",
+ },
{}
};
--
1.7.3.4
^ permalink raw reply related
* [PATCH 1/2] powerpc/85xx: add the Fman device tree template include files
From: Timur Tabi @ 2012-08-10 22:31 UTC (permalink / raw)
To: Andy Fleming, Scott Wood, Kumar Gala, ddaney.cavm, linuxppc-dev,
netdev
Introduce the template include files for the Freecale Frame Manager (Fman).
An SOC can have up to two Fman devices, and each Fman can have up to
five 1G Ethernet MACs and one 10G Ethernet MAC.
Signed-off-by: Timur Tabi <timur@freescale.com>
---
arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi | 140 +++++++++++++++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi | 54 ++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi | 63 +++++++++
arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi | 140 +++++++++++++++++++++
14 files changed, 1027 insertions(+), 0 deletions(-)
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi
create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi
new file mode 100644
index 0000000..cc6bad3
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@400000 {
+ fman0_10g_rx0: port@90000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-10g-rx";
+ reg = <0x90000 0x1000>;
+ };
+
+ fman0_10g_tx0: port@b0000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-10g-tx";
+ reg = <0xb0000 0x1000>;
+ fsl,qman-channel-id = <0x40>;
+ };
+
+ ethernet@f0000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-10g-mac";
+ reg = <0xf0000 0x1000>;
+ fsl,port-handles = <&fman0_10g_rx0 &fman0_10g_tx0>;
+ };
+
+ xmdio0: mdio@f1000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-xmdio";
+ reg = <0xf1000 0x1000>;
+ interrupts = <100 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi
new file mode 100644
index 0000000..d6dca2c
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@400000 {
+ fman0_rx0: port@88000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x88000 0x1000>;
+ };
+
+ fman0_tx0: port@a8000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xa8000 0x1000>;
+ };
+
+ ethernet@e0000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe0000 0x1000>;
+ fsl,port-handles = <&fman0_rx0 &fman0_tx0>;
+ ptimer-handle = <&ptp_timer0>;
+ };
+
+ mdio0: mdio@e1120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-mdio";
+ reg = <0xe1120 0xee0>;
+ interrupts = <100 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi
new file mode 100644
index 0000000..75e3dd6
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #1 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@400000 {
+ fman0_rx1: port@89000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x89000 0x1000>;
+ };
+
+ fman0_tx1: port@a9000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xa9000 0x1000>;
+ };
+
+ ethernet@e2000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe2000 0x1000>;
+ fsl,port-handles = <&fman0_rx1 &fman0_tx1>;
+ ptimer-handle = <&ptp_timer0>;
+ };
+
+ mdio@e3120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe3120 0xee0>;
+ interrupts = <100 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi
new file mode 100644
index 0000000..d0fd687
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #2 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@400000 {
+ fman0_rx2: port@8a000 {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x8a000 0x1000>;
+ };
+
+ fman0_tx2: port@aa000 {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xaa000 0x1000>;
+ };
+
+ ethernet@e4000 {
+ cell-index = <2>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe4000 0x1000>;
+ fsl,port-handles = <&fman0_rx2 &fman0_tx2>;
+ ptimer-handle = <&ptp_timer0>;
+ };
+
+ mdio@e5120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe5120 0xee0>;
+ interrupts = <100 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi
new file mode 100644
index 0000000..712785e
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@400000 {
+ fman0_rx3: port@8b000 {
+ cell-index = <3>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x8b000 0x1000>;
+ };
+
+ fman0_tx3: port@ab000 {
+ cell-index = <3>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xab000 0x1000>;
+ };
+
+ ethernet@e6000 {
+ cell-index = <3>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe6000 0x1000>;
+ fsl,port-handles = <&fman0_rx3 &fman0_tx3>;
+ ptimer-handle = <&ptp_timer0>;
+ };
+
+ mdio@e7120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe7120 0xee0>;
+ interrupts = <100 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi
new file mode 100644
index 0000000..0ba91f0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #4 device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@400000 {
+ fman0_rx4: port@8c000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x8c000 0x1000>;
+ };
+
+ fman0_tx4: port@ac000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xac000 0x1000>;
+ };
+
+ ethernet@e8000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe8000 0x1000>;
+ fsl,port-handles = <&fman0_rx4 &fman0_tx4>;
+ ptimer-handle = <&ptp_timer0>;
+ };
+
+ mdio@e9120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe9120 0xee0>;
+ interrupts = <100 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi
new file mode 100644
index 0000000..c467e01
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi
@@ -0,0 +1,140 @@
+/*
+ * QorIQ FMan device tree stub [ controller @ offset 0x400000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman0: fman@400000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <0>;
+ compatible = "fsl,fman", "simple-bus";
+ ranges = <0 0x400000 0x100000>;
+ reg = <0x400000 0x100000>;
+ clock-frequency = <0>;
+ interrupts = <
+ 96 2 0 0
+ 16 2 1 1>;
+
+ cc {
+ compatible = "fsl,fman-cc";
+ };
+
+ muram@0 {
+ compatible = "fsl,fman-muram";
+ reg = <0x0 0x28000>;
+ };
+
+ bmi@80000 {
+ compatible = "fsl,fman-bmi";
+ reg = <0x80000 0x400>;
+ };
+
+ qmi@80400 {
+ compatible = "fsl,fman-qmi";
+ reg = <0x80400 0x400>;
+ };
+
+ fman0_oh0: port@81000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x81000 0x1000>;
+ };
+
+ fman0_oh1: port@82000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x82000 0x1000>;
+ };
+
+ fman0_oh2: port@83000 {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x83000 0x1000>;
+ };
+
+ fman0_oh3: port@84000 {
+ cell-index = <3>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x84000 0x1000>;
+ };
+
+ fman0_oh4: port@85000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x85000 0x1000>;
+ status = "disabled";
+ };
+
+ fman0_oh5: port@86000 {
+ cell-index = <5>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x86000 0x1000>;
+ status = "disabled";
+ };
+
+ fman0_oh6: port@87000 {
+ cell-index = <6>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x87000 0x1000>;
+ status = "disabled";
+ };
+
+ policer@c0000 {
+ compatible = "fsl,fman-policer";
+ reg = <0xc0000 0x1000>;
+ };
+
+ keygen@c1000 {
+ compatible = "fsl,fman-keygen";
+ reg = <0xc1000 0x1000>;
+ };
+
+ dma@c2000 {
+ compatible = "fsl,fman-dma";
+ reg = <0xc2000 0x1000>;
+ };
+
+ fpm@c3000 {
+ compatible = "fsl,fman-fpm";
+ reg = <0xc3000 0x1000>;
+ };
+
+ parser@c7000 {
+ compatible = "fsl,fman-parser";
+ reg = <0xc7000 0x1000>;
+ };
+
+ ptp_timer0: rtc@fe000 {
+ compatible = "fsl,fman-rtc";
+ reg = <0xfe000 0x1000>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi
new file mode 100644
index 0000000..2b05dee
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi
@@ -0,0 +1,54 @@
+/*
+ * QorIQ FMan 10g port #0 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@500000 {
+ fman1_10g_rx0: port@90000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-10g-rx";
+ reg = <0x90000 0x1000>;
+ };
+
+ fman1_10g_tx0: port@b0000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-10g-tx";
+ reg = <0xb0000 0x1000>;
+ };
+
+ ethernet@f0000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-10g-mac";
+ reg = <0xf0000 0x1000>;
+ fsl,port-handles = <&fman1_10g_rx0 &fman1_10g_tx0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi
new file mode 100644
index 0000000..2c46174
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #0 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@500000 {
+ fman1_rx0: port@88000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x88000 0x1000>;
+ };
+
+ fman1_tx0: port@a8000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xa8000 0x1000>;
+ };
+
+ ethernet@e0000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe0000 0x1000>;
+ fsl,port-handles = <&fman1_rx0 &fman1_tx0>;
+ ptimer-handle = <&ptp_timer1>;
+ };
+
+ mdio@e1120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe1120 0xee0>;
+ interrupts = <101 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi
new file mode 100644
index 0000000..4bf2932
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #1 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@500000 {
+ fman1_rx1: port@89000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x89000 0x1000>;
+ };
+
+ fman1_tx1: port@a9000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xa9000 0x1000>;
+ };
+
+ ethernet@e2000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe2000 0x1000>;
+ fsl,port-handles = <&fman1_rx1 &fman1_tx1>;
+ ptimer-handle = <&ptp_timer1>;
+ };
+
+ mdio@e3120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe3120 0xee0>;
+ interrupts = <101 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi
new file mode 100644
index 0000000..3ae25e4
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #2 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@500000 {
+ fman1_rx2: port@8a000 {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x8a000 0x1000>;
+ };
+
+ fman1_tx2: port@aa000 {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xaa000 0x1000>;
+ };
+
+ ethernet@e4000 {
+ cell-index = <2>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe4000 0x1000>;
+ fsl,port-handles = <&fman1_rx2 &fman1_tx2>;
+ ptimer-handle = <&ptp_timer1>;
+ };
+
+ mdio@e5120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe5120 0xee0>;
+ interrupts = <101 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi
new file mode 100644
index 0000000..516d5b9
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@500000 {
+ fman1_rx3: port@8b000 {
+ cell-index = <3>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x8b000 0x1000>;
+ };
+
+ fman1_tx3: port@ab000 {
+ cell-index = <3>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xab000 0x1000>;
+ };
+
+ ethernet@e6000 {
+ cell-index = <3>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe6000 0x1000>;
+ fsl,port-handles = <&fman1_rx3 &fman1_tx3>;
+ ptimer-handle = <&ptp_timer1>;
+ };
+
+ mdio@e7120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe7120 0xee0>;
+ interrupts = <101 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi
new file mode 100644
index 0000000..647b166
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi
@@ -0,0 +1,63 @@
+/*
+ * QorIQ FMan 1g port #4 device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman@500000 {
+ fman1_rx4: port@8c000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-1g-rx";
+ reg = <0x8c000 0x1000>;
+ };
+
+ fman1_tx4: port@ac000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-1g-tx";
+ reg = <0xac000 0x1000>;
+ };
+
+ ethernet@e8000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-1g-mac";
+ reg = <0xe8000 0x1000>;
+ fsl,port-handles = <&fman1_rx4 &fman1_tx4>;
+ ptimer-handle = <&ptp_timer1>;
+ };
+
+ mdio@e9120 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "fsl,fman-tbi";
+ reg = <0xe9120 0xee0>;
+ interrupts = <101 1 0 0>;
+ };
+};
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi b/arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi
new file mode 100644
index 0000000..9e20dfa
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi
@@ -0,0 +1,140 @@
+/*
+ * QorIQ FMan device tree stub [ controller @ offset 0x500000 ]
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ * names of its contributors may be used to endorse or promote products
+ * derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * This software is provided by Freescale Semiconductor "as is" and any
+ * express or implied warranties, including, but not limited to, the implied
+ * warranties of merchantability and fitness for a particular purpose are
+ * disclaimed. In no event shall Freescale Semiconductor be liable for any
+ * direct, indirect, incidental, special, exemplary, or consequential damages
+ * (including, but not limited to, procurement of substitute goods or services;
+ * loss of use, data, or profits; or business interruption) however caused and
+ * on any theory of liability, whether in contract, strict liability, or tort
+ * (including negligence or otherwise) arising in any way out of the use of this
+ * software, even if advised of the possibility of such damage.
+ */
+
+fman1: fman@500000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ cell-index = <1>;
+ compatible = "fsl,fman", "simple-bus";
+ ranges = <0 0x500000 0x100000>;
+ reg = <0x500000 0x100000>;
+ clock-frequency = <0>;
+ interrupts = <
+ 97 2 0 0
+ 16 2 1 0>;
+
+ cc {
+ compatible = "fsl,fman-cc";
+ };
+
+ muram@0 {
+ compatible = "fsl,fman-muram";
+ reg = <0x0 0x28000>;
+ };
+
+ bmi@80000 {
+ compatible = "fsl,fman-bmi";
+ reg = <0x80000 0x400>;
+ };
+
+ qmi@80400 {
+ compatible = "fsl,fman-qmi";
+ reg = <0x80400 0x400>;
+ };
+
+ fman1_oh0: port@81000 {
+ cell-index = <0>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x81000 0x1000>;
+ };
+
+ fman1_oh1: port@82000 {
+ cell-index = <1>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x82000 0x1000>;
+ };
+
+ fman1_oh2: port@83000 {
+ cell-index = <2>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x83000 0x1000>;
+ };
+
+ fman1_oh3: port@84000 {
+ cell-index = <3>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x84000 0x1000>;
+ };
+
+ fman1_oh4: port@85000 {
+ cell-index = <4>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x85000 0x1000>;
+ status = "disabled";
+ };
+
+ fman1_oh5: port@86000 {
+ cell-index = <5>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x86000 0x1000>;
+ status = "disabled";
+ };
+
+ fman1_oh6: port@87000 {
+ cell-index = <6>;
+ compatible = "fsl,fman-port-oh";
+ reg = <0x87000 0x1000>;
+ status = "disabled";
+ };
+
+ policer@c0000 {
+ compatible = "fsl,fman-policer";
+ reg = <0xc0000 0x1000>;
+ };
+
+ keygen@c1000 {
+ compatible = "fsl,fman-keygen";
+ reg = <0xc1000 0x1000>;
+ };
+
+ dma@c2000 {
+ compatible = "fsl,fman-dma";
+ reg = <0xc2000 0x1000>;
+ };
+
+ fpm@c3000 {
+ compatible = "fsl,fman-fpm";
+ reg = <0xc3000 0x1000>;
+ };
+
+ parser@c7000 {
+ compatible = "fsl,fman-parser";
+ reg = <0xc7000 0x1000>;
+ };
+
+ ptp_timer1: rtc@fe000 {
+ compatible = "fsl,fman-rtc";
+ reg = <0xfe000 0x1000>;
+ };
+};
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH 1/2] powerpc/85xx: add the Fman device tree template include files
From: Scott Wood @ 2012-08-10 22:34 UTC (permalink / raw)
To: Timur Tabi; +Cc: linuxppc-dev, Andy Fleming, ddaney.cavm, netdev
In-Reply-To: <1344637896-14267-1-git-send-email-timur@freescale.com>
On 08/10/2012 05:31 PM, Timur Tabi wrote:
> Introduce the template include files for the Freecale Frame Manager (Fman).
> An SOC can have up to two Fman devices, and each Fman can have up to
> five 1G Ethernet MACs and one 10G Ethernet MAC.
>
> Signed-off-by: Timur Tabi <timur@freescale.com>
> ---
> arch/powerpc/boot/dts/fsl/qoriq-fman-0-10g-0.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-0.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-1.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-2.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-3.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-0-1g-4.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-0.dtsi | 140 +++++++++++++++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-1-10g-0.dtsi | 54 ++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-0.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-1.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-2.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-3.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-1-1g-4.dtsi | 63 +++++++++
> arch/powerpc/boot/dts/fsl/qoriq-fman-1.dtsi | 140 +++++++++++++++++++++
> 14 files changed, 1027 insertions(+), 0 deletions(-)
Where's the binding document for all this? Why isn't devicetree-discuss
on CC?
-Scott
^ permalink raw reply
* Re: [PATCH 1/2] powerpc/85xx: add the Fman device tree template include files
From: Timur Tabi @ 2012-08-10 22:37 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, Andy Fleming, ddaney.cavm, netdev
In-Reply-To: <50258C5D.5070108@freescale.com>
Scott Wood wrote:
> Where's the binding document for all this? Why isn't devicetree-discuss
> on CC?
Oops. I don't even know if our existing documentation is up-to-date.
Ugh. I'll dig it up and post a v2.
--
Timur Tabi
Linux kernel developer at Freescale
^ permalink raw reply
* Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Scott Wood @ 2012-08-10 22:59 UTC (permalink / raw)
To: Jia Hongtao-B38951
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, Li Yang-R58472
In-Reply-To: <412C8208B4A0464FA894C5F0C278CD5D01A51E1B@039-SN1MPN1-002.039d.mgd.msft.net>
On 08/08/2012 10:52 PM, Jia Hongtao-B38951 wrote:
>
>
>> -----Original Message-----
>> From: Wood Scott-B07421
>> Sent: Wednesday, August 08, 2012 11:54 PM
>> To: Jia Hongtao-B38951
>> Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org; Li
>> Yang-R58472
>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>> initialization code
>>
>> On 08/07/2012 10:57 PM, Jia Hongtao-B38951 wrote:
>>>
>>>
>>>> -----Original Message-----
>>>> From: Wood Scott-B07421
>>>> Sent: Tuesday, August 07, 2012 11:20 PM
>>>> To: Jia Hongtao-B38951
>>>> Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org; Li
>>>> Yang-R58472
>>>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>>>> initialization code
>>>>
>>>> On 08/07/2012 01:23 AM, Jia Hongtao-B38951 wrote:
>>>>>> -----Original Message-----
>>>>>> From: Wood Scott-B07421
>>>>>> Sent: Monday, August 06, 2012 11:16 PM
>>>>>> To: Jia Hongtao-B38951
>>>>>> Cc: Wood Scott-B07421; Kumar Gala; linuxppc-dev@lists.ozlabs.org;
>>>>>> Li
>>>>>> Yang-R58472
>>>>>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>>>>>> initialization code
>>>>>>
>>>>>> On 08/05/2012 09:39 PM, Jia Hongtao-B38951 wrote:
>>>>>>>
>>>>>>>
>>>>>>>> -----Original Message-----
>>>>>>>> From: Wood Scott-B07421
>>>>>>>> Sent: Saturday, August 04, 2012 12:04 AM
>>>>>>>> To: Jia Hongtao-B38951
>>>>>>>> Cc: Kumar Gala; linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421;
>>>>>>>> Li
>>>>>>>> Yang-R58472
>>>>>>>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>>>>>>>> initialization code
>>>>>>>>
>>>>>>>> On 08/02/2012 10:39 PM, Jia Hongtao-B38951 wrote:
>>>>>>>>>
>>>>>>>>>
>>>>>>>>>> -----Original Message-----
>>>>>>>>>> From: Kumar Gala [mailto:galak@kernel.crashing.org]
>>>>>>>>>> Sent: Thursday, August 02, 2012 8:24 PM
>>>>>>>>>> To: Jia Hongtao-B38951
>>>>>>>>>> Cc: linuxppc-dev@lists.ozlabs.org; Wood Scott-B07421; Li
>>>>>>>>>> Yang-R58472
>>>>>>>>>> Subject: Re: [PATCH V4 3/3] powerpc/fsl-pci: Unify pci/pcie
>>>>>>>>>> initialization code
>>>>>>>>>>
>>>>>>>>>> You need to convert all boards to use fsl_pci_init before this
>>>> patch.
>>>>>>>>>> Otherwise we'll end up with PCI getting initialized twice on
>>>> boards.
>>>>>>>>>>
>>>>>>>>>> - k
>>>>>>>>>
>>>>>>>>> If we covert all boards with platform driver in this patch PCI
>>>>>>>>> will be initialized only once without converting all boards to
>>>>>>>>> use fsl_pci_init first.
>>>>>>>>
>>>>>>>> Then we'd have to pick apart core changes from board changes when
>>>>>>>> reviewing.
>>>>>>>>
>>>>>>>>> If we convert all boards to use fsl_pci_init before this patch
>>>>>>>>> and convert them to use platform driver again after this patch.
>>>>>>>>> Then between this patch and next pci will be initialized twice
>> too.
>>>>>>>>
>>>>>>>> Why? That one patch should both create the platform driver and
>>>>>>>> remove the init from fsl_pci_init() -- except things like primary
>>>> bus
>>>>>>>> detection which has to happen globally.
>>>>>>>>
>>>>>>>> -Scott
>>>>>>>
>>>>>>> "One patch both create the platform driver and remove the init
>>>>>>> from fsl_pci_init()" means we should create platform driver and
>>>>>>> applied to all boards. If so why not just directly convert all
>>>>>>> boards using platform driver?
>>>>>>
>>>>>> Because it's harder to review when you have a bunch of board code
>>>>>> in
>>>> the
>>>>>> patch in addition to core changes.
>>>>>>
>>>>>> Because you might want people to actually test on the boards in
>>>> question
>>>>>> when converting, especially given the change in how primary buses
>>>>>> are determined, and that some boards may need to provide their own
>>>>>> alternative.
>>>>>>
>>>>>> -Scott
>>>>>
>>>>> But if we separate the core changes and the boards update, between
>>>>> this
>>>> two
>>>>> patches PCI will be initialized twice.
>>>>
>>>> As I said earlier, you can remove the initcall and require boards to
>>>> manually call fsl_pci_init() until all boards are converted.
>>>>
>>>> -Scott
>>>
>>> As I said earlier, I can do this but it does not solve the twice-init
>> problem.
>>
>> I must have missed it. Why does it not solve the problem? If a board
>> doesn't call fsl_pci_init(), the platform driver doesn't get registered.
>>
>>> If I do this first and then add platform driver we also have to
>>> convert all boards using platform driver in the same patch.
>>>
>>> We finally using the platform driver so Why do you keep insisting on
>>> converting all boards using fsl_pci_init() first even it does no
>> improvement.
>>
>> What we're asking for is bisectability (don't have any intermediate
>> stages where PCI gets initialized twice), and the ability to have a
>> smooth transition where boards can be converted as people are able to
>> test them and look into their individual needs regarding primary bus.
>>
>> -Scott
>
> In my patch there is no bisectability problem. If you don't think so could
> you please give more details?
You are registering the PCI platform device with an initcall, but you
haven't updated the unconverted boards to not do the init themselves --
and your proposal to fix that breaks the "smooth transition" request.
-Scott
^ permalink raw reply
* Re: [-next] ERROR: "epapr_hypercall_start" [drivers/tty/ehv_bytechan.ko] undefined!
From: Michael Ellerman @ 2012-08-11 4:21 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <50253F43.1070706@freescale.com>
Scott Wood <scottwood@freescale.com> wrote:
>On 08/10/2012 04:00 AM, Michael Ellerman wrote:
>> On Fri, 2012-08-10 at 18:58 +1000, Michael Ellerman wrote:
>>> On Fri, 2012-08-10 at 09:43 +0200,
>>>
>>> Signed-off-by: Liu Yu <yu.liu@freescale.com>
>>
>> And this address bounces, nice.
>
>He doesn't work here anymore. We'll take care of the breakage.
Thanks.
^ permalink raw reply
* Re: [PATCH] powerpc/epapr: export epapr_hypercall_start
From: Geert Uytterhoeven @ 2012-08-11 7:01 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, agraf, kvm-ppc, kvm
In-Reply-To: <20120810222121.GA9408@tyr.buserror.net>
On Sat, Aug 11, 2012 at 12:21 AM, Scott Wood <scottwood@freescale.com> wrote:
> +EXPORT_SYMBOL(epapr_hypercall_start);
EXPORT_SYMBOL_GPL?
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply
* Re: [PATCH] powerpc/epapr: export epapr_hypercall_start
From: Tabi Timur-B04825 @ 2012-08-11 13:07 UTC (permalink / raw)
To: Geert Uytterhoeven
Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org, agraf@suse.de,
kvm-ppc@vger.kernel.org, kvm@vger.kernel.org
In-Reply-To: <CAMuHMdUZmT3g1+6yBPK3LAjTO-orE3Fh7QUP7AB5Kj8o4M4_1g@mail.gmail.com>
On Sat, Aug 11, 2012 at 2:01 AM, Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Sat, Aug 11, 2012 at 12:21 AM, Scott Wood <scottwood@freescale.com> wr=
ote:
>> +EXPORT_SYMBOL(epapr_hypercall_start);
>
> EXPORT_SYMBOL_GPL?
We prefer EXPORT_SYMBOL. We don't want to restrict our customers from
having to use GPL code.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* Re: [PATCH v2 2/2] powerpc/mpic: add global timer support
From: Tabi Timur-B04825 @ 2012-08-11 13:10 UTC (permalink / raw)
To: Wang Dongsheng-B40534
Cc: Gala Kumar-B11780, paulus@samba.org,
linuxppc-dev@lists.ozlabs.org, Wood Scott-B07421
In-Reply-To: <1344578081-8095-1-git-send-email-Dongsheng.wang@freescale.com>
On Fri, Aug 10, 2012 at 12:54 AM, <Dongsheng.wang@freescale.com> wrote:
> From: Wang Dongsheng <Dongsheng.Wang@freescale.com>
> +EXPORT_SYMBOL_GPL(mpic_request_timer);
Make these EXPORT_SYMBOL. No need for a GPL restriction.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* Re: [PATCH] powerpc/epapr: export epapr_hypercall_start
From: Alexander Graf @ 2012-08-11 13:10 UTC (permalink / raw)
To: Scott Wood; +Cc: Geert Uytterhoeven, linuxppc-dev, kvm, kvm-ppc
In-Reply-To: <20120810222121.GA9408@tyr.buserror.net>
On 11.08.2012, at 00:21, Scott Wood wrote:
> This fixes breakage introduced by the following commit:
>
> commit 6d2d82627f4f1e96a33664ace494fa363e0495cb
> Author: Liu Yu-B13201 <Yu.Liu@freescale.com>
> Date: Tue Jul 3 05:48:56 2012 +0000
>
> PPC: Don't use hardcoded opcode for ePAPR hcall invocation
>
> when a driver that uses ePAPR hypercalls is built as a module.
>
> Reported-by: Geert Uytterhoeven <geert@linux-m68k.org>
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> Sending to Alex even though this isn't KVM-specific since the commit it
> fixes is still only in his tree (and linux-next).
Thanks, applied to kvm-ppc-next.
Alex
^ permalink raw reply
* Re: [PATCH V6 3/3] powerpc/fsl-pci: Unify pci/pcie initialization code
From: Tabi Timur-B04825 @ 2012-08-11 13:11 UTC (permalink / raw)
To: Jia Hongtao-B38951; +Cc: Wood Scott-B07421, linuxppc-dev@lists.ozlabs.org
In-Reply-To: <1344586776-3115-1-git-send-email-B38951@freescale.com>
On Fri, Aug 10, 2012 at 3:19 AM, Jia Hongtao <B38951@freescale.com> wrote:
>
> +EXPORT_SYMBOL_GPL(mpc85xx_pci_err_probe);
Make this EXPORT_SYMBOL.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* Re: [PATCH 2/4] fsl_pmc: Add API to enable device as wakeup event source
From: Tabi Timur-B04825 @ 2012-08-11 13:19 UTC (permalink / raw)
To: Zhao Chenhui-B35336
Cc: Li Yang-R58472, linuxppc-dev@lists.ozlabs.org,
linux-kernel@vger.kernel.org
In-Reply-To: <1344329006-10645-2-git-send-email-chenhui.zhao@freescale.com>
On Tue, Aug 7, 2012 at 3:43 AM, Zhao Chenhui <chenhui.zhao@freescale.com> w=
rote:
> +int mpc85xx_pmc_set_wake(struct device *dev, bool enable)
> +{
> + int ret =3D 0;
> + struct device_node *clk_np;
> + const u32 *prop;
> + u32 pmcdr_mask;
> +
> + if (!pmc_regs) {
> + pr_err("%s: PMC is unavailable\n", __func__);
You have a 'struct device', so please use dev_err instead.
> + return -ENODEV;
> + }
> +
> + if (enable && !device_may_wakeup(dev))
> + return -EINVAL;
> +
> + clk_np =3D of_parse_phandle(dev->of_node, "fsl,pmc-handle", 0);
> + if (!clk_np)
> + return -EINVAL;
> +
> + prop =3D of_get_property(clk_np, "fsl,pmcdr-mask", NULL);
> + if (!prop) {
> + ret =3D -EINVAL;
> + goto out;
> + }
> + pmcdr_mask =3D be32_to_cpup(prop);
> +
> + if (enable)
> + /* clear to enable clock in low power mode */
> + clrbits32(&pmc_regs->pmcdr, pmcdr_mask);
> + else
> + setbits32(&pmc_regs->pmcdr, pmcdr_mask);
> +
> +out:
> + of_node_put(clk_np);
> + return ret;
> +}
> +EXPORT_SYMBOL_GPL(mpc85xx_pmc_set_wake);
Use EXPORT_SYMBOL, not EXPORT_SYMBOL_GPL.
> +
> +/**
> + * mpc85xx_pmc_set_lossless_ethernet - enable lossless ethernet
> + * in (deep) sleep mode
> + * @enable: True to enable event generation; false to disable
> + */
> +void mpc85xx_pmc_set_lossless_ethernet(int enable)
Should this be 'bool enable'?
> @@ -21,6 +22,17 @@ struct device_node;
>
> extern void fsl_rstcr_restart(char *cmd);
>
> +#ifdef CONFIG_FSL_PMC
> +extern int mpc85xx_pmc_set_wake(struct device *dev, bool enable);
> +extern void mpc85xx_pmc_set_lossless_ethernet(int enable);
Don't use 'extern' for functions.
--=20
Timur Tabi
Linux kernel developer at Freescale=
^ permalink raw reply
* RE: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing USB PHY clock
From: Liu Shengzhou-B36685 @ 2012-08-13 3:01 UTC (permalink / raw)
To: Kumar Gala
Cc: gregkh@linuxfoundation.org, linux-usb@vger.kernel.org,
linuxppc-dev@lists.ozlabs.org list
In-Reply-To: <366E392A-9EAE-43C9-8666-808EA19C03EA@kernel.crashing.org>
> -----Original Message-----
> From: Kumar Gala [mailto:galak@kernel.crashing.org]
> Sent: Friday, August 10, 2012 9:50 PM
> To: Liu Shengzhou-B36685
> Cc: linuxppc-dev@lists.ozlabs.org list; linux-usb@vger.kernel.org;
> gregkh@linuxfoundation.org
> Subject: Re: [PATCH 2/2] powerpc/usb: fix bug of CPU hang when missing US=
B PHY
> clock
>=20
>=20
> On Aug 10, 2012, at 5:48 AM, Shengzhou Liu wrote:
>=20
> > when missing USB PHY clock, kernel booting up will hang during USB
> > initialization. We should check USBGP[PHY_CLK_VALID] bit to avoid CPU
> > hanging in this case.
> >
> > Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
> > ---
> > drivers/usb/host/ehci-fsl.c | 63 ++++++++++++++++++++++++++++++------=
-----
> -
> > drivers/usb/host/ehci-fsl.h | 1 +
> > 2 files changed, 46 insertions(+), 18 deletions(-)
>=20
> I assume this should be considered a bug fix and be looked at for inclusi=
on in
> v3.6?
>=20
> - k
[Shengzhou] Yes.=20
^ permalink raw reply
* RE: [PATCH v2 1/2] powerpc/mpic: Add Open-PIC global timer document
From: Wang Dongsheng-B40534 @ 2012-08-13 4:10 UTC (permalink / raw)
To: Gala Kumar-B11780
Cc: Wood Scott-B07421, devicetree-discuss@lists.ozlabs.org Discuss,
Paul Mackerras, linuxppc-dev@lists.ozlabs.org list
In-Reply-To: <94D8FBCC-7AA8-4F50-90A3-2A11F579AC34@freescale.com>
>=20
> > a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> > b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> > index df41958..5aafca0 100644
> > --- a/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> > +++ b/Documentation/devicetree/bindings/powerpc/fsl/mpic-timer.txt
> > @@ -1,13 +1,14 @@
> > * Freescale MPIC timers
> >
> > Required properties:
> > -- compatible: "fsl,mpic-global-timer"
> > +- compatible: "fsl,global-timer"
>=20
> Why are renaming?.. also use of fsl,global-timer is to generic of a name
> for the this.
>=20
[Wang Dongsheng] "fsl,global-timer" is generic of a name.
^ permalink raw reply
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