* Re: [PATCHv8 01/10] PCI: use weak functions for MSI arch-specific functions
From: Benjamin Herrenschmidt @ 2013-08-08 22:39 UTC (permalink / raw)
To: Thomas Petazzoni
Cc: Lior Amsalem, Andrew Lunn, linux-ia64, linux-mips, linux-pci,
Heiko Carstens, Bjorn Helgaas, Thierry Reding, Paul Mackerras,
H. Peter Anvin, sparclinux, linux-s390, Russell King, x86,
Ingo Molnar, Ezequiel Garcia, Fenghua Yu, Jason Cooper,
Rob Herring, Chris Metcalf, Gregory Clement, Thomas Gleixner,
linux-arm-kernel, Tony Luck, Ralf Baechle, Maen Suleiman,
Martin Schwidefsky, linux390, linuxppc-dev, David S. Miller
In-Reply-To: <1376000268-18397-2-git-send-email-thomas.petazzoni@free-electrons.com>
On Fri, 2013-08-09 at 00:17 +0200, Thomas Petazzoni wrote:
> Until now, the MSI architecture-specific functions could be overloaded
> using a fairly complex set of #define and compile-time
> conditionals. In order to prepare for the introduction of the msi_chip
> infrastructure, it is desirable to switch all those functions to use
> the 'weak' mechanism. This commit converts all the architectures that
> were overidding those MSI functions to use the new strategy.
>
> Note that we keep two separate, non-weak, functions
> default_teardown_msi_irqs() and default_restore_msi_irqs() for the
> default behavior of the arch_teardown_msi_irqs() and
> arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
> code.
Looks good, I'll give it a quick spin to make sure there is no
accidental breakage on ppc today.
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> Tested-by: Daniel Price <daniel.price@gmail.com>
> Tested-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Cc: Paul Mackerras <paulus@samba.org>
> Cc: linuxppc-dev@lists.ozlabs.org
> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
> Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
> Cc: linux390@de.ibm.com
> Cc: linux-s390@vger.kernel.org
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: H. Peter Anvin <hpa@zytor.com>
> Cc: x86@kernel.org
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Tony Luck <tony.luck@intel.com>
> Cc: Fenghua Yu <fenghua.yu@intel.com>
> Cc: linux-ia64@vger.kernel.org
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: linux-mips@linux-mips.org
> Cc: David S. Miller <davem@davemloft.net>
> Cc: sparclinux@vger.kernel.org
> Cc: Chris Metcalf <cmetcalf@tilera.com>
> ---
> arch/mips/include/asm/pci.h | 5 -----
> arch/powerpc/include/asm/pci.h | 5 -----
> arch/s390/include/asm/pci.h | 4 ----
> arch/x86/include/asm/pci.h | 28 ------------------------
> arch/x86/kernel/x86_init.c | 21 ++++++++++++++++++
> drivers/pci/msi.c | 48 +++++++++++++++++++++---------------------
> include/linux/msi.h | 8 ++++++-
> 7 files changed, 52 insertions(+), 67 deletions(-)
>
> diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
> index fa8e0aa..f194c08 100644
> --- a/arch/mips/include/asm/pci.h
> +++ b/arch/mips/include/asm/pci.h
> @@ -136,11 +136,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
> return channel ? 15 : 14;
> }
>
> -#ifdef CONFIG_CPU_CAVIUM_OCTEON
> -/* MSI arch hook for OCTEON */
> -#define arch_setup_msi_irqs arch_setup_msi_irqs
> -#endif
> -
> extern char * (*pcibios_plat_setup)(char *str);
>
> #ifdef CONFIG_OF
> diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
> index 6653f27..95145a1 100644
> --- a/arch/powerpc/include/asm/pci.h
> +++ b/arch/powerpc/include/asm/pci.h
> @@ -113,11 +113,6 @@ extern int pci_domain_nr(struct pci_bus *bus);
> /* Decide whether to display the domain number in /proc */
> extern int pci_proc_domain(struct pci_bus *bus);
>
> -/* MSI arch hooks */
> -#define arch_setup_msi_irqs arch_setup_msi_irqs
> -#define arch_teardown_msi_irqs arch_teardown_msi_irqs
> -#define arch_msi_check_device arch_msi_check_device
> -
> struct vm_area_struct;
> /* Map a range of PCI memory or I/O space for a device into user space */
> int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
> diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
> index 6e577ba..262b91b 100644
> --- a/arch/s390/include/asm/pci.h
> +++ b/arch/s390/include/asm/pci.h
> @@ -21,10 +21,6 @@ void pci_iounmap(struct pci_dev *, void __iomem *);
> int pci_domain_nr(struct pci_bus *);
> int pci_proc_domain(struct pci_bus *);
>
> -/* MSI arch hooks */
> -#define arch_setup_msi_irqs arch_setup_msi_irqs
> -#define arch_teardown_msi_irqs arch_teardown_msi_irqs
> -
> #define ZPCI_BUS_NR 0 /* default bus number */
> #define ZPCI_DEVFN 0 /* default device number */
>
> diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
> index d9e9e6c..8c61de0 100644
> --- a/arch/x86/include/asm/pci.h
> +++ b/arch/x86/include/asm/pci.h
> @@ -100,29 +100,6 @@ static inline void early_quirks(void) { }
> extern void pci_iommu_alloc(void);
>
> #ifdef CONFIG_PCI_MSI
> -/* MSI arch specific hooks */
> -static inline int x86_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
> -{
> - return x86_msi.setup_msi_irqs(dev, nvec, type);
> -}
> -
> -static inline void x86_teardown_msi_irqs(struct pci_dev *dev)
> -{
> - x86_msi.teardown_msi_irqs(dev);
> -}
> -
> -static inline void x86_teardown_msi_irq(unsigned int irq)
> -{
> - x86_msi.teardown_msi_irq(irq);
> -}
> -static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
> -{
> - x86_msi.restore_msi_irqs(dev, irq);
> -}
> -#define arch_setup_msi_irqs x86_setup_msi_irqs
> -#define arch_teardown_msi_irqs x86_teardown_msi_irqs
> -#define arch_teardown_msi_irq x86_teardown_msi_irq
> -#define arch_restore_msi_irqs x86_restore_msi_irqs
> /* implemented in arch/x86/kernel/apic/io_apic. */
> struct msi_desc;
> int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
> @@ -130,11 +107,6 @@ void native_teardown_msi_irq(unsigned int irq);
> void native_restore_msi_irqs(struct pci_dev *dev, int irq);
> int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
> unsigned int irq_base, unsigned int irq_offset);
> -/* default to the implementation in drivers/lib/msi.c */
> -#define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
> -#define HAVE_DEFAULT_MSI_RESTORE_IRQS
> -void default_teardown_msi_irqs(struct pci_dev *dev);
> -void default_restore_msi_irqs(struct pci_dev *dev, int irq);
> #else
> #define native_setup_msi_irqs NULL
> #define native_teardown_msi_irq NULL
> diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
> index 5f24c71..4c374a9 100644
> --- a/arch/x86/kernel/x86_init.c
> +++ b/arch/x86/kernel/x86_init.c
> @@ -116,6 +116,27 @@ struct x86_msi_ops x86_msi = {
> .setup_hpet_msi = default_setup_hpet_msi,
> };
>
> +/* MSI arch specific hooks */
> +int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
> +{
> + return x86_msi.setup_msi_irqs(dev, nvec, type);
> +}
> +
> +void arch_teardown_msi_irqs(struct pci_dev *dev)
> +{
> + x86_msi.teardown_msi_irqs(dev);
> +}
> +
> +void arch_teardown_msi_irq(unsigned int irq)
> +{
> + x86_msi.teardown_msi_irq(irq);
> +}
> +
> +void arch_restore_msi_irqs(struct pci_dev *dev, int irq)
> +{
> + x86_msi.restore_msi_irqs(dev, irq);
> +}
> +
> struct x86_io_apic_ops x86_io_apic_ops = {
> .init = native_io_apic_init_mappings,
> .read = native_io_apic_read,
> diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
> index aca7578..823c386 100644
> --- a/drivers/pci/msi.c
> +++ b/drivers/pci/msi.c
> @@ -30,20 +30,21 @@ static int pci_msi_enable = 1;
>
> /* Arch hooks */
>
> -#ifndef arch_msi_check_device
> -int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
> +int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
> {
> - return 0;
> + return -EINVAL;
> }
> -#endif
>
> -#ifndef arch_setup_msi_irqs
> -# define arch_setup_msi_irqs default_setup_msi_irqs
> -# define HAVE_DEFAULT_MSI_SETUP_IRQS
> -#endif
> +void __weak arch_teardown_msi_irq(unsigned int irq)
> +{
> +}
>
> -#ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
> -int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
> +int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
> +{
> + return 0;
> +}
> +
> +int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
> {
> struct msi_desc *entry;
> int ret;
> @@ -65,14 +66,11 @@ int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
>
> return 0;
> }
> -#endif
> -
> -#ifndef arch_teardown_msi_irqs
> -# define arch_teardown_msi_irqs default_teardown_msi_irqs
> -# define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
> -#endif
>
> -#ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
> +/*
> + * We have a default implementation available as a separate non-weak
> + * function, as it is used by the Xen x86 PCI code
> + */
> void default_teardown_msi_irqs(struct pci_dev *dev)
> {
> struct msi_desc *entry;
> @@ -89,14 +87,12 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
> arch_teardown_msi_irq(entry->irq + i);
> }
> }
> -#endif
>
> -#ifndef arch_restore_msi_irqs
> -# define arch_restore_msi_irqs default_restore_msi_irqs
> -# define HAVE_DEFAULT_MSI_RESTORE_IRQS
> -#endif
> +void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
> +{
> + return default_teardown_msi_irqs(dev);
> +}
>
> -#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
> void default_restore_msi_irqs(struct pci_dev *dev, int irq)
> {
> struct msi_desc *entry;
> @@ -114,7 +110,11 @@ void default_restore_msi_irqs(struct pci_dev *dev, int irq)
> if (entry)
> write_msi_msg(irq, &entry->msg);
> }
> -#endif
> +
> +void __weak arch_restore_msi_irqs(struct pci_dev *dev, int irq)
> +{
> + return default_restore_msi_irqs(dev, irq);
> +}
>
> static void msi_set_enable(struct pci_dev *dev, int enable)
> {
> diff --git a/include/linux/msi.h b/include/linux/msi.h
> index ee66f3a..271dfd1 100644
> --- a/include/linux/msi.h
> +++ b/include/linux/msi.h
> @@ -51,12 +51,18 @@ struct msi_desc {
> };
>
> /*
> - * The arch hook for setup up msi irqs
> + * The arch hooks to setup up msi irqs. Those functions are
> + * implemented as weak symbols so that they /can/ be overriden by
> + * architecture specific code if needed.
> */
> int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
> void arch_teardown_msi_irq(unsigned int irq);
> int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
> void arch_teardown_msi_irqs(struct pci_dev *dev);
> int arch_msi_check_device(struct pci_dev* dev, int nvec, int type);
> +void arch_restore_msi_irqs(struct pci_dev *dev, int irq);
> +
> +void default_teardown_msi_irqs(struct pci_dev *dev);
> +void default_restore_msi_irqs(struct pci_dev *dev, int irq);
>
> #endif /* LINUX_MSI_H */
^ permalink raw reply
* [PATCHv8 02/10] PCI: remove ARCH_SUPPORTS_MSI kconfig option
From: Thomas Petazzoni @ 2013-08-08 22:17 UTC (permalink / raw)
To: Bjorn Helgaas, linux-pci, Russell King, Benjamin Herrenschmidt,
Rob Herring, Thomas Gleixner, Jason Cooper, Andrew Lunn,
Gregory Clement
Cc: Lior Amsalem, linux-mips, linux-ia64, Heiko Carstens,
Thierry Reding, Paul Mackerras, H. Peter Anvin, sparclinux,
linux-s390, x86, Ingo Molnar, Ezequiel Garcia, Fenghua Yu,
Chris Metcalf, linux-arm-kernel, Tony Luck, Ralf Baechle,
Maen Suleiman, Martin Schwidefsky, linux390, linuxppc-dev,
David S. Miller
In-Reply-To: <1376000268-18397-1-git-send-email-thomas.petazzoni@free-electrons.com>
Now that we have weak versions for each of the PCI MSI architecture
functions, we can actually build the MSI support for all platforms,
regardless of whether they provide or not architecture-specific
versions of those functions. For this reason, the ARCH_SUPPORTS_MSI
hidden kconfig boolean becomes useless, and this patch gets rid of it.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Daniel Price <daniel.price@gmail.com>
Tested-by: Thierry Reding <thierry.reding@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: linux390@de.ibm.com
Cc: linux-s390@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: x86@kernel.org
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: linux-ia64@vger.kernel.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: David S. Miller <davem@davemloft.net>
Cc: sparclinux@vger.kernel.org
Cc: Chris Metcalf <cmetcalf@tilera.com>
---
arch/arm/Kconfig | 1 -
arch/ia64/Kconfig | 1 -
arch/mips/Kconfig | 2 --
arch/powerpc/Kconfig | 1 -
arch/s390/Kconfig | 1 -
arch/sparc/Kconfig | 1 -
arch/tile/Kconfig | 1 -
arch/x86/Kconfig | 1 -
drivers/pci/Kconfig | 4 ----
9 files changed, 13 deletions(-)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 37c0f4e..41b6c96 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -441,7 +441,6 @@ config ARCH_NETX
config ARCH_IOP13XX
bool "IOP13xx-based"
depends on MMU
- select ARCH_SUPPORTS_MSI
select CPU_XSC3
select NEED_MACH_MEMORY_H
select NEED_RET_TO_USER
diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
index 5a768ad..098602b 100644
--- a/arch/ia64/Kconfig
+++ b/arch/ia64/Kconfig
@@ -9,7 +9,6 @@ config IA64
select PCI if (!IA64_HP_SIM)
select ACPI if (!IA64_HP_SIM)
select PM if (!IA64_HP_SIM)
- select ARCH_SUPPORTS_MSI
select HAVE_UNSTABLE_SCHED_CLOCK
select HAVE_IDE
select HAVE_OPROFILE
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index c3abed3..01b5f5a 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -726,7 +726,6 @@ config CAVIUM_OCTEON_SOC
select SYS_HAS_CPU_CAVIUM_OCTEON
select SWAP_IO_SPACE
select HW_HAS_PCI
- select ARCH_SUPPORTS_MSI
select ZONE_DMA32
select USB_ARCH_HAS_OHCI
select USB_ARCH_HAS_EHCI
@@ -762,7 +761,6 @@ config NLM_XLR_BOARD
select CEVT_R4K
select CSRC_R4K
select IRQ_CPU
- select ARCH_SUPPORTS_MSI
select ZONE_DMA32 if 64BIT
select SYNC_R4K
select SYS_HAS_EARLY_PRINTK
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 3bf72cd..183a165 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -727,7 +727,6 @@ config PCI
default y if !40x && !CPM2 && !8xx && !PPC_83xx \
&& !PPC_85xx && !PPC_86xx && !GAMECUBE_COMMON
default PCI_QSPAN if !4xx && !CPM2 && 8xx
- select ARCH_SUPPORTS_MSI
select GENERIC_PCI_IOMAP
help
Find out whether your system includes a PCI bus. PCI is the name of
diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
index 22f75b5..e9982a3 100644
--- a/arch/s390/Kconfig
+++ b/arch/s390/Kconfig
@@ -428,7 +428,6 @@ menuconfig PCI
bool "PCI support"
default n
depends on 64BIT
- select ARCH_SUPPORTS_MSI
select PCI_MSI
help
Enable PCI support.
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index a00cbd3..1570ad2 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -52,7 +52,6 @@ config SPARC32
config SPARC64
def_bool 64BIT
- select ARCH_SUPPORTS_MSI
select HAVE_FUNCTION_TRACER
select HAVE_FUNCTION_GRAPH_TRACER
select HAVE_FUNCTION_GRAPH_FP_TEST
diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
index 24565a7..74dff90 100644
--- a/arch/tile/Kconfig
+++ b/arch/tile/Kconfig
@@ -380,7 +380,6 @@ config PCI
select PCI_DOMAINS
select GENERIC_PCI_IOMAP
select TILE_GXIO_TRIO if TILEGX
- select ARCH_SUPPORTS_MSI if TILEGX
select PCI_MSI if TILEGX
---help---
Enable PCI root complex support, so PCIe endpoint devices can
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index b32ebf9..5db62ef 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -2014,7 +2014,6 @@ menu "Bus options (PCI etc.)"
config PCI
bool "PCI support"
default y
- select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
---help---
Find out whether you have a PCI motherboard. PCI is the name of a
bus system, i.e. the way the CPU talks to the other stuff inside
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 81944fb..b6a99f7 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -1,13 +1,9 @@
#
# PCI configuration
#
-config ARCH_SUPPORTS_MSI
- bool
-
config PCI_MSI
bool "Message Signaled Interrupts (MSI and MSI-X)"
depends on PCI
- depends on ARCH_SUPPORTS_MSI
help
This allows device drivers to enable MSI (Message Signaled
Interrupts). Message Signaled Interrupts enable a device to
--
1.8.1.2
^ permalink raw reply related
* [PATCHv8 01/10] PCI: use weak functions for MSI arch-specific functions
From: Thomas Petazzoni @ 2013-08-08 22:17 UTC (permalink / raw)
To: Bjorn Helgaas, linux-pci, Russell King, Benjamin Herrenschmidt,
Rob Herring, Thomas Gleixner, Jason Cooper, Andrew Lunn,
Gregory Clement
Cc: Lior Amsalem, linux-mips, linux-ia64, Heiko Carstens,
Thierry Reding, Paul Mackerras, H. Peter Anvin, sparclinux,
linux-s390, x86, Ingo Molnar, Ezequiel Garcia, Fenghua Yu,
Chris Metcalf, linux-arm-kernel, Tony Luck, Ralf Baechle,
Maen Suleiman, Martin Schwidefsky, linux390, linuxppc-dev,
David S. Miller
In-Reply-To: <1376000268-18397-1-git-send-email-thomas.petazzoni@free-electrons.com>
Until now, the MSI architecture-specific functions could be overloaded
using a fairly complex set of #define and compile-time
conditionals. In order to prepare for the introduction of the msi_chip
infrastructure, it is desirable to switch all those functions to use
the 'weak' mechanism. This commit converts all the architectures that
were overidding those MSI functions to use the new strategy.
Note that we keep two separate, non-weak, functions
default_teardown_msi_irqs() and default_restore_msi_irqs() for the
default behavior of the arch_teardown_msi_irqs() and
arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
code.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Tested-by: Daniel Price <daniel.price@gmail.com>
Tested-by: Thierry Reding <thierry.reding@gmail.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: linux390@de.ibm.com
Cc: linux-s390@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: x86@kernel.org
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: linux-ia64@vger.kernel.org
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: David S. Miller <davem@davemloft.net>
Cc: sparclinux@vger.kernel.org
Cc: Chris Metcalf <cmetcalf@tilera.com>
---
arch/mips/include/asm/pci.h | 5 -----
arch/powerpc/include/asm/pci.h | 5 -----
arch/s390/include/asm/pci.h | 4 ----
arch/x86/include/asm/pci.h | 28 ------------------------
arch/x86/kernel/x86_init.c | 21 ++++++++++++++++++
drivers/pci/msi.c | 48 +++++++++++++++++++++---------------------
include/linux/msi.h | 8 ++++++-
7 files changed, 52 insertions(+), 67 deletions(-)
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index fa8e0aa..f194c08 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -136,11 +136,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
return channel ? 15 : 14;
}
-#ifdef CONFIG_CPU_CAVIUM_OCTEON
-/* MSI arch hook for OCTEON */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#endif
-
extern char * (*pcibios_plat_setup)(char *str);
#ifdef CONFIG_OF
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index 6653f27..95145a1 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -113,11 +113,6 @@ extern int pci_domain_nr(struct pci_bus *bus);
/* Decide whether to display the domain number in /proc */
extern int pci_proc_domain(struct pci_bus *bus);
-/* MSI arch hooks */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
-#define arch_msi_check_device arch_msi_check_device
-
struct vm_area_struct;
/* Map a range of PCI memory or I/O space for a device into user space */
int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
index 6e577ba..262b91b 100644
--- a/arch/s390/include/asm/pci.h
+++ b/arch/s390/include/asm/pci.h
@@ -21,10 +21,6 @@ void pci_iounmap(struct pci_dev *, void __iomem *);
int pci_domain_nr(struct pci_bus *);
int pci_proc_domain(struct pci_bus *);
-/* MSI arch hooks */
-#define arch_setup_msi_irqs arch_setup_msi_irqs
-#define arch_teardown_msi_irqs arch_teardown_msi_irqs
-
#define ZPCI_BUS_NR 0 /* default bus number */
#define ZPCI_DEVFN 0 /* default device number */
diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
index d9e9e6c..8c61de0 100644
--- a/arch/x86/include/asm/pci.h
+++ b/arch/x86/include/asm/pci.h
@@ -100,29 +100,6 @@ static inline void early_quirks(void) { }
extern void pci_iommu_alloc(void);
#ifdef CONFIG_PCI_MSI
-/* MSI arch specific hooks */
-static inline int x86_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
-{
- return x86_msi.setup_msi_irqs(dev, nvec, type);
-}
-
-static inline void x86_teardown_msi_irqs(struct pci_dev *dev)
-{
- x86_msi.teardown_msi_irqs(dev);
-}
-
-static inline void x86_teardown_msi_irq(unsigned int irq)
-{
- x86_msi.teardown_msi_irq(irq);
-}
-static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
-{
- x86_msi.restore_msi_irqs(dev, irq);
-}
-#define arch_setup_msi_irqs x86_setup_msi_irqs
-#define arch_teardown_msi_irqs x86_teardown_msi_irqs
-#define arch_teardown_msi_irq x86_teardown_msi_irq
-#define arch_restore_msi_irqs x86_restore_msi_irqs
/* implemented in arch/x86/kernel/apic/io_apic. */
struct msi_desc;
int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
@@ -130,11 +107,6 @@ void native_teardown_msi_irq(unsigned int irq);
void native_restore_msi_irqs(struct pci_dev *dev, int irq);
int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
unsigned int irq_base, unsigned int irq_offset);
-/* default to the implementation in drivers/lib/msi.c */
-#define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
-#define HAVE_DEFAULT_MSI_RESTORE_IRQS
-void default_teardown_msi_irqs(struct pci_dev *dev);
-void default_restore_msi_irqs(struct pci_dev *dev, int irq);
#else
#define native_setup_msi_irqs NULL
#define native_teardown_msi_irq NULL
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 5f24c71..4c374a9 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -116,6 +116,27 @@ struct x86_msi_ops x86_msi = {
.setup_hpet_msi = default_setup_hpet_msi,
};
+/* MSI arch specific hooks */
+int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+ return x86_msi.setup_msi_irqs(dev, nvec, type);
+}
+
+void arch_teardown_msi_irqs(struct pci_dev *dev)
+{
+ x86_msi.teardown_msi_irqs(dev);
+}
+
+void arch_teardown_msi_irq(unsigned int irq)
+{
+ x86_msi.teardown_msi_irq(irq);
+}
+
+void arch_restore_msi_irqs(struct pci_dev *dev, int irq)
+{
+ x86_msi.restore_msi_irqs(dev, irq);
+}
+
struct x86_io_apic_ops x86_io_apic_ops = {
.init = native_io_apic_init_mappings,
.read = native_io_apic_read,
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index aca7578..823c386 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -30,20 +30,21 @@ static int pci_msi_enable = 1;
/* Arch hooks */
-#ifndef arch_msi_check_device
-int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
+int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
{
- return 0;
+ return -EINVAL;
}
-#endif
-#ifndef arch_setup_msi_irqs
-# define arch_setup_msi_irqs default_setup_msi_irqs
-# define HAVE_DEFAULT_MSI_SETUP_IRQS
-#endif
+void __weak arch_teardown_msi_irq(unsigned int irq)
+{
+}
-#ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
-int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
+{
+ return 0;
+}
+
+int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
{
struct msi_desc *entry;
int ret;
@@ -65,14 +66,11 @@ int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
return 0;
}
-#endif
-
-#ifndef arch_teardown_msi_irqs
-# define arch_teardown_msi_irqs default_teardown_msi_irqs
-# define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
-#endif
-#ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
+/*
+ * We have a default implementation available as a separate non-weak
+ * function, as it is used by the Xen x86 PCI code
+ */
void default_teardown_msi_irqs(struct pci_dev *dev)
{
struct msi_desc *entry;
@@ -89,14 +87,12 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
arch_teardown_msi_irq(entry->irq + i);
}
}
-#endif
-#ifndef arch_restore_msi_irqs
-# define arch_restore_msi_irqs default_restore_msi_irqs
-# define HAVE_DEFAULT_MSI_RESTORE_IRQS
-#endif
+void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
+{
+ return default_teardown_msi_irqs(dev);
+}
-#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
void default_restore_msi_irqs(struct pci_dev *dev, int irq)
{
struct msi_desc *entry;
@@ -114,7 +110,11 @@ void default_restore_msi_irqs(struct pci_dev *dev, int irq)
if (entry)
write_msi_msg(irq, &entry->msg);
}
-#endif
+
+void __weak arch_restore_msi_irqs(struct pci_dev *dev, int irq)
+{
+ return default_restore_msi_irqs(dev, irq);
+}
static void msi_set_enable(struct pci_dev *dev, int enable)
{
diff --git a/include/linux/msi.h b/include/linux/msi.h
index ee66f3a..271dfd1 100644
--- a/include/linux/msi.h
+++ b/include/linux/msi.h
@@ -51,12 +51,18 @@ struct msi_desc {
};
/*
- * The arch hook for setup up msi irqs
+ * The arch hooks to setup up msi irqs. Those functions are
+ * implemented as weak symbols so that they /can/ be overriden by
+ * architecture specific code if needed.
*/
int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
void arch_teardown_msi_irq(unsigned int irq);
int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
void arch_teardown_msi_irqs(struct pci_dev *dev);
int arch_msi_check_device(struct pci_dev* dev, int nvec, int type);
+void arch_restore_msi_irqs(struct pci_dev *dev, int irq);
+
+void default_teardown_msi_irqs(struct pci_dev *dev);
+void default_restore_msi_irqs(struct pci_dev *dev, int irq);
#endif /* LINUX_MSI_H */
--
1.8.1.2
^ permalink raw reply related
* Re: Failure to detect PCI card
From: David Hawkins @ 2013-08-08 22:10 UTC (permalink / raw)
To: Peter LaDow; +Cc: Anatolij Gustschin, linuxppc-dev
In-Reply-To: <CAN8Q1EczGM+aQMPti+QdvUHHbsn=ARV7sKptXc5M7gvEFoDkKQ@mail.gmail.com>
Hi Pete,
> For those that are interested, we did figure out what was going on.
> Turns out that the clock buffer driving the PCI connector was, well,
> less than adequate. With some cards, the load on the clock line was
> large enough that the clock was in horrible shape. Fixing the clock
> line and the card that failed to be recognized started working. For
> the other cards that worked, the load on the clock line was
> significantly less, but the clock was still marginal.
>
> Anyway, turned out to be a hardware issue. Thanks to all that helped!
Thanks for posting that you solved the issue.
The old engineering debug mantra ran true; check the power, then
clocks, then debug :)
Cheers,
Dave
^ permalink raw reply
* Re: Failure to detect PCI card
From: Peter LaDow @ 2013-08-08 20:31 UTC (permalink / raw)
To: David Hawkins; +Cc: Anatolij Gustschin, linuxppc-dev
In-Reply-To: <520058E0.8080304@ovro.caltech.edu>
On Mon, Aug 5, 2013 at 7:01 PM, David Hawkins <dwh@ovro.caltech.edu> wrote:
> I suspect the lack of either the 5V or 3.3V power rail to the card
> might be the problem.
>
> Did you probe the PCI edge connect to see what supplies were present?
For those that are interested, we did figure out what was going on.
Turns out that the clock buffer driving the PCI connector was, well,
less than adequate. With some cards, the load on the clock line was
large enough that the clock was in horrible shape. Fixing the clock
line and the card that failed to be recognized started working. For
the other cards that worked, the load on the clock line was
significantly less, but the clock was still marginal.
Anyway, turned out to be a hardware issue. Thanks to all that helped!
Pete
^ permalink raw reply
* Re: [PATCH v4 09/31] powerpc/fsl-pci: improve clock API use
From: Anatolij Gustschin @ 2013-08-08 20:12 UTC (permalink / raw)
To: Gerhard Sittig; +Cc: linuxppc-dev
In-Reply-To: <1375821851-31609-10-git-send-email-gsi@denx.de>
On Tue, 6 Aug 2013 22:43:49 +0200
Gerhard Sittig <gsi@denx.de> wrote:
...
> diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> index 46ac1dd..549ff08 100644
> --- a/arch/powerpc/sysdev/fsl_pci.c
> +++ b/arch/powerpc/sysdev/fsl_pci.c
...
> + clk = devm_clk_get(&pdev->dev, "per");
> + if (!IS_ERR(clk)) {
> + ret = clk_prepare_enable(clk);
> + if (ret) {
> + dev_err(dev, "Could not enable peripheral clock\n");
above line will break building. s/dev,/&pdev->dev,/
Thanks,
Anatolij
^ permalink raw reply
* Re: [PATCH v4 11/31] net: can: mscan: improve clock API use
From: Gerhard Sittig @ 2013-08-08 19:50 UTC (permalink / raw)
To: Marc Kleine-Budde
Cc: devicetree, Mike Turquette, Detlev Zundel, Wolfram Sang,
David Woodhouse, Greg Kroah-Hartman, Rob Herring, Mark Brown,
Wolfgang Grandegger, Anatolij Gustschin, linuxppc-dev,
linux-arm-kernel, Mauro Carvalho Chehab
In-Reply-To: <5201F70F.8090007@pengutronix.de>
On Wed, Aug 07, 2013 at 09:28 +0200, Marc Kleine-Budde wrote:
>
> On 08/06/2013 10:43 PM, Gerhard Sittig wrote:
> > [ ... ]
> > diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c
> > index e6b4095..4f998f5 100644
> > --- a/drivers/net/can/mscan/mscan.c
> > +++ b/drivers/net/can/mscan/mscan.c
> > @@ -573,10 +573,24 @@ static int mscan_open(struct net_device *dev)
> > struct mscan_priv *priv = netdev_priv(dev);
> > struct mscan_regs __iomem *regs = priv->reg_base;
> >
> > + if (priv->clk_ipg) {
> > + ret = clk_prepare_enable(priv->clk_ipg);
> > + if (ret)
> > + goto exit_retcode;
> > + }
> > + if (priv->clk_can) {
> > + ret = clk_prepare_enable(priv->clk_can);
> > + if (ret) {
> > + if (priv->clk_ipg)
> > + clk_disable_unprepare(priv->clk_ipg);
> > + goto exit_retcode;
>
> Why don't you add another jump label and jump to that to disable the
> ipkg clock?
You are right. I've queued this change for v5 (adding a label in
the existing error path, jumping to it instead of explicitly
disabling the clock).
>
> > + }
> > + }
> > +
> > /* common open */
> > ret = open_candev(dev);
> > if (ret)
> > - return ret;
> > + goto exit_dis_clock;
> >
> > napi_enable(&priv->napi);
> >
> > @@ -604,6 +618,12 @@ exit_free_irq:
> > exit_napi_disable:
> > napi_disable(&priv->napi);
> > close_candev(dev);
> > +exit_dis_clock:
> > + if (priv->clk_can)
> > + clk_disable_unprepare(priv->clk_can);
> > + if (priv->clk_ipg)
> > + clk_disable_unprepare(priv->clk_ipg);
> > +exit_retcode:
> > return ret;
> > }
>
> Marc
Thank you for reviewing several versions of the patch!
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
^ permalink raw reply
* Re: [PATCH v4 00/31] add COMMON_CLK support for PowerPC MPC512x
From: Gerhard Sittig @ 2013-08-08 18:41 UTC (permalink / raw)
To: Kumar Gala
Cc: devicetree, Mike Turquette, Detlev Zundel, Wolfram Sang,
Greg Kroah-Hartman, Rob Herring, Mark Brown, Marc Kleine-Budde,
Wolfgang Grandegger, Anatolij Gustschin, linuxppc-dev,
David Woodhouse, linux-arm-kernel, Mauro Carvalho Chehab
In-Reply-To: <BF555A06-59CD-4697-927E-04657E6F1DB1@kernel.crashing.org>
On Wed, Aug 07, 2013 at 10:40 -0500, Kumar Gala wrote:
>
> On Aug 6, 2013, at 3:43 PM, Gerhard Sittig wrote:
>
> > this series
> > - fixes several drivers that are used in the MPC512x platform (UART,
> > SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
> > handle clocks (appropriately acquire and setup them, hold references
> > during use, release clocks after use)
> > - introduces support for the common clock framework (CCF, COMMON_CLK
> > Kconfig option) in the PowerPC based MPC512x platform, which brings
> > device tree based clock lookup as well
> >
> > although the series does touch several subsystems -- tty (serial), spi,
> > net (can, fs_enet), mtd (nfc), usb, i2c, media (viu), and dts -- all of
> > the patches are strictly clock related or trivial
> >
> > it appears most appropriate to take this series through either the clk
> > or the powerpc trees after it has passed review and other subsystem
> > maintainers ACKed the clock setup related driver modifications
> >
> > the series passes 'checkpatch.pl --strict' except for one warning which
> > cannot get resolved, since that either breaks compilation (the data type
> > is preset by the clk-provider.h API) or requires a cast which shadows
> > real mismatches:
> >
> > WARNING: static const char * array should probably be static const char * const
> > #431: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:334:
> > +static const char *parent_names_mux0[] = {
> >
> > total: 0 errors, 1 warnings, 0 checks, 807 lines checked
> >
> > each step in the series was build and run tested (with a display that is
> > attached to the DIU as well as SPI, with an SPI attached NOR flash, with
> > multiple UART ports such that one is not the boot console, with EEPROMs
> > attached to I2C, with an SD card, booting from network)
> >
>
> How do the driver changes impact other PPC SoCs that use the
> same drivers (i2c, fs_enet, usb) ?
For SPI and UART (the PSC component), the hardware is shared
between MPC512x and MPC5200, but only routines and data specific
to MPC512x get changed.
For USB the "fsl.*usb2" hardware appears to be shared among
Freescale SoCs. AFAICS i.MX has a separate driver under arm/,
MPC83xx has a separate driver under arch/powerpc/platforms/83xx/,
and the driver I'm touching is only changed in routines specific
to MPC512x.
The NAND and VIU drivers only attach to hardware on the MPC512x
platform (checked the compatible string, only referenced from the
mpc5121.dtsi).
I2C, ethernet, PCI all are similar: A non-fatal clock lookup is
introduced, CCF platforms (512x only ATM) will carry out
appropriate clock operations, non-CCF platforms won't see a
change in behaviour (lookup fails which isn't fatal, and the
drivers assume that somebody else will have taken care of clocks
for them).
MSCAN is shared among 512x and 52xx, the common code introduces
transparent yet optional support for CCF, the 512x code path
makes use of it, 52xx sees no change in behaviour.
The DIU component (display output) is shared among platforms, but
only the platform initialization in the MPC512x code path gets
changed to make use of the CCF support, while no other platform
sees any change.
The MPC512x common clock core driver does use common primitives
and redirects the register access primitives. But the series
doesn't change register access for ARM (static inline call to the
previous hardcoded routine and thus identical object code), and
doesn't modify nor extend the shared code for gates, dividers and
multiplexers.
The device tree changes only apply to MPC512x, and only provide
hardware related information that formerly was missing.
To summarize, I see no impact for other architectures or
platforms. Although it would be good to get a second opinion
from persons with USB knowledge, to make sure I haven't missed
something.
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
^ permalink raw reply
* Re: [RFC PATCH 1/1] powerpc/embedded6xx: Add support for Motorola/Emerson MVME5100.
From: Scott Wood @ 2013-08-08 18:07 UTC (permalink / raw)
To: Kumar Gala; +Cc: paulus, Stephen N Chivers, linuxppc-dev, Chris Proctor
In-Reply-To: <B7B7FD2F-8272-487C-B946-154107EF7C09@kernel.crashing.org>
On Thu, 2013-08-08 at 10:30 -0500, Kumar Gala wrote:
> On Aug 7, 2013, at 7:03 PM, Stephen N Chivers wrote:
>
> > Add support for the Motorola/Emerson MVME5100 Single Board Computer.
> >
> > The MVME5100 is a 6U form factor VME64 computer with:
> >
> > - A single MPC7410 or MPC750 CPU
> > - A HAWK Processor Host Bridge (CPU to PCI) and
> > MultiProcessor Interrupt Controller (MPIC)
> > - Up to 500Mb of onboard memory
> > - A M48T37 Real Time Clock (RTC) and Non-Volatile Memory chip
> > - Two 16550 compatible UARTS
> > - Two Intel E100 Fast Ethernets
> > - Two PCI Mezzanine Card (PMC) Slots
> > - PPCBug Firmware
> >
> > The HAWK PHB/MPIC is compatible with the MPC10x devices.
> >
> > There is no onboard disk support. This is usually provided by installing a
> > PMC
> > in first PMC slot.
> >
> > This patch revives the board support, it was present in early 2.6
> > series kernels. The board support in those days was by Matt Porter of
> > MontaVista Software.
> >
> > CSC Australia has around 31 of these boards in service. The kernel in use
> > for the boards is based on 2.6.31. The boards are operated without disks
> > from a file server.
> >
> > This patch is based on linux-3.11-rc4 and has been boot tested.
> >
> > Signed-off-by: Stephen Chivers <schivers@csc.com>
> > ---
> > arch/powerpc/boot/dts/mvme5100.dts | 195 ++
> > arch/powerpc/boot/mvme5100.c | 28 +
> > arch/powerpc/configs/mvme5100_defconfig | 2597
> > +++++++++++++++++++++++++
> > arch/powerpc/platforms/embedded6xx/mvme5100.c | 288 +++
> > 4 files changed, 3108 insertions(+), 0 deletions(-)
>
> Please look at fixing the white space issues you seem to have throughout this patch.
>
> Also, we don't take full defconfigs in the tree, look at 'make savedefconfig'
Why does this board need its own defconfig at all? Just add it to
ppc6xx_defconfig.
-Scott
^ permalink raw reply
* [PATCH 2/2] powerpc/pseries: Add backward compatibilty to read old kernel oops-log
From: Aruna Balakrishnaiah @ 2013-08-08 17:04 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel, benh; +Cc: mahesh
In-Reply-To: <20130808170253.9914.25346.stgit@aruna-ThinkPad-T420>
Older kernels has just length information in their header. Handle it
while reading old kernel oops log from pstore.
Applies on top of powerpc/pseries: Fix buffer overflow when reading from pstore
Signed-off-by: Aruna Balakrishnaiah <aruna@linux.vnet.ibm.com>
---
arch/powerpc/platforms/pseries/nvram.c | 18 ++++++++++++++----
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 893f360..6a5f2b1 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -720,15 +720,25 @@ static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
int length, unzipped_len;
+ size_t hdr_size;
oops_hdr = (struct oops_log_info *)buff;
- length = oops_hdr->report_length;
+ if (oops_hdr->version < OOPS_HDR_VERSION) {
+ /* Old format oops header had 2-byte record size */
+ hdr_size = sizeof(u16);
+ length = oops_hdr->version;
+ time->tv_sec = 0;
+ time->tv_nsec = 0;
+ } else {
+ hdr_size = sizeof(*oops_hdr);
+ length = oops_hdr->report_length;
+ time->tv_sec = oops_hdr->timestamp;
+ time->tv_nsec = 0;
+ }
*buf = kmalloc(length, GFP_KERNEL);
if (*buf == NULL)
return -ENOMEM;
- memcpy(*buf, buff + sizeof(*oops_hdr), length);
- time->tv_sec = oops_hdr->timestamp;
- time->tv_nsec = 0;
+ memcpy(*buf, buff + hdr_size, length);
kfree(buff);
if (err_type == ERR_TYPE_KERNEL_PANIC_GZ) {
^ permalink raw reply related
* [PATCH 1/2] powerpc/pseries: Fix buffer overflow when reading from pstore
From: Aruna Balakrishnaiah @ 2013-08-08 17:03 UTC (permalink / raw)
To: linuxppc-dev, linux-kernel, benh; +Cc: mahesh
When reading from pstore there is a buffer overflow during decompression
due to the header added in unzip_oops. Remove unzip_oops and call
pstore_decompress directly in nvram_pstore_read. Allocate buffer of size
report_length of the oops header as header will not be deallocated in pstore.
Since we have 'openssl' command line tool to decompress the compressed data,
dump the compressed data in case decompression fails instead of not dumping
anything.
Signed-off-by: Aruna Balakrishnaiah <aruna@linux.vnet.ibm.com>
---
arch/powerpc/platforms/pseries/nvram.c | 70 +++++++++++---------------------
1 file changed, 24 insertions(+), 46 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 9f8671a..893f360 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -569,35 +569,6 @@ error:
return ret;
}
-static int unzip_oops(char *oops_buf, char *big_buf)
-{
- struct oops_log_info *oops_hdr = (struct oops_log_info *)oops_buf;
- u64 timestamp = oops_hdr->timestamp;
- char *big_oops_data = NULL;
- char *oops_data_buf = NULL;
- size_t big_oops_data_sz;
- int unzipped_len;
-
- big_oops_data = big_buf + sizeof(struct oops_log_info);
- big_oops_data_sz = big_oops_buf_sz - sizeof(struct oops_log_info);
- oops_data_buf = oops_buf + sizeof(struct oops_log_info);
-
- unzipped_len = nvram_decompress(oops_data_buf, big_oops_data,
- oops_hdr->report_length,
- big_oops_data_sz);
-
- if (unzipped_len < 0) {
- pr_err("nvram: decompression failed; returned %d\n",
- unzipped_len);
- return -1;
- }
- oops_hdr = (struct oops_log_info *)big_buf;
- oops_hdr->version = OOPS_HDR_VERSION;
- oops_hdr->report_length = (u16) unzipped_len;
- oops_hdr->timestamp = timestamp;
- return 0;
-}
-
static int nvram_pstore_open(struct pstore_info *psi)
{
/* Reset the iterator to start reading partitions again */
@@ -685,10 +656,9 @@ static ssize_t nvram_pstore_read(u64 *id, enum pstore_type_id *type,
unsigned int err_type, id_no, size = 0;
struct nvram_os_partition *part = NULL;
char *buff = NULL, *big_buff = NULL;
- int rc, sig = 0;
+ int sig = 0;
loff_t p;
-read_partition:
read_type++;
switch (nvram_type_ids[read_type]) {
@@ -749,30 +719,36 @@ read_partition:
*id = id_no;
if (nvram_type_ids[read_type] == PSTORE_TYPE_DMESG) {
+ int length, unzipped_len;
+
oops_hdr = (struct oops_log_info *)buff;
- *buf = buff + sizeof(*oops_hdr);
+ length = oops_hdr->report_length;
+ *buf = kmalloc(length, GFP_KERNEL);
+ if (*buf == NULL)
+ return -ENOMEM;
+ memcpy(*buf, buff + sizeof(*oops_hdr), length);
+ time->tv_sec = oops_hdr->timestamp;
+ time->tv_nsec = 0;
+ kfree(buff);
if (err_type == ERR_TYPE_KERNEL_PANIC_GZ) {
big_buff = kmalloc(big_oops_buf_sz, GFP_KERNEL);
if (!big_buff)
return -ENOMEM;
- rc = unzip_oops(buff, big_buff);
+ unzipped_len = nvram_decompress(*buf, big_buff,
+ length, big_oops_buf_sz);
- if (rc != 0) {
- kfree(buff);
+ if (unzipped_len < 0) {
+ pr_err("nvram: decompression failed, returned "
+ "rc %d\n", unzipped_len);
kfree(big_buff);
- goto read_partition;
+ } else {
+ *buf = big_buff;
+ length = unzipped_len;
}
-
- oops_hdr = (struct oops_log_info *)big_buff;
- *buf = big_buff + sizeof(*oops_hdr);
- kfree(buff);
}
-
- time->tv_sec = oops_hdr->timestamp;
- time->tv_nsec = 0;
- return oops_hdr->report_length;
+ return length;
}
*buf = buff;
@@ -816,6 +792,7 @@ static int nvram_pstore_init(void)
static void __init nvram_init_oops_partition(int rtas_partition_exists)
{
int rc;
+ size_t size;
rc = pseries_nvram_init_os_partition(&oops_log_partition);
if (rc != 0) {
@@ -844,8 +821,9 @@ static void __init nvram_init_oops_partition(int rtas_partition_exists)
big_oops_buf_sz = (oops_data_sz * 100) / 45;
big_oops_buf = kmalloc(big_oops_buf_sz, GFP_KERNEL);
if (big_oops_buf) {
- stream.workspace = kmalloc(zlib_deflate_workspacesize(
- WINDOW_BITS, MEM_LEVEL), GFP_KERNEL);
+ size = max(zlib_deflate_workspacesize(WINDOW_BITS, MEM_LEVEL),
+ zlib_inflate_workspacesize());
+ stream.workspace = kmalloc(size, GFP_KERNEL);
if (!stream.workspace) {
pr_err("nvram: No memory for compression workspace; "
"skipping compression of %s partition data\n",
^ permalink raw reply related
* Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
From: Aneesh Kumar K.V @ 2013-08-08 15:32 UTC (permalink / raw)
To: Michael Ellerman, Michael Neuling
Cc: Paul Mackerras, linuxppc-dev, Anton Blanchard
In-Reply-To: <20130807051618.GB19998@concordia>
Michael Ellerman <michael@ellerman.id.au> writes:
> On Wed, Aug 07, 2013 at 09:31:00AM +1000, Michael Neuling wrote:
>> Anton Blanchard <anton@samba.org> wrote:
>>
>> > This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
>> > and CONFIG_VIRTUALIZATION disabled (required until we fix some
>> > endian issues in KVM).
>>
>> The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not
>> here.
>>
>> I'm not that keen on another defconfig. benh is already talking about
>> having a powernv defconfig. I'm worried we are going to fragment the
>> defconfigs. If you want something special like LE, then change the
>> default one.
>
> I disagree. defconfigs are great because they're easy to add to kisskb
> or other auto builders, making automated build testing easier.
>
> In fact because the defconfigs are pretty much the only thing that
> people build test, if you stray too far from them you are almost
> guaranteed to find breakage. For example the UP build was broken for
> months because we didn't have a defconfig for it.
This is true. My test build for patches mostly include
for config in "....."
do
make $config
....
done
-aneesh
^ permalink raw reply
* Re: [RFC PATCH 1/1] powerpc/embedded6xx: Add support for Motorola/Emerson MVME5100.
From: Kumar Gala @ 2013-08-08 15:30 UTC (permalink / raw)
To: Stephen N Chivers; +Cc: paulus, linuxppc-dev, Chris Proctor
In-Reply-To: <OFBCFBBD51.E4ECB0DF-ONCA257BC0.0083C866-CA257BC1.0000531E@csc.com>
On Aug 7, 2013, at 7:03 PM, Stephen N Chivers wrote:
> Add support for the Motorola/Emerson MVME5100 Single Board Computer.
>=20
> The MVME5100 is a 6U form factor VME64 computer with:
>=20
> - A single MPC7410 or MPC750 CPU
> - A HAWK Processor Host Bridge (CPU to PCI) and
> MultiProcessor Interrupt Controller (MPIC)
> - Up to 500Mb of onboard memory
> - A M48T37 Real Time Clock (RTC) and Non-Volatile Memory chip
> - Two 16550 compatible UARTS
> - Two Intel E100 Fast Ethernets
> - Two PCI Mezzanine Card (PMC) Slots
> - PPCBug Firmware
>=20
> The HAWK PHB/MPIC is compatible with the MPC10x devices.
>=20
> There is no onboard disk support. This is usually provided by =
installing a=20
> PMC
> in first PMC slot.
>=20
> This patch revives the board support, it was present in early 2.6
> series kernels. The board support in those days was by Matt Porter of
> MontaVista Software.
>=20
> CSC Australia has around 31 of these boards in service. The kernel in =
use
> for the boards is based on 2.6.31. The boards are operated without =
disks
> from a file server.=20
>=20
> This patch is based on linux-3.11-rc4 and has been boot tested.
>=20
> Signed-off-by: Stephen Chivers <schivers@csc.com>
> ---
> arch/powerpc/boot/dts/mvme5100.dts | 195 ++
> arch/powerpc/boot/mvme5100.c | 28 +
> arch/powerpc/configs/mvme5100_defconfig | 2597=20
> +++++++++++++++++++++++++
> arch/powerpc/platforms/embedded6xx/mvme5100.c | 288 +++
> 4 files changed, 3108 insertions(+), 0 deletions(-)
Please look at fixing the white space issues you seem to have throughout =
this patch.
Also, we don't take full defconfigs in the tree, look at 'make =
savedefconfig'
- k
^ permalink raw reply
* Re: [RFC PATCH 7/9] powerpc: Decode and save machine check event.
From: Benjamin Herrenschmidt @ 2013-08-08 13:33 UTC (permalink / raw)
To: Mahesh Jagannath Salgaonkar
Cc: linuxppc-dev, Paul Mackerras, Anton Blanchard, Jeremy Kerr
In-Reply-To: <52039AF7.9080807@linux.vnet.ibm.com>
On Thu, 2013-08-08 at 18:49 +0530, Mahesh Jagannath Salgaonkar wrote:
> > Secondly, we shouldn't call save_mce_event() if we're not in
> > hypervisor mode, since per-cpu variables are not in general
> accessible
> > in real mode when running under a hypervisor with a limited
> real-mode
> > area (RMA).
>
> Does that mean in real mode we can never be able to access per cpu
> variable? OR do I need to use some tweaks to access those?
Right, all you can access is stuff that was specifically allocated to be
in the RMA during boot, such as the PACA's.
Ben.
^ permalink raw reply
* Re: [RFC PATCH 2/9] powerpc: handle machine check in Linux host.
From: Benjamin Herrenschmidt @ 2013-08-08 13:33 UTC (permalink / raw)
To: Mahesh Jagannath Salgaonkar
Cc: linuxppc-dev, Paul Mackerras, Anton Blanchard, Jeremy Kerr
In-Reply-To: <52039AEC.8010006@linux.vnet.ibm.com>
On Thu, 2013-08-08 at 18:49 +0530, Mahesh Jagannath Salgaonkar wrote:
> But, I think I should depend on
> evt->disposition==MCE_DISPOSITION_RECOVERED and not play with MSR_RI
> and
> SRR1. I will fix my code.
If MSR:RI is 0, then you have clobbered SRR0/SRR1 beyond repair and
probably cannot recover.
Ben.
^ permalink raw reply
* Re: [RFC PATCH 7/9] powerpc: Decode and save machine check event.
From: Mahesh Jagannath Salgaonkar @ 2013-08-08 13:19 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, Jeremy Kerr, Anton Blanchard
In-Reply-To: <20130808051422.GE12112@iris.ozlabs.ibm.com>
On 08/08/2013 10:44 AM, Paul Mackerras wrote:
> On Wed, Aug 07, 2013 at 03:09:13PM +0530, Mahesh J Salgaonkar wrote:
>> From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
>>
>> Now that we handle machine check in linux, the MCE decoding should also
>> take place in linux host. This info is crucial to log before we go down
>> in case we can not handle the machine check errors. This patch decodes
>> and populates a machine check event which contain high level meaning full
>> MCE information.
>
> A couple of things worry me about this patch:
>
> First, there is the fact that we can only do get_mce_event() once for
> a given machine check. You call it in kvmppc_realmode_mc_power7(),
> which is fine, but if it is not something we recognize and can handle
> we will proceed to exit the guest and jump to machine_check_fwnmi,
> which will then proceed to machine_check_common() and then
> opal_machine_check(), where you have added another call to
> get_mce_event(), which will probably underflow your little per-cpu
> stack of machine check events.
Ouch! I missed that. Will work on fixing it.
>
> Secondly, we shouldn't call save_mce_event() if we're not in
> hypervisor mode, since per-cpu variables are not in general accessible
> in real mode when running under a hypervisor with a limited real-mode
> area (RMA).
Does that mean in real mode we can never be able to access per cpu
variable? OR do I need to use some tweaks to access those?
Thanks,
-Mahesh.
^ permalink raw reply
* Re: [RFC PATCH 2/9] powerpc: handle machine check in Linux host.
From: Mahesh Jagannath Salgaonkar @ 2013-08-08 13:19 UTC (permalink / raw)
To: Paul Mackerras; +Cc: linuxppc-dev, Jeremy Kerr, Anton Blanchard
In-Reply-To: <20130808045143.GC12112@iris.ozlabs.ibm.com>
On 08/08/2013 10:21 AM, Paul Mackerras wrote:
> On Wed, Aug 07, 2013 at 03:08:15PM +0530, Mahesh J Salgaonkar wrote:
>> From: Mahesh Salgaonkar <mahesh@linux.vnet.ibm.com>
>>
>> Move machine check entry point into Linux. So far we were dependent on
>> firmware to decode MCE error details and handover the high level info to OS.
>>
>> This patch introduces early machine check routine that saves the MCE
>> information (srr1, srr0, dar and dsisr) to the emergency stack. We allocate
>> stack frame on emergency stack and set the r1 accordingly. This allows us
>> to be prepared to take another exception without loosing context. One thing
>> to note here that, if we get another machine check while ME bit is off then
>> we risk a checkstop. Hence we restrict ourselves to save only MCE information
>> and turn the ME bit on.
>
> Some comments below:
>
>> + * Swicth to emergency stack and handle re-entrancy (though we currently
> ^
> Switch
>
>> + * don't test for overflow). Save MCE registers srr1, srr0, dar and
>> + * dsisr and then turn the ME bit on.
>> + */
>> +#define __EARLY_MACHINE_CHECK_HANDLER(area, label) \
>> + /* Check if we are laready using emergency stack. */ \
>> + ld r10,PACAEMERGSP(r13); \
>> + subi r10,r10,THREAD_SIZE; \
>> + rldicr r10,r10,0,(63 - THREAD_SHIFT); \
>> + rldicr r11,r1,0,(63 - THREAD_SHIFT); \
>> + cmpd r10,r11; /* Are we using emergency stack? */ \
>
> This assumes that r1 contains a host kernel stack pointer value.
> However, we could be coming in from a guest, or from userspace, in
> which case r1 could have any value at all, and we shouldn't even be
> considering using it as our stack pointer.
I see your point. I need to have different mechanism to keep track of
emergency stack pointer. May be using some sratch registers or something
in paca structure.
>
> There is another complication, too: if we are coming in from a KVM
> guest running on a secondary thread (not thread 0), we will be using
> part of the emergency stack already (see kvm_start_guest in
> arch/powerpc/kvm/book3s_hv_rmhandlers.S). However, because we have
> come in from a guest, r1 contains a guest value, and we would have to
> look in KVM data structures to find out how much of the emergency
> stack we have already used. I'm not sure at the moment what the best
> way to fix this is.
How about adding a paca member to maintain current emergency stack
pointer in use?
>
>> + mr r11,r1; /* Save current stack pointer */\
>> + beq 0f; \
>> + ld r1,PACAEMERGSP(r13); /* Use emergency stack */ \
>> +0: subi r1,r1,INT_FRAME_SIZE; /* alloc stack frame */ \
>> + std r11,GPR1(r1); \
>> + std r11,0(r1); /* make stack chain pointer */ \
>> + mfspr r11,SPRN_SRR0; /* Save SRR0 */ \
>> + std r11,_NIP(r1); \
>> + mfspr r11,SPRN_SRR1; /* Save SRR1 */ \
>> + std r11,_MSR(r1); \
>> + mfspr r11,SPRN_DAR; /* Save DAR */ \
>> + std r11,_DAR(r1); \
>> + mfspr r11,SPRN_DSISR; /* Save DSISR */ \
>> + std r11,_DSISR(r1); \
>> + mfmsr r11; /* get MSR value */ \
>> + ori r11,r11,MSR_ME; /* turn on ME bit */ \
>> + ld r12,PACAKBASE(r13); /* get high part of &label */ \
>> + LOAD_HANDLER(r12,label) \
>> + mtspr SPRN_SRR0,r12; \
>> + mtspr SPRN_SRR1,r11; \
>> + rfid; \
>> + b . /* prevent speculative execution */
>> +#define EARLY_MACHINE_CHECK_HANDLER(area, label) \
>> + __EARLY_MACHINE_CHECK_HANDLER(area, label)
>
> Given this is only used in one place, why make this a macro? Wouldn't
> it be simpler and neater to just spell out this code in the place
> where you use the macro?
Sure, will do that.
>
>> + /*
>> + * Handle machine check early in real mode. We come here with
>> + * ME bit on with MMU (IR and DR) off and using emergency stack.
>> + */
>> + .align 7
>> + .globl machine_check_handle_early
>> +machine_check_handle_early:
>> + std r9,_CCR(r1) /* Save CR in stackframe */
>> + std r0,GPR0(r1) /* Save r0, r2 - r10 */
>> + EXCEPTION_PROLOG_COMMON_2(0x200, PACA_EXMC)
>> + bl .save_nvgprs
>> + addi r3,r1,STACK_FRAME_OVERHEAD
>> + bl .machine_check_early
>> + cmpdi r3,0 /* Did we handle it? */
>> + ld r9,_MSR(r1)
>> + beq 1f
>> + ori r9,r9,MSR_RI /* Yes we have handled it. */
>
> I don't think this is a good idea. MSR_RI being off means either that
> the machine check happened at a time when SRR0 and SRR1 contained live
> contents, which have been overwritten by the machine check interrupt,
> or else that the CPU was not able to determine a precise state at
> which the interrupt could be taken. Neither of those problems would
> be fixed by our machine check handler.
Agree.
>
> What was the rationale for setting RI in this situation?
When I tested SLB multihit, I got an interrupt with RI=0. In
opal_machine_check() the very first check I added is to see if MSR_RI is
set or not and return accordingly which ended up in die and panic in
machine_check_exception() routine.
But, I think I should depend on
evt->disposition==MCE_DISPOSITION_RECOVERED and not play with MSR_RI and
SRR1. I will fix my code.
>
>> + /* Move original SRR0 and SRR1 into the respective regs */
>> +1: mtspr SPRN_SRR1,r9
>> + ld r3,_NIP(r1)
>> + mtspr SPRN_SRR0,r3
>> + REST_NVGPRS(r1)
>> + ld r9,_CTR(r1)
>> + mtctr r9
>> + ld r9,_XER(r1)
>> + mtxer r9
>> + ld r9,_CCR(r1)
>> + mtcr r9
>> +BEGIN_FTR_SECTION
>> + ld r9,ORIG_GPR3(r1)
>> + mtspr SPRN_CFAR,r9
>> +END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
>> + ld r9,_LINK(r1)
>> + mtlr r9
>> + REST_GPR(0, r1)
>> + REST_8GPRS(2, r1)
>> + REST_2GPRS(10, r1)
>> + REST_GPR(12, r1)
>> + /*
>> + * restore orig stack pointer. We have already saved MCE info
>> + * to per cpu MCE event buffer.
>> + */
>> + ld r1,GPR1(r1)
>> + b machine_check_pSeries
>
> What about r13? I don't see that you have restored it at this point.
Will fix it.
>
>> +
>> STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
>> STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
>> STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
>> diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
>> index bf33c22..1720e08 100644
>> --- a/arch/powerpc/kernel/traps.c
>> +++ b/arch/powerpc/kernel/traps.c
>> @@ -286,6 +286,18 @@ void system_reset_exception(struct pt_regs *regs)
>>
>> /* What should we do here? We could issue a shutdown or hard reset. */
>> }
>> +
>> +/*
>> + * This function is called in real mode. Strictly no printk's please.
>> + *
>> + * regs->nip and regs->msr contains srr0 and ssr1.
>> + */
>> +long machine_check_early(struct pt_regs *regs)
>> +{
>> + /* TODO: handle/decode machine check reason */
>> + return 0;
>> +}
>> +
>> #endif
>>
>> /*
>
^ permalink raw reply
* [PATCH v2] powerpc/booke64: Add LRAT error exception handler
From: Mihai Caraman @ 2013-08-08 12:56 UTC (permalink / raw)
To: linuxppc-dev; +Cc: Mihai Caraman, kvm, kvm-ppc
LRAT (Logical to Real Address Translation) present in MMU v2 provides hardware
translation from a logical page number (LPN) to a real page number (RPN) when
tlbwe is executed by a guest or when a page table translation occurs from a
guest virtual address.
Add LRAT error exception handler to Booke3E 64-bit kernel and the basic KVM
handler to avoid build breakage. This is a prerequisite for KVM LRAT support
that will follow.
Signed-off-by: Mihai Caraman <mihai.caraman@freescale.com>
---
v2
- squash patches for bisectability
- set IVOR42 from setup_cpu
arch/powerpc/include/asm/kvm_asm.h | 1 +
arch/powerpc/include/asm/reg_booke.h | 1 +
arch/powerpc/kernel/cpu_setup_fsl_booke.S | 12 ++++++++++++
arch/powerpc/kernel/exceptions-64e.S | 17 +++++++++++++++++
arch/powerpc/kvm/bookehv_interrupts.S | 2 ++
5 files changed, 33 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
index 851bac7..83b91e5 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -74,6 +74,7 @@
#define BOOKE_INTERRUPT_GUEST_DBELL_CRIT 39
#define BOOKE_INTERRUPT_HV_SYSCALL 40
#define BOOKE_INTERRUPT_HV_PRIV 41
+#define BOOKE_INTERRUPT_LRAT_ERROR 42
/* book3s */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index b417de3..6b113e1 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -101,6 +101,7 @@
#define SPRN_IVOR39 0x1B1 /* Interrupt Vector Offset Register 39 */
#define SPRN_IVOR40 0x1B2 /* Interrupt Vector Offset Register 40 */
#define SPRN_IVOR41 0x1B3 /* Interrupt Vector Offset Register 41 */
+#define SPRN_IVOR42 0x1B4 /* Interrupt Vector Offset Register 42 */
#define SPRN_GIVOR2 0x1B8 /* Guest IVOR2 */
#define SPRN_GIVOR3 0x1B9 /* Guest IVOR3 */
#define SPRN_GIVOR4 0x1BA /* Guest IVOR4 */
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 0b9af01..754a11d 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -57,6 +57,12 @@ _GLOBAL(__setup_cpu_e6500)
mflr r6
#ifdef CONFIG_PPC64
bl .setup_altivec_ivors
+ /* Touch IVOR42 only if the CPU supports E.HV category */
+ mfspr r10,SPRN_MMUCFG
+ rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
+ beq 1f
+ bl .setup_lrat_ivor
+1:
#endif
bl __setup_cpu_e5500
mtlr r6
@@ -119,6 +125,12 @@ _GLOBAL(__setup_cpu_e5500)
_GLOBAL(__restore_cpu_e6500)
mflr r5
bl .setup_altivec_ivors
+ /* Touch IVOR42 only if the CPU supports E.HV category */
+ mfspr r10,SPRN_MMUCFG
+ rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
+ beq 1f
+ bl .setup_lrat_ivor
+1:
bl __restore_cpu_e5500
mtlr r5
blr
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 645170a..9e4a506 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -308,6 +308,7 @@ interrupt_base_book3e: /* fake trap */
EXCEPTION_STUB(0x2e0, guest_doorbell_crit)
EXCEPTION_STUB(0x300, hypercall)
EXCEPTION_STUB(0x320, ehpriv)
+ EXCEPTION_STUB(0x340, lrat_error)
.globl interrupt_end_book3e
interrupt_end_book3e:
@@ -675,6 +676,17 @@ kernel_dbg_exc:
bl .unknown_exception
b .ret_from_except
+/* LRAT Error interrupt */
+ START_EXCEPTION(lrat_error);
+ NORMAL_EXCEPTION_PROLOG(0x340, BOOKE_INTERRUPT_LRAT_ERROR,
+ PROLOG_ADDITION_NONE)
+ EXCEPTION_COMMON(0x340, PACA_EXGEN, INTS_KEEP)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ bl .save_nvgprs
+ INTS_RESTORE_HARD
+ bl .unknown_exception
+ b .ret_from_except
+
/*
* An interrupt came in while soft-disabled; We mark paca->irq_happened
* accordingly and if the interrupt is level sensitive, we hard disable
@@ -857,6 +869,7 @@ BAD_STACK_TRAMPOLINE(0x2e0)
BAD_STACK_TRAMPOLINE(0x300)
BAD_STACK_TRAMPOLINE(0x310)
BAD_STACK_TRAMPOLINE(0x320)
+BAD_STACK_TRAMPOLINE(0x340)
BAD_STACK_TRAMPOLINE(0x400)
BAD_STACK_TRAMPOLINE(0x500)
BAD_STACK_TRAMPOLINE(0x600)
@@ -1412,3 +1425,7 @@ _GLOBAL(setup_ehv_ivors)
SET_IVOR(38, 0x2c0) /* Guest Processor Doorbell */
SET_IVOR(39, 0x2e0) /* Guest Processor Doorbell Crit/MC */
blr
+
+_GLOBAL(setup_lrat_ivor)
+ SET_IVOR(42, 0x340) /* LRAT Error */
+ blr
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index e8ed7d6..a0d6929 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -319,6 +319,8 @@ kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(DBG), \
SPRN_DSRR0, SPRN_DSRR1, 0
kvm_handler BOOKE_INTERRUPT_DEBUG, EX_PARAMS(CRIT), \
SPRN_CSRR0, SPRN_CSRR1, 0
+kvm_handler BOOKE_INTERRUPT_LRAT_ERROR, EX_PARAMS(GEN), \
+ SPRN_SRR0, SPRN_SRR1, (NEED_EMU | NEED_DEAR | NEED_ESR)
#else
/*
* For input register values, see arch/powerpc/include/asm/kvm_booke_hv_asm.h
--
1.7.3.4
^ permalink raw reply related
* Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
From: Michael Neuling @ 2013-08-08 10:49 UTC (permalink / raw)
To: Madhavan Srinivasan; +Cc: linuxppc-dev, Paul Mackerras, Anton Blanchard
In-Reply-To: <520357D8.2090502@linux.vnet.ibm.com>
> > +CONFIG_SCHED_SMT=y
> > +CONFIG_PPC_DENORMALISATION=y
> > +CONFIG_HOTPLUG_PCI=m
> Why the value "m" in the le_config file, when it is "y" in
> pseries_defconfig.
We are out of sync already!?!?! *sigh* ;-)
> Also I do see a warning saying invalid value for this symbol.
Mikey
^ permalink raw reply
* Re: [v2] Enhanced support for MPC8xx/8xxx watchdog
From: Guenter Roeck @ 2013-08-08 8:49 UTC (permalink / raw)
To: leroy christophe
Cc: Scott Wood, Wim Van Sebroeck, linuxppc-dev, linux-kernel,
linux-watchdog
In-Reply-To: <520331C1.4060406@c-s.fr>
On 08/07/2013 10:50 PM, leroy christophe wrote:
> Le 26/06/2013 01:04, Scott Wood a écrit :
>> On Thu, Feb 28, 2013 at 09:52:22AM +0100, LEROY Christophe wrote:
>>> This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx,
>>> at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must
>>> be pinged twice a second. This is not in line with the Linux watchdog concept
>>> which is based on a default watchdog timeout around 60s.
>>> This patch introduces an intermediate layer between the CPU and the userspace.
>>> The kernel pings the watchdog at the required frequency at the condition that
>>> userspace tools refresh it regularly.
>>> Existing parameter 'timeout' is renamed 'hw_time'.
>>> The new parameter 'timeout' allows to set up the userspace timeout.
>>> The driver also implements the WDIOC_SETTIMEOUT ioctl.
>>>
>>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>>>
>>>
>>> diff -ur linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c linux/drivers/watchdog/mpc8xxx_wdt.c
>>> --- linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c 2013-02-17 19:53:32.000000000 +0100
>>> +++ linux/drivers/watchdog/mpc8xxx_wdt.c 2013-02-27 16:00:07.000000000 +0100
>>> @@ -52,10 +52,17 @@
>>> static struct mpc8xxx_wdt __iomem *wd_base;
>>> static int mpc8xxx_wdt_init_late(void);
>>> -static u16 timeout = 0xffff;
>>> -module_param(timeout, ushort, 0);
>>> +#define WD_TIMO 10 /* Default timeout = 10 seconds */
>> If the default Linux watchdog timeout is normally 60 seconds, why is it 10
>> here?
> Looks like each driver has its own default value, but agreed, I change it to 60 seconds
>
>>> +static uint timeout = WD_TIMO;
>>> +module_param(timeout, uint, 0);
>>> MODULE_PARM_DESC(timeout,
>>> - "Watchdog timeout in ticks. (0<timeout<65536, default=65535)");
>>> + "Watchdog SW timeout in seconds. (0 < timeout < 65536s, default = "
>>> + __MODULE_STRING(WD_TIMO) "s)");
>>> +static u16 hw_timo = 0xffff;
>>> +module_param(hw_timo, ushort, 0);
>>> +MODULE_PARM_DESC(hw_timo,
>>> + "Watchdog HW timeout in ticks. (0 < hw_timo < 65536, default = 65535)");
>> hw_timeout would be more legibile -- this is a public interface.
> Ok
>>
>>> static bool reset = 1;
>>> module_param(reset, bool, 0);
>>> @@ -72,10 +79,12 @@
>>> * to 0
>>> */
>>> static int prescale = 1;
>>> -static unsigned int timeout_sec;
>>> +static unsigned int hw_timo_sec;
>>> +static int wdt_auto = 1;
>> bool, and add a comment indicating what this means.
> Ok
>>
>>> static unsigned long wdt_is_open;
>>> static DEFINE_SPINLOCK(wdt_spinlock);
>>> +static unsigned long wdt_last_ping;
>>> static void mpc8xxx_wdt_keepalive(void)
>>> {
>>> @@ -91,9 +100,20 @@
>>> static void mpc8xxx_wdt_timer_ping(unsigned long arg)
>>> {
>>> - mpc8xxx_wdt_keepalive();
>>> - /* We're pinging it twice faster than needed, just to be sure. */
>>> - mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
>>> + if (wdt_auto)
>>> + wdt_last_ping = jiffies;
>>> +
>>> + if (jiffies - wdt_last_ping <= timeout * HZ) {
>> So timeout cannot be more than UINT_MAX / HZ... Might want to check for
>> that, just in case.
> Ok.
>>
>> What happens if there's a race? If another CPU updates wdt_last_ping in
>> parallel, then you could see wdt_last_ping greater than the value you
Using the watchdog infrastructure (which has a mutex to avoid the problem)
would help avoiding this race.
>> read for jiffies. Since this is an unsigned comparison, it will fail to
>> call keepalive. You might get saved by pinging it twice as often as
>> necessary, but you shouldn't rely on that.
> Euh ... This watchdog is integrated inside the CPU, so there is no chance that any external CPU get access to it.
Unless I am missing something, neither jiffies nor wdt_last_ping nor timeout
is integrated inside a CPU.
There are macros for well defined time comparison which you possibly
might want to consider using (such as time_after() and time_before() etc).
My overall feedback is that I believe it would make more sense to convert
the driver to the watchdog infrastructure first, then add the softdog as
second patch.
Guenter
>>
>>> + mpc8xxx_wdt_keepalive();
>>> + /* We're pinging it twice faster than needed, to be sure. */
>>> + mod_timer(&wdt_timer, jiffies + HZ * hw_timo_sec / 2);
>>> + }
>>> +}
>>> +
>>> +static void mpc8xxx_wdt_sw_keepalive(void)
>>> +{
>>> + wdt_last_ping = jiffies;
>>> + mpc8xxx_wdt_timer_ping(0);
>>> }
>> This isn't new with this patch, but it looks like
>> mpc8xxx_wdt_keepalive() can be called either from timer context, or with
>> interrupts enabled... yet it uses a bare spin_lock() rather than an
>> irq-safe version. This should be fixed.
> Ok, I'll propose another patch for that. Indeed, is the spin_lock needed at all ? If we get two writes interleaved, it will make it anyway.
>
> Christophe
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-watchdog" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
>
^ permalink raw reply
* Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
From: Madhavan Srinivasan @ 2013-08-08 8:33 UTC (permalink / raw)
To: Anton Blanchard; +Cc: Paul Mackerras, linuxppc-dev
In-Reply-To: <1375804940-22050-64-git-send-email-anton@samba.org>
On Tuesday 06 August 2013 09:32 PM, Anton Blanchard wrote:
> This is the pseries_defconfig with CONFIG_CPU_LITTLE_ENDIAN enabled
> and CONFIG_VIRTUALIZATION disabled (required until we fix some
> endian issues in KVM).
>
> Signed-off-by: Anton Blanchard <anton@samba.org>
> ---
> arch/powerpc/configs/pseries_le_defconfig | 347 ++++++++++++++++++++++++++++++
> 1 file changed, 347 insertions(+)
> create mode 100644 arch/powerpc/configs/pseries_le_defconfig
>
> diff --git a/arch/powerpc/configs/pseries_le_defconfig b/arch/powerpc/configs/pseries_le_defconfig
> new file mode 100644
> index 0000000..a30db45
> --- /dev/null
> +++ b/arch/powerpc/configs/pseries_le_defconfig
> @@ -0,0 +1,347 @@
> +CONFIG_PPC64=y
> +CONFIG_ALTIVEC=y
> +CONFIG_VSX=y
> +CONFIG_SMP=y
> +CONFIG_NR_CPUS=2048
> +CONFIG_EXPERIMENTAL=y
> +CONFIG_SYSVIPC=y
> +CONFIG_POSIX_MQUEUE=y
> +CONFIG_AUDIT=y
> +CONFIG_AUDITSYSCALL=y
> +CONFIG_IRQ_DOMAIN_DEBUG=y
> +CONFIG_NO_HZ=y
> +CONFIG_HIGH_RES_TIMERS=y
> +CONFIG_TASKSTATS=y
> +CONFIG_TASK_DELAY_ACCT=y
> +CONFIG_TASK_XACCT=y
> +CONFIG_TASK_IO_ACCOUNTING=y
> +CONFIG_IKCONFIG=y
> +CONFIG_IKCONFIG_PROC=y
> +CONFIG_CGROUPS=y
> +CONFIG_CGROUP_FREEZER=y
> +CONFIG_CGROUP_DEVICE=y
> +CONFIG_CPUSETS=y
> +CONFIG_CGROUP_CPUACCT=y
> +CONFIG_BLK_DEV_INITRD=y
> +# CONFIG_COMPAT_BRK is not set
> +CONFIG_PROFILING=y
> +CONFIG_OPROFILE=y
> +CONFIG_KPROBES=y
> +CONFIG_JUMP_LABEL=y
> +CONFIG_MODULES=y
> +CONFIG_MODULE_UNLOAD=y
> +CONFIG_MODVERSIONS=y
> +CONFIG_MODULE_SRCVERSION_ALL=y
> +CONFIG_PARTITION_ADVANCED=y
> +CONFIG_EFI_PARTITION=y
> +CONFIG_PPC_SPLPAR=y
> +CONFIG_SCANLOG=m
> +CONFIG_PPC_SMLPAR=y
> +CONFIG_DTL=y
> +# CONFIG_PPC_PMAC is not set
> +CONFIG_RTAS_FLASH=m
> +CONFIG_IBMEBUS=y
> +CONFIG_HZ_100=y
> +CONFIG_BINFMT_MISC=m
> +CONFIG_PPC_TRANSACTIONAL_MEM=y
> +CONFIG_HOTPLUG_CPU=y
> +CONFIG_KEXEC=y
> +CONFIG_IRQ_ALL_CPUS=y
> +CONFIG_MEMORY_HOTPLUG=y
> +CONFIG_MEMORY_HOTREMOVE=y
> +CONFIG_PPC_64K_PAGES=y
> +CONFIG_PPC_SUBPAGE_PROT=y
> +CONFIG_SCHED_SMT=y
> +CONFIG_PPC_DENORMALISATION=y
> +CONFIG_HOTPLUG_PCI=m
Why the value "m" in the le_config file, when it is "y" in
pseries_defconfig.
Also I do see a warning saying invalid value for this symbol.
> +CONFIG_HOTPLUG_PCI_RPA=m
> +CONFIG_HOTPLUG_PCI_RPA_DLPAR=m
> +CONFIG_PACKET=y
> +CONFIG_UNIX=y
> +CONFIG_XFRM_USER=m
> +CONFIG_NET_KEY=m
> +CONFIG_INET=y
> +CONFIG_IP_MULTICAST=y
> +CONFIG_NET_IPIP=y
> +CONFIG_SYN_COOKIES=y
> +CONFIG_INET_AH=m
> +CONFIG_INET_ESP=m
> +CONFIG_INET_IPCOMP=m
> +# CONFIG_IPV6 is not set
> +CONFIG_NETFILTER=y
> +CONFIG_NF_CONNTRACK=m
> +CONFIG_NF_CONNTRACK_EVENTS=y
> +CONFIG_NF_CT_PROTO_UDPLITE=m
> +CONFIG_NF_CONNTRACK_FTP=m
> +CONFIG_NF_CONNTRACK_IRC=m
> +CONFIG_NF_CONNTRACK_TFTP=m
> +CONFIG_NF_CT_NETLINK=m
> +CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
> +CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
> +CONFIG_NETFILTER_XT_TARGET_MARK=m
> +CONFIG_NETFILTER_XT_TARGET_NFLOG=m
> +CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
> +CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
> +CONFIG_NETFILTER_XT_MATCH_COMMENT=m
> +CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
> +CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
> +CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
> +CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
> +CONFIG_NETFILTER_XT_MATCH_DCCP=m
> +CONFIG_NETFILTER_XT_MATCH_DSCP=m
> +CONFIG_NETFILTER_XT_MATCH_ESP=m
> +CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
> +CONFIG_NETFILTER_XT_MATCH_HELPER=m
> +CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
> +CONFIG_NETFILTER_XT_MATCH_LENGTH=m
> +CONFIG_NETFILTER_XT_MATCH_LIMIT=m
> +CONFIG_NETFILTER_XT_MATCH_MAC=m
> +CONFIG_NETFILTER_XT_MATCH_MARK=m
> +CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
> +CONFIG_NETFILTER_XT_MATCH_OWNER=m
> +CONFIG_NETFILTER_XT_MATCH_POLICY=m
> +CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
> +CONFIG_NETFILTER_XT_MATCH_QUOTA=m
> +CONFIG_NETFILTER_XT_MATCH_RATEEST=m
> +CONFIG_NETFILTER_XT_MATCH_REALM=m
> +CONFIG_NETFILTER_XT_MATCH_RECENT=m
> +CONFIG_NETFILTER_XT_MATCH_SCTP=m
> +CONFIG_NETFILTER_XT_MATCH_STATE=m
> +CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
> +CONFIG_NETFILTER_XT_MATCH_STRING=m
> +CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
> +CONFIG_NETFILTER_XT_MATCH_TIME=m
> +CONFIG_NETFILTER_XT_MATCH_U32=m
> +CONFIG_NF_CONNTRACK_IPV4=m
> +CONFIG_IP_NF_QUEUE=m
> +CONFIG_IP_NF_IPTABLES=m
> +CONFIG_IP_NF_MATCH_AH=m
> +CONFIG_IP_NF_MATCH_ECN=m
> +CONFIG_IP_NF_MATCH_TTL=m
> +CONFIG_IP_NF_FILTER=m
> +CONFIG_IP_NF_TARGET_REJECT=m
> +CONFIG_IP_NF_TARGET_ULOG=m
> +CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
> +CONFIG_DEVTMPFS=y
> +CONFIG_DEVTMPFS_MOUNT=y
> +CONFIG_PROC_DEVICETREE=y
> +CONFIG_PARPORT=m
> +CONFIG_PARPORT_PC=m
> +CONFIG_BLK_DEV_FD=m
> +CONFIG_BLK_DEV_LOOP=y
> +CONFIG_BLK_DEV_NBD=m
> +CONFIG_BLK_DEV_RAM=y
> +CONFIG_BLK_DEV_RAM_SIZE=65536
> +CONFIG_IDE=y
> +CONFIG_BLK_DEV_IDECD=y
> +CONFIG_BLK_DEV_GENERIC=y
> +CONFIG_BLK_DEV_AMD74XX=y
> +CONFIG_BLK_DEV_SD=y
> +CONFIG_CHR_DEV_ST=y
> +CONFIG_BLK_DEV_SR=y
> +CONFIG_BLK_DEV_SR_VENDOR=y
> +CONFIG_CHR_DEV_SG=y
> +CONFIG_SCSI_MULTI_LUN=y
> +CONFIG_SCSI_CONSTANTS=y
> +CONFIG_SCSI_FC_ATTRS=y
> +CONFIG_SCSI_CXGB3_ISCSI=m
> +CONFIG_SCSI_CXGB4_ISCSI=m
> +CONFIG_SCSI_BNX2_ISCSI=m
> +CONFIG_BE2ISCSI=m
> +CONFIG_SCSI_MPT2SAS=m
> +CONFIG_SCSI_IBMVSCSI=y
> +CONFIG_SCSI_IBMVFC=m
> +CONFIG_SCSI_SYM53C8XX_2=y
> +CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
> +CONFIG_SCSI_IPR=y
> +CONFIG_SCSI_QLA_FC=m
> +CONFIG_SCSI_QLA_ISCSI=m
> +CONFIG_SCSI_LPFC=m
> +CONFIG_ATA=y
> +# CONFIG_ATA_SFF is not set
> +CONFIG_MD=y
> +CONFIG_BLK_DEV_MD=y
> +CONFIG_MD_LINEAR=y
> +CONFIG_MD_RAID0=y
> +CONFIG_MD_RAID1=y
> +CONFIG_MD_RAID10=m
> +CONFIG_MD_RAID456=m
> +CONFIG_MD_MULTIPATH=m
> +CONFIG_MD_FAULTY=m
> +CONFIG_BLK_DEV_DM=y
> +CONFIG_DM_CRYPT=m
> +CONFIG_DM_SNAPSHOT=m
> +CONFIG_DM_MIRROR=m
> +CONFIG_DM_ZERO=m
> +CONFIG_DM_MULTIPATH=m
> +CONFIG_BONDING=m
> +CONFIG_DUMMY=m
> +CONFIG_NETCONSOLE=y
> +CONFIG_NETPOLL_TRAP=y
> +CONFIG_TUN=m
> +CONFIG_VORTEX=y
> +CONFIG_ACENIC=m
> +CONFIG_ACENIC_OMIT_TIGON_I=y
> +CONFIG_PCNET32=y
> +CONFIG_TIGON3=y
> +CONFIG_CHELSIO_T1=m
> +CONFIG_BE2NET=m
> +CONFIG_S2IO=m
> +CONFIG_IBMVETH=y
> +CONFIG_EHEA=y
> +CONFIG_E100=y
> +CONFIG_E1000=y
> +CONFIG_E1000E=y
> +CONFIG_IXGB=m
> +CONFIG_IXGBE=m
> +CONFIG_MLX4_EN=m
> +CONFIG_MYRI10GE=m
> +CONFIG_QLGE=m
> +CONFIG_NETXEN_NIC=m
> +CONFIG_PPP=m
> +CONFIG_PPP_BSDCOMP=m
> +CONFIG_PPP_DEFLATE=m
> +CONFIG_PPPOE=m
> +CONFIG_PPP_ASYNC=m
> +CONFIG_PPP_SYNC_TTY=m
> +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
> +CONFIG_INPUT_EVDEV=m
> +CONFIG_INPUT_MISC=y
> +CONFIG_INPUT_PCSPKR=m
> +# CONFIG_SERIO_SERPORT is not set
> +CONFIG_SERIAL_8250=y
> +CONFIG_SERIAL_8250_CONSOLE=y
> +CONFIG_SERIAL_ICOM=m
> +CONFIG_SERIAL_JSM=m
> +CONFIG_HVC_CONSOLE=y
> +CONFIG_HVC_RTAS=y
> +CONFIG_HVCS=m
> +CONFIG_IBM_BSR=m
> +CONFIG_GEN_RTC=y
> +CONFIG_RAW_DRIVER=y
> +CONFIG_MAX_RAW_DEVS=1024
> +CONFIG_FB=y
> +CONFIG_FIRMWARE_EDID=y
> +CONFIG_FB_OF=y
> +CONFIG_FB_MATROX=y
> +CONFIG_FB_MATROX_MILLENIUM=y
> +CONFIG_FB_MATROX_MYSTIQUE=y
> +CONFIG_FB_MATROX_G=y
> +CONFIG_FB_RADEON=y
> +CONFIG_FB_IBM_GXT4500=y
> +CONFIG_LCD_PLATFORM=m
> +# CONFIG_VGA_CONSOLE is not set
> +CONFIG_FRAMEBUFFER_CONSOLE=y
> +CONFIG_LOGO=y
> +CONFIG_HID_GYRATION=y
> +CONFIG_HID_PANTHERLORD=y
> +CONFIG_HID_PETALYNX=y
> +CONFIG_HID_SAMSUNG=y
> +CONFIG_HID_SONY=y
> +CONFIG_HID_SUNPLUS=y
> +CONFIG_USB_HIDDEV=y
> +CONFIG_USB=y
> +CONFIG_USB_MON=m
> +CONFIG_USB_EHCI_HCD=y
> +# CONFIG_USB_EHCI_HCD_PPC_OF is not set
> +CONFIG_USB_OHCI_HCD=y
> +CONFIG_USB_STORAGE=m
> +CONFIG_INFINIBAND=m
> +CONFIG_INFINIBAND_USER_MAD=m
> +CONFIG_INFINIBAND_USER_ACCESS=m
> +CONFIG_INFINIBAND_MTHCA=m
> +CONFIG_INFINIBAND_EHCA=m
> +CONFIG_INFINIBAND_CXGB3=m
> +CONFIG_INFINIBAND_CXGB4=m
> +CONFIG_MLX4_INFINIBAND=m
> +CONFIG_INFINIBAND_IPOIB=m
> +CONFIG_INFINIBAND_IPOIB_CM=y
> +CONFIG_INFINIBAND_SRP=m
> +CONFIG_INFINIBAND_ISER=m
> +CONFIG_EXT2_FS=y
> +CONFIG_EXT2_FS_XATTR=y
> +CONFIG_EXT2_FS_POSIX_ACL=y
> +CONFIG_EXT2_FS_SECURITY=y
> +CONFIG_EXT2_FS_XIP=y
> +CONFIG_EXT3_FS=y
> +CONFIG_EXT3_FS_POSIX_ACL=y
> +CONFIG_EXT3_FS_SECURITY=y
> +CONFIG_EXT4_FS=y
> +CONFIG_EXT4_FS_POSIX_ACL=y
> +CONFIG_EXT4_FS_SECURITY=y
> +CONFIG_REISERFS_FS=y
> +CONFIG_REISERFS_FS_XATTR=y
> +CONFIG_REISERFS_FS_POSIX_ACL=y
> +CONFIG_REISERFS_FS_SECURITY=y
> +CONFIG_JFS_FS=m
> +CONFIG_JFS_POSIX_ACL=y
> +CONFIG_JFS_SECURITY=y
> +CONFIG_XFS_FS=m
> +CONFIG_XFS_POSIX_ACL=y
> +CONFIG_BTRFS_FS=m
> +CONFIG_BTRFS_FS_POSIX_ACL=y
> +CONFIG_NILFS2_FS=m
> +CONFIG_AUTOFS4_FS=m
> +CONFIG_FUSE_FS=m
> +CONFIG_ISO9660_FS=y
> +CONFIG_UDF_FS=m
> +CONFIG_MSDOS_FS=y
> +CONFIG_VFAT_FS=y
> +CONFIG_PROC_KCORE=y
> +CONFIG_TMPFS=y
> +CONFIG_TMPFS_POSIX_ACL=y
> +CONFIG_HUGETLBFS=y
> +CONFIG_CRAMFS=m
> +CONFIG_SQUASHFS=m
> +CONFIG_SQUASHFS_XATTR=y
> +CONFIG_SQUASHFS_LZO=y
> +CONFIG_SQUASHFS_XZ=y
> +CONFIG_NFS_FS=y
> +CONFIG_NFS_V3_ACL=y
> +CONFIG_NFS_V4=y
> +CONFIG_NFSD=m
> +CONFIG_NFSD_V3_ACL=y
> +CONFIG_NFSD_V4=y
> +CONFIG_CIFS=m
> +CONFIG_CIFS_XATTR=y
> +CONFIG_CIFS_POSIX=y
> +CONFIG_NLS_DEFAULT="utf8"
> +CONFIG_NLS_CODEPAGE_437=y
> +CONFIG_NLS_ASCII=y
> +CONFIG_NLS_ISO8859_1=y
> +CONFIG_NLS_UTF8=y
> +CONFIG_CRC_T10DIF=y
> +CONFIG_MAGIC_SYSRQ=y
> +CONFIG_DEBUG_KERNEL=y
> +CONFIG_LOCKUP_DETECTOR=y
> +CONFIG_DEBUG_STACK_USAGE=y
> +CONFIG_LATENCYTOP=y
> +CONFIG_SCHED_TRACER=y
> +CONFIG_BLK_DEV_IO_TRACE=y
> +CONFIG_DEBUG_STACKOVERFLOW=y
> +CONFIG_CODE_PATCHING_SELFTEST=y
> +CONFIG_FTR_FIXUP_SELFTEST=y
> +CONFIG_MSI_BITMAP_SELFTEST=y
> +CONFIG_XMON=y
> +CONFIG_XMON_DEFAULT=y
> +CONFIG_CRYPTO_NULL=m
> +CONFIG_CRYPTO_TEST=m
> +CONFIG_CRYPTO_PCBC=m
> +CONFIG_CRYPTO_HMAC=y
> +CONFIG_CRYPTO_MICHAEL_MIC=m
> +CONFIG_CRYPTO_TGR192=m
> +CONFIG_CRYPTO_WP512=m
> +CONFIG_CRYPTO_ANUBIS=m
> +CONFIG_CRYPTO_BLOWFISH=m
> +CONFIG_CRYPTO_CAST6=m
> +CONFIG_CRYPTO_KHAZAD=m
> +CONFIG_CRYPTO_SALSA20=m
> +CONFIG_CRYPTO_SERPENT=m
> +CONFIG_CRYPTO_TEA=m
> +CONFIG_CRYPTO_TWOFISH=m
> +CONFIG_CRYPTO_LZO=m
> +# CONFIG_CRYPTO_ANSI_CPRNG is not set
> +CONFIG_CRYPTO_DEV_NX=y
> +CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
> +# CONFIG_VIRTUALIZATION is not set
> +CONFIG_CPU_LITTLE_ENDIAN=y
>
^ permalink raw reply
* Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
From: Anton Blanchard @ 2013-08-08 7:53 UTC (permalink / raw)
To: Michael Neuling; +Cc: Paul Mackerras, linuxppc-dev
In-Reply-To: <2419.1375831860@ale.ozlabs.ibm.com>
Hi,
> The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not
> here.
>
> I'm not that keen on another defconfig. benh is already talking about
> having a powernv defconfig. I'm worried we are going to fragment the
> defconfigs. If you want something special like LE, then change the
> default one.
I agree we don't want machine specific defconfigs, but I think it makes
sense to have ones that cover the key options that conflict. I'm
thinking 32bit, 64bit, 64bit BookE, 64bit LE etc.
One bonus is if we have a smaller set of defconfigs we might actually
get better testing. I have no idea which 32bit defconfigs I should test
for example, and I'm not going to test them all!
Anton
^ permalink raw reply
* Re: [PATCH v2] drivers/crypto/nx: saves chaining value from co-processor
From: Michael Ellerman @ 2013-08-08 7:49 UTC (permalink / raw)
To: Fionnuala Gunter
Cc: linuxppc-dev, herbert, mhcerri, linux-kernel, linux-crypto
In-Reply-To: <1375917350.16050.14.camel@what-is-leg>
Hi Fin,
I don't know anything about crypto so I can only critique you on your
patch submission technique :) ...
On Wed, Aug 07, 2013 at 06:15:50PM -0500, Fionnuala Gunter wrote:
> This patch fixes a bug that is triggered when cts(cbc(aes)) is used with
> nx-crypto driver on input larger than 32 bytes.
>
> The chaining value from co-processor was not being saved. This value is
> needed because it is used as the IV by cts(cbc(aes)).
>
> Signed-off-by: Fionnuala Gunter <fin@linux.vnet.ibm.com>
> Reviewed-by: Marcelo Cerri <mhcerri@linux.vnet.ibm.com>
> ---
> v2. changed signed-off-by to reviewed-by and added more details to
> description
>
> This bug appeared in the original submission (v3.5)
Ideally this should identify the commit, so:
This bug was introduced in the original submission (v3.5), commit
856d673 "powerpc/crypto: AES-CBC mode routines for nx encryption".
Including the subject of the commit is handy in case the patch has been
backported somewhere, in which case the commit sha will be different.
It should definitely be part of the commit message, not below the "---".
And Ben might disagree but I think with a clear cut bug fix like this it
should include the CC to stable, so:
Cc: stable@vger.kernel.org # 3.5+
cheers
^ permalink raw reply
* Re: [v2] Enhanced support for MPC8xx/8xxx watchdog
From: leroy christophe @ 2013-08-08 5:50 UTC (permalink / raw)
To: Scott Wood; +Cc: Wim Van Sebroeck, linuxppc-dev, linux-kernel, linux-watchdog
In-Reply-To: <20130625230431.GA29393@home.buserror.net>
Le 26/06/2013 01:04, Scott Wood a écrit :
> On Thu, Feb 28, 2013 at 09:52:22AM +0100, LEROY Christophe wrote:
>> This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx,
>> at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must
>> be pinged twice a second. This is not in line with the Linux watchdog concept
>> which is based on a default watchdog timeout around 60s.
>> This patch introduces an intermediate layer between the CPU and the userspace.
>> The kernel pings the watchdog at the required frequency at the condition that
>> userspace tools refresh it regularly.
>> Existing parameter 'timeout' is renamed 'hw_time'.
>> The new parameter 'timeout' allows to set up the userspace timeout.
>> The driver also implements the WDIOC_SETTIMEOUT ioctl.
>>
>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>>
>>
>> diff -ur linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c linux/drivers/watchdog/mpc8xxx_wdt.c
>> --- linux-3.7.9/drivers/watchdog/mpc8xxx_wdt.c 2013-02-17 19:53:32.000000000 +0100
>> +++ linux/drivers/watchdog/mpc8xxx_wdt.c 2013-02-27 16:00:07.000000000 +0100
>> @@ -52,10 +52,17 @@
>> static struct mpc8xxx_wdt __iomem *wd_base;
>> static int mpc8xxx_wdt_init_late(void);
>>
>> -static u16 timeout = 0xffff;
>> -module_param(timeout, ushort, 0);
>> +#define WD_TIMO 10 /* Default timeout = 10 seconds */
> If the default Linux watchdog timeout is normally 60 seconds, why is it 10
> here?
Looks like each driver has its own default value, but agreed, I change
it to 60 seconds
>> +static uint timeout = WD_TIMO;
>> +module_param(timeout, uint, 0);
>> MODULE_PARM_DESC(timeout,
>> - "Watchdog timeout in ticks. (0<timeout<65536, default=65535)");
>> + "Watchdog SW timeout in seconds. (0 < timeout < 65536s, default = "
>> + __MODULE_STRING(WD_TIMO) "s)");
>> +static u16 hw_timo = 0xffff;
>> +module_param(hw_timo, ushort, 0);
>> +MODULE_PARM_DESC(hw_timo,
>> + "Watchdog HW timeout in ticks. (0 < hw_timo < 65536, default = 65535)");
> hw_timeout would be more legibile -- this is a public interface.
Ok
>
>> static bool reset = 1;
>> module_param(reset, bool, 0);
>> @@ -72,10 +79,12 @@
>> * to 0
>> */
>> static int prescale = 1;
>> -static unsigned int timeout_sec;
>> +static unsigned int hw_timo_sec;
>>
>> +static int wdt_auto = 1;
> bool, and add a comment indicating what this means.
Ok
>
>> static unsigned long wdt_is_open;
>> static DEFINE_SPINLOCK(wdt_spinlock);
>> +static unsigned long wdt_last_ping;
>>
>> static void mpc8xxx_wdt_keepalive(void)
>> {
>> @@ -91,9 +100,20 @@
>>
>> static void mpc8xxx_wdt_timer_ping(unsigned long arg)
>> {
>> - mpc8xxx_wdt_keepalive();
>> - /* We're pinging it twice faster than needed, just to be sure. */
>> - mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
>> + if (wdt_auto)
>> + wdt_last_ping = jiffies;
>> +
>> + if (jiffies - wdt_last_ping <= timeout * HZ) {
> So timeout cannot be more than UINT_MAX / HZ... Might want to check for
> that, just in case.
Ok.
>
> What happens if there's a race? If another CPU updates wdt_last_ping in
> parallel, then you could see wdt_last_ping greater than the value you
> read for jiffies. Since this is an unsigned comparison, it will fail to
> call keepalive. You might get saved by pinging it twice as often as
> necessary, but you shouldn't rely on that.
Euh ... This watchdog is integrated inside the CPU, so there is no
chance that any external CPU get access to it.
>
>> + mpc8xxx_wdt_keepalive();
>> + /* We're pinging it twice faster than needed, to be sure. */
>> + mod_timer(&wdt_timer, jiffies + HZ * hw_timo_sec / 2);
>> + }
>> +}
>> +
>> +static void mpc8xxx_wdt_sw_keepalive(void)
>> +{
>> + wdt_last_ping = jiffies;
>> + mpc8xxx_wdt_timer_ping(0);
>> }
> This isn't new with this patch, but it looks like
> mpc8xxx_wdt_keepalive() can be called either from timer context, or with
> interrupts enabled... yet it uses a bare spin_lock() rather than an
> irq-safe version. This should be fixed.
Ok, I'll propose another patch for that. Indeed, is the spin_lock needed
at all ? If we get two writes interleaved, it will make it anyway.
Christophe
^ permalink raw reply
* [PATCH v3] Enhanced support for MPC8xx/8xxx watchdog
From: Christophe Leroy @ 2013-08-08 6:18 UTC (permalink / raw)
To: Wim Van Sebroeck, scottwood; +Cc: linuxppc-dev, linux-kernel, linux-watchdog
This patch modifies the behaviour of the MPC8xx/8xxx watchdog. On the MPC8xx,
at 133Mhz, the maximum timeout of the watchdog timer is 1s, which means it must
be pinged twice a second. This is not in line with the Linux watchdog concept
which is based on a default watchdog timeout around 60s.
This patch introduces an intermediate layer between the CPU and the userspace.
The kernel pings the watchdog at the required frequency at the condition that
userspace tools refresh it regularly.
Existing parameter 'timeout' is renamed 'hw_timeout'.
The new parameter 'timeout' allows to set up the userspace timeout.
This patch also adds the WDIOC_SETTIMEOUT ioctl to the driver.
Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
--- linux-3.8.13/drivers/watchdog/mpc8xxx_wdt.c 2013-05-11 22:57:46.000000000 +0200
+++ linux/drivers/watchdog/mpc8xxx_wdt.c 2013-08-08 02:12:15.000000000 +0200
@@ -52,10 +52,18 @@
static struct mpc8xxx_wdt __iomem *wd_base;
static int mpc8xxx_wdt_init_late(void);
-static u16 timeout = 0xffff;
-module_param(timeout, ushort, 0);
+#define WD_TIMO 60 /* Default timeout = 60 seconds */
+
+static uint timeout = WD_TIMO;
+module_param(timeout, uint, 0);
MODULE_PARM_DESC(timeout,
- "Watchdog timeout in ticks. (0<timeout<65536, default=65535)");
+ "Watchdog SW timeout in seconds. (0 < timeout < 65536s, default = "
+ __MODULE_STRING(WD_TIMO) "s)");
+static u16 hw_timeout = 0xffff;
+module_param(hw_timeout, ushort, 0);
+MODULE_PARM_DESC(hw_timeout,
+ "Watchdog HW timeout in ticks. (0 < hw_timeout < 65536, "
+ "default = 65535)");
static bool reset = 1;
module_param(reset, bool, 0);
@@ -72,10 +80,16 @@
* to 0
*/
static int prescale = 1;
-static unsigned int timeout_sec;
+static unsigned int hw_timeout_sec;
+/*
+ * wdt_auto is set to 1 when watchdog is automatically refreshed by the kernel
+ * (when /dev/watchdog is not open)
+ */
+static bool wdt_auto = 1;
static unsigned long wdt_is_open;
static DEFINE_SPINLOCK(wdt_spinlock);
+static unsigned long wdt_last_ping;
static void mpc8xxx_wdt_keepalive(void)
{
@@ -91,9 +105,20 @@
static void mpc8xxx_wdt_timer_ping(unsigned long arg)
{
- mpc8xxx_wdt_keepalive();
- /* We're pinging it twice faster than needed, just to be sure. */
- mod_timer(&wdt_timer, jiffies + HZ * timeout_sec / 2);
+ if (wdt_auto)
+ wdt_last_ping = jiffies;
+
+ if (jiffies - wdt_last_ping <= timeout * HZ) {
+ mpc8xxx_wdt_keepalive();
+ /* We're pinging it twice faster than needed, to be sure. */
+ mod_timer(&wdt_timer, jiffies + HZ * hw_timeout_sec / 2);
+ }
+}
+
+static void mpc8xxx_wdt_sw_keepalive(void)
+{
+ wdt_last_ping = jiffies;
+ mpc8xxx_wdt_timer_ping(0);
}
static void mpc8xxx_wdt_pr_warn(const char *msg)
@@ -106,7 +131,7 @@
size_t count, loff_t *ppos)
{
if (count)
- mpc8xxx_wdt_keepalive();
+ mpc8xxx_wdt_sw_keepalive();
return count;
}
@@ -126,11 +151,11 @@
if (reset)
tmp |= SWCRR_SWRI;
- tmp |= timeout << 16;
+ tmp |= hw_timeout << 16;
out_be32(&wd_base->swcrr, tmp);
- del_timer_sync(&wdt_timer);
+ wdt_auto = 0;
return nonseekable_open(inode, file);
}
@@ -138,7 +163,8 @@
static int mpc8xxx_wdt_release(struct inode *inode, struct file *file)
{
if (!nowayout)
- mpc8xxx_wdt_timer_ping(0);
+ wdt_auto = 1;
+
else
mpc8xxx_wdt_pr_warn("watchdog closed");
clear_bit(0, &wdt_is_open);
@@ -155,6 +181,7 @@
.firmware_version = 1,
.identity = "MPC8xxx",
};
+ int r;
switch (cmd) {
case WDIOC_GETSUPPORT:
@@ -163,10 +190,15 @@
case WDIOC_GETBOOTSTATUS:
return put_user(0, p);
case WDIOC_KEEPALIVE:
- mpc8xxx_wdt_keepalive();
+ mpc8xxx_wdt_sw_keepalive();
return 0;
case WDIOC_GETTIMEOUT:
- return put_user(timeout_sec, p);
+ return put_user(timeout, p);
+ case WDIOC_SETTIMEOUT:
+ r = get_user(timeout, p);
+ if (timeout > UINT_MAX / HZ)
+ timeout = UINT_MAX / HZ;
+ return r;
default:
return -ENOTTY;
}
@@ -215,21 +247,26 @@
ret = -ENOSYS;
goto err_unmap;
}
+ if (enabled)
+ hw_timeout = in_be32(&wd_base->swcrr) >> 16;
/* Calculate the timeout in seconds */
if (prescale)
- timeout_sec = (timeout * wdt_type->prescaler) / freq;
+ hw_timeout_sec = (hw_timeout * wdt_type->prescaler) / freq;
else
- timeout_sec = timeout / freq;
+ hw_timeout_sec = hw_timeout / freq;
+ /* Make sure the timeout is not too big */
+ if (timeout > UINT_MAX / HZ)
+ timeout = UINT_MAX / HZ;
#ifdef MODULE
ret = mpc8xxx_wdt_init_late();
if (ret)
goto err_unmap;
#endif
- pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout=%d (%d seconds)\n",
- reset ? "reset" : "interrupt", timeout, timeout_sec);
+ pr_info("WDT driver for MPC8xxx initialized. mode:%s timeout = %d (%d seconds)\n",
+ reset ? "reset" : "interrupt", hw_timeout, hw_timeout_sec);
/*
* If the watchdog was previously enabled or we're running on
@@ -273,6 +310,7 @@
.compatible = "fsl,mpc823-wdt",
.data = &(struct mpc8xxx_wdt_type) {
.prescaler = 0x800,
+ .hw_enabled = true,
},
},
{},
^ permalink raw reply
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