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* Re: [PATCHv8 01/10] PCI: use weak functions for MSI arch-specific functions
From: Benjamin Herrenschmidt @ 2013-08-08 22:39 UTC (permalink / raw)
  To: Thomas Petazzoni
  Cc: Lior Amsalem, Andrew Lunn, linux-ia64, linux-mips, linux-pci,
	Heiko Carstens, Bjorn Helgaas, Thierry Reding, Paul Mackerras,
	H. Peter Anvin, sparclinux, linux-s390, Russell King, x86,
	Ingo Molnar, Ezequiel Garcia, Fenghua Yu, Jason Cooper,
	Rob Herring, Chris Metcalf, Gregory Clement, Thomas Gleixner,
	linux-arm-kernel, Tony Luck, Ralf Baechle, Maen Suleiman,
	Martin Schwidefsky, linux390, linuxppc-dev, David S. Miller
In-Reply-To: <1376000268-18397-2-git-send-email-thomas.petazzoni@free-electrons.com>

On Fri, 2013-08-09 at 00:17 +0200, Thomas Petazzoni wrote:
> Until now, the MSI architecture-specific functions could be overloaded
> using a fairly complex set of #define and compile-time
> conditionals. In order to prepare for the introduction of the msi_chip
> infrastructure, it is desirable to switch all those functions to use
> the 'weak' mechanism. This commit converts all the architectures that
> were overidding those MSI functions to use the new strategy.
> 
> Note that we keep two separate, non-weak, functions
> default_teardown_msi_irqs() and default_restore_msi_irqs() for the
> default behavior of the arch_teardown_msi_irqs() and
> arch_restore_msi_irqs(), as the default behavior is needed by x86 PCI
> code.

Looks good, I'll give it a quick spin to make sure there is no
accidental breakage on ppc today.

> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> Tested-by: Daniel Price <daniel.price@gmail.com>
> Tested-by: Thierry Reding <thierry.reding@gmail.com>

Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

> Cc: Paul Mackerras <paulus@samba.org>
> Cc: linuxppc-dev@lists.ozlabs.org
> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
> Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
> Cc: linux390@de.ibm.com
> Cc: linux-s390@vger.kernel.org
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: H. Peter Anvin <hpa@zytor.com>
> Cc: x86@kernel.org
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Tony Luck <tony.luck@intel.com>
> Cc: Fenghua Yu <fenghua.yu@intel.com>
> Cc: linux-ia64@vger.kernel.org
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: linux-mips@linux-mips.org
> Cc: David S. Miller <davem@davemloft.net>
> Cc: sparclinux@vger.kernel.org
> Cc: Chris Metcalf <cmetcalf@tilera.com>
> ---
>  arch/mips/include/asm/pci.h    |  5 -----
>  arch/powerpc/include/asm/pci.h |  5 -----
>  arch/s390/include/asm/pci.h    |  4 ----
>  arch/x86/include/asm/pci.h     | 28 ------------------------
>  arch/x86/kernel/x86_init.c     | 21 ++++++++++++++++++
>  drivers/pci/msi.c              | 48 +++++++++++++++++++++---------------------
>  include/linux/msi.h            |  8 ++++++-
>  7 files changed, 52 insertions(+), 67 deletions(-)
> 
> diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
> index fa8e0aa..f194c08 100644
> --- a/arch/mips/include/asm/pci.h
> +++ b/arch/mips/include/asm/pci.h
> @@ -136,11 +136,6 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
>  	return channel ? 15 : 14;
>  }
>  
> -#ifdef CONFIG_CPU_CAVIUM_OCTEON
> -/* MSI arch hook for OCTEON */
> -#define arch_setup_msi_irqs arch_setup_msi_irqs
> -#endif
> -
>  extern char * (*pcibios_plat_setup)(char *str);
>  
>  #ifdef CONFIG_OF
> diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
> index 6653f27..95145a1 100644
> --- a/arch/powerpc/include/asm/pci.h
> +++ b/arch/powerpc/include/asm/pci.h
> @@ -113,11 +113,6 @@ extern int pci_domain_nr(struct pci_bus *bus);
>  /* Decide whether to display the domain number in /proc */
>  extern int pci_proc_domain(struct pci_bus *bus);
>  
> -/* MSI arch hooks */
> -#define arch_setup_msi_irqs arch_setup_msi_irqs
> -#define arch_teardown_msi_irqs arch_teardown_msi_irqs
> -#define arch_msi_check_device arch_msi_check_device
> -
>  struct vm_area_struct;
>  /* Map a range of PCI memory or I/O space for a device into user space */
>  int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
> diff --git a/arch/s390/include/asm/pci.h b/arch/s390/include/asm/pci.h
> index 6e577ba..262b91b 100644
> --- a/arch/s390/include/asm/pci.h
> +++ b/arch/s390/include/asm/pci.h
> @@ -21,10 +21,6 @@ void pci_iounmap(struct pci_dev *, void __iomem *);
>  int pci_domain_nr(struct pci_bus *);
>  int pci_proc_domain(struct pci_bus *);
>  
> -/* MSI arch hooks */
> -#define arch_setup_msi_irqs	arch_setup_msi_irqs
> -#define arch_teardown_msi_irqs	arch_teardown_msi_irqs
> -
>  #define ZPCI_BUS_NR			0	/* default bus number */
>  #define ZPCI_DEVFN			0	/* default device number */
>  
> diff --git a/arch/x86/include/asm/pci.h b/arch/x86/include/asm/pci.h
> index d9e9e6c..8c61de0 100644
> --- a/arch/x86/include/asm/pci.h
> +++ b/arch/x86/include/asm/pci.h
> @@ -100,29 +100,6 @@ static inline void early_quirks(void) { }
>  extern void pci_iommu_alloc(void);
>  
>  #ifdef CONFIG_PCI_MSI
> -/* MSI arch specific hooks */
> -static inline int x86_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
> -{
> -	return x86_msi.setup_msi_irqs(dev, nvec, type);
> -}
> -
> -static inline void x86_teardown_msi_irqs(struct pci_dev *dev)
> -{
> -	x86_msi.teardown_msi_irqs(dev);
> -}
> -
> -static inline void x86_teardown_msi_irq(unsigned int irq)
> -{
> -	x86_msi.teardown_msi_irq(irq);
> -}
> -static inline void x86_restore_msi_irqs(struct pci_dev *dev, int irq)
> -{
> -	x86_msi.restore_msi_irqs(dev, irq);
> -}
> -#define arch_setup_msi_irqs x86_setup_msi_irqs
> -#define arch_teardown_msi_irqs x86_teardown_msi_irqs
> -#define arch_teardown_msi_irq x86_teardown_msi_irq
> -#define arch_restore_msi_irqs x86_restore_msi_irqs
>  /* implemented in arch/x86/kernel/apic/io_apic. */
>  struct msi_desc;
>  int native_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
> @@ -130,11 +107,6 @@ void native_teardown_msi_irq(unsigned int irq);
>  void native_restore_msi_irqs(struct pci_dev *dev, int irq);
>  int setup_msi_irq(struct pci_dev *dev, struct msi_desc *msidesc,
>  		  unsigned int irq_base, unsigned int irq_offset);
> -/* default to the implementation in drivers/lib/msi.c */
> -#define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
> -#define HAVE_DEFAULT_MSI_RESTORE_IRQS
> -void default_teardown_msi_irqs(struct pci_dev *dev);
> -void default_restore_msi_irqs(struct pci_dev *dev, int irq);
>  #else
>  #define native_setup_msi_irqs		NULL
>  #define native_teardown_msi_irq		NULL
> diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
> index 5f24c71..4c374a9 100644
> --- a/arch/x86/kernel/x86_init.c
> +++ b/arch/x86/kernel/x86_init.c
> @@ -116,6 +116,27 @@ struct x86_msi_ops x86_msi = {
>  	.setup_hpet_msi		= default_setup_hpet_msi,
>  };
>  
> +/* MSI arch specific hooks */
> +int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
> +{
> +	return x86_msi.setup_msi_irqs(dev, nvec, type);
> +}
> +
> +void arch_teardown_msi_irqs(struct pci_dev *dev)
> +{
> +	x86_msi.teardown_msi_irqs(dev);
> +}
> +
> +void arch_teardown_msi_irq(unsigned int irq)
> +{
> +	x86_msi.teardown_msi_irq(irq);
> +}
> +
> +void arch_restore_msi_irqs(struct pci_dev *dev, int irq)
> +{
> +	x86_msi.restore_msi_irqs(dev, irq);
> +}
> +
>  struct x86_io_apic_ops x86_io_apic_ops = {
>  	.init			= native_io_apic_init_mappings,
>  	.read			= native_io_apic_read,
> diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
> index aca7578..823c386 100644
> --- a/drivers/pci/msi.c
> +++ b/drivers/pci/msi.c
> @@ -30,20 +30,21 @@ static int pci_msi_enable = 1;
>  
>  /* Arch hooks */
>  
> -#ifndef arch_msi_check_device
> -int arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
> +int __weak arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc)
>  {
> -	return 0;
> +	return -EINVAL;
>  }
> -#endif
>  
> -#ifndef arch_setup_msi_irqs
> -# define arch_setup_msi_irqs default_setup_msi_irqs
> -# define HAVE_DEFAULT_MSI_SETUP_IRQS
> -#endif
> +void __weak arch_teardown_msi_irq(unsigned int irq)
> +{
> +}
>  
> -#ifdef HAVE_DEFAULT_MSI_SETUP_IRQS
> -int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
> +int __weak arch_msi_check_device(struct pci_dev *dev, int nvec, int type)
> +{
> +	return 0;
> +}
> +
> +int __weak arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
>  {
>  	struct msi_desc *entry;
>  	int ret;
> @@ -65,14 +66,11 @@ int default_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
>  
>  	return 0;
>  }
> -#endif
> -
> -#ifndef arch_teardown_msi_irqs
> -# define arch_teardown_msi_irqs default_teardown_msi_irqs
> -# define HAVE_DEFAULT_MSI_TEARDOWN_IRQS
> -#endif
>  
> -#ifdef HAVE_DEFAULT_MSI_TEARDOWN_IRQS
> +/*
> + * We have a default implementation available as a separate non-weak
> + * function, as it is used by the Xen x86 PCI code
> + */
>  void default_teardown_msi_irqs(struct pci_dev *dev)
>  {
>  	struct msi_desc *entry;
> @@ -89,14 +87,12 @@ void default_teardown_msi_irqs(struct pci_dev *dev)
>  			arch_teardown_msi_irq(entry->irq + i);
>  	}
>  }
> -#endif
>  
> -#ifndef arch_restore_msi_irqs
> -# define arch_restore_msi_irqs default_restore_msi_irqs
> -# define HAVE_DEFAULT_MSI_RESTORE_IRQS
> -#endif
> +void __weak arch_teardown_msi_irqs(struct pci_dev *dev)
> +{
> +	return default_teardown_msi_irqs(dev);
> +}
>  
> -#ifdef HAVE_DEFAULT_MSI_RESTORE_IRQS
>  void default_restore_msi_irqs(struct pci_dev *dev, int irq)
>  {
>  	struct msi_desc *entry;
> @@ -114,7 +110,11 @@ void default_restore_msi_irqs(struct pci_dev *dev, int irq)
>  	if (entry)
>  		write_msi_msg(irq, &entry->msg);
>  }
> -#endif
> +
> +void __weak arch_restore_msi_irqs(struct pci_dev *dev, int irq)
> +{
> +	return default_restore_msi_irqs(dev, irq);
> +}
>  
>  static void msi_set_enable(struct pci_dev *dev, int enable)
>  {
> diff --git a/include/linux/msi.h b/include/linux/msi.h
> index ee66f3a..271dfd1 100644
> --- a/include/linux/msi.h
> +++ b/include/linux/msi.h
> @@ -51,12 +51,18 @@ struct msi_desc {
>  };
>  
>  /*
> - * The arch hook for setup up msi irqs
> + * The arch hooks to setup up msi irqs. Those functions are
> + * implemented as weak symbols so that they /can/ be overriden by
> + * architecture specific code if needed.
>   */
>  int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
>  void arch_teardown_msi_irq(unsigned int irq);
>  int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
>  void arch_teardown_msi_irqs(struct pci_dev *dev);
>  int arch_msi_check_device(struct pci_dev* dev, int nvec, int type);
> +void arch_restore_msi_irqs(struct pci_dev *dev, int irq);
> +
> +void default_teardown_msi_irqs(struct pci_dev *dev);
> +void default_restore_msi_irqs(struct pci_dev *dev, int irq);
>  
>  #endif /* LINUX_MSI_H */

^ permalink raw reply

* Re: [PATCHv8 02/10] PCI: remove ARCH_SUPPORTS_MSI kconfig option
From: Benjamin Herrenschmidt @ 2013-08-08 22:39 UTC (permalink / raw)
  To: Thomas Petazzoni
  Cc: Lior Amsalem, Andrew Lunn, linux-ia64, linux-mips, linux-pci,
	Heiko Carstens, Bjorn Helgaas, Thierry Reding, Paul Mackerras,
	H. Peter Anvin, sparclinux, linux-s390, Russell King, x86,
	Ingo Molnar, Ezequiel Garcia, Fenghua Yu, Jason Cooper,
	Rob Herring, Chris Metcalf, Gregory Clement, Thomas Gleixner,
	linux-arm-kernel, Tony Luck, Ralf Baechle, Maen Suleiman,
	Martin Schwidefsky, linux390, linuxppc-dev, David S. Miller
In-Reply-To: <1376000268-18397-3-git-send-email-thomas.petazzoni@free-electrons.com>

On Fri, 2013-08-09 at 00:17 +0200, Thomas Petazzoni wrote:
> Now that we have weak versions for each of the PCI MSI architecture
> functions, we can actually build the MSI support for all platforms,
> regardless of whether they provide or not architecture-specific
> versions of those functions. For this reason, the ARCH_SUPPORTS_MSI
> hidden kconfig boolean becomes useless, and this patch gets rid of it.
> 
> Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
> Acked-by: Bjorn Helgaas <bhelgaas@google.com>
> Tested-by: Daniel Price <daniel.price@gmail.com>
> Tested-by: Thierry Reding <thierry.reding@gmail.com>

Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

> Cc: Paul Mackerras <paulus@samba.org>
> Cc: linuxppc-dev@lists.ozlabs.org
> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
> Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
> Cc: linux390@de.ibm.com
> Cc: linux-s390@vger.kernel.org
> Cc: Thomas Gleixner <tglx@linutronix.de>
> Cc: Ingo Molnar <mingo@redhat.com>
> Cc: H. Peter Anvin <hpa@zytor.com>
> Cc: x86@kernel.org
> Cc: Russell King <linux@arm.linux.org.uk>
> Cc: Tony Luck <tony.luck@intel.com>
> Cc: Fenghua Yu <fenghua.yu@intel.com>
> Cc: linux-ia64@vger.kernel.org
> Cc: Ralf Baechle <ralf@linux-mips.org>
> Cc: linux-mips@linux-mips.org
> Cc: David S. Miller <davem@davemloft.net>
> Cc: sparclinux@vger.kernel.org
> Cc: Chris Metcalf <cmetcalf@tilera.com>
> ---
>  arch/arm/Kconfig     | 1 -
>  arch/ia64/Kconfig    | 1 -
>  arch/mips/Kconfig    | 2 --
>  arch/powerpc/Kconfig | 1 -
>  arch/s390/Kconfig    | 1 -
>  arch/sparc/Kconfig   | 1 -
>  arch/tile/Kconfig    | 1 -
>  arch/x86/Kconfig     | 1 -
>  drivers/pci/Kconfig  | 4 ----
>  9 files changed, 13 deletions(-)
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 37c0f4e..41b6c96 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -441,7 +441,6 @@ config ARCH_NETX
>  config ARCH_IOP13XX
>  	bool "IOP13xx-based"
>  	depends on MMU
> -	select ARCH_SUPPORTS_MSI
>  	select CPU_XSC3
>  	select NEED_MACH_MEMORY_H
>  	select NEED_RET_TO_USER
> diff --git a/arch/ia64/Kconfig b/arch/ia64/Kconfig
> index 5a768ad..098602b 100644
> --- a/arch/ia64/Kconfig
> +++ b/arch/ia64/Kconfig
> @@ -9,7 +9,6 @@ config IA64
>  	select PCI if (!IA64_HP_SIM)
>  	select ACPI if (!IA64_HP_SIM)
>  	select PM if (!IA64_HP_SIM)
> -	select ARCH_SUPPORTS_MSI
>  	select HAVE_UNSTABLE_SCHED_CLOCK
>  	select HAVE_IDE
>  	select HAVE_OPROFILE
> diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
> index c3abed3..01b5f5a 100644
> --- a/arch/mips/Kconfig
> +++ b/arch/mips/Kconfig
> @@ -726,7 +726,6 @@ config CAVIUM_OCTEON_SOC
>  	select SYS_HAS_CPU_CAVIUM_OCTEON
>  	select SWAP_IO_SPACE
>  	select HW_HAS_PCI
> -	select ARCH_SUPPORTS_MSI
>  	select ZONE_DMA32
>  	select USB_ARCH_HAS_OHCI
>  	select USB_ARCH_HAS_EHCI
> @@ -762,7 +761,6 @@ config NLM_XLR_BOARD
>  	select CEVT_R4K
>  	select CSRC_R4K
>  	select IRQ_CPU
> -	select ARCH_SUPPORTS_MSI
>  	select ZONE_DMA32 if 64BIT
>  	select SYNC_R4K
>  	select SYS_HAS_EARLY_PRINTK
> diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> index 3bf72cd..183a165 100644
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -727,7 +727,6 @@ config PCI
>  	default y if !40x && !CPM2 && !8xx && !PPC_83xx \
>  		&& !PPC_85xx && !PPC_86xx && !GAMECUBE_COMMON
>  	default PCI_QSPAN if !4xx && !CPM2 && 8xx
> -	select ARCH_SUPPORTS_MSI
>  	select GENERIC_PCI_IOMAP
>  	help
>  	  Find out whether your system includes a PCI bus. PCI is the name of
> diff --git a/arch/s390/Kconfig b/arch/s390/Kconfig
> index 22f75b5..e9982a3 100644
> --- a/arch/s390/Kconfig
> +++ b/arch/s390/Kconfig
> @@ -428,7 +428,6 @@ menuconfig PCI
>  	bool "PCI support"
>  	default n
>  	depends on 64BIT
> -	select ARCH_SUPPORTS_MSI
>  	select PCI_MSI
>  	help
>  	  Enable PCI support.
> diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
> index a00cbd3..1570ad2 100644
> --- a/arch/sparc/Kconfig
> +++ b/arch/sparc/Kconfig
> @@ -52,7 +52,6 @@ config SPARC32
>  
>  config SPARC64
>  	def_bool 64BIT
> -	select ARCH_SUPPORTS_MSI
>  	select HAVE_FUNCTION_TRACER
>  	select HAVE_FUNCTION_GRAPH_TRACER
>  	select HAVE_FUNCTION_GRAPH_FP_TEST
> diff --git a/arch/tile/Kconfig b/arch/tile/Kconfig
> index 24565a7..74dff90 100644
> --- a/arch/tile/Kconfig
> +++ b/arch/tile/Kconfig
> @@ -380,7 +380,6 @@ config PCI
>  	select PCI_DOMAINS
>  	select GENERIC_PCI_IOMAP
>  	select TILE_GXIO_TRIO if TILEGX
> -	select ARCH_SUPPORTS_MSI if TILEGX
>  	select PCI_MSI if TILEGX
>  	---help---
>  	  Enable PCI root complex support, so PCIe endpoint devices can
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index b32ebf9..5db62ef 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -2014,7 +2014,6 @@ menu "Bus options (PCI etc.)"
>  config PCI
>  	bool "PCI support"
>  	default y
> -	select ARCH_SUPPORTS_MSI if (X86_LOCAL_APIC && X86_IO_APIC)
>  	---help---
>  	  Find out whether you have a PCI motherboard. PCI is the name of a
>  	  bus system, i.e. the way the CPU talks to the other stuff inside
> diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
> index 81944fb..b6a99f7 100644
> --- a/drivers/pci/Kconfig
> +++ b/drivers/pci/Kconfig
> @@ -1,13 +1,9 @@
>  #
>  # PCI configuration
>  #
> -config ARCH_SUPPORTS_MSI
> -	bool
> -
>  config PCI_MSI
>  	bool "Message Signaled Interrupts (MSI and MSI-X)"
>  	depends on PCI
> -	depends on ARCH_SUPPORTS_MSI
>  	help
>  	   This allows device drivers to enable MSI (Message Signaled
>  	   Interrupts).  Message Signaled Interrupts enable a device to

^ permalink raw reply

* Pull request: scottwood/linux.git next
From: Scott Wood @ 2013-08-08 22:45 UTC (permalink / raw)
  To: benh; +Cc: linuxppc-dev

The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:

  Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)

are available in the git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git next

for you to fetch changes up to c8db32c8669f7de05b820ee4934926405af52188:

  powerpc/e500: Update compilation flags with core specific options (2013-08-07 18:49:44 -0500)

----------------------------------------------------------------
Catalin Udma (2):
      powerpc/perf: increase the perf HW events to 6
      powerpc/e500: Update compilation flags with core specific options

Dongsheng Wang (1):
      powerpc/mpc85xx: invalidate TLB after hibernation resume

Haijun.Zhang (2):
      powerpc/85xx: add P1020RDB-PD platform support
      powerpc/85xx: add the P1020RDB-PD DTS support

Hongtao Jia (3):
      powerpc: Move opcode definitions from kvm/emulate.c to asm/ppc-opcode.h
      powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
      powerpc/msi: Fix compile error on mpc83xx

Ian Campbell (1):
      powerpc/fsl-booke: Rename b4qds.dts -> b4qds.dtsi.

Kevin Hao (3):
      powerpc/mpc85xx: remove the unneeded pci init functions for corenet ds board
      powerpc/fsl-pci: fix the unreachable warning message
      powerpc/fsl-pci: enable SWIOTLB in function setup_pci_atmu

Laurentiu TUDOR (1):
      powerpc/85xx: Move ePAPR paravirt initialization earlier

Lijun Pan (2):
      powerpc/perf: correct typos in counter enumeration
      powerpc/perf: add 2 additional performance monitor counters for e6500 core

Minghuan Lian (3):
      powerpc/dts: update MSI bindings doc for MPIC v4.3
      powerpc/dts: add MPIC v4.3 dts node
      powerpc/fsl_msi: add MSIIR1 support for MPIC v4.3

Priyanka Jain (1):
      powerpc/perf: Add e6500 PMU driver

Wei Yongjun (1):
      powerpc/fsl_msi: fix error return code in fsl_of_msi_probe()

Yuanquan Chen (1):
      powerpc/pci: fix PCI-e check link issue

Zhenhua Luo (1):
      powerpc/fsl: Enable CONFIG_DEVTMPFS_MOUNT so /dev can be mounted correctly

 .../devicetree/bindings/powerpc/fsl/msi-pic.txt    |  53 +++-
 arch/powerpc/Makefile                              |  18 +-
 arch/powerpc/boot/dts/b4420qds.dts                 |   2 +-
 arch/powerpc/boot/dts/b4860qds.dts                 |   2 +-
 arch/powerpc/boot/dts/{b4qds.dts => b4qds.dtsi}    |   0
 arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |   2 +-
 arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi       | 149 +++++++++++
 arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |   2 +-
 arch/powerpc/boot/dts/p1020rdb-pd.dts              | 280 +++++++++++++++++++++
 arch/powerpc/configs/85xx/p1023rds_defconfig       |   1 +
 arch/powerpc/configs/corenet32_smp_defconfig       |   1 +
 arch/powerpc/configs/corenet64_smp_defconfig       |   1 +
 arch/powerpc/configs/mpc83xx_defconfig             |   1 +
 arch/powerpc/configs/mpc85xx_defconfig             |   1 +
 arch/powerpc/configs/mpc85xx_smp_defconfig         |   1 +
 arch/powerpc/include/asm/epapr_hcalls.h            |   6 +
 arch/powerpc/include/asm/mpic.h                    |   7 +
 arch/powerpc/include/asm/perf_event_fsl_emb.h      |   2 +-
 arch/powerpc/include/asm/ppc-opcode.h              |  47 ++++
 arch/powerpc/include/asm/reg_fsl_emb.h             |  24 +-
 arch/powerpc/kernel/cpu_setup_fsl_booke.S          |   2 +-
 arch/powerpc/kernel/cputable.c                     |   2 +-
 arch/powerpc/kernel/epapr_paravirt.c               |  28 ++-
 arch/powerpc/kernel/setup_32.c                     |   4 +-
 arch/powerpc/kernel/setup_64.c                     |   3 +
 arch/powerpc/kernel/swsusp_booke.S                 |   8 +
 arch/powerpc/kernel/traps.c                        |   3 +
 arch/powerpc/kvm/emulate.c                         |  45 +---
 arch/powerpc/oprofile/op_model_fsl_emb.c           |  30 +++
 arch/powerpc/perf/Makefile                         |   2 +-
 arch/powerpc/perf/core-fsl-emb.c                   |  30 +++
 arch/powerpc/perf/e6500-pmu.c                      | 121 +++++++++
 arch/powerpc/platforms/85xx/corenet_ds.c           |   6 -
 arch/powerpc/platforms/85xx/mpc85xx_rdb.c          |  22 ++
 arch/powerpc/sysdev/fsl_msi.c                      | 137 +++++++---
 arch/powerpc/sysdev/fsl_msi.h                      |  10 +-
 arch/powerpc/sysdev/fsl_pci.c                      | 184 ++++++++++++--
 arch/powerpc/sysdev/fsl_pci.h                      |   6 +
 38 files changed, 1088 insertions(+), 155 deletions(-)
 rename arch/powerpc/boot/dts/{b4qds.dts => b4qds.dtsi} (100%)
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi
 create mode 100644 arch/powerpc/boot/dts/p1020rdb-pd.dts
 create mode 100644 arch/powerpc/perf/e6500-pmu.c

^ permalink raw reply

* Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
From: Michael Neuling @ 2013-08-08 23:12 UTC (permalink / raw)
  To: Anton Blanchard; +Cc: linuxppc-dev, Paul Mackerras
In-Reply-To: <20130808175324.735c1575@kryten>

Anton Blanchard <anton@samba.org> wrote:

> 
> Hi,
> 
> > The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not
> > here. 
> > 
> > I'm not that keen on another defconfig.  benh is already talking about
> > having a powernv defconfig.  I'm worried we are going to fragment the
> > defconfigs.  If you want something special like LE, then change the
> > default one.
> 
> I agree we don't want machine specific defconfigs, but I think it makes
> sense to have ones that cover the key options that conflict. I'm
> thinking 32bit, 64bit, 64bit BookE, 64bit LE etc.
> 
> One bonus is if we have a smaller set of defconfigs we might actually
> get better testing. I have no idea which 32bit defconfigs I should test
> for example, and I'm not going to test them all!

FWIW, I test with these configs and it seems to catch most of 32/64 bit,
SMP/UP, differnt MMU issues:

  pseries_defconfig 
  ppc64_defconfig 
  ppc64e_defconfig 
  pmac32_defconfig
  ppc44x_defconfig 
  ppc6xx_defconfig 
  mpc85xx_smp_defconfig
  mpc85xx_defconfig 
  chroma_defconfig 
  ps3_defconfig 
  celleb_defconfig

Mikey

^ permalink raw reply

* Re: [PATCH] mmc:of_spi: Update the code of getting voltage-ranges
From: Anton Vorontsov @ 2013-08-09  0:08 UTC (permalink / raw)
  To: Haijun Zhang; +Cc: scottwood, linuxppc-dev, cjb, linux-mmc, AFLEMING
In-Reply-To: <1375251927-3330-3-git-send-email-Haijun.Zhang@freescale.com>

On Wed, Jul 31, 2013 at 02:25:27PM +0800, Haijun Zhang wrote:
>  	int num_ranges;
> +	u32 ocr_mask;
>  	int i;
>  	int ret = -EINVAL;
>  
> @@ -102,26 +103,11 @@ struct mmc_spi_platform_data *mmc_spi_get_pdata(struct spi_device *spi)
>  	if (!oms)
>  		return NULL;
>  
> -	voltage_ranges = of_get_property(np, "voltage-ranges", &num_ranges);
> -	num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
> -	if (!voltage_ranges || !num_ranges) {
> -		dev_err(dev, "OF: voltage-ranges unspecified\n");
> +	ocr_mask = mmc_of_parse_voltage(np);
> +	if (ocr_mask <= 0)

'< 0' check for an unsigned type? :) I'd write just !ocr_mask...

But other than that the patch looks good to me...

Reviewed-by: Anton Vorontsov <anton@enomsg.org>

Thanks!

>  		goto err_ocr;
> -	}
> -
> -	for (i = 0; i < num_ranges; i++) {
> -		const int j = i * 2;
> -		u32 mask;
>  
> -		mask = mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
> -					       be32_to_cpu(voltage_ranges[j + 1]));
> -		if (!mask) {
> -			ret = -EINVAL;
> -			dev_err(dev, "OF: voltage-range #%d is invalid\n", i);
> -			goto err_ocr;
> -		}
> -		oms->pdata.ocr_mask |= mask;
> -	}
> +	oms->pdata.ocr_mask |= ocr_mask;
>  
>  	for (i = 0; i < ARRAY_SIZE(oms->gpios); i++) {
>  		enum of_gpio_flags gpio_flags;
> -- 
> 1.8.0

^ permalink raw reply

* Re: [PATCH 1/3 V2] mmc:core: parse voltage from device-tree
From: Anton Vorontsov @ 2013-08-09  0:15 UTC (permalink / raw)
  To: Haijun Zhang; +Cc: scottwood, linuxppc-dev, cjb, linux-mmc, AFLEMING
In-Reply-To: <1375251927-3330-1-git-send-email-Haijun.Zhang@freescale.com>

On Wed, Jul 31, 2013 at 02:25:25PM +0800, Haijun Zhang wrote:
> Add function to support get voltage from device-tree.
> If there are voltage-range specified in device-tree node, this function
> will parse it and return the avail voltage mask.
> 
> Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
> ---
> changes for v2:
> 	- Update the parameters of function
> 
>  drivers/mmc/core/core.c  | 46 ++++++++++++++++++++++++++++++++++++++++++++++
>  include/linux/mmc/core.h |  1 +
>  2 files changed, 47 insertions(+)
> 
> diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
> index 49a5bca..ce9c957 100644
> --- a/drivers/mmc/core/core.c
> +++ b/drivers/mmc/core/core.c
> @@ -27,6 +27,7 @@
>  #include <linux/fault-inject.h>
>  #include <linux/random.h>
>  #include <linux/slab.h>
> +#include <linux/of.h>
>  
>  #include <linux/mmc/card.h>
>  #include <linux/mmc/host.h>
> @@ -1196,6 +1197,51 @@ u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max)
>  }
>  EXPORT_SYMBOL(mmc_vddrange_to_ocrmask);
>  
> +#ifdef CONFIG_OF
> +
> +/*

This is not kernel-doc formatted comment for the function.. it should
start with /**...

> + * mmc_of_parse_voltage - return mask of supported voltages
> + * @np: The device node need to be parsed.
> + *
> + * 1. Return zero: voltage-ranges unspecified in device-tree.
> + * 2. Return negative errno: voltage-range is invalid.

This doesn't seem right... the function returns the unsigned mask... You
can change the prototype of this func to something like this:

int mmc_of_parse_voltage(struct device_node *np, u32 *mask);

So the function will fill the mask and return 0 on success, and will
return negtive errno on errors.

> + * 3. Return ocr_mask: a mask of voltages that parse from device-tree
> + * node can be provided to MMC/SD/SDIO devices.
> + */
> +

No need for this empty line...

> +u32 mmc_of_parse_voltage(struct device_node *np)
> +{
> +	const u32 *voltage_ranges;
> +	int num_ranges, i;
> +	u32 ocr_mask = 0;
> +
> +	voltage_ranges = of_get_property(np, "voltage-ranges", &num_ranges);
> +	num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
> +	if (!voltage_ranges || !num_ranges) {
> +		pr_info("%s: voltage-ranges unspecified\n", np->full_name);
> +		return 0;
> +	}
> +
> +	for (i = 0; i < num_ranges; i++) {
> +		const int j = i * 2;
> +		u32 mask;
> +
> +		mask = mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
> +				be32_to_cpu(voltage_ranges[j + 1]));

You lost some [pretty] formatting to line up the two arguments. :)

> +		if (!mask) {
> +			pr_err("%s: voltage-range #%d is invalid\n",
> +				np->full_name, i);
> +			return -EINVAL;
> +		}
> +		ocr_mask |= mask;
> +	}
> +
> +	return ocr_mask;
> +}
> +EXPORT_SYMBOL(mmc_of_parse_voltage);
> +
> +#endif /* CONFIG_OF */
> +
>  #ifdef CONFIG_REGULATOR
>  
>  /**
> diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
> index 443243b..e3f8fe3 100644
> --- a/include/linux/mmc/core.h
> +++ b/include/linux/mmc/core.h
> @@ -209,5 +209,6 @@ static inline void mmc_claim_host(struct mmc_host *host)
>  }
>  
>  extern u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
> +extern u32 mmc_of_parse_voltage(struct device_node *np);

You need to add a 'struct device_node;' forward-declaration, otherwise
non-OF code might fail to compile...

Thanks,

Anton

^ permalink raw reply

* Re: [RFC PATCH 1/1] powerpc/embedded6xx: Add support for Motorola/Emerson MVME5100.
From: Scott Wood @ 2013-08-09  1:35 UTC (permalink / raw)
  To: Stephen N Chivers; +Cc: paulus, linuxppc-dev, Chris Proctor
In-Reply-To: <OFBCFBBD51.E4ECB0DF-ONCA257BC0.0083C866-CA257BC1.0000531E@csc.com>

On Thu, 2013-08-08 at 11:03 +1100, Stephen N Chivers wrote:
> Add support for the Motorola/Emerson MVME5100 Single Board Computer.
> 
> The MVME5100 is a 6U form factor VME64 computer with:
> 
>         - A single MPC7410 or MPC750 CPU
>         - A HAWK Processor Host Bridge (CPU to PCI) and
>           MultiProcessor Interrupt Controller (MPIC)
>         - Up to 500Mb of onboard memory
>         - A M48T37 Real Time Clock (RTC) and Non-Volatile Memory chip
>         - Two 16550 compatible UARTS
>         - Two Intel E100 Fast Ethernets
>         - Two PCI Mezzanine Card (PMC) Slots
>         - PPCBug Firmware
> 
> The HAWK PHB/MPIC is compatible with the MPC10x devices.
> 
> There is no onboard disk support. This is usually provided by installing a 
> PMC
> in first PMC slot.
> 
> This patch revives the board support, it was present in early 2.6
> series kernels. The board support in those days was by Matt Porter of
> MontaVista Software.
> 
> CSC Australia has around 31 of these boards in service. The kernel in use
> for the boards is based on 2.6.31. The boards are operated without disks
> from a file server. 
> 
> This patch is based on linux-3.11-rc4 and has been boot tested.
> 
> Signed-off-by: Stephen Chivers <schivers@csc.com>
> ---
>  arch/powerpc/boot/dts/mvme5100.dts            |  195 ++
>  arch/powerpc/boot/mvme5100.c                  |   28 +
>  arch/powerpc/configs/mvme5100_defconfig       | 2597 
> +++++++++++++++++++++++++
>  arch/powerpc/platforms/embedded6xx/mvme5100.c |  288 +++
>  4 files changed, 3108 insertions(+), 0 deletions(-)
> 
> diff --git a/arch/powerpc/boot/dts/mvme5100.dts 
> b/arch/powerpc/boot/dts/mvme5100.dts
> new file mode 100644
> index 0000000..17fdbc7
> --- /dev/null
> +++ b/arch/powerpc/boot/dts/mvme5100.dts
> @@ -0,0 +1,195 @@
> +/*
> + * Device Tree Souce for Motorola/Emerson MVME5100.
> + *
> + * Copyright 2013 CSC Australia Pty. Ltd.
> + *
> + * This file is licensed under the terms of the GNU General Public
> + * License version 2.  This program is licensed "as is" without
> + * any warranty of any kind, whether express or implied.
> + */
> +
> +/dts-v1/;
> +
> +/ {
> +       model = "MVME5100";
> +       compatible = "MVME5100";
> +       #address-cells = <1>;
> +       #size-cells = <1>;
> +
> +       aliases {
> +               serial0 = &serial0;
> +               pci0 = &pci0;
> +       };
> +
> +       cpus {
> +               #address-cells = <1>;
> +               #size-cells = <0>;
> +
> +               PowerPC,7410 {
> +                       device_type = "cpu";
> +                       reg = <0x0>;
> +                       /* Following required by dtc but not used */
> +                       d-cache-line-size = <32>;
> +                       i-cache-line-size = <32>;
> +                       i-cache-size = <32768>;
> +                       d-cache-size = <32768>;
> +                       timebase-frequency = <25000000>;
> +                       clock-frequency = <500000000>;
> +                        bus-frequency = <100000000>;

What does "following" mean?  certainly some of those are used, such as
timebase-frequency.  In any case, it's not the device tree's job to
document which properties are used by Linux.

> +               };
> +       };
> +
> +       memory {
> +               device_type = "memory";
> +               reg = <0x0 0x20000000>;
> +       };
> +
> +       hawk@fef8 {

Unit address does not match reg.

> +               #address-cells = <1>;
> +               #size-cells = <1>;
> +               device_type = "soc";

Is this really an SoC?  In any case, this use of device_type is
deprecated.

> +               compatible = "mpc10x";

Don't use wildcards in compatible strings.

simple-bus may be applicable here (in addition to a specific
compatible).

> +               store-gathering = <0>;
> +               ranges = <0x0 0xfef80000 0x10000>;
> +               reg = <0xfef80000 0x10000>;

Where is "store-gathering" documented?

> +               serial0: serial@8000 {
> +                       cell-index = <0>;
> +                       device_type = "serial";
> +                       compatible = "ns16550";
> +                       reg = <0x8000 0x80>;
> +                       reg-shift = <4>;
> +                       clock-frequency = <1843200>;
> +                       current-speed = <9600>;
> +                       interrupts = <1 1>; // IRQ1 Level Active Low.
> +                       interrupt-parent = <&mpic>;
> +               };
> +
> +               serial1: serial@8200 {
> +                       cell-index = <1>;
> +                       device_type = "serial";
> +                       compatible = "ns16550";
> +                       reg = <0x8200 0x80>;
> +                       reg-shift = <4>;
> +                       clock-frequency = <1843200>;
> +                       current-speed = <9600>;
> +                       interrupts = <1 1>; // IRQ1 Level Active Low.
> +                       interrupt-parent = <&mpic>;
> +               };

What specifically does cell-index mean here?  Is it describing the
hardware or just the terminology used in documentation?

> +       pci0: pci@feff0000 {
> +               #address-cells = <3>;
> +               #size-cells = <2>;
> +               #interrupt-cells = <1>;
> +               device_type = "pci";
> +               compatible = "mpc10x-pci";
> +               reg = <0xfec00000 0x400000>;
> +               8259-interrupt-acknowledge = <0xfeff0030>;

Where is 8259-interrupt-acknowledge documented?

> +               ranges = <0x1000000 0x0        0x0 0xfe000000 0x0 0x800000
> +                         0x2000000 0x0 0x80000000 0x80000000 0x0 
> 0x74000000>;
> +               bus-range = <0 255>;
> +               clock-frequency = <33333333>;
> +               interrupt-parent = <&mpic>;
> +               interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
> +               interrupt-map = <
> +
> +                       /*
> +                        * This definition (IDSEL 11) duplicates the
> +                        * interrupts definition in the i8259
> +                        * interrupt controller below.
> +                        *
> +                        * It isn't essential to provide it and the
> +                        * board will run happily without it.

Should it be present then?

> +               isa {
> +                       #address-cells = <2>;
> +                       #size-cells = <1>;
> +                       #interrupt-cells = <2>;
> +                       device_type = "isa";
> +                       compatible = "isa";
> +                       ranges = <0x00000001 0 0x01000000 0 0x00000000 
> 0x00001000>;
> +                       interrupt-parent = <&i8259>;
> +
> +                       i8259: interrupt-controller@20 {
> +                               #interrupt-cells = <2>;
> +                               #address-cells = <0>;
> +                               interrupts = <0 2>;
> +                               device_type = "interrupt-controller";
> +                               compatible = "chrp,iic";
> +                               interrupt-controller;
> +                               reg = <1 0x00000020 0x00000002
> +                                       1 0x000000a0 0x00000002
> +                                       1 0x000004d0 0x00000002>;
> +                               clock-frequency = <0>;

Why does an i8259 have a clock-frequency?

> +                               built-in;

What does this mean?

> diff --git a/arch/powerpc/platforms/embedded6xx/mvme5100.c 
> b/arch/powerpc/platforms/embedded6xx/mvme5100.c
> new file mode 100644
> index 0000000..cc9ed8a
> --- /dev/null
> +++ b/arch/powerpc/platforms/embedded6xx/mvme5100.c
> @@ -0,0 +1,288 @@
> +/*
> + * Board setup routines for the Motorola/Emerson MVME5100.
> + *
> + * Copyright 2013 CSC Australia Pty. Ltd.
> + *
> + * Based on earlier code by:
> + *
> + *    Matt Porter, MontaVista Software Inc.
> + *    Copyright 2001 MontaVista Software Inc.
> + *
> + * This program is free software; you can redistribute  it and/or modify 
> it
> + * under  the terms of  the GNU General  Public License as published by 
> the
> + * Free Software Foundation;  either version 2 of the  License, or (at 
> your
> + * option) any later version.
> + *
> + * Author: Stephen Chivers <schivers@csc.com>
> + *
> + */
> +
> +#include <linux/of_platform.h>
> +
> +#include <asm/i8259.h>
> +#include <asm/pci-bridge.h>
> +#include <asm/mpic.h>
> +#include <asm/prom.h>
> +#include <mm/mmu_decl.h>
> +#include <asm/udbg.h>
> +
> +
> +#define HAWK_MPIC_SIZE         0x00040000U
> +#define MVME5100_PCI_MEM_OFFSET 0x00000000
> +
> +/* Board register addresses. */
> +#define        BOARD_STATUS_REG        0xfef88080
> +#define        BOARD_MODFAIL_REG       0xfef88090
> +#define        BOARD_MODRST_REG        0xfef880a0
> +#define        BOARD_TBEN_REG          0xfef880c0
> +#define BOARD_SW_READ_REG      0xfef880e0
> +#define        BOARD_GEO_ADDR_REG      0xfef880e8
> +#define        BOARD_EXT_FEATURE1_REG  0xfef880f0
> +#define        BOARD_EXT_FEATURE2_REG  0xfef88100
> +
> +static unsigned int pci_membase;
> +
> +
> +#ifdef DEBUG
> +#define DBG(fmt, args...) printk(KERN_ERR "%s: " fmt, __func__, ## args)
> +#else
> +#define DBG(fmt, args...)
> +#endif

Use pr_debug().

> +static void
> +mvme5100_8259_cascade(unsigned int irq, struct irq_desc *desc)
> +{
> +       struct irq_chip *chip = irq_desc_get_chip(desc);
> +       unsigned int cascade_irq = i8259_irq();
> +
> +

Only one blank line.

> +       if (cascade_irq != NO_IRQ)
> +               generic_handle_irq(cascade_irq);
> +
> +       chip->irq_eoi(&desc->irq_data);
> +}
> +
> +

Only one blank line.  Likewise elsewhere.

> +static void __init
> +mvme5100_pic_init(void)

Don't put a newline before the function name.

> +{
> +       struct mpic *mpic;
> +       void __iomem *mpic_addr;
> +       struct device_node *np;
> +       struct device_node *cp = NULL;
> +       unsigned int cirq;
> +       unsigned long intack = 0;
> +       const unsigned long *prop = NULL;

Do not use non-fixed-size-types to decode properties.  In particular,
non-string properties are normally composed of 32-bit cells.

> +       np = of_find_node_by_type(NULL, "open-pic");
> +       if (!np) {
> +               pr_err("Could not find open-pic node\n");
> +               return;
> +       }
> +
> +
> +       pr_info("mvme5100_pic_init: pci_membase: %x\n", pci_membase);
> +
> +       mpic_addr = ioremap(pci_membase + MVME5100_PCI_MEM_OFFSET,
> +                       HAWK_MPIC_SIZE);
> +
> +       pr_info("mvme5100_pic_init: mapped mpic_addr: 0x%p\n", mpic_addr);

The only thing you use this ioremap for is to print out the address.

> +       for_each_node_by_type(np, "interrupt-controller")
> +               if (of_device_is_compatible(np, "chrp,iic")) {
> +                       cp = np;
> +                       break;
> +               }
> +

Please use braces around multi-line loop bodies.

Why not just look for a chrp,iic node directly?

> +       if ((np = of_find_compatible_node(NULL, "pci", "mpc10x-pci"))) {

Why insist on the device_type?

> +static int __init
> +mvme5100_add_bridge(struct device_node *dev)
> +{
> +       const int               *bus_range;
> +       int                     len;
> +       struct pci_controller   *hose;
> +       unsigned short          devid;
> +
> +
> +       pr_info("Adding PCI host bridge %s\n", dev->full_name);
> +
> +       bus_range = of_get_property(dev, "bus-range", &len);
> +
> +       if (bus_range == NULL || len < 2 * sizeof(int))
> +               pr_warn("Can't get bus-range for %s, assuming bus 0\n",
> +                       dev->full_name);

Is this worth warning about?

> +       if (devid != PCI_DEVICE_ID_MOTOROLA_HAWK) {
> +               pr_err("HAWK PHB not present?\n");
> +
> +               return 0;
> +       }
> +
> +       early_read_config_dword( hose, 0, 0, PCI_BASE_ADDRESS_1, 
> &pci_membase);

Patch is linewrapped.

> +static void
> +mvme5100_restart(char *cmd)
> +{
> +       volatile ulong          i = 10000000;
> +
> +
> +       local_irq_disable();
> +       _nmask_and_or_msr(0, MSR_IP);

Does "mtmsr(mfmsr() | MSR_IP)" not work?

> +       out_8((u_char *) BOARD_MODRST_REG, 0x01);
> +
> +       while (i-- > 0);

Do not use a loop to implement a delay.

> +static void __init
> +mvme5100_set_bat(void)
> +{
> +
> +
> +       mb();
> +       mtspr(SPRN_DBAT1U, 0xf0001ffe);
> +       mtspr(SPRN_DBAT1L, 0xf000002a);
> +       mb();
> +       setbat(1, 0xfe000000, 0xfe000000, 0x02000000, PAGE_KERNEL_NCG);
> +}

It is no longer allowed to squat on random virtual address space like
this.  If you really need a BAT you'll have to allocate the virtual
address properly.

-Scott

^ permalink raw reply

* Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
From: Michael Ellerman @ 2013-08-09  3:21 UTC (permalink / raw)
  To: Michael Neuling
  Cc: linuxppc-dev, Madhavan Srinivasan, Paul Mackerras,
	Anton Blanchard
In-Reply-To: <15944.1375958991@ale.ozlabs.ibm.com>

On Thu, Aug 08, 2013 at 08:49:51PM +1000, Michael Neuling wrote:
> > > +CONFIG_SCHED_SMT=y
> > > +CONFIG_PPC_DENORMALISATION=y
> > > +CONFIG_HOTPLUG_PCI=m
> > Why the value "m" in the le_config file, when it is "y" in
> > pseries_defconfig.
> 
> We are out of sync already!?!?! *sigh* ;-)

That's good, more coverage!

cheers

^ permalink raw reply

* Re: [PATCH 63/63] powerpc: Add pseries_le_defconfig
From: Michael Ellerman @ 2013-08-09  3:23 UTC (permalink / raw)
  To: Michael Neuling; +Cc: Paul Mackerras, linuxppc-dev, Anton Blanchard
In-Reply-To: <25736.1376003557@ale.ozlabs.ibm.com>

On Fri, Aug 09, 2013 at 09:12:37AM +1000, Michael Neuling wrote:
> Anton Blanchard <anton@samba.org> wrote:
> 
> > 
> > Hi,
> > 
> > > The CONFIG_VIRTUALIZATION disabling should be done in the Kconfig not
> > > here. 
> > > 
> > > I'm not that keen on another defconfig.  benh is already talking about
> > > having a powernv defconfig.  I'm worried we are going to fragment the
> > > defconfigs.  If you want something special like LE, then change the
> > > default one.
> > 
> > I agree we don't want machine specific defconfigs, but I think it makes
> > sense to have ones that cover the key options that conflict. I'm
> > thinking 32bit, 64bit, 64bit BookE, 64bit LE etc.
> > 
> > One bonus is if we have a smaller set of defconfigs we might actually
> > get better testing. I have no idea which 32bit defconfigs I should test
> > for example, and I'm not going to test them all!
> 
> FWIW, I test with these configs and it seems to catch most of 32/64 bit,
> SMP/UP, differnt MMU issues:
> 
>   pseries_defconfig 
>   ppc64_defconfig 
>   ppc64e_defconfig 
>   pmac32_defconfig
>   ppc44x_defconfig 
>   ppc6xx_defconfig 
>   mpc85xx_smp_defconfig
>   mpc85xx_defconfig 
>   chroma_defconfig 

>   ps3_defconfig 
>   celleb_defconfig

I think cell_defconfig pretty much covers these too, and also gets you
coverage of the IBM blades.

And add randconfig too :)

cheers

^ permalink raw reply

* Re: [PATCH 1/3 V2] mmc:core: parse voltage from device-tree
From: Zhang Haijun @ 2013-08-09  3:34 UTC (permalink / raw)
  To: Anton Vorontsov
  Cc: linux-mmc, AFLEMING, scottwood, cjb, linuxppc-dev, Haijun Zhang
In-Reply-To: <20130809001540.GB7427@lizard.mcd01528.sjc.wayport.net>

On 08/09/2013 08:15 AM, Anton Vorontsov wrote:
> On Wed, Jul 31, 2013 at 02:25:25PM +0800, Haijun Zhang wrote:
>> Add function to support get voltage from device-tree.
>> If there are voltage-range specified in device-tree node, this function
>> will parse it and return the avail voltage mask.
>>
>> Signed-off-by: Haijun Zhang <haijun.zhang@freescale.com>
>> ---
>> changes for v2:
>> 	- Update the parameters of function
>>
>>   drivers/mmc/core/core.c  | 46 ++++++++++++++++++++++++++++++++++++++++++++++
>>   include/linux/mmc/core.h |  1 +
>>   2 files changed, 47 insertions(+)
>>
>> diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c
>> index 49a5bca..ce9c957 100644
>> --- a/drivers/mmc/core/core.c
>> +++ b/drivers/mmc/core/core.c
>> @@ -27,6 +27,7 @@
>>   #include <linux/fault-inject.h>
>>   #include <linux/random.h>
>>   #include <linux/slab.h>
>> +#include <linux/of.h>
>>   
>>   #include <linux/mmc/card.h>
>>   #include <linux/mmc/host.h>
>> @@ -1196,6 +1197,51 @@ u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max)
>>   }
>>   EXPORT_SYMBOL(mmc_vddrange_to_ocrmask);
>>   
>> +#ifdef CONFIG_OF
>> +
>> +/*
> This is not kernel-doc formatted comment for the function.. it should
> start with /**...
>
>> + * mmc_of_parse_voltage - return mask of supported voltages
>> + * @np: The device node need to be parsed.
>> + *
>> + * 1. Return zero: voltage-ranges unspecified in device-tree.
>> + * 2. Return negative errno: voltage-range is invalid.
> This doesn't seem right... the function returns the unsigned mask... You
> can change the prototype of this func to something like this:
>
> int mmc_of_parse_voltage(struct device_node *np, u32 *mask);
>
> So the function will fill the mask and return 0 on success, and will
> return negtive errno on errors.
Thanks, Anton.
I'll correct the return prototype of the function.
In case voltage unspecified in device node is not an error in my 
platform. So i hope to reserve the zero as unspecified case and give an 
prompt, an available value in case success, negative errno in case 
error. It's easy to figure out the root cause.

>> + * 3. Return ocr_mask: a mask of voltages that parse from device-tree
>> + * node can be provided to MMC/SD/SDIO devices.
>> + */
>> +
> No need for this empty line...
>
>> +u32 mmc_of_parse_voltage(struct device_node *np)
>> +{
>> +	const u32 *voltage_ranges;
>> +	int num_ranges, i;
>> +	u32 ocr_mask = 0;
>> +
>> +	voltage_ranges = of_get_property(np, "voltage-ranges", &num_ranges);
>> +	num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
>> +	if (!voltage_ranges || !num_ranges) {
>> +		pr_info("%s: voltage-ranges unspecified\n", np->full_name);
>> +		return 0;
>> +	}
>> +
>> +	for (i = 0; i < num_ranges; i++) {
>> +		const int j = i * 2;
>> +		u32 mask;
>> +
>> +		mask = mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
>> +				be32_to_cpu(voltage_ranges[j + 1]));
> You lost some [pretty] formatting to line up the two arguments. :)
I'll correct these. Thanks.
>> +		if (!mask) {
>> +			pr_err("%s: voltage-range #%d is invalid\n",
>> +				np->full_name, i);
>> +			return -EINVAL;
>> +		}
>> +		ocr_mask |= mask;
>> +	}
>> +
>> +	return ocr_mask;
>> +}
>> +EXPORT_SYMBOL(mmc_of_parse_voltage);
>> +
>> +#endif /* CONFIG_OF */
>> +
>>   #ifdef CONFIG_REGULATOR
>>   
>>   /**
>> diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
>> index 443243b..e3f8fe3 100644
>> --- a/include/linux/mmc/core.h
>> +++ b/include/linux/mmc/core.h
>> @@ -209,5 +209,6 @@ static inline void mmc_claim_host(struct mmc_host *host)
>>   }
>>   
>>   extern u32 mmc_vddrange_to_ocrmask(int vdd_min, int vdd_max);
>> +extern u32 mmc_of_parse_voltage(struct device_node *np);
> You need to add a 'struct device_node;' forward-declaration, otherwise
> non-OF code might fail to compile...
I'll move of.h from core.c to core.h
>
> Thanks,
>
> Anton
>


-- 
Thanks & Regards

Haijun

^ permalink raw reply

* [PATCH v3 2/4] powerpc: Add new save_tar() register function.
From: Michael Neuling @ 2013-08-09  3:43 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Matt Evans
In-Reply-To: <1375929237-19944-2-git-send-email-mikey@neuling.org>

powerpc: Add new save_tar() register function.

Add save_tar() function to save the Target Address Register (TAR).  This will
be used in a future patch to save the TAR earlier than it currently is.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Cc: <stable@vger.kernel.org>
---
v3: remove whitespace screw age noticed by sfr

diff --git a/arch/powerpc/include/asm/switch_to.h b/arch/powerpc/include/asm/switch_to.h
index 49a13e0..294c2ce 100644
--- a/arch/powerpc/include/asm/switch_to.h
+++ b/arch/powerpc/include/asm/switch_to.h
@@ -15,6 +15,15 @@ extern struct task_struct *__switch_to(struct task_struct *,
 struct thread_struct;
 extern struct task_struct *_switch(struct thread_struct *prev,
 				   struct thread_struct *next);
+#ifdef CONFIG_PPC_BOOK3S_64
+static inline void save_tar(struct thread_struct *prev)
+{
+	if (cpu_has_feature(CPU_FTR_ARCH_207S))
+		prev->tar = mfspr(SPRN_TAR);
+}
+#else
+static inline void save_tar(struct thread_struct *prev) {}
+#endif
 
 extern void giveup_fpu(struct task_struct *);
 extern void load_up_fpu(void);

^ permalink raw reply related

* [PATCH v2 1/3] powerpc: Rework setting up H/FSCR bit definitions
From: Michael Neuling @ 2013-08-09  3:46 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev, Anton Blanchard
In-Reply-To: <1375687686-5633-1-git-send-email-mikey@neuling.org>

powerpc: Rework setting up H/FSCR bit definitions

This reworks the Facility Status and Control Regsiter (FSCR) config bit
definitions so that we can access the bit numbers.  This will be useful when
looking at the status in the facility unavailable interrupt.

HFSCR and FSCR versions are the same, so reuse them.

Signed-off-by: Michael Neuling <mikey@neuling.org>
---
v2: Fix bit numbers:
  -#define FSCR_TM_LG     6
  -#define FSCR_PM_LG     5
  -#define FSCR_BHRB_LG   4
  +#define FSCR_TM_LG     5
  +#define FSCR_PM_LG     4
  +#define FSCR_BHRB_LG   3

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index a6840e4..99222e2 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -254,19 +254,28 @@
 #define SPRN_HRMOR	0x139	/* Real mode offset register */
 #define SPRN_HSRR0	0x13A	/* Hypervisor Save/Restore 0 */
 #define SPRN_HSRR1	0x13B	/* Hypervisor Save/Restore 1 */
+/* HFSCR and FSCR bit numbers are the same */
+#define FSCR_TAR_LG	8	/* Enable Target Address Register */
+#define FSCR_EBB_LG	7	/* Enable Event Based Branching */
+#define FSCR_TM_LG	5	/* Enable Transactional Memory */
+#define FSCR_PM_LG	4	/* Enable prob/priv access to PMU SPRs */
+#define FSCR_BHRB_LG	3	/* Enable Branch History Rolling Buffer*/
+#define FSCR_DSCR_LG	2	/* Enable Data Stream Control Register */
+#define FSCR_VECVSX_LG	1	/* Enable VMX/VSX  */
+#define FSCR_FP_LG	0	/* Enable Floating Point */
 #define SPRN_FSCR	0x099	/* Facility Status & Control Register */
-#define   FSCR_TAR	(1 << (63-55)) /* Enable Target Address Register */
-#define   FSCR_EBB	(1 << (63-56)) /* Enable Event Based Branching */
-#define   FSCR_DSCR	(1 << (63-61)) /* Enable Data Stream Control Register */
+#define   FSCR_TAR	__MASK(FSCR_TAR_LG)
+#define   FSCR_EBB	__MASK(FSCR_EBB_LG)
+#define   FSCR_DSCR	__MASK(FSCR_DSCR_LG)
 #define SPRN_HFSCR	0xbe	/* HV=1 Facility Status & Control Register */
-#define   HFSCR_TAR	(1 << (63-55)) /* Enable Target Address Register */
-#define   HFSCR_EBB	(1 << (63-56)) /* Enable Event Based Branching */
-#define   HFSCR_TM	(1 << (63-58)) /* Enable Transactional Memory */
-#define   HFSCR_PM	(1 << (63-60)) /* Enable prob/priv access to PMU SPRs */
-#define   HFSCR_BHRB	(1 << (63-59)) /* Enable Branch History Rolling Buffer*/
-#define   HFSCR_DSCR	(1 << (63-61)) /* Enable Data Stream Control Register */
-#define   HFSCR_VECVSX	(1 << (63-62)) /* Enable VMX/VSX  */
-#define   HFSCR_FP	(1 << (63-63)) /* Enable Floating Point */
+#define   HFSCR_TAR	__MASK(FSCR_TAR_LG)
+#define   HFSCR_EBB	__MASK(FSCR_EBB_LG)
+#define   HFSCR_TM	__MASK(FSCR_TM_LG)
+#define   HFSCR_PM	__MASK(FSCR_PM_LG)
+#define   HFSCR_BHRB	__MASK(FSCR_BHRB_LG)
+#define   HFSCR_DSCR	__MASK(FSCR_DSCR_LG)
+#define   HFSCR_VECVSX	__MASK(FSCR_VECVSX_LG)
+#define   HFSCR_FP	__MASK(FSCR_FP_LG)
 #define SPRN_TAR	0x32f	/* Target Address Register */
 #define SPRN_LPCR	0x13E	/* LPAR Control Register */
 #define   LPCR_VPM0	(1ul << (63-0))

^ permalink raw reply related

* [PATCH v3 3/3] powerpc: Correctly context switch DSCR on POWER8
From: Michael Neuling @ 2013-08-09  5:49 UTC (permalink / raw)
  To: benh; +Cc: Stephen Rothwell, linuxppc-dev, Anton Blanchard
In-Reply-To: <30983.1375700435@ale.ozlabs.ibm.com>

POWER8 allows the DSCR to be accessed directly from userspace via a new SPR
number 0x3 (Rather than 0x11.  DSCR SPR number 0x11 is still used on POWER8 but
like POWER7, is only accessible in HV and OS modes).  Currently, we allow this
by setting H/FSCR DSCR bit on boot.

Unfortunately this doesn't work, as the kernel needs to see the DSCR change so
that it knows to no longer restore the system wide version of DSCR on context
switch (ie. to set thread.dscr_inherit).

This clears the H/FSCR DSCR bit initially.  If a process then accesses the DSCR
(via SPR 0x3), it'll trap into the kernel where we set thread.dscr_inherit in
facility_unavailable_exception().

We also change _switch() so that we set or clear the H/FSCR DSCR bit based on
the thread.dscr_inherit.

Signed-off-by: Michael Neuling <mikey@neuling.org>
---
v3: remove unnecessary clearing of H/FSCR at boot.

diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index ab15b8d..4674fe6 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -584,9 +584,34 @@ BEGIN_FTR_SECTION
 	ld	r7,DSCR_DEFAULT@toc(2)
 	ld	r0,THREAD_DSCR(r4)
 	cmpwi	r6,0
+	li	r8, FSCR_DSCR
 	bne	1f
 	ld	r0,0(r7)
-1:	cmpd	r0,r25
+	b	3f
+1:
+  BEGIN_FTR_SECTION_NESTED(70)
+	mfspr	r6, SPRN_FSCR
+	or	r6, r6, r8
+	mtspr	SPRN_FSCR, r6
+    BEGIN_FTR_SECTION_NESTED(69)
+	mfspr	r6, SPRN_HFSCR
+	or	r6, r6, r8
+	mtspr	SPRN_HFSCR, r6
+    END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69)
+	b	4f
+  END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
+3:
+  BEGIN_FTR_SECTION_NESTED(70)
+	mfspr	r6, SPRN_FSCR
+	andc	r6, r6, r8
+	mtspr	SPRN_FSCR, r6
+    BEGIN_FTR_SECTION_NESTED(69)
+	mfspr	r6, SPRN_HFSCR
+	andc	r6, r6, r8
+	mtspr	SPRN_HFSCR, r6
+    END_FTR_SECTION_NESTED(CPU_FTR_HVMODE, CPU_FTR_HVMODE, 69)
+  END_FTR_SECTION_NESTED(CPU_FTR_ARCH_207S, CPU_FTR_ARCH_207S, 70)
+4:	cmpd	r0,r25
 	beq	2f
 	mtspr	SPRN_DSCR,r0
 2:
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index bf33c22..e435bc0 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -44,9 +44,7 @@
 #include <asm/machdep.h>
 #include <asm/rtas.h>
 #include <asm/pmc.h>
-#ifdef CONFIG_PPC32
 #include <asm/reg.h>
-#endif
 #ifdef CONFIG_PMAC_BACKLIGHT
 #include <asm/backlight.h>
 #endif
@@ -1296,43 +1294,54 @@ void vsx_unavailable_exception(struct pt_regs *regs)
 	die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
 }
 
+#ifdef CONFIG_PPC64
 void facility_unavailable_exception(struct pt_regs *regs)
 {
 	static char *facility_strings[] = {
-		"FPU",
-		"VMX/VSX",
-		"DSCR",
-		"PMU SPRs",
-		"BHRB",
-		"TM",
-		"AT",
-		"EBB",
-		"TAR",
+		[FSCR_FP_LG] = "FPU",
+		[FSCR_VECVSX_LG] = "VMX/VSX",
+		[FSCR_DSCR_LG] = "DSCR",
+		[FSCR_PM_LG] = "PMU SPRs",
+		[FSCR_BHRB_LG] = "BHRB",
+		[FSCR_TM_LG] = "TM",
+		[FSCR_EBB_LG] = "EBB",
+		[FSCR_TAR_LG] = "TAR",
 	};
-	char *facility, *prefix;
+	char *facility = "unknown";
 	u64 value;
+	u8 status;
+	bool hv;
 
-	if (regs->trap == 0xf60) {
-		value = mfspr(SPRN_FSCR);
-		prefix = "";
-	} else {
+	hv = (regs->trap == 0xf80);
+	if (hv)
 		value = mfspr(SPRN_HFSCR);
-		prefix = "Hypervisor ";
+	else
+		value = mfspr(SPRN_FSCR);
+
+	status = value >> 56;
+	if (status == FSCR_DSCR_LG) {
+		/* User is acessing the DSCR.  Set the inherit bit and allow
+		 * the user to set it directly in future by setting via the
+		 * H/FSCR DSCR bit.
+		 */
+		current->thread.dscr_inherit = 1;
+		if (hv)
+			mtspr(SPRN_HFSCR, value | HFSCR_DSCR);
+		else
+			mtspr(SPRN_FSCR,  value | FSCR_DSCR);
+		return;
 	}
 
-	value = value >> 56;
+	if ((status < ARRAY_SIZE(facility_strings)) &&
+	    facility_strings[status])
+		facility = facility_strings[status];
 
 	/* We restore the interrupt state now */
 	if (!arch_irq_disabled_regs(regs))
 		local_irq_enable();
 
-	if (value < ARRAY_SIZE(facility_strings))
-		facility = facility_strings[value];
-	else
-		facility = "unknown";
-
 	pr_err("%sFacility '%s' unavailable, exception at 0x%lx, MSR=%lx\n",
-		prefix, facility, regs->nip, regs->msr);
+	       hv ? "Hypervisor " : "", facility, regs->nip, regs->msr);
 
 	if (user_mode(regs)) {
 		_exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
@@ -1341,6 +1350,7 @@ void facility_unavailable_exception(struct pt_regs *regs)
 
 	die("Unexpected facility unavailable exception", regs, SIGABRT);
 }
+#endif
 
 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
 

^ permalink raw reply related

* Re: Pull request: scottwood/linux.git next
From: Benjamin Herrenschmidt @ 2013-08-09  6:03 UTC (permalink / raw)
  To: Scott Wood; +Cc: linuxppc-dev
In-Reply-To: <20130808224501.GA8925@home.buserror.net>

On Thu, 2013-08-08 at 17:45 -0500, Scott Wood wrote:
> The following changes since commit 3b2f64d00c46e1e4e9bd0bb9bb12619adac27a4b:
> 
>   Linux 3.11-rc2 (2013-07-21 12:05:29 -0700)
> 
> are available in the git repository at:

Next time, put a little blurb at the head of the pull request giving a
rough highlight, like I do when I send a pull request to Linus.

Thanks !

Cheers,
Ben.

>   git://git.kernel.org/pub/scm/linux/kernel/git/scottwood/linux.git next
> 
> for you to fetch changes up to c8db32c8669f7de05b820ee4934926405af52188:
> 
>   powerpc/e500: Update compilation flags with core specific options (2013-08-07 18:49:44 -0500)
> 
> ----------------------------------------------------------------
> Catalin Udma (2):
>       powerpc/perf: increase the perf HW events to 6
>       powerpc/e500: Update compilation flags with core specific options
> 
> Dongsheng Wang (1):
>       powerpc/mpc85xx: invalidate TLB after hibernation resume
> 
> Haijun.Zhang (2):
>       powerpc/85xx: add P1020RDB-PD platform support
>       powerpc/85xx: add the P1020RDB-PD DTS support
> 
> Hongtao Jia (3):
>       powerpc: Move opcode definitions from kvm/emulate.c to asm/ppc-opcode.h
>       powerpc/85xx: Add machine check handler to fix PCIe erratum on mpc85xx
>       powerpc/msi: Fix compile error on mpc83xx
> 
> Ian Campbell (1):
>       powerpc/fsl-booke: Rename b4qds.dts -> b4qds.dtsi.
> 
> Kevin Hao (3):
>       powerpc/mpc85xx: remove the unneeded pci init functions for corenet ds board
>       powerpc/fsl-pci: fix the unreachable warning message
>       powerpc/fsl-pci: enable SWIOTLB in function setup_pci_atmu
> 
> Laurentiu TUDOR (1):
>       powerpc/85xx: Move ePAPR paravirt initialization earlier
> 
> Lijun Pan (2):
>       powerpc/perf: correct typos in counter enumeration
>       powerpc/perf: add 2 additional performance monitor counters for e6500 core
> 
> Minghuan Lian (3):
>       powerpc/dts: update MSI bindings doc for MPIC v4.3
>       powerpc/dts: add MPIC v4.3 dts node
>       powerpc/fsl_msi: add MSIIR1 support for MPIC v4.3
> 
> Priyanka Jain (1):
>       powerpc/perf: Add e6500 PMU driver
> 
> Wei Yongjun (1):
>       powerpc/fsl_msi: fix error return code in fsl_of_msi_probe()
> 
> Yuanquan Chen (1):
>       powerpc/pci: fix PCI-e check link issue
> 
> Zhenhua Luo (1):
>       powerpc/fsl: Enable CONFIG_DEVTMPFS_MOUNT so /dev can be mounted correctly
> 
>  .../devicetree/bindings/powerpc/fsl/msi-pic.txt    |  53 +++-
>  arch/powerpc/Makefile                              |  18 +-
>  arch/powerpc/boot/dts/b4420qds.dts                 |   2 +-
>  arch/powerpc/boot/dts/b4860qds.dts                 |   2 +-
>  arch/powerpc/boot/dts/{b4qds.dts => b4qds.dtsi}    |   0
>  arch/powerpc/boot/dts/fsl/b4si-post.dtsi           |   2 +-
>  arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi       | 149 +++++++++++
>  arch/powerpc/boot/dts/fsl/t4240si-post.dtsi        |   2 +-
>  arch/powerpc/boot/dts/p1020rdb-pd.dts              | 280 +++++++++++++++++++++
>  arch/powerpc/configs/85xx/p1023rds_defconfig       |   1 +
>  arch/powerpc/configs/corenet32_smp_defconfig       |   1 +
>  arch/powerpc/configs/corenet64_smp_defconfig       |   1 +
>  arch/powerpc/configs/mpc83xx_defconfig             |   1 +
>  arch/powerpc/configs/mpc85xx_defconfig             |   1 +
>  arch/powerpc/configs/mpc85xx_smp_defconfig         |   1 +
>  arch/powerpc/include/asm/epapr_hcalls.h            |   6 +
>  arch/powerpc/include/asm/mpic.h                    |   7 +
>  arch/powerpc/include/asm/perf_event_fsl_emb.h      |   2 +-
>  arch/powerpc/include/asm/ppc-opcode.h              |  47 ++++
>  arch/powerpc/include/asm/reg_fsl_emb.h             |  24 +-
>  arch/powerpc/kernel/cpu_setup_fsl_booke.S          |   2 +-
>  arch/powerpc/kernel/cputable.c                     |   2 +-
>  arch/powerpc/kernel/epapr_paravirt.c               |  28 ++-
>  arch/powerpc/kernel/setup_32.c                     |   4 +-
>  arch/powerpc/kernel/setup_64.c                     |   3 +
>  arch/powerpc/kernel/swsusp_booke.S                 |   8 +
>  arch/powerpc/kernel/traps.c                        |   3 +
>  arch/powerpc/kvm/emulate.c                         |  45 +---
>  arch/powerpc/oprofile/op_model_fsl_emb.c           |  30 +++
>  arch/powerpc/perf/Makefile                         |   2 +-
>  arch/powerpc/perf/core-fsl-emb.c                   |  30 +++
>  arch/powerpc/perf/e6500-pmu.c                      | 121 +++++++++
>  arch/powerpc/platforms/85xx/corenet_ds.c           |   6 -
>  arch/powerpc/platforms/85xx/mpc85xx_rdb.c          |  22 ++
>  arch/powerpc/sysdev/fsl_msi.c                      | 137 +++++++---
>  arch/powerpc/sysdev/fsl_msi.h                      |  10 +-
>  arch/powerpc/sysdev/fsl_pci.c                      | 184 ++++++++++++--
>  arch/powerpc/sysdev/fsl_pci.h                      |   6 +
>  38 files changed, 1088 insertions(+), 155 deletions(-)
>  rename arch/powerpc/boot/dts/{b4qds.dts => b4qds.dtsi} (100%)
>  create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-mpic4.3.dtsi
>  create mode 100644 arch/powerpc/boot/dts/p1020rdb-pd.dts
>  create mode 100644 arch/powerpc/perf/e6500-pmu.c

^ permalink raw reply

* Re: [PATCH 36/63] powerpc: Book 3S MMU little endian support
From: Anton Blanchard @ 2013-08-09  6:08 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20130807042049.GC31007@iris.ozlabs.ibm.com>


Hi Paul,

> On Wed, Aug 07, 2013 at 02:01:53AM +1000, Anton Blanchard wrote:
> 
> > +#ifdef __BIG_ENDIAN__
> >  #define HPTE_LOCK_BIT 3
> > +#else
> > +#define HPTE_LOCK_BIT (63-3)
> > +#endif
> 
> Are you deliberately using a different bit here?  AFAICS you are using
> 0x20 in the 7th byte as the lock bit for LE, whereas we use 0x08 in
> that byte on BE.  Both are software-use bits, so it will still work,
> but is there a rationale for the change?  Or did you mean (56+3)
> rather than (63-3)?

Ouch, nice catch! I got lucky there.

Anton

^ permalink raw reply

* [RFC] powerpc: put the common parts of the ppc64*defconfigs in a Kconfig file
From: Stephen Rothwell @ 2013-08-09  6:24 UTC (permalink / raw)
  To: ppc-dev

[-- Attachment #1: Type: text/plain, Size: 28154 bytes --]

We cannot put the unsetting of config options in the Kconfig file, nor
the integer or string options.

I checked that after this we get the same .config files generated (except
for the addition of the new PPC64_DEFCONFIG* config options.

Any thoughts?
---
 arch/powerpc/Kconfig                  |   2 +
 arch/powerpc/configs/Kconfig          | 295 +++++++++++++++++++++++++++++++++
 arch/powerpc/configs/ppc64_defconfig  | 301 +---------------------------------
 arch/powerpc/configs/ppc64e_defconfig | 297 +--------------------------------
 4 files changed, 302 insertions(+), 593 deletions(-)
 create mode 100644 arch/powerpc/configs/Kconfig

diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 3bf72cd..a95649f 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1020,3 +1020,5 @@ config PPC_LIB_RHEAP
 	bool
 
 source "arch/powerpc/kvm/Kconfig"
+
+source "arch/powerpc/configs/Kconfig"
diff --git a/arch/powerpc/configs/Kconfig b/arch/powerpc/configs/Kconfig
new file mode 100644
index 0000000..05b693c
--- /dev/null
+++ b/arch/powerpc/configs/Kconfig
@@ -0,0 +1,295 @@
+config PPC64_DEFCONFIG_COMMON
+	bool "Common settings for ppc64 defconfigs"
+	select ACENIC_OMIT_TIGON_I
+	select ATA
+	select BLK_DEV_AMD74XX
+	select BLK_DEV_DM
+	select BLK_DEV_FD
+	select BLK_DEV_GENERIC
+	select BLK_DEV_IDECD
+	select BLK_DEV_INITRD
+	select BLK_DEV_IO_TRACE
+	select BLK_DEV_LOOP
+	select BLK_DEV_MD
+	select BLK_DEV_RAM
+	select BLK_DEV_SD
+	select BLK_DEV_SR
+	select BLK_DEV_SR_VENDOR
+	select CGROUPS
+	select CHR_DEV_SG
+	select CHR_DEV_ST
+	select CIFS_POSIX
+	select CIFS_XATTR
+	select CODE_PATCHING_SELFTEST
+	select CPUSETS
+	select CPU_FREQ
+	select CPU_FREQ_GOV_POWERSAVE
+	select CPU_FREQ_GOV_USERSPACE
+	select CRC_T10DIF
+	select CRYPTO_HMAC
+	select DEBUG_KERNEL
+	select DEBUG_MUTEXES
+	select DEBUG_STACKOVERFLOW
+	select DEBUG_STACK_USAGE
+	select DEVTMPFS
+	select DEVTMPFS_MOUNT
+	select E100
+	select E1000
+	select EDAC
+	select EDAC_MM_EDAC
+	select EXT2_FS
+	select EXT2_FS_POSIX_ACL
+	select EXT2_FS_SECURITY
+	select EXT2_FS_XATTR
+	select EXT2_FS_XIP
+	select EXT3_FS
+	select EXT3_FS_POSIX_ACL
+	select EXT3_FS_SECURITY
+	select EXT4_FS
+	select EXT4_FS_POSIX_ACL
+	select EXT4_FS_SECURITY
+	select FB
+	select FB_IBM_GXT4500
+	select FB_MATROX
+	select FB_MATROX_G
+	select FB_MATROX_MILLENIUM
+	select FB_MATROX_MYSTIQUE
+	select FB_OF
+	select FB_RADEON
+	select FIRMWARE_EDID
+	select FRAMEBUFFER_CONSOLE
+	select FTR_FIXUP_SELFTEST
+	select HID_GYRATION
+	select HID_PANTHERLORD
+	select HID_PETALYNX
+	select HID_SAMSUNG
+	select HID_SUNPLUS
+	select HIGH_RES_TIMERS
+	select HOTPLUG_PCI
+	select I2C_AMD8111
+	select I2C_CHARDEV
+	select IDE
+	select IKCONFIG
+	select IKCONFIG_PROC
+	select INET
+	select INPUT_MISC
+	select IP_MULTICAST
+	select IP_PNP
+	select IP_PNP_BOOTP
+	select IP_PNP_DHCP
+	select IRQ_ALL_CPUS
+	select ISO9660_FS
+	select JFS_POSIX_ACL
+	select JFS_SECURITY
+	select LATENCYTOP
+	select LCD_CLASS_DEVICE
+	select LOGO
+	select MAGIC_SYSRQ
+	select MARVELL_PHY
+	select MD
+	select MD_LINEAR
+	select MD_RAID0
+	select MD_RAID1
+	select MODULES
+	select MODULE_SRCVERSION_ALL
+	select MODULE_UNLOAD
+	select MODVERSIONS
+	select MSDOS_FS
+	select MSI_BITMAP_SELFTEST
+	select NETCONSOLE
+	select NETFILTER
+	select NETPOLL_TRAP
+	select NET_IPIP
+	select NFSD_V3_ACL
+	select NFSD_V4
+	select NFS_FS
+	select NFS_V3_ACL
+	select NFS_V4
+	select NF_CONNTRACK_EVENTS
+	select NLS_ASCII
+	select NLS_CODEPAGE_437
+	select NLS_ISO8859_1
+	select NLS_UTF8
+	select NO_HZ
+	select OPROFILE
+	select PACKET
+	select PARTITION_ADVANCED
+	select PCCARD
+	select PCNET32
+	select POSIX_MQUEUE
+	select PPC64
+	select PROC_DEVICETREE
+	select PROC_KCORE
+	select PROFILING
+	select RAW_DRIVER
+	select REISERFS_FS
+	select REISERFS_FS_POSIX_ACL
+	select REISERFS_FS_SECURITY
+	select REISERFS_FS_XATTR
+	select ROOT_NFS
+	select RTC_CLASS
+	select RTC_DRV_DS1307
+	select SATA_SIL24
+	select SATA_SVW
+	select SCHED_TRACER
+	select SCSI_CONSTANTS
+	select SCSI_FC_ATTRS
+	select SCSI_IPR
+	select SCSI_MULTI_LUN
+	select SCSI_SYM53C8XX_2
+	select SERIAL_8250
+	select SERIAL_8250_CONSOLE
+	select SMP
+	select SND_SEQUENCER_OSS
+	select SUNGEM
+	select SYN_COOKIES
+	select SYSVIPC
+	select TASKSTATS
+	select TASK_DELAY_ACCT
+	select TIGON3
+	select TMPFS
+	select TMPFS_POSIX_ACL
+	select UNIX
+	select USB
+	select USB_EHCI_HCD
+	select USB_HIDDEV
+	select USB_OHCI_HCD
+	select VFAT_FS
+	select VORTEX
+	select WINDFARM
+	select XFS_POSIX_ACL
+	select XMON
+
+config PPC64_DEFCONFIG_MODULES_COMMON
+	tristate "Common module settings for ppc64 defconfigs"
+	select AUTOFS4_FS
+	select BINFMT_MISC
+	select BLK_DEV_NBD
+	select BONDING
+	select BROADCOM_PHY
+	select CIFS
+	select CRYPTO_ANUBIS
+	select CRYPTO_BLOWFISH
+	select CRYPTO_CAST6
+	select CRYPTO_KHAZAD
+	select CRYPTO_LZO
+	select CRYPTO_MICHAEL_MIC
+	select CRYPTO_PCBC
+	select CRYPTO_SALSA20
+	select CRYPTO_SERPENT
+	select CRYPTO_TEA
+	select CRYPTO_TEST
+	select CRYPTO_TGR192
+	select CRYPTO_TWOFISH
+	select CRYPTO_WP512
+	select DM_CRYPT
+	select DM_MIRROR
+	select DM_MULTIPATH
+	select DM_SNAPSHOT
+	select DM_ZERO
+	select DUMMY
+	select FB_MATROX_I2C
+	select FB_MATROX_MAVEN
+	select HFSPLUS_FS
+	select HFS_FS
+	select INET_AH
+	select INET_ESP
+	select INET_IPCOMP
+	select INFINIBAND
+	select INFINIBAND_IPOIB
+	select INFINIBAND_ISER
+	select INFINIBAND_MTHCA
+	select INPUT_EVDEV
+	select IP_NF_ARPFILTER
+	select IP_NF_ARPTABLES
+	select IP_NF_ARP_MANGLE
+	select IP_NF_FILTER
+	select IP_NF_IPTABLES
+	select IP_NF_MANGLE
+	select IP_NF_MATCH_AH
+	select IP_NF_MATCH_ECN
+	select IP_NF_MATCH_TTL
+	select IP_NF_RAW
+	select IP_NF_TARGET_CLUSTERIP
+	select IP_NF_TARGET_ECN
+	select IP_NF_TARGET_REJECT
+	select IP_NF_TARGET_TTL
+	select IP_NF_TARGET_ULOG
+	select IXGB
+	select MD_FAULTY
+	select MD_MULTIPATH
+	select NETFILTER_TPROXY
+	select NETFILTER_XT_MATCH_COMMENT
+	select NETFILTER_XT_MATCH_CONNBYTES
+	select NETFILTER_XT_MATCH_CONNLIMIT
+	select NETFILTER_XT_MATCH_CONNMARK
+	select NETFILTER_XT_MATCH_CONNTRACK
+	select NETFILTER_XT_MATCH_DCCP
+	select NETFILTER_XT_MATCH_DSCP
+	select NETFILTER_XT_MATCH_ESP
+	select NETFILTER_XT_MATCH_HASHLIMIT
+	select NETFILTER_XT_MATCH_HELPER
+	select NETFILTER_XT_MATCH_IPRANGE
+	select NETFILTER_XT_MATCH_LENGTH
+	select NETFILTER_XT_MATCH_LIMIT
+	select NETFILTER_XT_MATCH_MAC
+	select NETFILTER_XT_MATCH_MARK
+	select NETFILTER_XT_MATCH_MULTIPORT
+	select NETFILTER_XT_MATCH_OWNER
+	select NETFILTER_XT_MATCH_PKTTYPE
+	select NETFILTER_XT_MATCH_POLICY
+	select NETFILTER_XT_MATCH_QUOTA
+	select NETFILTER_XT_MATCH_RATEEST
+	select NETFILTER_XT_MATCH_REALM
+	select NETFILTER_XT_MATCH_RECENT
+	select NETFILTER_XT_MATCH_SCTP
+	select NETFILTER_XT_MATCH_SOCKET
+	select NETFILTER_XT_MATCH_STATE
+	select NETFILTER_XT_MATCH_STATISTIC
+	select NETFILTER_XT_MATCH_STRING
+	select NETFILTER_XT_MATCH_TCPMSS
+	select NETFILTER_XT_MATCH_U32
+	select NETFILTER_XT_TARGET_CLASSIFY
+	select NETFILTER_XT_TARGET_CONNMARK
+	select NETFILTER_XT_TARGET_DSCP
+	select NETFILTER_XT_TARGET_MARK
+	select NETFILTER_XT_TARGET_NFLOG
+	select NETFILTER_XT_TARGET_NFQUEUE
+	select NETFILTER_XT_TARGET_TCPMSS
+	select NETFILTER_XT_TARGET_TCPOPTSTRIP
+	select NETFILTER_XT_TARGET_TPROXY
+	select NETFILTER_XT_TARGET_TRACE
+	select NET_KEY
+	select NFSD
+	select NF_CONNTRACK
+	select NF_CONNTRACK_AMANDA
+	select NF_CONNTRACK_FTP
+	select NF_CONNTRACK_H323
+	select NF_CONNTRACK_IPV4
+	select NF_CONNTRACK_IRC
+	select NF_CONNTRACK_NETBIOS_NS
+	select NF_CONNTRACK_PPTP
+	select NF_CONNTRACK_SIP
+	select NF_CONNTRACK_TFTP
+	select NF_CT_NETLINK
+	select NF_CT_PROTO_SCTP
+	select PPP
+	select PPPOE
+	select PPP_ASYNC
+	select PPP_BSDCOMP
+	select PPP_DEFLATE
+	select PPP_SYNC_TTY
+	select SCSI_LPFC
+	select SND
+	select SND_MIXER_OSS
+	select SND_PCM_OSS
+	select SND_SEQUENCER
+	select SND_SEQ_DUMMY
+	select SOUND
+	select TUN
+	select UDF_FS
+	select USB_APPLEDISPLAY
+	select USB_STORAGE
+	select VIDEO_OUTPUT_CONTROL
+	select XFRM_USER
+	select XFS_FS
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 0e8cfd0..87e7a19 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -1,31 +1,9 @@
-CONFIG_PPC64=y
 CONFIG_ALTIVEC=y
 CONFIG_VSX=y
-CONFIG_SMP=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
 CONFIG_IRQ_DOMAIN_DEBUG=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_CGROUPS=y
-CONFIG_CPUSETS=y
-CONFIG_BLK_DEV_INITRD=y
 # CONFIG_COMPAT_BRK is not set
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
 CONFIG_KPROBES=y
 CONFIG_JUMP_LABEL=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_EFI_PARTITION=y
 CONFIG_PPC_SPLPAR=y
 CONFIG_SCANLOG=m
 CONFIG_PPC_SMLPAR=y
@@ -43,135 +21,23 @@ CONFIG_PPC_CELLEB=y
 CONFIG_PPC_CELL_QPACE=y
 CONFIG_RTAS_FLASH=m
 CONFIG_IBMEBUS=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
 CONFIG_CPU_FREQ_PMAC64=y
 CONFIG_HZ_100=y
-CONFIG_BINFMT_MISC=m
 CONFIG_PPC_TRANSACTIONAL_MEM=y
-CONFIG_HOTPLUG_CPU=y
 CONFIG_KEXEC=y
-CONFIG_IRQ_ALL_CPUS=y
 CONFIG_MEMORY_HOTREMOVE=y
 CONFIG_SCHED_SMT=y
 CONFIG_PPC_DENORMALISATION=y
-CONFIG_PCCARD=y
 CONFIG_ELECTRA_CF=y
-CONFIG_HOTPLUG_PCI=y
 CONFIG_HOTPLUG_PCI_RPA=m
 CONFIG_HOTPLUG_PCI_RPA_DLPAR=m
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
-CONFIG_NET_KEY=m
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_NET_IPIP=y
-CONFIG_SYN_COOKIES=y
-CONFIG_INET_AH=m
-CONFIG_INET_ESP=m
-CONFIG_INET_IPCOMP=m
 # CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NETFILTER_TPROXY=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_DSCP=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_TPROXY=m
-CONFIG_NETFILTER_XT_TARGET_TRACE=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_OWNER=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_RATEEST=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_RECENT=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_SOCKET=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
 CONFIG_BPF_JIT=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_FD=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_AMD74XX=y
 CONFIG_BLK_DEV_CELLEB=y
 CONFIG_BLK_DEV_IDE_PMAC=y
 CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_FC_ATTRS=y
 CONFIG_SCSI_CXGB3_ISCSI=m
 CONFIG_SCSI_CXGB4_ISCSI=m
 CONFIG_SCSI_BNX2_ISCSI=m
@@ -179,82 +45,38 @@ CONFIG_BE2ISCSI=m
 CONFIG_SCSI_MPT2SAS=m
 CONFIG_SCSI_IBMVSCSI=y
 CONFIG_SCSI_IBMVFC=m
-CONFIG_SCSI_SYM53C8XX_2=y
 CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
-CONFIG_SCSI_IPR=y
 CONFIG_SCSI_QLA_FC=m
 CONFIG_SCSI_QLA_ISCSI=m
-CONFIG_SCSI_LPFC=m
-CONFIG_ATA=y
-CONFIG_SATA_SIL24=y
-CONFIG_SATA_SVW=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=y
-CONFIG_MD_LINEAR=y
-CONFIG_MD_RAID0=y
-CONFIG_MD_RAID1=y
 CONFIG_MD_RAID10=m
 CONFIG_MD_RAID456=m
-CONFIG_MD_MULTIPATH=m
-CONFIG_MD_FAULTY=m
-CONFIG_BLK_DEV_DM=y
-CONFIG_DM_CRYPT=m
-CONFIG_DM_SNAPSHOT=m
-CONFIG_DM_MIRROR=m
-CONFIG_DM_ZERO=m
-CONFIG_DM_MULTIPATH=m
 CONFIG_ADB_PMU=y
 CONFIG_PMAC_SMU=y
 CONFIG_THERM_PM72=y
-CONFIG_WINDFARM=y
 CONFIG_WINDFARM_PM81=y
 CONFIG_WINDFARM_PM91=y
 CONFIG_WINDFARM_PM112=y
 CONFIG_WINDFARM_PM121=y
-CONFIG_BONDING=m
-CONFIG_DUMMY=m
-CONFIG_NETCONSOLE=y
-CONFIG_NETPOLL_TRAP=y
-CONFIG_TUN=m
-CONFIG_VORTEX=y
+CONFIG_VHOST_NET=m
 CONFIG_ACENIC=m
-CONFIG_ACENIC_OMIT_TIGON_I=y
-CONFIG_PCNET32=y
-CONFIG_TIGON3=y
 CONFIG_CHELSIO_T1=m
 CONFIG_BE2NET=m
 CONFIG_S2IO=m
 CONFIG_IBMVETH=m
 CONFIG_EHEA=m
-CONFIG_E100=y
-CONFIG_E1000=y
 CONFIG_E1000E=y
-CONFIG_IXGB=m
 CONFIG_IXGBE=m
 CONFIG_MLX4_EN=m
 CONFIG_MYRI10GE=m
 CONFIG_PASEMI_MAC=y
 CONFIG_QLGE=m
 CONFIG_NETXEN_NIC=m
-CONFIG_SUNGEM=y
 CONFIG_GELIC_NET=m
 CONFIG_GELIC_WIRELESS=y
 CONFIG_SPIDER_NET=m
-CONFIG_MARVELL_PHY=y
-CONFIG_BROADCOM_PHY=m
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_MISC=y
 CONFIG_INPUT_PCSPKR=m
 # CONFIG_SERIO_SERPORT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
 CONFIG_SERIAL_ICOM=m
 CONFIG_SERIAL_TXX9_CONSOLE=y
 CONFIG_SERIAL_JSM=m
@@ -263,163 +85,46 @@ CONFIG_HVC_RTAS=y
 CONFIG_HVC_BEAT=y
 CONFIG_HVCS=m
 CONFIG_IBM_BSR=m
-CONFIG_RAW_DRIVER=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_AMD8111=y
 CONFIG_I2C_PASEMI=y
-CONFIG_VIDEO_OUTPUT_CONTROL=m
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_OF=y
-CONFIG_FB_MATROX=y
-CONFIG_FB_MATROX_MILLENIUM=y
-CONFIG_FB_MATROX_MYSTIQUE=y
-CONFIG_FB_MATROX_G=y
-CONFIG_FB_MATROX_I2C=m
-CONFIG_FB_MATROX_MAVEN=m
-CONFIG_FB_RADEON=y
-CONFIG_FB_IBM_GXT4500=y
 CONFIG_FB_PS3=m
-CONFIG_LCD_CLASS_DEVICE=y
 # CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_SEQUENCER=m
-CONFIG_SND_SEQ_DUMMY=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_SEQUENCER_OSS=y
 CONFIG_SND_POWERMAC=m
 CONFIG_SND_AOA=m
 CONFIG_SND_AOA_FABRIC_LAYOUT=m
 CONFIG_SND_AOA_ONYX=m
 CONFIG_SND_AOA_TAS=m
 CONFIG_SND_AOA_TOONIE=m
-CONFIG_HID_GYRATION=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
-CONFIG_USB_HIDDEV=y
-CONFIG_USB=y
 CONFIG_USB_MON=m
-CONFIG_USB_EHCI_HCD=y
 # CONFIG_USB_EHCI_HCD_PPC_OF is not set
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=m
-CONFIG_USB_APPLEDISPLAY=m
-CONFIG_INFINIBAND=m
 CONFIG_INFINIBAND_USER_MAD=m
 CONFIG_INFINIBAND_USER_ACCESS=m
-CONFIG_INFINIBAND_MTHCA=m
 CONFIG_INFINIBAND_EHCA=m
 CONFIG_INFINIBAND_CXGB3=m
 CONFIG_INFINIBAND_CXGB4=m
 CONFIG_MLX4_INFINIBAND=m
-CONFIG_INFINIBAND_IPOIB=m
 CONFIG_INFINIBAND_IPOIB_CM=y
 CONFIG_INFINIBAND_SRP=m
-CONFIG_INFINIBAND_ISER=m
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=y
 CONFIG_EDAC_PASEMI=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_REISERFS_FS=y
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
 CONFIG_JFS_FS=m
-CONFIG_JFS_POSIX_ACL=y
-CONFIG_JFS_SECURITY=y
-CONFIG_XFS_FS=m
-CONFIG_XFS_POSIX_ACL=y
 CONFIG_BTRFS_FS=m
 CONFIG_BTRFS_FS_POSIX_ACL=y
 CONFIG_NILFS2_FS=m
-CONFIG_AUTOFS4_FS=m
 CONFIG_FUSE_FS=m
-CONFIG_ISO9660_FS=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
 CONFIG_HUGETLBFS=y
-CONFIG_HFS_FS=m
-CONFIG_HFSPLUS_FS=m
 CONFIG_CRAMFS=m
 CONFIG_SQUASHFS=m
 CONFIG_SQUASHFS_XATTR=y
 CONFIG_SQUASHFS_LZO=y
 CONFIG_SQUASHFS_XZ=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3_ACL=y
-CONFIG_NFSD_V4=y
-CONFIG_CIFS=m
-CONFIG_CIFS_XATTR=y
-CONFIG_CIFS_POSIX=y
 CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=y
-CONFIG_CRC_T10DIF=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
 CONFIG_LOCKUP_DETECTOR=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_STACK_USAGE=y
-CONFIG_LATENCYTOP=y
-CONFIG_SCHED_TRACER=y
-CONFIG_BLK_DEV_IO_TRACE=y
-CONFIG_DEBUG_STACKOVERFLOW=y
-CONFIG_CODE_PATCHING_SELFTEST=y
-CONFIG_FTR_FIXUP_SELFTEST=y
-CONFIG_MSI_BITMAP_SELFTEST=y
-CONFIG_XMON=y
 CONFIG_BOOTX_TEXT=y
 CONFIG_PPC_EARLY_DEBUG=y
-CONFIG_PPC_EARLY_DEBUG_BOOTX=y
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_TEST=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MICHAEL_MIC=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_SALSA20=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_LZO=m
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 CONFIG_CRYPTO_DEV_NX=y
 CONFIG_CRYPTO_DEV_NX_ENCRYPT=m
 CONFIG_VIRTUALIZATION=y
 CONFIG_KVM_BOOK3S_64=m
 CONFIG_KVM_BOOK3S_64_HV=y
-CONFIG_VHOST_NET=m
+CONFIG_PPC64_DEFCONFIG_COMMON=y
+CONFIG_PPC64_DEFCONFIG_MODULES_COMMON=m
diff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig
index 0085dc4..a8a327d 100644
--- a/arch/powerpc/configs/ppc64e_defconfig
+++ b/arch/powerpc/configs/ppc64e_defconfig
@@ -1,337 +1,44 @@
-CONFIG_PPC64=y
 CONFIG_PPC_BOOK3E_64=y
-CONFIG_SMP=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
-CONFIG_TASKSTATS=y
-CONFIG_TASK_DELAY_ACCT=y
-CONFIG_IKCONFIG=y
-CONFIG_IKCONFIG_PROC=y
-CONFIG_CGROUPS=y
-CONFIG_CPUSETS=y
-CONFIG_BLK_DEV_INITRD=y
 # CONFIG_COMPAT_BRK is not set
-CONFIG_PROFILING=y
-CONFIG_OPROFILE=y
-CONFIG_MODULES=y
-CONFIG_MODULE_UNLOAD=y
-CONFIG_MODVERSIONS=y
-CONFIG_MODULE_SRCVERSION_ALL=y
-CONFIG_PARTITION_ADVANCED=y
 CONFIG_MAC_PARTITION=y
-CONFIG_EFI_PARTITION=y
 CONFIG_P5020_DS=y
-CONFIG_CPU_FREQ=y
-CONFIG_CPU_FREQ_GOV_POWERSAVE=y
-CONFIG_CPU_FREQ_GOV_USERSPACE=y
-CONFIG_BINFMT_MISC=m
-CONFIG_IRQ_ALL_CPUS=y
 CONFIG_SPARSEMEM_MANUAL=y
 CONFIG_PCI_MSI=y
-CONFIG_PCCARD=y
-CONFIG_HOTPLUG_PCI=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=m
-CONFIG_NET_KEY=m
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_NET_IPIP=y
-CONFIG_SYN_COOKIES=y
-CONFIG_INET_AH=m
-CONFIG_INET_ESP=m
-CONFIG_INET_IPCOMP=m
 # CONFIG_IPV6 is not set
-CONFIG_NETFILTER=y
-CONFIG_NF_CONNTRACK=m
-CONFIG_NF_CONNTRACK_EVENTS=y
-CONFIG_NF_CT_PROTO_SCTP=m
-CONFIG_NF_CONNTRACK_AMANDA=m
-CONFIG_NF_CONNTRACK_FTP=m
-CONFIG_NF_CONNTRACK_H323=m
-CONFIG_NF_CONNTRACK_IRC=m
-CONFIG_NF_CONNTRACK_NETBIOS_NS=m
-CONFIG_NF_CONNTRACK_PPTP=m
-CONFIG_NF_CONNTRACK_SIP=m
-CONFIG_NF_CONNTRACK_TFTP=m
-CONFIG_NF_CT_NETLINK=m
-CONFIG_NETFILTER_TPROXY=m
-CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
-CONFIG_NETFILTER_XT_TARGET_CONNMARK=m
-CONFIG_NETFILTER_XT_TARGET_DSCP=m
-CONFIG_NETFILTER_XT_TARGET_MARK=m
-CONFIG_NETFILTER_XT_TARGET_NFLOG=m
-CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m
-CONFIG_NETFILTER_XT_TARGET_TPROXY=m
-CONFIG_NETFILTER_XT_TARGET_TRACE=m
-CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
-CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m
-CONFIG_NETFILTER_XT_MATCH_COMMENT=m
-CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m
-CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_CONNMARK=m
-CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
-CONFIG_NETFILTER_XT_MATCH_DCCP=m
-CONFIG_NETFILTER_XT_MATCH_DSCP=m
-CONFIG_NETFILTER_XT_MATCH_ESP=m
-CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
-CONFIG_NETFILTER_XT_MATCH_HELPER=m
-CONFIG_NETFILTER_XT_MATCH_IPRANGE=m
-CONFIG_NETFILTER_XT_MATCH_LENGTH=m
-CONFIG_NETFILTER_XT_MATCH_LIMIT=m
-CONFIG_NETFILTER_XT_MATCH_MAC=m
-CONFIG_NETFILTER_XT_MATCH_MARK=m
-CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
-CONFIG_NETFILTER_XT_MATCH_OWNER=m
-CONFIG_NETFILTER_XT_MATCH_POLICY=m
-CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
-CONFIG_NETFILTER_XT_MATCH_QUOTA=m
-CONFIG_NETFILTER_XT_MATCH_RATEEST=m
-CONFIG_NETFILTER_XT_MATCH_REALM=m
-CONFIG_NETFILTER_XT_MATCH_RECENT=m
-CONFIG_NETFILTER_XT_MATCH_SCTP=m
-CONFIG_NETFILTER_XT_MATCH_SOCKET=m
-CONFIG_NETFILTER_XT_MATCH_STATE=m
-CONFIG_NETFILTER_XT_MATCH_STATISTIC=m
-CONFIG_NETFILTER_XT_MATCH_STRING=m
-CONFIG_NETFILTER_XT_MATCH_TCPMSS=m
-CONFIG_NETFILTER_XT_MATCH_U32=m
-CONFIG_NF_CONNTRACK_IPV4=m
-CONFIG_IP_NF_QUEUE=m
-CONFIG_IP_NF_IPTABLES=m
-CONFIG_IP_NF_MATCH_AH=m
-CONFIG_IP_NF_MATCH_ECN=m
-CONFIG_IP_NF_MATCH_TTL=m
-CONFIG_IP_NF_FILTER=m
-CONFIG_IP_NF_TARGET_REJECT=m
-CONFIG_IP_NF_TARGET_ULOG=m
-CONFIG_IP_NF_MANGLE=m
-CONFIG_IP_NF_TARGET_CLUSTERIP=m
-CONFIG_IP_NF_TARGET_ECN=m
-CONFIG_IP_NF_TARGET_TTL=m
-CONFIG_IP_NF_RAW=m
-CONFIG_IP_NF_ARPTABLES=m
-CONFIG_IP_NF_ARPFILTER=m
-CONFIG_IP_NF_ARP_MANGLE=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-CONFIG_DEVTMPFS=y
-CONFIG_DEVTMPFS_MOUNT=y
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_FD=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_NBD=m
-CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_AMD74XX=y
-CONFIG_BLK_DEV_SD=y
-CONFIG_CHR_DEV_ST=y
-CONFIG_BLK_DEV_SR=y
-CONFIG_BLK_DEV_SR_VENDOR=y
-CONFIG_CHR_DEV_SG=y
-CONFIG_SCSI_MULTI_LUN=y
-CONFIG_SCSI_CONSTANTS=y
-CONFIG_SCSI_FC_ATTRS=y
 CONFIG_SCSI_SRP_ATTRS=y
-CONFIG_SCSI_SYM53C8XX_2=y
 CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
-CONFIG_SCSI_IPR=y
-CONFIG_SCSI_LPFC=m
 CONFIG_SCSI_DEBUG=m
-CONFIG_ATA=y
-CONFIG_SATA_SIL24=y
-CONFIG_SATA_SVW=y
-CONFIG_MD=y
-CONFIG_BLK_DEV_MD=y
-CONFIG_MD_LINEAR=y
-CONFIG_MD_RAID0=y
-CONFIG_MD_RAID1=y
 CONFIG_MD_RAID10=y
 CONFIG_MD_RAID456=y
-CONFIG_MD_MULTIPATH=m
-CONFIG_MD_FAULTY=m
-CONFIG_BLK_DEV_DM=y
-CONFIG_DM_CRYPT=m
-CONFIG_DM_SNAPSHOT=m
-CONFIG_DM_MIRROR=m
-CONFIG_DM_ZERO=m
-CONFIG_DM_MULTIPATH=m
 CONFIG_MACINTOSH_DRIVERS=y
-CONFIG_WINDFARM=y
 CONFIG_NETDEVICES=y
-CONFIG_BONDING=m
-CONFIG_DUMMY=m
-CONFIG_NETCONSOLE=y
-CONFIG_NETPOLL_TRAP=y
-CONFIG_TUN=m
-CONFIG_VORTEX=y
 CONFIG_ACENIC=y
-CONFIG_ACENIC_OMIT_TIGON_I=y
-CONFIG_PCNET32=y
-CONFIG_TIGON3=y
-CONFIG_E100=y
-CONFIG_E1000=y
-CONFIG_IXGB=m
-CONFIG_SUNGEM=y
-CONFIG_MARVELL_PHY=y
-CONFIG_BROADCOM_PHY=m
-CONFIG_PPP=m
-CONFIG_PPP_BSDCOMP=m
-CONFIG_PPP_DEFLATE=m
-CONFIG_PPPOE=m
-CONFIG_PPP_ASYNC=m
-CONFIG_PPP_SYNC_TTY=m
 # CONFIG_INPUT_MOUSEDEV_PSAUX is not set
-CONFIG_INPUT_EVDEV=m
-CONFIG_INPUT_MISC=y
 # CONFIG_SERIO_SERPORT is not set
 CONFIG_VT_HW_CONSOLE_BINDING=y
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
 # CONFIG_HW_RANDOM is not set
-CONFIG_RAW_DRIVER=y
-CONFIG_I2C_CHARDEV=y
-CONFIG_I2C_AMD8111=y
-CONFIG_VIDEO_OUTPUT_CONTROL=m
-CONFIG_FB=y
-CONFIG_FIRMWARE_EDID=y
-CONFIG_FB_OF=y
-CONFIG_FB_MATROX=y
-CONFIG_FB_MATROX_MILLENIUM=y
-CONFIG_FB_MATROX_MYSTIQUE=y
-CONFIG_FB_MATROX_G=y
-CONFIG_FB_MATROX_I2C=m
-CONFIG_FB_MATROX_MAVEN=m
-CONFIG_FB_RADEON=y
-CONFIG_FB_IBM_GXT4500=y
-CONFIG_LCD_CLASS_DEVICE=y
 # CONFIG_VGA_CONSOLE is not set
-CONFIG_FRAMEBUFFER_CONSOLE=y
-CONFIG_LOGO=y
-CONFIG_SOUND=m
-CONFIG_SND=m
-CONFIG_SND_SEQUENCER=m
-CONFIG_SND_SEQ_DUMMY=m
-CONFIG_SND_MIXER_OSS=m
-CONFIG_SND_PCM_OSS=m
-CONFIG_SND_SEQUENCER_OSS=y
 CONFIG_HID_DRAGONRISE=y
-CONFIG_HID_GYRATION=y
 CONFIG_HID_TWINHAN=y
 CONFIG_HID_NTRIG=y
-CONFIG_HID_PANTHERLORD=y
-CONFIG_HID_PETALYNX=y
-CONFIG_HID_SAMSUNG=y
-CONFIG_HID_SONY=y
-CONFIG_HID_SUNPLUS=y
 CONFIG_HID_GREENASIA=y
 CONFIG_HID_SMARTJOYPLUS=y
 CONFIG_HID_TOPSEED=y
 CONFIG_HID_THRUSTMASTER=y
 CONFIG_HID_ZEROPLUS=y
-CONFIG_USB_HIDDEV=y
-CONFIG_USB=y
-CONFIG_USB_EHCI_HCD=y
 # CONFIG_USB_EHCI_HCD_PPC_OF is not set
-CONFIG_USB_OHCI_HCD=y
-CONFIG_USB_STORAGE=m
-CONFIG_USB_APPLEDISPLAY=m
-CONFIG_INFINIBAND=m
-CONFIG_INFINIBAND_MTHCA=m
-CONFIG_INFINIBAND_IPOIB=m
-CONFIG_INFINIBAND_ISER=m
-CONFIG_EDAC=y
-CONFIG_EDAC_MM_EDAC=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_DS1307=y
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT2_FS_POSIX_ACL=y
-CONFIG_EXT2_FS_SECURITY=y
-CONFIG_EXT2_FS_XIP=y
-CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_EXT3_FS_POSIX_ACL=y
-CONFIG_EXT3_FS_SECURITY=y
-CONFIG_EXT4_FS=y
-CONFIG_EXT4_FS_POSIX_ACL=y
-CONFIG_EXT4_FS_SECURITY=y
-CONFIG_REISERFS_FS=y
-CONFIG_REISERFS_FS_XATTR=y
-CONFIG_REISERFS_FS_POSIX_ACL=y
-CONFIG_REISERFS_FS_SECURITY=y
 CONFIG_JFS_FS=y
-CONFIG_JFS_POSIX_ACL=y
-CONFIG_JFS_SECURITY=y
-CONFIG_XFS_FS=m
-CONFIG_XFS_POSIX_ACL=y
-CONFIG_AUTOFS4_FS=m
-CONFIG_ISO9660_FS=y
-CONFIG_UDF_FS=m
-CONFIG_MSDOS_FS=y
-CONFIG_VFAT_FS=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_TMPFS_POSIX_ACL=y
-CONFIG_HFS_FS=m
-CONFIG_HFSPLUS_FS=m
 CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3_ACL=y
-CONFIG_NFS_V4=y
-CONFIG_ROOT_NFS=y
-CONFIG_NFSD=m
-CONFIG_NFSD_V3_ACL=y
-CONFIG_NFSD_V4=y
-CONFIG_CIFS=m
-CONFIG_CIFS_XATTR=y
-CONFIG_CIFS_POSIX=y
 CONFIG_NLS_DEFAULT="utf8"
-CONFIG_NLS_CODEPAGE_437=y
-CONFIG_NLS_ASCII=y
-CONFIG_NLS_ISO8859_1=y
-CONFIG_NLS_UTF8=y
-CONFIG_CRC_T10DIF=y
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEBUG_MUTEXES=y
-CONFIG_DEBUG_STACK_USAGE=y
-CONFIG_LATENCYTOP=y
 CONFIG_IRQSOFF_TRACER=y
-CONFIG_SCHED_TRACER=y
-CONFIG_BLK_DEV_IO_TRACE=y
-CONFIG_DEBUG_STACKOVERFLOW=y
-CONFIG_CODE_PATCHING_SELFTEST=y
-CONFIG_FTR_FIXUP_SELFTEST=y
-CONFIG_MSI_BITMAP_SELFTEST=y
-CONFIG_XMON=y
-CONFIG_CRYPTO_NULL=m
-CONFIG_CRYPTO_TEST=m
 CONFIG_CRYPTO_CCM=m
 CONFIG_CRYPTO_GCM=m
-CONFIG_CRYPTO_PCBC=m
-CONFIG_CRYPTO_HMAC=y
-CONFIG_CRYPTO_MICHAEL_MIC=m
 CONFIG_CRYPTO_SHA512=m
-CONFIG_CRYPTO_TGR192=m
-CONFIG_CRYPTO_WP512=m
-CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_BLOWFISH=m
-CONFIG_CRYPTO_CAST6=m
-CONFIG_CRYPTO_KHAZAD=m
-CONFIG_CRYPTO_SALSA20=m
-CONFIG_CRYPTO_SERPENT=m
-CONFIG_CRYPTO_TEA=m
-CONFIG_CRYPTO_TWOFISH=m
-CONFIG_CRYPTO_LZO=m
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
+CONFIG_PPC64_DEFCONFIG_COMMON=y
+CONFIG_PPC64_DEFCONFIG_MODULES_COMMON=m
-- 
1.8.4.rc0

[-- Attachment #2: Type: application/pgp-signature, Size: 836 bytes --]

^ permalink raw reply related

* Re: [PATCH v2] drivers/crypto/nx: saves chaining value from co-processor
From: Benjamin Herrenschmidt @ 2013-08-09  6:25 UTC (permalink / raw)
  To: Fionnuala Gunter
  Cc: herbert, mhcerri, linuxppc-dev, linux-kernel, linux-crypto
In-Reply-To: <1375917350.16050.14.camel@what-is-leg>

On Wed, 2013-08-07 at 18:15 -0500, Fionnuala Gunter wrote:
> This patch fixes a bug that is triggered when cts(cbc(aes)) is used with
> nx-crypto driver on input larger than 32 bytes.
> 
> The chaining value from co-processor was not being saved. This value is
> needed because it is used as the IV by cts(cbc(aes)).
> 
> Signed-off-by: Fionnuala Gunter <fin@linux.vnet.ibm.com>
> Reviewed-by: Marcelo Cerri <mhcerri@linux.vnet.ibm.com>

Herbert, I assume you will handle this along with all the other NX fixes
and I can safely take them out of linuxppc patchwork ?

Cheers,
Ben.

> ---
> v2. changed signed-off-by to reviewed-by and added more details to
> description
> 
> This bug appeared in the original submission (v3.5)
> ---
>  drivers/crypto/nx/nx-aes-cbc.c |    1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/drivers/crypto/nx/nx-aes-cbc.c
> b/drivers/crypto/nx/nx-aes-cbc.c
> index 35d483f..a2f99a9 100644
> --- a/drivers/crypto/nx/nx-aes-cbc.c
> +++ b/drivers/crypto/nx/nx-aes-cbc.c
> @@ -95,6 +95,7 @@ static int cbc_aes_nx_crypt(struct blkcipher_desc
> *desc,
>         if (rc)
>                 goto out;
> 
> +       memcpy(desc->info, csbcpb->cpb.aes_cbc.cv, AES_BLOCK_SIZE);
>         atomic_inc(&(nx_ctx->stats->aes_ops));
>         atomic64_add(csbcpb->csb.processed_byte_count,
>                      &(nx_ctx->stats->aes_bytes));

^ permalink raw reply

* Re: [RFC] powerpc: put the common parts of the ppc64*defconfigs in a Kconfig file
From: Michael Neuling @ 2013-08-09  6:28 UTC (permalink / raw)
  To: Stephen Rothwell; +Cc: ppc-dev
In-Reply-To: <20130809162426.ecdb5b034047db309ebd2b45@canb.auug.org.au>

Stephen Rothwell <sfr@canb.auug.org.au> wrote:

> We cannot put the unsetting of config options in the Kconfig file, nor
> the integer or string options.
> 
> I checked that after this we get the same .config files generated (except
> for the addition of the new PPC64_DEFCONFIG* config options.
> 
> Any thoughts?

+1

Mikey

^ permalink raw reply

* Re: [PATCH v2 0/2] drivers/crypto/nx: fixes when input data is too large
From: Herbert Xu @ 2013-08-09  6:42 UTC (permalink / raw)
  To: Marcelo Cerri; +Cc: linuxppc-dev, linux-kernel, linux-crypto
In-Reply-To: <1375445392-16237-1-git-send-email-mhcerri@linux.vnet.ibm.com>

On Fri, Aug 02, 2013 at 12:09:50PM +0000, Marcelo Cerri wrote:
> This series of patches fixes two bugs that are triggered when the input data is
> too large. The first one is caused by the miscalculation of physical addresses
> and the second one by some limits that the co-processor has to the input data.
> 
> Changes in v2:
>         * Replace Signed-Off-By tags with Reviewed-By tags where it is
> 	  appropriate.
> 
> Marcelo Cerri (2):
>   drivers/crypto/nx: fix physical addresses added to sg lists
>   drivers/crypto/nx: fix limits to sg lists for SHA-2

Both patches applied.  Thanks!
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply

* Re: [PATCH v2] drivers/crypto/nx: saves chaining value from co-processor
From: Herbert Xu @ 2013-08-09  6:43 UTC (permalink / raw)
  To: Fionnuala Gunter; +Cc: mhcerri, linuxppc-dev, linux-kernel, linux-crypto
In-Reply-To: <1375917350.16050.14.camel@what-is-leg>

On Wed, Aug 07, 2013 at 06:15:50PM -0500, Fionnuala Gunter wrote:
> This patch fixes a bug that is triggered when cts(cbc(aes)) is used with
> nx-crypto driver on input larger than 32 bytes.
> 
> The chaining value from co-processor was not being saved. This value is
> needed because it is used as the IV by cts(cbc(aes)).
> 
> Signed-off-by: Fionnuala Gunter <fin@linux.vnet.ibm.com>
> Reviewed-by: Marcelo Cerri <mhcerri@linux.vnet.ibm.com>
> ---
> v2. changed signed-off-by to reviewed-by and added more details to
> description
> 
> This bug appeared in the original submission (v3.5)

Patch applied.  However your patch was totally white-space damaged.
I've fixed it this time, but please fix this in your future
submissions.
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply

* Re: [PATCH v2] drivers/crypto/nx: saves chaining value from co-processor
From: Herbert Xu @ 2013-08-09  6:30 UTC (permalink / raw)
  To: Benjamin Herrenschmidt
  Cc: Fionnuala Gunter, mhcerri, linuxppc-dev, linux-kernel,
	linux-crypto
In-Reply-To: <1376029504.32100.16.camel@pasglop>

On Fri, Aug 09, 2013 at 04:25:04PM +1000, Benjamin Herrenschmidt wrote:
> On Wed, 2013-08-07 at 18:15 -0500, Fionnuala Gunter wrote:
> > This patch fixes a bug that is triggered when cts(cbc(aes)) is used with
> > nx-crypto driver on input larger than 32 bytes.
> > 
> > The chaining value from co-processor was not being saved. This value is
> > needed because it is used as the IV by cts(cbc(aes)).
> > 
> > Signed-off-by: Fionnuala Gunter <fin@linux.vnet.ibm.com>
> > Reviewed-by: Marcelo Cerri <mhcerri@linux.vnet.ibm.com>
> 
> Herbert, I assume you will handle this along with all the other NX fixes
> and I can safely take them out of linuxppc patchwork ?

Yes of course.

Thanks,
-- 
Email: Herbert Xu <herbert@gondor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

^ permalink raw reply

* Re: [PATCH 3/8] Add all memory via sysfs probe interface at once
From: Benjamin Herrenschmidt @ 2013-08-09  7:16 UTC (permalink / raw)
  To: Nathan Fontenot
  Cc: Greg Kroah-Hartman, LKML, linux-mm, isimatu.yasuaki, linuxppc-dev
In-Reply-To: <52016047.5060903@linux.vnet.ibm.com>

On Tue, 2013-08-06 at 15:44 -0500, Nathan Fontenot wrote:
> I am planning on pulling the first two patches and sending them out
> separate from the patch set since they are really independent of the
> rest of the patch series.
> 
> The remaining code I will send out for review and inclusion in
> linux-next so it can have the proper test time as you mentioned.

Ping ? :-)

Cheers,
Ben.

^ permalink raw reply

* Re: [PATCH] powerpc: Use ibm, chip-id property to compute cpu_core_mask if available
From: Vasant Hegde @ 2013-08-09  7:22 UTC (permalink / raw)
  To: Paul Mackerras; +Cc: linuxppc-dev
In-Reply-To: <20130704030506.GA2396@iris.ozlabs.ibm.com>

On 07/04/2013 08:35 AM, Paul Mackerras wrote:
> Some systems have an ibm,chip-id property in the cpu nodes in the
> device tree.  On these systems, we now use that to compute the
> cpu_core_mask (i.e. the set of core siblings) rather than looking
> at cache properties.
>

Paul,

I wanted to test this patch but not able to apply this patch on top of Linux 
tree. Looks like I'm missing traverse_core_siblings() related patch. I searched 
in ppc mailing list and couldn't figure out.

Can you point me to related patch?

-Vasant


> Signed-off-by: Paul Mackerras <paulus@samba.org>
> ---
> diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
> index b72d8c9..3b7a118 100644
> --- a/arch/powerpc/kernel/smp.c
> +++ b/arch/powerpc/kernel/smp.c
> @@ -587,6 +587,32 @@ int cpu_first_thread_of_core(int core)
>   }
>   EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
>
> +static void traverse_siblings_chip_id(int cpu, int add, int chipid)
> +{
> +	const struct cpumask *mask;
> +	struct device_node *np;
> +	int i, plen;
> +	const int *prop;
> +
> +	mask = add ? cpu_online_mask : cpu_present_mask;
> +	for_each_cpu(i, mask) {
> +		np = of_get_cpu_node(i, NULL);
> +		if (!np)
> +			continue;
> +		prop = of_get_property(np, "ibm,chip-id", &plen);
> +		if (prop && plen == sizeof(int) && *prop == chipid) {
> +			if (add) {
> +				cpumask_set_cpu(cpu, cpu_core_mask(i));
> +				cpumask_set_cpu(i, cpu_core_mask(cpu));
> +			} else {
> +				cpumask_clear_cpu(cpu, cpu_core_mask(i));
> +				cpumask_clear_cpu(i, cpu_core_mask(cpu));
> +			}
> +		}
> +		of_node_put(np);
> +	}
> +}
> +
>   /* Must be called when no change can occur to cpu_present_mask,
>    * i.e. during cpu online or offline.
>    */
> @@ -611,14 +637,29 @@ static struct device_node *cpu_to_l2cache(int cpu)
>
>   static void traverse_core_siblings(int cpu, int add)
>   {
> -	struct device_node *l2_cache;
> +	struct device_node *l2_cache, *np;
>   	const struct cpumask *mask;
> -	int i;
> +	int i, chip, plen;
> +	const int *prop;
> +
> +	/* First see if we have ibm,chip-id properties in cpu nodes */
> +	np = of_get_cpu_node(cpu, NULL);
> +	if (np) {
> +		chip = -1;
> +		prop = of_get_property(np, "ibm,chip-id", &plen);
> +		if (prop && plen == sizeof(int))
> +			chip = *(int *)prop;
> +		of_node_put(np);
> +		if (chip >= 0) {
> +			traverse_siblings_chip_id(cpu, add, chip);
> +			return;
> +		}
> +	}
>
>   	l2_cache = cpu_to_l2cache(cpu);
>   	mask = add ? cpu_online_mask : cpu_present_mask;
>   	for_each_cpu(i, mask) {
> -		struct device_node *np = cpu_to_l2cache(i);
> +		np = cpu_to_l2cache(i);
>   		if (!np)
>   			continue;
>   		if (np == l2_cache) {
> _______________________________________________
> Linuxppc-dev mailing list
> Linuxppc-dev@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/linuxppc-dev
>

^ permalink raw reply

* [PATCH 1/5] powerpc: Fix hypervisor facility unavaliable vector number
From: Michael Neuling @ 2013-08-09  7:29 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <25550.1375872955@ale.ozlabs.ibm.com>

Currently if we take hypervisor facility unavaliable (from 0xf80/0x4f80) we
mark it as an OS facility unavaliable (0xf60) as the two share the same code
path.

The becomes a problem in facility_unavailable_exception() as we aren't able to
see the hypervisor facility unavailable exceptions.

Below fixes this by duplication the required macros.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Cc: <stable@vger.kernel.org> [v3.10]
---
 arch/powerpc/kernel/exceptions-64s.S | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 4e00d22..902ca3c 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -848,7 +848,7 @@ hv_facility_unavailable_relon_trampoline:
 	. = 0x4f80
 	SET_SCRATCH0(r13)
 	EXCEPTION_PROLOG_0(PACA_EXGEN)
-	b	facility_unavailable_relon_hv
+	b	hv_facility_unavailable_relon_hv
 
 	STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
 #ifdef CONFIG_PPC_DENORMALISATION
@@ -1175,6 +1175,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
 	b	.ret_from_except
 
 	STD_EXCEPTION_COMMON(0xf60, facility_unavailable, .facility_unavailable_exception)
+	STD_EXCEPTION_COMMON(0xf80, hv_facility_unavailable, .facility_unavailable_exception)
 
 	.align	7
 	.globl	__end_handlers
@@ -1188,7 +1189,7 @@ __end_handlers:
 	STD_RELON_EXCEPTION_PSERIES_OOL(0xf20, altivec_unavailable)
 	STD_RELON_EXCEPTION_PSERIES_OOL(0xf40, vsx_unavailable)
 	STD_RELON_EXCEPTION_PSERIES_OOL(0xf60, facility_unavailable)
-	STD_RELON_EXCEPTION_HV_OOL(0xf80, facility_unavailable)
+	STD_RELON_EXCEPTION_HV_OOL(0xf80, hv_facility_unavailable)
 
 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
 /*
-- 
1.8.1.2

^ permalink raw reply related

* [PATCH 2/5] powerpc: Rework setting up H/FSCR bit definitions
From: Michael Neuling @ 2013-08-09  7:29 UTC (permalink / raw)
  To: Benjamin Herrenschmidt; +Cc: linuxppc-dev
In-Reply-To: <25550.1375872955@ale.ozlabs.ibm.com>

This reworks the Facility Status and Control Regsiter (FSCR) config bit
definitions so that we can access the bit numbers.  This is needed for a
subsequent patch to fix the userspace DSCR handling.

HFSCR and FSCR bit definitions are the same, so reuse them.

Signed-off-by: Michael Neuling <mikey@neuling.org>
Cc: <stable@vger.kernel.org> [v3.10]
---
 arch/powerpc/include/asm/reg.h | 31 ++++++++++++++++++++-----------
 1 file changed, 20 insertions(+), 11 deletions(-)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index a6840e4..99222e2 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -254,19 +254,28 @@
 #define SPRN_HRMOR	0x139	/* Real mode offset register */
 #define SPRN_HSRR0	0x13A	/* Hypervisor Save/Restore 0 */
 #define SPRN_HSRR1	0x13B	/* Hypervisor Save/Restore 1 */
+/* HFSCR and FSCR bit numbers are the same */
+#define FSCR_TAR_LG	8	/* Enable Target Address Register */
+#define FSCR_EBB_LG	7	/* Enable Event Based Branching */
+#define FSCR_TM_LG	5	/* Enable Transactional Memory */
+#define FSCR_PM_LG	4	/* Enable prob/priv access to PMU SPRs */
+#define FSCR_BHRB_LG	3	/* Enable Branch History Rolling Buffer*/
+#define FSCR_DSCR_LG	2	/* Enable Data Stream Control Register */
+#define FSCR_VECVSX_LG	1	/* Enable VMX/VSX  */
+#define FSCR_FP_LG	0	/* Enable Floating Point */
 #define SPRN_FSCR	0x099	/* Facility Status & Control Register */
-#define   FSCR_TAR	(1 << (63-55)) /* Enable Target Address Register */
-#define   FSCR_EBB	(1 << (63-56)) /* Enable Event Based Branching */
-#define   FSCR_DSCR	(1 << (63-61)) /* Enable Data Stream Control Register */
+#define   FSCR_TAR	__MASK(FSCR_TAR_LG)
+#define   FSCR_EBB	__MASK(FSCR_EBB_LG)
+#define   FSCR_DSCR	__MASK(FSCR_DSCR_LG)
 #define SPRN_HFSCR	0xbe	/* HV=1 Facility Status & Control Register */
-#define   HFSCR_TAR	(1 << (63-55)) /* Enable Target Address Register */
-#define   HFSCR_EBB	(1 << (63-56)) /* Enable Event Based Branching */
-#define   HFSCR_TM	(1 << (63-58)) /* Enable Transactional Memory */
-#define   HFSCR_PM	(1 << (63-60)) /* Enable prob/priv access to PMU SPRs */
-#define   HFSCR_BHRB	(1 << (63-59)) /* Enable Branch History Rolling Buffer*/
-#define   HFSCR_DSCR	(1 << (63-61)) /* Enable Data Stream Control Register */
-#define   HFSCR_VECVSX	(1 << (63-62)) /* Enable VMX/VSX  */
-#define   HFSCR_FP	(1 << (63-63)) /* Enable Floating Point */
+#define   HFSCR_TAR	__MASK(FSCR_TAR_LG)
+#define   HFSCR_EBB	__MASK(FSCR_EBB_LG)
+#define   HFSCR_TM	__MASK(FSCR_TM_LG)
+#define   HFSCR_PM	__MASK(FSCR_PM_LG)
+#define   HFSCR_BHRB	__MASK(FSCR_BHRB_LG)
+#define   HFSCR_DSCR	__MASK(FSCR_DSCR_LG)
+#define   HFSCR_VECVSX	__MASK(FSCR_VECVSX_LG)
+#define   HFSCR_FP	__MASK(FSCR_FP_LG)
 #define SPRN_TAR	0x32f	/* Target Address Register */
 #define SPRN_LPCR	0x13E	/* LPAR Control Register */
 #define   LPCR_VPM0	(1ul << (63-0))
-- 
1.8.1.2

^ permalink raw reply related


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