* Re: [PATCH v2] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB
From: leroy christophe @ 2013-12-10 23:36 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
In-Reply-To: <1386717537.10013.150.camel@snotra.buserror.net>
Le 11/12/2013 00:18, Scott Wood a écrit :
> On Wed, 2013-12-11 at 00:05 +0100, leroy christophe wrote:
>> Le 10/12/2013 23:24, Scott Wood a écrit :
>>> On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote:
>>>> Today, the only way to load kernels whose size is greater than 8Mbytes is to
>>>> activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is
>>>> limited to 8Mbytes. This patch adds the capability to select the size of initial
>>>> memory between 8/16/24 Mbytes and this is regardless of whether CONFIG_PIN_TLB
>>>> is active or not. It allows to load "big" kernels (for instance when activating
>>>> CONFIG_LOCKDEP_SUPPORT) without having to activate CONFIG_PIN_TLB.
>>>>
>>>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>>>>
>>>> diff -ur a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
>>>> --- a/arch/powerpc/Kconfig
>>>> +++ b/arch/powerpc/Kconfig
>>>> @@ -980,6 +980,29 @@
>>>> config PIN_TLB
>>>> bool "Pinned Kernel TLBs (860 ONLY)"
>>>> depends on ADVANCED_OPTIONS && 8xx
>>>> +
>>>> +choice
>>>> + prompt "Initial Data Memory Mapped on 8xx"
>>>> + default 8xx_MAP_8M
>>>> + depends on ADVANCED_OPTIONS && 8xx
>>>> +
>>>> +config 8xx_INIT_MAP_8M
>>>> + bool "8 Mbytes"
>>>> +
>>>> +config 8xx_INIT_MAP_16M
>>>> + bool "16 Mbytes"
>>>> +
>>>> +config 8xx_INIT_MAP_24M
>>>> + bool "24 Mbytes"
>>> Are you working with a loader that passes initial-mapped-area size in r7
>>> as per ePAPR? If so, we could rely on that at runtime. If you're using
>>> a non-ancient U-Boot, it should qualify here even if it's not fully
>>> ePAPR compliant (it passes the value of the bootm_mapsize variable in
>>> r7).
>> Ok, let me check that. But it means that the size of the kernel I can
>> boot will depend on the initial memory mapped by uboot ? Isn't it
>> limitating ?
> The ePAPR IMA is supposed to be large enough to include the OS image,
> device tree, etc.
>
>> Even if uboot only maps 8Mbytes, why couldn't I be allowed to boot a
>> kernel having 10 Mbytes data if I have 32 Mbytes mem on the board ?
>> I don't like the idea of having to change the bootloader just because I
>> want to activate CONFIG_LOCKDEP to debug my kernel.
> Well, as noted, if you're using a non-ancient U-Boot you shouldn't have
> to change anything because it already implements r7. Now, the value of
> r7 it passes might be a lie as far as ePAPR is concerned, since it's
> supposed to represent what's actually mapped, but that's another matter.
>
> Even fixing that wouldn't mean you have to change U-Boot every time the
> kernel size changes; you'd just set it to something reasonable and be
> done with it. I'm not fond of adding kconfigs to hack around a problem
> that has already been addressed in the standard that governs the PPC
> boot process that U-Boot claims to implement.
Well, ok, that makes sense. I'll investigate around that solution.
>
>>>> -#ifdef CONFIG_PIN_TLB
>>>> +#if defined (CONFIG_8xx_INIT_MAP_16M) || defined (CONFIG_8xx_INIT_MAP_24M)
>>>> /* Map two more 8M kernel data pages.
>>>> */
>>>> +#ifdef CONFIG_PIN_TLB
>>>> addi r10, r10, 0x0100
>>>> mtspr SPRN_MD_CTR, r10
>>>> +#endif
>>>>
>>>> lis r8, KERNELBASE@h /* Create vaddr for TLB */
>>>> addis r8, r8, 0x0080 /* Add 8M */
>>>> @@ -858,15 +860,19 @@
>>>> addis r11, r11, 0x0080 /* Add 8M */
>>>> mtspr SPRN_MD_RPN, r11
>>>>
>>>> +#ifdef CONFIG_8xx_INIT_MAP_24M
>>>> +#ifdef CONFIG_PIN_TLB
>>>> addi r10, r10, 0x0100
>>>> mtspr SPRN_MD_CTR, r10
>>>> +#endif
>>> Are these ifdefs for CONFIG_PIN_TLB really needed? It shouldn't harm
>>> anything to use those entries even if they're not being pinned.
>> I'm not sure I understand your comment.
>> ifdef for CONFIG_PIN_TLB was already there before, but was enclosing the
>> whole block, so 24 Mbytes were automatically mapped when you selected
>> CONFIG_PIN_TLB and only 8 Mbytes were mapped when you didn't select
>> CONFIG_PIN_TLB.
>> I reduced the scope of those ifdefs so that they now apply on the
>> pinning only.
> There wasn't previously an ifdef specifically around the setting of
> SPRN_MD_CTR. That's new. There was an ifdef around the entire block,
> which has gone away because you are now trying to map more than 8M
> regardless of CONFIG_PIN_TLB, but that has nothing to do with whether
> there should be an ifdef around SPRN_MD_CTR.
>
>
Euh, ok, but then we have to fix it in the whole function, not only in
this block. Do you think it is worth doing it ?
Then we are back to the problem we discussed some months ago which is
that the 8xx is decrementing the MD_CTR after writting a TLB entry, and
if pinning is activated it decrements it out of the pinnable area. So it
would still be needed to:
* Reposition it for each entry for when the pinning is activated
* Make sure we set it out of the area at the end when the pinning is not
active hence the area not protected.
* Then we should probably reverse the entries, start at 31 and go down
to 28 instead of going from 28 to 31 as do today.
But is it worth doing such a big change which will not add anything
functionnaly speaking ?
Christophe
^ permalink raw reply
* Re: [PATCH v2] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB
From: Scott Wood @ 2013-12-10 23:18 UTC (permalink / raw)
To: leroy christophe; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
In-Reply-To: <52A79E31.9070304@c-s.fr>
On Wed, 2013-12-11 at 00:05 +0100, leroy christophe wrote:
> Le 10/12/2013 23:24, Scott Wood a =C3=A9crit :
> > On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote:
> >> Today, the only way to load kernels whose size is greater than 8Mbyt=
es is to
> >> activate CONFIG_PIN_TLB. Otherwise, the physical memory initially ma=
pped is
> >> limited to 8Mbytes. This patch adds the capability to select the siz=
e of initial
> >> memory between 8/16/24 Mbytes and this is regardless of whether CONF=
IG_PIN_TLB
> >> is active or not. It allows to load "big" kernels (for instance when=
activating
> >> CONFIG_LOCKDEP_SUPPORT) without having to activate CONFIG_PIN_TLB.
> >>
> >> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
> >>
> >> diff -ur a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> >> --- a/arch/powerpc/Kconfig
> >> +++ b/arch/powerpc/Kconfig
> >> @@ -980,6 +980,29 @@
> >> config PIN_TLB
> >> bool "Pinned Kernel TLBs (860 ONLY)"
> >> depends on ADVANCED_OPTIONS && 8xx
> >> +
> >> +choice
> >> + prompt "Initial Data Memory Mapped on 8xx"
> >> + default 8xx_MAP_8M
> >> + depends on ADVANCED_OPTIONS && 8xx
> >> +
> >> +config 8xx_INIT_MAP_8M
> >> + bool "8 Mbytes"
> >> +
> >> +config 8xx_INIT_MAP_16M
> >> + bool "16 Mbytes"
> >> +
> >> +config 8xx_INIT_MAP_24M
> >> + bool "24 Mbytes"
> > Are you working with a loader that passes initial-mapped-area size in=
r7
> > as per ePAPR? If so, we could rely on that at runtime. If you're us=
ing
> > a non-ancient U-Boot, it should qualify here even if it's not fully
> > ePAPR compliant (it passes the value of the bootm_mapsize variable in
> > r7).
> Ok, let me check that. But it means that the size of the kernel I can=20
> boot will depend on the initial memory mapped by uboot ? Isn't it=20
> limitating ?
The ePAPR IMA is supposed to be large enough to include the OS image,
device tree, etc.
> Even if uboot only maps 8Mbytes, why couldn't I be allowed to boot a=20
> kernel having 10 Mbytes data if I have 32 Mbytes mem on the board ?
> I don't like the idea of having to change the bootloader just because I=
=20
> want to activate CONFIG_LOCKDEP to debug my kernel.
Well, as noted, if you're using a non-ancient U-Boot you shouldn't have
to change anything because it already implements r7. Now, the value of
r7 it passes might be a lie as far as ePAPR is concerned, since it's
supposed to represent what's actually mapped, but that's another matter.
Even fixing that wouldn't mean you have to change U-Boot every time the
kernel size changes; you'd just set it to something reasonable and be
done with it. I'm not fond of adding kconfigs to hack around a problem
that has already been addressed in the standard that governs the PPC
boot process that U-Boot claims to implement.
> >> -#ifdef CONFIG_PIN_TLB
> >> +#if defined (CONFIG_8xx_INIT_MAP_16M) || defined (CONFIG_8xx_INIT_M=
AP_24M)
> >> /* Map two more 8M kernel data pages.
> >> */
> >> +#ifdef CONFIG_PIN_TLB
> >> addi r10, r10, 0x0100
> >> mtspr SPRN_MD_CTR, r10
> >> +#endif
> >> =20
> >> lis r8, KERNELBASE@h /* Create vaddr for TLB */
> >> addis r8, r8, 0x0080 /* Add 8M */
> >> @@ -858,15 +860,19 @@
> >> addis r11, r11, 0x0080 /* Add 8M */
> >> mtspr SPRN_MD_RPN, r11
> >> =20
> >> +#ifdef CONFIG_8xx_INIT_MAP_24M
> >> +#ifdef CONFIG_PIN_TLB
> >> addi r10, r10, 0x0100
> >> mtspr SPRN_MD_CTR, r10
> >> +#endif
> > Are these ifdefs for CONFIG_PIN_TLB really needed? It shouldn't harm
> > anything to use those entries even if they're not being pinned.
>=20
> I'm not sure I understand your comment.
> ifdef for CONFIG_PIN_TLB was already there before, but was enclosing th=
e=20
> whole block, so 24 Mbytes were automatically mapped when you selected=20
> CONFIG_PIN_TLB and only 8 Mbytes were mapped when you didn't select=20
> CONFIG_PIN_TLB.
> I reduced the scope of those ifdefs so that they now apply on the=20
> pinning only.
There wasn't previously an ifdef specifically around the setting of
SPRN_MD_CTR. That's new. There was an ifdef around the entire block,
which has gone away because you are now trying to map more than 8M
regardless of CONFIG_PIN_TLB, but that has nothing to do with whether
there should be an ifdef around SPRN_MD_CTR.
-Scott
^ permalink raw reply
* [PATCH v1 4/4] powerpc/512x: dts: add MPC5125 clock specs
From: Gerhard Sittig @ 2013-12-10 13:11 UTC (permalink / raw)
To: linuxppc-dev, linux-arm-kernel, Anatolij Gustschin,
Mike Turquette, Matteo Facchinetti
Cc: Scott Wood, Gerhard Sittig, Detlev Zundel
In-Reply-To: <1386681097-14126-1-git-send-email-gsi@denx.de>
add clock related specs to the MPC5125 "tower" board DTS
- add clock providers (crystal/oscillator, clock control module)
- add consumers (the CAN, SDHC, I2C, DIU, FEC, USB, PSC peripherals)
Signed-off-by: Gerhard Sittig <gsi@denx.de>
---
arch/powerpc/boot/dts/mpc5125twr.dts | 53 +++++++++++++++++++++++++++++++++-
1 file changed, 52 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/mpc5125twr.dts b/arch/powerpc/boot/dts/mpc5125twr.dts
index 0a0fe92216ae..806479ffc607 100644
--- a/arch/powerpc/boot/dts/mpc5125twr.dts
+++ b/arch/powerpc/boot/dts/mpc5125twr.dts
@@ -12,6 +12,8 @@
* option) any later version.
*/
+#include <dt-bindings/clock/mpc512x-clock.h>
+
/dts-v1/;
/ {
@@ -54,6 +56,17 @@
reg = <0x30000000 0x08000>; // 32K at 0x30000000
};
+ clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ osc: osc {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <33000000>;
+ };
+ };
+
soc@80000000 {
compatible = "fsl,mpc5121-immr";
#address-cells = <1>;
@@ -87,9 +100,12 @@
reg = <0xe00 0x100>;
};
- clock@f00 { // Clock control
+ clks: clock@f00 { // Clock control
compatible = "fsl,mpc5121-clock";
reg = <0xf00 0x100>;
+ #clock-cells = <1>;
+ clocks = <&osc>;
+ clock-names = "osc";
};
pmc@1000{ // Power Management Controller
@@ -114,18 +130,33 @@
compatible = "fsl,mpc5121-mscan";
interrupts = <12 0x8>;
reg = <0x1300 0x80>;
+ clocks = <&clks MPC512x_CLK_BDLC>,
+ <&clks MPC512x_CLK_IPS>,
+ <&clks MPC512x_CLK_SYS>,
+ <&clks MPC512x_CLK_REF>,
+ <&clks MPC512x_CLK_MSCAN0_MCLK>;
+ clock-names = "ipg", "ips", "sys", "ref", "mclk";
};
can@1380 {
compatible = "fsl,mpc5121-mscan";
interrupts = <13 0x8>;
reg = <0x1380 0x80>;
+ clocks = <&clks MPC512x_CLK_BDLC>,
+ <&clks MPC512x_CLK_IPS>,
+ <&clks MPC512x_CLK_SYS>,
+ <&clks MPC512x_CLK_REF>,
+ <&clks MPC512x_CLK_MSCAN1_MCLK>;
+ clock-names = "ipg", "ips", "sys", "ref", "mclk";
};
sdhc@1500 {
compatible = "fsl,mpc5121-sdhc";
interrupts = <8 0x8>;
reg = <0x1500 0x100>;
+ clocks = <&clks MPC512x_CLK_IPS>,
+ <&clks MPC512x_CLK_SDHC>;
+ clock-names = "ipg", "per";
};
i2c@1700 {
@@ -134,6 +165,8 @@
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
reg = <0x1700 0x20>;
interrupts = <0x9 0x8>;
+ clocks = <&clks MPC512x_CLK_I2C>;
+ clock-names = "ipg";
};
i2c@1720 {
@@ -142,6 +175,8 @@
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
reg = <0x1720 0x20>;
interrupts = <0xa 0x8>;
+ clocks = <&clks MPC512x_CLK_I2C>;
+ clock-names = "ipg";
};
i2c@1740 {
@@ -150,6 +185,8 @@
compatible = "fsl,mpc5121-i2c", "fsl-i2c";
reg = <0x1740 0x20>;
interrupts = <0xb 0x8>;
+ clocks = <&clks MPC512x_CLK_I2C>;
+ clock-names = "ipg";
};
i2ccontrol@1760 {
@@ -161,6 +198,8 @@
compatible = "fsl,mpc5121-diu";
reg = <0x2100 0x100>;
interrupts = <64 0x8>;
+ clocks = <&clks MPC512x_CLK_DIU>;
+ clock-names = "ipg";
};
mdio@2800 {
@@ -180,6 +219,8 @@
interrupts = <4 0x8>;
phy-handle = < &phy0 >;
phy-connection-type = "rmii";
+ clocks = <&clks MPC512x_CLK_FEC>;
+ clock-names = "per";
};
// IO control
@@ -196,6 +237,8 @@
interrupts = <43 0x8>;
dr_mode = "host";
phy_type = "ulpi";
+ clocks = <&clks MPC512x_CLK_USB1>;
+ clock-names = "ipg";
};
// 5125 PSCs are not 52xx or 5121 PSC compatible
@@ -206,6 +249,9 @@
interrupts = <40 0x8>;
fsl,rx-fifo-size = <16>;
fsl,tx-fifo-size = <16>;
+ clocks = <&clks MPC512x_CLK_PSC1>,
+ <&clks MPC512x_CLK_PSC1_MCLK>;
+ clock-names = "ipg", "mclk";
};
// PSC9 uart1 aka ttyPSC1
@@ -215,12 +261,17 @@
interrupts = <40 0x8>;
fsl,rx-fifo-size = <16>;
fsl,tx-fifo-size = <16>;
+ clocks = <&clks MPC512x_CLK_PSC9>,
+ <&clks MPC512x_CLK_PSC9_MCLK>;
+ clock-names = "ipg", "mclk";
};
pscfifo@11f00 {
compatible = "fsl,mpc5121-psc-fifo";
reg = <0x11f00 0x100>;
interrupts = <40 0x8>;
+ clocks = <&clks MPC512x_CLK_PSC_FIFO>;
+ clock-names = "ipg";
};
dma@14000 {
--
1.7.10.4
^ permalink raw reply related
* Re: [PATCH] KVM: PPC: Use schedule instead of cond_resched
From: Benjamin Herrenschmidt @ 2013-12-10 20:52 UTC (permalink / raw)
To: Peter Zijlstra
Cc: kvm@vger.kernel.org mailing list, Alexander Graf, kvm-ppc,
Paul Mackerras, Aneesh Kumar K.V, linuxppc-dev
In-Reply-To: <C3F93DB3-202A-427D-A7B6-A868F3743507@suse.de>
On Tue, 2013-12-10 at 15:40 +0100, Alexander Graf wrote:
> On 10.12.2013, at 15:21, Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> wrote:
>
> > From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
> >
> > We already checked need_resched. So we can call schedule directly
> >
> > Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
>
> The real fix for the issue you're seeing is
>
> https://lkml.org/lkml/2013/11/28/241
>
And is still not upstream.... Peter ?
Cheers,
Ben.
^ permalink raw reply
* [PATCHv2 1/6] powerpc: fix exception clearing in e500 SPE float emulation
From: Joseph S. Myers @ 2013-12-10 23:07 UTC (permalink / raw)
To: Scott Wood; +Cc: Liu Yu, linuxppc-dev, linux-kernel, Shan Hai
In-Reply-To: <1386376365.7375.209.camel@snotra.buserror.net>
From: Joseph Myers <joseph@codesourcery.com>
The e500 SPE floating-point emulation code clears existing exceptions
(__FPU_FPSCR &= ~FP_EX_MASK;) before ORing in the exceptions from the
emulated operation. However, these exception bits are the "sticky",
cumulative exception bits, and should only be cleared by the user
program setting SPEFSCR, not implicitly by any floating-point
instruction (whether executed purely by the hardware or emulated).
The spurious clearing of these bits shows up as missing exceptions in
glibc testing.
Fixing this, however, is not as simple as just not clearing the bits,
because while the bits may be from previous floating-point operations
(in which case they should not be cleared), the processor can also set
the sticky bits itself before the interrupt for an exception occurs,
and this can happen in cases when IEEE 754 semantics are that the
sticky bit should not be set. Specifically, the "invalid" sticky bit
is set in various cases with non-finite operands, where IEEE 754
semantics do not involve raising such an exception, and the
"underflow" sticky bit is set in cases of exact underflow, whereas
IEEE 754 semantics are that this flag is set only for inexact
underflow. Thus, for correct emulation the kernel needs to know the
setting of these two sticky bits before the instruction being
emulated.
When a floating-point operation raises an exception, the kernel can
note the state of the sticky bits immediately afterwards. Some
<fenv.h> functions that affect the state of these bits, such as
fesetenv and feholdexcept, need to use prctl with PR_GET_FPEXC and
PR_SET_FPEXC anyway, and so it is natural to record the state of those
bits during that call into the kernel and so avoid any need for a
separate call into the kernel to inform it of a change to those bits.
Thus, the interface I chose to use (in this patch and the glibc port)
is that one of those prctl calls must be made after any userspace
change to those sticky bits, other than through a floating-point
operation that traps into the kernel anyway. feclearexcept and
fesetexceptflag duly make those calls, which would not be required
were it not for this issue.
The previous EGLIBC port, and the uClibc code copied from it, is
fundamentally broken as regards any use of prctl for floating-point
exceptions because it didn't use the PR_FP_EXC_SW_ENABLE bit in its
prctl calls (and did various worse things, such as passing a pointer
when prctl expected an integer). If you avoid anything where prctl is
used, the clearing of sticky bits still means it will never give
anything approximating correct exception semantics with existing
kernels. I don't believe the patch makes things any worse for
existing code that doesn't try to inform the kernel of changes to
sticky bits - such code may get incorrect exceptions in some cases,
but it would have done so anyway in other cases.
Signed-off-by: Joseph Myers <joseph@codesourcery.com>
---
> OK -- please mention this in the changelog.
The description of brokenness of existing code attempting to use
floating-point exceptions on e500 is now included above.
> I don't know of a formal place for it, but there should at least be a
> code comment somewhere.
This version now adds a comment alongside the relevant settings of
spefscr_last.
The other patches in this series (2-6) remain independent of this one
(and as previously noted, with no dependencies except that patch 5
depends on patch 2) and so are not resent.
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index fc14a38..91441d9 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -256,6 +256,8 @@ struct thread_struct {
unsigned long evr[32]; /* upper 32-bits of SPE regs */
u64 acc; /* Accumulator */
unsigned long spefscr; /* SPE & eFP status */
+ unsigned long spefscr_last; /* SPEFSCR value on last prctl
+ call or trap return */
int used_spe; /* set if process has used spe */
#endif /* CONFIG_SPE */
#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
@@ -317,7 +319,9 @@ struct thread_struct {
(_ALIGN_UP(sizeof(init_thread_info), 16) + (unsigned long) &init_stack)
#ifdef CONFIG_SPE
-#define SPEFSCR_INIT .spefscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE,
+#define SPEFSCR_INIT \
+ .spefscr = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE, \
+ .spefscr_last = SPEFSCR_FINVE | SPEFSCR_FDBZE | SPEFSCR_FUNFE | SPEFSCR_FOVFE,
#else
#define SPEFSCR_INIT
#endif
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 3386d8a..b08c0d0 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -1175,6 +1175,19 @@ int set_fpexc_mode(struct task_struct *tsk, unsigned int val)
if (val & PR_FP_EXC_SW_ENABLE) {
#ifdef CONFIG_SPE
if (cpu_has_feature(CPU_FTR_SPE)) {
+ /*
+ * When the sticky exception bits are set
+ * directly by userspace, it must call prctl
+ * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE
+ * in the existing prctl settings) or
+ * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in
+ * the bits being set). <fenv.h> functions
+ * saving and restoring the whole
+ * floating-point environment need to do so
+ * anyway to restore the prctl settings from
+ * the saved environment.
+ */
+ tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR);
tsk->thread.fpexc_mode = val &
(PR_FP_EXC_SW_ENABLE | PR_FP_ALL_EXCEPT);
return 0;
@@ -1206,9 +1219,22 @@ int get_fpexc_mode(struct task_struct *tsk, unsigned long adr)
if (tsk->thread.fpexc_mode & PR_FP_EXC_SW_ENABLE)
#ifdef CONFIG_SPE
- if (cpu_has_feature(CPU_FTR_SPE))
+ if (cpu_has_feature(CPU_FTR_SPE)) {
+ /*
+ * When the sticky exception bits are set
+ * directly by userspace, it must call prctl
+ * with PR_GET_FPEXC (with PR_FP_EXC_SW_ENABLE
+ * in the existing prctl settings) or
+ * PR_SET_FPEXC (with PR_FP_EXC_SW_ENABLE in
+ * the bits being set). <fenv.h> functions
+ * saving and restoring the whole
+ * floating-point environment need to do so
+ * anyway to restore the prctl settings from
+ * the saved environment.
+ */
+ tsk->thread.spefscr_last = mfspr(SPRN_SPEFSCR);
val = tsk->thread.fpexc_mode;
- else
+ } else
return -EINVAL;
#else
return -EINVAL;
diff --git a/arch/powerpc/math-emu/math_efp.c b/arch/powerpc/math-emu/math_efp.c
index a73f088..59835c6 100644
--- a/arch/powerpc/math-emu/math_efp.c
+++ b/arch/powerpc/math-emu/math_efp.c
@@ -630,9 +630,27 @@ update_ccr:
regs->ccr |= (IR << ((7 - ((speinsn >> 23) & 0x7)) << 2));
update_regs:
- __FPU_FPSCR &= ~FP_EX_MASK;
+ /*
+ * If the "invalid" exception sticky bit was set by the
+ * processor for non-finite input, but was not set before the
+ * instruction being emulated, clear it. Likewise for the
+ * "underflow" bit, which may have been set by the processor
+ * for exact underflow, not just inexact underflow when the
+ * flag should be set for IEEE 754 semantics. Other sticky
+ * exceptions will only be set by the processor when they are
+ * correct according to IEEE 754 semantics, and we must not
+ * clear sticky bits that were already set before the emulated
+ * instruction as they represent the user-visible sticky
+ * exception status. "inexact" traps to kernel are not
+ * required for IEEE semantics and are not enabled by default,
+ * so the "inexact" sticky bit may have been set by a previous
+ * instruction without the kernel being aware of it.
+ */
+ __FPU_FPSCR
+ &= ~(FP_EX_INVALID | FP_EX_UNDERFLOW) | current->thread.spefscr_last;
__FPU_FPSCR |= (FP_CUR_EXCEPTIONS & FP_EX_MASK);
mtspr(SPRN_SPEFSCR, __FPU_FPSCR);
+ current->thread.spefscr_last = __FPU_FPSCR;
current->thread.evr[fc] = vc.wp[0];
regs->gpr[fc] = vc.wp[1];
--
Joseph S. Myers
joseph@codesourcery.com
^ permalink raw reply related
* Re: [PATCH v2] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB
From: leroy christophe @ 2013-12-10 23:05 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
In-Reply-To: <1386714253.10013.123.camel@snotra.buserror.net>
Le 10/12/2013 23:24, Scott Wood a écrit :
> On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote:
>> Today, the only way to load kernels whose size is greater than 8Mbytes is to
>> activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is
>> limited to 8Mbytes. This patch adds the capability to select the size of initial
>> memory between 8/16/24 Mbytes and this is regardless of whether CONFIG_PIN_TLB
>> is active or not. It allows to load "big" kernels (for instance when activating
>> CONFIG_LOCKDEP_SUPPORT) without having to activate CONFIG_PIN_TLB.
>>
>> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>>
>> diff -ur a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
>> --- a/arch/powerpc/Kconfig
>> +++ b/arch/powerpc/Kconfig
>> @@ -980,6 +980,29 @@
>> config PIN_TLB
>> bool "Pinned Kernel TLBs (860 ONLY)"
>> depends on ADVANCED_OPTIONS && 8xx
>> +
>> +choice
>> + prompt "Initial Data Memory Mapped on 8xx"
>> + default 8xx_MAP_8M
>> + depends on ADVANCED_OPTIONS && 8xx
>> +
>> +config 8xx_INIT_MAP_8M
>> + bool "8 Mbytes"
>> +
>> +config 8xx_INIT_MAP_16M
>> + bool "16 Mbytes"
>> +
>> +config 8xx_INIT_MAP_24M
>> + bool "24 Mbytes"
> Are you working with a loader that passes initial-mapped-area size in r7
> as per ePAPR? If so, we could rely on that at runtime. If you're using
> a non-ancient U-Boot, it should qualify here even if it's not fully
> ePAPR compliant (it passes the value of the bootm_mapsize variable in
> r7).
Ok, let me check that. But it means that the size of the kernel I can
boot will depend on the initial memory mapped by uboot ? Isn't it
limitating ?
Even if uboot only maps 8Mbytes, why couldn't I be allowed to boot a
kernel having 10 Mbytes data if I have 32 Mbytes mem on the board ?
I don't like the idea of having to change the bootloader just because I
want to activate CONFIG_LOCKDEP to debug my kernel.
>
>> -#ifdef CONFIG_PIN_TLB
>> +#if defined (CONFIG_8xx_INIT_MAP_16M) || defined (CONFIG_8xx_INIT_MAP_24M)
>> /* Map two more 8M kernel data pages.
>> */
>> +#ifdef CONFIG_PIN_TLB
>> addi r10, r10, 0x0100
>> mtspr SPRN_MD_CTR, r10
>> +#endif
>>
>> lis r8, KERNELBASE@h /* Create vaddr for TLB */
>> addis r8, r8, 0x0080 /* Add 8M */
>> @@ -858,15 +860,19 @@
>> addis r11, r11, 0x0080 /* Add 8M */
>> mtspr SPRN_MD_RPN, r11
>>
>> +#ifdef CONFIG_8xx_INIT_MAP_24M
>> +#ifdef CONFIG_PIN_TLB
>> addi r10, r10, 0x0100
>> mtspr SPRN_MD_CTR, r10
>> +#endif
> Are these ifdefs for CONFIG_PIN_TLB really needed? It shouldn't harm
> anything to use those entries even if they're not being pinned.
I'm not sure I understand your comment.
ifdef for CONFIG_PIN_TLB was already there before, but was enclosing the
whole block, so 24 Mbytes were automatically mapped when you selected
CONFIG_PIN_TLB and only 8 Mbytes were mapped when you didn't select
CONFIG_PIN_TLB.
I reduced the scope of those ifdefs so that they now apply on the
pinning only.
Christophe
^ permalink raw reply
* Re: [PATCH] KVM: PPC: Use schedule instead of cond_resched
From: Benjamin Herrenschmidt @ 2013-12-10 22:59 UTC (permalink / raw)
To: Peter Zijlstra
Cc: kvm@vger.kernel.org mailing list, Alexander Graf, kvm-ppc,
Paul Mackerras, Aneesh Kumar K.V, linuxppc-dev
In-Reply-To: <20131210224851.GH13532@twins.programming.kicks-ass.net>
On Tue, 2013-12-10 at 23:48 +0100, Peter Zijlstra wrote:
>
> Yeah, I went on holidays and the patch just sat there. I'll prod Ingo
> into merging it.
Thanks !
Cheers,
Ben.
^ permalink raw reply
* Re: [PATCH] KVM: PPC: Use schedule instead of cond_resched
From: Alexander Graf @ 2013-12-10 14:40 UTC (permalink / raw)
To: Aneesh Kumar K.V
Cc: Paul Mackerras, linuxppc-dev, kvm-ppc,
kvm@vger.kernel.org mailing list
In-Reply-To: <1386685284-3862-1-git-send-email-aneesh.kumar@linux.vnet.ibm.com>
On 10.12.2013, at 15:21, Aneesh Kumar K.V =
<aneesh.kumar@linux.vnet.ibm.com> wrote:
> From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
>=20
> We already checked need_resched. So we can call schedule directly
>=20
> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
The real fix for the issue you're seeing is
https://lkml.org/lkml/2013/11/28/241
Alex
^ permalink raw reply
* Re: [PATCH] KVM: PPC: Use schedule instead of cond_resched
From: Alexander Graf @ 2013-12-10 17:00 UTC (permalink / raw)
To: Aneesh Kumar K.V
Cc: Paul Mackerras, linuxppc-dev, kvm-ppc,
kvm@vger.kernel.org mailing list
In-Reply-To: <877gbcsn81.fsf@linux.vnet.ibm.com>
On 10.12.2013, at 17:08, Aneesh Kumar K.V =
<aneesh.kumar@linux.vnet.ibm.com> wrote:
> Alexander Graf <agraf@suse.de> writes:
>=20
>> On 10.12.2013, at 15:21, Aneesh Kumar K.V =
<aneesh.kumar@linux.vnet.ibm.com> wrote:
>>=20
>>> From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
>>>=20
>>> We already checked need_resched. So we can call schedule directly
>>>=20
>>> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
>>=20
>> The real fix for the issue you're seeing is
>>=20
>> https://lkml.org/lkml/2013/11/28/241
>=20
> True, I mentioned that in the thread
>=20
> https://lkml.org/lkml/2013/12/9/64
>=20
> But do we need to do cond_resched after we checked for need_resched() =
?
This is really just copying the logic from kvm_resched() from =
virt/kvm/kvm_main.c. And I'd prefer not to diverge from that. I do agree =
that there's a good chance we don't need it, as it seems to predate =
preempt notifiers:
=
https://git.kernel.org/cgit/virt/kvm/kvm.git/commit/?id=3D3fca03653010b8c5=
fa63b99fc94c78cbfb433d00
But this is a discussion that should occur on the non-ppc specific code =
first :).
Alex
^ permalink raw reply
* [PATCH v1 2/4] powerpc/512x: clk: enforce even SDHC divider values
From: Gerhard Sittig @ 2013-12-10 13:11 UTC (permalink / raw)
To: linuxppc-dev, linux-arm-kernel, Anatolij Gustschin,
Mike Turquette, Matteo Facchinetti
Cc: Scott Wood, Gerhard Sittig, Detlev Zundel
In-Reply-To: <1386681097-14126-1-git-send-email-gsi@denx.de>
the SDHC clock is derived from CSB with a fractional divider which can
address "quarters"; the implementation multiplies CSB by 4 and divides
it by the (integer) divider value
a bug in the clock domain synchronisation requires that only even
divider values get setup; we achieve this by
- multiplying CSB by 2 only instead of 4
- registering with CCF the divider's bit field without bit0
- the divider's lowest bit remains clear as this is the reset value
and later operations won't touch it
this change keeps fully utilizing common clock primitives (needs no
additional support logic, and avoids an excessive divider table) and
satisfies the hardware's constraint of only supporting even divider
values
Signed-off-by: Gerhard Sittig <gsi@denx.de>
---
arch/powerpc/platforms/512x/clock-commonclk.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c
index 079eb1137260..b5190fcb81bb 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -560,9 +560,21 @@ static void mpc512x_clk_setup_clock_tree(struct device_node *np, int busfreq)
/* now setup anything below SYS and CSB and IPS */
clks[MPC512x_CLK_DDR_UG] = mpc512x_clk_factor("ddr-ug", "sys", 1, 2);
- clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor("sdhc-x4", "csb", 4, 1);
+
+ /*
+ * the Reference Manual discusses that for SDHC only even divide
+ * ratios are supported because clock domain synchronization
+ * between 'per' and 'ipg' is broken;
+ * keep the divider's bit 0 cleared (per reset value), and only
+ * allow to setup the divider's bits 7:1, which results in that
+ * only even divide ratios can get configured upon rate changes;
+ * keep the "x4" name because this bit shift hack is an internal
+ * implementation detail, the "fractional divider with quarters"
+ * semantics remains
+ */
+ clks[MPC512x_CLK_SDHC_x4] = mpc512x_clk_factor("sdhc-x4", "csb", 2, 1);
clks[MPC512x_CLK_SDHC_UG] = mpc512x_clk_divider("sdhc-ug", "sdhc-x4", 0,
- &clkregs->scfr2, 0, 8,
+ &clkregs->scfr2, 1, 7,
CLK_DIVIDER_ONE_BASED);
clks[MPC512x_CLK_DIU_x4] = mpc512x_clk_factor("diu-x4", "csb", 4, 1);
clks[MPC512x_CLK_DIU_UG] = mpc512x_clk_divider("diu-ug", "diu-x4", 0,
--
1.7.10.4
^ permalink raw reply related
* Re: [PATCH] KVM: PPC: Use schedule instead of cond_resched
From: Peter Zijlstra @ 2013-12-10 22:48 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: kvm@vger.kernel.org mailing list, Alexander Graf, kvm-ppc,
Paul Mackerras, Aneesh Kumar K.V, linuxppc-dev
In-Reply-To: <1386708771.32037.73.camel@pasglop>
On Wed, Dec 11, 2013 at 07:52:51AM +1100, Benjamin Herrenschmidt wrote:
> On Tue, 2013-12-10 at 15:40 +0100, Alexander Graf wrote:
> > On 10.12.2013, at 15:21, Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> wrote:
> >
> > > From: "Aneesh Kumar K.V" <aneesh.kumar@linux.vnet.ibm.com>
> > >
> > > We already checked need_resched. So we can call schedule directly
> > >
> > > Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
> >
> > The real fix for the issue you're seeing is
> >
> > https://lkml.org/lkml/2013/11/28/241
> >
>
> And is still not upstream.... Peter ?
Yeah, I went on holidays and the patch just sat there. I'll prod Ingo
into merging it.
^ permalink raw reply
* Re: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)
From: Scott Wood @ 2013-12-10 20:29 UTC (permalink / raw)
To: Bharat.Bhushan@freescale.com
Cc: Stuart Yoder, linux-pci@vger.kernel.org, Alex Williamson,
agraf@suse.de, bhelgaas@google.com,
iommu@lists.linux-foundation.org, 'Wood Scott-B07421',
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
In-Reply-To: <34c6142137194b1cbd2336013ed3b10d@BN1PR03MB266.namprd03.prod.outlook.com>
My e-mail address is <scottwood@freescale.com>, not
<IMCEAEX-_O=MMS_OU=EXTERNAL+20+28FYDIBOHF25SPDLT
+29_CN=RECIPIENTS_CN=F0FAAC8D7E74473A9EE1C45B068D838A@namprd03.prod.outlook.com>
On Tue, 2013-12-10 at 05:37 +0000, Bharat.Bhushan@freescale.com wrote:
>
> > -----Original Message-----
> > From: Wood Scott-B07421
> > Sent: Saturday, December 07, 2013 12:55 AM
> > To: Bhushan Bharat-R65777
> > Cc: Alex Williamson; linux-pci@vger.kernel.org; agraf@suse.de; Yoder Stuart-
> > B08248; iommu@lists.linux-foundation.org; bhelgaas@google.com; linuxppc-
> > dev@lists.ozlabs.org; linux-kernel@vger.kernel.org
> > Subject: Re: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)
> >
> > If the administrator does not opt into this partial loss of isolation, then once
> > you run out of MSI groups, new users should not be able to set up MSIs.
>
> So mean vfio should use Legacy when out of MSI banks?
Yes, if the administrator hasn't granted permission to share.
-Scott
^ permalink raw reply
* Re: [PATCH 1/9] PCI: Use dev_is_pci() to check whether it is pci device
From: Bjorn Helgaas @ 2013-12-10 17:28 UTC (permalink / raw)
To: Benjamin Herrenschmidt
Cc: linux-ia64@vger.kernel.org, linux-parisc,
linux-pci@vger.kernel.org, linux-alpha,
linux-kernel@vger.kernel.org, sparclinux, Hanjun Guo, Yijing Wang,
linuxppc-dev, linux-arm
In-Reply-To: <1386647973.32037.57.camel@pasglop>
On Mon, Dec 9, 2013 at 8:59 PM, Benjamin Herrenschmidt <benh@au1.ibm.com> wrote:
> On Mon, 2013-12-09 at 17:01 -0700, Bjorn Helgaas wrote:
>> [+cc arch lists]
>>
>> On Thu, Dec 05, 2013 at 07:52:53PM +0800, Yijing Wang wrote:
>> > Use dev_is_pci() instead of directly compare
>> > pci_bus_type to check whether it is pci device.
>> >
>> > Signed-off-by: Yijing Wang <wangyijing@huawei.com>
>>
>> I applied all these to my pci/yijing-dev_is_pci branch for v3.14, thanks!
>>
>> Browse them here: http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/yijing-dev_is_pci
>
> Ah ok. I also have the powerpc one in powerpc -next, no biggie though
I'll drop the powerpc one.
^ permalink raw reply
* Re: [PATCH v6 00/17] add COMMON_CLK support for PowerPC MPC512x
From: Gerhard Sittig @ 2013-12-10 13:20 UTC (permalink / raw)
To: linuxppc-dev, linux-arm-kernel, Anatolij Gustschin,
Mike Turquette
Cc: Scott Wood, Paul Mackerras, Detlev Zundel
In-Reply-To: <1385851897-23475-1-git-send-email-gsi@denx.de>
[ trimmed Cc: list to PowerPC and CCF ]
On Sat, Nov 30, 2013 at 23:51 +0100, Gerhard Sittig wrote:
>
> this series introduces support for the common clock framework (CCF,
> COMMON_CLK Kconfig option) in the PowerPC based MPC512x platform,
> which brings device tree based clock lookup as well
For the record: MPC5125 turned out to be quite different
compared to MPC5121/5123 with regard to the set of peripherals
and clock features, so I sent an update of this COMMON_CLK
support motivated by MPC5125:
From: Gerhard Sittig <gsi@denx.de>
To: linuxppc-dev@lists.ozlabs.org, linux-arm-kernel@lists.infradead.org,
Anatolij Gustschin <agust@denx.de>, Mike Turquette <mturquette@linaro.org>,
Matteo Facchinetti <matteo.facchinetti@sirius-es.it>
Cc: Scott Wood <scottwood@freescale.com>, Detlev Zundel <dzu@denx.de>,
Gerhard Sittig <gsi@denx.de>
Subject: [PATCH v1 0/4] powerpc/512x: update COMMON_CLK support for MPC5125
Date: Tue, 10 Dec 2013 14:11:33 +0100
Message-Id: <1386681097-14126-1-git-send-email-gsi@denx.de>
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
^ permalink raw reply
* Re: [PATCH v2] powerpc 8xx: Loading kernels over 8Mbytes without CONFIG_PIN_TLB
From: Scott Wood @ 2013-12-10 22:24 UTC (permalink / raw)
To: Christophe Leroy; +Cc: linuxppc-dev, Paul Mackerras, linux-kernel
In-Reply-To: <20131210112945.E4E311A2BF3@localhost.localdomain>
On Tue, 2013-12-10 at 12:29 +0100, Christophe Leroy wrote:
> Today, the only way to load kernels whose size is greater than 8Mbytes is to
> activate CONFIG_PIN_TLB. Otherwise, the physical memory initially mapped is
> limited to 8Mbytes. This patch adds the capability to select the size of initial
> memory between 8/16/24 Mbytes and this is regardless of whether CONFIG_PIN_TLB
> is active or not. It allows to load "big" kernels (for instance when activating
> CONFIG_LOCKDEP_SUPPORT) without having to activate CONFIG_PIN_TLB.
>
> Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
>
> diff -ur a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
> --- a/arch/powerpc/Kconfig
> +++ b/arch/powerpc/Kconfig
> @@ -980,6 +980,29 @@
> config PIN_TLB
> bool "Pinned Kernel TLBs (860 ONLY)"
> depends on ADVANCED_OPTIONS && 8xx
> +
> +choice
> + prompt "Initial Data Memory Mapped on 8xx"
> + default 8xx_MAP_8M
> + depends on ADVANCED_OPTIONS && 8xx
> +
> +config 8xx_INIT_MAP_8M
> + bool "8 Mbytes"
> +
> +config 8xx_INIT_MAP_16M
> + bool "16 Mbytes"
> +
> +config 8xx_INIT_MAP_24M
> + bool "24 Mbytes"
Are you working with a loader that passes initial-mapped-area size in r7
as per ePAPR? If so, we could rely on that at runtime. If you're using
a non-ancient U-Boot, it should qualify here even if it's not fully
ePAPR compliant (it passes the value of the bootm_mapsize variable in
r7).
> -#ifdef CONFIG_PIN_TLB
> +#if defined (CONFIG_8xx_INIT_MAP_16M) || defined (CONFIG_8xx_INIT_MAP_24M)
> /* Map two more 8M kernel data pages.
> */
> +#ifdef CONFIG_PIN_TLB
> addi r10, r10, 0x0100
> mtspr SPRN_MD_CTR, r10
> +#endif
>
> lis r8, KERNELBASE@h /* Create vaddr for TLB */
> addis r8, r8, 0x0080 /* Add 8M */
> @@ -858,15 +860,19 @@
> addis r11, r11, 0x0080 /* Add 8M */
> mtspr SPRN_MD_RPN, r11
>
> +#ifdef CONFIG_8xx_INIT_MAP_24M
> +#ifdef CONFIG_PIN_TLB
> addi r10, r10, 0x0100
> mtspr SPRN_MD_CTR, r10
> +#endif
Are these ifdefs for CONFIG_PIN_TLB really needed? It shouldn't harm
anything to use those entries even if they're not being pinned.
-Scott
^ permalink raw reply
* Re: [PATCH] DTS: DMA: Fix DMA3 interrupts
From: Scott Wood @ 2013-12-10 18:33 UTC (permalink / raw)
To: Hongbo Zhang; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <52A6EDE8.5060903@freescale.com>
On Tue, 2013-12-10 at 18:33 +0800, Hongbo Zhang wrote:
> Scott,
> This issue is due to the non-continuous MPIC register, I think there is
> two ways to fix it.
>
> The first one is as what we are discussing, in fact the Bman/Qman DT
> author had introduced this way, and I had to follow it, it is a trick,
> adding 208 is a bit ugly I think, and even difficult to explain it to
> customers etc, but this way changes less codes.
>
> The second one is editing MPIC related codes without adding 208 to high
> interrupts. The point of translate interrupt number to MPIC register
> address is a so called 'isu' mechanism, we can do like the following
> example codes, then the tricky adding 208 isn't needed any more.
>
> Which one do you prefer?
> In fact I myself prefer the second, if the idea is acceptable, I will
> send a patch instead of this one. (and also alone with the internal
> patch decreasing 208 for the Bman/Qman)
>
> void __init corenet_ds_pic_init(void)
> {
> ......
>
> mpic = mpic_alloc(NULL, 0, flags, 0, 512, "OpenPIC");
> BUG_ON(mpic == NULL);
>
> // Add this start
> for (i = 0; i < 17; i++) {
> if (i < 11)
> addr_off = 0x10000 + 0x20 * 16 * i;
> else
> addr_off = 0x13000 + 0x20 * 16 * (i - 11); /* scape the
> address not for interrupts */
> mpic_assign_isu(mpic, i, mpic->paddr + addr_off);
> }
> // Add this end
>
> mpic_init(mpic);
> }
NACK
We already have a binding that states that the interrupt number is based
on the register offset, rather than whatever arbitrary numbers hardware
documenters decide to use next week.
While I'm not terribly happy with the usability of this, especially now
that it's not a simple "add 16", redefining the existing binding is not
OK (and in any case the code above seems obfuscatory). If we decide to
do something other than continue with register offset divided by 32,
then we need to define a new interrupt type (similar to current defined
types of error interrupt, timer, and IPI) for the new numberspace -- and
it should be handled when decoding that type of interrupt specifier,
rather than with the isu mechanism.
-Scott
^ permalink raw reply
* Re: [PATCH v1 1/1] powerpc/512x: dts: remove misplaced IRQ spec from 'soc' node
From: Gerhard Sittig @ 2013-12-10 11:24 UTC (permalink / raw)
To: Anatolij Gustschin, linuxppc-dev, devicetree, matteo.facchinetti
In-Reply-To: <20131210100501.GO2982@book.gsilab.sittig.org>
On Tue, Dec 10, 2013 at 11:05 +0100, Gerhard Sittig wrote:
>
> FYI: I only noticed yesterday that MPC5125 suffers from the same
> issue, have sent <1386669068-2477-1-git-send-email-gsi@denx.de>
> to fix that as well. Both patches may get squashed when going
> upstream. Don't have a dump at hand for MPC5125 as I don't have
> access to hardware.
Had a thinko there, the MPC5121 fix already went upstream, while
the MPC5125 fix is pending. So there is no squashing. Nevermind.
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
^ permalink raw reply
* Re: [PATCH] DTS: DMA: Fix DMA3 interrupts
From: Hongbo Zhang @ 2013-12-10 10:33 UTC (permalink / raw)
To: Scott Wood; +Cc: linuxppc-dev, linux-kernel
In-Reply-To: <1386357684.7375.124.camel@snotra.buserror.net>
Scott,
This issue is due to the non-continuous MPIC register, I think there is
two ways to fix it.
The first one is as what we are discussing, in fact the Bman/Qman DT
author had introduced this way, and I had to follow it, it is a trick,
adding 208 is a bit ugly I think, and even difficult to explain it to
customers etc, but this way changes less codes.
The second one is editing MPIC related codes without adding 208 to high
interrupts. The point of translate interrupt number to MPIC register
address is a so called 'isu' mechanism, we can do like the following
example codes, then the tricky adding 208 isn't needed any more.
Which one do you prefer?
In fact I myself prefer the second, if the idea is acceptable, I will
send a patch instead of this one. (and also alone with the internal
patch decreasing 208 for the Bman/Qman)
void __init corenet_ds_pic_init(void)
{
......
mpic = mpic_alloc(NULL, 0, flags, 0, 512, "OpenPIC");
BUG_ON(mpic == NULL);
// Add this start
for (i = 0; i < 17; i++) {
if (i < 11)
addr_off = 0x10000 + 0x20 * 16 * i;
else
addr_off = 0x13000 + 0x20 * 16 * (i - 11); /* scape the
address not for interrupts */
mpic_assign_isu(mpic, i, mpic->paddr + addr_off);
}
// Add this end
mpic_init(mpic);
}
On 12/07/2013 03:21 AM, Scott Wood wrote:
> On Fri, 2013-11-29 at 16:07 +0800, hongbo.zhang@freescale.com wrote:
>> From: Hongbo Zhang <hongbo.zhang@freescale.com>
>>
>> MPIC registers for internal interrupts is non-continous in address, any
>> internal interrupt number greater than 159 should be added (16+208) to work.
>> 16 is due to external interrupts as usual, 208 is due to the non-continous MPIC
>> register space.
>> Tested on T4240 rev2 with SRIO2 disabled.
>>
>> Signed-off-by: Hongbo Zhang <hongbo.zhang@freescale.com>
>> ---
>> arch/powerpc/boot/dts/fsl/elo3-dma-2.dtsi | 16 ++++++++--------
>> 1 file changed, 8 insertions(+), 8 deletions(-)
> The FSL MPIC binding should be updated to point out how this works.
>
> Technically it's not a change to the binding itself, since it's defined
> in terms of register offset, but the explanatory text says "So interrupt
> 0 is at offset 0x0, interrupt 1 is at offset 0x20, and so on." which is
> not accurate for these new high interrupt numbers.
>
> -Scott
>
>
>
^ permalink raw reply
* Re: [PATCH v1 1/1] powerpc/512x: dts: remove misplaced IRQ spec from 'soc' node
From: Gerhard Sittig @ 2013-12-10 10:05 UTC (permalink / raw)
To: Anatolij Gustschin; +Cc: devicetree, matteo.facchinetti, linuxppc-dev
In-Reply-To: <20131203150432.2c326004@crub>
[ Cc: to Matteo as well ]
On Tue, Dec 03, 2013 at 15:04 +0100, Anatolij Gustschin wrote:
>
> On Tue, 3 Dec 2013 11:56:52 +0100
> Gerhard Sittig <gsi@denx.de> wrote:
>
> > the 'soc' node in the common .dtsi for MPC5121 has an '#interrupt-cells'
> > property although this node is not an interrupt controller
> >
> > remove this erroneously placed property because starting with v3.13-rc1
> > lookup and resolution of 'interrupts' specs for peripherals gets misled,
> > emits 'no irq domain found' WARN() messages and breaks the boot process
> >
> > irq: no irq domain found for /soc@80000000 !
> > ------------[ cut here ]------------
> > WARNING: at /home/gsi/SRC/linux-torvalds/drivers/of/platform.c:171
> > [ ... ]
> >
> > ...
> > irq: no irq domain found for /soc@80000000 !
> > fsl-diu-fb 80002100.display: could not get DIU IRQ
> > fsl-diu-fb: probe of 80002100.display failed with error -22
> > irq: no irq domain found for /soc@80000000 !
> > mpc512x_dma 80014000.dma: Error mapping IRQ!
> > mpc512x_dma: probe of 80014000.dma failed with error -22
> > ...
> > irq: no irq domain found for /soc@80000000 !
> > fs_enet: probe of 80002800.ethernet failed with error -22
> > ...
> > irq: no irq domain found for /soc@80000000 !
> > mpc5121-rtc 80000a00.rtc: mpc5121_rtc_probe: could not request irq: 0
> > mpc5121-rtc: probe of 80000a00.rtc failed with error -22
> > ...
> >
> > [ best viewed with 'git diff -U5' to have DT node names in the context ]
> >
> > Cc: Anatolij Gustschin <agust@denx.de>
> > Cc: linuxppc-dev@lists.ozlabs.org
> > Cc: devicetree@vger.kernel.org
> > Signed-off-by: Gerhard Sittig <gsi@denx.de>
> > ---
> > arch/powerpc/boot/dts/mpc5121.dtsi | 1 -
> > 1 file changed, 1 deletion(-)
>
> applied, thanks!
FYI: I only noticed yesterday that MPC5125 suffers from the same
issue, have sent <1386669068-2477-1-git-send-email-gsi@denx.de>
to fix that as well. Both patches may get squashed when going
upstream. Don't have a dump at hand for MPC5125 as I don't have
access to hardware.
Matteo, can you verify that an unpatched v3.13-rc1 (up to and
including -rc3) won't boot, and that the patch fixes the issue
for you? Forgot to Cc: you on the MPC5125 patch, will bounce it
to you. Thanks!
virtually yours
Gerhard Sittig
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: office@denx.de
^ permalink raw reply
* [PATCH v1 1/1] powerpc/512x: dts: remove misplaced IRQ spec from 'soc' node (5125)
From: Gerhard Sittig @ 2013-12-10 9:51 UTC (permalink / raw)
To: Anatolij Gustschin; +Cc: devicetree, Gerhard Sittig, linuxppc-dev
the 'soc' node in the MPC5125 "tower" board .dts has an '#interrupt-cells'
property although this node is not an interrupt controller
remove this erroneously placed property because starting with v3.13-rc1
lookup and resolution of 'interrupts' specs for peripherals gets misled
(tries to use the 'soc' as the interrupt parent which fails), emits
'no irq domain found' WARN() messages and breaks the boot process
[ best viewed with 'git diff -U5' to have DT node names in the context ]
Cc: Anatolij Gustschin <agust@denx.de>
Cc: linuxppc-dev@lists.ozlabs.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Gerhard Sittig <gsi@denx.de>
---
note that this is not a resend of the previous MPC5121 fix, but instead
is a fix for MPC5125 along the same lines of the MPC5121 fix
---
arch/powerpc/boot/dts/mpc5125twr.dts | 1 -
1 file changed, 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/mpc5125twr.dts b/arch/powerpc/boot/dts/mpc5125twr.dts
index 4177b62240c2..0a0fe92216ae 100644
--- a/arch/powerpc/boot/dts/mpc5125twr.dts
+++ b/arch/powerpc/boot/dts/mpc5125twr.dts
@@ -58,7 +58,6 @@
compatible = "fsl,mpc5121-immr";
#address-cells = <1>;
#size-cells = <1>;
- #interrupt-cells = <2>;
ranges = <0x0 0x80000000 0x400000>;
reg = <0x80000000 0x400000>;
bus-frequency = <66000000>; // 66 MHz ips bus
--
1.7.10.4
^ permalink raw reply related
* RE: [PATCH 0/9 v2] vfio-pci: add support for Freescale IOMMU (PAMU)
From: Bharat.Bhushan @ 2013-12-10 9:09 UTC (permalink / raw)
To: Alex Williamson
Cc: linux-pci@vger.kernel.org, agraf@suse.de, Stuart Yoder,
bhelgaas@google.com, iommu@lists.linux-foundation.org, Scott Wood,
linuxppc-dev@lists.ozlabs.org, linux-kernel@vger.kernel.org
In-Reply-To: <1386654800.22974.2.camel@ul30vt.home>
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biB3ZSB1c2UsIGEgbWFsaWNpb3VzIHVzZXJzcGFjZSBjYW4gaW50ZXJmZXJlIHdpdGggYW5vdGhl
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^ permalink raw reply
* Re: [PATCH v2 00/11] Consolidate asm/fixmap.h files
From: Jonas Bonn @ 2013-12-10 8:48 UTC (permalink / raw)
To: Mark Salter
Cc: linux-arch@vger.kernel.org, linux-mips, Michal Simek, James Hogan,
Russell King, Arnd Bergmann, linux-hexagon,
linux-kernel@vger.kernel.org, Ralf Baechle, Richard Kuo,
microblaze-uclinux, Paul Mackerras, linuxppc-dev, linux-metag,
linux-arm-kernel
In-Reply-To: <1385396045-15852-1-git-send-email-msalter@redhat.com>
Hi Mark,
Is there some reason you've excluded OpenRISC here? Did you just miss
it, or does the implementation diverage too much to be usable with
your generic version?
Regards,
Jonas
On 25 November 2013 17:13, Mark Salter <msalter@redhat.com> wrote:
> Many architectures provide an asm/fixmap.h which defines support for
> compile-time 'special' virtual mappings which need to be made before
> paging_init() has run. This suport is also used for early ioremap
> on x86. Much of this support is identical across the architectures.
> This patch consolidates all of the common bits into asm-generic/fixmap.h
> which is intended to be included from arch/*/include/asm/fixmap.h.
>
> This has been compiled on x86, arm, powerpc, and sh, but tested
> on x86 only.
>
> This is version two of the patch series:
>
> git://github.com/mosalter/linux.git#fixmap-v2
>
> Version 1 is here:
>
> git://github.com/mosalter/linux.git#fixmap
>
> Changes from v1:
>
> * Added acks from feedback.
> * Use BUILD_BUG_ON in fix_to_virt()
> * Fixed ARM patch to make FIXMAP_TOP inclusive of fixmap
> range as is the case in the other architectures.
>
> Mark Salter (11):
> Add generic fixmap.h
> x86: use generic fixmap.h
> arm: use generic fixmap.h
> hexagon: use generic fixmap.h
> metag: use generic fixmap.h
> microblaze: use generic fixmap.h
> mips: use generic fixmap.h
> powerpc: use generic fixmap.h
> sh: use generic fixmap.h
> tile: use generic fixmap.h
> um: use generic fixmap.h
>
> arch/arm/include/asm/fixmap.h | 29 +++--------
> arch/arm/mm/init.c | 2 +-
> arch/hexagon/include/asm/fixmap.h | 40 +--------------
> arch/metag/include/asm/fixmap.h | 32 +-----------
> arch/microblaze/include/asm/fixmap.h | 44 +---------------
> arch/mips/include/asm/fixmap.h | 33 +-----------
> arch/powerpc/include/asm/fixmap.h | 44 +---------------
> arch/sh/include/asm/fixmap.h | 39 +--------------
> arch/tile/include/asm/fixmap.h | 33 +-----------
> arch/um/include/asm/fixmap.h | 40 +--------------
> arch/x86/include/asm/fixmap.h | 59 +---------------------
> include/asm-generic/fixmap.h | 97 ++++++++++++++++++++++++++++++++++++
> 12 files changed, 118 insertions(+), 374 deletions(-)
> create mode 100644 include/asm-generic/fixmap.h
>
> --
> 1.8.3.1
>
> --
> To unsubscribe from this list: send the line "unsubscribe linux-arch" in
> the body of a message to majordomo@vger.kernel.org
> More majordomo info at http://vger.kernel.org/majordomo-info.html
--
Jonas Bonn
Stockholm, Sweden
^ permalink raw reply
* [PATCH v4 1/5] PCI: pcibus address to resource converting take bus instead of dev
From: Yinghai Lu @ 2013-12-10 6:54 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-fbdev, linux-scsi, linux-pci, linux-pcmcia, linuxppc-dev,
linux-kernel, Guo Chao, linux-alpha, sparclinux, Yinghai Lu
In-Reply-To: <1386658484-15774-1-git-send-email-yinghai@kernel.org>
For allocating resource under bus path, we do not have dev to pass along,
and we only have bus to use instead.
-v2: drop pcibios_bus_addr_to_resource().
-v3: drop __* change requested by Bjorn.
Signed-off-by: Yinghai Lu <yinghai@kernel.org>
Cc: linux-alpha@vger.kernel.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: sparclinux@vger.kernel.org
Cc: linux-pcmcia@lists.infradead.org
Cc: linux-scsi@vger.kernel.org
Cc: linux-fbdev@vger.kernel.org
---
arch/alpha/kernel/pci-sysfs.c | 4 ++--
arch/powerpc/kernel/pci-common.c | 4 ++--
arch/powerpc/kernel/pci_of_scan.c | 4 ++--
arch/sparc/kernel/pci.c | 6 +++---
drivers/pci/host-bridge.c | 24 +++++++++++-------------
drivers/pci/probe.c | 18 +++++++++---------
drivers/pci/quirks.c | 2 +-
drivers/pci/rom.c | 2 +-
drivers/pci/setup-bus.c | 16 ++++++++--------
drivers/pci/setup-res.c | 2 +-
drivers/pcmcia/i82092.c | 2 +-
drivers/pcmcia/yenta_socket.c | 6 +++---
drivers/scsi/sym53c8xx_2/sym_glue.c | 5 +++--
drivers/video/arkfb.c | 2 +-
drivers/video/s3fb.c | 2 +-
drivers/video/vt8623fb.c | 2 +-
include/linux/pci.h | 4 ++--
17 files changed, 52 insertions(+), 53 deletions(-)
diff --git a/arch/alpha/kernel/pci-sysfs.c b/arch/alpha/kernel/pci-sysfs.c
index 2b183b0..99e8d47 100644
--- a/arch/alpha/kernel/pci-sysfs.c
+++ b/arch/alpha/kernel/pci-sysfs.c
@@ -83,7 +83,7 @@ static int pci_mmap_resource(struct kobject *kobj,
if (iomem_is_exclusive(res->start))
return -EINVAL;
- pcibios_resource_to_bus(pdev, &bar, res);
+ pcibios_resource_to_bus(pdev->bus, &bar, res);
vma->vm_pgoff += bar.start >> (PAGE_SHIFT - (sparse ? 5 : 0));
mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
@@ -139,7 +139,7 @@ static int sparse_mem_mmap_fits(struct pci_dev *pdev, int num)
long dense_offset;
unsigned long sparse_size;
- pcibios_resource_to_bus(pdev, &bar, &pdev->resource[num]);
+ pcibios_resource_to_bus(pdev->bus, &bar, &pdev->resource[num]);
/* All core logic chips have 4G sparse address space, except
CIA which has 16G (see xxx_SPARSE_MEM and xxx_DENSE_MEM
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index a1e3e40..d9476c1 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -835,7 +835,7 @@ static void pcibios_fixup_resources(struct pci_dev *dev)
* at 0 as unset as well, except if PCI_PROBE_ONLY is also set
* since in that case, we don't want to re-assign anything
*/
- pcibios_resource_to_bus(dev, ®, res);
+ pcibios_resource_to_bus(dev->bus, ®, res);
if (pci_has_flag(PCI_REASSIGN_ALL_RSRC) ||
(reg.start == 0 && !pci_has_flag(PCI_PROBE_ONLY))) {
/* Only print message if not re-assigning */
@@ -886,7 +886,7 @@ static int pcibios_uninitialized_bridge_resource(struct pci_bus *bus,
/* Job is a bit different between memory and IO */
if (res->flags & IORESOURCE_MEM) {
- pcibios_resource_to_bus(dev, ®ion, res);
+ pcibios_resource_to_bus(dev->bus, ®ion, res);
/* If the BAR is non-0 then it's probably been initialized */
if (region.start != 0)
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index ac0b034..83c26d8 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -111,7 +111,7 @@ static void of_pci_parse_addrs(struct device_node *node, struct pci_dev *dev)
res->name = pci_name(dev);
region.start = base;
region.end = base + size - 1;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
}
}
@@ -280,7 +280,7 @@ void of_scan_pci_bridge(struct pci_dev *dev)
res->flags = flags;
region.start = of_read_number(&ranges[1], 2);
region.end = region.start + size - 1;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
}
sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
bus->number);
diff --git a/arch/sparc/kernel/pci.c b/arch/sparc/kernel/pci.c
index cb02145..7de8d1f 100644
--- a/arch/sparc/kernel/pci.c
+++ b/arch/sparc/kernel/pci.c
@@ -392,7 +392,7 @@ static void apb_fake_ranges(struct pci_dev *dev,
res->flags = IORESOURCE_IO;
region.start = (first << 21);
region.end = (last << 21) + ((1 << 21) - 1);
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
pci_read_config_byte(dev, APB_MEM_ADDRESS_MAP, &map);
apb_calc_first_last(map, &first, &last);
@@ -400,7 +400,7 @@ static void apb_fake_ranges(struct pci_dev *dev,
res->flags = IORESOURCE_MEM;
region.start = (first << 29);
region.end = (last << 29) + ((1 << 29) - 1);
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
}
static void pci_of_scan_bus(struct pci_pbm_info *pbm,
@@ -491,7 +491,7 @@ static void of_scan_pci_bridge(struct pci_pbm_info *pbm,
res->flags = flags;
region.start = GET_64BIT(ranges, 1);
region.end = region.start + size - 1;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
}
after_ranges:
sprintf(bus->name, "PCI Bus %04x:%02x", pci_domain_nr(bus),
diff --git a/drivers/pci/host-bridge.c b/drivers/pci/host-bridge.c
index a68dc61..6bcd233 100644
--- a/drivers/pci/host-bridge.c
+++ b/drivers/pci/host-bridge.c
@@ -9,22 +9,19 @@
#include "pci.h"
-static struct pci_bus *find_pci_root_bus(struct pci_dev *dev)
+static struct pci_bus *find_pci_root_bus(struct pci_bus *bus)
{
- struct pci_bus *bus;
-
- bus = dev->bus;
while (bus->parent)
bus = bus->parent;
return bus;
}
-static struct pci_host_bridge *find_pci_host_bridge(struct pci_dev *dev)
+static struct pci_host_bridge *find_pci_host_bridge(struct pci_bus *bus)
{
- struct pci_bus *bus = find_pci_root_bus(dev);
+ struct pci_bus *root_bus = find_pci_root_bus(bus);
- return to_pci_host_bridge(bus->bridge);
+ return to_pci_host_bridge(root_bus->bridge);
}
void pci_set_host_bridge_release(struct pci_host_bridge *bridge,
@@ -40,10 +37,11 @@ static bool resource_contains(struct resource *res1, struct resource *res2)
return res1->start <= res2->start && res1->end >= res2->end;
}
-void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
- struct resource *res)
+void pcibios_resource_to_bus(struct pci_bus *bus,
+ struct pci_bus_region *region,
+ struct resource *res)
{
- struct pci_host_bridge *bridge = find_pci_host_bridge(dev);
+ struct pci_host_bridge *bridge = find_pci_host_bridge(bus);
struct pci_host_bridge_window *window;
resource_size_t offset = 0;
@@ -68,10 +66,10 @@ static bool region_contains(struct pci_bus_region *region1,
return region1->start <= region2->start && region1->end >= region2->end;
}
-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
- struct pci_bus_region *region)
+void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
+ struct pci_bus_region *region)
{
- struct pci_host_bridge *bridge = find_pci_host_bridge(dev);
+ struct pci_host_bridge *bridge = find_pci_host_bridge(bus);
struct pci_host_bridge_window *window;
resource_size_t offset = 0;
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index 38e403d..f049e3f 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -269,8 +269,8 @@ int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type,
region.end = l + sz;
}
- pcibios_bus_to_resource(dev, res, ®ion);
- pcibios_resource_to_bus(dev, &inverted_region, res);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
+ pcibios_resource_to_bus(dev->bus, &inverted_region, res);
/*
* If "A" is a BAR value (a bus address), "bus_to_resource(A)" is
@@ -364,7 +364,7 @@ static void pci_read_bridge_io(struct pci_bus *child)
res->flags = (io_base_lo & PCI_IO_RANGE_TYPE_MASK) | IORESOURCE_IO;
region.start = base;
region.end = limit + io_granularity - 1;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
}
@@ -386,7 +386,7 @@ static void pci_read_bridge_mmio(struct pci_bus *child)
res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM;
region.start = base;
region.end = limit + 0xfffff;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
}
@@ -436,7 +436,7 @@ static void pci_read_bridge_mmio_pref(struct pci_bus *child)
res->flags |= IORESOURCE_MEM_64;
region.start = base;
region.end = limit + 0xfffff;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
dev_printk(KERN_DEBUG, &dev->dev, " bridge window %pR\n", res);
}
}
@@ -1084,24 +1084,24 @@ int pci_setup_device(struct pci_dev *dev)
region.end = 0x1F7;
res = &dev->resource[0];
res->flags = LEGACY_IO_RESOURCE;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
region.start = 0x3F6;
region.end = 0x3F6;
res = &dev->resource[1];
res->flags = LEGACY_IO_RESOURCE;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
}
if ((progif & 4) == 0) {
region.start = 0x170;
region.end = 0x177;
res = &dev->resource[2];
res->flags = LEGACY_IO_RESOURCE;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
region.start = 0x376;
region.end = 0x376;
res = &dev->resource[3];
res->flags = LEGACY_IO_RESOURCE;
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
}
}
break;
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 3a02717..5cb726c 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -339,7 +339,7 @@ static void quirk_io_region(struct pci_dev *dev, int port,
/* Convert from PCI bus to resource space */
bus_region.start = region;
bus_region.end = region + size - 1;
- pcibios_bus_to_resource(dev, res, &bus_region);
+ pcibios_bus_to_resource(dev->bus, res, &bus_region);
if (!pci_claim_resource(dev, nr))
dev_info(&dev->dev, "quirk: %pR claimed by %s\n", res, name);
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c
index c5d0a08..5d59572 100644
--- a/drivers/pci/rom.c
+++ b/drivers/pci/rom.c
@@ -31,7 +31,7 @@ int pci_enable_rom(struct pci_dev *pdev)
if (!res->flags)
return -1;
- pcibios_resource_to_bus(pdev, ®ion, res);
+ pcibios_resource_to_bus(pdev->bus, ®ion, res);
pci_read_config_dword(pdev, pdev->rom_base_reg, &rom_addr);
rom_addr &= ~PCI_ROM_ADDRESS_MASK;
rom_addr |= region.start | PCI_ROM_ADDRESS_ENABLE;
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c
index 219a410..7933982 100644
--- a/drivers/pci/setup-bus.c
+++ b/drivers/pci/setup-bus.c
@@ -475,7 +475,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
&bus->busn_res);
res = bus->resource[0];
- pcibios_resource_to_bus(bridge, ®ion, res);
+ pcibios_resource_to_bus(bridge->bus, ®ion, res);
if (res->flags & IORESOURCE_IO) {
/*
* The IO resource is allocated a range twice as large as it
@@ -489,7 +489,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
}
res = bus->resource[1];
- pcibios_resource_to_bus(bridge, ®ion, res);
+ pcibios_resource_to_bus(bridge->bus, ®ion, res);
if (res->flags & IORESOURCE_IO) {
dev_info(&bridge->dev, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_IO_BASE_1,
@@ -499,7 +499,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
}
res = bus->resource[2];
- pcibios_resource_to_bus(bridge, ®ion, res);
+ pcibios_resource_to_bus(bridge->bus, ®ion, res);
if (res->flags & IORESOURCE_MEM) {
dev_info(&bridge->dev, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_0,
@@ -509,7 +509,7 @@ void pci_setup_cardbus(struct pci_bus *bus)
}
res = bus->resource[3];
- pcibios_resource_to_bus(bridge, ®ion, res);
+ pcibios_resource_to_bus(bridge->bus, ®ion, res);
if (res->flags & IORESOURCE_MEM) {
dev_info(&bridge->dev, " bridge window %pR\n", res);
pci_write_config_dword(bridge, PCI_CB_MEMORY_BASE_1,
@@ -546,7 +546,7 @@ static void pci_setup_bridge_io(struct pci_bus *bus)
/* Set up the top and bottom of the PCI I/O segment for this bus. */
res = bus->resource[0];
- pcibios_resource_to_bus(bridge, ®ion, res);
+ pcibios_resource_to_bus(bridge->bus, ®ion, res);
if (res->flags & IORESOURCE_IO) {
pci_read_config_dword(bridge, PCI_IO_BASE, &l);
l &= 0xffff0000;
@@ -578,7 +578,7 @@ static void pci_setup_bridge_mmio(struct pci_bus *bus)
/* Set up the top and bottom of the PCI Memory segment for this bus. */
res = bus->resource[1];
- pcibios_resource_to_bus(bridge, ®ion, res);
+ pcibios_resource_to_bus(bridge->bus, ®ion, res);
if (res->flags & IORESOURCE_MEM) {
l = (region.start >> 16) & 0xfff0;
l |= region.end & 0xfff00000;
@@ -604,7 +604,7 @@ static void pci_setup_bridge_mmio_pref(struct pci_bus *bus)
/* Set up PREF base/limit. */
bu = lu = 0;
res = bus->resource[2];
- pcibios_resource_to_bus(bridge, ®ion, res);
+ pcibios_resource_to_bus(bridge->bus, ®ion, res);
if (res->flags & IORESOURCE_PREFETCH) {
l = (region.start >> 16) & 0xfff0;
l |= region.end & 0xfff00000;
@@ -1422,7 +1422,7 @@ static int iov_resources_unassigned(struct pci_dev *dev, void *data)
if (!r->flags)
continue;
- pcibios_resource_to_bus(dev, ®ion, r);
+ pcibios_resource_to_bus(dev->bus, ®ion, r);
if (!region.start) {
*unassigned = true;
return 1; /* return early from pci_walk_bus() */
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 83c4d3b..5c060b1 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -52,7 +52,7 @@ void pci_update_resource(struct pci_dev *dev, int resno)
if (res->flags & IORESOURCE_PCI_FIXED)
return;
- pcibios_resource_to_bus(dev, ®ion, res);
+ pcibios_resource_to_bus(dev->bus, ®ion, res);
new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
if (res->flags & IORESOURCE_IO)
diff --git a/drivers/pcmcia/i82092.c b/drivers/pcmcia/i82092.c
index 519c4d6..7d47456 100644
--- a/drivers/pcmcia/i82092.c
+++ b/drivers/pcmcia/i82092.c
@@ -608,7 +608,7 @@ static int i82092aa_set_mem_map(struct pcmcia_socket *socket, struct pccard_mem_
enter("i82092aa_set_mem_map");
- pcibios_resource_to_bus(sock_info->dev, ®ion, mem->res);
+ pcibios_resource_to_bus(sock_info->dev->bus, ®ion, mem->res);
map = mem->map;
if (map > 4) {
diff --git a/drivers/pcmcia/yenta_socket.c b/drivers/pcmcia/yenta_socket.c
index dc18a3a..8485761 100644
--- a/drivers/pcmcia/yenta_socket.c
+++ b/drivers/pcmcia/yenta_socket.c
@@ -445,7 +445,7 @@ static int yenta_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *
unsigned int start, stop, card_start;
unsigned short word;
- pcibios_resource_to_bus(socket->dev, ®ion, mem->res);
+ pcibios_resource_to_bus(socket->dev->bus, ®ion, mem->res);
map = mem->map;
start = region.start;
@@ -709,7 +709,7 @@ static int yenta_allocate_res(struct yenta_socket *socket, int nr, unsigned type
region.start = config_readl(socket, addr_start) & mask;
region.end = config_readl(socket, addr_end) | ~mask;
if (region.start && region.end > region.start && !override_bios) {
- pcibios_bus_to_resource(dev, res, ®ion);
+ pcibios_bus_to_resource(dev->bus, res, ®ion);
if (pci_claim_resource(dev, PCI_BRIDGE_RESOURCES + nr) == 0)
return 0;
dev_printk(KERN_INFO, &dev->dev,
@@ -1033,7 +1033,7 @@ static void yenta_config_init(struct yenta_socket *socket)
struct pci_dev *dev = socket->dev;
struct pci_bus_region region;
- pcibios_resource_to_bus(socket->dev, ®ion, &dev->resource[0]);
+ pcibios_resource_to_bus(socket->dev->bus, ®ion, &dev->resource[0]);
config_writel(socket, CB_LEGACY_MODE_BASE, 0);
config_writel(socket, PCI_BASE_ADDRESS_0, region.start);
diff --git a/drivers/scsi/sym53c8xx_2/sym_glue.c b/drivers/scsi/sym53c8xx_2/sym_glue.c
index bac55f7..6d3ee1a 100644
--- a/drivers/scsi/sym53c8xx_2/sym_glue.c
+++ b/drivers/scsi/sym53c8xx_2/sym_glue.c
@@ -1531,7 +1531,7 @@ static int sym_iomap_device(struct sym_device *device)
struct pci_bus_region bus_addr;
int i = 2;
- pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[1]);
+ pcibios_resource_to_bus(pdev->bus, &bus_addr, &pdev->resource[1]);
device->mmio_base = bus_addr.start;
if (device->chip.features & FE_RAM) {
@@ -1541,7 +1541,8 @@ static int sym_iomap_device(struct sym_device *device)
*/
if (!pdev->resource[i].flags)
i++;
- pcibios_resource_to_bus(pdev, &bus_addr, &pdev->resource[i]);
+ pcibios_resource_to_bus(pdev->bus, &bus_addr,
+ &pdev->resource[i]);
device->ram_base = bus_addr.start;
}
diff --git a/drivers/video/arkfb.c b/drivers/video/arkfb.c
index a6b29bd..adc4ea2 100644
--- a/drivers/video/arkfb.c
+++ b/drivers/video/arkfb.c
@@ -1014,7 +1014,7 @@ static int ark_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
vga_res.flags = IORESOURCE_IO;
- pcibios_bus_to_resource(dev, &vga_res, &bus_reg);
+ pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg);
par->state.vgabase = (void __iomem *) vga_res.start;
diff --git a/drivers/video/s3fb.c b/drivers/video/s3fb.c
index 968b299..9a3f8f1 100644
--- a/drivers/video/s3fb.c
+++ b/drivers/video/s3fb.c
@@ -1180,7 +1180,7 @@ static int s3_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
vga_res.flags = IORESOURCE_IO;
- pcibios_bus_to_resource(dev, &vga_res, &bus_reg);
+ pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg);
par->state.vgabase = (void __iomem *) vga_res.start;
diff --git a/drivers/video/vt8623fb.c b/drivers/video/vt8623fb.c
index 8bc6e09..5c7cbc6 100644
--- a/drivers/video/vt8623fb.c
+++ b/drivers/video/vt8623fb.c
@@ -729,7 +729,7 @@ static int vt8623_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
vga_res.flags = IORESOURCE_IO;
- pcibios_bus_to_resource(dev, &vga_res, &bus_reg);
+ pcibios_bus_to_resource(dev->bus, &vga_res, &bus_reg);
par->state.vgabase = (void __iomem *) vga_res.start;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index eb8078a..da069fa 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -737,9 +737,9 @@ void pci_fixup_cardbus(struct pci_bus *);
/* Generic PCI functions used internally */
-void pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
+void pcibios_resource_to_bus(struct pci_bus *bus, struct pci_bus_region *region,
struct resource *res);
-void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+void pcibios_bus_to_resource(struct pci_bus *bus, struct resource *res,
struct pci_bus_region *region);
void pcibios_scan_specific_bus(int busn);
struct pci_bus *pci_find_bus(int domain, int busnr);
--
1.8.4
^ permalink raw reply related
* Re: [PATCH 1/9] PCI: Use dev_is_pci() to check whether it is pci device
From: Yijing Wang @ 2013-12-10 7:38 UTC (permalink / raw)
To: Bjorn Helgaas
Cc: linux-ia64, linux-parisc, linux-pci, Hanjun Guo, linux-kernel,
linux-alpha, sparclinux, linuxppc-dev, linux-arm-kernel
In-Reply-To: <20131210000154.GE4699@google.com>
On 2013/12/10 8:01, Bjorn Helgaas wrote:
> [+cc arch lists]
>
> On Thu, Dec 05, 2013 at 07:52:53PM +0800, Yijing Wang wrote:
>> Use dev_is_pci() instead of directly compare
>> pci_bus_type to check whether it is pci device.
>>
>> Signed-off-by: Yijing Wang <wangyijing@huawei.com>
>
> I applied all these to my pci/yijing-dev_is_pci branch for v3.14, thanks!
>
> Browse them here: http://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/yijing-dev_is_pci
Thanks!
Bjorn, I sent the "[patch v2 4/9] sparc/PCI: Use dev_is_pci() to identify PCI devices" to
correct build error found by kbuild test, Because I have no sparc platform, I guess the build error was introduced
by I remove the CONFIG_PCI #ifdef in that patch. Now I keep the CONFIG_PCI code and that patch should be no functional change.
>
> This should be no functional change.
>
> arch/alpha/kernel/pci_iommu.c | 2 +-
> arch/arm/common/it8152.c | 4 ++--
> arch/arm/mach-ixp4xx/common-pci.c | 6 +++---
> arch/ia64/hp/common/sba_iommu.c | 2 +-
> arch/ia64/sn/pci/pci_dma.c | 24 ++++++++++++------------
> arch/parisc/kernel/drivers.c | 22 +++++-----------------
> arch/powerpc/sysdev/fsl_pci.c | 2 +-
> arch/sparc/include/asm/dma-mapping.h | 10 ++++------
> arch/sparc/kernel/iommu.c | 2 +-
> arch/sparc/kernel/ioport.c | 4 +---
> arch/x86/kernel/acpi/boot.c | 4 +---
> drivers/pci/pci-acpi.c | 2 +-
> 12 files changed, 33 insertions(+), 51 deletions(-)
>
> Bjorn
>
>> ---
>> drivers/pci/pci-acpi.c | 2 +-
>> 1 files changed, 1 insertions(+), 1 deletions(-)
>>
>> diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
>> index 577074e..e0431f1 100644
>> --- a/drivers/pci/pci-acpi.c
>> +++ b/drivers/pci/pci-acpi.c
>> @@ -358,7 +358,7 @@ static void pci_acpi_cleanup(struct device *dev)
>>
>> static bool pci_acpi_bus_match(struct device *dev)
>> {
>> - return dev->bus == &pci_bus_type;
>> + return dev_is_pci(dev);
>> }
>>
>> static struct acpi_bus_type acpi_pci_bus = {
>> --
>> 1.7.1
>>
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-pci" in
>> the body of a message to majordomo@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>
> .
>
--
Thanks!
Yijing
^ permalink raw reply
* [PATCH] powerpc: set default kernel thread priority to medium-low
From: Philippe Bergheaud @ 2013-12-10 7:39 UTC (permalink / raw)
To: Linuxppc-dev; +Cc: Philippe Bergheaud
All the important PThread locking occurs in GLIBC libpthread.so
For scaling to large core counts we need to stay out of the kernel and scheduler as much as possible which implies increasing the spin time in user mode. For POWER implementations with SMT this implies that user mode needs to manage SMT priority for spinning and active (in the critical region) threads.
Libpthread must be able to raise and lower the the SMT priority versus the default to be effective.
This lowers the default kernel thread priority from medium to medium-low.
Signed-off-by: Philippe Bergheaud <felix@linux.vnet.ibm.com>
---
arch/powerpc/include/asm/exception-64s.h | 2 +-
arch/powerpc/include/asm/ppc_asm.h | 4 ++--
arch/powerpc/include/asm/processor.h | 2 +-
arch/powerpc/include/asm/spinlock.h | 8 ++++----
arch/powerpc/kernel/entry_64.S | 2 +-
arch/powerpc/kernel/exceptions-64s.S | 4 ++--
arch/powerpc/kernel/head_64.S | 4 ++--
arch/powerpc/kernel/idle.c | 2 +-
arch/powerpc/kernel/prom_init.c | 2 +-
arch/powerpc/kernel/time.c | 2 +-
arch/powerpc/kvm/book3s_hv.c | 2 +-
arch/powerpc/kvm/book3s_hv_rmhandlers.S | 4 ++--
arch/powerpc/lib/locks.c | 2 +-
arch/powerpc/platforms/cell/beat_hvCall.S | 16 ++++++++--------
arch/powerpc/platforms/powernv/opal-takeover.S | 2 +-
arch/powerpc/platforms/pseries/hvCall.S | 10 +++++-----
arch/powerpc/platforms/pseries/processor_idle.c | 4 ++--
17 files changed, 36 insertions(+), 36 deletions(-)
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index 402c1c4..30bedd9 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -135,7 +135,7 @@ END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
*/
#define HMT_MEDIUM_PPR_DISCARD \
BEGIN_FTR_SECTION_NESTED(942) \
- HMT_MEDIUM; \
+ HMT_MEDIUM_LOW; \
END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,0,942) /*non P7*/
/*
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index ce05bba..22d4ba4 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -478,9 +478,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
* PPR restore macros used in entry_64.S
* Used for P7 or later processors
*/
-#define HMT_MEDIUM_LOW_HAS_PPR \
+#define HMT_LOW_HAS_PPR \
BEGIN_FTR_SECTION_NESTED(944) \
- HMT_MEDIUM_LOW; \
+ HMT_LOW; \
END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,944)
#define SET_DEFAULT_THREAD_PPR(ra, rb) \
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index b4a3045..2f8625b 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -387,7 +387,7 @@ static inline unsigned long __pack_fe01(unsigned int fpmode)
}
#ifdef CONFIG_PPC64
-#define cpu_relax() do { HMT_low(); HMT_medium(); barrier(); } while (0)
+#define cpu_relax() do { HMT_low(); HMT_medium_low(); barrier(); } while (0)
#else
#define cpu_relax() barrier()
#endif
diff --git a/arch/powerpc/include/asm/spinlock.h b/arch/powerpc/include/asm/spinlock.h
index 5f54a74..b047a6a 100644
--- a/arch/powerpc/include/asm/spinlock.h
+++ b/arch/powerpc/include/asm/spinlock.h
@@ -120,7 +120,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
if (SHARED_PROCESSOR)
__spin_yield(lock);
} while (unlikely(lock->slock != 0));
- HMT_medium();
+ HMT_medium_low();
}
}
@@ -140,7 +140,7 @@ void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags)
if (SHARED_PROCESSOR)
__spin_yield(lock);
} while (unlikely(lock->slock != 0));
- HMT_medium();
+ HMT_medium_low();
local_irq_restore(flags_dis);
}
}
@@ -240,7 +240,7 @@ static inline void arch_read_lock(arch_rwlock_t *rw)
if (SHARED_PROCESSOR)
__rw_yield(rw);
} while (unlikely(rw->lock < 0));
- HMT_medium();
+ HMT_medium_low();
}
}
@@ -254,7 +254,7 @@ static inline void arch_write_lock(arch_rwlock_t *rw)
if (SHARED_PROCESSOR)
__rw_yield(rw);
} while (unlikely(rw->lock != 0));
- HMT_medium();
+ HMT_medium_low();
}
}
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 889ea2b..c3ee079 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -229,7 +229,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
beq- 1f
ACCOUNT_CPU_USER_EXIT(r11, r12)
- HMT_MEDIUM_LOW_HAS_PPR
+ HMT_LOW_HAS_PPR
ld r13,GPR13(r1) /* only restore r13 if returning to usermode */
1: ld r2,GPR2(r1)
ld r1,GPR1(r1)
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 2a273be..dd704d1 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -271,7 +271,7 @@ decrementer_pSeries:
. = 0xc00
.globl system_call_pSeries
system_call_pSeries:
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
SET_SCRATCH0(r13)
GET_PACA(r13)
@@ -825,7 +825,7 @@ hardware_interrupt_relon_hv:
. = 0x4c00
.globl system_call_relon_pSeries
system_call_relon_pSeries:
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
SYSCALL_PSERIES_1
SYSCALL_PSERIES_2_DIRECT
SYSCALL_PSERIES_3
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 2ae41ab..278c499 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -605,8 +605,8 @@ _GLOBAL(pmac_secondary_start)
.globl __secondary_start
__secondary_start:
- /* Set thread priority to MEDIUM */
- HMT_MEDIUM
+ /* Set thread priority to MEDIUM_LOW */
+ HMT_MEDIUM_LOW
/* Initialize the kernel stack */
LOAD_REG_ADDR(r3, current_set)
diff --git a/arch/powerpc/kernel/idle.c b/arch/powerpc/kernel/idle.c
index d7216c9..2c1e403 100644
--- a/arch/powerpc/kernel/idle.c
+++ b/arch/powerpc/kernel/idle.c
@@ -75,7 +75,7 @@ void arch_cpu_idle(void)
HMT_very_low();
}
- HMT_medium();
+ HMT_medium_low();
ppc64_runlatch_on();
}
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 5fe2842..60ec3c7 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1383,7 +1383,7 @@ static void __init prom_opal_hold_cpus(void)
HMT_low();
mb();
}
- HMT_medium();
+ HMT_medium_low();
if (data->ack != -1)
prom_debug("done, PIR=0x%x\n", data->ack);
else
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 192b051..576ba95 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -399,7 +399,7 @@ void __delay(unsigned long loops)
start = get_tbl();
while (get_tbl() - start < loops)
HMT_low();
- HMT_medium();
+ HMT_medium_low();
}
}
EXPORT_SYMBOL(__delay);
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 350bc34..c82832b 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -1249,7 +1249,7 @@ static void kvmppc_wait_for_nap(struct kvmppc_vcore *vc)
}
cpu_relax();
}
- HMT_medium();
+ HMT_medium_low();
}
/*
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index 89d4fbe..b30724e 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -1045,7 +1045,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
13: lbz r3,VCORE_IN_GUEST(r5)
cmpwi r3,0
bne 13b
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
b 16f
/* Primary thread waits for all the secondaries to exit guest */
@@ -1317,7 +1317,7 @@ secondary_too_late:
13: lbz r3,VCORE_IN_GUEST(r5)
cmpwi r3,0
bne 13b
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
li r0, KVM_GUEST_MODE_NONE
stb r0, HSTATE_IN_GUEST(r13)
ld r11,PACA_SLBSHADOWPTR(r13)
diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c
index 0c9c8d7..d6eb1cf 100644
--- a/arch/powerpc/lib/locks.c
+++ b/arch/powerpc/lib/locks.c
@@ -75,7 +75,7 @@ void arch_spin_unlock_wait(arch_spinlock_t *lock)
if (SHARED_PROCESSOR)
__spin_yield(lock);
}
- HMT_medium();
+ HMT_medium_low();
}
EXPORT_SYMBOL(arch_spin_unlock_wait);
diff --git a/arch/powerpc/platforms/cell/beat_hvCall.S b/arch/powerpc/platforms/cell/beat_hvCall.S
index 96c8019..c4a929b 100644
--- a/arch/powerpc/platforms/cell/beat_hvCall.S
+++ b/arch/powerpc/platforms/cell/beat_hvCall.S
@@ -32,7 +32,7 @@
/* Note: takes only 7 input parameters at maximum */
_GLOBAL(beat_hcall_norets)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -58,7 +58,7 @@ _GLOBAL(beat_hcall_norets)
/* Note: takes 8 input parameters at maximum */
_GLOBAL(beat_hcall_norets8)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -85,7 +85,7 @@ _GLOBAL(beat_hcall_norets8)
/* Note: takes only 6 input parameters, 1 output parameters at maximum */
_GLOBAL(beat_hcall1)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -116,7 +116,7 @@ _GLOBAL(beat_hcall1)
/* Note: takes only 6 input parameters, 2 output parameters at maximum */
_GLOBAL(beat_hcall2)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -148,7 +148,7 @@ _GLOBAL(beat_hcall2)
/* Note: takes only 6 input parameters, 3 output parameters at maximum */
_GLOBAL(beat_hcall3)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -181,7 +181,7 @@ _GLOBAL(beat_hcall3)
/* Note: takes only 6 input parameters, 4 output parameters at maximum */
_GLOBAL(beat_hcall4)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -215,7 +215,7 @@ _GLOBAL(beat_hcall4)
/* Note: takes only 6 input parameters, 5 output parameters at maximum */
_GLOBAL(beat_hcall5)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -250,7 +250,7 @@ _GLOBAL(beat_hcall5)
/* Note: takes only 6 input parameters, 6 output parameters at maximum */
_GLOBAL(beat_hcall6)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
diff --git a/arch/powerpc/platforms/powernv/opal-takeover.S b/arch/powerpc/platforms/powernv/opal-takeover.S
index 3cd2628..e350790 100644
--- a/arch/powerpc/platforms/powernv/opal-takeover.S
+++ b/arch/powerpc/platforms/powernv/opal-takeover.S
@@ -74,7 +74,7 @@ opal_secondary_entry:
ld r4,8(r3)
cmpli cr0,r4,0
beq 1b
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
1: addi r3,r31,16
bl __opal_do_takeover
b 1b
diff --git a/arch/powerpc/platforms/pseries/hvCall.S b/arch/powerpc/platforms/pseries/hvCall.S
index 444fe77..be90f7b 100644
--- a/arch/powerpc/platforms/pseries/hvCall.S
+++ b/arch/powerpc/platforms/pseries/hvCall.S
@@ -107,7 +107,7 @@ END_FTR_SECTION(0, 1); \
.text
_GLOBAL(plpar_hcall_norets)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -123,7 +123,7 @@ _GLOBAL(plpar_hcall_norets)
blr /* return r3 = status */
_GLOBAL(plpar_hcall)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -161,7 +161,7 @@ _GLOBAL(plpar_hcall)
* since these variables may not be present in the RMO region.
*/
_GLOBAL(plpar_hcall_raw)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -189,7 +189,7 @@ _GLOBAL(plpar_hcall_raw)
blr /* return r3 = status */
_GLOBAL(plpar_hcall9)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
@@ -231,7 +231,7 @@ _GLOBAL(plpar_hcall9)
/* See plpar_hcall_raw to see why this is needed */
_GLOBAL(plpar_hcall9_raw)
- HMT_MEDIUM
+ HMT_MEDIUM_LOW
mfcr r0
stw r0,8(r1)
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c
index a166e38..8124e24 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -68,7 +68,7 @@ static int snooze_loop(struct cpuidle_device *dev,
HMT_very_low();
}
- HMT_medium();
+ HMT_medium_low();
clear_thread_flag(TIF_POLLING_NRFLAG);
smp_mb();
@@ -104,7 +104,7 @@ static int dedicated_cede_loop(struct cpuidle_device *dev,
get_lppaca()->donate_dedicated_cpu = 1;
ppc64_runlatch_off();
- HMT_medium();
+ HMT_medium_low();
check_and_cede_processor();
get_lppaca()->donate_dedicated_cpu = 0;
--
1.7.10.4
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